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comparison packages/hal/mips/sim/current/src/sim.ld @ 0:3111d98ba7b3 ecos-v1_1-release

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Initial commit of eCos version 1.1
author jlarmour
date Tue, 11 May 1999 11:16:07 +0000
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-1:000000000000 0:3111d98ba7b3
1 /*==========================================================================
2 //
3 // sim.ld
4 //
5 // Linker script for MIPS simulator
6 //
7 //==========================================================================
8 //####COPYRIGHTBEGIN####
9 //
10 // -------------------------------------------
11 // The contents of this file are subject to the Cygnus eCos Public License
12 // Version 1.0 (the "License"); you may not use this file except in
13 // compliance with the License. You may obtain a copy of the License at
14 // http://sourceware.cygnus.com/ecos
15 //
16 // Software distributed under the License is distributed on an "AS IS"
17 // basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the
18 // License for the specific language governing rights and limitations under
19 // the License.
20 //
21 // The Original Code is eCos - Embedded Cygnus Operating System, released
22 // September 30, 1998.
23 //
24 // The Initial Developer of the Original Code is Cygnus. Portions created
25 // by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved.
26 // -------------------------------------------
27 //
28 //####COPYRIGHTEND####
29 //==========================================================================
30 //#####DESCRIPTIONBEGIN####
31 //
32 // Author(s): nickg
33 // Contributors: nickg
34 // Date: 1998-02-17
35 // Purpose: MIPS simulator Linker script
36 // Description: This script is passed to the linker to define the memory
37 // of the MIPS simulator.
38 //
39 //####DESCRIPTIONEND####
40 //
41 //========================================================================*/
42
43 STARTUP(vectors.o)
44 ENTRY(reset_vector)
45
46 GROUP(libtarget.a libgcc.a)
47
48 #include <pkgconf/hal.h>
49
50 #if defined(CYG_HAL_STARTUP_RAM)
51 #define LOAD_BASE 0x80000000
52 #define DATA_BASE
53 #define AT(x)
54 #elif defined(CYG_HAL_STARTUP_ROM)
55 #define LOAD_BASE 0xBFC00000
56 #define DATA_BASE 0x80000200
57 #endif
58
59 /*
60 * Allocate the stack to be at the top of memory, since the stack
61 * grows down
62 */
63
64 /*__interrupt_stack = DATA_BASE + 0x00100000; */
65
66 SECTIONS
67 {
68 /*------------------------------------------------------------*/
69
70 /* Start of ROM */
71 . = LOAD_BASE;
72
73 .rom_vectors :
74 {
75 #if defined(CYG_HAL_STARTUP_RAM)
76 KEEP(*(.utlb_vector))
77 . = ALIGN(0x80);
78 KEEP(*(.other_vector))
79 /* debug and reset vector not used in RAM version */
80 KEEP(*(.debug_vector))
81 KEEP(*(.reset_vector))
82 #elif defined(CYG_HAL_STARTUP_ROM)
83 KEEP(*(.reset_vector))
84 . = ALIGN(0x100);
85 KEEP(*(.utlb_vector))
86 . = ALIGN(0x80);
87 KEEP(*(.debug_vector))
88 . = ALIGN(0x100);
89 KEEP(*(.other_vector))
90 #endif
91 }
92
93 /*------------------------------------------------------------*/
94
95 .text :
96 {
97 _stext = .;
98 #ifndef CYG_KERNEL_USE_INIT_PRIORITY
99 __sched_text_start = .;
100 *sched.o(.text*)
101 __sched_text_end = .;
102 __clock_text_start = .;
103 *clock.o(.text*)
104 __clock_text_end = .;
105 __thread_text_start = .;
106 *thread.o(.text*)
107 __thread_text_end = .;
108 #endif
109 *(.text*)
110 *(.gnu.warning)
111 *(.gnu.linkonce*)
112 *(.init)
113
114 }
115 _etext = .;
116 PROVIDE (etext = .);
117 .fini : { *(.fini) }
118 .rodata : { *(.rodata*) }
119 .rodata1 : { *(.rodata1) }
120 .fixup : { *(.fixup) }
121 .gcc_except_table : { *(.gcc_except_table) }
122
123 /*------------------------------------------------------------*/
124
125 /* __rom_data_start = __rom_ram_vectors_start + SIZEOF( .ram_vectors ); */
126 __rom_data_start = ALIGN(8);
127 .data DATA_BASE :
128 {
129 __ram_data_start = .;
130 *(.data*)
131 *(.data1)
132 _GOT1_START_ = .;
133 *(.got1)
134 _GOT1_END_ = .;
135 /* Put .ctors and .dtors next to the .got2 section, so that the pointers
136 get relocated with -mrelocatable. */
137 _GOT2_START_ = .;
138 *(.got2)
139 #ifdef CYG_KERNEL_USE_INIT_PRIORITY
140 SORT(CONSTRUCTORS)
141 *(.ctors*)
142 *(.dtors*)
143 #else
144 CONSTRUCTORS
145 *(.ctors*)
146 *(.dtors*)
147 #endif
148 _GOT2_END_ = .;
149 . = ALIGN(8);
150 _gp = .;
151 __global = _gp;
152 _GLOBAL_OFFSET_TABLE_ = .;
153 _GOT_START_ = .;
154 _SDA_BASE_ = .;
155 *(.got.plt)
156 *(.got)
157 _GOT_END_ = .;
158 *(.dynamic)
159 /* We want the small data sections together, so single-instruction offsets
160 can access them all, and initialized data all before uninitialized, so
161 we can shorten the on-disk segment size. */
162 *(.sdata*)
163 *(.sbss*)
164 }
165 __ram_data_end = .;
166 PROVIDE( __ram_data_end = .);
167 _edata = .;
168 PROVIDE (edata = .);
169
170 /*------------------------------------------------------------*/
171
172 . = ALIGN(4);
173 __bss_start = .;
174 .bss :
175 {
176 *(.scommon)
177 *(.dynbss)
178 *(.bss)
179 *(COMMON)
180 }
181 . = ALIGN(4);
182 _end = . ;
183 PROVIDE (end = .);
184
185 /*------------------------------------------------------------*/
186 /* DWARF debug sections.
187 Symbols in the DWARF debugging sections are relative to
188 the beginning of the section so we begin them at 0. */
189
190 /* DWARF 1 */
191 .debug 0 : { *(.debug) }
192 .line 0 : { *(.line) }
193
194 /* GNU DWARF 1 extensions */
195 .debug_srcinfo 0 : { *(.debug_srcinfo) }
196 .debug_sfnames 0 : { *(.debug_sfnames) }
197
198 /* DWARF 1.1 and DWARF 2 */
199 .debug_aranges 0 : { *(.debug_aranges) }
200 .debug_pubnames 0 : { *(.debug_pubnames) }
201
202 /* DWARF 2 */
203 .debug_info 0 : { *(.debug_info) }
204 .debug_abbrev 0 : { *(.debug_abbrev) }
205 .debug_line 0 : { *(.debug_line) }
206 .debug_frame 0 : { *(.debug_frame) }
207 .debug_str 0 : { *(.debug_str) }
208 .debug_loc 0 : { *(.debug_loc) }
209 .debug_macinfo 0 : { *(.debug_macinfo) }
210
211 /* SGI/MIPS DWARF 2 extensions */
212 .debug_weaknames 0 : { *(.debug_weaknames) }
213 .debug_funcnames 0 : { *(.debug_funcnames) }
214 .debug_typenames 0 : { *(.debug_typenames) }
215 .debug_varnames 0 : { *(.debug_varnames) }
216
217 }
218
219 //hal_vsr_table = 0x80000100;
220
221 // End of sim.ld