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comparison packages/hal/mips/arch/current/include/hal_cache.h @ 76:435cced73e2f ecos-v1_3_1-release

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eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
author jlarmour
date Tue, 28 Mar 2000 14:10:45 +0000
parents bf00f99aec69
children 08ffab08d2ee
comparison
equal deleted inserted replaced
75:41bf073c0c32 76:435cced73e2f
56 56
57 // Use this macro to allow the assembler to accept "cache" instructions, 57 // Use this macro to allow the assembler to accept "cache" instructions,
58 // which are MIPS ISA 3. This is useful if someone is compiling 58 // which are MIPS ISA 3. This is useful if someone is compiling
59 // with -mips2, but the architecture is really MIPS ISA 3. 59 // with -mips2, but the architecture is really MIPS ISA 3.
60 60
61 #define _HAL_ASM_SET_MIPS_ISA( _isal_ ) asm volatile ( ".set mips" ## #_isal_ ) 61 #define _hal_asm_mips_cpp_stringize( _x_ ) #_x_
62 #define _HAL_ASM_SET_MIPS_ISA( _isal_ ) asm volatile ( \
63 ".set mips" ## _hal_asm_mips_cpp_stringize(_isal_) )
62 64
63 65
64 //============================================================================= 66 //=============================================================================
65 // Default Implementation. This uses the standard MIPS CP0 registers and 67 // Default Implementation. This uses the standard MIPS CP0 registers and
66 // cache instructions. Note that not all variants will have all of the 68 // cache instructions. Note that not all variants will have all of the