comparison README.host @ 1160:71746e7a1cdc

* include/arch.inc: Changed mask for cause register interrupt bits to 0x3f from 0x7f. The extra bit was wrong, but in all current implementations, benign. * include/mips-stub.h: Disabled use of 64 bit registers for TX49, so we can work with the public release compiler.
author nickg
date Wed, 06 Aug 2003 17:36:29 +0000
parents c2d1fd823f09
children
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