Mercurial > flash_v2

comparison packages/hal/powerpc/ec555/current/src/hal_diag.c @ 1397:9c818dd5d9fa

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
Updates for EC555 targets - from Bob Koninckx
author gthomas
date Mon, 24 Nov 2003 14:28:13 +0000
parents d2c90368aeef
children
comparison
equal deleted inserted replaced
1396:72d234fe1607 1397:9c818dd5d9fa
144 #define SCSR_FE 0x0002 // Framing error 144 #define SCSR_FE 0x0002 // Framing error
145 #define SCSR_PF 0x0001 // Parity error 145 #define SCSR_PF 0x0001 // Parity error
146 146
147 //----------------------------------------------------------------------------- 147 //-----------------------------------------------------------------------------
148 typedef struct { 148 typedef struct {
149 cyg_uint16* base; 149 cyg_uint16* base; // Base address of the register set
150 cyg_int32 msec_timeout; 150 cyg_int32 msec_timeout; // How long do we wait
151 int siu_vector; 151 int imb3_vector; // The vector on the IMB3. No need to worry
152 int imb3_vector; 152 // about SIU levels or vectors, that's the
153 unsigned int level; 153 // responsibility of the application
154 int baud_rate; 154 int baud_rate;
155 } channel_data_t; 155 } channel_data_t;
156 156
157 //----------------------------------------------------------------------------- 157 //-----------------------------------------------------------------------------
158 static void 158 static void
159 init_serial_channel(const channel_data_t* __ch_data) 159 init_serial_channel(const channel_data_t* __ch_data)
161 cyg_uint16 * base = __ch_data->base; 161 cyg_uint16 * base = __ch_data->base;
162 cyg_uint16 br; 162 cyg_uint16 br;
163 163
164 switch(__ch_data->baud_rate) 164 switch(__ch_data->baud_rate)
165 { 165 {
166 case 300: 166 case 300:
167 br = CYG_DEV_SERIAL_RS232_SCxBR_300; 167 br = CYG_DEV_SERIAL_RS232_SCxBR_300;
168 break; 168 break;
169 case 600: 169 case 600:
170 br = CYG_DEV_SERIAL_RS232_SCxBR_600; 170 br = CYG_DEV_SERIAL_RS232_SCxBR_600;
171 break; 171 break;
172 case 1200: 172 case 1200:
173 br = CYG_DEV_SERIAL_RS232_SCxBR_1200; 173 br = CYG_DEV_SERIAL_RS232_SCxBR_1200;
174 break; 174 break;
175 case 2400: 175 case 2400:
176 br = CYG_DEV_SERIAL_RS232_SCxBR_2400; 176 br = CYG_DEV_SERIAL_RS232_SCxBR_2400;
177 break; 177 break;
178 case 4800: 178 case 4800:
179 br = CYG_DEV_SERIAL_RS232_SCxBR_4800; 179 br = CYG_DEV_SERIAL_RS232_SCxBR_4800;
180 break; 180 break;
181 case 9600: 181 case 9600:
182 br = CYG_DEV_SERIAL_RS232_SCxBR_9600; 182 br = CYG_DEV_SERIAL_RS232_SCxBR_9600;
183 break; 183 break;
184 case 14400: 184 case 14400:
185 br = CYG_DEV_SERIAL_RS232_SCxBR_14400; 185 br = CYG_DEV_SERIAL_RS232_SCxBR_14400;
186 break; 186 break;
187 case 19200: 187 case 19200:
188 br = CYG_DEV_SERIAL_RS232_SCxBR_19200; 188 br = CYG_DEV_SERIAL_RS232_SCxBR_19200;
189 break; 189 break;
190 case 28800: 190 case 28800:
191 br = CYG_DEV_SERIAL_RS232_SCxBR_28800; 191 br = CYG_DEV_SERIAL_RS232_SCxBR_28800;
192 break; 192 break;
193 case 38400: 193 case 38400:
194 br = CYG_DEV_SERIAL_RS232_SCxBR_38400; 194 br = CYG_DEV_SERIAL_RS232_SCxBR_38400;
195 break; 195 break;
196 case 57600: 196 case 57600:
197 br = CYG_DEV_SERIAL_RS232_SCxBR_57600; 197 br = CYG_DEV_SERIAL_RS232_SCxBR_57600;
198 break; 198 break;
199 case 115200: 199 case 115200:
200 br = CYG_DEV_SERIAL_RS232_SCxBR_115200; 200 br = CYG_DEV_SERIAL_RS232_SCxBR_115200;
201 break; 201 break;
202 default: 202 default:
203 // Use the default if something unknown is requested 203 // Use the default if something unknown is requested
204 br = CYG_DEV_SERIAL_RS232_SCxBR_38400; 204 br = CYG_DEV_SERIAL_RS232_SCxBR_38400;
205 break; 205 break;
206 } 206 }
207 207
208 // 8-1-No parity 208 // 8-1-No parity, enable transmitter and receiver, leave interrupts
209 // as they are
209 HAL_WRITE_UINT16(base+CYG_DEV_SERIAL_RS232_SCCR1, (SCCR1_TE | SCCR1_RE)); 210 HAL_WRITE_UINT16(base+CYG_DEV_SERIAL_RS232_SCCR1, (SCCR1_TE | SCCR1_RE));
210 211
211 // Set baud rate 212 // Set baud rate
212 HAL_WRITE_UINT16(base+CYG_DEV_SERIAL_RS232_SCCR0, br); 213 HAL_WRITE_UINT16(base+CYG_DEV_SERIAL_RS232_SCCR0, br);
213 } 214 }
269 // to change the timeout parameter ... (Is this a bug in other) 270 // to change the timeout parameter ... (Is this a bug in other)
270 // PowerPC platform hals ?? You only see it when you really start from 271 // PowerPC platform hals ?? You only see it when you really start from
271 // flash .... 272 // flash ....
272 static channel_data_t channels[2] = { 273 static channel_data_t channels[2] = {
273 { (cyg_uint16*)CYG_DEV_SERIAL_BASE_A, 274 { (cyg_uint16*)CYG_DEV_SERIAL_BASE_A,
274 1000, 275 1000,
275 CYGNUM_HAL_INTERRUPT_SIU_LVL0,
276 CYGNUM_HAL_INTERRUPT_IMB3_SCI0_RX, 276 CYGNUM_HAL_INTERRUPT_IMB3_SCI0_RX,
277 0,
278 CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_BAUD }, 277 CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_BAUD },
279 { (cyg_uint16*)CYG_DEV_SERIAL_BASE_B, 278 { (cyg_uint16*)CYG_DEV_SERIAL_BASE_B,
280 1000, 279 1000,
281 CYGNUM_HAL_INTERRUPT_SIU_LVL0,
282 CYGNUM_HAL_INTERRUPT_IMB3_SCI1_RX, 280 CYGNUM_HAL_INTERRUPT_IMB3_SCI1_RX,
283 0,
284 CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_BAUD } 281 CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_BAUD }
285 }; 282 };
286 283
287 static void 284 static void
288 cyg_hal_plf_serial_write(void* __ch_data, const cyg_uint8* __buf, 285 cyg_hal_plf_serial_write(void* __ch_data, const cyg_uint8* __buf,
340 switch (__func) { 337 switch (__func) {
341 case __COMMCTL_GETBAUD: 338 case __COMMCTL_GETBAUD:
342 ret = chan->baud_rate; 339 ret = chan->baud_rate;
343 break; 340 break;
344 case __COMMCTL_SETBAUD: 341 case __COMMCTL_SETBAUD:
345 { 342 {
346 va_list ap; 343 va_list ap;
347 va_start(ap, __func); 344 va_start(ap, __func);
348 345
349 ret = chan->baud_rate; 346 ret = chan->baud_rate;
350 chan->baud_rate = va_arg(ap, cyg_int32); 347 chan->baud_rate = va_arg(ap, cyg_int32);
351 init_serial_channel(chan); 348 init_serial_channel(chan);
352 349
353 va_end(ap); 350 va_end(ap);
354 } 351 }
355 break; 352 break;
356 case __COMMCTL_IRQ_ENABLE: 353 case __COMMCTL_IRQ_ENABLE:
357 HAL_INTERRUPT_SET_LEVEL(chan->imb3_vector, chan->level); 354 // Just enable the interrupt on the IMB3. The debugged application is
358 HAL_INTERRUPT_UNMASK(chan->imb3_vector); 355 // must make sure that the interrupt is properly decoded
359 HAL_INTERRUPT_UNMASK(chan->siu_vector); 356 HAL_INTERRUPT_UNMASK(chan->imb3_vector);
360 irq_state = 1; 357 irq_state = 1;
361 break; 358 break;
362 case __COMMCTL_IRQ_DISABLE: 359 case __COMMCTL_IRQ_DISABLE:
360 // Same remark as above
363 ret = irq_state; 361 ret = irq_state;
364 irq_state = 0; 362 irq_state = 0;
365 HAL_INTERRUPT_MASK(chan->imb3_vector); 363 HAL_INTERRUPT_MASK(chan->imb3_vector);
366 HAL_INTERRUPT_MASK(chan->siu_vector);
367 break; 364 break;
368 case __COMMCTL_DBG_ISR_VECTOR: 365 case __COMMCTL_DBG_ISR_VECTOR:
369 ret = chan->siu_vector; 366 ret = chan->imb3_vector;
370 break; 367 break;
371 case __COMMCTL_SET_TIMEOUT: 368 case __COMMCTL_SET_TIMEOUT:
372 { 369 {
373 va_list ap; 370 va_list ap;
374 va_start(ap, __func); 371 va_start(ap, __func);
376 ret = chan->msec_timeout; 373 ret = chan->msec_timeout;
377 chan->msec_timeout = va_arg(ap, cyg_uint32); 374 chan->msec_timeout = va_arg(ap, cyg_uint32);
378 375
379 va_end(ap); 376 va_end(ap);
380 } 377 }
381 break; 378 break;
382 default: 379 default:
383 break; 380 break;
384 } 381 }
385 CYGARC_HAL_RESTORE_GP(); 382 CYGARC_HAL_RESTORE_GP();
386 return ret; 383 return ret;
410 c = cyg_hal_plf_serial_getc(__ch_data); 407 c = cyg_hal_plf_serial_getc(__ch_data);
411 408
412 if(cyg_hal_is_break(&c, 1)) 409 if(cyg_hal_is_break(&c, 1))
413 *__ctrlc = 1; 410 *__ctrlc = 1;
414 411
415 HAL_INTERRUPT_ACKNOWLEDGE(((channel_data_t *)__ch_data)->imb3_vector); 412 HAL_INTERRUPT_ACKNOWLEDGE(((channel_data_t *)__ch_data)->imb3_vector);
416 res = CYG_ISR_HANDLED; 413 res = CYG_ISR_HANDLED;
417 } 414 }
418 415
419 CYGARC_HAL_RESTORE_GP(); 416 CYGARC_HAL_RESTORE_GP();
420 return res; 417 return res;
421 } 418 }