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comparison packages/hal/powerpc/ppc40x/current/include/var_intr.h @ 136:a9ac27ec7abc ecos-sw-2000-11-17

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Merge from eCos master repository on 2000-11-17-18:24:25-GMT
author jlarmour
date Fri, 17 Nov 2000 23:16:43 +0000
parents d2f49caf9e38
children 52c99470ec11
comparison
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135:3bc2abeae9ff 136:a9ac27ec7abc
32 //####COPYRIGHTEND#### 32 //####COPYRIGHTEND####
33 //============================================================================= 33 //=============================================================================
34 //#####DESCRIPTIONBEGIN#### 34 //#####DESCRIPTIONBEGIN####
35 // 35 //
36 // Author(s): nickg 36 // Author(s): nickg
37 // Contributors:nickg, jskov, jlarmour, hmt 37 // Contributors:nickg, jskov, jlarmour, hmt, gthomas
38 // Date: 2000-04-02 38 // Date: 2000-04-02
39 // Purpose: Variant interrupt support 39 // Purpose: Variant interrupt support
40 // Description: The macros defined here provide the HAL APIs for handling 40 // Description: The macros defined here provide the HAL APIs for handling
41 // interrupts and the clock on the PPC60x variant CPUs. 41 // interrupts and the clock on the PPC40x variant CPUs.
42 // Usage: Is included via the architecture interrupt header: 42 // Usage: Is included via the architecture interrupt header:
43 // #include <cyg/hal/hal_intr.h> 43 // #include <cyg/hal/hal_intr.h>
44 // ... 44 // ...
45 // 45 //
46 //####DESCRIPTIONEND#### 46 //####DESCRIPTIONEND####
47 // 47 //
48 //============================================================================= 48 //=============================================================================
49 49
50 // No builtin interrupt controller in the PPC40x CPUs. 50
51 // Special handling for additional exceptions
52
53 #define CYGNUM_HAL_VECTOR_TIMERS 16 // Note: must handle all 3!
54 #define CYGNUM_HAL_VECTOR_DATA_TLB_MISS 17
55 #define CYGNUM_HAL_VECTOR_INSTR_TLB_MISS 18
56 #define CYGNUM_HAL_VECTOR_DEBUG 32
57
58 #define CYGNUM_HAL_VSR_MAX CYGNUM_HAL_VECTOR_DEBUG
59
60 // Special handling for interrupts
61
62 #define CYGHWR_HAL_INTERRUPT_CONTROLLER_ACCESS_DEFINED
63
64 // Additional interrupt sources which are supported by the 40x
65 #define CYGNUM_HAL_INTERRUPT_CRITICAL 2
66 #define CYGNUM_HAL_INTERRUPT_SERIAL_RCV 3
67 #define CYGNUM_HAL_INTERRUPT_SERIAL_XMT 4
68 #define CYGNUM_HAL_INTERRUPT_JTAG_RCV 5
69 #define CYGNUM_HAL_INTERRUPT_JTAG_XMT 6
70 #define CYGNUM_HAL_INTERRUPT_DMA0 7
71 #define CYGNUM_HAL_INTERRUPT_DMA1 8
72 #define CYGNUM_HAL_INTERRUPT_DMA2 9
73 #define CYGNUM_HAL_INTERRUPT_DMA3 10
74 #define CYGNUM_HAL_INTERRUPT_EXT0 11
75 #define CYGNUM_HAL_INTERRUPT_EXT1 12
76 #define CYGNUM_HAL_INTERRUPT_EXT2 13
77 #define CYGNUM_HAL_INTERRUPT_EXT3 14
78 #define CYGNUM_HAL_INTERRUPT_EXT4 15
79 #define CYGNUM_HAL_INTERRUPT_VAR_TIMER 16
80 #define CYGNUM_HAL_INTERRUPT_FIXED_TIMER 17
81 #define CYGNUM_HAL_INTERRUPT_WATCHDOG_TIMER 18
82
83 #define CYGNUM_HAL_ISR_MAX CYGNUM_HAL_INTERRUPT_WATCHDOG_TIMER
84
85 //--------------------------------------------------------------------------
86 // Interrupt controller access
87
88 externC void hal_ppc40x_interrupt_mask(int);
89 externC void hal_ppc40x_interrupt_unmask(int);
90 externC void hal_ppc40x_interrupt_acknowledge(int);
91 externC void hal_ppc40x_interrupt_configure(int, int, int);
92 externC void hal_ppc40x_interrupt_set_level(int, int);
93
94 #define HAL_INTERRUPT_MASK( _vector_ ) \
95 hal_ppc40x_interrupt_mask( _vector_ )
96 #define HAL_INTERRUPT_UNMASK( _vector_ ) \
97 hal_ppc40x_interrupt_unmask( _vector_ )
98 #define HAL_INTERRUPT_ACKNOWLEDGE( _vector_ ) \
99 hal_ppc40x_interrupt_acknowledge( _vector_ )
100 #define HAL_INTERRUPT_CONFIGURE( _vector_, _level_, _up_ ) \
101 hal_ppc40x_interrupt_configure( _vector_, _level_, _up_ )
102 #define HAL_INTERRUPT_SET_LEVEL( _vector_, _level_ ) \
103 hal_ppc40x_interrupt_set_level( _vector_, _level_ )
104
105 //--------------------------------------------------------------------------
106 // Clock control
107
108 externC void hal_ppc40x_clock_initialize(cyg_uint32);
109 externC void hal_ppc40x_clock_read(cyg_uint32 *);
110 externC void hal_ppc40x_clock_reset(cyg_uint32, cyg_uint32);
111 externC void hal_ppc40x_delay_us(int);
112
113 #define CYGHWR_HAL_CLOCK_DEFINED
114 #define HAL_CLOCK_INITIALIZE( _period_ ) hal_ppc40x_clock_initialize( _period_ )
115 #define HAL_CLOCK_RESET( _vec_, _period_ ) hal_ppc40x_clock_reset( _vec_, _period_ )
116 #define HAL_CLOCK_READ( _pvalue_ ) hal_ppc40x_clock_read( _pvalue_ )
117 #ifdef CYGVAR_KERNEL_COUNTERS_CLOCK_LATENCY
118 #define HAL_CLOCK_LATENCY( _pvalue_ ) HAL_CLOCK_READ( (cyg_uint32 *)_pvalue_ )
119 #endif
120
121 #define HAL_DELAY_US(n) hal_ppc40x_delay_us(n)
122 #define CYGNUM_HAL_INTERRUPT_RTC CYGNUM_HAL_INTERRUPT_VAR_TIMER
123
124 //-----------------------------------------------------------------------------
125 // Symbols used by assembly code
126 #define CYGARC_VARIANT_DEFS \
127 DEFINE(CYGNUM_HAL_VECTOR_TIMERS, CYGNUM_HAL_VECTOR_TIMERS); \
128 DEFINE(CYGNUM_HAL_INTERRUPT_VAR_TIMER,CYGNUM_HAL_INTERRUPT_VAR_TIMER);
51 129
52 //----------------------------------------------------------------------------- 130 //-----------------------------------------------------------------------------
53 #endif // ifndef CYGONCE_VAR_INTR_H 131 #endif // ifndef CYGONCE_VAR_INTR_H
54 // End of var_intr.h 132 // End of var_intr.h