Mercurial > flash_v2
comparison packages/hal/powerpc/ppc40x/current/src/var_misc.c @ 134:d2f49caf9e38 ecos-sw-2000-11-03
Merge from eCos master repository on 2000-11-03-09:00:49-GMT
| author | jlarmour |
|---|---|
| date | Fri, 03 Nov 2000 21:17:40 +0000 |
| parents | |
| children | a9ac27ec7abc |
comparison
equal
deleted
inserted
replaced
| 133:98d71f4d8243 | 134:d2f49caf9e38 |
|---|---|
| 1 //========================================================================== | |
| 2 // | |
| 3 // var_misc.c | |
| 4 // | |
| 5 // HAL implementation miscellaneous functions | |
| 6 // | |
| 7 //========================================================================== | |
| 8 //####COPYRIGHTBEGIN#### | |
| 9 // | |
| 10 // ------------------------------------------- | |
| 11 // The contents of this file are subject to the Red Hat eCos Public License | |
| 12 // Version 1.1 (the "License"); you may not use this file except in | |
| 13 // compliance with the License. You may obtain a copy of the License at | |
| 14 // http://www.redhat.com/ | |
| 15 // | |
| 16 // Software distributed under the License is distributed on an "AS IS" | |
| 17 // basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the | |
| 18 // License for the specific language governing rights and limitations under | |
| 19 // the License. | |
| 20 // | |
| 21 // The Original Code is eCos - Embedded Configurable Operating System, | |
| 22 // released September 30, 1998. | |
| 23 // | |
| 24 // The Initial Developer of the Original Code is Red Hat. | |
| 25 // Portions created by Red Hat are | |
| 26 // Copyright (C) 1998, 1999, 2000 Red Hat, Inc. | |
| 27 // All Rights Reserved. | |
| 28 // ------------------------------------------- | |
| 29 // | |
| 30 //####COPYRIGHTEND#### | |
| 31 //========================================================================== | |
| 32 //#####DESCRIPTIONBEGIN#### | |
| 33 // | |
| 34 // Author(s): jskov | |
| 35 // Contributors: jskov | |
| 36 // Date: 2000-02-04 | |
| 37 // Purpose: HAL miscellaneous functions | |
| 38 // Description: This file contains miscellaneous functions provided by the | |
| 39 // HAL. | |
| 40 // | |
| 41 //####DESCRIPTIONEND#### | |
| 42 // | |
| 43 //========================================================================== | |
| 44 | |
| 45 #include <pkgconf/hal.h> | |
| 46 | |
| 47 #define CYGARC_HAL_COMMON_EXPORT_CPU_MACROS | |
| 48 #include <cyg/hal/ppc_regs.h> | |
| 49 #include <cyg/infra/cyg_type.h> | |
| 50 | |
| 51 #include <cyg/hal/hal_mem.h> | |
| 52 | |
| 53 //-------------------------------------------------------------------------- | |
| 54 void hal_variant_init(void) | |
| 55 { | |
| 56 } | |
| 57 | |
| 58 | |
| 59 //-------------------------------------------------------------------------- | |
| 60 // Variant specific idle thread action. | |
| 61 bool | |
| 62 hal_variant_idle_thread_action( cyg_uint32 count ) | |
| 63 { | |
| 64 // Let architecture idle thread action run | |
| 65 return true; | |
| 66 } | |
| 67 | |
| 68 //--------------------------------------------------------------------------- | |
| 69 // Use MMU resources to map memory regions. | |
| 70 // Takes and returns an int used to ID the MMU resource to use. This ID | |
| 71 // is increased as resources are used and should be used for subsequent | |
| 72 // invocations. | |
| 73 // | |
| 74 // The PPC4xx CPUs do not have BATs. Fortunately we don't currently | |
| 75 // use the MMU, so we can simulate BATs by using the TLBs. | |
| 76 int | |
| 77 cyg_hal_map_memory (int id, CYG_ADDRESS virt, CYG_ADDRESS phys, | |
| 78 cyg_int32 size, cyg_uint8 flags) | |
| 79 { | |
| 80 cyg_uint32 epn, rpn; | |
| 81 int sv, lv, max_tlbs; | |
| 82 | |
| 83 // There are 64 TLBs. | |
| 84 max_tlbs = 64; | |
| 85 | |
| 86 // Use the smallest "size" value which is big enough (round up) | |
| 87 for (sv = 0, lv = 0x400; sv < 8; sv++, lv <<= 2) { | |
| 88 if (lv >= size) break; | |
| 89 } | |
| 90 | |
| 91 // Note: the process ID comes from the PID register (always 0) | |
| 92 epn = (virt & M_EPN_EPNMASK) | M_EPN_EV | M_EPN_SIZE(sv); | |
| 93 rpn = (phys & M_RPN_RPNMASK) | M_RPN_EX | M_RPN_WR; | |
| 94 | |
| 95 if (flags & CYGARC_MEMDESC_CI) { | |
| 96 rpn |= M_RPN_I; | |
| 97 } | |
| 98 | |
| 99 if (flags & CYGARC_MEMDESC_GUARDED) | |
| 100 rpn |= M_RPN_G; | |
| 101 | |
| 102 CYGARC_TLBWE(id, epn, rpn); | |
| 103 id++; | |
| 104 | |
| 105 // Make caches default disabled when MMU is disabled. | |
| 106 | |
| 107 return id; | |
| 108 } | |
| 109 | |
| 110 | |
| 111 // Initialize MMU to a sane (NOP) state. | |
| 112 // | |
| 113 // Initialize TLBs with 0, Valid bits unset. | |
| 114 void | |
| 115 cyg_hal_clear_MMU (void) | |
| 116 { | |
| 117 cyg_uint32 tlbhi = 0; | |
| 118 cyg_uint32 tlblo = 0; | |
| 119 int id, max_tlbs; | |
| 120 cyg_uint32 tlb[64][2]; | |
| 121 | |
| 122 // There are 64 TLBs. | |
| 123 max_tlbs = 64; | |
| 124 | |
| 125 CYGARC_MTSPR (M_PID, 0); | |
| 126 | |
| 127 for (id = 0; id < max_tlbs; id++) { | |
| 128 CYGARC_TLBRE(id, tlb[id][0], tlb[id][1]); | |
| 129 CYGARC_TLBWE(id, tlbhi, tlblo); | |
| 130 } | |
| 131 | |
| 132 // Make caches default disabled when MMU is disabled. | |
| 133 } | |
| 134 | |
| 135 //-------------------------------------------------------------------------- | |
| 136 // End of var_misc.c |
