Mercurial > flash_v2
comparison packages/hal/mips/tx39/current/include/variant.inc @ 6:d376b777e2ce ecos-sw-1999-05-14
Merge from eCos master repository on 1999-05-14-19:27:43-BST
| author | jlarmour |
|---|---|
| date | Fri, 14 May 1999 12:20:00 +0000 |
| parents | |
| children | 29bc183297e1 |
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| 5:4e8259f41183 | 6:d376b777e2ce |
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| 1 #ifndef CYGONCE_HAL_IMPL_INC | |
| 2 #define CYGONCE_HAL_IMPL_INC | |
| 3 ##============================================================================= | |
| 4 ## | |
| 5 ## impl.inc | |
| 6 ## | |
| 7 ## TX39 family assembler header file | |
| 8 ## | |
| 9 ##============================================================================= | |
| 10 #####COPYRIGHTBEGIN#### | |
| 11 # | |
| 12 # ------------------------------------------- | |
| 13 # The contents of this file are subject to the Cygnus eCos Public License | |
| 14 # Version 1.0 (the "License"); you may not use this file except in | |
| 15 # compliance with the License. You may obtain a copy of the License at | |
| 16 # http://sourceware.cygnus.com/ecos | |
| 17 # | |
| 18 # Software distributed under the License is distributed on an "AS IS" | |
| 19 # basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the | |
| 20 # License for the specific language governing rights and limitations under | |
| 21 # the License. | |
| 22 # | |
| 23 # The Original Code is eCos - Embedded Cygnus Operating System, released | |
| 24 # September 30, 1998. | |
| 25 # | |
| 26 # The Initial Developer of the Original Code is Cygnus. Portions created | |
| 27 # by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. | |
| 28 # ------------------------------------------- | |
| 29 # | |
| 30 #####COPYRIGHTEND#### | |
| 31 ##============================================================================= | |
| 32 #######DESCRIPTIONBEGIN#### | |
| 33 ## | |
| 34 ## Author(s): nickg | |
| 35 ## Contributors: nickg | |
| 36 ## Date: 1999-04-06 | |
| 37 ## Purpose: TX39 family definitions. | |
| 38 ## Description: This file contains various definitions and macros that are | |
| 39 ## useful for writing assembly code for the TX39 CPU family. | |
| 40 ## Usage: | |
| 41 ## #include <cyg/hal/impl.inc> | |
| 42 ## ... | |
| 43 ## | |
| 44 ## | |
| 45 ######DESCRIPTIONEND#### | |
| 46 ## | |
| 47 ##============================================================================= | |
| 48 | |
| 49 #include <cyg/hal/mips.inc> | |
| 50 | |
| 51 #include <cyg/hal/platform.inc> | |
| 52 | |
| 53 #include <pkgconf/hal.h> | |
| 54 | |
| 55 ##----------------------------------------------------------------------------- | |
| 56 ## Define CPU variant for architecture HAL. | |
| 57 | |
| 58 #define CYG_HAL_MIPS_R3000A | |
| 59 #define CYG_HAL_MIPS_R3900 | |
| 60 | |
| 61 ##----------------------------------------------------------------------------- | |
| 62 ## Indicate that the ISR tables are defined in variant.S | |
| 63 | |
| 64 #define CYG_HAL_MIPS_ISR_TABLES_DEFINED | |
| 65 | |
| 66 ##----------------------------------------------------------------------------- | |
| 67 ## TX39 Memory controller. | |
| 68 | |
| 69 #ifndef CYGPKG_HAL_MIPS_MEMC_DEFINED | |
| 70 | |
| 71 ## ROM timing characteristics are dependent on the clock speed. | |
| 72 | |
| 73 #if (CYGHWR_HAL_MIPS_CPU_FREQ == 50) | |
| 74 #define ROM_CCR0_INIT 0x00000420 | |
| 75 #define DRAM_DREFC_INIT 0x00000180 | |
| 76 #elif (CYGHWR_HAL_MIPS_CPU_FREQ == 66) | |
| 77 #define ROM_CCR0_INIT 0x00000520 | |
| 78 #define DRAM_DREFC_INIT 0x00000200 | |
| 79 #else | |
| 80 #error Unsupported clock frequency | |
| 81 #endif | |
| 82 | |
| 83 ## DRAM configuration is dependent on the DRAM device used. | |
| 84 ## for 16MByte (4MBit (x4bit) x 8) 0x08024030 | |
| 85 ## for 4MByte (1MBit (x4bit) x 8) 0x08013020 | |
| 86 ## for 8MByte (1MBit (x4bit) x 8 x 2 banks) 0x08013020 | |
| 87 | |
| 88 #if defined CYGHWR_HAL_TX39_JMR3904_DRAM_CONFIG_INIT | |
| 89 #define DRAM_CONFIG_INIT CYGHWR_HAL_TX39_JMR3904_DRAM_CONFIG_INIT | |
| 90 #else | |
| 91 #define DRAM_CONFIG_INIT 0x08024030 | |
| 92 #endif | |
| 93 | |
| 94 #ifdef CYG_HAL_MIPS_JMR3904 | |
| 95 .macro hal_memc_init | |
| 96 | |
| 97 # These mappings need to be set up before we | |
| 98 # can use the stack and make calls to other | |
| 99 # functions | |
| 100 | |
| 101 # If we have been started from Cygmon, it should have | |
| 102 # already done a lot of this, but it should do no harm | |
| 103 # to reinitialize the following registers. | |
| 104 | |
| 105 # SCS0,1 base addr of ISA & PCI | |
| 106 la v0,0xffffe010 | |
| 107 la v1,0x20201410 | |
| 108 sw v1,0(v0) | |
| 109 | |
| 110 la v0,0xffffe014 | |
| 111 la v1,0xfffffcfc | |
| 112 sw v1,0(v0) | |
| 113 | |
| 114 # ROM configuration | |
| 115 .set at | |
| 116 la v0,0xffff9000 | |
| 117 lw v1,0(v0) | |
| 118 and v1,v1,0xffff0004 # keep hardware defaults | |
| 119 or v1,ROM_CCR0_INIT # install our values | |
| 120 sw v1,0(v0) | |
| 121 .set noat | |
| 122 | |
| 123 # SRAM config | |
| 124 la v0,0xffff9100 | |
| 125 la v1,0x00000000 | |
| 126 sw v1,0(v0) | |
| 127 | |
| 128 # ISA bus setup | |
| 129 la v0,0xb2100000 | |
| 130 la v1,4 | |
| 131 sb v1,0(v0) | |
| 132 | |
| 133 # Clear IMR (to cope with JMON) | |
| 134 la v0,0xffffc004 | |
| 135 la v1,0x00000000 | |
| 136 sw v1,0(v0) | |
| 137 | |
| 138 #if defined(CYG_HAL_STARTUP_ROM) | |
| 139 | |
| 140 # Only do this in ROM configurations. | |
| 141 | |
| 142 # DRAM Configuration | |
| 143 la v0, 0xffff8000 | |
| 144 la v1, DRAM_CONFIG_INIT | |
| 145 sw v1, 0(v0) | |
| 146 | |
| 147 # DBMR0 | |
| 148 la v0, 0xffff8004 | |
| 149 la v1, 0x00000000 | |
| 150 sw v1, 0(v0) | |
| 151 | |
| 152 # DWR0 | |
| 153 la v0, 0xffff8008 | |
| 154 la v1, 0x00000000 | |
| 155 sw v1, 0(v0) | |
| 156 | |
| 157 # DREFC - Depends on clock requency | |
| 158 la v0, 0xffff8800 | |
| 159 la v1, DRAM_DREFC_INIT | |
| 160 sw v1, 0(v0) | |
| 161 | |
| 162 #endif | |
| 163 | |
| 164 .endm | |
| 165 #endif | |
| 166 | |
| 167 #endif | |
| 168 | |
| 169 ##----------------------------------------------------------------------------- | |
| 170 ## TX39 interrupt handling. | |
| 171 | |
| 172 #ifndef CYGPKG_HAL_MIPS_INTC_DEFINED | |
| 173 | |
| 174 #ifdef CYGPKG_HAL_MIPS_TX3904 | |
| 175 | |
| 176 # Set all ILRX registers to 0, masking all external interrupts. | |
| 177 .macro hal_intc_init | |
| 178 la v0,0xFFFFC010 | |
| 179 move v1,zero | |
| 180 sw v1,0(v0) | |
| 181 sw v1,4(v0) | |
| 182 sw v1,8(v0) | |
| 183 sw v1,12(v0) | |
| 184 .endm | |
| 185 | |
| 186 .macro hal_intc_decode vnum | |
| 187 mfc0 v1,cause # get cause register | |
| 188 nop | |
| 189 srl v1,v1,10 # shift IP bits to ls bits | |
| 190 andi v1,v1,0x7F # isolate IP bits | |
| 191 la v0,hal_intc_translation_table # address of translation table | |
| 192 add v0,v0,v1 # offset of index byte | |
| 193 lb \vnum,0(v0) # load it | |
| 194 .endm | |
| 195 | |
| 196 | |
| 197 # This table translates from the 6 bit value supplied in the IP bits | |
| 198 # of the cause register into a 0..16 offset into the ISR tables. | |
| 199 .macro hal_intc_decode_data | |
| 200 hal_intc_translation_table: | |
| 201 .byte 0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 | |
| 202 .byte 0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 | |
| 203 .byte 16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16 | |
| 204 .byte 16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16 | |
| 205 .endm | |
| 206 | |
| 207 #define CYGPKG_HAL_MIPS_INTC_DEFINED | |
| 208 | |
| 209 #else | |
| 210 | |
| 211 #error Unknown TX39 variant | |
| 212 | |
| 213 #endif | |
| 214 | |
| 215 #endif | |
| 216 | |
| 217 #------------------------------------------------------------------------------ | |
| 218 # Diagnostics macros. | |
| 219 | |
| 220 #if 0 | |
| 221 #ifndef CYGPKG_HAL_MIPS_DIAG_DEFINED | |
| 222 | |
| 223 # Set up PIO0 for debugging output | |
| 224 .macro hal_diag_init | |
| 225 la v0,0xfffff500 | |
| 226 la v1,0xff | |
| 227 sb v1,0(v0) | |
| 228 la v1,0 | |
| 229 sb v1,4(v0) | |
| 230 .endm | |
| 231 | |
| 232 #define CYGPKG_HAL_MIPS_DIAG_DEFINED | |
| 233 | |
| 234 #endif | |
| 235 #endif | |
| 236 | |
| 237 #------------------------------------------------------------------------------ | |
| 238 #endif // ifndef CYGONCE_HAL_IMPL_INC | |
| 239 # end of impl.inc |
