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comparison packages/hal/mips/tx39/current/include/var_cache.h @ 130:eb9fd8c04db3 ecos-sw-2000-10-23

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Merge from eCos master repository on 2000-10-23-17:01:37-BST
author jlarmour
date Mon, 23 Oct 2000 17:10:57 +0000
parents bf00f99aec69
children e0c0827131d1
comparison
equal deleted inserted replaced
129:605a0fc6f385 130:eb9fd8c04db3
115 // knowing what is in it. This is annoying. So, the best we can do is 115 // knowing what is in it. This is annoying. So, the best we can do is
116 // fill the cache with data that is unlikely to be there 116 // fill the cache with data that is unlikely to be there
117 // otherwise. Hence we read bytes from the ROM space since this is 117 // otherwise. Hence we read bytes from the ROM space since this is
118 // most likely to be code, and will not get out of sync even if it is not. 118 // most likely to be code, and will not get out of sync even if it is not.
119 #define HAL_DCACHE_INVALIDATE_ALL_DEFINED 119 #define HAL_DCACHE_INVALIDATE_ALL_DEFINED
120 #define HAL_DCACHE_INVALIDATE_ALL() \ 120 #define HAL_DCACHE_INVALIDATE_ALL() \
121 { \ 121 { \
122 CYG_BYTE volatile *addr = (CYG_BYTE *)(0x9fc00000); \ 122 volatile CYG_BYTE *addr = (CYG_BYTE *)(0x9fc00000); \
123 CYG_BYTE volatile tmp = 0; \ 123 volatile CYG_BYTE tmp = 0; \
124 int i; \ 124 int i; \
125 for( i = 0; i < (HAL_DCACHE_SIZE*2); i += HAL_DCACHE_LINE_SIZE ) \ 125 for( i = 0; i < (HAL_DCACHE_SIZE*2); i += HAL_DCACHE_LINE_SIZE ) \
126 { \ 126 { \
127 tmp = addr[i]; \ 127 tmp = addr[i]; \
128 } \ 128 } \
129 } 129 }
130 130
131 // Synchronize the contents of the cache with memory. 131 // Synchronize the contents of the cache with memory.
132 #define HAL_DCACHE_SYNC_DEFINED 132 #define HAL_DCACHE_SYNC_DEFINED
133 #define HAL_DCACHE_SYNC() HAL_DCACHE_INVALIDATE_ALL() 133 #define HAL_DCACHE_SYNC() HAL_DCACHE_INVALIDATE_ALL()