Mercurial > flash_v2
diff packages/hal/sh/arch/current/ChangeLog @ 76:435cced73e2f ecos-v1_3_1-release
eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
| author | jlarmour |
|---|---|
| date | Tue, 28 Mar 2000 14:10:45 +0000 |
| parents | |
| children | 59d97b6ba612 |
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new file mode 100644 --- /dev/null +++ b/packages/hal/sh/arch/current/ChangeLog @@ -0,0 +1,362 @@ +2000-03-20 Jesper Skov <jskov@redhat.com> + + * src/hal_mk_defs.c: Added CYGNUM_HAL_VSR_EXCEPTION_COUNT + +2000-03-03 Jonathan Larmour <jlarmour@redhat.co.uk> + + * include/sh_stub.h: Make C++ safe + +2000-02-28 Jesper Skov <jskov@redhat.com> + + * src/vectors.S: + * src/hal_mk_defs.c: + * src/context.S: + * include/hal_arch.h: + * cdl/hal_sh.cdl: + Added hal_mk_defs allowing assembly to use C symbols. + Cleaned up setjmp/longjmp structure. + + * include/arch.inc: Added interrupt macros. + * src/vectors.S: Leave interrupt enable to interrupt_end, ensuring + proper use of interrupt_stack. Use range-checking instead of + counter for switches to interrupt_stack. + * src/context.S: Save and restore interrupt state on thread + switches. + * include/hal_arch.h: Set thread initial SR state to allow + interrupts. + +2000-02-18 Jesper Skov <jskov@redhat.com> + + * src/context.S: Fix comment character. + +2000-02-16 Jesper Skov <jskov@redhat.com> + + * cdl/hal_sh.cdl: + * include/basetype.h: + Added LE support. + +2000-02-15 Jesper Skov <jskov@redhat.com> + + * src/vectors.S: Leave vector initialization to platform. Get rid + of stubs startup type. + + * src/sh.ld: Define hal_vsr_table address. + + * include/hal_intr.h: provide CYGNUM_HAL_VSR_EXCEPTION_COUNT. + +2000-01-24 Jesper Skov <jskov@cygnus.co.uk> + + * src/vectors.S (__interrupt_stack): Remove stubs config check for + CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK. + +1999-12-21 Jonathan Larmour <jlarmour@cygnus.co.uk> + + * include/hal_cache.h: Rename CYG_HAL_SH_SH7708 -> + CYGPKG_HAL_SH_EDK7708 + + * include/sh_regs.h: Likewise + + * src/vectors.S: Likewise + Rename CYG_HAL_USE_ROM_MONITOR_GDB_STUBS -> + CYGSEM_HAL_USE_ROM_MONITOR_GDB_stubs + +1999-12-02 John Dallaway <jld@cygnus.co.uk> + + * cdl/hal_sh.cdl: + + Use the <PACKAGE> token in custom rules. + +1999-12-01 John Dallaway <jld@cygnus.co.uk> + + * cdl/hal_sh.cdl: + + Use the <PREFIX> token in custom rules. + +1999-11-04 John Dallaway <jld@cygnus.co.uk> + + * cdl/hal_sh.cdl: + + Output custom rule dependency information to .deps files in + the current directory. + + Dispense with the need to create a 'src' sub-directory. + +1999-10-29 Jesper Skov <jskov@cygnus.co.uk> + + * cdl/hal_sh.cdl: Added. + +1999-09-01 Jesper Skov <jskov@cygnus.co.uk> + + * include/sh_regs.h: Added watchdog registers. + +1999-07-30 Jesper Skov <jskov@cygnus.co.uk> + + * src/sh_stub.c (__single_step): Added handling of bt/s and bf/s. + +1999-07-12 Jesper Skov <jskov@lassi.cygnus.co.uk> + + * src/sh_stub.c: Use UCOND_RBR_MASK instead of BRAF_MASK. + +1999-07-05 Jesper Skov <jskov@cygnus.co.uk> + + * src/sh_stub.c (__single_step): And of bsrf. + +1999-07-02 Jesper Skov <jskov@cygnus.co.uk> + + * src/sh_stub.c (__single_step): Added handling of braf + instruction. + +1999-06-25 Jesper Skov <jskov@cygnus.co.uk> + + * src/vectors.S (__startup_stack): Increased size to allow the + twothreads example to run. + +1999-06-24 Jesper Skov <jskov@cygnus.co.uk> + + * src/vectors.S: CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS overrides use + of stubs in ROM. + + * src/sh_stub.c (__computeSignal): Renamed _IO_ vectors to _DATA_. + +1999-06-21 Jesper Skov <jskov@cygnus.co.uk> + PR 20200 + * include/hal_intr.h: Renamed _IO_ error vectors to _DATA_. + + * src/vectors.S: Increased size of startup stack. + +1999-06-08 Jesper Skov <jskov@cygnus.co.uk> + + * include/pkgconf/hal_sh.h: Added CDL for + CYGHWR_HAL_SH_HANDLE_SPURIOUS_INTERRUPTS. + + * src/vectors.S: + * include/hal_intr.h: + Decode exceptions before the VSR level. + +1999-06-02 Jesper Skov <jskov@cygnus.co.uk> + + * src/vectors.S: Cleaned up the interrupt entry/exit code. + Made it have consistent register-bank usage. + +1999-06-01 Jesper Skov <jskov@cygnus.co.uk> + + * src/context.S (hal_thread_switch_context): Save PC when thread + debugging enabled. + + * src/vectors.S: + * include/hal_arch.h: + * include/sh.inc: + Added handling of VBR and GBR. + + * include/hal_intr.h: + * src/vectors.S: + Added proper handling of nested interrupts. + + * src/vectors.S (__interrupt): Added handling of spurious event=0 + interrupts. + +1999-05-31 Jesper Skov <jskov@cygnus.co.uk> + + * src/vectors.S: Fixed comment. + + * include/sh_sci.inl (cyg_hal_gdb_isr): Alter CR using the proper + mask. + + * include/hal_cache.h (HAL_UCACHE_WRITE_MODE): Fixed typo. + + * src/hal_misc.c (cyg_hal_enable_caches): Enable write-back mode. + + * src/sh_stub.c (__computeSignal): + Added proper cause->signal decoding. + + * src/sh_stub.c: + * src/hal_misc.c: + * include/hal_intr.h: + * include/hal_arch.h: + Cleaned up some FIX MEs. + + * include/sh_regs.h: Added CYGARC_REG_SCSSR_CLEARMASK. + +1999-05-28 Jesper Skov <jskov@cygnus.co.uk> + + * include/hal_arch.h: + * src/vectors.S: + Fixed stack size macros. + +1999-05-27 Jesper Skov <jskov@cygnus.co.uk> + + * include/hal_cache.h: Include io and register header files. + + * include/hal_intr.h: + * src/vectors.S (_hal_interrupt_stack_call_pending_DSRs): + Added DSR-calls-on-interrupt-stack support. + +1999-05-27 Jesper Skov <jskov@cygnus.co.uk> + + * include/hal_cache.h: Force cache macros to use registers, or + they fail when compiled without optimization. + +1999-05-26 Jesper Skov <jskov@cygnus.co.uk> + + * include/hal_intr.h: + Fix asm constraints. + + * src/vectors.S: Fixed cyg_instrument call. + Added forgotten delay-slot nop after bra. + +1999-05-26 Jesper Skov <jskov@cygnus.co.uk> + + * include/sh_regs.h: Added some more baud rate values. + +1999-05-25 Jesper Skov <jskov@cygnus.co.uk> + + * src/vectors.S: Get ISR count from hal_intr.h. + Define regions of interrupt/exception handlers that are debugging + safe. + + * include/hal_intr.h: Split in two parts - top is assembly safe. + +1999-05-24 Jesper Skov <jskov@cygnus.co.uk> + + * src/hal_misc.c (cyg_hal_enable_caches): Disable writeback for + now. + + * include/hal_cache.h: + Fixed typos and compiler warnings. + + * src/hal_misc.c: + Renamed BCACHE to U(nified)CACHE. + +1999-05-24 Jesper Skov <jskov@cygnus.co.uk> + + * include/sh_regs.h: Added cache register definitions. + + * include/hal_cache.h: Defined cache macros. + + * src/hal_misc.c (cyg_hal_enable_caches): Use BCACHE macros. + + * src/vectors.S (_start): Call cache init function. + + * include/hal_intr.h: Ignore reserved vectors when accessed by ISR + macros. + (HAL_CLOCK_INITIALIZE): Removed hack that made clock run at 1/4 speed. + + * include/hal_arch.h: + * src/context.S: + Implemented setjmp/longjmp functions. + +1999-05-21 Jesper Skov <jskov@cygnus.co.uk> + + * src/sh.ld: Fix _stext/_etext naming. + + * include/hal_intr.h: Added missing interrupt sources. + + * include/sh_sci.inl: Added GDB_BREAK support. + + * src/vectors.S (__default_interrupt_vsr): Added GDB_BREAK + support. + Fixed register overwrite. + Set SR on exception/interrupt entry to allow breakpoints in + handlers. + +1999-05-21 Jesper Skov <jskov@cygnus.co.uk> + + * src/vectors.S: Added support for handling of exceptions by stub + in ROM. + + * include/sh_sci.inl (init_serial): Added comment. + + * src/vectors.S (_cyg_interrupt_stack_base, _cyg_interrupt_stack): + Fixed naming. + + * src/context.S: Removed MINIMUM_CONTEXT handling as it was + flawed. A better version doesn't save many cycles. + +1999-05-21 Hugo Tyson <hmt@cygnus.co.uk> + + * include/hal_intr.h: Define HAL_INTERRUPT_STACK_BASE and + HAL_INTERRUPT_STACK_TOP so that stack usage macros in + kernel/.../stackmon.hxx can work. + + * src/vectors.S (cyg_interrupt_stack_base): Define this symbol for + the interrupt stack and its friend for the stack top so that we + can publish them with nice names. + +1999-05-21 Jesper Skov <jskov@cygnus.co.uk> + + * src/vectors.S (__default_exception_vsr): Decode cause of + exception. + + * src/sh_stub.c (__clear_single_step): Let fixup code handle PC + decrementing. + + * include/sh_stub.h: Fix PC after a trap instruction was hit. + +1999-05-21 Jesper Skov <jskov@cygnus.co.uk> + + * src/vectors.S: + * include/hal_intr.h: + Use IMASK to control interrupts rather than BL. + + * src/sh_stub.c: Added single step code. + Don't skip instructions when single stepping. + +1999-05-20 Jesper Skov <jskov@cygnus.co.uk> + + * src/vectors.S: Fixed errors due to trunk-move cleanup. + Added counter to debug code. Fixed bug in debug code(!). + Doubled startup stack size. + +1999-05-20 Jesper Skov <jskov@cygnus.co.uk> + + * Moved files to CVS trunk. + +1999-05-19 Jesper Skov <jskov@cygnus.co.uk> + + * src/vectors.S: Fixed comment. + + * include/sh_sci.inl: Set speed to 38400 when not RAM startup. + + * include/hal_arch.h: Enable interrupts before a trap. + +1999-05-19 Jesper Skov <jskov@cygnus.co.uk> + + * src/vectors.S (__reset): Added initial jump to get from address + 0 to ROM. + + * include/sh_regs.h: Added BSC register definitions. + +1999-05-19 Jesper Skov <jskov@cygnus.co.uk> + + * Most things working now. Will start keeping track of changes. + + +1999-04-22 Jesper Skov <jskov@lassi.cygnus.co.uk> + + * Set up directory structure. + +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//===========================================================================
