diff packages/io/serial/current/tests/ser_test_protocol.inl @ 32:5af43b635655 ecos-sw-1999-08-18

Merge from eCos master repository on 1999-08-18-15:20:01-BST
author jlarmour
date Wed, 18 Aug 1999 15:33:44 +0000
parents 641b639be825
children 29bc183297e1
line wrap: on
line diff
--- a/packages/io/serial/current/tests/ser_test_protocol.inl
+++ b/packages/io/serial/current/tests/ser_test_protocol.inl
@@ -74,6 +74,15 @@
 #  define TEST_TTY_DEV CYGDAT_IO_SERIAL_TTY_TTY2_DEV
 # endif
 #endif
+#if defined(CYGPKG_HAL_POWERPC_MBX)                          \
+    && defined(CYGPKG_HAL_QUICC)                 \
+    && defined(CYGPKG_IO_SERIAL_POWERPC_QUICC_SMC)                 \
+    && defined(CYGPKG_IO_SERIAL_POWERPC_QUICC_SMC_SMC1)
+# define TEST_SER_DEV CYGDAT_IO_SERIAL_POWERPC_QUICC_SMC_SMC1_NAME
+# if defined(CYGPKG_IO_SERIAL_TTY_TTY1)
+#  define TEST_TTY_DEV CYGDAT_IO_SERIAL_TTY_TTY1_DEV
+# endif
+#endif
 #if defined(CYGPKG_HAL_ARM_PID)                         \
     && defined(CYGPKG_IO_SERIAL_ARM_PID)                \
     && defined(CYGPKG_IO_SERIAL_ARM_PID_SERIAL0)
@@ -90,6 +99,14 @@
 #  define TEST_TTY_DEV CYGDAT_IO_SERIAL_TTY_TTY1_DEV
 # endif
 #endif
+#if defined(CYGPKG_HAL_ARM_CL7211)                         \
+    && defined(CYGPKG_IO_SERIAL_ARM_CL7211)                \
+    && defined(CYGPKG_IO_SERIAL_ARM_CL7211_SERIAL1)
+# define TEST_SER_DEV CYGDAT_IO_SERIAL_ARM_CL7211_SERIAL1_NAME
+# if defined(CYGPKG_IO_SERIAL_TTY_TTY1)
+#  define TEST_TTY_DEV CYGDAT_IO_SERIAL_TTY_TTY1_DEV
+# endif
+#endif
 #if defined(CYGPKG_HAL_MIPS_TX39_JMR3904)               \
     && defined(CYGPKG_IO_SERIAL_TX39_JMR3904)           \
     && defined(CYGPKG_IO_SERIAL_TX39_JMR3904_SERIAL0)
@@ -245,6 +262,7 @@ cyg_ser_cfg_t test_configs[] = {
     !defined(CYGPKG_HAL_ARM_PID) &&             \
     !defined(CYGPKG_HAL_ARM_AEB) &&             \
     !defined(CYGPKG_HAL_MN10300_STDEVAL1) &&    \
+    !defined(CYGPKG_HAL_ARM_CL7211) &&          \
     !defined(CYGPKG_HAL_SPARCLITE_SLEB)
     { CYGNUM_SERIAL_BAUD_115200, CYGNUM_SERIAL_WORD_LENGTH_8, 
       CYGNUM_SERIAL_STOP_1, CYGNUM_SERIAL_PARITY_NONE },