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diff packages/hal/sh/arch/current/src/vectors.S @ 130:eb9fd8c04db3 ecos-sw-2000-10-23

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Merge from eCos master repository on 2000-10-23-17:01:37-BST
author jlarmour
date Mon, 23 Oct 2000 17:10:57 +0000
parents 0c2b7be0d798
children 0ae0bc38e387
line wrap: on
line diff
--- a/packages/hal/sh/arch/current/src/vectors.S
+++ b/packages/hal/sh/arch/current/src/vectors.S
@@ -740,6 +740,44 @@ restore_state:
         mov     #13,r13
         mov     #14,r14
 #endif
+
+         bra    hal_hw_init
+          nop
+
+$nCYG_WTCSR:
+	.word	0xa500		! clear all CSR bits
+
+	.align	2
+
+$nCYG_SR:
+        .long   CYG_SR
+$CYGARC_REG_TSTR:
+        .long   CYGARC_REG_TSTR
+$CYGARC_REG_IPRA:
+        .long   CYGARC_REG_IPRA
+$CYGARC_REG_IPRB:
+        .long   CYGARC_REG_IPRB
+#ifdef CYGARC_SH_MOD_INTC_V2
+$CYGARC_REG_IPRC:
+        .long   CYGARC_REG_IPRC
+$CYGARC_REG_IPRD:
+        .long   CYGARC_REG_IPRD
+$CYGARC_REG_IPRE:
+        .long   CYGARC_REG_IPRE
+$CYGARC_REG_ICR1:
+        .long   CYGARC_REG_ICR1
+#endif
+#ifdef CYGARC_SH_MOD_INTC_V2
+$CYGARC_REG_IPRF:
+        .long   CYGARC_REG_IPRF
+$nCYG_ICR1_INIT:
+	.word	CYGARC_REG_ICR1_INIT
+	.align	2
+#endif
+$__reset:
+        .long   __reset
+	
+hal_hw_init:
         
         # Call platform specific hardware initialization
         # This may include memory controller initialization. It is not
@@ -748,7 +786,7 @@ restore_state:
 
         # Now copy necessary bits to RAM and jump to the VMA base
 
-#ifdef CYG_HAL_STARTUP_ROM
+#if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_SUBSETROMRAM)
 
         # Copy data from ROM to ram
         mov.l   $__rom_data_start,r3    ! r3 = rom start
@@ -764,6 +802,7 @@ 1:      mov.l   @r3+,r0                 
         bf      1b                      ! loop if not yet done
 2:
 
+
         # Jump to the proper VMA base of the code.
         mov.l   $_complete_setup,r0
         jmp     @r0
@@ -773,13 +812,14 @@ 2:
         .extern __rom_data_start
         .extern __ram_data_start
         .extern __ram_data_end
-
 $__rom_data_start:
         .long   __rom_data_start
 $__ram_data_start:
         .long   __ram_data_start
 $__ram_data_end:
         .long   __ram_data_end
+
+
 $_complete_setup:
         .long _complete_setup
 
@@ -818,39 +858,6 @@ 1:      mov.l   @r0+,r3                 
                 
 #endif
 
-$nCYG_WTCSR:
-	.word	0xa500		! clear all CSR bits
-
-	.align	2
-
-$nCYG_SR:
-        .long   CYG_SR
-$CYGARC_REG_TSTR:
-        .long   CYGARC_REG_TSTR
-$CYGARC_REG_IPRA:
-        .long   CYGARC_REG_IPRA
-$CYGARC_REG_IPRB:
-        .long   CYGARC_REG_IPRB
-#ifdef CYGARC_SH_MOD_INTC_V2
-$CYGARC_REG_IPRC:
-        .long   CYGARC_REG_IPRC
-$CYGARC_REG_IPRD:
-        .long   CYGARC_REG_IPRD
-$CYGARC_REG_IPRE:
-        .long   CYGARC_REG_IPRE
-$CYGARC_REG_ICR1:
-        .long   CYGARC_REG_ICR1
-#endif
-#ifdef CYGARC_SH_MOD_INTC_V2
-$CYGARC_REG_IPRF:
-        .long   CYGARC_REG_IPRF
-$nCYG_ICR1_INIT:
-	.word	CYGARC_REG_ICR1_INIT
-	.align	2
-#endif
-$__reset:
-        .long   __reset
-
 #-----------------------------------------------------------------------------
 # Complete target initialization and setup.
 # After this point we can use absolute addressing modes and access all the