# HG changeset patch
# User bartv
# Date 1042978728 0
# Node ID 0baabe6e08e044531346cd0da41ebab4a6b61e7a
# Parent  148c41b548dc18fb05767ae719a3a4f2e6e6a627
Minor clean ups to cope with a more finicky SH assembler

diff --git a/packages/hal/sh/cq7708/current/ChangeLog b/packages/hal/sh/cq7708/current/ChangeLog
--- a/packages/hal/sh/cq7708/current/ChangeLog
+++ b/packages/hal/sh/cq7708/current/ChangeLog
@@ -1,3 +1,7 @@
+2003-01-19  Bart Veer  <bartv@ecoscentric.com>
+
+	* include/platform.inc: avoid warnings with binutils 2.13.1
+
 2002-05-13  Jesper Skov  <jskov@redhat.com>
 
 	* cdl/hal_sh_sh7708_cq7708.cdl: Removed implemntation of
@@ -122,6 +126,7 @@ 2000-03-30  Haruki Kashiwaya  <kashiwaya
 //####ECOSGPLCOPYRIGHTBEGIN####
 // -------------------------------------------
 // This file is part of eCos, the Embedded Configurable Operating System.
+// Copyright (C) 2003 Bart Veer	
 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
 //
 // eCos is free software; you can redistribute it and/or modify it under
diff --git a/packages/hal/sh/cq7708/current/include/platform.inc b/packages/hal/sh/cq7708/current/include/platform.inc
--- a/packages/hal/sh/cq7708/current/include/platform.inc
+++ b/packages/hal/sh/cq7708/current/include/platform.inc
@@ -10,6 +10,7 @@
 #####ECOSGPLCOPYRIGHTBEGIN####
 ## -------------------------------------------
 ## This file is part of eCos, the Embedded Configurable Operating System.
+## Copyright (C) 2003 Bart Veer
 ## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
 ##
 ## eCos is free software; you can redistribute it and/or modify it under
@@ -81,29 +82,29 @@ 1:      mov.w    @r3+,r0                
 BSC_settings_table:
         # These are the settings set by the ROM Monitor.
 
-	.word   CYGARC_REG_FRQCR
+	.word   (CYGARC_REG_FRQCR & 0x0000FFFF)
 	.word   CYGARC_REG_FRQCR_INIT
 
         # BCR1: Areas 3 are SDRAM
-        .word   CYGARC_REG_BCR1
+        .word   (CYGARC_REG_BCR1 & 0x0000FFFF)
         .word   0x0010
         # BCR2: Bus size of areas 2,4 are 8 bits
-        .word   CYGARC_REG_BCR2
+        .word   (CYGARC_REG_BCR2 & 0x0000FFFF)
         .word   0x3ddc
         # WCR1: 3 wait-state cycles inserted for all areas
-        .word   CYGARC_REG_WCR1
+        .word   (CYGARC_REG_WCR1 & 0x0000FFFF)
         .word   0x3fff
         # WCR2: cs0=8wait cs1=0wait cs2=0wait cs3=2wait cs4=4wait */
-        .word   CYGARC_REG_WCR2
+        .word   (CYGARC_REG_WCR2 & 0x0000FFFF)
         .word   0x0246
         # MCR:  dram setting 10 bit
-        .word   CYGARC_REG_MCR
+        .word   (CYGARC_REG_MCR & 0x0000FFFF)
         .word   0x0074
         # RTCSR: refresh timer control
-        .word   CYGARC_REG_RTCSR
+        .word   (CYGARC_REG_RTCSR & 0x0000FFFF)
         .word   (0xa500 | 0x0010)
         # RTCOR: refresh time constant
-        .word   CYGARC_REG_RTCOR
+        .word   (CYGARC_REG_RTCOR & 0x0000FFFF)
         .word   (0xa500 | 0x003a)
         
         # Table end
diff --git a/packages/hal/sh/edk7708/current/ChangeLog b/packages/hal/sh/edk7708/current/ChangeLog
--- a/packages/hal/sh/edk7708/current/ChangeLog
+++ b/packages/hal/sh/edk7708/current/ChangeLog
@@ -1,3 +1,8 @@
+2003-01-19  Bart Veer  <bartv@ecoscentric.com>
+
+	* include/platform.inc (BSC_settings_table):
+	Avoid warnings with binutils 2.13.1
+
 2002-05-13  Jesper Skov  <jskov@redhat.com>
 
 	* cdl/hal_sh_edk7708.cdl: Removed implemntation of
@@ -398,6 +403,7 @@ 1999-04-22  Jesper Skov  <jskov@lassi.cy
 //####ECOSGPLCOPYRIGHTBEGIN####
 // -------------------------------------------
 // This file is part of eCos, the Embedded Configurable Operating System.
+// Copyright (C) Bart Veer	
 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
 //
 // eCos is free software; you can redistribute it and/or modify it under
diff --git a/packages/hal/sh/edk7708/current/include/platform.inc b/packages/hal/sh/edk7708/current/include/platform.inc
--- a/packages/hal/sh/edk7708/current/include/platform.inc
+++ b/packages/hal/sh/edk7708/current/include/platform.inc
@@ -10,6 +10,7 @@
 #####ECOSGPLCOPYRIGHTBEGIN####
 ## -------------------------------------------
 ## This file is part of eCos, the Embedded Configurable Operating System.
+## Copyright (C) 2003 Bart Veer
 ## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
 ##
 ## eCos is free software; you can redistribute it and/or modify it under
@@ -74,44 +75,44 @@ 1:      mov.w    @r3+,r0                
         bt       2f
         mov.w    @r3+,r1                // data
         bra      1b
-         mov.w    r1,@r0                // delay slot
+        mov.w    r1,@r0                // delay slot
 
         .align  2
 BSC_settings_table:
         # These are the settings set by the Hitachi ROM Monitor.
 
-	.word   CYGARC_REG_FRQCR
+	.word   (CYGARC_REG_FRQCR & 0x0000FFFF)
 	.word   CYGARC_REG_FRQCR_INIT
 
         # BCR2: Bus size of areas 1-6 to 32 bits
-        .word   CYGARC_REG_BCR2
+        .word   (CYGARC_REG_BCR2 & 0x0000FFFF)
         .word   0x3ffc
         # BCR1: Areas 2 and 3 are SDRAM
-        .word   CYGARC_REG_BCR1
+        .word   (CYGARC_REG_BCR1 & 0x0000FFFF)
         .word   0x080c
         # BCR2: Bus size of areas 1-6 to 32 bits [note: second write!]
-        .word   CYGARC_REG_BCR2
+        .word   (CYGARC_REG_BCR2 & 0x0000FFFF)
         .word   0x3ffc
         # WCR1: 3 wait-state cycles inserted for all areas
-        .word   CYGARC_REG_WCR1
+        .word   (CYGARC_REG_WCR1 & 0x0000FFFF)
         .word   0x3fff
         # WCR2: extra wait states and full pitch for burst
-        .word   CYGARC_REG_WCR2
+        .word   (CYGARC_REG_WCR2 & 0x0000FFFF)
         .word   0xffd7
         # MCR: RAS/CAS & burst timing area 2/3
-        .word   CYGARC_REG_MCR
+        .word   (CYGARC_REG_MCR & 0x0000FFFF)
         .word   0x963c
         # RTCNT: refresh counter (needs a5 in top byte to accept write)
-        .word   CYGARC_REG_RTCNT
+        .word   (CYGARC_REG_RTCNT & 0x0000FFFF)
         .word   (0xa500 | 0x0000)
         # RTCOR: refresh time constant (needs a5 in top byte to accept write)
-        .word   CYGARC_REG_RTCOR
+        .word   (CYGARC_REG_RTCOR & 0x0000FFFF)
         .word   (0xa500 | 0x003b)
         # RFCR:  refresh count register (needs a4 in top byte to accept write)
-        .word   CYGARC_REG_RFCR
+        .word   (CYGARC_REG_RFCR & 0x0000FFFF)
         .word   (0xa400 | 0x0000)
         # RTCSR: refresh timer control (needs a5 in top byte to accept write)
-        .word   CYGARC_REG_RTCSR
+        .word   (CYGARC_REG_RTCSR & 0x0000FFFF)
         .word   (0xa500 | 0x0008)
 
         # Set SDMR to 0x220
diff --git a/packages/hal/sh/sh3/current/ChangeLog b/packages/hal/sh/sh3/current/ChangeLog
--- a/packages/hal/sh/sh3/current/ChangeLog
+++ b/packages/hal/sh/sh3/current/ChangeLog
@@ -1,3 +1,9 @@
+2003-01-18  Bart Veer  <bartv@ecoscentric.com>
+
+	* src/variant.S, include/variant.inc:
+	Cope with binutils 2.13.1, gas is morefinicky about immediate
+	constants.
+
 2002-08-06  Gary Thomas  <gary@chez-thomas.org>
 2002-08-06  Motoya Kurotsu <kurotsu@allied-telesis.co.jp>	
 
@@ -200,6 +206,7 @@ 2000-08-15  Haruki Kashiwaya  <kashiwaya
 //####ECOSGPLCOPYRIGHTBEGIN####
 // -------------------------------------------
 // This file is part of eCos, the Embedded Configurable Operating System.
+// Copyright (C) 2003 Bart Veer	
 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
 //
 // eCos is free software; you can redistribute it and/or modify it under
diff --git a/packages/hal/sh/sh3/current/include/variant.inc b/packages/hal/sh/sh3/current/include/variant.inc
--- a/packages/hal/sh/sh3/current/include/variant.inc
+++ b/packages/hal/sh/sh3/current/include/variant.inc
@@ -10,6 +10,7 @@
 #####ECOSGPLCOPYRIGHTBEGIN####
 ## -------------------------------------------
 ## This file is part of eCos, the Embedded Configurable Operating System.
+## Copyright (C) 2003 Bart Veer
 ## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
 ##
 ## eCos is free software; you can redistribute it and/or modify it under
@@ -84,15 +85,15 @@
         mov.l   $nCYG_SR,r1             ! Put CPU in a well-known state
         ldc     r1,sr
         mov     #0,r0
-        mov     #CYGARC_REG_CCR,r1      ! Disable cache
+        mov     #CYGARC_REG_CCR & 0x0FF,r1      ! Disable cache
         mov.l   r0,@r1
-        mov     #CYGARC_REG_MMUCR,r1    ! Disable MMU
+        mov     #CYGARC_REG_MMUCR & 0x0FF,r1    ! Disable MMU
         mov.l   r0,@r1
-        mov     #CYGARC_REG_BBRA,r1     ! Disable UBC Channel A
+        mov     #CYGARC_REG_BBRA & 0x0FF,r1     ! Disable UBC Channel A
         mov.w   r0,@r1
-        mov     #CYGARC_REG_BBRB,r1     ! Disable UBC Channel B
+        mov     #CYGARC_REG_BBRB & 0x0FF,r1     ! Disable UBC Channel B
         mov.w   r0,@r1
-        mov     #CYGARC_REG_BRCR,r1     ! Reset UBC common register
+        mov     #CYGARC_REG_BRCR & 0x0FF,r1     ! Reset UBC common register
         mov.w   r0,@r1
         mov.l   $CYGARC_REG_TSTR,r1     ! Disable timers
         mov.b   r0,@r1
@@ -116,7 +117,7 @@
         mov.w   r0,@r1
 #endif
 	mov.w	$nCYG_WTCSR,r0          ! Clear watchdog
-	mov	#CYGARC_REG_WTCSR,r1
+	mov	#CYGARC_REG_WTCSR & 0x0FF,r1
 	mov.w	r0,@r1
 
         # Initialize VBR if necessary
diff --git a/packages/hal/sh/sh3/current/src/variant.S b/packages/hal/sh/sh3/current/src/variant.S
--- a/packages/hal/sh/sh3/current/src/variant.S
+++ b/packages/hal/sh/sh3/current/src/variant.S
@@ -8,6 +8,7 @@
 #####ECOSGPLCOPYRIGHTBEGIN####
 ## -------------------------------------------
 ## This file is part of eCos, the Embedded Configurable Operating System.
+## Copyright (C) 2003 Bart Veer        
 ## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
 ##
 ## eCos is free software; you can redistribute it and/or modify it under
@@ -78,7 +79,7 @@ 10:
 
 FUNC_START(cyg_hal_cache_enable)
         GOTO_NONCACHED_SHADOW
-        mov     #CYGARC_REG_CCR,r1
+        mov     #CYGARC_REG_CCR & 0x0FF,r1
         mov.l   @r1,r0
         mov     #CYGARC_REG_CCR_CE,r2
         or      r2,r0
@@ -89,7 +90,7 @@ FUNC_START(cyg_hal_cache_enable)
 
 FUNC_START(cyg_hal_cache_disable)
         GOTO_NONCACHED_SHADOW
-        mov     #CYGARC_REG_CCR,r1
+        mov     #CYGARC_REG_CCR & 0x0FF,r1
         mov.l   @r1,r0
         mov     #CYGARC_REG_CCR_CE,r2
         not     r2,r2
@@ -101,7 +102,7 @@ FUNC_START(cyg_hal_cache_disable)
         
 FUNC_START(cyg_hal_cache_invalidate_all)
         GOTO_NONCACHED_SHADOW
-        mov     #CYGARC_REG_CCR,r1
+        mov     #CYGARC_REG_CCR & 0x0FF,r1
         mov.l   @r1,r0
         mov     #CYGARC_REG_CCR_CF,r2
         or      r2,r0
@@ -168,7 +169,7 @@ FUNC_START(cyg_hal_cache_write_mode)
         GOTO_NONCACHED_SHADOW
         # Mode argument in r4.
         # Read current state and mask out the two caching mode bits
-        mov     #CYGARC_REG_CCR,r1
+        mov     #CYGARC_REG_CCR & 0x0FF,r1
         mov.l   @r1,r3
         mov     #CYGARC_REG_CCR_CB|CYGARC_REG_CCR_WT,r2
 	and	r2,r4