# HG changeset patch
# User gthomas
# Date 1063032935 0
# Node ID 5cc8707c7bc118533ef4d743a91221c60bf75026
# Parent  0e41ddaf36fe1125f60fe32302d8b81329dab7d8
Fix baud rate calculations

diff --git a/packages/devs/serial/powerpc/quicc/current/ChangeLog b/packages/devs/serial/powerpc/quicc/current/ChangeLog
--- a/packages/devs/serial/powerpc/quicc/current/ChangeLog
+++ b/packages/devs/serial/powerpc/quicc/current/ChangeLog
@@ -1,3 +1,8 @@
+2003-09-08  Gary Thomas  <gary@mlbassoc.com>
+
+	* src/quicc_smc_serial.h: Fix baud rate clock setup - was off by 1.
+	Reported by Tord Andersson <Tord.Andersson@combitechsystems.com>
+
 2003-03-31  Gary Thomas  <gary@mlbassoc.com>
 
 	* src/quicc_smc_serial.c (quicc_sxx_serial_init): Handle SCC3 on
diff --git a/packages/devs/serial/powerpc/quicc/current/src/quicc_smc_serial.h b/packages/devs/serial/powerpc/quicc/current/src/quicc_smc_serial.h
--- a/packages/devs/serial/powerpc/quicc/current/src/quicc_smc_serial.h
+++ b/packages/devs/serial/powerpc/quicc/current/src/quicc_smc_serial.h
@@ -130,7 +130,7 @@ static cyg_int32 select_baud[] = {
     0,      // 230400
 };
 
-#define UART_BITRATE(n) (((CYGHWR_HAL_POWERPC_BOARD_SPEED*1000000)/16)/n)
+#define UART_BITRATE(n) ((((CYGHWR_HAL_POWERPC_BOARD_SPEED*1000000)/16)/n)-1)
 #define UART_SLOW_BITRATE(n) ((CYGHWR_HAL_POWERPC_BOARD_SPEED*1000000)/n))
 
 // Channel type select
diff --git a/packages/devs/serial/powerpc/quicc2/current/ChangeLog b/packages/devs/serial/powerpc/quicc2/current/ChangeLog
--- a/packages/devs/serial/powerpc/quicc2/current/ChangeLog
+++ b/packages/devs/serial/powerpc/quicc2/current/ChangeLog
@@ -1,3 +1,8 @@
+2003-09-08  Gary Thomas  <gary@mlbassoc.com>
+
+	* src/quicc2_scc_serial.h: Fix baud rate clock setup - was off by 1.
+	Reported by Tord Andersson <Tord.Andersson@combitechsystems.com>
+
 2003-02-24  Jonathan Larmour  <jifl@eCosCentric.com>
 
 	* cdl/ser_quicc2_scc.cdl: Remove irrelevant doc link.
diff --git a/packages/devs/serial/powerpc/quicc2/current/src/quicc2_scc_serial.h b/packages/devs/serial/powerpc/quicc2/current/src/quicc2_scc_serial.h
--- a/packages/devs/serial/powerpc/quicc2/current/src/quicc2_scc_serial.h
+++ b/packages/devs/serial/powerpc/quicc2/current/src/quicc2_scc_serial.h
@@ -60,7 +60,7 @@
 #define ALIGN_TO_CACHELINES(b) ((cyg_uint8 *)(((CYG_ADDRESS)(b) + (HAL_DCACHE_LINE_SIZE-1)) & ~(HAL_DCACHE_LINE_SIZE-1)))
 
 #define UART_BIT_RATE(n) \
-    (((int)(CYGHWR_HAL_POWERPC_BOARD_SPEED*1000000))/(n * 64))
+    ((((int)(CYGHWR_HAL_POWERPC_BOARD_SPEED*1000000))/(n * 64))-1)
 
 // SCC PSMR masks ....
 #define QUICC2_SCC_PSMR_ASYNC     0x8000
diff --git a/packages/hal/powerpc/mpc8xxx/current/ChangeLog b/packages/hal/powerpc/mpc8xxx/current/ChangeLog
--- a/packages/hal/powerpc/mpc8xxx/current/ChangeLog
+++ b/packages/hal/powerpc/mpc8xxx/current/ChangeLog
@@ -1,3 +1,8 @@
+2003-09-08  Gary Thomas  <gary@mlbassoc.com>
+
+	* src/quicc2_diag.c: Fix baud rate clock setup - was off by 1.
+	Reported by Tord Andersson <Tord.Andersson@combitechsystems.com>
+
 2003-08-26  Gary Thomas  <gary@mlbassoc.com>
 
 	* include/mpc8xxx.h: Flesh out PCI definitions.
diff --git a/packages/hal/powerpc/mpc8xxx/current/src/quicc2_diag.c b/packages/hal/powerpc/mpc8xxx/current/src/quicc2_diag.c
--- a/packages/hal/powerpc/mpc8xxx/current/src/quicc2_diag.c
+++ b/packages/hal/powerpc/mpc8xxx/current/src/quicc2_diag.c
@@ -118,7 +118,7 @@ static struct port_info ports[] = {
 // For Baud Rate Calculation, see MPC8260 PowerQUICC II User's Manual
 // 16.3 UART Baud Rate Examples, page 16-5.
 #define UART_BIT_RATE(n) \
-    (((int)(((CYGHWR_HAL_POWERPC_CPM_SPEED*2)*1000000)/16))/(n * 16))
+    ((((int)(((CYGHWR_HAL_POWERPC_CPM_SPEED*2)*1000000)/16))/(n * 16))-1)
 #define UART_BAUD_RATE CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_BAUD
 
 
diff --git a/packages/hal/powerpc/quicc/current/ChangeLog b/packages/hal/powerpc/quicc/current/ChangeLog
--- a/packages/hal/powerpc/quicc/current/ChangeLog
+++ b/packages/hal/powerpc/quicc/current/ChangeLog
@@ -1,3 +1,8 @@
+2003-09-08  Gary Thomas  <gary@mlbassoc.com>
+
+	* src/quicc_smc1.c: Fix baud rate clock setup - was off by 1.
+	Reported by Tord Andersson <Tord.Andersson@combitechsystems.com>
+
 2003-03-31  Gary Thomas  <gary@mlbassoc.com>
 
 	* src/quicc_smc1.c (cyg_hal_sccx_init_channel): Proper handling
diff --git a/packages/hal/powerpc/quicc/current/src/quicc_smc1.c b/packages/hal/powerpc/quicc/current/src/quicc_smc1.c
--- a/packages/hal/powerpc/quicc/current/src/quicc_smc1.c
+++ b/packages/hal/powerpc/quicc/current/src/quicc_smc1.c
@@ -73,7 +73,7 @@
 #include <cyg/hal/drv_api.h>            // CYG_ISR_HANDLED
 #include <string.h>                     // memset
 
-#define UART_BIT_RATE(n) (((int)(CYGHWR_HAL_POWERPC_BOARD_SPEED*1000000)/16)/n)
+#define UART_BIT_RATE(n) ((((int)(CYGHWR_HAL_POWERPC_BOARD_SPEED*1000000)/16)/n)-1)
 #define UART_BAUD_RATE CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_BAUD
 
 // Note: buffers will be placed just after descriptors