# HG changeset patch
# User gthomas
# Date 1034367868 0
# Node ID 5fb39527fe00f351f48be270885eb367f2650311
# Parent  5b4cd8e2de16442db43c5c382f4fb684a31e2f2b
Fix from Wolfgang Heppner - cache usage, BD offsets

diff --git a/packages/devs/eth/powerpc/fec/current/ChangeLog b/packages/devs/eth/powerpc/fec/current/ChangeLog
--- a/packages/devs/eth/powerpc/fec/current/ChangeLog
+++ b/packages/devs/eth/powerpc/fec/current/ChangeLog
@@ -1,3 +1,10 @@
+2002-10-11  Gary Thomas  <gthomas@ecoscentric.com> [inspired by]
+2002-10-11  Wolfgang Heppner <hep@iis.fhg.de>	
+
+	* src/if_fec.c: 
+	* cdl/fec_eth_drivers.cdl: Make buffer descriptor use configurable.
+	Also, fix some issues where cache state wasn't being honored.
+
 2002-10-11  Gary Thomas  <gary@mlbassoc.com>
 
 	* src/if_fec.c: 
diff --git a/packages/devs/eth/powerpc/fec/current/cdl/fec_eth_drivers.cdl b/packages/devs/eth/powerpc/fec/current/cdl/fec_eth_drivers.cdl
--- a/packages/devs/eth/powerpc/fec/current/cdl/fec_eth_drivers.cdl
+++ b/packages/devs/eth/powerpc/fec/current/cdl/fec_eth_drivers.cdl
@@ -67,6 +67,15 @@ cdl_package CYGPKG_DEVS_ETH_POWERPC_FEC 
     description   "Fast ethernet driver for PowerPC MPC8xxT boards."
     compile       -library=libextras.a if_fec.c
 
+    cdl_option CYGNUM_DEVS_ETH_POWERPC_FEC_BD_OFFSET {
+        display       "Buffer descriptors offset in PRAM"
+        flavor        data
+        default_value 0x2C00
+        description   "
+            This option specifies the address of the buffer descriptors
+            used by the PowerPC FEC/ethernet device."
+    }
+
     cdl_option CYGNUM_DEVS_ETH_POWERPC_FEC_BUFSIZE {
         display       "Buffer size"
         flavor        data
diff --git a/packages/devs/eth/powerpc/fec/current/src/if_fec.c b/packages/devs/eth/powerpc/fec/current/src/if_fec.c
--- a/packages/devs/eth/powerpc/fec/current/src/if_fec.c
+++ b/packages/devs/eth/powerpc/fec/current/src/if_fec.c
@@ -159,6 +159,10 @@ static void          fec_eth_int(struct 
 #define FEC_ETH_RESET_PHY()
 #endif
 
+#ifndef FEC_EPPC_BD_OFFSET
+#define FEC_EPPC_BD_OFFSET CYGNUM_DEVS_ETH_POWERPC_FEC_BD_OFFSET
+#endif
+
 // LED activity [exclusive of hardware bits]
 #ifndef _get_led
 #define _get_led()  
@@ -263,7 +267,8 @@ fec_eth_reset(struct eth_drv_sc *sc, uns
 
     // Ensure consistent state between cache and what the FEC sees
     HAL_DCACHE_IS_ENABLED(cache_state);
-    HAL_DCACHE_SYNC();
+    if (cache_state)
+      HAL_DCACHE_SYNC();
     HAL_DCACHE_DISABLE();
 
     // Shut down ethernet controller, in case it is already running
@@ -285,7 +290,7 @@ fec_eth_reset(struct eth_drv_sc *sc, uns
 
 #define ROUNDUP(b,s) (((unsigned long)(b) + (s-1)) & ~(s-1))
 #ifdef FEC_USE_EPPC_BD
-    txbd = (struct fec_bd *)(0x2C00 + (cyg_uint32)eppc);
+    txbd = (struct fec_bd *)(FEC_EPPC_BD_OFFSET + (cyg_uint32)eppc);
     rxbd = &txbd[CYGNUM_DEVS_ETH_POWERPC_FEC_TxNUM];
 #else
     txbd = fec_eth_txring;
@@ -398,7 +403,8 @@ fec_eth_init(struct cyg_netdevtab_entry 
 
     // Ensure consistent state between cache and what the FEC sees
     HAL_DCACHE_IS_ENABLED(cache_state);
-    HAL_DCACHE_SYNC();
+    if (cache_state)
+      HAL_DCACHE_SYNC();
     HAL_DCACHE_DISABLE();
 
     qi->fec = fec;
@@ -520,6 +526,9 @@ fec_eth_init(struct cyg_netdevtab_entry 
     // Initialize upper level driver
     (sc->funs->eth_drv->init)(sc, (unsigned char *)&enaddr);
     
+    if (cache_state)
+      HAL_DCACHE_ENABLE();
+
     return true;
 }