# HG changeset patch # User msalter # Date 1037383520 0 # Node ID 63d0c56d82e847184025153f5b2e377291c9d120 # Parent 1a165a40f1569dfd51622dabe2fbb0c71e0ba301 mn10300/asb/asb2305 tweaks diff --git a/packages/NEWS b/packages/NEWS --- a/packages/NEWS +++ b/packages/NEWS @@ -1,3 +1,4 @@ +* Update MN10300 ASB2303 HAL to support RedBoot * New package for application level profiling (histogram only) * Support for NPWR Linux Engine (Xscale IOP310) from Team ASA * Support for Allied Telesyn TS1000 (PowerPC 855T based design) diff --git a/packages/hal/mn10300/am33/current/ChangeLog b/packages/hal/mn10300/am33/current/ChangeLog --- a/packages/hal/mn10300/am33/current/ChangeLog +++ b/packages/hal/mn10300/am33/current/ChangeLog @@ -1,3 +1,9 @@ +2002-11-15 Mark Salter + + * cdl/hal_mn10300_am33.cdl: Add options to control placement of + VSR and virtual vector tables. Platforms may override. + * src/mn10300_am33.ld: Use new cdl option values. + 2002-11-14 Mark Salter * include/var_intr.h (HAL_CLOCK_INITIALIZE): Save _period_ for diff --git a/packages/hal/mn10300/am33/current/cdl/hal_mn10300_am33.cdl b/packages/hal/mn10300/am33/current/cdl/hal_mn10300_am33.cdl --- a/packages/hal/mn10300/am33/current/cdl/hal_mn10300_am33.cdl +++ b/packages/hal/mn10300/am33/current/cdl/hal_mn10300_am33.cdl @@ -143,6 +143,26 @@ cdl_package CYGPKG_HAL_MN10300_AM33 { } } + cdl_option CYGHWR_HAL_MN10300_VSR_TABLE_BASE { + display "AM33 VSR table base address" + flavor data + calculated { CYGHWR_HAL_MN10300_PLATFORM_VSR_TABLE_BASE ? + CYGHWR_HAL_MN10300_PLATFORM_VSR_TABLE_BASE : \ + (CYGHWR_HAL_MN10300_AM33_REVISION > 1) ? 0x90000000 : 0x50000100 } + description " + Base address of the VSR table." + } + + cdl_option CYGHWR_HAL_MN10300_VV_TABLE_BASE { + display "AM33 Virtual Vectors table base address" + flavor data + calculated { CYGHWR_HAL_MN10300_PLATFORM_VV_TABLE_BASE ? + CYGHWR_HAL_MN10300_PLATFORM_VV_TABLE_BASE : \ + CYGHWR_HAL_MN10300_PLATFORM_VSR_TABLE_BASE + 0x100 } + description " + Base address of the virtual vectors table." + } + make { /lib/target.ld: /src/mn10300_am33.ld $(CC) -E -P -Wp,-MD,target.tmp -DEXTRAS=1 -xc $(INCLUDE_PATH) $(CFLAGS) -o $@ $< diff --git a/packages/hal/mn10300/am33/current/src/mn10300_am33.ld b/packages/hal/mn10300/am33/current/src/mn10300_am33.ld --- a/packages/hal/mn10300/am33/current/src/mn10300_am33.ld +++ b/packages/hal/mn10300/am33/current/src/mn10300_am33.ld @@ -129,22 +129,5 @@ GROUP(libtarget.a libgcc.a) #include CYGBLD_HAL_TARGET_H -#if CYGHWR_HAL_MN10300_AM33_REVISION == 1 - -#ifndef CYG_HAL_PLATFORM_HAL_VSR_TABLE_DEFINED -_hal_vsr_table = 0x50000100; -_hal_virtual_vector_table = 0x50000200; -#endif - -#elif CYGHWR_HAL_MN10300_AM33_REVISION == 2 - -#ifndef CYG_HAL_PLATFORM_HAL_VSR_TABLE_DEFINED -_hal_vsr_table = 0x90000000; -_hal_virtual_vector_table = 0x90000100; -#endif - -#else - -#error Unknown AM33 Revision - -#endif +_hal_vsr_table = CYGHWR_HAL_MN10300_VSR_TABLE_BASE; +_hal_virtual_vector_table = CYGHWR_HAL_MN10300_VV_TABLE_BASE; diff --git a/packages/hal/mn10300/asb/current/ChangeLog b/packages/hal/mn10300/asb/current/ChangeLog --- a/packages/hal/mn10300/asb/current/ChangeLog +++ b/packages/hal/mn10300/asb/current/ChangeLog @@ -1,3 +1,10 @@ +2002-11-15 Mark Salter + + * cdl/hal_mn10300_am33_asb.cdl: Override default VSR placement. + * include/pkgconf/mlt_mn10300_am33_asb_ram.ldi: Remove unneeded defines. + * include/pkgconf/mlt_mn10300_am33_asb_flash.ldi: Ditto. + * include/pkgconf/mlt_mn10300_am33_asb_rom.ldi: Ditto. + 2002-11-14 Mark Salter * src/plf_misc.c: Don't mess with TBR. diff --git a/packages/hal/mn10300/asb/current/cdl/hal_mn10300_am33_asb.cdl b/packages/hal/mn10300/asb/current/cdl/hal_mn10300_am33_asb.cdl --- a/packages/hal/mn10300/asb/current/cdl/hal_mn10300_am33_asb.cdl +++ b/packages/hal/mn10300/asb/current/cdl/hal_mn10300_am33_asb.cdl @@ -107,6 +107,14 @@ cdl_package CYGPKG_HAL_MN10300_AM33_ASB flavor data } + cdl_option CYGHWR_HAL_MN10300_PLATFORM_VSR_TABLE_BASE { + display "ASB2303 VSR table base address" + flavor data + default_value 0x8C000000 + description " + Base address of the VSR table on ASB2303 board." + } + cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_DEFAULT { display "Default console channel." flavor data diff --git a/packages/hal/mn10300/asb/current/include/pkgconf/mlt_mn10300_am33_asb_flash.ldi b/packages/hal/mn10300/asb/current/include/pkgconf/mlt_mn10300_am33_asb_flash.ldi --- a/packages/hal/mn10300/asb/current/include/pkgconf/mlt_mn10300_am33_asb_flash.ldi +++ b/packages/hal/mn10300/asb/current/include/pkgconf/mlt_mn10300_am33_asb_flash.ldi @@ -25,8 +25,3 @@ SECTIONS CYG_LABEL_DEFN(__heap1) = ALIGN (0x8); SECTIONS_END } - -#define CYG_HAL_PLATFORM_HAL_VSR_TABLE_DEFINED - -_hal_vsr_table = 0x8C000000; -_hal_virtual_vector_table = 0x8C000100; diff --git a/packages/hal/mn10300/asb/current/include/pkgconf/mlt_mn10300_am33_asb_ram.ldi b/packages/hal/mn10300/asb/current/include/pkgconf/mlt_mn10300_am33_asb_ram.ldi --- a/packages/hal/mn10300/asb/current/include/pkgconf/mlt_mn10300_am33_asb_ram.ldi +++ b/packages/hal/mn10300/asb/current/include/pkgconf/mlt_mn10300_am33_asb_ram.ldi @@ -25,7 +25,3 @@ SECTIONS SECTIONS_END } -#define CYG_HAL_PLATFORM_HAL_VSR_TABLE_DEFINED - -_hal_vsr_table = 0x8C000000; -_hal_virtual_vector_table = 0x8C000100; diff --git a/packages/hal/mn10300/asb/current/include/pkgconf/mlt_mn10300_am33_asb_rom.ldi b/packages/hal/mn10300/asb/current/include/pkgconf/mlt_mn10300_am33_asb_rom.ldi --- a/packages/hal/mn10300/asb/current/include/pkgconf/mlt_mn10300_am33_asb_rom.ldi +++ b/packages/hal/mn10300/asb/current/include/pkgconf/mlt_mn10300_am33_asb_rom.ldi @@ -26,7 +26,3 @@ SECTIONS SECTIONS_END } -#define CYG_HAL_PLATFORM_HAL_VSR_TABLE_DEFINED - -_hal_vsr_table = 0x8C000000; -_hal_virtual_vector_table = 0x8C000100; diff --git a/packages/hal/mn10300/asb2305/current/ChangeLog b/packages/hal/mn10300/asb2305/current/ChangeLog --- a/packages/hal/mn10300/asb2305/current/ChangeLog +++ b/packages/hal/mn10300/asb2305/current/ChangeLog @@ -1,3 +1,12 @@ +2002-11-15 Mark Salter + + * cdl/hal_mn10300_am33_asb2305.cdl: Override default VSR placement. + Removed unused options. Set correct clock speed. + * include/pkgconf/mlt_mn10300_am33_asb2305_ram.ldi: Remove unneeded + defines. + * include/pkgconf/mlt_mn10300_am33_asb2305_flash.ldi: Ditto. + * include/pkgconf/mlt_mn10300_am33_asb2305_rom.ldi: Ditto. + 2002-11-14 Mark Salter * cdl/hal_mn10300_am33_asb2305.cdl: Remove RedBoot exec option. Now diff --git a/packages/hal/mn10300/asb2305/current/cdl/hal_mn10300_am33_asb2305.cdl b/packages/hal/mn10300/asb2305/current/cdl/hal_mn10300_am33_asb2305.cdl --- a/packages/hal/mn10300/asb2305/current/cdl/hal_mn10300_am33_asb2305.cdl +++ b/packages/hal/mn10300/asb2305/current/cdl/hal_mn10300_am33_asb2305.cdl @@ -101,48 +101,19 @@ cdl_package CYGPKG_HAL_MN10300_AM33_ASB2 from." } - cdl_option CYGHWR_HAL_MN10300_AM33_ASB_DIAG_PORT { - display "Diagnostic Serial Port" - flavor data - legal_values 0 1 - default_value 0 - description " - The ASB2305 board has two serial ports. This option - chooses which of these ports will be used for diagnostic output. - At present only port 0 is supported." - } + cdl_option CYGHWR_HAL_MN10300_PROCESSOR_OSC_DEFAULT { + display "Processor clock rate" + calculated 33333333 + flavor data + } - cdl_option CYGHWR_HAL_MN10300_AM33_ASB_DIAG_BAUD { - display "Diagnostic Serial Port Baud Rate" - flavor data - legal_values 9600 19200 38400 115200 - default_value 38400 - description " - This option selects the baud rate used for the diagnostic port. - Note: this should match the value chosen for the GDB port if the - diagnostic and GDB port are the same." - } - - cdl_option CYGHWR_HAL_MN10300_AM33_ASB_GDB_PORT { - display "GDB Serial Port" - flavor data - legal_values 0 1 - default_value 0 - description " - The ASB2305 board has two separate serial ports. This option - chooses which of these ports will be used to connect to a host - running GDB. - At present only port 0 is supported." - } - - cdl_option CYGHWR_HAL_MN10300_AM33_ASB_GDB_BAUD { - display "GDB Serial Port Baud Rate" - flavor data - legal_values 9600 19200 38400 115200 - default_value 38400 - description " - This option controls the baud rate used for the GDB connection." - } + cdl_option CYGHWR_HAL_MN10300_PLATFORM_VSR_TABLE_BASE { + display "ASB2305 VSR table base address" + flavor data + default_value 0x8C000000 + description " + Base address of the VSR table on ASB2305 board." + } cdl_component CYGBLD_GLOBAL_OPTIONS { display "Global build options" diff --git a/packages/hal/mn10300/asb2305/current/include/pkgconf/mlt_mn10300_am33_asb2305_flash.ldi b/packages/hal/mn10300/asb2305/current/include/pkgconf/mlt_mn10300_am33_asb2305_flash.ldi --- a/packages/hal/mn10300/asb2305/current/include/pkgconf/mlt_mn10300_am33_asb2305_flash.ldi +++ b/packages/hal/mn10300/asb2305/current/include/pkgconf/mlt_mn10300_am33_asb2305_flash.ldi @@ -27,7 +27,3 @@ SECTIONS SECTIONS_END } -#define CYG_HAL_PLATFORM_HAL_VSR_TABLE_DEFINED - -_hal_vsr_table = 0x8C000000; -_hal_virtual_vector_table = 0x8C000100; diff --git a/packages/hal/mn10300/asb2305/current/include/pkgconf/mlt_mn10300_am33_asb2305_ram.ldi b/packages/hal/mn10300/asb2305/current/include/pkgconf/mlt_mn10300_am33_asb2305_ram.ldi --- a/packages/hal/mn10300/asb2305/current/include/pkgconf/mlt_mn10300_am33_asb2305_ram.ldi +++ b/packages/hal/mn10300/asb2305/current/include/pkgconf/mlt_mn10300_am33_asb2305_ram.ldi @@ -26,7 +26,3 @@ SECTIONS SECTIONS_END } -#define CYG_HAL_PLATFORM_HAL_VSR_TABLE_DEFINED - -_hal_vsr_table = 0x8C000000; -_hal_virtual_vector_table = 0x8C000100; diff --git a/packages/hal/mn10300/asb2305/current/include/pkgconf/mlt_mn10300_am33_asb2305_rom.ldi b/packages/hal/mn10300/asb2305/current/include/pkgconf/mlt_mn10300_am33_asb2305_rom.ldi --- a/packages/hal/mn10300/asb2305/current/include/pkgconf/mlt_mn10300_am33_asb2305_rom.ldi +++ b/packages/hal/mn10300/asb2305/current/include/pkgconf/mlt_mn10300_am33_asb2305_rom.ldi @@ -27,7 +27,3 @@ SECTIONS SECTIONS_END } -#define CYG_HAL_PLATFORM_HAL_VSR_TABLE_DEFINED - -_hal_vsr_table = 0x8C000000; -_hal_virtual_vector_table = 0x8C000100;