# HG changeset patch # User gthomas # Date 1071585197 0 # Node ID 85afbe4f7f1cea7f86f5c9ef0b1aecfe79fda1e3 # Parent d9e058a49f031e5ce024187e548294cdd272f013 Fix diag I/O when buffers are cacheable diff --git a/packages/hal/powerpc/mpc8xxx/current/ChangeLog b/packages/hal/powerpc/mpc8xxx/current/ChangeLog --- a/packages/hal/powerpc/mpc8xxx/current/ChangeLog +++ b/packages/hal/powerpc/mpc8xxx/current/ChangeLog @@ -1,3 +1,8 @@ +2003-12-16 Gary Thomas + + * src/quicc2_diag.c: Need to flush/invalidate cache for character + buffers (since they may be cacheable if the serial driver is running) + 2003-11-19 Gary Thomas * include/mpc8xxx.h: Add definitions for CPM timers. diff --git a/packages/hal/powerpc/mpc8xxx/current/src/quicc2_diag.c b/packages/hal/powerpc/mpc8xxx/current/src/quicc2_diag.c --- a/packages/hal/powerpc/mpc8xxx/current/src/quicc2_diag.c +++ b/packages/hal/powerpc/mpc8xxx/current/src/quicc2_diag.c @@ -60,6 +60,7 @@ #include // CYG_ISR_HANDLED #include +#include #include // Needed for IMMR structure #define PORT_IS_SMC 1 @@ -420,7 +421,7 @@ cyg_hal_plf_serial_putc(void* __ch_data, volatile struct cp_bufdesc *bd; struct port_info *info = (struct port_info *)__ch_data; volatile t_Scc_Pram *uart_pram = (volatile t_Scc_Pram *)((char *)IMM + info->pram); -// int cache_state; + int cache_state; /* tx buffer descriptor */ bd = (struct cp_bufdesc *)((char *)IMM + uart_pram->tbptr); @@ -431,15 +432,15 @@ cyg_hal_plf_serial_putc(void* __ch_data, } bd->length = 1; bd->buffer[0] = ch; - bd->ctrl |= _BD_CTL_Ready; -#if 0 //?? + // Flush cache if necessary - buffer may be in cacheable memory HAL_DCACHE_IS_ENABLED(cache_state); if (cache_state) { HAL_DCACHE_FLUSH(bd->buffer, 1); } -#endif + bd->ctrl |= _BD_CTL_Ready; + while (bd->ctrl & _BD_CTL_Ready) ; // Wait for buffer free } static cyg_bool @@ -448,7 +449,7 @@ cyg_hal_plf_serial_getc_nonblock(void* _ volatile struct cp_bufdesc *bd; struct port_info *info = (struct port_info *)__ch_data; volatile t_Scc_Pram *uart_pram = (volatile t_Scc_Pram *)((char *)IMM + info->pram); -// int cache_state; + int cache_state; /* rx buffer descriptor */ bd = info->next_rxbd; @@ -468,13 +469,12 @@ cyg_hal_plf_serial_getc_nonblock(void* _ } info->next_rxbd = bd; -#if 0 - // Note: the MBX860 does not seem to snoop/invalidate the data cache properly! + // Note: the MPC8xxx does not seem to snoop/invalidate the data cache properly! HAL_DCACHE_IS_ENABLED(cache_state); if (cache_state) { HAL_DCACHE_INVALIDATE(bd->buffer, uart_pram->mrblr); // Make sure no stale data } -#endif + return true; }