# HG changeset patch # User jlarmour # Date 986577613 0 # Node ID b939e9cada4639468f71428e644c5162f4dc7a48 # Parent 70a4cc6d69d296bae38f0d03ad5d6f07c2945a1c Merge from eCos master repository on 2001-03-29-21:44:39-BST diff --git a/host/libcdl/ChangeLog b/host/libcdl/ChangeLog --- a/host/libcdl/ChangeLog +++ b/host/libcdl/ChangeLog @@ -1,3 +1,8 @@ +2001-02-27 Jonathan Larmour + + * interp.cxx (locate_subdirs): Accept "cvs" as a synonym for "CVS" + * database.cxx (new_package): Ditto. + 2000-08-18 Bart Veer * configure.in: @@ -773,7 +778,7 @@ 1999-01-21 Bart Veer + + * ecos.db: Add Atlas flash and ethernet drivers to target description. + Also PCI package. + Fix atlas flash package alias typo. + +2001-03-21 Jonathan Larmour + + * ecos.db: Update ceb_v850 description - no longer V850/SA1 specific + +2001-03-21 Jesper Skov + + * ecos.db: Added new Intel 28Fxxx package. Only supports flash + file at the moment. + +2001-03-15 Gary Thomas + + * ecos.db: Add keyboard driver for iPAQ + +2001-03-08 Bart Veer + + * ecosadmin.tcl, locate_files: + Do not eliminate makefile, configure.in, etc. It is now valid for + these to be present, e.g. in a package's host or doc subdirectory. + +2001-03-08 Jesper Skov + + * ecos.db: Added CYGPKG_COMPRESS_ZLIB. + +2001-03-05 Gary Thomas + + * ecos.db: Adding iPAQ touch screen driver. + +2001-02-28 Hugo Tyson + + * ecos.db: Add Watchdog for SA11x0 StrongARMs. Package + CYGPKG_DEVICES_WATCHDOG_ARM_SA11X0. Included in appropriate + targets - not sure whether it applies to SA1100, so SA1110 only. + +2001-02-24 Gary Thomas + + * ecos.db: Import initial iPAQ support from 3G Labs. + 2001-02-23 Jesper Skov * ecos.db: MBX uses new generic AMD flash driver. @@ -7,6 +50,11 @@ 2001-02-21 Jesper Skov + + * ecos.db: Add generic strataFlash driver, + CYGPKG_DEVS_FLASH_STRATA located in devs/flash/intel/strata/... + 2001-02-09 Jonathan Larmour * pkgconf/rules.mak: Revert below change for now until we work @@ -18,9 +66,37 @@ 2001-02-06 Jonathan Larmour + + * Added mips to list of directories to keep for devs/flash +2001-01-31 Nick Garnett + + * ecos.db: Added MIPS64 package and atlas_mips64_5kc target. + 2001-01-25 Jesper Skov * ecos.db: Added generic i82559 ethernet driver. + Added QED Ocelot driver. + +2001-01-10 Jesper Skov + + * ecos.db: Add i82559 driver. + +2000-12-21 Mark Salter + + * ecos.db: Added MIPS Atlas ether and flash packages. + +2000-12-07 Jesper Skov + + * ecos.db: Include PCI driver. + +2000-12-05 Jesper Skov + + * ecos.db: Added AMD flash driver. + +2000-11-30 Jesper Skov + + * ecos.db: Added Ocelot packages. 2000-11-25 Jonathan Larmour @@ -137,6 +213,10 @@ 2000-07-26 Gary Thomas + + * ecos.db: Added mips3264 stuff. + 2000-07-14 Gary Thomas * ecos.db: Add RedBoot package. diff --git a/packages/NEWS b/packages/NEWS --- a/packages/NEWS +++ b/packages/NEWS @@ -1,3 +1,28 @@ +* Ported to Compaq StrongARM SA1110 PocketPC (iPAQ), including keypad, + touch screen, watchdog, FLASH, PCMCIA and Compact Flash drivers. + Also includes RedBoot, with support for booting ARM Linux. + Derived from an initial port by Richard Panton of 3G Lab. + http://www.3glab.org/ +* Added flash verification checksums to RedBoot. +* Added watchdog driver for Intel SA11x0 StrongARM. +* Added generic Intel FlashFile 28Fxxx flash driver. +* Added generic Intel StrataFLASH driver. +* Support flash and ROMRAM startup for V850 HAL and Cosmo CEB board; also + adding support for the NEC V850/SB1 CPU variant. Also support for + thread debugging via ICE and gdbserv. +* Added support for MIPS32/64 MIPS variants and Atlas platform, using both + the MIPS32 4Kc and MIPS64 5Kc processor modules. Includes PCI, serial, + ethernet and flash drivers. This is a RedBoot-only port at this time, not + full eCos. +* Added simple ROM based file system support, contributed by + Richard Panton of 3G Lab. +* Added support for MIPS QED RM7000 variant and Ocelot board, including + PCI, ethernet and FLASH support. +* Added gzip/zlib decompression support to RedBoot. +* Added zlib decompression library. +* GDB stubs no longer reboot the board in response to a 'k' packet. Instead + from within GDB a "maintenance packet r" must be sent, followed by a + "detach". Then you can reconnect to the board.a * Added generic AMD AM29xxxxx flash driver based on MBX driver, and make the MBX use it. * Added RedBoot support to PID target. diff --git a/packages/cygmon/current/ChangeLog b/packages/cygmon/current/ChangeLog --- a/packages/cygmon/current/ChangeLog +++ b/packages/cygmon/current/ChangeLog @@ -77,6 +77,16 @@ 2000-07-21 Drew Moseley + * misc/bsp/mips/gdb-cpu.c: New files. Mips based Cygmon now running on top of eCos HAL. + * misc/bsp/mips/gdb-cpu.h: Ditto. + * misc/bsp/mips/gdb.h: Ditto. + * misc/bsp/mips/insn.h: Ditto. + * misc/bsp/mips/singlestep.c: Ditto. + * misc/mips/board.h: Ditto. + * misc/mips/cpu.h: Ditto. + * misc/mips/cpu_info.h: Ditto. + * misc/mips/mips-mon.c: Ditto. + * misc/bsp/common/syscall.c: Added SYS_meminfo call to find out how much RAM we have. * misc/bsp/common/syscall.h: Ditto. diff --git a/packages/devs/eth/arm/ebsa285/current/ChangeLog b/packages/devs/eth/arm/ebsa285/current/ChangeLog --- a/packages/devs/eth/arm/ebsa285/current/ChangeLog +++ b/packages/devs/eth/arm/ebsa285/current/ChangeLog @@ -1,3 +1,8 @@ +2001-03-12 Hugo Tyson + + * src/if_ebsa285.c: Make device config more consistent with that + used in other 82559 platforms, and fix a typo. + 2001-02-20 Hugo Tyson 2001-02-15 Martin Buck diff --git a/packages/devs/eth/arm/ebsa285/current/src/if_ebsa285.c b/packages/devs/eth/arm/ebsa285/current/src/if_ebsa285.c --- a/packages/devs/eth/arm/ebsa285/current/src/if_ebsa285.c +++ b/packages/devs/eth/arm/ebsa285/current/src/if_ebsa285.c @@ -2154,7 +2154,7 @@ static int i82559_configure(struct i8255 ccs->cb_entry.cb_suspend=1; ccs->cb_entry.cb_el=1; ccs->cb_entry.cb_complete=0; - ccs->cb_entry.cb_link_offset=VIRT_TO_BUS((cyg_uint32)&ccs); + ccs->cb_entry.cb_link_offset=VIRT_TO_BUS((cyg_uint32)ccs); // Default values from the Intel Manual ccs->config_bytes[0]=0x13; @@ -2163,9 +2163,9 @@ static int i82559_configure(struct i8255 ccs->config_bytes[3]=0x0; ccs->config_bytes[4]=0x0; ccs->config_bytes[5]=0x0; - ccs->config_bytes[6]=0x32 | (promisc ? 0x80 : 0); // | 0x32 for small stats, - ccs->config_bytes[7]=0x0; //\ | 0x12 for stats with PAUSE stats - ccs->config_bytes[8]=0x0; // \ | 0x16 for PAUSE + TCO stats + ccs->config_bytes[6]=0x32 | (promisc ? 0x80 : 0x00); // | 0x32 for small stats, + ccs->config_bytes[7]=0x00 | (promisc ? 0x00 : 0x01); //\ | 0x12 for stats with PAUSE stats + ccs->config_bytes[8]=0x0; // [7]:discard short frames \ | 0x16 for PAUSE + TCO stats ccs->config_bytes[9]=0x0; ccs->config_bytes[10]=0x28; ccs->config_bytes[11]=0x0; diff --git a/packages/devs/eth/intel/i82559/current/ChangeLog b/packages/devs/eth/intel/i82559/current/ChangeLog --- a/packages/devs/eth/intel/i82559/current/ChangeLog +++ b/packages/devs/eth/intel/i82559/current/ChangeLog @@ -1,6 +1,135 @@ +2001-03-28 Hugo Tyson + + * src/if_i82559.c (update_statistics): Fix warning - only declare + op_i82559 if we use it - from previous change. + +2001-03-23 Hugo Tyson + + * src/if_i82559.c (i82559_can_send, i82559_send): Count up and + down entries into these routines, and always say "no" to + can_send() if we are recursing, ie. within_send != 0. This is a + good idea because it limits stack usage. The recursion happens + because of the very neccessary polling of rx state within the tx + routines - which can deliver packets up into the stack, which can + trigger a response tx and so on... Also fixed a harmless bug + where, after polling, the p_i82559 current device state pointer + pointer to the wrong device, if we polled both devs regardless; it + only caused problems with the within_send recursion count. + + * include/i82559_info.h (I82559): Add within_send field. + +2001-03-15 Hugo Tyson + + * src/if_i82559.c (i82559_init): Support external macro + CYGHWR_DEVS_ETH_INTEL_I82559_GET_ESA(...), which if defined, is + used to acquire a MAC address, on the assumption that there is no + EEPROM present. CYGHWR_DEVS_ETH_INTEL_I82559_HAS_NO_EEPROM + confirms that there is no EEPROM attached to the 82559(s) so we + can omit all that code. It's in the negative sense because it's + the unusual case. + +2001-03-13 Hugo Tyson + + * src/if_i82559.c (CYGHWR_DEVS_ETH_INTEL_I82559_DEMUX_ALL): Fully + enable "DEMUX_ALL" option; all devices are scanned for + activity/wedging/interrupts at every opportunity. Multiple + devices on the same interrupts are now supported. + +2001-03-12 Hugo Tyson + + * src/if_i82559.c (i82559_configure): New routine combines actions + of eth_set_promiscuous_mode() and eth_set_config() both of which + disappear. Thus the device is always configured correctly from + the start. [from a patch from Martin Buck + via the EBSA285 driver] + (eth_dsr): Do not call upper layer unless we are in a networked + [non-RedBoot, non-polled] environment. This is necessary because + we call our own DSR from foreground to unstick after a lost + interrupt. + (find_82559s_match_func): New routine to discover disparate + devices on the PCI bus. Used in pci_init_find_82559s(). + (dump_txcb): Various junk debug functions removed. + +2001-03-12 Hugo Tyson + + * src/if_i82559.c: Some tidying up, and two main additions to the + mechanisms used for managing this nasty entomological device. + (i82559_can_send): [amongst other places] if it is defined, use + CYGHWR_DEVS_ETH_INTEL_I82559_MISSED_INTERRUPT(p_i82559) to detect + that we missed an interrupt - and if so, call the ISR and DSR + directly. This is necessary for edge-triggered interrupt + controllers being fed by this level-sending device, where an + internal event in the device can keep the line low after the code + thinks that all events have been handled. + (Check82559TxLockupTimeout): This routine runs a timeout (if the + HAL provides a pair of watchdog-like macros) which performs a + selective reset of the device if it takes too long to transmit. + This happens rarely, but when it happens this is the only way out; + the tx machine is fixated on one tx and never comes out of it. + + + Sadly these two techniques to escape lockup only work if the + driver is called (ie. the stack tries to tx); incoming packets + cannot unwedge a device. We might need to add a poll from the + stack in future if this causes problems. + + * include/i82559_info.h (I82559): Added two words for managing tx + lockup timeouts since this must be per-device. + +2001-03-02 Hugo Tyson + + * src/if_i82559.c: Remove "Platform specific - defaults provided" + definitions for CYGHWR_INTEL_I82559_PCI_MEM_MAP_BASE/SIZE; all + platforms now provide these. + Added a little further disclaimer to the comment about LE/BE/GE. + +2001-03-01 Hugo Tyson + + * src/if_i82559.c: Global change: what was HAL_READ_UINTxx or + HAL_WRITE_UINTxx are now READMEMxx or WRITEMEMxx - just + convenience macros that do all the volatile casts we want there. + Definitions of INL, INW, INB and OUTL, OUTW, OUTB recast in terms + of HAL_READ_UINTxx or HAL_WRITE_UINTxx so that they will use + proper IO operations on those CISCy mainframes that have a special + way of doing IO. + +2001-03-01 Hugo Tyson + + * src/if_i82559.c: Much more configury added, so that I can use it + with a new target board. Including, but not limited to: + + o An essay about addressing, big endian, little endian and GIB + endian (sic) and how we treat the various types of access within + this module. In other words, a lot of comments. + + o CYGNUM_DEVS_ETH_INTEL_I82559_SEPARATE_MUX_INTERRUPT to clarify + that such an interrupt is SEPARATE from any simplex intrs that are + also available. + + o CYGHWR_DEVS_ETH_INTEL_I82559_DEMUX_ALL for hardware where the + the only interrupt is a multiplexed (wire or'd) one. Plus + associated macros for direct manipulation of interrupt masks and + acknowledgments. + + o Support for external definition from the platform HAL or driver + config module of CYGHWR_INTEL_I82559_PCI_MEM_MAP_BASE and SIZE. + Also CYGHWR_INTEL_I82559_PCI_VIRT_TO_BUS. + + o LE definitions of a few macros that were missing. + + o Separated definitions of structure offsets from BE/LE + definitions of consts within the words. Offsets vary with GIB + endian, for those CPUs who just flip bits. No change for BE + machines, needed for LE machines to work. To enable address-flip + within structures, define CYG_ADDRESSING_IS_GIBENDIAN. + + o Re-org of mux/simplex deliver and isr's for new configuration. + + o Couple of extra debug printouts. + 2001-01-26 Jesper Skov - * src/if_i82559.c: Added FIXME for promisuous mode. + * src/if_i82559.c: Added FIXME for promiscuous mode. 2001-01-25 Jesper Skov diff --git a/packages/devs/eth/intel/i82559/current/include/i82559_info.h b/packages/devs/eth/intel/i82559/current/include/i82559_info.h --- a/packages/devs/eth/intel/i82559/current/include/i82559_info.h +++ b/packages/devs/eth/intel/i82559/current/include/i82559_info.h @@ -135,8 +135,8 @@ typedef struct i82559 { active:1, // has this if been brung up? hardwired_esa:1, // set if ESA is hardwired via CDL spare1:4; - cyg_uint8 - spare2:8; + cyg_uint8 // Count nested sends to reject + within_send:8; // nested requests to send cyg_uint8 tx_in_progress:1, // transmit in progress flag tx_queue_full:1, // all Tx descriptors used flag @@ -168,6 +168,9 @@ typedef struct i82559 { void *p_statistics; // pointer to statistical counters #endif + cyg_uint32 platform_timeout; // Some platforms use a timeout + int tx_descriptor_timeout; // Is it fixated on this tx? + } I82559; diff --git a/packages/devs/eth/intel/i82559/current/src/if_i82559.c b/packages/devs/eth/intel/i82559/current/src/if_i82559.c --- a/packages/devs/eth/intel/i82559/current/src/if_i82559.c +++ b/packages/devs/eth/intel/i82559/current/src/if_i82559.c @@ -53,36 +53,63 @@ // driver polls the completion bit in the packet status // word instead. // -// Platform code must provide this vector: -// CYGNUM_DEVS_ETH_INTEL_I82559_MUX_INTERRUPT if it -// requires the interrupts to be handled via demuxers. +// Platform code may provide this vector: +// CYGNUM_DEVS_ETH_INTEL_I82559_SEPARATE_MUX_INTERRUPT if it +// requires the interrupts to be handled via demuxers +// attached to a distinct interrupt. +// +// Platform code may alternatively define: +// CYGHWR_DEVS_ETH_INTEL_I82559_DEMUX_ALL if it is necessary +// to demux all interrupt sources - for example if they are +// wire-or'd together on some hardware but distinct on +// others. In this circumstance it is permitted for +// cyg_pci_translate_interrupt [HAL_PCI_TRANSLATE_INTERRUPT] +// to return invalid for 2nd and subsequent devices. +// +// Platform code can also define these three: +// CYGPRI_DEVS_ETH_INTEL_I82559_MASK_INTERRUPTS(p_i82559,old) +// CYGPRI_DEVS_ETH_INTEL_I82559_UNMASK_INTERRUPTS(p_i82559,old) +// CYGPRI_DEVS_ETH_INTEL_I82559_ACK_INTERRUPTS(p_i82559) +// which are particularly useful when nested interrupt +// management is needed (which is always IMHO). +// +// Platform code can define this: +// CYGHWR_DEVS_ETH_INTEL_I82559_MISSED_INTERRUPT(p_i82559) +// to detect a dropped interrupt and loop again or +// direct-call the DSR to reschedule the delivery routine. +// Only a problem on edge-triggered interrupt systems. // // Platform code can also provide this macro: // CYGPRI_DEVS_ETH_INTEL_I82559_INTERRUPT_ACK_LOOP(p_i82559) // to handle delaying for acks to register on the interrupt // controller as necessary on the EBSA. // -// FIXME: IN/OUT macros for accessing PCI IO space are probably -// broken on proper BE systems. Tested on a board with -// a Galileo which seems to do some weird stuff to 8/16 -// bit word addressing. +// Platform can define CYGHWR_DEVS_ETH_INTEL_I82559_GET_ESA() +// as an external means to get ESAs, possibly from RedBoot +// configuration info that's stored in flash memory. +// +// Platform def CYGHWR_DEVS_ETH_INTEL_I82559_HAS_NO_EEPROM +// removes all code for dealing with the EEPROM for those +// targets where there is none fitted. Either an external +// means to get ESAs should be used, or we must rely on +// hard-wiring the ESA's into each executable by means of the +// usual CDL configuration. +// +// // FIXME: replace -1/-2 return values with proper E-defines -// FIXME: eth_set_mac_address and eth_set_promiscuous_mode -// failures are not handled properly [try writing -// endian swapped cmd - CU starts, but wedges] -// FIXME: For 82557/8 compatibility the eth_set_config and -// eth_set_promiscuous_mode functions probably need -// some tweaking - config bits differ slightly but -// crucially. +// FIXME: For 82557/8 compatibility i82559_configure() function +// probably needs some tweaking - config bits differ +// slightly but crucially. // FIXME: EEPROM code not tested on a BE system. -// FIXME: Apparently promiscuous mode cannot be disabled (on -// BE systems?) // //####DESCRIPTIONEND#### // //========================================================================== #include +#ifdef CYGPKG_IO_ETH_DRIVERS +#include +#endif #include #include #include @@ -116,10 +143,29 @@ #include CYGDAT_DEVS_ETH_INTEL_I82559_INL // ------------------------------------------------------------------------ -// Platform specific - -#define CYGHWR_INTEL_I82559_PCI_MEM_MAP_BASE (CYGARC_UNCACHED_ADDRESS(0x0ff00000)) -#define CYGHWR_INTEL_I82559_PCI_MEM_MAP_SIZE 0x00100000 +// Check on the environment. +// +// These are not CDL type config points; they are set up for your platform +// in the platform driver's include file and that's that. These messages +// are for the eCos driver writer, not config tool users. + +#ifdef CYGHWR_DEVS_ETH_INTEL_I82559_DEMUX_ALL +#ifdef CYGNUM_DEVS_ETH_INTEL_I82559_SEPARATE_MUX_INTERRUPT +#error Both a separate demux interrupt *and* DEMUX_ALL are defined +#endif +#endif + +#ifdef CYGPKG_DEVS_ETH_INTEL_I82559_WRITE_EEPROM +#ifdef CYGHWR_DEVS_ETH_INTEL_I82559_HAS_NO_EEPROM +#error This platform has no EEPROM, yet WRITE_EEPROM is enabled +#endif +#endif + +#ifdef CYGHWR_DEVS_ETH_INTEL_I82559_GET_ESA +#ifndef CYGHWR_DEVS_ETH_INTEL_I82559_HAS_NO_EEPROM +#error This platform has EEPROM, yet external ..._GET_ESA is defined +#endif +#endif // ------------------------------------------------------------------------ @@ -129,10 +175,104 @@ #define DEBUG_EE // Some EEPROM specific retries &c #endif +#ifdef CYGDBG_USE_ASSERTS +static struct { + int can_send; + int deliver; + int stats; + int waitcmd_timeouts; + int waitcmd_timeouts_cu; + int lockup_timeouts; +} missed_interrupt = { 0,0,0, 0,0, 0 }; +#endif + #define os_printf diag_printf #define db_printf diag_printf // ------------------------------------------------------------------------ +// +// MEMORY ADDRESSING +// +// There is scope for confusion here; we deal with LE/BE systems and +// addressing issues in two separate ways depending on the type of access +// in question. +// +// 1) IO-style access to the device regsiters over the PCI bus +// 2) Memory access to build and read the structures in shared memory +// +// In detail: +// +// 1) IO-style access to the device regsiters over the PCI bus +// +// All such access is via macros which perform byte-swapping as necessary +// for the endianness of the CPU. These macros are called INL, INW, INB +// and OUTL, OUTW, OUTB - for Long (32) Word (16) and Byte (8). Intel +// nomenclature seems to have crept in here for shorts. +// +// Consequently, all the constants only have to be expressed once, in their +// true LE format - bit 15 is 0x8000, bit 0 is 1. +// +// All the offsets are also only expressed once. This is OK so long as GIB +// endian addressing (sic, see below) is not employed - or so long as is +// does not affect the PCI bus accesses. +// +// +// 2) Memory access to build and read the structures in shared memory +// +// These accesses are by means of peek and poke to an address created from +// a base + offset. No swapping occurs within the access so all constants +// and flags need to be defined twice, once for BE and once for LE +// accesses. Worse, for BE, constants need to be defined in flavours for +// 16-bit versus 32-bit accesses, ie. 0x8000 sets bit 7 only in BE; for a +// 32-bit access you must instead write 0x80000000 to set bit 7. +// +// Thus all constants are defined twice depending on the CPU's endianness. +// +// For most BE/LE machines, this is sufficient; the layout of memory is the +// same. Specifically, within a 32-bit word, byte[0] will be data[0:7], +// short[0] will be data [0:15] and so on. &byte[0] == &short[0] == &word +// regardless. But data[0:7] *OF THE MEMORY SYSTEM* will hold either the +// LSbyte (0xFF) on a LE machine, and the MSbyte (0xFF000000) on a BE +// machine, for a 32-bit access. +// +// It is in terms of the memory system that the i82559 defines its view of +// the world. +// +// Therefore the structure layouts remain the same for both BE and LE +// machines. This means that the offsets for, specifically, the status +// word in command blocks is always zero, and the offset for the command +// word is always two. +// +// But there is one furter variant: so-called GIB endian. (BIG endian +// backwards) Some architectures support BE only for software +// compatibility; they allow code to run which relies on overlaid C +// structures behaving in a certain way; specifically +// *(char *)&i == (i >> 24) +// ARM's BE mode is an example of this. +// +// But while such an operation would use data[0:7] for the char access in a +// true BE or any LE system, in a GE system, data[24:31] are used here. +// The implementation is that for memory accesses, A0 and A1 are inverted +// before going outside to the memory system. So if &i == 0x1000, +// accessing i uses address 0x1000, A0 and A1 being ignored for a 32-bit +// access. But the 8-bit access to *(char *)&i also uses 0x1000 for the +// address as the code sees it, the memory system sees a byte request for +// address 0x1003, thus picking up the MSbyte, from data[24:31]. +// +// For such addressing, offsets need to be redefined to swap bytes and +// shorts within words. Therefore offsets are defined twice, once for +// "normal" addressing, and once for "GIB endian" addressing. +// +// FIXME: this BE/GE configuration probably won't work with an ARM in its +// BE mode - because that will define the global BE flags, yet it's not +// true BE, it's GE. +// Perhaps a solution whereby the GE flag CYG_ADDRESSING_IS_GIBENDIAN +// overrides the BYTEORDER choices would be good; we want the constants to +// be LE, but address offsets to be swapped per GE. +// +// Essay ends. +// +// ------------------------------------------------------------------------ // I/O access macros as inlines for type safety #if (CYG_BYTEORDER == CYG_MSBFIRST) @@ -144,64 +284,104 @@ #define HAL_LE16TOC(x) ((((x) & 0xff) << 8) | (((x) & 0xff00) >> 8)) static inline void OUTB(cyg_uint8 value, cyg_uint32 io_address) -{ *((volatile cyg_uint8 *)(io_address)) = value; } +{ + HAL_WRITE_UINT8( io_address, value); +} static inline void OUTW(cyg_uint16 value, cyg_uint32 io_address) -{ *((volatile cyg_uint16 *)(io_address)) = (((value & 0xff) << 8) | ((value & 0xff00) >> 8)); } +{ + HAL_WRITE_UINT16( io_address, (((value & 0xff) << 8) | ((value & 0xff00) >> 8)) ); +} static inline void OUTL(cyg_uint32 value, cyg_uint32 io_address) -{ *((volatile cyg_uint32 *)io_address) = ((((value) & 0xff) << 24) | (((value) & 0xff00) << 8) | (((value) & 0xff0000) >> 8) | (((value) >> 24) & 0xff)); } +{ + HAL_WRITE_UINT32( io_address, + ((((value) & 0xff) << 24) | (((value) & 0xff00) << 8) | (((value) & 0xff0000) >> 8) | (((value) >> 24) & 0xff)) ); +} static inline cyg_uint8 INB(cyg_uint32 io_address) -{ return *((volatile cyg_uint8 *)(io_address)); } +{ + cyg_uint8 d; + HAL_READ_UINT8( io_address, d ); + return d; +} static inline cyg_uint16 INW(cyg_uint32 io_address) -{ cyg_uint16 d; - d = *((volatile cyg_uint16 *)(io_address)); +{ + cyg_uint16 d; + HAL_READ_UINT16( io_address, d ); return (((d & 0xff) << 8) | ((d & 0xff00) >> 8)); } static inline cyg_uint32 INL(cyg_uint32 io_address) -{ cyg_uint32 d; - d = *((volatile cyg_uint32 *)io_address); +{ + cyg_uint32 d; + HAL_READ_UINT32( io_address, d ); return ((((d) & 0xff) << 24) | (((d) & 0xff00) << 8) | (((d) & 0xff0000) >> 8) | (((d) >> 24) & 0xff)); } #else -static inline void OUTB(cyg_uint8 value, cyg_uint32 io_address) -{ *((volatile cyg_uint8 *)io_address) = value; } + +// Maintaining the same styleee as above... +#define HAL_CTOLE32(x) ((((x)))) +#define HAL_LE32TOC(x) ((((x)))) + +#define HAL_CTOLE16(x) ((((x)))) +#define HAL_LE16TOC(x) ((((x)))) + +static inline void OUTB(cyg_uint8 value, cyg_uint32 io_address) +{ HAL_WRITE_UINT8( io_address, value ); } static inline void OUTW(cyg_uint16 value, cyg_uint32 io_address) -{ *((volatile cyg_uint16 *)io_address) = value; } +{ HAL_WRITE_UINT16( io_address, value ); } static inline void OUTL(cyg_uint32 value, cyg_uint32 io_address) -{ *((volatile cyg_uint32 *)io_address) = value; } - -static inline cyg_uint8 INB(cyg_uint32 io_address) -{ return *((volatile cyg_uint8 *)io_address); } +{ HAL_WRITE_UINT32( io_address, value ); } + +static inline cyg_uint8 INB(cyg_uint32 io_address) + { cyg_uint8 _t_; HAL_READ_UINT8( io_address, _t_ ); return _t_; } static inline cyg_uint16 INW(cyg_uint32 io_address) -{ return *((volatile cyg_uint16 *)io_address); } + { cyg_uint16 _t_; HAL_READ_UINT16( io_address, _t_ ); return _t_; } static inline cyg_uint32 INL(cyg_uint32 io_address) -{ return *((volatile cyg_uint32 *)io_address); } + { cyg_uint32 _t_; HAL_READ_UINT32( io_address, _t_ ); return _t_; } + #endif // byteorder +// ------------------------------------------------------------------------ +// Macros for writing shared memory structures - no need for byte flipping + +#define READMEM8( _reg_, _val_ ) ((_val_) = *((volatile CYG_BYTE *)(_reg_))) +#define WRITEMEM8( _reg_, _val_ ) (*((volatile CYG_BYTE *)(_reg_)) = (_val_)) +#define READMEM16( _reg_, _val_ ) ((_val_) = *((volatile CYG_WORD16 *)(_reg_))) +#define WRITEMEM16( _reg_, _val_ ) (*((volatile CYG_WORD16 *)(_reg_)) = (_val_)) +#define READMEM32( _reg_, _val_ ) ((_val_) = *((volatile CYG_WORD32 *)(_reg_))) +#define WRITEMEM32( _reg_, _val_ ) (*((volatile CYG_WORD32 *)(_reg_)) = (_val_)) + +// ------------------------------------------------------------------------ +// Map from CPU-view addresses to PCI-bus master's view - however that is: + +#ifdef CYGHWR_INTEL_I82559_PCI_VIRT_TO_BUS + +#define VIRT_TO_BUS( _x_ ) CYGHWR_INTEL_I82559_PCI_VIRT_TO_BUS( _x_ ) + +#else // use default mappings: get a physical address to give to the device + #define VIRT_TO_BUS( _x_ ) virt_to_bus((cyg_uint32)(_x_)) static inline cyg_uint32 virt_to_bus(cyg_uint32 p_memory) { return CYGARC_PHYSICAL_ADDRESS(p_memory); } -#define BUS_TO_VIRT( _x_ ) bus_to_virt((cyg_uint32)(_x_)) -static inline cyg_uint32 bus_to_virt(cyg_uint32 p_memory) -{ return CYGARC_UNCACHED_ADDRESS(p_memory); } - +#endif // not defined CYGHWR_INTEL_I82559_PCI_VIRT_TO_BUS // ------------------------------------------------------------------------ // // 82559 REGISTER OFFSETS (I/O SPACE) // // ------------------------------------------------------------------------ -#define SCBStatus 0 // Rx/Command Unit command and status. -#define SCBCmd 2 // Rx/Command Unit command and status. +#define SCBStatus 0 // Rx/Command Unit Status *Word* +#define SCBIntAckByte 1 // Rx/Command Unit STAT/ACK byte +#define SCBCmd 2 // Rx/Command Unit Command *Word* +#define SCBIntrCtlByte 3 // Rx/Command Unit Intr.Control Byte #define SCBPointer 4 // General purpose pointer. #define SCBPort 8 // Misc. commands and operands. #define SCBflash 12 // Flash memory control. @@ -226,12 +406,56 @@ static inline cyg_uint32 bus_to_virt(cyg #define SCB_STATUS_FCP 0x0100 // flow control pause interrupt #define SCB_INTACK_MASK 0xFD00 // all the above +#define SCB_INTACK_MASK_BYTE 0xFD // all the above #define SCB_INTACK_TX (SCB_STATUS_CX | SCB_STATUS_CNA) #define SCB_INTACK_RX (SCB_STATUS_FR | SCB_STATUS_RNR) // ------------------------------------------------------------------------ // +// SYSTEM CONTROL BLOCK COMMANDS +// +// ------------------------------------------------------------------------ +// CU COMMANDS +#define CU_NOP 0x0000 +#define CU_START 0x0010 +#define CU_RESUME 0x0020 +#define CU_STATSADDR 0x0040 // Load Dump Statistics ctrs addr +#define CU_SHOWSTATS 0x0050 // Dump statistics counters. +#define CU_ADDR_LOAD 0x0060 // Base address to add to CU commands +#define CU_DUMPSTATS 0x0070 // Dump then reset stats counters. + +// RUC COMMANDS +#define RUC_NOP 0x0000 +#define RUC_START 0x0001 +#define RUC_RESUME 0x0002 +#define RUC_ABORT 0x0004 +#define RUC_ADDR_LOAD 0x0006 // (seems not to clear on acceptance) +#define RUC_RESUMENR 0x0007 + +#define CU_CMD_MASK 0x00f0 +#define RU_CMD_MASK 0x0007 + +#define SCB_M 0x0100 // 0 = enable interrupt, 1 = disable +#define SCB_SWI 0x0200 // 1 - cause device to interrupt +#define SCB_BYTE_M 0x01 // 0 = enable interrupt, 1 = disable +#define SCB_BYTE_SWI 0x02 // 1 - cause device to interrupt + +#define CU_STATUS_MASK 0x00C0 +#define RU_STATUS_MASK 0x003C + +#define RU_STATUS_IDLE (0<<2) +#define RU_STATUS_SUS (1<<2) +#define RU_STATUS_NORES (2<<2) +#define RU_STATUS_READY (4<<2) +#define RU_STATUS_NO_RBDS_SUS ((1<<2)|(8<<2)) +#define RU_STATUS_NO_RBDS_NORES ((2<<2)|(8<<2)) +#define RU_STATUS_NO_RBDS_READY ((4<<2)|(8<<2)) + +#define MAX_MEM_RESERVED_IOCTL 1000 + +// ------------------------------------------------------------------------ +// // 82559 PORT INTERFACE COMMANDS // // ------------------------------------------------------------------------ @@ -277,47 +501,6 @@ static inline cyg_uint32 bus_to_virt(cyg // ------------------------------------------------------------------------ // -// SYSTEM CONTROL BLOCK COMMANDS -// -// ------------------------------------------------------------------------ -// CU COMMANDS -#define CU_NOP 0x0000 -#define CU_START 0x0010 -#define CU_RESUME 0x0020 -#define CU_STATSADDR 0x0040 // Load Dump Statistics ctrs addr -#define CU_SHOWSTATS 0x0050 // Dump statistics counters. -#define CU_ADDR_LOAD 0x0060 // Base address to add to CU commands -#define CU_DUMPSTATS 0x0070 // Dump then reset stats counters. - -// RUC COMMANDS -#define RUC_NOP 0x0000 -#define RUC_START 0x0001 -#define RUC_RESUME 0x0002 -#define RUC_ABORT 0x0004 -#define RUC_ADDR_LOAD 0x0006 // (seems not to clear on acceptance) -#define RUC_RESUMENR 0x0007 - -#define CU_CMD_MASK 0x00f0 -#define RU_CMD_MASK 0x0007 - -#define SCB_M 0x0100 // 0 = enable interrupt, 1 = disable -#define SCB_SI 0x0200 // 1 - cause device to interrupt - -#define CU_STATUS_MASK 0x00C0 -#define RU_STATUS_MASK 0x003C - -#define RU_STATUS_IDLE (0<<2) -#define RU_STATUS_SUS (1<<2) -#define RU_STATUS_NORES (2<<2) -#define RU_STATUS_READY (4<<2) -#define RU_STATUS_NO_RBDS_SUS ((1<<2)|(8<<2)) -#define RU_STATUS_NO_RBDS_NORES ((2<<2)|(8<<2)) -#define RU_STATUS_NO_RBDS_READY ((4<<2)|(8<<2)) - -#define MAX_MEM_RESERVED_IOCTL 1000 - -// ------------------------------------------------------------------------ -// // RECEIVE FRAME DESCRIPTORS // // ------------------------------------------------------------------------ @@ -330,16 +513,6 @@ static inline cyg_uint32 bus_to_virt(cyg #if (CYG_BYTEORDER == CYG_MSBFIRST) -#define RFD_STATUS 0 -#define RFD_STATUS_HI 2 // swapped -#define RFD_STATUS_LO 0 // swapped -#define RFD_LINK 4 -#define RFD_RDB_ADDR 8 -#define RFD_SIZE 14 // swapped -#define RFD_COUNT 12 // swapped -#define RFD_BUFFER 16 -#define RFD_SIZEOF 16 - // Note that status bits are endian converted - so we don't need to // fiddle the byteorder when accessing the status word! #define RFD_STATUS_EL 0x00000080 // 1=last RFD in RFA @@ -375,15 +548,6 @@ static inline cyg_uint32 bus_to_virt(cyg #else // Little-endian -#define RFD_STATUS 0 -#define RFD_STATUS_HI 0 -#define RFD_STATUS_LO 2 -#define RFD_LINK 4 -#define RFD_RDB_ADDR 8 -#define RFD_SIZE 12 -#define RFD_COUNT 14 -#define RFD_BUFFER 16 - #define RFD_STATUS_EL 0x80000000 // 1=last RFD in RFA #define RFD_STATUS_S 0x40000000 // 1=suspend RU after receiving frame #define RFD_STATUS_H 0x00100000 // 1=RFD is a header RFD @@ -416,6 +580,36 @@ static inline cyg_uint32 bus_to_virt(cyg #endif // CYG_BYTEORDER +#ifndef CYG_ADDRESSING_IS_GIBENDIAN + +// Normal addressing +#define RFD_STATUS 0 +#define RFD_STATUS_LO 0 +#define RFD_STATUS_HI 2 +#define RFD_LINK 4 +#define RFD_RDB_ADDR 8 +#define RFD_COUNT 12 +#define RFD_SIZE 14 +#define RFD_BUFFER 16 +#define RFD_SIZEOF 16 + +#else // CYG_ADDRESSING_IS_GIBENDIAN + +// GIBENDIAN addressing; A0 and A1 are flipped: +#define RFD_STATUS 0 +#define RFD_STATUS_LO 2 // swapped +#define RFD_STATUS_HI 0 // swapped +#define RFD_LINK 4 +#define RFD_RDB_ADDR 8 +#define RFD_COUNT 14 // swapped +#define RFD_SIZE 12 // swapped +#define RFD_BUFFER 16 +#define RFD_SIZEOF 16 + +#endif // CYG_ADDRESSING_IS_GIBENDIAN + + + // ------------------------------------------------------------------------ // // TRANSMIT FRAME DESCRIPTORS @@ -424,16 +618,6 @@ static inline cyg_uint32 bus_to_virt(cyg #if (CYG_BYTEORDER == CYG_MSBFIRST) -#define TxCB_CMD 2 // swapped -#define TxCB_STATUS 0 // swapped -#define TxCB_LINK 4 -#define TxCB_TBD_ADDR 8 -#define TxCB_TX_THRESHOLD 14 // swapped -#define TxCB_TBD_NUMBER 15 // swapped -#define TxCB_COUNT 12 // swapped -#define TxCB_BUFFER 16 -#define TxCB_SIZEOF 16 - // Note that CMD/STATUS bits are endian converted - so we don't need // to fiddle the byteorder when accessing the CMD/STATUS word! @@ -449,15 +633,6 @@ static inline cyg_uint32 bus_to_virt(cyg #else // Little-endian layout -#define TxCB_CMD 0 -#define TxCB_STATUS 2 -#define TxCB_LINK 4 -#define TxCB_TBD_ADDR 8 -#define TxCB_TBD_NUMBER 12 -#define TxCB_TX_THRESHOLD 13 -#define TxCB_COUNT 14 -#define TxCB_BUFFER 16 - #define TxCB_COUNT_MASK 0x3fff #define TxCB_COUNT_EOF 0x8000 @@ -470,6 +645,33 @@ static inline cyg_uint32 bus_to_virt(cyg #endif // CYG_BYTEORDER +#ifndef CYG_ADDRESSING_IS_GIBENDIAN + +// Normal addressing +#define TxCB_STATUS 0 +#define TxCB_CMD 2 +#define TxCB_LINK 4 +#define TxCB_TBD_ADDR 8 +#define TxCB_COUNT 12 +#define TxCB_TX_THRESHOLD 14 +#define TxCB_TBD_NUMBER 15 +#define TxCB_BUFFER 16 +#define TxCB_SIZEOF 16 + +#else // CYG_ADDRESSING_IS_GIBENDIAN + +// GIBENDIAN addressing; A0 and A1 are flipped: +#define TxCB_STATUS 2 // swapped +#define TxCB_CMD 0 // swapped +#define TxCB_LINK 4 +#define TxCB_TBD_ADDR 8 +#define TxCB_COUNT 14 // swapped +#define TxCB_TX_THRESHOLD 13 // swapped +#define TxCB_TBD_NUMBER 12 // swapped +#define TxCB_BUFFER 16 +#define TxCB_SIZEOF 16 +#endif // CYG_ADDRESSING_IS_GIBENDIAN + // ------------------------------------------------------------------------ // // STRUCTURES ADDED FOR PROMISCUOUS MODE @@ -478,12 +680,6 @@ static inline cyg_uint32 bus_to_virt(cyg #if (CYG_BYTEORDER == CYG_MSBFIRST) -#define CFG_STATUS 0 -#define CFG_CMD 2 -#define CFG_CB_LINK_OFFSET 4 -#define CFG_BYTES 8 -#define CFG_SIZEOF 32 - // Note CFG CMD and STATUS swapped, so no need for endian conversion // in code. #define CFG_CMD_EL 0x0080 @@ -497,12 +693,6 @@ static inline cyg_uint32 bus_to_virt(cyg #else // Little-endian -#define CFG_CMD 0 -#define CFG_STATUS 2 -#define CFG_CB_LINK_OFFSET 4 -#define CFG_BYTES 8 -#define CFG_SIZEOF 32 - #define CFG_CMD_EL 0x8000 #define CFG_CMD_SUSPEND 0x4000 #define CFG_CMD_INT 0x2000 @@ -514,6 +704,26 @@ static inline cyg_uint32 bus_to_virt(cyg #endif // CYG_BYTEORDER +#ifndef CYG_ADDRESSING_IS_GIBENDIAN + +// Normal addressing +#define CFG_STATUS 0 +#define CFG_CMD 2 +#define CFG_CB_LINK_OFFSET 4 +#define CFG_BYTES 8 +#define CFG_SIZEOF 32 + +#else // CYG_ADDRESSING_IS_GIBENDIAN + +// GIBENDIAN addressing; A0 and A1 are flipped: +#define CFG_STATUS 2 +#define CFG_CMD 0 +#define CFG_CB_LINK_OFFSET 4 +#define CFG_BYTES 8 +#define CFG_SIZEOF 32 + +#endif // CYG_ADDRESSING_IS_GIBENDIAN + // ------------------------------------------------------------------------ // @@ -597,14 +807,15 @@ static void ResetRxRing(struct i82559* p static void InitTxRing(struct i82559* p_i82559); static void ResetTxRing(struct i82559* p_i82559); -static int eth_set_config(struct i82559* p_i82559); - +static void +eth_dsr(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data); +static cyg_uint32 +eth_isr(cyg_vector_t vector, cyg_addrword_t data); + +static int i82559_configure(struct i82559* p_i82559, int promisc, int oversized); #ifdef CYGPKG_DEVS_ETH_INTEL_I82559_WRITE_EEPROM static void program_eeprom(cyg_uint32 , cyg_uint32 , cyg_uint8 * ); #endif -#ifdef CYGPKG_NET -static int eth_set_promiscuous_mode(struct i82559* p_i82559); -#endif // debugging/logging only: void dump_txcb(TxCB* p_txcb); @@ -623,57 +834,83 @@ typedef enum { WAIT_CU // wait before CU cmd } cmd_wait_t; -static // inline +static inline void wait_for_cmd_done(long scb_ioaddr, cmd_wait_t type) { register int status; register int wait; -#ifdef nDEBUG_82559 - os_printf(">%s %04x\n", __FUNCTION__, INW(scb_ioaddr + SCBCmd)); + wait = 0x100000; + do status = INW(scb_ioaddr + SCBCmd) /* nothing */ ; + while( (0 != ((CU_CMD_MASK | RU_CMD_MASK) & status)) && --wait >= 0); + + if ( wait <= 0 ) { + // Then we timed out; reset the device and try again... + OUTL(I82559_SELECTIVE_RESET, scb_ioaddr + SCBPort); +#ifdef CYGDBG_USE_ASSERTS + missed_interrupt.waitcmd_timeouts++; #endif - wait = 0x100000; - do status = INW(scb_ioaddr + SCBCmd) ; - while( (0 != ((CU_CMD_MASK | RU_CMD_MASK) & status)) && --wait >= 0); -#ifdef nDEBUG_82559 - os_printf(">%s %04x\n", __FUNCTION__, INW(scb_ioaddr + SCBCmd)); -#endif + wait = 0x100000; + do status = INW(scb_ioaddr + SCBCmd) /* nothing */; + while( (0 != ((CU_CMD_MASK | RU_CMD_MASK) & status)) && --wait >= 0); + } + CYG_ASSERT( wait > 0, "wait_for_cmd_done: cmd busy" ); if (WAIT_CU == type) { // Also check CU is idle -#ifdef nDEBUG_82559 - os_printf(">%s %04x\n", __FUNCTION__, INW(scb_ioaddr + SCBStatus)); + wait = 0x100000; + do status = INW(scb_ioaddr + SCBStatus) /* nothing */; + while( (status & CU_STATUS_MASK) && --wait >= 0); + if ( wait <= 0 ) { + // Then we timed out; reset the device and try again... + OUTL(I82559_SELECTIVE_RESET, scb_ioaddr + SCBPort); +#ifdef CYGDBG_USE_ASSERTS + missed_interrupt.waitcmd_timeouts_cu++; #endif - wait = 0x100000; - do status = INW(scb_ioaddr + SCBStatus) ; - while( (status & CU_STATUS_MASK) && --wait >= 0); -#ifdef nDEBUG_82559 - os_printf("<%s %04x\n", __FUNCTION__, INW(scb_ioaddr + SCBStatus)); -#endif + wait = 0x100000; + do status = INW(scb_ioaddr + SCBCmd) /* nothing */; + while( (0 != ((CU_CMD_MASK | RU_CMD_MASK) & status)) && --wait >= 0); + } + CYG_ASSERT( wait > 0, "wait_for_cmd_done: CU busy" ); + } else if (WAIT_RU == type) { // Can't see any active state in the doc to check for } } -// Short circuit the drv_interrupt_XXX API once we are started: +// ------------------------------------------------------------------------ + +externC void hal_delay_us(int); +static void +udelay(int delay) +{ + hal_delay_us(delay); +} + +// ------------------------------------------------------------------------ +// If we are demuxing for all interrupt sources, we must mask and unmask +// *all* interrupt sources together. static inline int Mask82559Interrupt(struct i82559* p_i82559) { int old = 0; +#ifdef CYGPRI_DEVS_ETH_INTEL_I82559_MASK_INTERRUPTS + CYGPRI_DEVS_ETH_INTEL_I82559_MASK_INTERRUPTS(p_i82559,old); +#else // if (query_enabled) old |= 1; cyg_drv_interrupt_mask(p_i82559->vector); -#ifdef CYGNUM_DEVS_ETH_INTEL_I82559_MUX_INTERRUPT +#ifdef CYGNUM_DEVS_ETH_INTEL_I82559_SEPARATE_MUX_INTERRUPT // if (query_enabled) old |= 2; - cyg_drv_interrupt_mask(CYGNUM_DEVS_ETH_INTEL_I82559_MUX_INTERRUPT); + cyg_drv_interrupt_mask(CYGNUM_DEVS_ETH_INTEL_I82559_SEPARATE_MUX_INTERRUPT); #endif - +#endif /* it may prove necessary to do something like this if ( mybits != (mybits & old) ) /# then at least one of them was disabled, so @@ -687,22 +924,31 @@ Mask82559Interrupt(struct i82559* p_i825 static inline void UnMask82559Interrupt(struct i82559* p_i82559, int old) { +#ifdef CYGPRI_DEVS_ETH_INTEL_I82559_UNMASK_INTERRUPTS + CYGPRI_DEVS_ETH_INTEL_I82559_UNMASK_INTERRUPTS(p_i82559,old); +#else // We must only unmask (enable) those which were unmasked before, // according to the bits in old. if (old & 1) cyg_drv_interrupt_unmask(p_i82559->vector); -#ifdef CYGNUM_DEVS_ETH_INTEL_I82559_MUX_INTERRUPT +#ifdef CYGNUM_DEVS_ETH_INTEL_I82559_SEPARATE_MUX_INTERRUPT if (old & 2) - cyg_drv_interrupt_mask(CYGNUM_DEVS_ETH_INTEL_I82559_MUX_INTERRUPT); + cyg_drv_interrupt_mask(CYGNUM_DEVS_ETH_INTEL_I82559_SEPARATE_MUX_INTERRUPT); +#endif #endif } -static void + +static inline void Acknowledge82559Interrupt(struct i82559* p_i82559) { +#ifdef CYGPRI_DEVS_ETH_INTEL_I82559_ACK_INTERRUPTS + CYGPRI_DEVS_ETH_INTEL_I82559_ACK_INTERRUPTS(p_i82559); +#else cyg_drv_interrupt_acknowledge(p_i82559->vector); -#ifdef CYGNUM_DEVS_ETH_INTEL_I82559_MUX_INTERRUPT - cyg_drv_interrupt_acknowledge(CYGNUM_DEVS_ETH_INTEL_I82559_MUX_INTERRUPT); +#ifdef CYGNUM_DEVS_ETH_INTEL_I82559_SEPARATE_MUX_INTERRUPT + cyg_drv_interrupt_acknowledge(CYGNUM_DEVS_ETH_INTEL_I82559_SEPARATE_MUX_INTERRUPT); +#endif #endif #ifdef CYGPRI_DEVS_ETH_INTEL_I82559_INTERRUPT_ACK_LOOP @@ -711,11 +957,33 @@ Acknowledge82559Interrupt(struct i82559* } -externC void hal_delay_us(int); -static void -udelay(int delay) +static inline void +Check82559TxLockupTimeout(struct i82559* p_i82559) { - hal_delay_us(delay); +#ifdef CYGHWR_DEVS_ETH_INTEL_I82559_RESET_TIMEOUT +#ifdef CYGHWR_DEVS_ETH_INTEL_I82559_TIMEOUT_FIRED + int ints = Mask82559Interrupt(p_i82559); + if ( p_i82559->tx_in_progress && + (p_i82559->tx_descriptor_timeout == p_i82559->tx_descriptor_active) ) { + if ( CYGHWR_DEVS_ETH_INTEL_I82559_TIMEOUT_FIRED( p_i82559->platform_timeout ) ) { + // Then reset the device; the TX unit is locked up. + cyg_uint32 ioaddr = p_i82559->io_address; + // Wait some time afterwards for chip to settle. + OUTL(I82559_SELECTIVE_RESET, ioaddr + SCBPort); +#ifdef CYGDBG_USE_ASSERTS + missed_interrupt.lockup_timeouts++; +#endif + udelay(20); + } + } + else { + // All is well: + CYGHWR_DEVS_ETH_INTEL_I82559_RESET_TIMEOUT( p_i82559->platform_timeout ); + p_i82559->tx_descriptor_timeout = p_i82559->tx_descriptor_active; + } + UnMask82559Interrupt(p_i82559,ints); +#endif +#endif } // ------------------------------------------------------------------------ @@ -761,6 +1029,7 @@ pciwindow_mem_alloc(int size) // GET EEPROM SIZE // // ------------------------------------------------------------------------ +#ifndef CYGHWR_DEVS_ETH_INTEL_I82559_HAS_NO_EEPROM static int get_eeprom_size(long ioaddr) { @@ -913,6 +1182,7 @@ read_eeprom(long ioaddr, int location, i return retval; } +#endif // ! CYGHWR_DEVS_ETH_INTEL_I82559_HAS_NO_EEPROM // ------------------------------------------------------------------------ // @@ -1019,7 +1289,8 @@ i82559_init(struct cyg_netdevtab_entry * HAL_LE32TOC(p_selftest[0])); #endif - // FIXME: free self-test memory? + // free self-test memory? + // No, there's no point: this "heap" does not support free. if (p_i82559->hardwired_esa) { // Hardwire the address without consulting the EEPROM. @@ -1033,7 +1304,20 @@ i82559_init(struct cyg_netdevtab_entry * mac_address[5] = p_i82559->mac_address[5]; eth_set_mac_address(p_i82559, mac_address); + } else { + + // Acquire the ESA either from extenal means (probably RedBoot + // variables) or from the attached EEPROM - if there is one. + +#ifdef CYGHWR_DEVS_ETH_INTEL_I82559_GET_ESA + int ok = false; + CYGHWR_DEVS_ETH_INTEL_I82559_GET_ESA( p_i82559, mac_address, ok ); + if ( ok ) + eth_set_mac_address(p_i82559, mac_address); + +#else // ! CYGHWR_DEVS_ETH_INTEL_I82559_GET_ESA +#ifndef CYGHWR_DEVS_ETH_INTEL_I82559_HAS_NO_EEPROM int addr_length, i; cyg_uint16 checksum; @@ -1093,10 +1377,12 @@ i82559_init(struct cyg_netdevtab_entry * p_i82559->mac_address[3] = mac_address[3]; p_i82559->mac_address[4] = mac_address[4]; p_i82559->mac_address[5] = mac_address[5]; +#endif // ! CYGHWR_DEVS_ETH_INTEL_I82559_HAS_NO_EEPROM +#endif // ! CYGHWR_DEVS_ETH_INTEL_I82559_GET_ESA } #ifdef DEBUG - os_printf("MAC Address = %02X %02X %02X %02X %02X %02X\n", + os_printf("i82559_init: MAC Address = %02X %02X %02X %02X %02X %02X\n", p_i82559->mac_address[0], p_i82559->mac_address[1], p_i82559->mac_address[2], p_i82559->mac_address[3], p_i82559->mac_address[4], p_i82559->mac_address[5]); @@ -1105,6 +1391,8 @@ i82559_init(struct cyg_netdevtab_entry * // and record the net dev pointer p_i82559->ndp = (void *)ndp; + p_i82559->within_send = 0; // init recursion level + InitRxRing(p_i82559); InitTxRing(p_i82559); @@ -1173,12 +1461,12 @@ i82559_start( struct eth_drv_sc *sc, uns // ...and wait for it to complete operation count = 1000; do { - HAL_READ_UINT16((cyg_uint8*)p_statistics + CFG_STATUS, status); + READMEM16((cyg_uint8*)p_statistics + CFG_STATUS, status); udelay(1); } while (0 == (status & CFG_STATUS_C) && (count-- > 0)); #ifdef CYGDBG_USE_ASSERTS { - HAL_READ_UINT16((cyg_uint8*)p_statistics + CFG_STATUS, status); + READMEM16((cyg_uint8*)p_statistics + CFG_STATUS, status); CYG_ASSERT((CFG_STATUS_C | CFG_STATUS_OK) == (status & (CFG_STATUS_C | CFG_STATUS_OK)), "Dump stat command incomplete/failedd"); @@ -1189,18 +1477,21 @@ i82559_start( struct eth_drv_sc *sc, uns // Enable device p_i82559->active = 1; - eth_set_config(p_i82559); - + + /* Enable promiscuous mode if requested, reception of oversized frames always. + * The latter is needed for VLAN support and shouldn't hurt even if we're not + * using VLANs. + */ + i82559_configure(p_i82559, 0 #ifdef CYGPKG_NET - if (( 0 + || !!(ifp->if_flags & IFF_PROMISC) +#endif #ifdef ETH_DRV_FLAGS_PROMISC_MODE - != (flags & ETH_DRV_FLAGS_PROMISC_MODE) + || !!(flags & ETH_DRV_FLAGS_PROMISC_MODE) #endif - ) || (ifp->if_flags & IFF_PROMISC) - ) { - eth_set_promiscuous_mode(p_i82559); - } -#endif + , 1); + + #ifdef DEBUG { int status = i82559_status( sc ); @@ -1297,11 +1588,11 @@ InitRxRing(struct i82559* p_i82559) rfd = (RFD *)pciwindow_mem_alloc(RFD_SIZEOF + MAX_RX_PACKET_SIZE); p_i82559->rx_ring[i] = rfd; if ( i ) - HAL_WRITE_UINT32(p_rfd+RFD_LINK, HAL_CTOLE32(VIRT_TO_BUS(rfd))); + WRITEMEM32(p_rfd+RFD_LINK, HAL_CTOLE32(VIRT_TO_BUS(rfd))); p_rfd = (RFD *)rfd; } // link last RFD to first: - HAL_WRITE_UINT32(p_rfd+RFD_LINK, + WRITEMEM32(p_rfd+RFD_LINK, HAL_CTOLE32(VIRT_TO_BUS(p_i82559->rx_ring[0]))); ResetRxRing( p_i82559 ); @@ -1329,24 +1620,24 @@ ResetRxRing(struct i82559* p_i82559) RFD *p_rfd2; cyg_uint32 link; p_rfd2 = p_i82559->rx_ring[ ( i ? (i-1) : (MAX_RX_DESCRIPTORS-1) ) ]; - HAL_READ_UINT32(p_rfd2 + RFD_LINK, link); + READMEM32(p_rfd2 + RFD_LINK, link); CYG_ASSERT( HAL_LE32TOC(link) == VIRT_TO_BUS(p_rfd), "rfd linked list broken" ); } #endif - HAL_WRITE_UINT32(p_rfd + RFD_STATUS, /*0*/RFD_STATUS_S); - HAL_WRITE_UINT16(p_rfd + RFD_COUNT, 0); - HAL_WRITE_UINT32(p_rfd + RFD_RDB_ADDR, HAL_CTOLE32(0xFFFFFFFF)); - HAL_WRITE_UINT16(p_rfd + RFD_SIZE, HAL_CTOLE16(MAX_RX_PACKET_SIZE)); + WRITEMEM32(p_rfd + RFD_STATUS, 0 ); // do NOT suspend after just one rx + WRITEMEM16(p_rfd + RFD_COUNT, 0); + WRITEMEM32(p_rfd + RFD_RDB_ADDR, HAL_CTOLE32(0xFFFFFFFF)); + WRITEMEM16(p_rfd + RFD_SIZE, HAL_CTOLE16(MAX_RX_PACKET_SIZE)); } p_i82559->next_rx_descriptor = 0; // And set an end-of-list marker in the previous one. - HAL_WRITE_UINT32(p_rfd + RFD_STATUS, RFD_STATUS_EL); + WRITEMEM32(p_rfd + RFD_STATUS, RFD_STATUS_EL); } // ------------------------------------------------------------------------ // -// Function : PacketRxReady (Called from delivery thread) +// Function : PacketRxReady (Called from delivery thread & foreground) // // ------------------------------------------------------------------------ static void @@ -1376,15 +1667,15 @@ PacketRxReady(struct i82559* p_i82559) while ( 1 ) { cyg_uint32 rxstatus; cyg_uint16 rxstatus_hi; - HAL_READ_UINT32(p_rfd + RFD_STATUS, rxstatus); + READMEM32(p_rfd + RFD_STATUS, rxstatus); if (0 == (rxstatus & RFD_STATUS_C)) break; - HAL_READ_UINT16(p_rfd + RFD_STATUS_HI, rxstatus_hi); + READMEM16(p_rfd + RFD_STATUS_HI, rxstatus_hi); rxstatus_hi |= RFD_STATUS_HI_EL; - HAL_WRITE_UINT16(p_rfd + RFD_STATUS_HI, rxstatus_hi); - - HAL_READ_UINT16(p_rfd + RFD_COUNT, length); + WRITEMEM16(p_rfd + RFD_STATUS_HI, rxstatus_hi); + + READMEM16(p_rfd + RFD_COUNT, length); length = HAL_LE16TOC(length); length &= RFD_COUNT_MASK; @@ -1403,8 +1694,8 @@ PacketRxReady(struct i82559* p_i82559) #endif (sc->funs->eth_drv->recv)( sc, length ); - HAL_WRITE_UINT16(p_rfd + RFD_COUNT, 0); - HAL_WRITE_UINT16(p_rfd + RFD_STATUS_LO, 0); + WRITEMEM16(p_rfd + RFD_COUNT, 0); + WRITEMEM16(p_rfd + RFD_STATUS_LO, 0); // The just-emptied slot is now ready for re-use and already marked EL; // we can now remove the EL marker from the previous one. @@ -1413,10 +1704,10 @@ PacketRxReady(struct i82559* p_i82559) else p_rfd = p_i82559->rx_ring[ next_descriptor-1 ]; // The previous one: check it *was* marked before clearing. - HAL_READ_UINT16(p_rfd + RFD_STATUS_HI, rxstatus_hi); + READMEM16(p_rfd + RFD_STATUS_HI, rxstatus_hi); CYG_ASSERT( rxstatus_hi & RFD_STATUS_HI_EL, "No prev EL" ); // that word is not written by the device. - HAL_WRITE_UINT16(p_rfd + RFD_STATUS_HI, 0); + WRITEMEM16(p_rfd + RFD_STATUS_HI, 0); #ifdef KEEP_STATISTICS statistics[p_i82559->index].rx_deliver++; @@ -1470,6 +1761,7 @@ i82559_recv( struct eth_drv_sc *sc, stru struct eth_drv_sg *last_sg; volatile cyg_uint8 *from_p; cyg_uint32 rxstatus; + cyg_uint16 rxstatus16; p_i82559 = (struct i82559 *)sc->driver_private; @@ -1486,16 +1778,18 @@ i82559_recv( struct eth_drv_sc *sc, stru CYG_ASSERT( (cyg_uint8 *)p_rfd >= i82559_heap_base, "rfd under" ); CYG_ASSERT( (cyg_uint8 *)p_rfd < i82559_heap_free, "rfd over" ); - HAL_READ_UINT32(p_rfd + RFD_STATUS, rxstatus); + READMEM32(p_rfd + RFD_STATUS, rxstatus); CYG_ASSERT( rxstatus & RFD_STATUS_C, "No complete frame" ); CYG_ASSERT( rxstatus & RFD_STATUS_EL, "No marked frame" ); - CYG_ASSERT( rxstatus & RFD_STATUS_C, "No complete frame 2" ); - CYG_ASSERT( rxstatus & RFD_STATUS_EL, "No marked frame 2" ); + READMEM16(p_rfd + RFD_STATUS_LO, rxstatus16 ); + CYG_ASSERT( rxstatus16 & RFD_STATUS_LO_C, "No complete frame 2" ); + READMEM16(p_rfd + RFD_STATUS_HI, rxstatus16 ); + CYG_ASSERT( rxstatus16 & RFD_STATUS_HI_EL, "No marked frame 2" ); if ( 0 == (rxstatus & RFD_STATUS_C) ) return; - HAL_READ_UINT16(p_rfd + RFD_COUNT, total_len); + READMEM16(p_rfd + RFD_COUNT, total_len); total_len = HAL_LE16TOC(total_len); total_len &= RFD_COUNT_MASK; @@ -1593,17 +1887,21 @@ ResetTxRing(struct i82559* p_i82559) CYG_ASSERT( (cyg_uint8 *)p_txcb >= i82559_heap_base, "txcb under" ); CYG_ASSERT( (cyg_uint8 *)p_txcb < i82559_heap_free, "txcb over" ); - HAL_WRITE_UINT16(p_txcb + TxCB_STATUS, 0); - HAL_WRITE_UINT16(p_txcb + TxCB_CMD, 0); - HAL_WRITE_UINT32(p_txcb + TxCB_LINK, + WRITEMEM16(p_txcb + TxCB_STATUS, 0); + WRITEMEM16(p_txcb + TxCB_CMD, 0); + WRITEMEM32(p_txcb + TxCB_LINK, HAL_CTOLE32(VIRT_TO_BUS((cyg_uint32)p_txcb))); - HAL_WRITE_UINT32(p_txcb + TxCB_TBD_ADDR, HAL_CTOLE32(0xFFFFFFFF)); - HAL_WRITE_UINT8(p_txcb + TxCB_TBD_NUMBER, 0); - HAL_WRITE_UINT8(p_txcb + TxCB_TX_THRESHOLD, 16); - HAL_WRITE_UINT16(p_txcb + TxCB_COUNT, + WRITEMEM32(p_txcb + TxCB_TBD_ADDR, HAL_CTOLE32(0xFFFFFFFF)); + WRITEMEM8(p_txcb + TxCB_TBD_NUMBER, 0); + WRITEMEM8(p_txcb + TxCB_TX_THRESHOLD, 16); + WRITEMEM16(p_txcb + TxCB_COUNT, HAL_CTOLE16(TxCB_COUNT_EOF | 0)); p_i82559->tx_keys[i] = 0; } + + wait_for_cmd_done(ioaddr,WAIT_CU); + OUTL(0, ioaddr + SCBPointer); + OUTW(SCB_M | CU_ADDR_LOAD, ioaddr + SCBCmd); } // ------------------------------------------------------------------------ @@ -1646,7 +1944,11 @@ TxMachine(struct i82559* p_i82559) && p_i82559->tx_descriptor_add != tx_descriptor_active ) { TxCB *p_txcb = p_i82559->tx_ring[tx_descriptor_active]; cyg_uint16 status; + + // start Tx operation + wait_for_cmd_done(ioaddr, WAIT_CU); status = INW(ioaddr + SCBStatus); + CYG_ASSERT( ( 0 == (status & CU_STATUS_MASK)), "CU not idle"); CYG_ASSERT( (cyg_uint8 *)p_txcb >= i82559_heap_base, "txcb under" ); CYG_ASSERT( (cyg_uint8 *)p_txcb < i82559_heap_free, "txcb over" ); @@ -1658,8 +1960,6 @@ TxMachine(struct i82559* p_i82559) } #endif - // start Tx operation - wait_for_cmd_done(ioaddr, WAIT_CU); OUTL(VIRT_TO_BUS(p_txcb), ioaddr + SCBPointer); OUTW(CU_START, ioaddr + SCBCmd); p_i82559->tx_in_progress = 1; @@ -1688,15 +1988,17 @@ TxDone(struct i82559* p_i82559) // "Done" txen are from here to active, OR // the remove one if the queue is full AND its status is nonzero: - while ( (tx_descriptor_remove != p_i82559->tx_descriptor_active) || - ( p_i82559->tx_queue_full) ) { - + while ( 1 ) { cyg_uint16 txstatus; TxCB *p_txcb = p_i82559->tx_ring[ tx_descriptor_remove ]; unsigned long key = p_i82559->tx_keys[ tx_descriptor_remove ]; - HAL_READ_UINT16(p_txcb + TxCB_STATUS, txstatus); - if (0 == txstatus) + READMEM16(p_txcb + TxCB_STATUS, txstatus); + + // Break out if "remove" is the active slot + // (AND the Q is not full, or the Tx is not complete yet) + if ( (tx_descriptor_remove == p_i82559->tx_descriptor_active) && + ( ( ! p_i82559->tx_queue_full) || (0 == txstatus) ) ) break; #ifdef DEBUG_82559 @@ -1736,12 +2038,60 @@ i82559_can_send(struct eth_drv_sc *sc) // Advance TxMachine atomically ints = Mask82559Interrupt(p_i82559); + + // This helps unstick deadly embraces. + CYG_ASSERT( p_i82559->within_send < 10, "send: Excess send recursions" ); + p_i82559->within_send++; + +#ifdef CYGHWR_DEVS_ETH_INTEL_I82559_DEMUX_ALL + { + int i; + // The problem is, if DEMUX_ALL, either device can eat the other's + // interrupts; so we must poll them *both*: + for (i = 0; i < CYGNUM_DEVS_ETH_INTEL_I82559_DEV_COUNT; i++) { + p_i82559 = i82559_priv_array[i]; + if ( p_i82559->active ) { + // See if the Tx machine is wedged - reset if so: + Check82559TxLockupTimeout(p_i82559); + TxMachine(p_i82559); + Acknowledge82559Interrupt(p_i82559); + PacketRxReady(p_i82559); +#ifdef CYGHWR_DEVS_ETH_INTEL_I82559_MISSED_INTERRUPT + if ( CYGHWR_DEVS_ETH_INTEL_I82559_MISSED_INTERRUPT(p_i82559) ) { +#ifdef CYGDBG_USE_ASSERTS + missed_interrupt.can_send++; +#endif + eth_isr( p_i82559->vector, (cyg_addrword_t)p_i82559 ); + eth_dsr( p_i82559->vector, 1, (cyg_addrword_t)p_i82559 ); + } +#endif + } + } + } + // ensure we look at the correct device at the end + p_i82559 = (struct i82559 *)sc->driver_private; +#else // no CYGHWR_DEVS_ETH_INTEL_I82559_DEMUX_ALL + + // See if the Tx machine is wedged - reset if so: + Check82559TxLockupTimeout(p_i82559); TxMachine(p_i82559); Acknowledge82559Interrupt(p_i82559); // This can eat an Rx interrupt, so PacketRxReady(p_i82559); +#ifdef CYGHWR_DEVS_ETH_INTEL_I82559_MISSED_INTERRUPT + if ( CYGHWR_DEVS_ETH_INTEL_I82559_MISSED_INTERRUPT(p_i82559) ) { +#ifdef CYGDBG_USE_ASSERTS + missed_interrupt.can_send++; +#endif + eth_isr( p_i82559->vector, (cyg_addrword_t)p_i82559 ); + eth_dsr( p_i82559->vector, 1, (cyg_addrword_t)p_i82559 ); + } +#endif +#endif // no CYGHWR_DEVS_ETH_INTEL_I82559_DEMUX_ALL + + p_i82559->within_send--; UnMask82559Interrupt(p_i82559,ints); - return ! p_i82559->tx_queue_full; + return (0 == p_i82559->within_send) && ! p_i82559->tx_queue_full; } // ------------------------------------------------------------------------ @@ -1781,6 +2131,9 @@ i82559_send(struct eth_drv_sc *sc, #endif ioaddr = p_i82559->io_address; // get device I/O address + // See if the Tx machine is wedged - reset if so: + Check82559TxLockupTimeout(p_i82559); + if ( p_i82559->tx_queue_full ) { #ifdef KEEP_STATISTICS statistics[p_i82559->index].tx_dropped++; @@ -1803,17 +2156,17 @@ i82559_send(struct eth_drv_sc *sc, CYG_ASSERT( (cyg_uint8 *)p_txcb >= i82559_heap_base, "txcb under" ); CYG_ASSERT( (cyg_uint8 *)p_txcb < i82559_heap_free, "txcb over" ); - HAL_WRITE_UINT16(p_txcb + TxCB_STATUS, 0); - HAL_WRITE_UINT16(p_txcb + TxCB_CMD, + WRITEMEM16(p_txcb + TxCB_STATUS, 0); + WRITEMEM16(p_txcb + TxCB_CMD, (TxCB_CMD_TRANSMIT | TxCB_CMD_S | TxCB_CMD_I | TxCB_CMD_EL)); - HAL_WRITE_UINT32(p_txcb + TxCB_LINK, + WRITEMEM32(p_txcb + TxCB_LINK, HAL_CTOLE32(VIRT_TO_BUS((cyg_uint32)p_txcb))); - HAL_WRITE_UINT32(p_txcb + TxCB_TBD_ADDR, + WRITEMEM32(p_txcb + TxCB_TBD_ADDR, HAL_CTOLE32(0xFFFFFFFF)); - HAL_WRITE_UINT8(p_txcb + TxCB_TBD_NUMBER, 0); - HAL_WRITE_UINT8(p_txcb + TxCB_TX_THRESHOLD, 16); - HAL_WRITE_UINT16(p_txcb + TxCB_COUNT, + WRITEMEM8(p_txcb + TxCB_TBD_NUMBER, 0); + WRITEMEM8(p_txcb + TxCB_TX_THRESHOLD, 16); + WRITEMEM16(p_txcb + TxCB_COUNT, HAL_CTOLE16(TxCB_COUNT_EOF | total_len)); // Copy from the sglist into the txcb @@ -1863,6 +2216,10 @@ i82559_send(struct eth_drv_sc *sc, // no more interrupts until started ints = Mask82559Interrupt(p_i82559); + // This helps unstick deadly embraces. + CYG_ASSERT( p_i82559->within_send < 10, "send: Excess send recursions" ); + p_i82559->within_send++; + // Check that either: // tx is already active, there is other stuff queued, // OR this tx just added is the current active one @@ -1878,10 +2235,30 @@ i82559_send(struct eth_drv_sc *sc, (p_i82559->tx_descriptor_add == p_i82559->tx_descriptor_active), "Active/add mismatch" ); +#ifdef CYGHWR_DEVS_ETH_INTEL_I82559_DEMUX_ALL + { + int i; + // The problem is, if DEMUX_ALL, either device can eat the other's + // interrupts; so we must poll them *both*: + for (i = 0; i < CYGNUM_DEVS_ETH_INTEL_I82559_DEV_COUNT; i++) { + p_i82559 = i82559_priv_array[i]; + if ( p_i82559->active ) { + TxMachine(p_i82559); + Acknowledge82559Interrupt(p_i82559); + PacketRxReady(p_i82559); + } + } + } + // ensure we look at the correct device at the end + p_i82559 = (struct i82559 *)sc->driver_private; +#else // no CYGHWR_DEVS_ETH_INTEL_I82559_DEMUX_ALL // Advance TxMachine atomically TxMachine(p_i82559); Acknowledge82559Interrupt(p_i82559); // This can eat an Rx interrupt, so PacketRxReady(p_i82559); +#endif // no CYGHWR_DEVS_ETH_INTEL_I82559_DEMUX_ALL + + p_i82559->within_send--; UnMask82559Interrupt(p_i82559, ints); } @@ -1970,7 +2347,8 @@ eth_isr(cyg_vector_t vector, cyg_addrwor // ------------------------------------------------------------------------ -#ifdef CYGNUM_DEVS_ETH_INTEL_I82559_MUX_INTERRUPT +#if defined( CYGNUM_DEVS_ETH_INTEL_I82559_SEPARATE_MUX_INTERRUPT ) || \ + defined( CYGHWR_DEVS_ETH_INTEL_I82559_DEMUX_ALL ) static cyg_uint32 eth_mux_isr(cyg_vector_t vector, cyg_addrword_t data) { @@ -1992,6 +2370,10 @@ eth_mux_isr(cyg_vector_t vector, cyg_add static void eth_dsr(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data) { + // This conditioning out is necessary because of explicit calls to this + // DSR - which would not ever be called in the case of a polled mode + // usage ie. in RedBoot. +#ifdef CYGPKG_IO_ETH_DRIVERS_NET struct i82559* p_i82559 = (struct i82559 *)data; struct cyg_netdevtab_entry *ndp = (struct cyg_netdevtab_entry *)(p_i82559->ndp); @@ -1999,39 +2381,101 @@ eth_dsr(cyg_vector_t vector, cyg_ucount3 // but here, it must be a *sc: eth_drv_dsr( vector, count, (cyg_addrword_t)sc ); +#else +# ifndef CYGPKG_REDBOOT +# error Empty i82559 ethernet DSR is compiled. Is this what you want? +# endif +#endif } // ------------------------------------------------------------------------ -// This is called from the function below (used to be uni-DSR) +// Deliver routine: +#if defined( CYGNUM_DEVS_ETH_INTEL_I82559_SEPARATE_MUX_INTERRUPT ) || \ + defined( CYGHWR_DEVS_ETH_INTEL_I82559_DEMUX_ALL ) + +void +i82559_deliver(struct eth_drv_sc *sc) +{ + int i; + struct i82559* p_i82559; + +#ifdef CYGHWR_DEVS_ETH_INTEL_I82559_MISSED_INTERRUPT + again: +#endif + + // Since this must mux all devices, the incoming arg is ignored. + for (i = 0; i < CYGNUM_DEVS_ETH_INTEL_I82559_DEV_COUNT; i++) { + p_i82559 = i82559_priv_array[i]; + if ( p_i82559->active ) { + + // See if the Tx machine is wedged - reset if so: + Check82559TxLockupTimeout(p_i82559); + + // First pass any rx data up the stack + PacketRxReady(p_i82559); + + // Then scan for completed Txen and inform the stack + TxDone(p_i82559); + } + } + +#ifdef CYGHWR_DEVS_ETH_INTEL_I82559_MISSED_INTERRUPT + { + int retry = 0; + for (i = 0; i < CYGNUM_DEVS_ETH_INTEL_I82559_DEV_COUNT; i++) { + p_i82559 = i82559_priv_array[i]; + if ( p_i82559->active ) { + if ( CYGHWR_DEVS_ETH_INTEL_I82559_MISSED_INTERRUPT(p_i82559) ) { + int ints = Mask82559Interrupt(p_i82559); + retry++; +#ifdef CYGDBG_USE_ASSERTS + missed_interrupt.deliver++; +#endif + eth_isr( p_i82559->vector, (cyg_addrword_t)p_i82559 ); + UnMask82559Interrupt(p_i82559,ints); + } + } + + } + if ( retry ) + goto again; + } +#endif +} + +#else // no CYGHWR_DEVS_ETH_INTEL_I82559_DEMUX_ALL : Simplex version: + void i82559_deliver(struct eth_drv_sc *sc) { struct i82559* p_i82559 = (struct i82559 *)(sc->driver_private); +#ifdef CYGHWR_DEVS_ETH_INTEL_I82559_MISSED_INTERRUPT + again: +#endif + // See if the Tx machine is wedged - reset if so: + Check82559TxLockupTimeout(p_i82559); + // First pass any rx data up the stack PacketRxReady(p_i82559); // Then scan for completed Txen and inform the stack TxDone(p_i82559); + +#ifdef CYGHWR_DEVS_ETH_INTEL_I82559_MISSED_INTERRUPT + if ( CYGHWR_DEVS_ETH_INTEL_I82559_MISSED_INTERRUPT(p_i82559) ) { + int ints = Mask82559Interrupt(p_i82559); +#ifdef CYGDBG_USE_ASSERTS + missed_interrupt.deliver++; +#endif + eth_isr( p_i82559->vector, (cyg_addrword_t)p_i82559 ); + UnMask82559Interrupt(p_i82559,ints); + goto again; + } +#endif } - -// ------------------------------------------------------------------------ - -#ifdef CYGNUM_DEVS_ETH_INTEL_I82559_MUX_INTERRUPT -static void -mux_deliver(struct eth_drv_sc *sc) -{ - int i; - - // Since this must mux all devices, the incoming arg is ignored. - for (i = 0; i < CYGNUM_DEVS_ETH_INTEL_I82559_DEV_COUNT; i++) { - sc = i82559_sc_array[i]; - if ( p_i82559->active ) - i82559_deliver( sc ); - } -} -#endif +#endif // no CYGHWR_DEVS_ETH_INTEL_I82559_DEMUX_ALL // ------------------------------------------------------------------------ // Device table entry to operate the chip in a polled mode. @@ -2104,6 +2548,20 @@ i82559_int_op( struct eth_drv_sc *sc, in // o instantiate interrupts for them // o attach those interrupts appropriately // ------------------------------------------------------------------------ +static cyg_pci_match_func find_82559s_match_func; + +// Intel 82559 and 82557 are virtually identical, with different +// dev codes; also 82559ER (cutdown) = 0x1209. +static cyg_bool +find_82559s_match_func( cyg_uint16 v, cyg_uint16 d, cyg_uint32 c, void *p ) +{ + return + (0x8086 == v) && + ((0x1030 == d) || + (0x1229 == d) || + (0x1209 == d)); +} + static int pci_init_find_82559s( void ) { @@ -2125,14 +2583,25 @@ pci_init_find_82559s( void ) return 0; } +#ifdef CYGARC_UNCACHED_ADDRESS CYG_ASSERT( CYGARC_UNCACHED_ADDRESS((CYG_ADDRWORD)CYGMEM_SECTION_pci_window) == CYGHWR_INTEL_I82559_PCI_MEM_MAP_BASE, "PCI window configured does not match PCI memory section base" ); +#else + CYG_ASSERT( (CYG_ADDRWORD)CYGMEM_SECTION_pci_window == + CYGHWR_INTEL_I82559_PCI_MEM_MAP_BASE, + "PCI window configured does not match PCI memory section base" ); +#endif CYG_ASSERT( CYGMEM_SECTION_pci_window_SIZE == CYGHWR_INTEL_I82559_PCI_MEM_MAP_SIZE, "PCI window configured does not match PCI memory section size" ); - if ( CYGARC_UNCACHED_ADDRESS((CYG_ADDRWORD)CYGMEM_SECTION_pci_window) != + if ( +#ifdef CYGARC_UNCACHED_ADDRESS + CYGARC_UNCACHED_ADDRESS((CYG_ADDRWORD)CYGMEM_SECTION_pci_window) != +#else + (CYG_ADDRWORD)CYGMEM_SECTION_pci_window != +#endif CYGHWR_INTEL_I82559_PCI_MEM_MAP_BASE || CYGMEM_SECTION_pci_window_SIZE != @@ -2164,16 +2633,16 @@ pci_init_find_82559s( void ) p_i82559->index = device_index; - // Intel 82559 and 82557 are virtually identical, - // with different dev codes - if (cyg_pci_find_device(0x8086, 0x1030, &devid) || - cyg_pci_find_device(0x8086, 0x1209, &devid) || - cyg_pci_find_device(0x8086, 0x1229, &devid) ) { + // See above for find_82559s_match_func - it selects any of several + // variants. This is necessary in case we have multiple mixed-type + // devices on one board in arbitrary orders. + if (cyg_pci_find_matching( &find_82559s_match_func, NULL, &devid )) { #ifdef DEBUG db_printf("eth%d = 82559\n", device_index); #endif cyg_pci_get_device_info(devid, &dev_info); + p_i82559->interrupt_handle = 0; // Flag not attached. if (cyg_pci_translate_interrupt(&dev_info, &p_i82559->vector)) { #ifdef DEBUG db_printf(" Wired to HAL vector %d\n", p_i82559->vector); @@ -2182,7 +2651,11 @@ pci_init_find_82559s( void ) p_i82559->vector, 0, // Priority - unused (CYG_ADDRWORD)p_i82559, // Data item passed to ISR & DSR +#ifdef CYGHWR_DEVS_ETH_INTEL_I82559_DEMUX_ALL + eth_mux_isr, // ISR +#else eth_isr, // ISR +#endif eth_dsr, // DSR &p_i82559->interrupt_handle, // handle to intr obj &p_i82559->interrupt_object ); // space for int obj @@ -2191,7 +2664,7 @@ pci_init_find_82559s( void ) // Don't unmask the interrupt yet, that could get us into a // race. -#ifdef CYGNUM_DEVS_ETH_INTEL_I82559_MUX_INTERRUPT +#ifdef CYGNUM_DEVS_ETH_INTEL_I82559_SEPARATE_MUX_INTERRUPT // ALSO attach it to MUX interrupt for multiplexed // interrupts. This is for certain boards where the // PCI backplane is wired "straight through" instead of @@ -2204,10 +2677,10 @@ pci_init_find_82559s( void ) if ( ! mux_interrupt_handle ) { #ifdef DEBUG db_printf(" Also attaching to HAL vector %d\n", - CYGNUM_DEVS_ETH_INTEL_I82559_MUX_INTERRUPT); + CYGNUM_DEVS_ETH_INTEL_I82559_SEPARATE_MUX_INTERRUPT); #endif cyg_drv_interrupt_create( - CYGNUM_DEVS_ETH_INTEL_I82559_MUX_INTERRUPT, + CYGNUM_DEVS_ETH_INTEL_I82559_SEPARATE_MUX_INTERRUPT, 0, // Priority - unused (CYG_ADDRWORD)p_i82559,// Data item passed to ISR and DSR eth_mux_isr, // ISR @@ -2218,7 +2691,7 @@ pci_init_find_82559s( void ) cyg_drv_interrupt_attach(mux_interrupt_handle); } } -#endif // CYGNUM_DEVS_ETH_INTEL_I82559_MUX_INTERRUPT +#endif // CYGNUM_DEVS_ETH_INTEL_I82559_SEPARATE_MUX_INTERRUPT } else { p_i82559->vector=0; @@ -2283,7 +2756,8 @@ pci_init_find_82559s( void ) // interrupt i82559_reset(p_i82559); - if (p_i82559->vector != 0) { + // This is the indicator for "uses an interrupt" + if (p_i82559->interrupt_handle != 0) { cyg_drv_interrupt_acknowledge(p_i82559->vector); cyg_drv_interrupt_unmask(p_i82559->vector); } @@ -2312,11 +2786,11 @@ pci_init_find_82559s( void ) if (0 == found_devices) return 0; -#ifdef CYGNUM_DEVS_ETH_INTEL_I82559_MUX_INTERRUPT +#ifdef CYGNUM_DEVS_ETH_INTEL_I82559_SEPARATE_MUX_INTERRUPT // Now enable the mux shared interrupt if it is in use if (mux_interrupt_handle) { - cyg_drv_interrupt_acknowledge(CYGNUM_DEVS_ETH_INTEL_I82559_MUX_INTERRUPT); - cyg_drv_interrupt_unmask(CYGNUM_DEVS_ETH_INTEL_I82559_MUX_INTERRUPT); + cyg_drv_interrupt_acknowledge(CYGNUM_DEVS_ETH_INTEL_I82559_SEPARATE_MUX_INTERRUPT); + cyg_drv_interrupt_unmask(CYGNUM_DEVS_ETH_INTEL_I82559_SEPARATE_MUX_INTERRUPT); } #endif @@ -2328,88 +2802,15 @@ pci_init_find_82559s( void ) return 1; } -// This function is called to enable the device by setting the necessary -// minimum of the configuration. -static int -eth_set_config(struct i82559* p_i82559) -{ - cyg_uint32 ioaddr; - volatile CFG *ccs; - volatile cyg_uint8* config_bytes; - cyg_uint16 status; - int count; - - IF_BAD_82559( p_i82559 ) { -#ifdef DEBUG - os_printf( "eth_set_config: Bad device pointer %x\n", p_i82559 ); -#endif - return -1; - } - - ioaddr = p_i82559->io_address; - - // Check the malloc we did earlier worked - ccs = (CFG *)mem_reserved_ioctl; - if (ccs == (void*)0) - return 2; // Failed - - // Prepare header - HAL_WRITE_UINT16(ccs + CFG_CMD, - (CFG_CMD_EL | CFG_CMD_SUSPEND | CFG_CMD_CONFIGURE)); - HAL_WRITE_UINT16(ccs + CFG_STATUS, 0); - HAL_WRITE_UINT32(ccs + CFG_CB_LINK_OFFSET, - HAL_CTOLE32(VIRT_TO_BUS((cyg_uint32)ccs))); - - // Default values from the Intel Manual - config_bytes = ccs + CFG_BYTES; - config_bytes[0]=0x9; - config_bytes[1]=0xc; - config_bytes[2]=0x0; - config_bytes[3]=0x0; - config_bytes[4]=0x0; - config_bytes[5]=0x0; - config_bytes[6]=0x32; - config_bytes[7]=0x1; - // This is the bit we go through all the trouble for. Must be set - // before the device activates. - config_bytes[8]=0x1; - - // Let chip read configuration - wait_for_cmd_done(ioaddr, WAIT_CU); - OUTL(VIRT_TO_BUS(ccs), ioaddr + SCBPointer); - OUTW(SCB_M | CU_START, ioaddr + SCBCmd); - - // ...and wait for it to complete operation - count = 1000; - do { - HAL_READ_UINT16(ccs + CFG_STATUS, status); - udelay(1); - } while (0 == (status & CFG_STATUS_C) && (count-- > 0)); - - // Check status - if ((status & (CFG_STATUS_C | CFG_STATUS_OK)) - != (CFG_STATUS_C | CFG_STATUS_OK)) { - // Failed! -#ifdef DEBUG_82559 - os_printf("%s:%d Config update failed\n", __FUNCTION__, __LINE__); -#endif - return 1; - } - - return 0; -} - -#ifdef CYGPKG_NET // ------------------------------------------------------------------------ // -// Function : eth_set_promiscuous_mode +// Function : i82559_configure // // Return : 0 = It worked. // non0 = It failed. // ------------------------------------------------------------------------ -static int -eth_set_promiscuous_mode(struct i82559* p_i82559) +static int i82559_configure(struct i82559* p_i82559, int promisc, int oversized) { cyg_uint32 ioaddr; volatile CFG *ccs; @@ -2426,6 +2827,13 @@ eth_set_promiscuous_mode(struct i82559* } ioaddr = p_i82559->io_address; + wait_for_cmd_done(ioaddr, WAIT_CU); + // load cu base address = 0 */ + OUTL(0, ioaddr + SCBPointer); + // 32 bit linear addressing used + OUTW(SCB_M | CU_ADDR_LOAD, ioaddr + SCBCmd); + // wait for SCB command complete + wait_for_cmd_done(ioaddr, WAIT_CU); // Check the malloc we did earlier worked ccs = (CFG *)mem_reserved_ioctl; @@ -2433,60 +2841,68 @@ eth_set_promiscuous_mode(struct i82559* return 2; // Failed // Prepare header - HAL_WRITE_UINT16(ccs + CFG_CMD, + WRITEMEM16(ccs + CFG_CMD, (CFG_CMD_EL | CFG_CMD_SUSPEND | CFG_CMD_CONFIGURE)); - HAL_WRITE_UINT16(ccs + CFG_STATUS, 0); - HAL_WRITE_UINT32(ccs + CFG_CB_LINK_OFFSET, + WRITEMEM16(ccs + CFG_STATUS, 0); + WRITEMEM32(ccs + CFG_CB_LINK_OFFSET, HAL_CTOLE32(VIRT_TO_BUS((cyg_uint32)ccs))); // Default values from the Intel Manual config_bytes = ccs + CFG_BYTES; + config_bytes[0]=0x13; - config_bytes[1]=0x8; + config_bytes[1]=0xc; config_bytes[2]=0x0; config_bytes[3]=0x0; config_bytes[4]=0x0; config_bytes[5]=0x0; - config_bytes[6]=0xb2; // (promisc ? 0x80 : 0) | 0x32 for small stats, - config_bytes[7]=0x1; // \ ditto | 0x12 for stats with PAUSE stats - config_bytes[8]=0x0; // \ ditto | 0x16 for PAUSE + TCO stats + config_bytes[6]=0x32 | (promisc ? 0x80 : 0x00); // | 0x32 for small stats, + config_bytes[7]=0x00 | (promisc ? 0x00 : 0x01); //\ | 0x12 for stats with PAUSE stats + config_bytes[8]=0x01; // [7]:discard short frames \ | 0x16 for PAUSE + TCO stats config_bytes[9]=0x0; config_bytes[10]=0x28; config_bytes[11]=0x0; config_bytes[12]=0x60; config_bytes[13]=0x0; // arp config_bytes[14]=0x0; // arp - - config_bytes[15]=0x81; // promiscuous mode set - // \ or 0x80 for normal mode. + + config_bytes[15]=0x80 | (promisc ? 1 : 0); // 0x81: promiscuous mode set + // 0x80: normal mode config_bytes[16]=0x0; config_bytes[17]=0x40; - config_bytes[18]=0x72; // Keep the Padding Enable bit - + config_bytes[18]=0x72 | (oversized ? 8 : 0); // Keep the Padding Enable bit + // Let chip read configuration wait_for_cmd_done(ioaddr, WAIT_CU); + OUTL(VIRT_TO_BUS(ccs), ioaddr + SCBPointer); OUTW(SCB_M | CU_START, ioaddr + SCBCmd); // ...and wait for it to complete operation - count = 1000; + count = 10000; do { - HAL_READ_UINT16(ccs + CFG_STATUS, status); udelay(1); + READMEM16(ccs + CFG_STATUS, status); } while (0 == (status & CFG_STATUS_C) && (count-- > 0)); // Check status if ((status & (CFG_STATUS_C | CFG_STATUS_OK)) != (CFG_STATUS_C | CFG_STATUS_OK)) { // Failed! -#ifdef DEBUG_82559 +#ifdef DEBUG os_printf("%s:%d Config update failed\n", __FUNCTION__, __LINE__); #endif return 1; } + + wait_for_cmd_done(ioaddr, WAIT_CU); + /* load pointer to Rx Ring */ + + OUTL(VIRT_TO_BUS(p_i82559->rx_ring[0]), ioaddr + SCBPointer); + OUTW(RUC_START, ioaddr + SCBCmd); + return 0; } -#endif // ------------------------------------------------------------------------ // We use this as a templete when writing a new MAC address into the @@ -2554,10 +2970,10 @@ eth_set_mac_address(struct i82559* p_i82 if (ccs == (void*)0) return 2; - HAL_WRITE_UINT16(ccs + CFG_CMD, + WRITEMEM16(ccs + CFG_CMD, (CFG_CMD_EL | CFG_CMD_SUSPEND | CFG_CMD_IAS)); - HAL_WRITE_UINT16(ccs + CFG_STATUS, 0); - HAL_WRITE_UINT32(ccs + CFG_CB_LINK_OFFSET, + WRITEMEM16(ccs + CFG_STATUS, 0); + WRITEMEM32(ccs + CFG_CB_LINK_OFFSET, HAL_CTOLE32(VIRT_TO_BUS((cyg_uint32)ccs))); config_bytes = ccs + CFG_BYTES; @@ -2573,15 +2989,15 @@ eth_set_mac_address(struct i82559* p_i82 // ...and wait for it to complete operation count = 1000; do { - HAL_READ_UINT16(ccs + CFG_STATUS, status); + READMEM16(ccs + CFG_STATUS, status); udelay(1); } while (0 == (status & CFG_STATUS_C) && (count-- > 0)); // Check status - HAL_READ_UINT16(ccs + CFG_STATUS, status); + READMEM16(ccs + CFG_STATUS, status); if ((status & (CFG_STATUS_C | CFG_STATUS_OK)) != (CFG_STATUS_C | CFG_STATUS_OK)) { -#ifdef DEBUG_82559 +#ifdef DEBUG os_printf("%s:%d ESA update failed\n", __FUNCTION__, __LINE__); #endif return 3; @@ -2620,7 +3036,7 @@ eth_set_mac_address(struct i82559* p_i82 } #ifdef DEBUG - os_printf("MAC Address = %02X %02X %02X %02X %02X %02X\n", + os_printf("eth_set_mac_address[WRITE_EEPROM]: MAC Address = %02X %02X %02X %02X %02X %02X\n", p_i82559->mac_address[0], p_i82559->mac_address[1], p_i82559->mac_address[2], p_i82559->mac_address[3], p_i82559->mac_address[4], p_i82559->mac_address[5]); @@ -2662,6 +3078,17 @@ eth_set_mac_address(struct i82559* p_i82 p_i82559->mac_address[5] = addr[5]; p_i82559->mac_addr_ok = 1; +#ifdef DEBUG + os_printf( "No EEPROM configured: MAC Address = %02X %02X %02X %02X %02X %02X (ok %d)\n", + p_i82559->mac_address[0], + p_i82559->mac_address[1], + p_i82559->mac_address[2], + p_i82559->mac_address[3], + p_i82559->mac_address[4], + p_i82559->mac_address[5], + p_i82559->mac_addr_ok ); +#endif + #endif // ! CYGPKG_DEVS_ETH_INTEL_I82559_WRITE_EEPROM return p_i82559->mac_addr_ok ? 0 : 1; @@ -2934,7 +3361,10 @@ update_statistics(struct i82559* p_i8255 cyg_uint32 *p_counter; cyg_uint32 *p_register; int reg_count, ints; - +#ifdef CYGHWR_DEVS_ETH_INTEL_I82559_DEMUX_ALL + struct i82559* op_i82559 = p_i82559; +#endif + ints = Mask82559Interrupt(p_i82559); // This points to the sthared memory stats area/command block @@ -2955,8 +3385,50 @@ update_statistics(struct i82559* p_i8255 wait_for_cmd_done(p_i82559->io_address, WAIT_CU); OUTW(CU_DUMPSTATS, p_i82559->io_address + SCBCmd); } + +#ifdef CYGHWR_DEVS_ETH_INTEL_I82559_DEMUX_ALL + { + int i; + // The problem is, if DEMUX_ALL, either device can eat the other's + // interrupts; so we must poll them *both*: + for (i = 0; i < CYGNUM_DEVS_ETH_INTEL_I82559_DEV_COUNT; i++) { + p_i82559 = i82559_priv_array[i]; + if ( p_i82559->active ) { + // See if the Tx machine is wedged - reset if so: + Check82559TxLockupTimeout(p_i82559); + TxMachine(p_i82559); + Acknowledge82559Interrupt(p_i82559); + PacketRxReady(p_i82559); +#ifdef CYGHWR_DEVS_ETH_INTEL_I82559_MISSED_INTERRUPT + if ( CYGHWR_DEVS_ETH_INTEL_I82559_MISSED_INTERRUPT(p_i82559) ) { +#ifdef CYGDBG_USE_ASSERTS + missed_interrupt.stats++; +#endif + eth_isr( p_i82559->vector, (cyg_addrword_t)p_i82559 ); + eth_dsr( p_i82559->vector, 1, (cyg_addrword_t)p_i82559 ); + } +#endif + } + } + } + // ensure we look at the correct device at the end + p_i82559 = op_i82559; +#else // no CYGHWR_DEVS_ETH_INTEL_I82559_DEMUX_ALL + // See if the Tx machine is wedged - reset if so: + Check82559TxLockupTimeout(p_i82559); + TxMachine(p_i82559); Acknowledge82559Interrupt(p_i82559); // This can eat an Rx interrupt, so PacketRxReady(p_i82559); +#ifdef CYGHWR_DEVS_ETH_INTEL_I82559_MISSED_INTERRUPT + if ( CYGHWR_DEVS_ETH_INTEL_I82559_MISSED_INTERRUPT(p_i82559) ) { +#ifdef CYGDBG_USE_ASSERTS + missed_interrupt.stats++; +#endif + eth_isr( p_i82559->vector, (cyg_addrword_t)p_i82559 ); + eth_dsr( p_i82559->vector, 1, (cyg_addrword_t)p_i82559 ); + } +#endif +#endif // no CYGHWR_DEVS_ETH_INTEL_I82559_DEMUX_ALL UnMask82559Interrupt(p_i82559, ints); } @@ -2964,227 +3436,5 @@ update_statistics(struct i82559* p_i8255 #endif // KEEP_STATISTICS // ------------------------------------------------------------------------ -// -// -// CODE FOR DEBUGGING PURPOSES ONLY -// -// -// ------------------------------------------------------------------------ -void -dump_txcb(TxCB *p_txcb) -{ - cyg_uint16 tmp8; - cyg_uint16 tmp16; - cyg_uint32 tmp32; - - os_printf("TxCB @ %x\n", (int)p_txcb); - HAL_READ_UINT16(p_txcb + TxCB_STATUS, tmp16); - os_printf("status = %04X ", HAL_LE16TOC(tmp16)); - HAL_READ_UINT16(p_txcb + TxCB_CMD, tmp16); - os_printf("command = %04X ", HAL_LE16TOC(tmp16)); - HAL_READ_UINT32(p_txcb + TxCB_LINK, tmp32); - os_printf("link = %08X ", HAL_LE32TOC(tmp32)); - HAL_READ_UINT32(p_txcb + TxCB_TBD_ADDR, tmp32); - os_printf("tbd = %08X ", HAL_LE32TOC(tmp32)); - HAL_READ_UINT16(p_txcb + TxCB_COUNT, tmp16); - tmp16 = HAL_LE16TOC(tmp16); - os_printf("count = %d ", (tmp16 & TxCB_COUNT_MASK)); - os_printf("eof = %x ", (tmp16 & TxCB_COUNT_EOF) ? 1 : 0); - HAL_READ_UINT8(p_txcb + TxCB_TX_THRESHOLD, tmp8); - os_printf("threshold = %d ", tmp8); - HAL_READ_UINT8(p_txcb + TxCB_TBD_NUMBER, tmp8); - os_printf("tbd number = %d\n", tmp8); -} - -// This is intended to be the body of a THREAD that prints stuff every 10 -// seconds or so: -#ifdef KEEP_STATISTICS -#ifdef DISPLAY_STATISTICS -void -DisplayStatistics(void) -{ - int i; - I82559_COUNTERS *p_statistics; - cyg_uint32 *p_counter; - cyg_uint32 *p_register; - int reg_count; - int status; - - while ( 1 ) { -#ifdef DISPLAY_82559_STATISTICS - for ( i = 0; i < 2; i ++ ) { - p_statistics = (I82559_COUNTERS *)i82559[i].p_statistics; - if ( (p_statistics->done & 0xFFFF) == 0xA007 ) { - p_counter = (cyg_uint32 *)&i82559_counters[i]; - p_register = (cyg_uint32 *)&p_statistics->tx_good; - for ( reg_count = 20; reg_count != 0; reg_count--) { - *p_counter += *p_register; - p_counter++; - p_register++; - } - p_statistics->done = 0; - // start register dump - wait_for_cmd_done(i82559[i].io_address, WAIT_CU); - OUTW(CU_DUMPSTATS, i82559[i].io_address + SCBCmd); - } - } -#endif - os_printf("\nRx\nPackets = %d %d\n", - statistics[0].rx_count, statistics[1].rx_count); - os_printf("Deliver %d %d\n", - statistics[0].rx_deliver, statistics[1].rx_deliver); - os_printf("Resource %d %d\n", - statistics[0].rx_resource, statistics[1].rx_resource); - os_printf("Restart %d %d\n", - statistics[0].rx_restart, statistics[1].rx_restart); - -#ifdef DISPLAY_82559_STATISTICS - os_printf("Count %d %d\n", - i82559_counters[0].rx_good, i82559_counters[1].rx_good); - os_printf("CRC %d %d\n", - i82559_counters[0].rx_crc_errors, i82559_counters[1].rx_crc_errors); - os_printf("Align %d %d\n", - i82559_counters[0].rx_align_errors, i82559_counters[1].rx_align_errors); - os_printf("Resource %d %d\n", - i82559_counters[0].rx_resource_errors, i82559_counters[1].rx_resource_errors); - os_printf("Overrun %d %d\n", - i82559_counters[0].rx_overrun_errors, i82559_counters[1].rx_overrun_errors); - os_printf("Collision %d %d\n", - i82559_counters[0].rx_collisions, i82559_counters[1].rx_collisions); - os_printf("Short %d %d\n", - i82559_counters[0].rx_short_frames, i82559_counters[1].rx_short_frames); -#endif - os_printf("\nTx\nPackets = %d %d\n", - statistics[0].tx_count, statistics[1].tx_count); - os_printf("Complete %d %d\n", - statistics[0].tx_complete, statistics[1].tx_complete); - os_printf("Dropped %d %d\n", - statistics[0].tx_dropped, statistics[1].tx_dropped); - os_printf("Count %d %d\n", - i82559_counters[0].tx_good, i82559_counters[1].tx_good); -#ifdef DISPLAY_82559_STATISTICS - os_printf("Collision %d %d\n", - i82559_counters[0].tx_max_collisions,i82559_counters[1].tx_max_collisions); - os_printf("Late Col. %d %d\n", - i82559_counters[0].tx_late_collisions,i82559_counters[1].tx_late_collisions); - os_printf("Underrun %d %d\n", - i82559_counters[0].tx_underrun,i82559_counters[1].tx_underrun); - os_printf("Carrier %d %d\n", - i82559_counters[0].tx_carrier_loss,i82559_counters[1].tx_carrier_loss); - os_printf("Deferred %d %d\n", - i82559_counters[0].tx_deferred, i82559_counters[1].tx_deferred); - os_printf("1 Col %d %d\n", - i82559_counters[0].tx_single_collisions, i82559_counters[0].tx_single_collisions); - os_printf("Mult. Col %d %d\n", - i82559_counters[0].tx_mult_collisions, i82559_counters[0].tx_mult_collisions); - os_printf("Total Col %d %d\n", - i82559_counters[0].tx_total_collisions, i82559_counters[0].tx_total_collisions); -#endif - status = INB(i82559[0].io_address + SCBGenStatus); - os_printf("Interface 0 Link = %s, %s Mbps, %s Duplex\n", - status & GEN_STATUS_LINK ? "Up" : "Down", - status & GEN_STATUS_100MBPS ? "100" : "10", - status & GEN_STATUS_FDX ? "Full" : "Half"); - - status = INB(i82559[1].io_address + SCBGenStatus); - os_printf("Interface 1 Link = %s, %s Mbps, %s Duplex\n", - status & GEN_STATUS_LINK ? "Up" : "Down", - status & GEN_STATUS_100MBPS ? "100" : "10", - status & GEN_STATUS_FDX ? "Full" : "Half"); - - cyg_thread_delay(1000); - } -} -#endif // DISPLAY_STATISTICS -#endif // KEEP_STATISTICS - -void -dump_rfd(RFD *p_rfd, int anyway ) -{ - cyg_uint32 rxstatus, tmp32; - cyg_uint16 tmp16; - - HAL_READ_UINT32(p_rfd + RFD_STATUS, rxstatus); - if ( (0 != rxstatus) || anyway ) { - os_printf("RFD @ %x = ", (int)p_rfd); - os_printf("status = %x ", HAL_LE32TOC(rxstatus)); - HAL_READ_UINT32(p_rfd + RFD_LINK, tmp32); - os_printf("link = %x ", HAL_LE32TOC(tmp32)); -// HAL_READ_UINT32(p_rfd + RFD_RDB_ADDR, tmp32); -// os_printf("rdb_address = %x ", HAL_LE32TOC(rdb_address)); - HAL_READ_UINT16(p_rfd + RFD_COUNT, tmp16); - tmp16 = HAL_LE16TOC(tmp16); - os_printf("count = %x ", (tmp16 & RFD_COUNT_MASK)); - os_printf("f = %x ", (tmp16 & RFD_COUNT_F) ? 1 : 0); - os_printf("eof = %x ", (tmp16 & RFD_COUNT_EOF) ? 1 : 0); - HAL_READ_UINT16(p_rfd + RFD_SIZE, tmp16); - os_printf("size = %x\n", HAL_LE16TOC(tmp16)); - // FIXME: HAL_BE16TOC surely? This is the network package - // header, right? - os_printf("[%04x %04x %04x] ", - *((cyg_uint16 *)(p_rfd + RFD_BUFFER + 0)), - *((cyg_uint16 *)(p_rfd + RFD_BUFFER + 2)), - *((cyg_uint16 *)(p_rfd + RFD_BUFFER + 4))); - os_printf("[%04x %04x %04x] %04x : ", - *((cyg_uint16 *)(p_rfd + RFD_BUFFER + 6)), - *((cyg_uint16 *)(p_rfd + RFD_BUFFER + 8)), - *((cyg_uint16 *)(p_rfd + RFD_BUFFER + 10)), - *((cyg_uint16 *)(p_rfd + RFD_BUFFER + 12))); - os_printf("(%04x %04x %04x %04x) ", - *((cyg_uint16 *)(p_rfd + RFD_BUFFER + 14)), - *((cyg_uint16 *)(p_rfd + RFD_BUFFER + 16)), - *((cyg_uint16 *)(p_rfd + RFD_BUFFER + 18)), - *((cyg_uint16 *)(p_rfd + RFD_BUFFER + 20)) ); - os_printf("[%04x %04x %04x] ", - *((cyg_uint16 *)(p_rfd + RFD_BUFFER + 22)), - *((cyg_uint16 *)(p_rfd + RFD_BUFFER + 24)), - *((cyg_uint16 *)(p_rfd + RFD_BUFFER + 26)) ); - os_printf("%d.%d.%d.%d ", - *((cyg_uint8 *)(p_rfd + RFD_BUFFER + 28)), - *((cyg_uint8 *)(p_rfd + RFD_BUFFER + 29)), - *((cyg_uint8 *)(p_rfd + RFD_BUFFER + 30)), - *((cyg_uint8 *)(p_rfd + RFD_BUFFER + 31)) ); - os_printf("[%04x %04x %04x] ", - *((cyg_uint16 *)(p_rfd + RFD_BUFFER + 32)), - *((cyg_uint16 *)(p_rfd + RFD_BUFFER + 34)), - *((cyg_uint16 *)(p_rfd + RFD_BUFFER + 36)) ); - os_printf("%d.%d.%d.%d ...\n", - *((cyg_uint8 *)(p_rfd + RFD_BUFFER + 38)), - *((cyg_uint8 *)(p_rfd + RFD_BUFFER + 39)), - *((cyg_uint8 *)(p_rfd + RFD_BUFFER + 40)), - *((cyg_uint8 *)(p_rfd + RFD_BUFFER + 41)) ); - } -} - -void -dump_all_rfds( int intf ) -{ - struct i82559* p_i82559 = i82559_priv_array[intf]; - int i, j; - j = p_i82559->next_rx_descriptor; - os_printf("rx descriptors for interface %d (eth%d):\n", intf, intf ); - for ( i = 0; i < MAX_RX_DESCRIPTORS; i++ ) - dump_rfd( p_i82559->rx_ring[i], (i > (j-3) && (i <= j)) ); - os_printf("next rx descriptor = %x\n\n", j); -} - - -void -dump_packet(cyg_uint8 *p_buffer, int length) -{ - int count; - - count = 0; - while ( length > 0 ) { - if ( count == 0 ) - os_printf("\n"); - count = (count + 1) & 0x0F; - os_printf("%02X ", *p_buffer++); - length--; - } - os_printf("\n"); -} - -// ------------------------------------------------------------------------ // EOF if_i82559.c diff --git a/packages/devs/eth/mips/atlas/current/ChangeLog b/packages/devs/eth/mips/atlas/current/ChangeLog new file mode 100644 --- /dev/null +++ b/packages/devs/eth/mips/atlas/current/ChangeLog @@ -0,0 +1,40 @@ +2001-02-15 Nick Garnett + + * src/saa9730.h: + * src/if_atlas.c: + Added support for getting RX interrupts. This is solely for the + purposes of doing Ctrl-C processing in RedBoot, more work would be + needed to get full eCos driver support going. + +2001-01-30 Gary Thomas + + * src/if_atlas.c: New RedBoot config data layout. + +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//=========================================================================== + + + diff --git a/packages/devs/eth/mips/atlas/current/cdl/atlas_eth_drivers.cdl b/packages/devs/eth/mips/atlas/current/cdl/atlas_eth_drivers.cdl new file mode 100644 --- /dev/null +++ b/packages/devs/eth/mips/atlas/current/cdl/atlas_eth_drivers.cdl @@ -0,0 +1,93 @@ +# ==================================================================== +# +# atlas_eth_drivers.cdl +# +# Ethernet drivers - platform dependent support for MIPS Atlas +# board using a Philips SAA9730 IO chip. +# +# ==================================================================== +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Red Hat eCos Public License +# Version 1.1 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://www.redhat.com/ +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Configurable Operating System, +# released September 30, 1998. +# +# The Initial Developer of the Original Code is Red Hat. +# Portions created by Red Hat are +# Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +# All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +# ==================================================================== +######DESCRIPTIONBEGIN#### +# +# Author(s): msalter +# Original data: msalter +# Contributors: +# Date: 2000-12-04 +# +#####DESCRIPTIONEND#### +# +# ==================================================================== + +cdl_package CYGPKG_DEVS_ETH_MIPS_ATLAS { + display "MIPS Atlas ethernet driver" + + parent CYGPKG_IO_ETH_DRIVERS + active_if CYGPKG_IO_ETH_DRIVERS + active_if CYGPKG_HAL_MIPS_ATLAS + + implements CYGHWR_NET_DRIVERS + implements CYGHWR_NET_DRIVER_ETH0 + include_dir . + include_files ; # none _exported_ whatsoever + description "Ethernet driver for MIPS Atlas boards w/ SAA9730." + compile -library=libextras.a if_atlas.c if_buffers.S + + cdl_component CYGSEM_MIPS_ATLAS_SET_ESA { + display "Set the ethernet station address" + flavor bool + default_value 0 + description "Enabling this option will allow the ethernet + station address to be forced to the value set by the + configuration. This may be required if the hardware does + not include a serial EEPROM for the ESA." + + cdl_option CYGDAT_MIPS_ATLAS_ESA { + display "The ethernet station address" + flavor data + default_value {"{0x00, 0xd0, 0xa0, 0x00, 0x00, 0x10}"} + description "The ethernet station address" + } + } + + cdl_component CYGPKG_DEVS_ETH_MIPS_ATLAS_OPTIONS { + display "MIPS Atlas ethernet driver build options" + flavor none + no_define + + cdl_option CYGPKG_DEVS_ETH_ARM_ATLAS_CFLAGS_ADD { + display "Additional compiler flags" + flavor data + no_define + default_value { "-D_KERNEL -D__ECOS" } + description " + This option modifies the set of compiler flags for + building the MIPS Atlas ethernet driver package. + These flags are used in addition + to the set of global flags." + } + } +} + diff --git a/packages/devs/eth/mips/atlas/current/src/if_atlas.c b/packages/devs/eth/mips/atlas/current/src/if_atlas.c new file mode 100644 --- /dev/null +++ b/packages/devs/eth/mips/atlas/current/src/if_atlas.c @@ -0,0 +1,990 @@ +//========================================================================== +// +// dev/if_atlas.c +// +// Ethernet device driver for MIPS Atlas using Philips SAA9730 +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//####BSDCOPYRIGHTBEGIN#### +// +// ------------------------------------------- +// +// Portions of this software may have been derived from OpenBSD or other sources, +// and are covered by the appropriate copyright disclaimers included herein. +// +// ------------------------------------------- +// +//####BSDCOPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): msalter +// Contributors: msalter +// Date: 2000-12-06 +// Purpose: +// Description: hardware driver for SAA9730 ethernet +// +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +// Ethernet device driver for MIPS Atlas +// Based on SAA9730 + +#include +#include +#ifdef CYGPKG_NET +#include +#include +#endif +#include +#include +#include +#include +#include +#include +#include +#include + +#ifdef CYGPKG_IO_PCI +#include +// So we can check the validity of the PCI window against the MLTs opinion, +// and thereby what the malloc heap consumes willy-nilly: +#include CYGHWR_MEMORY_LAYOUT_H +#else +#error "Need PCI package here" +#endif + +#ifndef CYGSEM_MIPS_ATLAS_SET_ESA +#ifdef CYGPKG_REDBOOT +#include +#ifdef CYGSEM_REDBOOT_FLASH_CONFIG +#include +#include +RedBoot_config_option("Network hardware address [MAC]", + atlas_esa, + ALWAYS_ENABLED, true, + CONFIG_ESA, 0 + ); +#endif +#endif +#endif + +// SAA9730 LAN definitions +#include "saa9730.h" + +// Exported statistics and the like +#include + +#define db_printf diag_printf + +#define ETHER_ADDR_LEN 6 + +extern int net_debug; // FIXME + +static unsigned poll_count = 0; // for bug workaround +static void __tx_poll(struct eth_drv_sc *sc); + +struct saa9730_priv_data { + int active; + cyg_uint32 vector; + cyg_handle_t interrupt_handle; + cyg_interrupt interrupt_object; + cyg_uint32 devid; // PCI device id + cyg_uint32 base; // PCI memory map base + void *ndp; + + // index of next RX buffer + cyg_uint8 next_rx_bindex; + + // index of next packet within RX buffer + cyg_uint8 next_rx_pindex; + + // index of next TX buffer + cyg_uint8 next_tx_bindex; + + // index of next packet within TX buffer + cyg_uint8 next_tx_pindex; + + cyg_uint32 *tx_buffer[SAA9730_BUFFERS][SAA9730_TXPKTS_PER_BUFFER]; + cyg_uint32 *rx_buffer[SAA9730_BUFFERS][SAA9730_RXPKTS_PER_BUFFER]; + + int tx_busy; + unsigned long tx_key[SAA9730_BUFFERS][SAA9730_TXPKTS_PER_BUFFER]; + int tx_used[SAA9730_BUFFERS]; + +} saa9730_priv_data; + +ETH_DRV_SC(atlas_sc, + &saa9730_priv_data, // Driver specific data + "eth0", // Name for this interface + saa9730_start, + saa9730_stop, + saa9730_control, + saa9730_can_send, + saa9730_send, + saa9730_recv, + saa9730_deliver, // "pseudoDSR" called from fast net thread + saa9730_poll, + saa9730_int_vector); + +NETDEVTAB_ENTRY(atlas_netdev, + "atlas", + atlas_saa9730_init, + &atlas_sc); + +#ifdef CYGSEM_ARM_ATLAS_SET_ESA +static unsigned char enaddr[] = CYGDAT_ARM_ATLAS_ESA; +#else +static unsigned char enaddr[ETHER_ADDR_LEN]; +#endif + +static void saa9730_poll(struct eth_drv_sc *sc); + +// This ISR is called when the ethernet interrupt occurs +static int +saa9730_isr(cyg_vector_t vector, cyg_addrword_t data) +{ +#ifndef CYGPKG_REDBOOT + cyg_drv_interrupt_mask(vector); +#endif + return (CYG_ISR_HANDLED|CYG_ISR_CALL_DSR); // Run the DSR +} + +#ifndef CYGPKG_REDBOOT +static +void saa9730_dsr(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data) +{ + struct saa9730_priv_data *spd = (struct saa9730_priv_data *)data; + struct cyg_netdevtab_entry *ndp = (struct cyg_netdevtab_entry *)(spd->ndp); + struct eth_drv_sc *sc = (struct eth_drv_sc *)(ndp->device_instance); + + eth_drv_dsr(vector, count, (cyg_addrword_t)sc); +} +#endif + +static int +saa9730_int_vector(struct eth_drv_sc *sc) +{ + struct saa9730_priv_data *spd = (struct saa9730_priv_data *)sc->driver_private; + + return spd->vector; +} + +static void +__init_buffers(struct saa9730_priv_data *spd) +{ + extern char cyg_io_atlas_2kbuffers[]; + cyg_uint32 *bufp = (cyg_uint32 *)CYGARC_UNCACHED_ADDRESS((unsigned)cyg_io_atlas_2kbuffers); + int i, j; + + for (i = 0; i < SAA9730_BUFFERS; i++) { + for (j = 0; j < SAA9730_RXPKTS_PER_BUFFER; j++) { + memset(bufp, 0, 2048); + spd->rx_buffer[i][j] = bufp; + bufp += SAA9730_PACKET_SIZE/sizeof(*bufp); + } + } + for (i = 0; i < SAA9730_BUFFERS; i++) { + for (j = 0; j < SAA9730_TXPKTS_PER_BUFFER; j++) { + memset(bufp, 0, 2048); + *bufp = cpu_to_le32(TX_EMPTY); + spd->tx_buffer[i][j] = bufp; + bufp += SAA9730_PACKET_SIZE/sizeof(*bufp); + } + } + + spd->next_rx_pindex = 0; + spd->next_rx_bindex = 0; + spd->next_tx_pindex = 0; + spd->next_tx_bindex = 0; +} + +static void +__select_buffer(struct saa9730_priv_data *spd, int buf_nr) +{ + unsigned long __base = spd->base; + cyg_uint32 *p; + int i; + + // Enable RX buffer + for (i = 0; i < SAA9730_RXPKTS_PER_BUFFER; i++) { + p = spd->rx_buffer[buf_nr][i]; + *p = cpu_to_le32(RX_READY); + } + + if (buf_nr) + SAA9730_OK2USE |= SAA9730_OK2USE_RXB; + else + SAA9730_OK2USE |= SAA9730_OK2USE_RXA; +} + +static void +__init_cam(struct saa9730_priv_data *spd) +{ + unsigned long __base = spd->base; + cyg_uint32 abuf[3]; // room for 2 copies of mac address + int i,j,cam_offset; + + // make 2 contiguous copies of mac addr + memcpy((char *)abuf, enaddr, 6); + memcpy((char *)abuf + 6, enaddr, 6); + + // Setting up the address compare regs is weird because you have + // to access by word addresses even though addresses don't have + // an integral number of words. + cam_offset = 0; + for (i = 0; i < SAA9730_CAM_ENTRIES; i++) { + for (j = 0; j < 3; j++, cam_offset++) { + SAA9730_CAMADR = cam_offset; + SAA9730_CAMDAT = cpu_to_be32(abuf[j]); + } + } +} + +static void +__stop_dma(struct saa9730_priv_data *spd) +{ + unsigned long __base = spd->base; + + // Stop DMA + SAA9730_DMACTL &= ~(SAA9730_DMACTL_ENRX | SAA9730_DMACTL_ENTX); + + // Stop tx/rx + SAA9730_TXCTL &= ~SAA9730_TXCTL_ENTX; + SAA9730_RXCTL &= ~SAA9730_RXCTL_ENRX; + + // Set DMA and MAC reset bits + SAA9730_DMATST |= SAA9730_DMATST_RESET; + SAA9730_MACCTL |= SAA9730_MACCTL_RESET; +} + + +static void +__init_dma(struct saa9730_priv_data *spd) +{ + unsigned long __base = spd->base; + + __stop_dma(spd); + + // reset DMA engine + SAA9730_DMATST |= SAA9730_DMATST_RESET; + + // setup buffers + SAA9730_TXBUFA = CYGARC_PHYSICAL_ADDRESS((unsigned long)spd->tx_buffer[0][0]); + SAA9730_TXBUFB = CYGARC_PHYSICAL_ADDRESS((unsigned long)spd->tx_buffer[1][0]); + SAA9730_RXBUFA = CYGARC_PHYSICAL_ADDRESS((unsigned long)spd->rx_buffer[0][0]); + SAA9730_RXBUFB = CYGARC_PHYSICAL_ADDRESS((unsigned long)spd->rx_buffer[1][0]); + + SAA9730_PKTCNT = ((SAA9730_TXPKTS_PER_BUFFER << 24) | + (SAA9730_TXPKTS_PER_BUFFER << 16) | + (SAA9730_RXPKTS_PER_BUFFER << 8) | + (SAA9730_RXPKTS_PER_BUFFER << 0)); + + SAA9730_OK2USE = SAA9730_OK2USE_RXA | SAA9730_OK2USE_RXB; + + __select_buffer(spd, 0); + + // initialize DMA control register + SAA9730_DMACTL = SAA9730_DMACTL_BLKINT | + SAA9730_DMACTL_MAXXFER_ANY | + SAA9730_DMACTL_ENDIAN_LITTLE; +#ifdef CYGPKG_REDBOOT + SAA9730_DMACTL |= SAA9730_DMACTL_RXINT; + SAA9730_DMACTL |= (1<base; + cyg_uint32 opmode; + + // spin till station is not busy + while (SAA9730_MDCTL & SAA9730_MDCTL_BUSY) + ; + + // set PHY address = 'STATUS' + SAA9730_MDCTL = SAA9730_MDCTL_BUSY | + (PHY_ADDRESS << SAA9730_MDCTL_PHY_SHIFT) | + PHY_STATUS; + + // spin till station is not busy + while (SAA9730_MDCTL & SAA9730_MDCTL_BUSY) + ; + + hal_delay_us(1000); + + // check the link status + if (SAA9730_MDDATA & PHY_STATUS_LINK_UP) { + + SAA9730_MDCTL = SAA9730_MDCTL_BUSY | + (PHY_ADDRESS << SAA9730_MDCTL_PHY_SHIFT) | + PHY_REG31; + + // spin till station is not busy + while (SAA9730_MDCTL & SAA9730_MDCTL_BUSY) + ; + + hal_delay_us(1000); + + opmode = (SAA9730_MDDATA & PHY_REG31_OPMODE_MSK) >> PHY_REG31_OPMODE_SHIFT; + +#ifdef DEBUG + diag_printf("MII mode %d\n", opmode); +#endif + + if ((opmode == OPMODE_10BASET_FULLDUPLEX) || + (opmode == OPMODE_100BASEX_FULLDUPLEX)) + SAA9730_MACCTL = SAA9730_MACCTL_CONMODE_FORCE_MII | SAA9730_MACCTL_FULLDUP; + else + SAA9730_MACCTL = SAA9730_MACCTL_CONMODE_FORCE_MII; + } +#ifdef DEBUG + else + diag_printf("Link is down\n"); +#endif +} + + +static void +saa9730_reset(struct saa9730_priv_data *spd) +{ + unsigned long __base = spd->base; + + __init_buffers(spd); + + __base = spd->base; + + // Stop DMA + SAA9730_DMACTL &= ~(SAA9730_DMACTL_ENRX | SAA9730_DMACTL_ENTX); + + // Stop tx/rx + SAA9730_TXCTL &= ~SAA9730_TXCTL_ENTX; + SAA9730_RXCTL &= ~SAA9730_RXCTL_ENRX; + + // Set DMA and MAC reset bits + SAA9730_DMATST |= SAA9730_DMATST_RESET; + SAA9730_MACCTL |= SAA9730_MACCTL_RESET; + + __init_cam(spd); + __init_dma(spd); + __check_mii(spd); + + spd->tx_busy = 0; +} + + +static bool +atlas_saa9730_init(struct cyg_netdevtab_entry *tab) +{ + static int initialized = 0; // only probe PCI et al *once* + struct eth_drv_sc *sc = (struct eth_drv_sc *)tab->device_instance; + struct saa9730_priv_data *spd = (struct saa9730_priv_data *)sc->driver_private; + +#ifdef DEBUG + diag_printf("atlas_saa9730_init\n"); +#endif + + if (0 == initialized) { + cyg_pci_device_id devid; + cyg_pci_device dev_info; + + cyg_pci_init(); + + devid = CYG_PCI_NULL_DEVID; + + if (cyg_pci_find_device(CYG_PCI_VENDOR_PHILIPS, 0x9730, &devid) ) { + + spd->devid = devid; + + cyg_pci_get_device_info(devid, &dev_info); + + if (!cyg_pci_configure_device(&dev_info)) { +#ifdef DEBUG + db_printf("Failed to configure eth device\n"); +#endif + return false; + } + + // Philips SAA9730 implements only one function memory mapped + // into a single contigous memory region. + // + // According to spec. the BAR#1 is to be used for memory mapped IO. + spd->base = dev_info.base_map[1]; + + // FIXME! All IO units share an interrupt + spd->vector = CYGNUM_HAL_INTERRUPT_INTB; + + // Setup timing stuff + cyg_hal_plf_pci_cfg_write_byte(CYG_PCI_DEV_GET_BUS(devid), + CYG_PCI_DEV_GET_DEVFN(devid), + CYG_PCI_CFG_LATENCY_TIMER, 0x20); + cyg_hal_plf_pci_cfg_write_byte(CYG_PCI_DEV_GET_BUS(devid), + CYG_PCI_DEV_GET_DEVFN(devid), + CYG_PCI_CFG_MIN_GNT, 9); + cyg_hal_plf_pci_cfg_write_byte(CYG_PCI_DEV_GET_BUS(devid), + CYG_PCI_DEV_GET_DEVFN(devid), + CYG_PCI_CFG_MAX_LAT, 24); + +#ifdef DEBUG + db_printf("eth0 found: bus[%d] dev[%d] base[%x] vector[%d]\n", + CYG_PCI_DEV_GET_BUS(devid), + CYG_PCI_DEV_GET_DEV(CYG_PCI_DEV_GET_DEVFN(devid)), + spd->base, spd->vector); +#endif + +#ifndef CYGPKG_REDBOOT + cyg_drv_interrupt_create( + spd->vector, + 0, // Priority - unused + (CYG_ADDRWORD)spd, // Data item passed to ISR & DSR + saa9730_isr, // ISR + saa9730_dsr, // DSR + &spd->interrupt_handle, // handle to intr obj + &spd->interrupt_object ); // space for int obj + + cyg_drv_interrupt_attach(spd->interrupt_handle); + cyg_drv_interrupt_acknowledge(spd->vector); + cyg_drv_interrupt_unmask(spd->vector); +#else + { + // When in Redboot we want to get RX interrupts. These + // will be picked up by the default interrupt handler and + // checked for ^C. + unsigned long __base = spd->base; + SAA9730_EVM_IER_SW |= (SAA9730_EVM_LAN_INT|SAA9730_EVM_MASTER); + SAA9730_EVM_IER |= (SAA9730_EVM_LAN_INT|SAA9730_EVM_MASTER); + SAA9730_EVM_ISR |= (SAA9730_EVM_LAN_INT|SAA9730_EVM_MASTER); + } +#endif + +#ifdef DEBUG + db_printf(" **** Device enabled for I/O and Memory and Bus Master\n"); +#endif + + } else { +#ifdef DEBUG + db_printf("eth0 not found\n"); +#endif + } + + spd->active = 0; + + initialized = 1; + } + + // Fetch hardware address +#if defined(CYGPKG_REDBOOT) && \ + defined(CYGSEM_REDBOOT_FLASH_CONFIG) && \ + !defined(CYGSEM_ARM_ATLAS_SET_ESA) + flash_get_config("atlas_esa", enaddr, CONFIG_ESA); +#else + for (i = 0; i < ETHER_ADDR_LEN; i += 2) { + unsigned short esa_reg = get_reg(PP_IA+i); + enaddr[i] = esa_reg & 0xFF; + enaddr[i+1] = esa_reg >> 8; + } +#endif + + saa9730_reset(spd); + + // Initialize upper level driver + (sc->funs->eth_drv->init)(sc, enaddr); + + return true; +} + +static void +saa9730_stop(struct eth_drv_sc *sc) +{ + struct saa9730_priv_data *spd = (struct saa9730_priv_data *)sc->driver_private; + unsigned long __base = spd->base; + + // Stop DMA + SAA9730_DMACTL &= ~(SAA9730_DMACTL_ENRX | SAA9730_DMACTL_ENTX); + + // Stop tx/rx + SAA9730_TXCTL &= ~SAA9730_TXCTL_ENTX; + SAA9730_RXCTL &= ~SAA9730_RXCTL_ENRX; + + // Set DMA and MAC reset bits + SAA9730_DMATST |= SAA9730_DMATST_RESET; + SAA9730_MACCTL |= SAA9730_MACCTL_RESET; + + spd->active = 0; +} + +static void +__do_start(struct saa9730_priv_data *spd) +{ + unsigned long __base = spd->base; + int i; + + spd->active = 1; + spd->tx_busy = 0; + + for (i = 0; i < SAA9730_BUFFERS; i++) + spd->tx_used[i] = 0; + + // for tx, turn on MAC first + SAA9730_TXCTL |= SAA9730_TXCTL_ENTX; + SAA9730_DMACTL |= SAA9730_DMACTL_ENTX; + + // for rx, turn on DMA first + SAA9730_DMACTL |= SAA9730_DMACTL_ENRX; + SAA9730_RXCTL |= SAA9730_RXCTL_ENRX; +} + +// +// This function is called to "start up" the interface. It may be called +// multiple times, even when the hardware is already running. It will be +// called whenever something "hardware oriented" changes and should leave +// the hardware ready to send/receive packets. +// +static void +saa9730_start(struct eth_drv_sc *sc, unsigned char *enaddr, int flags) +{ + struct saa9730_priv_data *spd = (struct saa9730_priv_data *)sc->driver_private; + + if (spd->active) + saa9730_stop(sc); + + __do_start(spd); +} + +// +// This routine is called to perform special "control" opertions +// +static int +saa9730_control(struct eth_drv_sc *sc, unsigned long key, + void *data, int data_length) +{ + switch (key) { + case ETH_DRV_SET_MAC_ADDRESS: + return 0; + break; + default: + return 1; + break; + } +} + +// +// This routine is called to see if it is possible to send another packet. +// It will return non-zero if a transmit is possible, zero otherwise. +// +static int +saa9730_can_send(struct eth_drv_sc *sc) +{ + struct saa9730_priv_data *spd = (struct saa9730_priv_data *)sc->driver_private; + unsigned long __base = spd->base; + + __tx_poll(sc); + + if (spd->next_tx_bindex == 0 && (SAA9730_OK2USE & SAA9730_OK2USE_TXA)) + return 0; + + if (spd->next_tx_bindex == 1 && (SAA9730_OK2USE & SAA9730_OK2USE_TXB)) + return 0; + + return 1; +} + + +static int tx_poll_count; + +// +// This routine is called to send data to the hardware. +static void +saa9730_send(struct eth_drv_sc *sc, struct eth_drv_sg *sg_list, int sg_len, + int total_len, unsigned long key) +{ + struct saa9730_priv_data *spd = (struct saa9730_priv_data *)sc->driver_private; + unsigned long __base = spd->base; + int bindex, pindex; + cyg_uint32 pktlen = total_len; + cyg_uint8 *pktdata, *to_p; + volatile cyg_uint32 *pktstat ; + struct eth_drv_sg *last_sg; + +#ifdef DEBUG + db_printf("saa9730_send: %d sg's, %d bytes, KEY %x\n", + sg_len, total_len, key ); +#endif + + if (!spd->active) + return; + + bindex = spd->next_tx_bindex; + pindex = spd->next_tx_pindex; + + spd->next_tx_pindex++; + if (spd->next_tx_pindex >= SAA9730_TXPKTS_PER_BUFFER) { + spd->next_tx_pindex = 0; + spd->next_tx_bindex ^= 1; + } + + pktstat = spd->tx_buffer[bindex][pindex]; + + if (bindex == 0 && (SAA9730_OK2USE & SAA9730_OK2USE_TXA)) + return; + + if (bindex == 1 && (SAA9730_OK2USE & SAA9730_OK2USE_TXB)) + return; + + spd->tx_key[bindex][pindex] = key; + spd->tx_used[bindex] += 1; + + pktdata = (cyg_uint8 *)((unsigned)pktstat + 4); + + // Copy from the sglist into the tx buffer + to_p = pktdata; + + for (last_sg = &sg_list[sg_len]; sg_list < last_sg; sg_list++) { + cyg_uint8 *from_p; + int l; + + from_p = (cyg_uint8 *)(sg_list->buf); + l = sg_list->len; + + if (l > total_len) + l = total_len; + + memcpy((unsigned char *)to_p, from_p, l); + to_p += l; + total_len -= l; + + if (total_len < 0) + break; // Should exit via sg_last normally + } + + // pad to minimum size + if (pktlen < SAA9730_MIN_PACKET_SIZE) { + memset(to_p, 0, SAA9730_MIN_PACKET_SIZE-pktlen); + pktlen = SAA9730_MIN_PACKET_SIZE; + } + + // Set transmit status WORD for hardware (LAN-DMA-ENGINE) + *pktstat = cpu_to_le32(TX_READY | pktlen); + + // start hardware + if (bindex == 0) + SAA9730_OK2USE |= SAA9730_OK2USE_TXA; + else + SAA9730_OK2USE |= SAA9730_OK2USE_TXB; + + if (!spd->tx_busy) { + tx_poll_count = 0; + spd->tx_busy = bindex + 1; + } +} + + +static void +__check_rxstate(struct saa9730_priv_data *spd) +{ + unsigned long __base = spd->base; + cyg_uint32 status, flag, size; + cyg_uint32 *pkt; + int i, j; + +#ifdef CYGPKG_REDBOOT + // Clear SAA9730 LAN interrupt and re-enable interrupts. + SAA9730_EVM_ISR = SAA9730_EVM_LAN_INT; + SAA9730_EVM_IER_SW |= (SAA9730_EVM_LAN_INT|SAA9730_EVM_MASTER); +#endif + + if ((SAA9730_DBGRXS & SAA9730_DBGRXS_RXDII_MASK) == SAA9730_DBGRXS_RXDII_ERROR) { + // re-init driver and controller +#ifdef DEBUG + db_printf("DBGRXS: reset\n"); +#endif + saa9730_reset(spd); + __do_start(spd); + return; + } + + // Check RX packet status + for (i = 0; i < SAA9730_BUFFERS; i++) { + for (j = 1; j < SAA9730_RXPKTS_PER_BUFFER; j++) { + pkt = spd->rx_buffer[i][j]; + status = le32_to_cpu(*pkt); + size = status & RXPACKET_STATUS_SIZE_MASK; + flag = status & RXPACKET_STATUS_FLAG_MASK; + if (flag == RX_INVALID_STAT || size > 1514 || *(pkt - 1)) { + // re-init driver and controller +#ifdef DEBUG + db_printf("rxpkt: reset\n"); +#endif + saa9730_reset(spd); + __do_start(spd); + return; + } + } + } +} + + +static void +__tx_poll(struct eth_drv_sc *sc) +{ + struct saa9730_priv_data *spd = (struct saa9730_priv_data *)sc->driver_private; + int bindex, pindex; + volatile cyg_uint32 *pktstat; + cyg_uint32 status; + + if (!spd->tx_busy) + return; + + bindex = spd->tx_busy - 1; + pindex = spd->tx_used[bindex] - 1; // watch last pkt in buffer + + pktstat = spd->tx_buffer[bindex][pindex]; + + status = le32_to_cpu(*pktstat); + if ((status & TXPACKET_STATUS_FLAG_MASK) != TX_HWDONE) { + + hal_delay_us(1000); + + if (++tx_poll_count > 1000) { + // reset + + for (pindex = 0; pindex < spd->tx_used[bindex]; pindex++) + (sc->funs->eth_drv->tx_done)(sc, spd->tx_key[bindex][pindex], 1); + + bindex ^= 1; + + for (pindex = 0; pindex < spd->tx_used[bindex]; pindex++) + (sc->funs->eth_drv->tx_done)(sc, spd->tx_key[bindex][pindex], 1); + + saa9730_reset(spd); + __do_start(spd); + } + return; + } + + for (pindex = 0; pindex < spd->tx_used[bindex]; pindex++) { + /* Check for error. */ + pktstat = spd->tx_buffer[bindex][pindex]; + status = le32_to_cpu(*pktstat); + + if (status & TXPACKET_STATUS_ERROR) { + if (status & TXPACKET_STATUS_EXDEFER) + db_printf("tx deferred\n"); + + if (status & TXPACKET_STATUS_LATECOLLERR) + db_printf("tx late collision\n"); + + if (status & TXPACKET_STATUS_LOSTCARRIER) + db_printf("tx no carrier\n"); + + if (status & TXPACKET_STATUS_UNDERRUN) + db_printf("tx underrun\n"); + + if (status & TXPACKET_STATUS_SQERR) + db_printf("tx sq\n"); + } + /* free the space */ + *pktstat = cpu_to_le32(TX_EMPTY); + + (sc->funs->eth_drv->tx_done)(sc, spd->tx_key[bindex][pindex], 1 /* status */); + } + + tx_poll_count = 0; + spd->tx_used[bindex] = 0; + + bindex ^= 1; + if (spd->tx_used[bindex]) + spd->tx_busy = bindex + 1; + else + spd->tx_busy = 0; +} + + +static void +__rx_poll(struct eth_drv_sc *sc) +{ + struct saa9730_priv_data *spd = (struct saa9730_priv_data *)sc->driver_private; + int bindex, pindex, done; + volatile cyg_uint32 *pkt; + cyg_uint32 status, pktlen; + + if (!spd->active) + return; + + done = 0; + while (!done) { + // index of next packet buffer + bindex = spd->next_rx_bindex; + + // index of next packet within buffer + pindex = spd->next_rx_pindex; + + pkt = spd->rx_buffer[bindex][pindex]; + + // stop now if no more packets + if (((status = le32_to_cpu(*pkt)) & RXPACKET_STATUS_FLAG_MASK) == RX_READY) + break; + + // if this is the first packet in a buffer, switch the SAA9730 to + // use the next buffer for subsequent incoming packets. + if (pindex == 0) + __select_buffer(spd, bindex == 0); + + // check for good packet + if (status & RXPACKET_STATUS_GOOD) { + + pktlen = status & RXPACKET_STATUS_SIZE_MASK ; + + if (pktlen > 0) { + (sc->funs->eth_drv->recv)(sc, pktlen); + // done = 1; + } + } + + /* go to next packet in sequence */ + spd->next_rx_pindex++; + if (spd->next_rx_pindex >= SAA9730_RXPKTS_PER_BUFFER) { + spd->next_rx_pindex = 0; + spd->next_rx_bindex++; + if (spd->next_rx_bindex >= SAA9730_BUFFERS) + spd->next_rx_bindex = 0; + } + } + + if (((poll_count++) % 100) == 0) + __check_rxstate(spd); +} + + +static void +saa9730_recv(struct eth_drv_sc *sc, struct eth_drv_sg *sg_list, int sg_len) +{ + struct saa9730_priv_data *spd = (struct saa9730_priv_data *)sc->driver_private; + volatile cyg_uint32 *pkt; + cyg_uint32 pktlen, status; + struct eth_drv_sg *last_sg; + + if (!spd->active) + return; + + pkt = spd->rx_buffer[spd->next_rx_bindex][spd->next_rx_pindex]; + + status = le32_to_cpu(*pkt); + if (status & RXPACKET_STATUS_GOOD) { + // packet is good + pktlen = status & RXPACKET_STATUS_SIZE_MASK; + + if (pktlen > 0) { + int total_len; + cyg_uint8 *from_p; + + // check we have memory to copy into; we would be called even if + // caller was out of memory in order to maintain our state. + if (0 == sg_len || 0 == sg_list) + return; // caller was out of mbufs + + total_len = pktlen; + from_p = (cyg_uint8 *)((unsigned)pkt + 4); + + for (last_sg = &sg_list[sg_len]; sg_list < last_sg; sg_list++) { + cyg_uint8 *to_p; + int l; + + to_p = (cyg_uint8 *)(sg_list->buf); + l = sg_list->len; + + if (0 >= l || 0 == to_p) + return; // caller was out of mbufs + + if (l > total_len) + l = total_len; + + memcpy(to_p, (unsigned char *)from_p, l); + from_p += l; + total_len -= l; + } + } + } +} + +static inline void +__do_deliver(struct eth_drv_sc *sc) +{ + // First pass any rx data up the stack + __rx_poll(sc); + + // Then scan for completed Txen and inform the stack + __tx_poll(sc); +} + +static void +saa9730_poll(struct eth_drv_sc *sc) +{ + struct saa9730_priv_data *spd = (struct saa9730_priv_data *)sc->driver_private; + +#ifndef CYGPKG_REDBOOT + cyg_drv_interrupt_mask(spd->vector); +#endif + + (void)saa9730_isr(spd->vector, (cyg_addrword_t)spd); + + __do_deliver(sc); + + cyg_drv_interrupt_acknowledge(spd->vector); + +#ifndef CYGPKG_REDBOOT + cyg_drv_interrupt_unmask(spd->vector); +#endif +} + + +// The deliver function (ex-DSR) handles the ethernet [logical] processing +static void +saa9730_deliver(struct eth_drv_sc *sc) +{ + struct saa9730_priv_data *spd = (struct saa9730_priv_data *)sc->driver_private; + + if (spd->active) + __do_deliver(sc); +} + + diff --git a/packages/devs/eth/mips/atlas/current/src/if_buffers.S b/packages/devs/eth/mips/atlas/current/src/if_buffers.S new file mode 100644 --- /dev/null +++ b/packages/devs/eth/mips/atlas/current/src/if_buffers.S @@ -0,0 +1,55 @@ +// #======================================================================== +// # +// # if_buffers.S +// # +// # Declare a chunk of 4Kbyte aligned memory for use by bus-mastering +// # PCI ethernet device. +// # +// #======================================================================== +// ####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +// ####COPYRIGHTEND#### +// #======================================================================== +// ######DESCRIPTIONBEGIN#### +// # +// # Author(s): msalter +// # Contributors: msalter +// # Date: 2000-11-03 +// # Purpose: +// # Description: This file defines a chunk of 2Kbyte aligned memory for use +// # by bus-mastering PCI ethernet device. +// # +// #####DESCRIPTIONEND#### +// # +// #======================================================================== + +#include "saa9730.h" + + .bss + .p2align(11) + .globl cyg_io_atlas_2kbuffers +cyg_io_atlas_2kbuffers: + .rept (SAA9730_RXPKTS_PER_BUFFER + SAA9730_TXPKTS_PER_BUFFER) \ + * SAA9730_BUFFERS * SAA9730_PACKET_SIZE + .byte 0 + .endr diff --git a/packages/devs/eth/mips/atlas/current/src/saa9730.h b/packages/devs/eth/mips/atlas/current/src/saa9730.h new file mode 100644 --- /dev/null +++ b/packages/devs/eth/mips/atlas/current/src/saa9730.h @@ -0,0 +1,376 @@ +#ifndef CYGONCE_DEVS_ETH_MIPS_ATLAS_SAA9730_H +#define CYGONCE_DEVS_ETH_MIPS_ATLAS_SAA9730_H +/*========================================================================== +// +// saa9730.h +// Philips SAA9730 IO Chip Ethernet Interface +// +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): msalter +// Contributors: msalter +// Date: 2000-12-09 +// Description: Definitions for Philips SAA9730 Ethernet module. +// +//####DESCRIPTIONEND#### +*/ + +// QS6612 PHY definitions + +#define PHY_CONTROL 0 +#define PHY_STATUS 1 +#define PHY_REG31 31 + +#define PHY_CONTROL_RESET (1 << 15) +#define PHY_CONTROL_AUTO_NEG (1 << 12) +#define PHY_CONTROL_RESTART_AUTO_NEG (1 << 9) + +#define PHY_STATUS_LINK_UP (1 << 2) + +#define PHY_REG31_OPMODE_SHIFT 2 +#define PHY_REG31_OPMODE_MSK (7 << PHY_REG31_OPMODE_SHIFT) + +#define OPMODE_AUTONEGOTIATE 0 +#define OPMODE_10BASET_HALFDUPLEX 1 +#define OPMODE_100BASEX_HALFDUPLEX 2 +#define OPMODE_REPEATER_MODE 3 +#define OPMODE_UNDEFINED 4 +#define OPMODE_10BASET_FULLDUPLEX 5 +#define OPMODE_100BASEX_FULLDUPLEX 6 +#define OPMODE_ISOLATE 7 + +#define QS6612_PHY_ADDRESS 0 +#define PHY_ADDRESS QS6612_PHY_ADDRESS + +// Number of 6-byte entries in the CAM +#define SAA9730_CAM_ENTRIES 10 + +// TX and RX packet size fixed at 2k bytes by hw +#define SAA9730_PACKET_SIZE 2048 + +// Number of TX buffers = number of RX buffers = 2, +// which is fixed according to HW requirements +#define SAA9730_BUFFERS 2 + +// Number of RX packets per RX buffer +#define SAA9730_RXPKTS_PER_BUFFER 2 + +// Number of TX packets per TX buffer +#define SAA9730_TXPKTS_PER_BUFFER 1 + +// Minimum packet size +#define SAA9730_MIN_PACKET_SIZE 60 + +// owner ship bit +#define SAA9730_BLOCK_OWNED_BY_SYSTEM 0 +#define SAA9730_BLOCK_OWNED_BY_HARDWARE 1 + +// Default Rcv interrupt count +#define SAA9730_DEFAULT_RCV_INTERRUPT_CNT 4 + +// Default maxium transmit retry +#define SAA9730_DEFAULT_MAX_TXM_RETRY 16 + +// Default time out value +#define SAA9730_DEFAULT_TIME_OUT_CNT 200 + +// MAX map registers +#define SAA9730__MAX_MAP_REGISTERS 64 + +// Defines used by Interrupt code +#define SAA9730_DMA_PACKET_SIZE 2048 +#define SAA9730_VALID_PACKET 0xC0000000 +#define SAA9730_FRAME_TYPELEN_OFFSET 12 +#define SAA9730_ETH_MIN_FRAME_SIZE 60 +#define SAA9730_DEST_ADDR_SIZE 6 +#define SAA9730_SRC_ADDR_SIZE 6 +#define SAA9730_TYPE_LEN_SIZE 2 + +// MAC receive error +#define SAA9730_MAC_GOOD_RX (0x00004000) << 11 +#define SAA9730_MAC_RCV_ALIGN_ERROR (0x00000100) << 11 +#define SAA9730_MAC_RCV_CRC_ERROR (0x00000200) << 11 +#define SAA9730_MAC_RCV_OVERFLOW (0x00000400) << 11 + +// This number is arbitrary and can be increased if needed +#define SAA9730_MAX_MULTICAST_ADDRESSES 20 + +// These macros are machine dependent. +// They convert the big endian representation to the little endian +// format, used by the DMA-engine of the LAN-controller on the PCI-bus. +// Convert by BE: +#ifdef MIPSEL +#define cpu_to_le32(x) (x) +#define le32_to_cpu(x) (x) +#else +#define cpu_to_le32(x) ((((cyg_uint32)(x)) << 24) | \ + ((0x0000FF00UL & ((cyg_uint32)(x))) << 8) | \ + ((0x00FF0000UL & ((cyg_uint32)(x))) >> 8) | \ + (((cyg_uint32)(x)) >> 24)) +#define le32_to_cpu(x) cpu_to_le32(x) +#endif +// Convert by LE: +#ifdef MIPSEB +#define cpu_to_be32( value ) (value) +#define be32_to_cpu( value ) (value) +#else +#define cpu_to_be32(x) ((((cyg_uint32)(x)) << 24) | \ + ((0x0000FF00UL & ((cyg_uint32)(x))) << 8) | \ + ((0x00FF0000UL & ((cyg_uint32)(x))) >> 8) | \ + (((cyg_uint32)(x)) >> 24)) +#define be32_to_cpu(x) cpu_to_be32(x) +#endif + +// SAA9730 Event Manager Registers +#define SAA9730_EVM_ISR *((volatile unsigned *)(__base + 0x02000)) +#define SAA9730_EVM_IER *((volatile unsigned *)(__base + 0x02004)) +#define SAA9730_EVM_IMR *((volatile unsigned *)(__base + 0x02008)) + +#define SAA9730_EVM_IER_SW *((volatile unsigned *)(__base + 0x0202c)) + +#define SAA9730_EVM_LAN_INT (1<<16) // LAN interrupt bit +#define SAA9730_EVM_MASTER (1<<0) // Master interrupt bit + +// SAA9730 LAN Registers +#define SAA9730_TXBUFA *((volatile unsigned *)(__base + 0x20400)) // TX buffer A + +#define SAA9730_TXBUFB *((volatile unsigned *)(__base + 0x20404)) // TX buffer B + +#define SAA9730_RXBUFA *((volatile unsigned *)(__base + 0x20408)) // RX buffer A + +#define SAA9730_RXBUFB *((volatile unsigned *)(__base + 0x2040C)) // RX buffer B + +#define SAA9730_PKTCNT *((volatile unsigned *)(__base + 0x20410)) // Packet count + +#define SAA9730_OK2USE *((volatile unsigned *)(__base + 0x20414)) // OK-to-use +# define SAA9730_OK2USE_TXA 8 +# define SAA9730_OK2USE_TXB 4 +# define SAA9730_OK2USE_RXA 2 +# define SAA9730_OK2USE_RXB 1 + +#define SAA9730_DMACTL *((volatile unsigned *)(__base + 0x20418)) // DMA control +# define SAA9730_DMACTL_BLKINT (1 << 31) +# define SAA9730_DMACTL_MAXXFER_ANY (0 << 18) +# define SAA9730_DMACTL_MAXXFER_8 (1 << 18) +# define SAA9730_DMACTL_MAXXFER_32 (2 << 18) +# define SAA9730_DMACTL_MAXXFER_64 (3 << 18) +# define SAA9730_DMACTL_ENDIAN_LITTLE (0 << 16) +# define SAA9730_DMACTL_ENDIAN_2143 (1 << 16) +# define SAA9730_DMACTL_ENDIAN_4321 (2 << 16) +# define SAA9730_DMACTL_RXINTCNT_SHIFT 8 +# define SAA9730_DMACTL_RXINTCNT_MSK (0xff << SAA9730_DMACTL_RXINTCNT_SHIFT) +# define SAA9730_DMACTL_ENTX (1 << 7) +# define SAA9730_DMACTL_ENRX (1 << 6) +# define SAA9730_DMACTL_RXFULL (1 << 5) +# define SAA9730_DMACTL_RXTOINT (1 << 4) +# define SAA9730_DMACTL_RXINT (1 << 3) +# define SAA9730_DMACTL_TXINT (1 << 2) +# define SAA9730_DMACTL_MACTXINT (1 << 1) +# define SAA9730_DMACTL_MACRXINT (1 << 0) + +#define SAA9730_TIMOUT *((volatile unsigned *)(__base + 0x2041C)) // Time out + +#define SAA9730_DMASTA *((volatile unsigned *)(__base + 0x20420)) // DMA status +# define SAA9730_DMASTA_TXABADR_MSK (1 << 19) +# define SAA9730_DMASTA_TXBBADR_MSK (1 << 18) +# define SAA9730_DMASTA_RXABADR_MSK (1 << 17) +# define SAA9730_DMASTA_RXBBADR_MSK (1 << 16) +# define SAA9730_DMASTA_RXBBADR_SHIFT 8 +# define SAA9730_DMASTA_RXPCKCNT_MASK (0xff << SAA9730_DMASTA_RXPCKCNT_SHIFT) +# define SAA9730_DMASTA_TXMACBUSY_MSK (1 << 7) +# define SAA9730_DMASTA_RXAFULL_MSK (1 << 6) +# define SAA9730_DMASTA_RXBFULL_MSK (1 << 5) +# define SAA9730_DMASTA_RXTOINT_MSK (1 << 4) +# define SAA9730_DMASTA_RXINT_MSK (1 << 3) +# define SAA9730_DMASTA_TXINT_MSK (1 << 2) +# define SAA9730_DMASTA_MACTXINT_MSK (1 << 1) +# define SAA9730_DMASTA_MACRXINT_MSK (1 << 0) + +#define SAA9730_DMATST *((volatile unsigned *)(__base + 0x20424)) // DMA loop back +# define SAA9730_DMATST_LPBACK (1 << 24) +# define SAA9730_DMATST_RESET 1 + +#define SAA9730_PAUSE *((volatile unsigned *)(__base + 0x20430)) // Pause count + +#define SAA9730_REMPAUSE *((volatile unsigned *)(__base + 0x20434)) // Remote Pause count + +#define SAA9730_MACCTL *((volatile unsigned *)(__base + 0x20440)) // MAC control +# define SAA9730_MACCTL_MISSRINT (1 << 13) +# define SAA9730_MACCTL_MISSROLL (1 << 10) +# define SAA9730_MACCTL_LOOP10 (1 << 7) +# define SAA9730_MACCTL_CONMODE_AUTOMATIC (0 << 5) +# define SAA9730_MACCTL_CONMODE_FORCE_10MB (1 << 5) +# define SAA9730_MACCTL_CONMODE_FORCE_MII (2 << 5) +# define SAA9730_MACCTL_LPBACK (1 << 4) +# define SAA9730_MACCTL_FULLDUP (1 << 3) +# define SAA9730_MACCTL_RESET (1 << 2) +# define SAA9730_MACCTL_HALTNOW (1 << 1) +# define SAA9730_MACCTL_HALTREQ (1 << 0) + +#define SAA9730_CAMCTL *((volatile unsigned *)(__base + 0x20444)) // CAM control +# define SAA9730_CAMCTL_COMPARE (1 << 4) +# define SAA9730_CAMCTL_NEGATE (1 << 3) +# define SAA9730_CAMCTL_BROADCAST (1 << 2) +# define SAA9730_CAMCTL_MULTICAST (1 << 1) +# define SAA9730_CAMCTL_UNICAST (1 << 0) + +#define SAA9730_TXCTL *((volatile unsigned *)(__base + 0x20448)) // TX control +# define SAA9730_TXCTL_COMPLINT (1 << 14) +# define SAA9730_TXCTL_TXPARINT (1 << 13) +# define SAA9730_TXCTL_LATECOLLINT (1 << 12) +# define SAA9730_TXCTL_EXCOLLINT (1 << 11) +# define SAA9730_TXCTL_CARRIERINT (1 << 10) +# define SAA9730_TXCTL_DEFERINT (1 << 9) +# define SAA9730_TXCTL_UNDERINT (1 << 8) +# define SAA9730_TXCTL_MII10 (1 << 7) +# define SAA9730_TXCTL_SDPAUSE (1 << 6) +# define SAA9730_TXCTL_NOEXDEF (1 << 5) +# define SAA9730_TXCTL_FBACK (1 << 4) +# define SAA9730_TXCTL_NOCRC (1 << 3) +# define SAA9730_TXCTL_NOPAD (1 << 2) +# define SAA9730_TXCTL_TXHALT (1 << 1) +# define SAA9730_TXCTL_ENTX (1 << 0) + +#define SAA9730_TXSTA *((volatile unsigned *)(__base + 0x2044C)) // TX status +# define SAA9730_TXSTA_SQERR (1 << 16) +# define SAA9730_TXSTA_TXHALTED (1 << 15) +# define SAA9730_TXSTA_COMPLETION (1 << 14) +# define SAA9730_TXSTA_PARITYERR (1 << 13) +# define SAA9730_TXSTA_LATECOLLERR (1 << 12) +# define SAA9730_TXSTA_WAS10MB (1 << 11) +# define SAA9730_TXSTA_LOSTCARRIER (1 << 10) +# define SAA9730_TXSTA_EXDEFER (1 << 9) +# define SAA9730_TXSTA_UNDERRUN (1 << 8) +# define SAA9730_TXSTA_INTERRUPT (1 << 7) +# define SAA9730_TXSTA_PAUSED (1 << 6) +# define SAA9730_TXSTA_DEFERRED (1 << 5) +# define SAA9730_TXSTA_EXCOLL (1 << 4) +# define SAA9730_TXSTA_COLLISIONS_MASK 0xf + +#define SAA9730_RXCTL *((volatile unsigned *)(__base + 0x20450)) // RX control +# define SAA9730_RXCTL_ENGOOD (1 << 14) +# define SAA9730_RXCTL_ENPARITY (1 << 13) +# define SAA9730_RXCTL_ENLONGERR (1 << 11) +# define SAA9730_RXCTL_ENOVER (1 << 10) +# define SAA9730_RXCTL_ENCRCERR (1 << 9) +# define SAA9730_RXCTL_ENALIGN (1 << 8) +# define SAA9730_RXCTL_IGNORECRC (1 << 6) +# define SAA9730_RXCTL_PASSCTL (1 << 5) +# define SAA9730_RXCTL_STRIPCRC (1 << 4) +# define SAA9730_RXCTL_SHORTEN (1 << 3) +# define SAA9730_RXCTL_LONGEN (1 << 2) +# define SAA9730_RXCTL_RXHALT (1 << 1) +# define SAA9730_RXCTL_ENRX (1 << 0) + +#define SAA9730_RXSTA *((volatile unsigned *)(__base + 0x20454)) // RX status +# define SAA9730_RXSTA_HALTED (1 << 15) +# define SAA9730_RXSTA_GOOD (1 << 14) +# define SAA9730_RXSTA_PARITY (1 << 13) +# define SAA9730_RXSTA_LONGERR (1 << 11) +# define SAA9730_RXSTA_OVERFLOW (1 << 10) +# define SAA9730_RXSTA_CRCERR (1 << 9) +# define SAA9730_RXSTA_ALIGNERR (1 << 8) +# define SAA9730_RXSTA_WAS10MB (1 << 7) +# define SAA9730_RXSTA_INTERRUPT (1 << 6) +# define SAA9730_RXSTA_CONTROLRCV (1 << 5) + +#define SAA9730_MDDATA *((volatile unsigned *)(__base + 0x20458)) // PHY mgmt data +# define SAA9730_MDDATA_DATA_MASK (0xffff << SAA9730_MDDATA_DATA_SHIFT) + +#define SAA9730_MDCTL *((volatile unsigned *)(__base + 0x2045C)) // PHY mgmt control +# define SAA9730_MDCTL_PRESUP (1 << 12) +# define SAA9730_MDCTL_BUSY (1 << 11) +# define SAA9730_MDCTL_WRITE (1 << 10) +# define SAA9730_MDCTL_PHY_SHIFT 5 +# define SAA9730_MDCTL_PHY_MASK (0x1f << SAA9730_MDCTL_PHY_SHIFT) +# define SAA9730_MDCTL_ADDR_MASK 0x1f + +#define SAA9730_CAMADR *((volatile unsigned *)(__base + 0x20460)) // CAM address +# define SAA9730_CAMADR_ADDRESS_MASK (0x1ff << SAA9730_CAMADR_ADDRESS_SHIFT) + +#define SAA9730_CAMDAT *((volatile unsigned *)(__base + 0x20464)) // CAM data + +#define SAA9730_CAMENA *((volatile unsigned *)(__base + 0x20468)) // CAM enable +# define SAA9730_CAMENA_ENABLE_MASK (0x3fffff << SAA9730_CAMENA_ENABLE_SHIFT) + +#define SAA9730_DBGRXS *((volatile unsigned *)(__base + 0x20508)) // DEBUG +# define SAA9730_DBGRXS_RXPI_MASK (0x3ff << 16) +# define SAA9730_DBGRXS_RXPI_ERROR (0x001 << 16) +# define SAA9730_DBGRXS_RXDII_MASK 0x1ff +# define SAA9730_DBGRXS_RXDII_ERROR 8 + + +// ******** Packet control/status ********** + +#define TXPACKET_CTL_FLAG_MASK (0x3 << 30) +# define TX_EMPTY (0 << 30) +# define TX_READY (2 << 30) +# define TX_HWDONE (3 << 30) + +# define TXPACKET_CTL_IRQ_MASK (1 << 29) +# define TXPACKET_CTL_NOCRC_MASK (1 << 28) +# define TXPACKET_CTL_NOPAD_MASK (1 << 27) +# define TXPACKET_CTL_SIZE_MASK 0x7ff + +#define TXPACKET_STATUS_FLAG_MASK (0x3 << 30) +# define TXPACKET_STATUS_SQERR (1 << 27) +# define TXPACKET_STATUS_TXHALTED (1 << 26) +# define TXPACKET_STATUS_COMPLETION (1 << 25) +# define TXPACKET_STATUS_PARITYERR (1 << 24) +# define TXPACKET_STATUS_LATECOLLERR (1 << 23) +# define TXPACKET_STATUS_WAS10MB (1 << 22) +# define TXPACKET_STATUS_LOSTCARRIER (1 << 21) +# define TXPACKET_STATUS_EXDEFER (1 << 20) +# define TXPACKET_STATUS_UNDERRUN (1 << 19) +# define TXPACKET_STATUS_COLLISIONS_SHIFT 11 +# define TXPACKET_STATUS_COLLISIONS_MASK (0x1f << TXPACKET_STATUS_COLLISIONS_SHIFT) +# define TXPACKET_STATUS_SIZE_MASK 0x7ff + +# define TXPACKET_STATUS_ERROR (TXPACKET_STATUS_EXDEFER | \ + TXPACKET_STATUS_LATECOLLERR | \ + TXPACKET_STATUS_LOSTCARRIER | \ + TXPACKET_STATUS_UNDERRUN | \ + TXPACKET_STATUS_SQERR) + +# define RXPACKET_STATUS_FLAG_MASK (0x3 << 30) +# define RX_NDIS (0 << 30) +# define RX_INVALID_STAT (1 << 30) +# define RX_READY (2 << 30) +# define RX_HWDONE (3 << 30) + +# define RXPACKET_STATUS_GOOD (1 << 25) +# define RXPACKET_STATUS_PARITY (1 << 24) +# define RXPACKET_STATUS_LONGERR (1 << 22) +# define RXPACKET_STATUS_OVERFLOW (1 << 21) +# define RXPACKET_STATUS_CRCERR (1 << 20) +# define RXPACKET_STATUS_ALIGNERR (1 << 19) +# define RXPACKET_STATUS_WAS10MB (1 << 18) +# define RXPACKET_STATUS_SIZE_MASK 0x7ff + +#endif // CYGONCE_DEVS_ETH_MIPS_ATLAS_SAA9730_H diff --git a/packages/devs/eth/mips/ocelot/current/ChangeLog b/packages/devs/eth/mips/ocelot/current/ChangeLog new file mode 100644 --- /dev/null +++ b/packages/devs/eth/mips/ocelot/current/ChangeLog @@ -0,0 +1,37 @@ +2001-03-02 Jesper Skov + + * include/devs_eth_mips_rm7000_ocelot.inl: Define controller PCI + details. + +2001-11-29 Jesper Skov + + * cdl/mips_rm7000_ocelot_eth_drivers.cdl: Platform specific + information required to use the generic i82559 driver for the + Ocelot platform. + * include/devs_eth_mips_rm7000_ocelot.inl: Same. + +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//=========================================================================== diff --git a/packages/devs/eth/mips/ocelot/current/cdl/mips_rm7000_ocelot_eth_drivers.cdl b/packages/devs/eth/mips/ocelot/current/cdl/mips_rm7000_ocelot_eth_drivers.cdl new file mode 100644 --- /dev/null +++ b/packages/devs/eth/mips/ocelot/current/cdl/mips_rm7000_ocelot_eth_drivers.cdl @@ -0,0 +1,104 @@ +# ==================================================================== +# +# ocelot_eth_drivers.cdl +# +# Ethernet drivers - support for i82559 ethernet controller +# on the QED Ocelot board. +# +# ==================================================================== +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Red Hat eCos Public License +# Version 1.1 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://www.redhat.com/ +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Configurable Operating System, +# released September 30, 1998. +# +# The Initial Developer of the Original Code is Red Hat. +# Portions created by Red Hat are +# Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +# All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +# ==================================================================== +######DESCRIPTIONBEGIN#### +# +# Author(s): jskov +# Contributors: jskov +# Date: 2001-01-25 +# +#####DESCRIPTIONEND#### +# +# ==================================================================== + +cdl_package CYGPKG_DEVS_ETH_MIPS_RM7000_OCELOT { + display "QED Ocelot board ethernet driver" + description "Ethernet driver for QED Ocelot board." + + parent CYGPKG_IO_ETH_DRIVERS + active_if CYGPKG_IO_ETH_DRIVERS + active_if CYGPKG_HAL_MIPS_RM7000_OCELOT + + include_dir cyg/io + + # FIXME: This really belongs in the INTEL_I82559 package + cdl_interface CYGINT_DEVS_ETH_INTEL_I82559_REQUIRED { + display "Intel i82559 ethernet driver required" + } + + define_proc { + puts $::cdl_system_header "/***** ethernet driver proc output start *****/" + puts $::cdl_system_header "#define CYGDAT_DEVS_ETH_INTEL_I82559_INL " + puts $::cdl_system_header "#define CYGDAT_DEVS_ETH_INTEL_I82559_CFG " + puts $::cdl_system_header "/***** ethernet driver proc output end *****/" + } + + cdl_component CYGPKG_DEVS_ETH_MIPS_RM7000_OCELOT_ETH0 { + display "Ocelot ethernet port 0 driver" + flavor bool + default_value 1 + description " + This option includes the ethernet device driver for the + Ocelot port 0 - that is the connector on the front of + the board." + + implements CYGHWR_NET_DRIVERS + implements CYGHWR_NET_DRIVER_ETH0 + implements CYGINT_DEVS_ETH_INTEL_I82559_REQUIRED + + cdl_option CYGDAT_DEVS_ETH_MIPS_RM7000_OCELOT_ETH0_NAME { + display "Device name for the ETH0 ethernet port 0 driver" + flavor data + default_value {"\"eth0\""} + description " + This option sets the name of the ethernet device for the + Ocelot port 0." + } + + cdl_component CYGSEM_DEVS_ETH_MIPS_RM7000_OCELOT_ETH0_SET_ESA { + display "Set the ethernet station address" + flavor bool + calculated 1 + description "Enabling this option will allow the ethernet + station address to be forced to the value set by the + configuration. This may be required if the hardware does + not include a serial EEPROM for the ESA." + + cdl_option CYGDAT_DEVS_ETH_MIPS_RM7000_OCELOT_ETH0_ESA { + display "The ethernet station address" + flavor data + default_value {"{0x08, 0x88, 0x12, 0x34, 0x56, 0x78}"} + description "The ethernet station address" + } + } + } +} diff --git a/packages/devs/eth/mips/ocelot/current/include/devs_eth_mips_rm7000_ocelot.inl b/packages/devs/eth/mips/ocelot/current/include/devs_eth_mips_rm7000_ocelot.inl new file mode 100644 --- /dev/null +++ b/packages/devs/eth/mips/ocelot/current/include/devs_eth_mips_rm7000_ocelot.inl @@ -0,0 +1,104 @@ +//========================================================================== +// +// devs/eth/mips/ocelot/include/devs_eth_mips_rm7000_ocelot.inl +// +// Ocelot ethernet I/O definitions. +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jskov +// Contributors:jskov +// Date: 2001-01-25 +// Purpose: Ocelot ethernet defintions +//####DESCRIPTIONEND#### +//========================================================================== + +#include // CYGNUM_HAL_INTERRUPT_ETHR + +#ifdef CYGPKG_DEVS_ETH_MIPS_RM7000_OCELOT_ETH0 + +#define CYGHWR_INTEL_I82559_PCI_MEM_MAP_BASE (CYGARC_UNCACHED_ADDRESS(0x0ff00000)) +#define CYGHWR_INTEL_I82559_PCI_MEM_MAP_SIZE 0x00100000 + +static I82559 i82559_eth0_priv_data = { +#ifdef CYGSEM_DEVS_ETH_MIPS_RM7000_OCELOT_ETH0_SET_ESA + hardwired_esa: 1, + mac_address: CYGDAT_DEVS_ETH_MIPS_RM7000_OCELOT_ETH0_ESA +#else + hardwired_esa: 0, +#endif +}; + +ETH_DRV_SC(i82559_sc0, + &i82559_eth0_priv_data, // Driver specific data + CYGDAT_DEVS_ETH_MIPS_RM7000_OCELOT_ETH0_NAME, // Name for device + i82559_start, + i82559_stop, + i82559_ioctl, + i82559_can_send, + i82559_send, + i82559_recv, + i82559_deliver, + i82559_poll, + i82559_int_vector + ); + +NETDEVTAB_ENTRY(i82559_netdev0, + "i82559_" CYGDAT_DEVS_ETH_MIPS_RM7000_OCELOT_ETH0_NAME, + i82559_init, + &i82559_sc0); + +#endif // CYGPKG_DEVS_ETH_MIPS_RM7000_OCELOT_ETH0 + + +// These arrays are used for sanity checking of pointers +I82559 * +i82559_priv_array[CYGNUM_DEVS_ETH_INTEL_I82559_DEV_COUNT] = { +#ifdef CYGPKG_DEVS_ETH_MIPS_RM7000_OCELOT_ETH0 + &i82559_eth0_priv_data, +#endif +}; + +#ifdef CYGDBG_USE_ASSERTS +// These are only used when assertions are enabled +cyg_netdevtab_entry_t * +i82559_netdev_array[CYGNUM_DEVS_ETH_INTEL_I82559_DEV_COUNT] = { +#ifdef CYGPKG_DEVS_ETH_MIPS_RM7000_OCELOT_ETH0 + &i82559_netdev0, +#endif +}; + +struct eth_drv_sc * +i82559_sc_array[CYGNUM_DEVS_ETH_INTEL_I82559_DEV_COUNT] = { +#ifdef CYGPKG_DEVS_ETH_MIPS_RM7000_OCELOT_ETH0 + &i82559_sc0, +#endif +}; +#endif // CYGDBG_USE_ASSERTS + +// EOF devs_eth_mips_rm7000_ocelot.inl diff --git a/packages/devs/flash/amd/am29f040b/current/ChangeLog b/packages/devs/flash/amd/am29f040b/current/ChangeLog new file mode 100644 --- /dev/null +++ b/packages/devs/flash/amd/am29f040b/current/ChangeLog @@ -0,0 +1,62 @@ +2000-12-07 Jesper Skov + + * src/flash.h: Addresses and sizes are also affected by + interleaving. + * src/flash_erase_block.c: Plug in working loop. + * src/flash_program_buf.c: Same. + +2000-12-06 Jesper Skov + + * src/am29f040b_flash.c (flash_hwr_init): Use new query semantics. + * src/flash_query.c (flash_query): Changed accordingly. + + * src/flash.h (FLASH_Sector_Erase_Timer): Added. + + * src/flash_erase_block.c: Do not check error flag after operation + completes. + * src/flash_program_buf.c: Same. + +2000-12-05 Jonathan Larmour + + * src/am29f040b_flash.c (flash_code_overlaps): Define stext/etext + as array types so no assumptions can be made by the compiler about + location. + +2000-12-05 Jesper Skov + + * Cloned from MBX driver. + +2000-10-20 Gary Thomas + + * src/mbx_flash.c: + * src/flash_query.c: + * src/flash_program_buf.c: + * src/flash_erase_block.c: + * src/flash.h: + * cdl/flash_mbx.cdl: New package/file(s). + +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//=========================================================================== diff --git a/packages/devs/flash/amd/am29f040b/current/cdl/flash_amd_am29f040b.cdl b/packages/devs/flash/amd/am29f040b/current/cdl/flash_amd_am29f040b.cdl new file mode 100644 --- /dev/null +++ b/packages/devs/flash/amd/am29f040b/current/cdl/flash_amd_am29f040b.cdl @@ -0,0 +1,92 @@ +# ==================================================================== +# +# flash_amd_am29f040b.cdl +# +# FLASH memory - Hardware support for AMD AM29F040B +# +# ==================================================================== +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Red Hat eCos Public License +# Version 1.1 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://www.redhat.com/ +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Configurable Operating System, +# released September 30, 1998. +# +# The Initial Developer of the Original Code is Red Hat. +# Portions created by Red Hat are +# Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +# All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +# ==================================================================== +######DESCRIPTIONBEGIN#### +# +# Author(s): gthomas +# Contributors: gthomas, jskov +# Date: 2000-12-05 +# +#####DESCRIPTIONEND#### +# +# ==================================================================== + +cdl_package CYGPKG_DEVS_FLASH_AMD_AM29F040B { + display "AMD AM29F040B FLASH memory support" + description "FLASH memory device support for AMD AM29F040B" + parent CYGPKG_IO_FLASH + active_if CYGPKG_IO_FLASH + + active_if CYGINT_DEVS_FLASH_AMD_AM29F040B_REQUIRED + + implements CYGHWR_IO_FLASH_DEVICE + + include_dir . + include_files ; # none _exported_ whatsoever + + compile am29f040b_flash.c + + define_proc { + puts $::cdl_header "#include "; + puts $::cdl_header "#include CYGDAT_DEVS_FLASH_AMD_AM29F040B_CFG"; + } + + make -priority 1 { + flash_query.o: $(REPOSITORY)/$(PACKAGE)/src/flash_query.c + $(CC) -S $(INCLUDE_PATH) -mips2 -EB -fno-function-sections $(REPOSITORY)/$(PACKAGE)/src/flash_query.c + echo "#include " > flash_query2.S + cat flash_query.s >> flash_query2.S + echo "FUNC_END(flash_query_end)" >>flash_query2.S + $(CC) -c $(INCLUDE_PATH) -mips2 -EB -G0 -o flash_query.o flash_query2.S + $(AR) rcs $(PREFIX)/lib/libtarget.a flash_query.o + } + + make -priority 1 { + flash_erase_block.o: $(REPOSITORY)/$(PACKAGE)/src/flash_erase_block.c + $(CC) -S $(INCLUDE_PATH) -mips2 -EB -fno-function-sections $(REPOSITORY)/$(PACKAGE)/src/flash_erase_block.c + echo "#include " > flash_erase_block2.S + cat flash_erase_block.s >> flash_erase_block2.S + echo "FUNC_END(flash_erase_block_end)" >>flash_erase_block2.S + $(CC) -c $(INCLUDE_PATH) -mips2 -EB -G0 -o flash_erase_block.o flash_erase_block2.S + $(AR) rcs $(PREFIX)/lib/libtarget.a flash_erase_block.o + } + + make -priority 1 { + flash_program_buf.o: $(REPOSITORY)/$(PACKAGE)/src/flash_program_buf.c + $(CC) -S $(INCLUDE_PATH) -mips2 -EB -fno-function-sections $(REPOSITORY)/$(PACKAGE)/src/flash_program_buf.c + echo "#include " > flash_program_buf2.S + cat flash_program_buf.s >> flash_program_buf2.S + echo "FUNC_END(flash_program_buf_end)" >>flash_program_buf2.S + $(CC) -c $(INCLUDE_PATH) -mips2 -EB -G0 -o flash_program_buf.o flash_program_buf2.S + $(AR) rcs $(PREFIX)/lib/libtarget.a flash_program_buf.o + } +} + diff --git a/packages/devs/flash/amd/am29f040b/current/src/am29f040b_flash.c b/packages/devs/flash/amd/am29f040b/current/src/am29f040b_flash.c new file mode 100644 --- /dev/null +++ b/packages/devs/flash/amd/am29f040b/current/src/am29f040b_flash.c @@ -0,0 +1,105 @@ +//========================================================================== +// +// am29f040b_flash.c +// +// Flash programming +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas, jskov +// Date: 2000-12-05 +// Purpose: +// Description: +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include +#include +#include + +#define _FLASH_PRIVATE_ +#include + +#include "flash.h" + +static flash_data_t id[2*CYGHWR_FLASH_INTERLEAVE]; + +int +flash_hwr_init(void) +{ + flash_dev_query(&id); +#if 0 + dump_buf(id, sizeof(id)); +#endif + + // Check that flash_id data is valid - use to set up sizes etc. + + // Hard wired for now + flash_info.block_size = FLASH_BLOCK_SIZE * CYGHWR_FLASH_INTERLEAVE; + flash_info.blocks = FLASH_NUM_REGIONS; + flash_info.start = (void *)CYGHWR_FLASH_BASE; + flash_info.end = (void *)(CYGHWR_FLASH_BASE+ (FLASH_NUM_REGIONS * FLASH_BLOCK_SIZE * CYGHWR_FLASH_INTERLEAVE * CYGHWR_FLASH_SERIES)); + return FLASH_ERR_OK; +} + +// Map a hardware status to a package error +int +flash_hwr_map_error(int e) +{ + flash_data_t err = (flash_data_t) e; + + if (err & (FLASH_Err | FLASH_Drv_Verify_Err)) { + if ((err & FLASH_Drv_Verify_Err) == FLASH_Drv_Verify_Err) { + return FLASH_ERR_DRV_VERIFY; + } else + if (err & FLASH_Err) { + // FIXME: Can't tell error type from status word. Should + // we keep an internal driver state with that that + // information? + return FLASH_ERR_HWR; + } + return FLASH_ERR_HWR; + } else { + return FLASH_ERR_OK; + } +} + +// See if a range of FLASH addresses overlaps currently running code +bool +flash_code_overlaps(void *start, void *end) +{ + extern unsigned char _stext[], _etext[]; + + return ((((unsigned long)&_stext >= (unsigned long)start) && + ((unsigned long)&_stext < (unsigned long)end)) || + (((unsigned long)&_etext >= (unsigned long)start) && + ((unsigned long)&_etext < (unsigned long)end))); +} diff --git a/packages/devs/flash/amd/am29f040b/current/src/flash.h b/packages/devs/flash/amd/am29f040b/current/src/flash.h new file mode 100644 --- /dev/null +++ b/packages/devs/flash/amd/am29f040b/current/src/flash.h @@ -0,0 +1,128 @@ +#ifndef CYGONCE_FLASH_AMD_AM29F040B_H +#define CYGONCE_FLASH_AMD_AM29F040B_H +//========================================================================== +// +// flash.h +// +// Flash programming - device constants, etc. +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 2000-10-20 +// Purpose: +// Description: +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include // cyg_ types +#include // HAL_READ/WRITE macros + +// Platform specific details +#include CYGDAT_DEVS_FLASH_AMD_AM29F040B_INL + +#define FLASH_Read_ID 0x90 +#define FLASH_Reset 0xFF +#define FLASH_Program 0xA0 +#define FLASH_Block_Erase 0x30 + +#define FLASH_Busy 0x40 // "Toggle" bit +#define FLASH_Err 0x20 +#define FLASH_Sector_Erase_Timer 0x08 +#define FLASH_Drv_Verify_Err 0xff + +#define FLASH_Setup_Addr1 (0x555*CYGHWR_FLASH_INTERLEAVE) +#define FLASH_Setup_Addr2 (0x2AA*CYGHWR_FLASH_INTERLEAVE) +#define FLASH_Setup_Code1 0xAA +#define FLASH_Setup_Code2 0x55 +#define FLASH_Setup_Erase 0x80 + +#define FLASH_BLOCK_SIZE (0x10000*CYGHWR_FLASH_INTERLEAVE) +#define FLASH_NUM_REGIONS 8 + +#define FLASH_DEVICE_SIZE (FLASH_BLOCK_SIZE*FLASH_NUM_REGIONS) + +#define CYGHWR_FLASH_WIDTH 8 + + +//---------------------------------------------------------------------------- +// Macros for accessing mutiple flash devices (interleaved or in series) in +// a consistent way. + +#if (CYGHWR_FLASH_WIDTH == 8) +#define FLASH_READ(_p_, _v_) HAL_READ_UINT8(_p_, _v_) +#define FLASH_WRITE(_p_, _v_) HAL_WRITE_UINT8(_p_, _v_) +typedef cyg_uint8 flash_data_t; +#elif (CYGHWR_FLASH_WIDTH == 16) +#define FLASH_READ(_p_, _v_) HAL_READ_UINT16(_p_, _v_) +#define FLASH_WRITE(_p_, _v_) HAL_WRITE_UINT16(_p_, _v_) +typedef cyg_uint16 flash_data_t; +#elif (CYGHWR_FLASH_WIDTH == 32) +#define FLASH_READ(_p_, _v_) HAL_READ_UINT32(_p_, _v_) +#define FLASH_WRITE(_p_, _v_) HAL_WRITE_UINT32(_p_, _v_) +typedef cyg_uint32 flash_data_t; +#else +# error "Unsupported flash width" +#endif + +#define CYGHWR_FLASH_DEVICES (CYGHWR_FLASH_INTERLEAVE*CYGHWR_FLASH_SERIES) + +// Driver must use the FLASH_CMD_READ/WRITE macros to access devices. This +// will ensure that interleaved devices are properly accessed/programmed. +// However, the driver must handle devices in series itself - otherwise +// it wouldn't be possible to properly control block-specific commands. + +// Note that the _READ macro takes a pointer argument to where data +// read from the device(s) is stored. + +// Note that _p_, and _d_ must be of type flash_data_t*, and _c_ must +// be of type flash_data_t. + +#define FLASH_DATA_READ(_p_, _d_) \ + CYG_MACRO_START \ + int __i; \ + for (__i = 0; __i < CYGHWR_FLASH_INTERLEAVE; __i++) \ + FLASH_READ((_p_)+__i, *((_d_)+__i)); \ + CYG_MACRO_END +#define FLASH_DATA_WRITE(_p_, _d_) \ + CYG_MACRO_START \ + int __i; \ + for (__i = 0; __i < CYGHWR_FLASH_INTERLEAVE; __i++) \ + FLASH_WRITE((_p_)+__i, *((_d_)+__i)); \ + CYG_MACRO_END +#define FLASH_CMD_WRITE(_p_, _c_) \ + CYG_MACRO_START \ + int __i; \ + for (__i = 0; __i < CYGHWR_FLASH_INTERLEAVE; __i++) \ + FLASH_WRITE((_p_)+__i, (_c_)); \ + CYG_MACRO_END + +#endif // CYGONCE_FLASH_AMD_AM29F040B_H diff --git a/packages/devs/flash/amd/am29f040b/current/src/flash_erase_block.c b/packages/devs/flash/amd/am29f040b/current/src/flash_erase_block.c new file mode 100644 --- /dev/null +++ b/packages/devs/flash/amd/am29f040b/current/src/flash_erase_block.c @@ -0,0 +1,158 @@ +//========================================================================== +// +// flash_erase_block.c +// +// Flash programming +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas, jskov +// Date: 2000-12-05 +// Purpose: +// Description: +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include "flash.h" + +#include +#include +#include + +// +// CAUTION! This code must be copied to RAM before execution. Therefore, +// it must not contain any code which might be position dependent! +// + +int flash_erase_block(volatile flash_data_t *block) +{ + volatile flash_data_t *ROM; + int timeout = 50000; + int len; + int fail = 0; + flash_data_t array1[CYGHWR_FLASH_INTERLEAVE]; + flash_data_t array2[CYGHWR_FLASH_INTERLEAVE]; + flash_data_t *state, *new_state, *tmp_state; + + ROM = (volatile flash_data_t*)((unsigned long)block & ~(FLASH_DEVICE_SIZE-1)); + +#if 1 // So much for my good intentions + { + int erase_state2, new_state2; + + // Erase block - six step sequence + ROM[FLASH_Setup_Addr1] = FLASH_Setup_Code1; + ROM[FLASH_Setup_Addr2] = FLASH_Setup_Code2; + ROM[FLASH_Setup_Addr1] = FLASH_Setup_Erase; + ROM[FLASH_Setup_Addr1] = FLASH_Setup_Code1; + ROM[FLASH_Setup_Addr2] = FLASH_Setup_Code2; + *block = FLASH_Block_Erase; + for (timeout = 50; timeout--; timeout > 0) ; + erase_state2 = *block & FLASH_Busy; + timeout = 5000000; + while (true) { + new_state2 = *block; + if ((new_state2 & FLASH_Busy) == erase_state2) break; // "toggle" stopped + erase_state2 = new_state2 & FLASH_Busy; + if (new_state2 & FLASH_Err) break; + if (--timeout == 0) break; + } + + // Restore ROM to "normal" mode + ROM[0] = FLASH_Reset; + } +#else + // Erase block - six step sequence + FLASH_CMD_WRITE(ROM+FLASH_Setup_Addr1, FLASH_Setup_Code1); + FLASH_CMD_WRITE(ROM+FLASH_Setup_Addr2, FLASH_Setup_Code2); + FLASH_CMD_WRITE(ROM+FLASH_Setup_Addr1, FLASH_Setup_Erase); + FLASH_CMD_WRITE(ROM+FLASH_Setup_Addr1, FLASH_Setup_Code1); + FLASH_CMD_WRITE(ROM+FLASH_Setup_Addr2, FLASH_Setup_Code2); + FLASH_CMD_WRITE(block, FLASH_Block_Erase); + + state = array1; + new_state = array2; + + // Now poll for the completion of the sector erase timer (50us) + timeout = 5000000; // how many retries? + while (true) { + int i; + int done = 1; + + FLASH_DATA_READ(block, state); + for (i = 0; i < CYGHWR_FLASH_INTERLEAVE; i++) { + if (0 == (state[i] & FLASH_Sector_Erase_Timer)) + done = 0; + } + + if (done) break; // sector erase timers completed + if (--timeout == 0) break; // too many tries without success + } + + FLASH_DATA_READ(block, state); + timeout = 5000000; // how many retries? + while (true) { + int i; + int done = 1; + + FLASH_DATA_READ(block, new_state); + for (i = 0; i < CYGHWR_FLASH_INTERLEAVE; i++) { + if ((new_state[i] & FLASH_Busy) != (state[i] & FLASH_Busy)) { + done = 0; + if (new_state[i] & FLASH_Err) + fail = FLASH_Err; + } + } + // Switch state arrays + tmp_state = state; + state = new_state; + new_state = state; + + if (done) break; // "toggle" stopped + if (fail) break; // device failure + if (--timeout == 0) break; // too many tries without success + } + FLASH_CMD_WRITE(ROM, FLASH_Reset); +#endif + if (!fail) { + // Verify erase operation + len = (FLASH_BLOCK_SIZE*CYGHWR_FLASH_INTERLEAVE); + while (len > 0) { + if (*block++ != 0xFF) { + fail = FLASH_Drv_Verify_Err; + break; + } + len -= sizeof(*block); + } + } + + return fail; +} diff --git a/packages/devs/flash/amd/am29f040b/current/src/flash_program_buf.c b/packages/devs/flash/amd/am29f040b/current/src/flash_program_buf.c new file mode 100644 --- /dev/null +++ b/packages/devs/flash/amd/am29f040b/current/src/flash_program_buf.c @@ -0,0 +1,154 @@ +//========================================================================== +// +// flash_program_buf.c +// +// Flash programming +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas, jskov +// Date: 2000-12-05 +// Purpose: +// Description: +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include "flash.h" + +#include +#include +#include + +// +// CAUTION! This code must be copied to RAM before execution. Therefore, +// it must not contain any code which might be position dependent! +// + +int +flash_program_buf(volatile flash_data_t *addr, flash_data_t *data, int len) +{ + volatile flash_data_t *ROM; + int timeout; + int fail = 0; + flash_data_t array1[CYGHWR_FLASH_INTERLEAVE]; + flash_data_t array2[CYGHWR_FLASH_INTERLEAVE]; + flash_data_t *state, *new_state, *tmp_state; + +#if 0 + CYG_ASSERT(data & (sizeof(flash_data_t)-1) == 0, + "Data not properly aligned"); + CYG_ASSERT(addr & (CYGHWR_FLASH_INTERLEAVE*sizeof(flash_data_t)-1) == 0, + "Addr not properly aligned (to first interleaved device)"); +#endif + + while (len > 0) { + int i; + + // Base address of device(s) being programmed. + ROM = (volatile flash_data_t*)((unsigned long)addr & ~(FLASH_DEVICE_SIZE-1)); + +#if 1 // So much for my good intentions + { + int erase_state2, new_state2; + + // Program data [byte] - 4 step sequence + ROM[FLASH_Setup_Addr1] = FLASH_Setup_Code1; + ROM[FLASH_Setup_Addr2] = FLASH_Setup_Code2; + ROM[FLASH_Setup_Addr1] = FLASH_Program; + *addr = *data; + for (timeout = 50; timeout--; timeout > 0) ; + erase_state2 = *addr & FLASH_Busy; + while (true) { + new_state2 = *addr; + if ((new_state2 & FLASH_Busy) == erase_state2) break; // "toggle" stopped + erase_state2 = new_state2 & FLASH_Busy; + if (new_state2 & FLASH_Err) break; + if (--timeout == 0) break; + } + ROM[0] = FLASH_Reset; + if (*addr++ != *data++) { + new_state2 = 0xFF; + break; + } + len -= sizeof(*data); + } + +#else + // Program data - 4 step sequence + FLASH_CMD_WRITE(ROM+FLASH_Setup_Addr1, FLASH_Setup_Code1); + FLASH_CMD_WRITE(ROM+FLASH_Setup_Addr2, FLASH_Setup_Code2); + FLASH_CMD_WRITE(ROM+FLASH_Setup_Addr1, FLASH_Program); + FLASH_DATA_WRITE(addr, data); + + state = array1; + new_state = array2; + + FLASH_DATA_READ(addr, state); + timeout = 5000000; // how many retries? + while (true) { + int i; + int done = 1; + + FLASH_DATA_READ(addr, new_state); + for (i = 0; i < CYGHWR_FLASH_INTERLEAVE; i++) { + if ((new_state[i] & FLASH_Busy) != (state[i] & FLASH_Busy)) { + done = 0; + if (new_state[i] & FLASH_Err) + fail = FLASH_Err; + } + } + // Switch state arrays + tmp_state = state; + state = new_state; + new_state = state; + + if (done) break; // "toggle" stopped + if (fail) break; // device failure + if (--timeout == 0) break; // too many tries without success + } + FLASH_CMD_WRITE(ROM, FLASH_Reset); + // We have state in 'state' now, use 'new_state' to verify data. + for (i = 0; i < CYGHWR_FLASH_INTERLEAVE; i++) { + if (*addr++ != *data++) { + state[i] = FLASH_Drv_Verify_Err; + fail = FLASH_Drv_Verify_Err; + } + } + if (fail) break; + + len -= sizeof(flash_data_t) * CYGHWR_FLASH_INTERLEAVE; +#endif + } + + // Ideally, we'd want to return not only the failure code, but also + // the address/device that reported the error. + return fail; +} diff --git a/packages/devs/flash/amd/am29f040b/current/src/flash_query.c b/packages/devs/flash/amd/am29f040b/current/src/flash_query.c new file mode 100644 --- /dev/null +++ b/packages/devs/flash/amd/am29f040b/current/src/flash_query.c @@ -0,0 +1,80 @@ +//========================================================================== +// +// flash_query.c +// +// Flash programming - query device +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 2000-10-20 +// Purpose: +// Description: +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include "flash.h" + +#include +#include +#include +#include CYGHWR_MEMORY_LAYOUT_H + +// +// CAUTION! This code must be copied to RAM before execution. Therefore, +// it must not contain any code which might be position dependent! +// + +// Only reads the manufacturer and part number codes for the first +// device(s) in series. It is assumed that any devices in series +// will be of the same type. + +void +flash_query(void* data) +{ + volatile flash_data_t *ROM; + flash_data_t* id = (flash_data_t*) data; + + ROM = (volatile flash_data_t*) CYGHWR_FLASH_BASE; + + FLASH_CMD_WRITE(ROM+FLASH_Setup_Addr1, FLASH_Setup_Code1); + FLASH_CMD_WRITE(ROM+FLASH_Setup_Addr2, FLASH_Setup_Code2); + FLASH_CMD_WRITE(ROM+FLASH_Setup_Addr1, FLASH_Read_ID); + + // Manufacturers' code + FLASH_DATA_READ(ROM, id); + // Part number + FLASH_DATA_READ(ROM+CYGHWR_FLASH_INTERLEAVE, &id[CYGHWR_FLASH_INTERLEAVE]); + + FLASH_CMD_WRITE(ROM, FLASH_Reset); + + return id; +} diff --git a/packages/devs/flash/arm/assabet/current/ChangeLog b/packages/devs/flash/arm/assabet/current/ChangeLog --- a/packages/devs/flash/arm/assabet/current/ChangeLog +++ b/packages/devs/flash/arm/assabet/current/ChangeLog @@ -1,3 +1,16 @@ +2001-03-17 Gary Thomas + + * src/flash_unlock_block.c: + * src/flash_query.c: + * src/flash_program_buf.c: + * src/flash_lock_block.c: + * src/flash_erase_block.c: + * src/flash.h: + * src/assabet_flash.c: Removed - everything now generic. + + * include/assabet_strataflash.inl: + * cdl/flash_assabet.cdl: Change to use generic StrataFLASH driver. + 2000-12-05 Jonathan Larmour * src/assabet_flash.c (flash_code_overlaps): Define stext/etext diff --git a/packages/devs/flash/arm/assabet/current/cdl/flash_assabet.cdl b/packages/devs/flash/arm/assabet/current/cdl/flash_assabet.cdl --- a/packages/devs/flash/arm/assabet/current/cdl/flash_assabet.cdl +++ b/packages/devs/flash/arm/assabet/current/cdl/flash_assabet.cdl @@ -47,53 +47,25 @@ cdl_package CYGPKG_DEVS_FLASH_ASSABET { active_if CYGPKG_IO_FLASH requires CYGPKG_HAL_ARM_SA11X0_ASSABET - implements CYGHWR_IO_FLASH_DEVICE + requires CYGPKG_DEVS_FLASH_STRATA + implements CYGHWR_IO_FLASH_BLOCK_LOCKING - include_dir . - include_files ; # none _exported_ whatsoever - description "FLASH memory device support for Intel StrongARM SA-1110" - compile assabet_flash.c + include_dir cyg/io - make -priority 1 { - flash_erase_block.o: $(REPOSITORY)/$(PACKAGE)/src/flash_erase_block.c - $(CC) -S $(INCLUDE_PATH) $(CFLAGS) -g0 -fno-function-sections $(REPOSITORY)/$(PACKAGE)/src/flash_erase_block.c - echo " .globl flash_erase_block_end" >>flash_erase_block.s - echo "flash_erase_block_end:" >>flash_erase_block.s - $(CC) -c -o flash_erase_block.o flash_erase_block.s - $(AR) rcs $(PREFIX)/lib/libtarget.a flash_erase_block.o - } - make -priority 1 { - flash_program_buf.o: $(REPOSITORY)/$(PACKAGE)/src/flash_program_buf.c - $(CC) -S $(INCLUDE_PATH) $(CFLAGS) -g0 -fno-function-sections $(REPOSITORY)/$(PACKAGE)/src/flash_program_buf.c - echo " .globl flash_program_buf_end" >>flash_program_buf.s - echo "flash_program_buf_end:" >>flash_program_buf.s - $(CC) -c -o flash_program_buf.o flash_program_buf.s - $(AR) rcs $(PREFIX)/lib/libtarget.a flash_program_buf.o + # Arguably this should do in the generic package + # but then there is a logic loop so you can never enable it. + cdl_interface CYGINT_DEVS_FLASH_STRATA_REQUIRED { + display "Generic StrataFLASH driver required" } - make -priority 1 { - flash_query.o: $(REPOSITORY)/$(PACKAGE)/src/flash_query.c - $(CC) -S $(INCLUDE_PATH) $(CFLAGS) -g0 -fno-function-sections $(REPOSITORY)/$(PACKAGE)/src/flash_query.c - echo " .globl flash_query_end" >>flash_query.s - echo "flash_query_end:" >>flash_query.s - $(CC) -c -o flash_query.o flash_query.s - $(AR) rcs $(PREFIX)/lib/libtarget.a flash_query.o - } - make -priority 1 { - flash_lock_block.o: $(REPOSITORY)/$(PACKAGE)/src/flash_lock_block.c - $(CC) -S $(INCLUDE_PATH) $(CFLAGS) -g0 -fno-function-sections $(REPOSITORY)/$(PACKAGE)/src/flash_lock_block.c - echo " .globl flash_lock_block_end" >>flash_lock_block.s - echo "flash_lock_block_end:" >>flash_lock_block.s - $(CC) -c -o flash_lock_block.o flash_lock_block.s - $(AR) rcs $(PREFIX)/lib/libtarget.a flash_lock_block.o - } - make -priority 1 { - flash_unlock_block.o: $(REPOSITORY)/$(PACKAGE)/src/flash_unlock_block.c - $(CC) -S $(INCLUDE_PATH) $(CFLAGS) -g0 -fno-function-sections $(REPOSITORY)/$(PACKAGE)/src/flash_unlock_block.c - echo " .globl flash_unlock_block_end" >>flash_unlock_block.s - echo "flash_unlock_block_end:" >>flash_unlock_block.s - $(CC) -c -o flash_unlock_block.o flash_unlock_block.s - $(AR) rcs $(PREFIX)/lib/libtarget.a flash_unlock_block.o + + implements CYGINT_DEVS_FLASH_STRATA_REQUIRED + + define_proc { + puts $::cdl_system_header "/***** strataflash driver proc output start *****/" + puts $::cdl_system_header "#define CYGDAT_DEVS_FLASH_STRATA_INL " + puts $::cdl_system_header "#define CYGDAT_DEVS_FLASH_STRATA_CFG " + puts $::cdl_system_header "/***** strataflash driver proc output end *****/" } } diff --git a/packages/devs/flash/arm/assabet/current/include/assabet_strataflash.inl b/packages/devs/flash/arm/assabet/current/include/assabet_strataflash.inl new file mode 100644 --- /dev/null +++ b/packages/devs/flash/arm/assabet/current/include/assabet_strataflash.inl @@ -0,0 +1,59 @@ +#ifndef CYGONCE_DEVS_FLASH_ASSABET_STRATAFLASH_INL +#define CYGONCE_DEVS_FLASH_ASSABET_STRATAFLASH_INL +//========================================================================== +// +// assabet_strataflash.inl +// +// Flash programming - device constants, etc. +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas, hmt +// Contributors: gthomas +// Date: 2001-02-24 +// Purpose: +// Description: +// +//####DESCRIPTIONEND#### +// +//========================================================================== + + +// The assabet system has two 16-bit devices. +// Doc says: a StrataFlash 28F320J3A. The 320 means 32Mbit, so 4Mbyte. +// Reality: a StrataFlash 28F640J3A. The 640 means 64Mbit, so 8Mbyte. + +#define CYGNUM_FLASH_DEVICES (2) +#define CYGNUM_FLASH_BASE (0x50000000u) +#define CYGNUM_FLASH_BASE_MASK (0xFE000000u) // 32Mb devices +#define CYGNUM_FLASH_WIDTH (16) +#define CYGNUM_FLASH_BLANK (1) + +#endif // CYGONCE_DEVS_FLASH_ASSABET_STRATAFLASH_INL +// ------------------------------------------------------------------------ +// EOF assabet_strataflash.inl diff --git a/packages/devs/flash/arm/assabet/current/src/assabet_flash.c b/packages/devs/flash/arm/assabet/current/src/assabet_flash.c deleted file mode 100644 --- a/packages/devs/flash/arm/assabet/current/src/assabet_flash.c +++ /dev/null @@ -1,120 +0,0 @@ -//========================================================================== -// -// assabet_flash.c -// -// Flash programming -// -//========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Red Hat eCos Public License -// Version 1.1 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://www.redhat.com/ -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Configurable Operating System, -// released September 30, 1998. -// -// The Initial Developer of the Original Code is Red Hat. -// Portions created by Red Hat are -// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. -// All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//========================================================================== -//#####DESCRIPTIONBEGIN#### -// -// Author(s): gthomas -// Contributors: gthomas -// Date: 2000-07-26 -// Purpose: -// Description: -// -//####DESCRIPTIONEND#### -// -//========================================================================== - -#include -#include -#include - -#define _FLASH_PRIVATE_ -#include - -#include "flash.h" - -#define _si(p) ((p[1]<<8)|p[0]) - -int -flash_hwr_init(void) -{ - struct FLASH_query data, *qp; - extern char flash_query, flash_query_end; - typedef int code_fun(unsigned char *); - code_fun *_flash_query; - int code_len, stat, num_regions, region_size; - - // Copy 'program' code to RAM for execution - code_len = (unsigned long)&flash_query_end - (unsigned long)&flash_query; - _flash_query = (code_fun *)flash_info.work_space; - memcpy(_flash_query, &flash_query, code_len); - HAL_DCACHE_SYNC(); // Should guarantee this code will run - HAL_ICACHE_DISABLE(); // is also required to avoid old contents - - stat = (*_flash_query)(&data); - HAL_ICACHE_ENABLE(); - - qp = &data; - if (/*(qp->manuf_code == FLASH_Intel_code) && */ - (strncmp(qp->id, "QRY", 3) == 0)) { - num_regions = _si(qp->num_regions)+1; - region_size = _si(qp->region_size)*256; - - flash_info.block_size = region_size*2; // Pairs of chips - flash_info.blocks = num_regions; - flash_info.start = (void *)0x50000000; - flash_info.end = (void *)(0x50000000+(num_regions*region_size*2)); - return FLASH_ERR_OK; - } else { - printf("Can't identify FLASH, sorry\n"); - diag_dump_buf(data, sizeof(data)); - return FLASH_ERR_HWR; - } -} - -// Map a hardware status to a package error -int -flash_hwr_map_error(int err) -{ - if (err & 0x007E007E) { - printf("Err = %x\n", err); - if (err & 0x00100010) { - return FLASH_ERR_PROGRAM; - } else - if (err & 0x00200020) { - return FLASH_ERR_ERASE; - } else - return FLASH_ERR_HWR; // FIXME - } else { - return FLASH_ERR_OK; - } -} - -// See if a range of FLASH addresses overlaps currently running code -bool -flash_code_overlaps(void *start, void *end) -{ - extern char _stext[], _etext[]; - - return ((((unsigned long)&_stext >= (unsigned long)start) && - ((unsigned long)&_stext < (unsigned long)end)) || - (((unsigned long)&_etext >= (unsigned long)start) && - ((unsigned long)&_etext < (unsigned long)end))); -} diff --git a/packages/devs/flash/arm/assabet/current/src/flash.h b/packages/devs/flash/arm/assabet/current/src/flash.h deleted file mode 100644 --- a/packages/devs/flash/arm/assabet/current/src/flash.h +++ /dev/null @@ -1,90 +0,0 @@ -//========================================================================== -// -// flash.h -// -// Flash programming - device constants, etc. -// -//========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Red Hat eCos Public License -// Version 1.1 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://www.redhat.com/ -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Configurable Operating System, -// released September 30, 1998. -// -// The Initial Developer of the Original Code is Red Hat. -// Portions created by Red Hat are -// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. -// All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//========================================================================== -//#####DESCRIPTIONBEGIN#### -// -// Author(s): gthomas -// Contributors: gthomas -// Date: 2000-07-26 -// Purpose: -// Description: -// -//####DESCRIPTIONEND#### -// -//========================================================================== - -#ifndef _FLASH_HWR_H_ -#define _FLASH_HWR_H_ - -#define FLASH_BOOT_BLOCK_SIZE 0x4000 - -#define FLASH_Intel_code 0x89 - -#define FLASH_Read_ID 0x00900090 -#define FLASH_Read_Query 0x00980098 -#define FLASH_Read_Status 0x00700070 -#define FLASH_Clear_Status 0x00500050 -#define FLASH_Status_Ready 0x00800080 -#define FLASH_Write_Buffer 0x00E800E8 -#define FLASH_Program 0x00100010 -#define FLASH_Block_Erase 0x00200020 -#define FLASH_Set_Lock 0x00600060 -#define FLASH_Set_Lock_Confirm 0x00010001 -#define FLASH_Clear_Locks 0x00600060 -#define FLASH_Clear_Locks_Confirm 0x00D000D0 -#define FLASH_Confirm 0x00D000D0 -#define FLASH_Configure 0x00B800B8 -#define FLASH_Configure_ReadyWait 0x00000000 -#define FLASH_Configure_PulseOnErase 0x00010001 -#define FLASH_Configure_PulseOnProgram 0x00020002 -#define FLASH_Configure_PulseOnBoth 0x00030003 -#define FLASH_Reset 0x00FF00FF - -#define FLASH_BLOCK_SIZE 0x10000 - -#define FLASH_Intel_code 0x89 - -// Extended query information -struct FLASH_query { - unsigned char manuf_code; - unsigned char device_code; - unsigned char _unused0[14]; - unsigned char id[3]; // Q R Y - unsigned char _unused1[20]; - unsigned char device_size; - unsigned char device_interface[2]; - unsigned char buffer_size[2]; - unsigned char is_block_oriented; - unsigned char num_regions[2]; - unsigned char region_size[2]; -}; - -#endif // _FLASH_HWR_H_ diff --git a/packages/devs/flash/arm/assabet/current/src/flash_erase_block.c b/packages/devs/flash/arm/assabet/current/src/flash_erase_block.c deleted file mode 100644 --- a/packages/devs/flash/arm/assabet/current/src/flash_erase_block.c +++ /dev/null @@ -1,100 +0,0 @@ -//========================================================================== -// -// flash_erase_block.c -// -// Flash programming -// -//========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Red Hat eCos Public License -// Version 1.1 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://www.redhat.com/ -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Configurable Operating System, -// released September 30, 1998. -// -// The Initial Developer of the Original Code is Red Hat. -// Portions created by Red Hat are -// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. -// All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//========================================================================== -//#####DESCRIPTIONBEGIN#### -// -// Author(s): gthomas -// Contributors: gthomas -// Date: 2000-07-14 -// Purpose: -// Description: -// -//####DESCRIPTIONEND#### -// -//========================================================================== - -#include "flash.h" - -#include -#include -#include - -// -// CAUTION! This code must be copied to RAM before execution. Therefore, -// it must not contain any code which might be position dependent! -// - -int flash_erase_block(volatile unsigned long *block) -{ - volatile unsigned long *ROM; - unsigned long stat; - int timeout = 50000; - int cache_on; - int len; - - HAL_DCACHE_IS_ENABLED(cache_on); - if (cache_on) { - HAL_DCACHE_SYNC(); - HAL_DCACHE_DISABLE(); - } - - ROM = (volatile unsigned long *)((unsigned long)block & 0xFE000000); - - // Clear any error conditions - ROM[0] = FLASH_Clear_Status; - - // Erase block - ROM[0] = FLASH_Block_Erase; - *block = FLASH_Confirm; - timeout = 5000000; - while(((stat = ROM[0]) & FLASH_Status_Ready) != FLASH_Status_Ready) { - if (--timeout == 0) break; - } - - // Restore ROM to "normal" mode - ROM[0] = FLASH_Reset; - - // If an error was reported, see if the block erased anyway - if (stat & 0x007E007E) { - len = FLASH_BLOCK_SIZE; - while (len > 0) { - if (*block++ != 0xFFFFFFFF) break; - len -= sizeof(*block); - } - if (len == 0) stat = 0; - } - - if (cache_on) { - HAL_DCACHE_ENABLE(); - } - - return stat; -} diff --git a/packages/devs/flash/arm/assabet/current/src/flash_lock_block.c b/packages/devs/flash/arm/assabet/current/src/flash_lock_block.c deleted file mode 100644 --- a/packages/devs/flash/arm/assabet/current/src/flash_lock_block.c +++ /dev/null @@ -1,87 +0,0 @@ -//========================================================================== -// -// flash_lock_block.c -// -// Flash programming -// -//========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Red Hat eCos Public License -// Version 1.1 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://www.redhat.com/ -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Configurable Operating System, -// released September 30, 1998. -// -// The Initial Developer of the Original Code is Red Hat. -// Portions created by Red Hat are -// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. -// All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//========================================================================== -//#####DESCRIPTIONBEGIN#### -// -// Author(s): gthomas -// Contributors: gthomas -// Date: 2000-09-10 -// Purpose: -// Description: -// -//####DESCRIPTIONEND#### -// -//========================================================================== - -#include "flash.h" - -#include - -// -// CAUTION! This code must be copied to RAM before execution. Therefore, -// it must not contain any code which might be position dependent! -// - -int -flash_lock_block(volatile unsigned long *block) -{ - volatile unsigned long *ROM; - unsigned long stat; - int timeout = 5000000; - int cache_on; - - ROM = (volatile unsigned long *)((unsigned long)block & 0xFE000000); - - HAL_DCACHE_IS_ENABLED(cache_on); - if (cache_on) { - HAL_DCACHE_SYNC(); - HAL_DCACHE_DISABLE(); - } - - // Clear any error conditions - ROM[0] = FLASH_Clear_Status; - - // Set lock bit - block[0] = FLASH_Set_Lock; - block[0] = FLASH_Set_Lock_Confirm; // Confirmation - while(((stat = ROM[0]) & FLASH_Status_Ready) != FLASH_Status_Ready) { - if (--timeout == 0) break; - } - - // Restore ROM to "normal" mode - ROM[0] = FLASH_Reset; - - if (cache_on) { - HAL_DCACHE_ENABLE(); - } - - return stat; -} diff --git a/packages/devs/flash/arm/assabet/current/src/flash_program_buf.c b/packages/devs/flash/arm/assabet/current/src/flash_program_buf.c deleted file mode 100644 --- a/packages/devs/flash/arm/assabet/current/src/flash_program_buf.c +++ /dev/null @@ -1,103 +0,0 @@ -//========================================================================== -// -// flash_program_buf.c -// -// Flash programming -// -//========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Red Hat eCos Public License -// Version 1.1 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://www.redhat.com/ -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Configurable Operating System, -// released September 30, 1998. -// -// The Initial Developer of the Original Code is Red Hat. -// Portions created by Red Hat are -// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. -// All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//========================================================================== -//#####DESCRIPTIONBEGIN#### -// -// Author(s): gthomas -// Contributors: gthomas -// Date: 2000-07-14 -// Purpose: -// Description: -// -//####DESCRIPTIONEND#### -// -//========================================================================== - -#include "flash.h" - -#include -#include -#include - -// -// CAUTION! This code must be copied to RAM before execution. Therefore, -// it must not contain any code which might be position dependent! -// - -int -flash_program_buf(volatile unsigned long *addr, unsigned long *data, int len) -{ - volatile unsigned long *ROM; - unsigned long stat = 0; - int timeout = 50000; - int cache_on; - - HAL_DCACHE_IS_ENABLED(cache_on); - if (cache_on) { - HAL_DCACHE_SYNC(); - HAL_DCACHE_DISABLE(); - } - - ROM = (volatile unsigned long *)((unsigned long)addr & 0xFE000000); - - // Clear any error conditions - ROM[0] = FLASH_Clear_Status; - - while (len > 0) { - ROM[0] = FLASH_Program; - *addr = *data; - timeout = 5000000; - while(((stat = ROM[0]) & FLASH_Status_Ready) != FLASH_Status_Ready) { - if (--timeout == 0) { - goto bad; - } - } - if (stat & 0x007E007E) { - break; - } - ROM[0] = FLASH_Reset; - if (*addr++ != *data++) { - stat = 0x99109910; - break; - } - len -= 4; - } - - // Restore ROM to "normal" mode - bad: - ROM[0] = FLASH_Reset; - - if (cache_on) { - HAL_DCACHE_ENABLE(); - } - - return stat; -} diff --git a/packages/devs/flash/arm/assabet/current/src/flash_query.c b/packages/devs/flash/arm/assabet/current/src/flash_query.c deleted file mode 100644 --- a/packages/devs/flash/arm/assabet/current/src/flash_query.c +++ /dev/null @@ -1,85 +0,0 @@ -//========================================================================== -// -// flash_query.c -// -// Flash programming - query device -// -//========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Red Hat eCos Public License -// Version 1.1 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://www.redhat.com/ -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Configurable Operating System, -// released September 30, 1998. -// -// The Initial Developer of the Original Code is Red Hat. -// Portions created by Red Hat are -// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. -// All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//========================================================================== -//#####DESCRIPTIONBEGIN#### -// -// Author(s): gthomas -// Contributors: gthomas -// Date: 2000-07-26 -// Purpose: -// Description: -// -//####DESCRIPTIONEND#### -// -//========================================================================== - -#include "flash.h" - -#include -#include -#include -#include CYGHWR_MEMORY_LAYOUT_H - -// -// CAUTION! This code must be copied to RAM before execution. Therefore, -// it must not contain any code which might be position dependent! -// - -#define CNT 20*1000*10 // Approx 20ms - -int -flash_query(unsigned char *data) -{ - volatile unsigned long *ROM; - int i, cnt; - int cache_on; - - HAL_DCACHE_IS_ENABLED(cache_on); - if (cache_on) { - HAL_DCACHE_SYNC(); - HAL_DCACHE_DISABLE(); - } - - ROM = (volatile unsigned long *)0x50000000; - ROM[0] = FLASH_Read_Query; - for (cnt = CNT; cnt > 0; cnt--) ; - for (i = 0; i < sizeof(struct FLASH_query); i++) { - *data++ = *ROM++; - } - - ROM[0] = FLASH_Reset; - - if (cache_on) { - HAL_DCACHE_ENABLE(); - } - - return 0; -} diff --git a/packages/devs/flash/arm/assabet/current/src/flash_unlock_block.c b/packages/devs/flash/arm/assabet/current/src/flash_unlock_block.c deleted file mode 100644 --- a/packages/devs/flash/arm/assabet/current/src/flash_unlock_block.c +++ /dev/null @@ -1,126 +0,0 @@ -//========================================================================== -// -// flash_unlock_block.c -// -// Flash programming -// -//========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Red Hat eCos Public License -// Version 1.1 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://www.redhat.com/ -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Configurable Operating System, -// released September 30, 1998. -// -// The Initial Developer of the Original Code is Red Hat. -// Portions created by Red Hat are -// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. -// All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//========================================================================== -//#####DESCRIPTIONBEGIN#### -// -// Author(s): gthomas -// Contributors: gthomas -// Date: 2000-09-10 -// Purpose: -// Description: -// -//####DESCRIPTIONEND#### -// -//========================================================================== - -#include "flash.h" - -#include - -// -// CAUTION! This code must be copied to RAM before execution. Therefore, -// it must not contain any code which might be position dependent! -// - -// -// The difficulty with this operation is that the hardware does not support -// unlocking single blocks. However, the logical layer would like this to -// be the case, so this routine emulates it. The hardware can clear all of -// the locks in the device at once. This routine will use that approach and -// then reset the regions which are known to be locked. -// - -#define MAX_FLASH_BLOCKS 128 - -int -flash_unlock_block(volatile unsigned long *block, int block_size, int blocks) -{ - volatile unsigned long *ROM, *bp; - unsigned long stat; - int timeout = 5000000; - unsigned char is_locked[MAX_FLASH_BLOCKS]; - int i, cache_on; - - HAL_DCACHE_IS_ENABLED(cache_on); - if (cache_on) { - HAL_DCACHE_SYNC(); - HAL_DCACHE_DISABLE(); - } - - ROM = (volatile unsigned long *)((unsigned long)block & 0xFE000000); - - // Clear any error conditions - ROM[0] = FLASH_Clear_Status; - - // Get current block lock state. This needs to access each block on - // the device so currently locked blocks can be re-locked. - bp = ROM; - for (i = 0; i < blocks; i++) { - *bp = FLASH_Read_Query; - if (bp == block) { - is_locked[i] = 0; - } else { - is_locked[i] = bp[2]; - } - bp += block_size / sizeof(*bp); - } - - // Clears all lock bits - block[0] = FLASH_Clear_Locks; - block[0] = FLASH_Clear_Locks_Confirm; // Confirmation - timeout = 5000000; - while(((stat = ROM[0]) & FLASH_Status_Ready) != FLASH_Status_Ready) { - if (--timeout == 0) break; - } - - // Restore the lock state - bp = ROM; - for (i = 0; i < blocks; i++) { - if (is_locked[i]) { - *bp = FLASH_Set_Lock; - *bp = FLASH_Set_Lock_Confirm; // Confirmation - timeout = 5000000; - while(((stat = ROM[0]) & FLASH_Status_Ready) != FLASH_Status_Ready) { - if (--timeout == 0) break; - } - } - bp += block_size / sizeof(*bp); - } - - // Restore ROM to "normal" mode - ROM[0] = FLASH_Reset; - - if (cache_on) { - HAL_DCACHE_ENABLE(); - } - - return stat; -} diff --git a/packages/devs/flash/arm/ipaq/current/ChangeLog b/packages/devs/flash/arm/ipaq/current/ChangeLog new file mode 100644 --- /dev/null +++ b/packages/devs/flash/arm/ipaq/current/ChangeLog @@ -0,0 +1,37 @@ +2001-03-01 Gary Thomas + + * src/ipaq_flash.c: New file - defines enable/disable functions. + + * cdl/flash_ipaq.cdl: Add special functions required to enable and + disable FLASH programming. + +2001-02-24 Gary Thomas + + * include/ipaq_strataflash.inl: + * cdl/flash_ipaq.cdl: New file(s) - FLASH support on iPAQ. + +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//=========================================================================== diff --git a/packages/devs/flash/arm/ipaq/current/cdl/flash_ipaq.cdl b/packages/devs/flash/arm/ipaq/current/cdl/flash_ipaq.cdl new file mode 100644 --- /dev/null +++ b/packages/devs/flash/arm/ipaq/current/cdl/flash_ipaq.cdl @@ -0,0 +1,76 @@ +#==================================================================== +# +# flash_ipaq.cdl +# +# FLASH memory - Hardware support on Intel StrongARM SA1110 +# +#==================================================================== +#####COPYRIGHTBEGIN#### +# +#------------------------------------------- +# The contents of this file are subject to the Red Hat eCos Public License +# Version 1.1 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://www.redhat.com/ +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Configurable Operating System, +# released September 30, 1998. +# +# The Initial Developer of the Original Code is Red Hat. +# Portions created by Red Hat are +# Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +# All Rights Reserved. +#------------------------------------------- +# +#####COPYRIGHTEND#### +# ==================================================================== +######DESCRIPTIONBEGIN#### +# +# Author(s): gthomas, hmt +# Original data: gthomas +# Contributors: gthomas +# Date: 2001-02-14 +# +#####DESCRIPTIONEND#### +# +#==================================================================== + +cdl_package CYGPKG_DEVS_FLASH_IPAQ { + display "Intel SA1110 (iPAQ) FLASH memory support" + description "FLASH memory device support for Intel StrongARM SA-1110" + + parent CYGPKG_IO_FLASH + active_if CYGPKG_IO_FLASH + requires CYGPKG_HAL_ARM_SA11X0_IPAQ + + requires CYGPKG_DEVS_FLASH_STRATA + + implements CYGHWR_IO_FLASH_BLOCK_LOCKING + + compile ipaq_flash.c + + include_dir cyg/io + + # Arguably this should do in the generic package + # but then there is a logic loop so you can never enable it. + cdl_interface CYGINT_DEVS_FLASH_STRATA_REQUIRED { + display "Generic StrataFLASH driver required" + } + + implements CYGINT_DEVS_FLASH_STRATA_REQUIRED + + define_proc { + puts $::cdl_system_header "/***** strataflash driver proc output start *****/" + puts $::cdl_system_header "#define CYGDAT_DEVS_FLASH_STRATA_INL " + puts $::cdl_system_header "#define CYGDAT_DEVS_FLASH_STRATA_CFG " + puts $::cdl_system_header "// External functions" + puts $::cdl_system_header "#define CYGIMP_FLASH_ENABLE ipaq_flash_enable" + puts $::cdl_system_header "#define CYGIMP_FLASH_DISABLE ipaq_flash_disable" + puts $::cdl_system_header "/***** strataflash driver proc output end *****/" + } +} diff --git a/packages/devs/flash/arm/ipaq/current/include/ipaq_strataflash.inl b/packages/devs/flash/arm/ipaq/current/include/ipaq_strataflash.inl new file mode 100644 --- /dev/null +++ b/packages/devs/flash/arm/ipaq/current/include/ipaq_strataflash.inl @@ -0,0 +1,59 @@ +#ifndef CYGONCE_DEVS_FLASH_IPAQ_STRATAFLASH_INL +#define CYGONCE_DEVS_FLASH_IPAQ_STRATAFLASH_INL +//========================================================================== +// +// ipaq_strataflash.inl +// +// Flash programming - device constants, etc. +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas, hmt +// Contributors: gthomas +// Date: 2001-02-24 +// Purpose: +// Description: +// +//####DESCRIPTIONEND#### +// +//========================================================================== + + +// The iPAQ system has two 16-bit devices. +// Doc says: a StrataFlash 28F320J3A. The 320 means 32Mbit, so 4Mbyte. +// Reality: a StrataFlash 28F640J3A. The 640 means 64Mbit, so 8Mbyte. + +#define CYGNUM_FLASH_DEVICES (2) +#define CYGNUM_FLASH_BASE (0x50000000u) +#define CYGNUM_FLASH_BASE_MASK (0xFE000000u) // 32Mb devices +#define CYGNUM_FLASH_WIDTH (16) +#define CYGNUM_FLASH_BLANK (1) + +#endif // CYGONCE_DEVS_FLASH_IPAQ_STRATAFLASH_INL +// ------------------------------------------------------------------------ +// EOF ipaq_strataflash.inl diff --git a/packages/devs/flash/arm/ipaq/current/src/ipaq_flash.c b/packages/devs/flash/arm/ipaq/current/src/ipaq_flash.c new file mode 100644 --- /dev/null +++ b/packages/devs/flash/arm/ipaq/current/src/ipaq_flash.c @@ -0,0 +1,56 @@ +//==================================================================== +// +// ipaq_flash.c +// +// FLASH memory - Hardware support on Intel StrongARM SA1110 +// +//==================================================================== +//####COPYRIGHTBEGIN#### +// +//------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +//------------------------------------------- +// +//####COPYRIGHTEND#### +//==================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Original data: gthomas +// Contributors: gthomas +// Date: 2001-03-01 +// +//####DESCRIPTIONEND#### +// +//==================================================================== + +#include +#include + +void +ipaq_flash_enable(void *start, void *end) +{ + ipaq_EGPIO(SA1110_EIO_VPP, SA1110_EIO_VPP_ON); +} + +void +ipaq_flash_disable(void *start, void *end) +{ + ipaq_EGPIO(SA1110_EIO_VPP, SA1110_EIO_VPP_OFF); +} diff --git a/packages/devs/flash/intel/28fxxx/current/ChangeLog b/packages/devs/flash/intel/28fxxx/current/ChangeLog new file mode 100644 --- /dev/null +++ b/packages/devs/flash/intel/28fxxx/current/ChangeLog @@ -0,0 +1,37 @@ +2001-03-23 Jesper Skov + + * include/flash_28fxxx.inl (flash_program_buf): Calculate correct + wc for buffered writes. + (flash_query): Don't return until flash is safely back in data + mode. + +2001-03-21 Jesper Skov + + * Package cloned from at29cxxxx driver. Changed to support Intel + FlashFile. + +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//=========================================================================== diff --git a/packages/devs/flash/intel/28fxxx/current/cdl/flash_intel_28fxxx.cdl b/packages/devs/flash/intel/28fxxx/current/cdl/flash_intel_28fxxx.cdl new file mode 100644 --- /dev/null +++ b/packages/devs/flash/intel/28fxxx/current/cdl/flash_intel_28fxxx.cdl @@ -0,0 +1,54 @@ +# ==================================================================== +# +# flash_intel_28fxxx.cdl +# +# FLASH memory - Hardware support for Intel flash parts +# +# ==================================================================== +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Red Hat eCos Public License +# Version 1.1 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://www.redhat.com/ +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Configurable Operating System, +# released September 30, 1998. +# +# The Initial Developer of the Original Code is Red Hat. +# Portions created by Red Hat are +# Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +# All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +# ==================================================================== +######DESCRIPTIONBEGIN#### +# +# Author(s): jskov +# Contributors: jskov +# Date: 2001-03-21 +# +#####DESCRIPTIONEND#### +# +# ==================================================================== + +cdl_package CYGPKG_DEVS_FLASH_INTEL_28FXXX { + display "Intel FlashFile FLASH memory support" + description "FLASH memory device support for Intel FlashFile" + parent CYGPKG_IO_FLASH + active_if CYGPKG_IO_FLASH + + active_if CYGINT_DEVS_FLASH_INTEL_28FXXX_REQUIRED + + implements CYGHWR_IO_FLASH_DEVICE + implements CYGHWR_IO_FLASH_DEVICE_IN_RAM + + include_dir cyg/io +} diff --git a/packages/devs/flash/intel/28fxxx/current/include/flash_28fxxx.inl b/packages/devs/flash/intel/28fxxx/current/include/flash_28fxxx.inl new file mode 100644 --- /dev/null +++ b/packages/devs/flash/intel/28fxxx/current/include/flash_28fxxx.inl @@ -0,0 +1,361 @@ +#ifndef CYGONCE_DEVS_FLASH_INTEL_28FXXX_INL +#define CYGONCE_DEVS_FLASH_INTEL_28FXXX_INL +//========================================================================== +// +// flash_28fxxx.inl +// +// Intel 28Fxxx series flash driver +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jskov +// Contributors: jskov +// Date: 2001-03-21 +// Purpose: +// Description: +// +// Notes: Only has FlashFile support at present +// Needs to get sizing details from part +// Needs locking. +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include +#include +#include +#include CYGHWR_MEMORY_LAYOUT_H + +#define FLASH_P2V( _a_ ) ((volatile flash_data_t *)((unsigned int)(_a_))) + +#define _FLASH_PRIVATE_ +#include + +//---------------------------------------------------------------------------- +// Common device details. +#define FLASH_Read_ID FLASHWORD( 0x90 ) +#define FLASH_Reset FLASHWORD( 0xFF ) +#define FLASH_Program FLASHWORD( 0x40 ) +#define FLASH_Write_Buffer FLASHWORD( 0xe8 ) +#define FLASH_Block_Erase FLASHWORD( 0x20 ) +#define FLASH_Confirm FLASHWORD( 0xD0 ) + +#define FLASH_Read_Status FLASHWORD( 0x70 ) +#define FLASH_Clear_Status FLASHWORD( 0x50 ) +#define FLASH_Status_Ready FLASHWORD( 0x80 ) + +// Status that we read back: +#define FLASH_ErrorMask FLASHWORD( 0x7E ) +#define FLASH_ErrorProgram FLASHWORD( 0x10 ) +#define FLASH_ErrorErase FLASHWORD( 0x20 ) +#define FLASH_ErrorLowVoltage FLASHWORD( 0x08 ) +#define FLASH_ErrorLocked FLASHWORD( 0x02 ) + +// Platform code must define the below +// #define CYGNUM_FLASH_INTERLEAVE : Number of interleaved devices (in parallel) +// #define CYGNUM_FLASH_SERIES : Number of devices in series +// #define CYGNUM_FLASH_BASE : Address of first device +// And select one of the below device variants + +#ifdef CYGPKG_DEVS_FLASH_INTEL_28F160 +# define FLASH_BLOCK_SIZE (0x8000*CYGNUM_FLASH_INTERLEAVE) +# define FLASH_NUM_REGIONS (32) +# define CYGNUM_FLASH_WIDTH (16) +# define CYGNUM_FLASH_BLANK (1) +# define FLASH_BUFFER_SIZE (32*CYGNUM_FLASH_INTERLEAVE) +# define CYGNUM_FLASH_ID_MANUFACTURER FLASHWORD(0xb0) +# define CYGNUM_FLASH_ID_DEVICE FLASHWORD(0xd0) +#endif + +#ifdef CYGPKG_DEVS_FLASH_INTEL_28F320 +# define FLASH_BLOCK_SIZE (0x10000*CYGNUM_FLASH_INTERLEAVE) +# define FLASH_NUM_REGIONS (64) +# define CYGNUM_FLASH_WIDTH (16) +# define CYGNUM_FLASH_BLANK (1) +# define FLASH_BUFFER_SIZE (32*CYGNUM_FLASH_INTERLEAVE) +# define CYGNUM_FLASH_ID_MANUFACTURER FLASHWORD(0xb0) +# define CYGNUM_FLASH_ID_DEVICE FLASHWORD(0xd4) +#endif + +#define FLASH_DEVICE_SIZE (FLASH_BLOCK_SIZE*FLASH_NUM_REGIONS) +#define CYGNUM_FLASH_DEVICES (CYGNUM_FLASH_INTERLEAVE*CYGNUM_FLASH_SERIES) +#define CYGNUM_FLASH_BASE_MASK (~(FLASH_DEVICE_SIZE-1)) +#define CYGNUM_FLASH_BLOCK_MASK (~(FLASH_BLOCK_SIZE-1)) + +//---------------------------------------------------------------------------- +// Now that device properties are defined, include magic for defining +// accessor type and constants. +#include + +//---------------------------------------------------------------------------- +// Functions that put the flash device into non-read mode must reside +// in RAM. +void flash_query(void* data) __attribute__ ((section (".2ram.flash_query"))); +int flash_erase_block(void* block, unsigned int size) + __attribute__ ((section (".2ram.flash_erase_block"))); +int flash_program_buf(void* addr, void* data, int len, + unsigned long block_mask, int buffer_size) + __attribute__ ((section (".2ram.flash_program_buf"))); + + +//---------------------------------------------------------------------------- +// Initialize driver details +int +flash_hwr_init(void) +{ + flash_data_t id[2]; + + flash_dev_query(id); + + // Check that flash_id data is matching the one the driver was + // configured for. + if (id[0] != CYGNUM_FLASH_ID_MANUFACTURER + || id[1] != CYGNUM_FLASH_ID_DEVICE) + return FLASH_ERR_DRV_WRONG_PART; + + // Hard wired for now + flash_info.block_size = FLASH_BLOCK_SIZE * CYGNUM_FLASH_INTERLEAVE; + flash_info.blocks = FLASH_NUM_REGIONS; + flash_info.start = (void *)CYGNUM_FLASH_BASE; + flash_info.end = (void *)(CYGNUM_FLASH_BASE+ (FLASH_NUM_REGIONS * FLASH_BLOCK_SIZE * CYGNUM_FLASH_INTERLEAVE * CYGNUM_FLASH_SERIES)); + flash_info.buffer_size = FLASH_BUFFER_SIZE; + + return FLASH_ERR_OK; +} + +//---------------------------------------------------------------------------- +// Map a hardware status to a package error +int +flash_hwr_map_error(int e) +{ + return e; +} + + +//---------------------------------------------------------------------------- +// See if a range of FLASH addresses overlaps currently running code +bool +flash_code_overlaps(void *start, void *end) +{ + extern unsigned char _stext[], _etext[]; + + return ((((unsigned long)&_stext >= (unsigned long)start) && + ((unsigned long)&_stext < (unsigned long)end)) || + (((unsigned long)&_etext >= (unsigned long)start) && + ((unsigned long)&_etext < (unsigned long)end))); +} + +//---------------------------------------------------------------------------- +// Flash Query +// +// Only reads the manufacturer and part number codes for the first +// device(s) in series. It is assumed that any devices in series +// will be of the same type. + +void +flash_query(void* data) +{ + volatile flash_data_t *ROM; + flash_data_t* id = (flash_data_t*) data; + flash_data_t w; + + ROM = (volatile flash_data_t*) CYGNUM_FLASH_BASE; + + w = ROM[0]; + + ROM[0] = FLASH_Read_ID; + + // Manufacturers' code + id[0] = ROM[0]; + // Part number + id[1] = ROM[1]; + + ROM[0] = FLASH_Reset; + + // Stall, waiting for flash to return to read mode. + while (w != ROM[0]); + +} + +//---------------------------------------------------------------------------- +// Erase Block +int +flash_erase_block(void* block, unsigned int block_size) +{ + int res = FLASH_ERR_OK; + int timeout; + unsigned long len; + flash_data_t stat; + volatile flash_data_t *ROM; + volatile flash_data_t *b_p = (flash_data_t*) block; + volatile flash_data_t *b_v; + ROM = FLASH_P2V((unsigned long)block & CYGNUM_FLASH_BASE_MASK); + b_v = FLASH_P2V(block); + + // Clear any error conditions + ROM[0] = FLASH_Clear_Status; + + ROM[0] = FLASH_Block_Erase; + *b_v = FLASH_Confirm; + + timeout = 5000000; + while(((stat = ROM[0]) & FLASH_Status_Ready) != FLASH_Status_Ready) { + if (--timeout == 0) break; + } + + // Restore ROM to "normal" mode + ROM[0] = FLASH_Reset; + + // Check if block got erased + len = block_size; + while (len > 0) { + b_v = FLASH_P2V(b_p++); + if (*b_v != FLASH_BlankValue ) break; + len -= sizeof( flash_data_t ); + } + if (len != 0) { + if (stat & FLASH_ErrorMask) { + if (!(stat & FLASH_ErrorErase)) + res = FLASH_ERR_HWR; // Unknown error + else { + if (stat & FLASH_ErrorLowVoltage) + res = FLASH_ERR_LOW_VOLTAGE; + else if (stat & FLASH_ErrorLocked) + res = FLASH_ERR_LOCK; + else + res = FLASH_ERR_ERASE; + } + } + else + res = FLASH_ERR_DRV_VERIFY; + } + + return res; +} + +//---------------------------------------------------------------------------- +// Program Buffer +int +flash_program_buf(void* addr, void* data, int len, + unsigned long block_mask, int buffer_size) +{ + flash_data_t stat = 0; + int timeout; + int wc, i; + + volatile flash_data_t* ROM; + volatile flash_data_t* BA; + volatile flash_data_t* addr_v; + volatile flash_data_t* addr_p = (flash_data_t*) addr; + volatile flash_data_t* data_p = (flash_data_t*) data; + + int res = FLASH_ERR_OK; + + // Base address of device(s) being programmed. + ROM = FLASH_P2V((unsigned long)addr & CYGNUM_FLASH_BASE_MASK); + BA = FLASH_P2V((unsigned long)addr & CYGNUM_FLASH_BLOCK_MASK); + + // Clear any error conditions + ROM[0] = FLASH_Clear_Status; + + // Write any big chunks first + while (len >= buffer_size) { + wc = buffer_size; + if (wc > len) wc = len; + len -= wc; + wc = wc / ((CYGNUM_FLASH_WIDTH/8)*CYGNUM_FLASH_DEVICES); // Word count + timeout = 5000000; + + *BA = FLASH_Write_Buffer; + while(((stat = ROM[0]) & FLASH_Status_Ready) != FLASH_Status_Ready) { + if (--timeout == 0) { + res = FLASH_ERR_DRV_TIMEOUT; + goto bad; + } + *BA = FLASH_Write_Buffer; + } + *BA = FLASHWORD(wc-1); // Count is 0..N-1 + for (i = 0; i < wc; i++) { + addr_v = FLASH_P2V(addr_p++); + *addr_v = *data_p++; + } + *BA = FLASH_Confirm; + + ROM[0] = FLASH_Read_Status; + timeout = 5000000; + while(((stat = ROM[0]) & FLASH_Status_Ready) != FLASH_Status_Ready) { + if (--timeout == 0) { + res = FLASH_ERR_DRV_TIMEOUT; + goto bad; + } + } + } + + while (len > 0) { + addr_v = FLASH_P2V(addr_p++); + ROM[0] = FLASH_Program; + *addr_v = *data_p; + timeout = 5000000; + while(((stat = ROM[0]) & FLASH_Status_Ready) != FLASH_Status_Ready) { + if (--timeout == 0) { + res = FLASH_ERR_DRV_TIMEOUT; + goto bad; + } + } + if (stat & FLASH_ErrorMask) { + if (!(stat & FLASH_ErrorProgram)) + res = FLASH_ERR_HWR; // Unknown error + else { + if (stat & FLASH_ErrorLowVoltage) + res = FLASH_ERR_LOW_VOLTAGE; + else if (stat & FLASH_ErrorLocked) + res = FLASH_ERR_LOCK; + else + res = FLASH_ERR_PROGRAM; + } + break; + } + ROM[0] = FLASH_Clear_Status; + ROM[0] = FLASH_Reset; + if (*addr_v != *data_p++) { + res = FLASH_ERR_DRV_VERIFY; + break; + } + len -= sizeof( flash_data_t ); + } + + // Restore ROM to "normal" mode + bad: + ROM[0] = FLASH_Reset; + + // Ideally, we'd want to return not only the failure code, but also + // the address/device that reported the error. + return res; +} + +#endif // CYGONCE_DEVS_FLASH_INTEL_28FXXX_INL diff --git a/packages/devs/flash/intel/strata/current/ChangeLog b/packages/devs/flash/intel/strata/current/ChangeLog new file mode 100644 --- /dev/null +++ b/packages/devs/flash/intel/strata/current/ChangeLog @@ -0,0 +1,142 @@ +2001-03-21 Hugo Tyson + + * src/strata.h (FLASH_Write_Buffer): Do not define this if + CYGOPT_FLASH_IS_NOT_ADVANCED is defined; Advanced (xxxJ3) flash is + usual these days. Also added documentation of the options that + can be used to control this module. + + * src/flash_program_buf.c (flash_program_buf): Reduce warnings + about unused variables if no FLASH_Write_Buffer command available. + +2001-03-21 Gary Thomas + + * src/flash_program_buf.c (flash_program_buf): Buffered write code + fixups, only on platforms with it defined. + +2001-03-17 Gary Thomas + + * src/strata.h: + * src/strata.c: Support buffered writes. + + * src/flash_program_buf.c: Use buffered writes if possible. This + mode allows the chip to do parallelized writes which is much faster. + It does require additional information, now provided by upper layer. + +2001-02-15 Hugo Tyson + + * src/flash_query.c (flash_query): Depending on whether + CYGOPT_FLASH_IS_BOOTBLOCK (just a #define from the instantiator, + not really a cdl_option) is set, do the full Read_Query or just + acquire two codes for manufacturer and device type using Read_ID. + + * src/strata.c (flash_hwr_init): Again depending on whether + CYGOPT_FLASH_IS_BOOTBLOCK, decode the device type into a size and + so on, or use the full Read_Query data as before. + + * src/strata.h (FLASH_Read_ID): Undefine those commands which we + do not use. Conditionally define those that we use depending on + CYGOPT_FLASH_IS_BOOTBLOCK. Thus we should be able to deal with + StrataFlash and BootBlock flash with the same code. + + * cdl/flash_strata.cdl: Do not implement (in the CDL sense) + CYGHWR_IO_FLASH_BLOCK_LOCKING leave it up to the instantiating + package instead. Also move the build of the two objects that do + locking and unlocking into a compenent which is only active if + CYGHWR_IO_FLASH_BLOCK_LOCKING is indeed (requested to be) + implemented somewhere. + +2001-02-14 Hugo Tyson + + * devs/flash/intel/strata/...: New package, generic strataFlash + driver based on several others; a portion of its history + follows... + + flash.h -> strata.h + flash.c -> strata.c + +2001-02-06 Hugo Tyson + + * src/flash.h: Much more generic again. Not yet separated into + generic component and invocation header, but the structure is + there. Also included support for a mapping from the physical + flash address we're thinking of to the virtual address we use to + access it. More documentation. Generalization to 8,16,32 and + 64-bit access, made up from 8,16 or 32-bit devices. Command and + status macros modified to accommodate these options. + + * src/flash_lock_block.c (flash_lock_block): + * src/flash_erase_block.c (flash_erase_block): + * src/flash_query.c (flash_query): + * src/flash_program_buf.c (flash_program_buf): + All now acquire when possible the ROM address from the block + address, and use the physical to virtual macro as needed. + + * src/flash_unlock_block.c (flash_unlock_block): + The same changes, but a little more complex because of the need to + clear-all then re-lock some semantics. Shadow pointer to virtual + address is used each time round the loop. + + * cdl/flash_strata.cdl: Add explicit dependencies on flash.h, for + there were none - or they were ignored - for the specially built + compilation units that get copied to RAM for execution. + +2001-02-01 Hugo Tyson + + * all: copied from the assabet flash driver. + +2000-12-05 Jonathan Larmour + + * src/assabet_flash.c (flash_code_overlaps): Define stext/etext + as array types so no assumptions can be made by the compiler about + location. + +2000-10-24 Gary Thomas + + * src/flash_unlock_block.c (flash_unlock_block): + * src/flash_lock_block.c (flash_lock_block): + * src/flash_program_buf.c (flash_program_buf): + * src/flash_erase_block.c (flash_erase_block): Support up to 32M FLASH. + +2000-09-10 Gary Thomas + + * src/flash_unlock_block.c: + * src/flash_lock_block.c: New file(s). + + * src/flash.h: + * cdl/flash_assabet.cdl: Add region locking functions. + +2000-08-29 Gary Thomas + + * src/assabet_flash.c: Improve error decoding. + +2000-08-24 Gary Thomas + + * src/flash_query.c: + * src/flash_erase_block.c: + * src/flash.h: FLASH support for Intel SA1110 Assabet. + +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//=========================================================================== diff --git a/packages/devs/flash/intel/strata/current/cdl/flash_strata.cdl b/packages/devs/flash/intel/strata/current/cdl/flash_strata.cdl new file mode 100644 --- /dev/null +++ b/packages/devs/flash/intel/strata/current/cdl/flash_strata.cdl @@ -0,0 +1,116 @@ +# ==================================================================== +# +# flash_strata.cdl +# +# FLASH memory - Hardware support for Intel Strata Flash +# +# ==================================================================== +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Red Hat eCos Public License +# Version 1.1 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://www.redhat.com/ +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Configurable Operating System, +# released September 30, 1998. +# +# The Initial Developer of the Original Code is Red Hat. +# Portions created by Red Hat are +# Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +# All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +# ==================================================================== +######DESCRIPTIONBEGIN#### +# +# Author(s): gthomas +# Original data: gthomas +# Contributors: +# Date: 2000-07-26 +# +#####DESCRIPTIONEND#### +# +# ==================================================================== + +cdl_package CYGPKG_DEVS_FLASH_STRATA { + display "Intel StrataFLASH memory support" + + parent CYGPKG_IO_FLASH + active_if CYGPKG_IO_FLASH + + implements CYGHWR_IO_FLASH_DEVICE + + active_if CYGINT_DEVS_FLASH_STRATA_REQUIRED + + include_dir . + include_files ; # none _exported_ whatsoever + description "FLASH memory device support for Intel StrataFlash" + compile strata.c + + define_proc { + puts $::cdl_header "#include "; + puts $::cdl_header "#include CYGDAT_DEVS_FLASH_STRATA_CFG"; + } + + make -priority 1 { + flash_erase_block.o: $(REPOSITORY)/$(PACKAGE)/src/flash_erase_block.c \ + $(REPOSITORY)/$(PACKAGE)/src/strata.h + $(CC) -S $(INCLUDE_PATH) $(CFLAGS) -g0 -fno-function-sections $(REPOSITORY)/$(PACKAGE)/src/flash_erase_block.c + echo " .globl flash_erase_block_end" >>flash_erase_block.s + echo "flash_erase_block_end:" >>flash_erase_block.s + $(CC) -c -o flash_erase_block.o flash_erase_block.s + $(AR) rcs $(PREFIX)/lib/libtarget.a flash_erase_block.o + } + make -priority 1 { + flash_program_buf.o: $(REPOSITORY)/$(PACKAGE)/src/flash_program_buf.c \ + $(REPOSITORY)/$(PACKAGE)/src/strata.h + $(CC) -S $(INCLUDE_PATH) $(CFLAGS) -g0 -fno-function-sections $(REPOSITORY)/$(PACKAGE)/src/flash_program_buf.c + echo " .globl flash_program_buf_end" >>flash_program_buf.s + echo "flash_program_buf_end:" >>flash_program_buf.s + $(CC) -c -o flash_program_buf.o flash_program_buf.s + $(AR) rcs $(PREFIX)/lib/libtarget.a flash_program_buf.o + } + make -priority 1 { + flash_query.o: $(REPOSITORY)/$(PACKAGE)/src/flash_query.c \ + $(REPOSITORY)/$(PACKAGE)/src/strata.h + $(CC) -S $(INCLUDE_PATH) $(CFLAGS) -g0 -fno-function-sections $(REPOSITORY)/$(PACKAGE)/src/flash_query.c + echo " .globl flash_query_end" >>flash_query.s + echo "flash_query_end:" >>flash_query.s + $(CC) -c -o flash_query.o flash_query.s + $(AR) rcs $(PREFIX)/lib/libtarget.a flash_query.o + } + + cdl_component CYGPKG_DEVS_FLASH_STRATA_LOCKING { + display "Flash device implements locking" + active_if 0 < CYGHWR_IO_FLASH_BLOCK_LOCKING + calculated 1 + + make -priority 1 { + flash_lock_block.o: $(REPOSITORY)/$(PACKAGE)/src/flash_lock_block.c \ + $(REPOSITORY)/$(PACKAGE)/src/strata.h + $(CC) -S $(INCLUDE_PATH) $(CFLAGS) -g0 -fno-function-sections $(REPOSITORY)/$(PACKAGE)/src/flash_lock_block.c + echo " .globl flash_lock_block_end" >>flash_lock_block.s + echo "flash_lock_block_end:" >>flash_lock_block.s + $(CC) -c -o flash_lock_block.o flash_lock_block.s + $(AR) rcs $(PREFIX)/lib/libtarget.a flash_lock_block.o + } + make -priority 1 { + flash_unlock_block.o: $(REPOSITORY)/$(PACKAGE)/src/flash_unlock_block.c \ + $(REPOSITORY)/$(PACKAGE)/src/strata.h + $(CC) -S $(INCLUDE_PATH) $(CFLAGS) -g0 -fno-function-sections $(REPOSITORY)/$(PACKAGE)/src/flash_unlock_block.c + echo " .globl flash_unlock_block_end" >>flash_unlock_block.s + echo "flash_unlock_block_end:" >>flash_unlock_block.s + $(CC) -c -o flash_unlock_block.o flash_unlock_block.s + $(AR) rcs $(PREFIX)/lib/libtarget.a flash_unlock_block.o + } + } +} + diff --git a/packages/devs/flash/intel/strata/current/src/flash_erase_block.c b/packages/devs/flash/intel/strata/current/src/flash_erase_block.c new file mode 100644 --- /dev/null +++ b/packages/devs/flash/intel/strata/current/src/flash_erase_block.c @@ -0,0 +1,102 @@ +//========================================================================== +// +// flash_erase_block.c +// +// Flash programming +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas, hmt +// Contributors: gthomas +// Date: 2001-02-14 +// Purpose: +// Description: +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include "strata.h" + +#include +#include +#include + +// +// CAUTION! This code must be copied to RAM before execution. Therefore, +// it must not contain any code which might be position dependent! +// + +int flash_erase_block(volatile flash_t *block, unsigned int block_size) +{ + volatile flash_t *ROM; + flash_t stat; + int timeout = 50000; + int cache_on; + int len; + + HAL_DCACHE_IS_ENABLED(cache_on); + if (cache_on) { + HAL_DCACHE_SYNC(); + HAL_DCACHE_DISABLE(); + } + + // Get base address and map addresses to virtual addresses + ROM = FLASH_P2V(CYGNUM_FLASH_BASE_MASK & (unsigned int)block); + block = FLASH_P2V(block); + + // Clear any error conditions + ROM[0] = FLASH_Clear_Status; + + // Erase block + ROM[0] = FLASH_Block_Erase; + *block = FLASH_Confirm; + timeout = 5000000; + while(((stat = ROM[0]) & FLASH_Status_Ready) != FLASH_Status_Ready) { + if (--timeout == 0) break; + } + + // Restore ROM to "normal" mode + ROM[0] = FLASH_Reset; + + // If an error was reported, see if the block erased anyway + if (stat & FLASH_ErrorMask ) { + len = block_size; + while (len > 0) { + if (*block++ != FLASH_BlankValue ) break; + len -= sizeof(*block); + } + if (len == 0) stat = 0; + } + + if (cache_on) { + HAL_DCACHE_ENABLE(); + } + + return stat; +} diff --git a/packages/devs/flash/intel/strata/current/src/flash_lock_block.c b/packages/devs/flash/intel/strata/current/src/flash_lock_block.c new file mode 100644 --- /dev/null +++ b/packages/devs/flash/intel/strata/current/src/flash_lock_block.c @@ -0,0 +1,89 @@ +//========================================================================== +// +// flash_lock_block.c +// +// Flash programming +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas, hmt +// Contributors: gthomas +// Date: 2001-02-14 +// Purpose: +// Description: +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include "strata.h" + +#include + +// +// CAUTION! This code must be copied to RAM before execution. Therefore, +// it must not contain any code which might be position dependent! +// + +int +flash_lock_block(volatile flash_t *block) +{ + volatile flash_t *ROM; + flash_t stat; + int timeout = 5000000; + int cache_on; + + // Get base address and map addresses to virtual addresses + ROM = FLASH_P2V(CYGNUM_FLASH_BASE_MASK & (unsigned int)block); + block = FLASH_P2V(block); + + HAL_DCACHE_IS_ENABLED(cache_on); + if (cache_on) { + HAL_DCACHE_SYNC(); + HAL_DCACHE_DISABLE(); + } + + // Clear any error conditions + ROM[0] = FLASH_Clear_Status; + + // Set lock bit + block[0] = FLASH_Set_Lock; + block[0] = FLASH_Set_Lock_Confirm; // Confirmation + while(((stat = ROM[0]) & FLASH_Status_Ready) != FLASH_Status_Ready) { + if (--timeout == 0) break; + } + + // Restore ROM to "normal" mode + ROM[0] = FLASH_Reset; + + if (cache_on) { + HAL_DCACHE_ENABLE(); + } + + return stat; +} diff --git a/packages/devs/flash/intel/strata/current/src/flash_program_buf.c b/packages/devs/flash/intel/strata/current/src/flash_program_buf.c new file mode 100644 --- /dev/null +++ b/packages/devs/flash/intel/strata/current/src/flash_program_buf.c @@ -0,0 +1,142 @@ +//========================================================================== +// +// flash_program_buf.c +// +// Flash programming +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas, hmt +// Contributors: gthomas +// Date: 2001-02-14 +// Purpose: +// Description: +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include "strata.h" + +#include +#include +#include + +// +// CAUTION! This code must be copied to RAM before execution. Therefore, +// it must not contain any code which might be position dependent! +// + +int +flash_program_buf(volatile flash_t *addr, flash_t *data, int len, + unsigned long block_mask, int buffer_size) +{ + volatile flash_t *ROM; + volatile flash_t *BA; + flash_t stat = 0; + int timeout = 50000; + int cache_on; +#ifdef FLASH_Write_Buffer + int i, wc; +#endif + + HAL_DCACHE_IS_ENABLED(cache_on); + if (cache_on) { + HAL_DCACHE_SYNC(); + HAL_DCACHE_DISABLE(); + } + + // Get base address and map addresses to virtual addresses + ROM = FLASH_P2V( CYGNUM_FLASH_BASE_MASK & (unsigned int)addr ); + BA = FLASH_P2V( block_mask & (unsigned int)addr ); + addr = FLASH_P2V(addr); + + // Clear any error conditions + ROM[0] = FLASH_Clear_Status; + +#ifdef FLASH_Write_Buffer + // Write any big chunks first + while (len >= buffer_size) { + wc = buffer_size; + if (wc > len) wc = len; + len -= wc; + wc = wc / (CYGNUM_FLASH_DEVICES*2); // Word count + *BA = FLASH_Write_Buffer; + timeout = 5000000; + while(((stat = ROM[0]) & FLASH_Status_Ready) != FLASH_Status_Ready) { + if (--timeout == 0) { + goto bad; + } + *BA = FLASH_Write_Buffer; + } + *BA = FLASHWORD(wc-1); // Count is 0..N-1 + for (i = 0; i < wc; i++) { + *addr++ = *data++; + } + *BA = FLASH_Confirm; + + ROM[0] = FLASH_Read_Status; + timeout = 5000000; + while(((stat = ROM[0]) & FLASH_Status_Ready) != FLASH_Status_Ready) { + if (--timeout == 0) { + goto bad; + } + } + } +#endif + + while (len > 0) { + ROM[0] = FLASH_Program; + *addr = *data; + timeout = 5000000; + while(((stat = ROM[0]) & FLASH_Status_Ready) != FLASH_Status_Ready) { + if (--timeout == 0) { + goto bad; + } + } + if (stat & FLASH_ErrorMask) { + break; + } + ROM[0] = FLASH_Reset; + if (*addr++ != *data++) { + stat = FLASH_ErrorNotVerified; + break; + } + len -= sizeof( flash_t ); + } + + // Restore ROM to "normal" mode + bad: + ROM[0] = FLASH_Reset; + + if (cache_on) { + HAL_DCACHE_ENABLE(); + } + + return stat; +} diff --git a/packages/devs/flash/intel/strata/current/src/flash_query.c b/packages/devs/flash/intel/strata/current/src/flash_query.c new file mode 100644 --- /dev/null +++ b/packages/devs/flash/intel/strata/current/src/flash_query.c @@ -0,0 +1,97 @@ +//========================================================================== +// +// flash_query.c +// +// Flash programming - query device +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas, hmt +// Contributors: gthomas +// Date: 2001-02-14 +// Purpose: +// Description: +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include "strata.h" + +#include +#include +#include +#include CYGHWR_MEMORY_LAYOUT_H + +// +// CAUTION! This code must be copied to RAM before execution. Therefore, +// it must not contain any code which might be position dependent! +// + +#define CNT 20*1000*10 // Approx 20ms + +int +flash_query(unsigned char *data) +{ + volatile flash_t *ROM; + int i, cnt; + int cache_on; + + HAL_DCACHE_IS_ENABLED(cache_on); + if (cache_on) { + HAL_DCACHE_SYNC(); + HAL_DCACHE_DISABLE(); + } + + // Get base address and map addresses to virtual addresses + ROM = FLASH_P2V( CYGNUM_FLASH_BASE ); +#ifdef CYGOPT_FLASH_IS_BOOTBLOCK + // BootBlock flash does not support full Read_Query - we have do a + // table oriented thing above, after getting just two bytes of results: + ROM[0] = FLASH_Read_ID; + i = 2; +#else + // StrataFlash supports the full Read_Query op: + ROM[0] = FLASH_Read_Query; + i = sizeof(struct FLASH_query); +#endif // Not CYGOPT_FLASH_IS_BOOTBLOCK + + for (cnt = CNT; cnt > 0; cnt--) ; + for ( /* i */; i > 0; i-- ) { + // It is very deliberate that data is chars NOT flash_t: + // The info comes out in bytes regardless of device. + *data++ = (unsigned char) (*ROM++); + } + ROM[0] = FLASH_Reset; + + if (cache_on) { + HAL_DCACHE_ENABLE(); + } + + return 0; +} diff --git a/packages/devs/flash/intel/strata/current/src/flash_unlock_block.c b/packages/devs/flash/intel/strata/current/src/flash_unlock_block.c new file mode 100644 --- /dev/null +++ b/packages/devs/flash/intel/strata/current/src/flash_unlock_block.c @@ -0,0 +1,130 @@ +//========================================================================== +// +// flash_unlock_block.c +// +// Flash programming +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas, hmt +// Contributors: gthomas +// Date: 2001-02-14 +// Purpose: +// Description: +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include "strata.h" + +#include + +// +// CAUTION! This code must be copied to RAM before execution. Therefore, +// it must not contain any code which might be position dependent! +// + +// +// The difficulty with this operation is that the hardware does not support +// unlocking single blocks. However, the logical layer would like this to +// be the case, so this routine emulates it. The hardware can clear all of +// the locks in the device at once. This routine will use that approach and +// then reset the regions which are known to be locked. +// + +#define MAX_FLASH_BLOCKS 128 + +int +flash_unlock_block(volatile flash_t *block, int block_size, int blocks) +{ + volatile flash_t *ROM, *bp, *bpv; + flash_t stat; + int timeout = 5000000; + unsigned char is_locked[MAX_FLASH_BLOCKS]; + int i, cache_on; + + HAL_DCACHE_IS_ENABLED(cache_on); + if (cache_on) { + HAL_DCACHE_SYNC(); + HAL_DCACHE_DISABLE(); + } + + // Get base address and map addresses to virtual addresses + ROM = FLASH_P2V( CYGNUM_FLASH_BASE_MASK & (unsigned int)block ); + block = FLASH_P2V(block); + + // Clear any error conditions + ROM[0] = FLASH_Clear_Status; + + // Get current block lock state. This needs to access each block on + // the device so currently locked blocks can be re-locked. + bp = ROM; + for (i = 0; i < blocks; i++) { + bpv = FLASH_P2V( bp ); + *bpv = FLASH_Read_Query; + if (bpv == block) { + is_locked[i] = 0; + } else { + is_locked[i] = bpv[2]; + } + bp += block_size / sizeof(*bp); + } + + // Clears all lock bits + ROM[0] = FLASH_Clear_Locks; + ROM[0] = FLASH_Clear_Locks_Confirm; // Confirmation + timeout = 5000000; + while(((stat = ROM[0]) & FLASH_Status_Ready) != FLASH_Status_Ready) { + if (--timeout == 0) break; + } + + // Restore the lock state + bp = ROM; + for (i = 0; i < blocks; i++) { + bpv = FLASH_P2V( bp ); + if (is_locked[i]) { + *bpv = FLASH_Set_Lock; + *bpv = FLASH_Set_Lock_Confirm; // Confirmation + timeout = 5000000; + while(((stat = ROM[0]) & FLASH_Status_Ready) != FLASH_Status_Ready) { + if (--timeout == 0) break; + } + } + bp += block_size / sizeof(*bp); + } + + // Restore ROM to "normal" mode + ROM[0] = FLASH_Reset; + + if (cache_on) { + HAL_DCACHE_ENABLE(); + } + + return stat; +} diff --git a/packages/devs/flash/intel/strata/current/src/strata.c b/packages/devs/flash/intel/strata/current/src/strata.c new file mode 100644 --- /dev/null +++ b/packages/devs/flash/intel/strata/current/src/strata.c @@ -0,0 +1,165 @@ +//========================================================================== +// +// strata.c +// +// Flash programming +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas, hmt +// Contributors: gthomas +// Date: 2001-02-14 +// Purpose: +// Description: +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include +#include +#include +#include + +#define _FLASH_PRIVATE_ +#include + +#include "strata.h" + +#define _si(p) ((p[1]<<8)|p[0]) + +extern void diag_dump_buf(void *buf, CYG_ADDRWORD len); + +extern int strncmp(const char *s1, const char *s2, int len); + +int +flash_hwr_init(void) +{ + struct FLASH_query data, *qp; + extern char flash_query, flash_query_end; + typedef int code_fun(unsigned char *); + code_fun *_flash_query; + int code_len, stat, num_regions, region_size, buffer_size; + + // Copy 'program' code to RAM for execution + code_len = (unsigned long)&flash_query_end - (unsigned long)&flash_query; + _flash_query = (code_fun *)flash_info.work_space; + memcpy(_flash_query, &flash_query, code_len); + HAL_DCACHE_SYNC(); // Should guarantee this code will run + HAL_ICACHE_DISABLE(); // is also required to avoid old contents + + stat = (*_flash_query)((unsigned char *)&data); + HAL_ICACHE_ENABLE(); + + qp = &data; + if ( (qp->manuf_code == FLASH_Intel_code) +#ifdef CYGOPT_FLASH_IS_BOOTBLOCK + // device types go as follows: 0x90 for 16-bits, 0xD0 for 8-bits, + // plus 0 or 1 for -T (Top Boot) or -B (Bottom Boot) + // [FIXME: whatever that means :FIXME] + // [I think it means the boot blocks are top/bottom of addr space] + // plus the following size codes: + // 0: 16Mbit 2: 8Mbit 4: 4Mbit + // 6: 32Mbit 8: 64Mbit +#if 16 == CYGNUM_FLASH_WIDTH + && (0x90 == (0xF0 & qp->device_code)) // 16-bit devices +#elif 8 == CYGNUM_FLASH_WIDTH + && (0xD0 == (0xF0 & qp->device_code)) // 8-bit devices +#else + && 0 +#error Only understand 16 and 8-bit bootblock flash types +#endif + ) { + int lookup[] = { 16, 8, 4, 32, 64 }; +#define BLOCKSIZE (0x10000) + region_size = BLOCKSIZE; + num_regions = qp->device_code & 0x0F; + num_regions >>= 1; + if ( num_regions > 4 ) + goto flash_type_unknown; + num_regions = lookup[num_regions]; + num_regions *= 1024 * 1024; // to bits + num_regions /= 8; // to bytes + num_regions /= BLOCKSIZE; // to blocks + buffer_size = 0; +#else // CYGOPT_FLASH_IS_BOOTBLOCK + && (strncmp(qp->id, "QRY", 3) == 0)) { + num_regions = _si(qp->num_regions)+1; + region_size = _si(qp->region_size)*256; + if (_si(qp->buffer_size)) { + buffer_size = CYGNUM_FLASH_DEVICES << _si(qp->buffer_size); + } else { + buffer_size = 0; + } +#endif // Not CYGOPT_FLASH_IS_BOOTBLOCK + + flash_info.block_size = region_size*CYGNUM_FLASH_DEVICES; + flash_info.buffer_size = buffer_size; + flash_info.blocks = num_regions; + flash_info.start = (void *)CYGNUM_FLASH_BASE; + flash_info.end = (void *)(CYGNUM_FLASH_BASE + + (num_regions*region_size*CYGNUM_FLASH_DEVICES)); + return FLASH_ERR_OK; + } + flash_type_unknown: + printf("Can't identify FLASH, sorry, man %x, dev %x, id [%4s] stat %x\n", + qp->manuf_code, qp->device_code, qp->id, stat ); + diag_dump_buf(qp, sizeof(data)); + return FLASH_ERR_HWR; +} + +// Map a hardware status to a package error +int +flash_hwr_map_error(int err) +{ + if (err & FLASH_ErrorMask) { + printf("Err = %x\n", err); + if (err & FLASH_ErrorProgram) + return FLASH_ERR_PROGRAM; + else if (err & FLASH_ErrorErase) + return FLASH_ERR_ERASE; + else + return FLASH_ERR_HWR; // FIXME + } else { + return FLASH_ERR_OK; + } +} + +// See if a range of FLASH addresses overlaps currently running code +bool +flash_code_overlaps(void *start, void *end) +{ + extern char _stext[], _etext[]; + + return ((((unsigned long)&_stext >= (unsigned long)start) && + ((unsigned long)&_stext < (unsigned long)end)) || + (((unsigned long)&_etext >= (unsigned long)start) && + ((unsigned long)&_etext < (unsigned long)end))); +} + +// EOF strata.c diff --git a/packages/devs/flash/intel/strata/current/src/strata.h b/packages/devs/flash/intel/strata/current/src/strata.h new file mode 100644 --- /dev/null +++ b/packages/devs/flash/intel/strata/current/src/strata.h @@ -0,0 +1,244 @@ +#ifndef CYGONCE_DEVS_FLASH_INTEL_STRATA_FLASH_H +#define CYGONCE_DEVS_FLASH_INTEL_STRATA_FLASH_H +//========================================================================== +// +// strata.h +// +// strataFlash programming - device constants, etc. +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas, hmt +// Contributors: gthomas +// Date: 2001-02-14 +// Purpose: +// Description: +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include +#include +#include CYGDAT_DEVS_FLASH_STRATA_INL + +// ------------------------------------------------------------------------ +// +// It is expected that the above include defined all the properties of the +// device we want to drive: the choices this module supports include: +// +// Buffered Read Block +// write query locking +// 28FxxxB3 - Bootblock - no no no +// 28FxxxC3 - StrataFlash - no yes yes +// 28FxxxJ3 - Advanced StrataFlash - yes yes yes +// +// These options are controlled by defining or not, in that include file, +// these symbols (not CDL options, just symbols - though they could be CDL +// in future) +// CYGOPT_FLASH_IS_BOOTBLOCK - for xxxB3 devices. +// CYGOPT_FLASH_IS_NOT_ADVANCED - for xxxC3 devices. +// neither - for xxxJ3 devices. +// (Advanced seems to be usual these days hence the sense of that opt) +// +// Other properties are controlled by these symbols: +// CYGNUM_FLASH_DEVICES number of devices across the databus +// CYGNUM_FLASH_WIDTH number of bits in each device +// CYGNUM_FLASH_BLANK 1 if blank is allones, 0 if 0 +// CYGNUM_FLASH_BASE base address +// CYGNUM_FLASH_BASE_MASK a mask to get base address from any +// +// for example, a 32-bit memory could be made from 1x32bit, 2x16bit or +// 4x8bit devices; usually 16bit ones are chosen in practice, so we would +// have CYGNUM_FLASH_DEVICES = 2, and CYGNUM_FLASH_WIDTH = 16. Both +// devices would be handled simulataneously, via 32bit bus operations. +// Some CPUs can handle a single 16bit device as 32bit memory "by magic". +// In that case, CYGNUM_FLASH_DEVICES = 1 and CYGNUM_FLASH_WIDTH = 16, and +// the device is managed using only 16bit bus operations. + + +// ------------------------------------------------------------------------ +// +// No mapping on this target - but these casts would be needed if some +// manipulation did occur. An example of this might be: +// // First 4K page of flash at physical address zero is +// // virtually mapped at address 0xa0000000. +// #define FLASH_P2V(x) ((volatile flash_t *)(((unsigned)(x) < 0x1000) ? +// ((unsigned)(x) | 0xa0000000) : +// (unsigned)(x))) + +#ifndef FLASH_P2V +#define FLASH_P2V( _a_ ) ((volatile flash_t *)((unsigned int)(_a_))) +#endif + +// ------------------------------------------------------------------------ +// +// This generic code is intended to deal with all shapes and orientations +// of Intel StrataFlash. Trademarks &c belong to their respective owners. +// +// It therefore needs some trickery to define the constants and accessor +// types that we use to interact with the device or devices. +// +// The assumptions are that +// o Parallel devices, we write to, with the "opcode" replicated per +// device +// o The "opcode" and status returns exist only in the low byte of the +// device's interface regardless of its width. +// o Hence opcodes and status are only one byte. +// An exception is the test for succesfully erased data. +// +// ------------------------------------------------------------------------ + +#if 8 == CYGNUM_FLASH_WIDTH + +# if 1 == CYGNUM_FLASH_DEVICES +# define FLASHWORD( k ) ((flash_t)(k)) // To narrow a 16-bit constant +typedef unsigned char flash_t; +# elif 2 == CYGNUM_FLASH_DEVICES +// 2 devices to make 16-bit +# define FLASHWORD( k ) ((k)+((k)<<8)) +typedef unsigned short flash_t; +# elif 4 == CYGNUM_FLASH_DEVICES +// 4 devices to make 32-bit +# define FLASHWORD( k ) ((k)+((k)<<8)+((k)<<16)+((k)<<24)) +typedef unsigned long flash_t; +# elif 8 == CYGNUM_FLASH_DEVICES +// 8 devices to make 64-bit - intermediate requires explicit widening +# define FLASHWORD32( k ) ((flash_t)((k)+((k)<<8)+((k)<<16)+((k)<<24))) +# define FLASHWORD( k ) (FLASHWORD32( k ) + (FLASHWORD32( k ) << 32)); +typedef unsigned long long flash_t; +# else +# error How many 8-bit flash devices? +# endif + +#elif 16 == CYGNUM_FLASH_WIDTH + +# if 1 == CYGNUM_FLASH_DEVICES +# define FLASHWORD( k ) (k) +typedef unsigned short flash_t; +# elif 2 == CYGNUM_FLASH_DEVICES +// 2 devices to make 32-bit +# define FLASHWORD( k ) ((k)+((k)<<16)) +typedef unsigned long flash_t; +# elif 2 == CYGNUM_FLASH_DEVICES +// 4 devices to make 64-bit - intermediate requires explicit widening +# define FLASHWORD32( k ) ((flash_t)((k)+((k)<<16))) +# define FLASHWORD( k ) (FLASHWORD32( k ) + (FLASHWORD32( k ) << 32)); +typedef unsigned long long flash_t; +# else +# error How many 16-bit flash devices? +# endif + +#elif 32 == CYGNUM_FLASH_WIDTH + +# if 1 == CYGNUM_FLASH_DEVICES +# define FLASHWORD( k ) (k) +typedef unsigned long flash_t; +# elif 2 == CYGNUM_FLASH_DEVICES +// 2 devices to make 64-bit - intermediate requires explicit widening +# define FLASHWORD32( k ) ((flash_t)(k)) +# define FLASHWORD( k ) (FLASHWORD32( k ) + (FLASHWORD32( k ) << 32)); +typedef unsigned long long flash_t; +# else +# error How many 32-bit flash devices? +# endif + +#else +# error What flash width? +#endif + +// Data (not) that we read back: +#if 0 == CYGNUM_FLASH_BLANK +# define FLASH_BlankValue ((flash_t)0) +#elif 1 == CYGNUM_FLASH_BLANK +# define FLASH_BlankValue ((flash_t)(-1ll)) +#else +# error What blank value? +#endif + +// ------------------------------------------------------------------------ + +#define FLASH_Read_ID FLASHWORD( 0x90 ) +#ifndef CYGOPT_FLASH_IS_BOOTBLOCK +#define FLASH_Read_Query FLASHWORD( 0x98 ) // Strata only +#endif +#define FLASH_Read_Status FLASHWORD( 0x70 ) +#define FLASH_Clear_Status FLASHWORD( 0x50 ) +#define FLASH_Status_Ready FLASHWORD( 0x80 ) +#ifdef CYGOPT_FLASH_IS_BOOTBLOCK +#define FLASH_Program FLASHWORD( 0x40 ) // BootBlock only +#else +#define FLASH_Program FLASHWORD( 0x10 ) +#endif +#define FLASH_Block_Erase FLASHWORD( 0x20 ) +#ifndef CYGOPT_FLASH_IS_BOOTBLOCK +#ifndef CYGOPT_FLASH_IS_NOT_ADVANCED +#define FLASH_Write_Buffer FLASHWORD( 0xE8 ) // *Advanced* Strata only +#endif // flash is advanced ie. has Write Buffer command +#define FLASH_Set_Lock FLASHWORD( 0x60 ) // Strata only +#define FLASH_Set_Lock_Confirm FLASHWORD( 0x01 ) // Strata only +#define FLASH_Clear_Locks FLASHWORD( 0x60 ) // Strata only +#define FLASH_Clear_Locks_Confirm FLASHWORD( 0xD0 ) // Strata only +#endif +#define FLASH_Confirm FLASHWORD( 0xD0 ) +//#define FLASH_Configure FLASHWORD( 0xB8 ) +//#define FLASH_Configure_ReadyWait FLASHWORD( 0x00 ) +//#define FLASH_Configure_PulseOnErase FLASHWORD( 0x01 ) +//#define FLASH_Configure_PulseOnProgram FLASHWORD( 0x02 ) +//#define FLASH_Configure_PulseOnBoth FLASHWORD( 0x03 ) +#define FLASH_Reset FLASHWORD( 0xFF ) + +// Status that we read back: +#define FLASH_ErrorMask FLASHWORD( 0x7E ) +#define FLASH_ErrorProgram FLASHWORD( 0x10 ) +#define FLASH_ErrorErase FLASHWORD( 0x20 ) + +#define FLASH_ErrorNotVerified FLASHWORD( 0x9910 ) // made-up number + +// ------------------------------------------------------------------------ + +#define FLASH_Intel_code 0x89 // NOT mapped to 16+16 + +// Extended query information +struct FLASH_query { + unsigned char manuf_code; // FLASH_Intel_code + unsigned char device_code; + unsigned char _unused0[14]; + unsigned char id[3]; // Q R Y + unsigned char _unused1[20]; + unsigned char device_size; + unsigned char device_interface[2]; + unsigned char buffer_size[2]; + unsigned char is_block_oriented; + unsigned char num_regions[2]; + unsigned char region_size[2]; +}; + +#endif // CYGONCE_DEVS_FLASH_INTEL_STRATA_FLASH_H +// ------------------------------------------------------------------------ +// EOF strata.h diff --git a/packages/devs/flash/mips/atlas/current/ChangeLog b/packages/devs/flash/mips/atlas/current/ChangeLog new file mode 100644 --- /dev/null +++ b/packages/devs/flash/mips/atlas/current/ChangeLog @@ -0,0 +1,26 @@ + +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//=========================================================================== diff --git a/packages/devs/flash/mips/atlas/current/cdl/flash_atlas.cdl b/packages/devs/flash/mips/atlas/current/cdl/flash_atlas.cdl new file mode 100644 --- /dev/null +++ b/packages/devs/flash/mips/atlas/current/cdl/flash_atlas.cdl @@ -0,0 +1,99 @@ +# ==================================================================== +# +# flash_atlas.cdl +# +# FLASH memory - Hardware support on MIPS32 Atlas board. +# +# ==================================================================== +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Red Hat eCos Public License +# Version 1.1 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://www.redhat.com/ +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Configurable Operating System, +# released September 30, 1998. +# +# The Initial Developer of the Original Code is Red Hat. +# Portions created by Red Hat are +# Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +# All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +# ==================================================================== +######DESCRIPTIONBEGIN#### +# +# Author(s): msalter +# Original data: gthomas +# Contributors: msalter +# Date: 2000-07-26 +# +#####DESCRIPTIONEND#### +# +# ==================================================================== + +cdl_package CYGPKG_DEVS_FLASH_ATLAS { + display "MIPS Atlas FLASH memory support" + + parent CYGPKG_IO_FLASH + active_if CYGPKG_IO_FLASH + requires CYGPKG_HAL_MIPS_ATLAS + + implements CYGHWR_IO_FLASH_DEVICE + implements CYGHWR_IO_FLASH_BLOCK_LOCKING + + include_dir . + include_files ; # none _exported_ whatsoever + description "FLASH memory device support for MIPS Atlas" + compile atlas_flash.c + + make -priority 1 { + flash_erase_block.o: $(REPOSITORY)/$(PACKAGE)/src/flash_erase_block.c + $(CC) -S $(INCLUDE_PATH) $(CFLAGS) -EL -g0 -fno-function-sections $(REPOSITORY)/$(PACKAGE)/src/flash_erase_block.c + echo " .globl flash_erase_block_end" >>flash_erase_block.s + echo "flash_erase_block_end:" >>flash_erase_block.s + $(CC) -c -EL -o flash_erase_block.o flash_erase_block.s + $(AR) rcs $(PREFIX)/lib/libtarget.a flash_erase_block.o + } + make -priority 1 { + flash_program_buf.o: $(REPOSITORY)/$(PACKAGE)/src/flash_program_buf.c + $(CC) -S $(INCLUDE_PATH) $(CFLAGS) -EL -g0 -fno-function-sections $(REPOSITORY)/$(PACKAGE)/src/flash_program_buf.c + echo " .globl flash_program_buf_end" >>flash_program_buf.s + echo "flash_program_buf_end:" >>flash_program_buf.s + $(CC) -c -EL -o flash_program_buf.o flash_program_buf.s + $(AR) rcs $(PREFIX)/lib/libtarget.a flash_program_buf.o + } + make -priority 1 { + flash_query.o: $(REPOSITORY)/$(PACKAGE)/src/flash_query.c + $(CC) -S $(INCLUDE_PATH) $(CFLAGS) -EL -g0 -fno-function-sections $(REPOSITORY)/$(PACKAGE)/src/flash_query.c + echo " .globl flash_query_end" >>flash_query.s + echo "flash_query_end:" >>flash_query.s + $(CC) -c -EL -o flash_query.o flash_query.s + $(AR) rcs $(PREFIX)/lib/libtarget.a flash_query.o + } + make -priority 1 { + flash_lock_block.o: $(REPOSITORY)/$(PACKAGE)/src/flash_lock_block.c + $(CC) -S $(INCLUDE_PATH) $(CFLAGS) -EL -g0 -fno-function-sections $(REPOSITORY)/$(PACKAGE)/src/flash_lock_block.c + echo " .globl flash_lock_block_end" >>flash_lock_block.s + echo "flash_lock_block_end:" >>flash_lock_block.s + $(CC) -c -EL -o flash_lock_block.o flash_lock_block.s + $(AR) rcs $(PREFIX)/lib/libtarget.a flash_lock_block.o + } + make -priority 1 { + flash_unlock_block.o: $(REPOSITORY)/$(PACKAGE)/src/flash_unlock_block.c + $(CC) -S $(INCLUDE_PATH) $(CFLAGS) -EL -g0 -fno-function-sections $(REPOSITORY)/$(PACKAGE)/src/flash_unlock_block.c + echo " .globl flash_unlock_block_end" >>flash_unlock_block.s + echo "flash_unlock_block_end:" >>flash_unlock_block.s + $(CC) -c -EL -o flash_unlock_block.o flash_unlock_block.s + $(AR) rcs $(PREFIX)/lib/libtarget.a flash_unlock_block.o + } +} + diff --git a/packages/devs/flash/mips/atlas/current/src/atlas_flash.c b/packages/devs/flash/mips/atlas/current/src/atlas_flash.c new file mode 100644 --- /dev/null +++ b/packages/devs/flash/mips/atlas/current/src/atlas_flash.c @@ -0,0 +1,131 @@ +//========================================================================== +// +// atlas_flash.c +// +// Flash programming +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas, msalter +// Date: 2000-12-06 +// Purpose: +// Description: +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include +#include +#include + +#define _FLASH_PRIVATE_ +#include + +#include "flash.h" + +#define _si(p) ((p[1]<<8)|p[0]) + +int +flash_hwr_init(void) +{ + struct FLASH_query data, *qp; + extern char flash_query, flash_query_end; + typedef int code_fun(unsigned char *); + code_fun *_flash_query; + int code_len, stat, num_regions, region_size; + + // Copy 'program' code to RAM for execution + code_len = (unsigned long)&flash_query_end - (unsigned long)&flash_query; + _flash_query = (code_fun *)flash_info.work_space; + memcpy(_flash_query, &flash_query, code_len); + + HAL_DCACHE_SYNC(); // Should guarantee this code will run + HAL_ICACHE_INVALIDATE_ALL(); // is also required to avoid old contents + stat = (*_flash_query)(&data); + + qp = &data; + if (/*(qp->manuf_code == FLASH_Intel_code) && */ + (strncmp(qp->id, "QRY", 3) == 0)) { + num_regions = _si(qp->num_regions)+1; + region_size = _si(qp->region_size)*256; + + flash_info.block_size = region_size*2; // Pairs of chips in parallel + flash_info.blocks = num_regions*2; // and pairs of chips in serial + flash_info.start = (void *)0x9c000000; + flash_info.end = (void *)0x9e000000; + return FLASH_ERR_OK; + } else { + printf("Can't identify FLASH, sorry\n"); + diag_dump_buf(data, sizeof(data)); + return FLASH_ERR_HWR; + } +} + +// Map a hardware status to a package error +int +flash_hwr_map_error(int err) +{ + if (err & 0x007E007E) { + printf("Err = %x\n", err); + if (err & 0x00100010) { + return FLASH_ERR_PROGRAM; + } else + if (err & 0x00200020) { + return FLASH_ERR_ERASE; + } else + return FLASH_ERR_HWR; // FIXME + } else { + return FLASH_ERR_OK; + } +} + +// See if a range of FLASH addresses overlaps currently running code +bool +flash_code_overlaps(void *start, void *end) +{ + extern char _stext[], _etext[]; + unsigned long p_stext, pstart, p_etext, pend; + + p_stext = CYGARC_PHYSICAL_ADDRESS((unsigned long)&_stext); + p_etext = CYGARC_PHYSICAL_ADDRESS((unsigned long)&_etext); + + // if _stext/_etext in boot shadow region, convert to + // system flash address + if ((p_stext >= 0x1fc00000) && (p_etext <= 0x20000000)) { + p_stext -= 0x02000000; + p_etext -= 0x02000000; + } + + pstart = CYGARC_PHYSICAL_ADDRESS((unsigned long)start); + pend = CYGARC_PHYSICAL_ADDRESS((unsigned long)end); + + return (((p_stext >= pstart) && (p_stext < pend)) || + ((p_etext >= pstart) && (p_etext < pend))); +} diff --git a/packages/devs/flash/mips/atlas/current/src/flash.h b/packages/devs/flash/mips/atlas/current/src/flash.h new file mode 100644 --- /dev/null +++ b/packages/devs/flash/mips/atlas/current/src/flash.h @@ -0,0 +1,96 @@ +//========================================================================== +// +// flash.h +// +// Flash programming - device constants, etc. +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 2000-07-26 +// Purpose: +// Description: +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#ifndef _FLASH_HWR_H_ +#define _FLASH_HWR_H_ + +#define FLASH_Intel_code 0x89 + +#define FLASH_Read_ID 0x00900090 +#define FLASH_Read_Query 0x00980098 +#define FLASH_Read_Status 0x00700070 +#define FLASH_Clear_Status 0x00500050 +#define FLASH_Status_Ready 0x00800080 +#define FLASH_Write_Buffer 0x00E800E8 +#define FLASH_Program 0x00100010 +#define FLASH_Block_Erase 0x00200020 +#define FLASH_Set_Lock 0x00600060 +#define FLASH_Set_Lock_Confirm 0x00010001 +#define FLASH_Clear_Locks 0x00600060 +#define FLASH_Clear_Locks_Confirm 0x00D000D0 +#define FLASH_Confirm 0x00D000D0 +#define FLASH_Configure 0x00B800B8 +#define FLASH_Configure_ReadyWait 0x00000000 +#define FLASH_Configure_PulseOnErase 0x00010001 +#define FLASH_Configure_PulseOnProgram 0x00020002 +#define FLASH_Configure_PulseOnBoth 0x00030003 +#define FLASH_Reset 0x00FF00FF + +#define FLASH_BLOCK_SIZE 0x40000 + +#define FLASH_Intel_code 0x89 + +#define FLASH_BASE_MASK 0xff000000 + +// Extended query information +struct FLASH_query { + unsigned char manuf_code; + unsigned char device_code; + unsigned char _unused0[14]; + unsigned char id[3]; // Q R Y + unsigned char _unused1[20]; + unsigned char device_size; + unsigned char device_interface[2]; + unsigned char buffer_size[2]; + unsigned char is_block_oriented; + unsigned char num_regions[2]; + unsigned char region_size[2]; +}; + +#define ATLAS_SFWCTRL *((volatile unsigned *)0xbf000700) +#define ATLAS_WEN_MAGIC 0xc7 + +#define FLASH_WRITE_ENABLE() (ATLAS_SFWCTRL = ATLAS_WEN_MAGIC) +#define FLASH_WRITE_DISABLE() (ATLAS_SFWCTRL = 0) + +#endif // _FLASH_HWR_H_ diff --git a/packages/devs/flash/mips/atlas/current/src/flash_erase_block.c b/packages/devs/flash/mips/atlas/current/src/flash_erase_block.c new file mode 100644 --- /dev/null +++ b/packages/devs/flash/mips/atlas/current/src/flash_erase_block.c @@ -0,0 +1,94 @@ +//========================================================================== +// +// flash_erase_block.c +// +// Flash programming +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas, msalter +// Date: 2000-12-07 +// Purpose: +// Description: +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include "flash.h" + +#include +#include +#include + +// +// CAUTION! This code must be copied to RAM before execution. Therefore, +// it must not contain any code which might be position dependent! +// + +int flash_erase_block(volatile unsigned long *block) +{ + volatile unsigned long *ROM; + unsigned long stat; + int timeout = 50000; + int len; + + FLASH_WRITE_ENABLE(); + + block = (volatile unsigned long *)CYGARC_UNCACHED_ADDRESS((unsigned long)block); + ROM = (volatile unsigned long *)((unsigned long)block & FLASH_BASE_MASK); + + // Clear any error conditions + ROM[0] = FLASH_Clear_Status; + + // Erase block + ROM[0] = FLASH_Block_Erase; + *block = FLASH_Confirm; + timeout = 5000000; + while(((stat = ROM[0]) & FLASH_Status_Ready) != FLASH_Status_Ready) { + if (--timeout == 0) break; + } + + // Restore ROM to "normal" mode + ROM[0] = FLASH_Reset; + + // If an error was reported, see if the block erased anyway + if (stat & 0x007E007E) { + len = FLASH_BLOCK_SIZE; + while (len > 0) { + if (*block++ != 0xFFFFFFFF) break; + len -= sizeof(*block); + } + if (len == 0) stat = 0; + } + + FLASH_WRITE_DISABLE(); + + return stat; +} diff --git a/packages/devs/flash/mips/atlas/current/src/flash_lock_block.c b/packages/devs/flash/mips/atlas/current/src/flash_lock_block.c new file mode 100644 --- /dev/null +++ b/packages/devs/flash/mips/atlas/current/src/flash_lock_block.c @@ -0,0 +1,80 @@ +//========================================================================== +// +// flash_lock_block.c +// +// Flash programming +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas, msalter +// Date: 2000-12-07 +// Purpose: +// Description: +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include "flash.h" +#include + +// +// CAUTION! This code must be copied to RAM before execution. Therefore, +// it must not contain any code which might be position dependent! +// + +int +flash_lock_block(volatile unsigned long *block) +{ + volatile unsigned long *ROM; + unsigned long stat; + int timeout = 5000000; + + FLASH_WRITE_ENABLE(); + + block = (volatile unsigned long *)CYGARC_UNCACHED_ADDRESS((unsigned long)block); + ROM = (volatile unsigned long *)((unsigned long)block & FLASH_BASE_MASK); + + // Clear any error conditions + ROM[0] = FLASH_Clear_Status; + + // Set lock bit + block[0] = FLASH_Set_Lock; + block[0] = FLASH_Set_Lock_Confirm; // Confirmation + while(((stat = ROM[0]) & FLASH_Status_Ready) != FLASH_Status_Ready) { + if (--timeout == 0) break; + } + + // Restore ROM to "normal" mode + ROM[0] = FLASH_Reset; + + FLASH_WRITE_DISABLE(); + + return stat; +} diff --git a/packages/devs/flash/mips/atlas/current/src/flash_program_buf.c b/packages/devs/flash/mips/atlas/current/src/flash_program_buf.c new file mode 100644 --- /dev/null +++ b/packages/devs/flash/mips/atlas/current/src/flash_program_buf.c @@ -0,0 +1,96 @@ +//========================================================================== +// +// flash_program_buf.c +// +// Flash programming +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas, msalter +// Date: 2000-12-07 +// Purpose: +// Description: +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include "flash.h" + +#include +#include + +// +// CAUTION! This code must be copied to RAM before execution. Therefore, +// it must not contain any code which might be position dependent! +// + +int +flash_program_buf(volatile unsigned long *addr, unsigned long *data, int len) +{ + volatile unsigned long *ROM; + unsigned long stat = 0; + int timeout = 50000; + + FLASH_WRITE_ENABLE(); + + addr = (volatile unsigned long *)CYGARC_UNCACHED_ADDRESS((unsigned long)addr); + ROM = (volatile unsigned long *)((unsigned long)addr & FLASH_BASE_MASK); + + // Clear any error conditions + ROM[0] = FLASH_Clear_Status; + + while (len > 0) { + ROM[0] = FLASH_Program; + *addr = *data; + timeout = 5000000; + while(((stat = ROM[0]) & FLASH_Status_Ready) != FLASH_Status_Ready) { + if (--timeout == 0) { + goto bad; + } + } + if (stat & 0x007E007E) { + break; + } + ROM[0] = FLASH_Reset; + if (*addr++ != *data++) { + stat = 0x99109910; + break; + } + len -= 4; + } + + // Restore ROM to "normal" mode + bad: + ROM[0] = FLASH_Reset; + + FLASH_WRITE_DISABLE(); + + return stat; +} diff --git a/packages/devs/flash/mips/atlas/current/src/flash_query.c b/packages/devs/flash/mips/atlas/current/src/flash_query.c new file mode 100644 --- /dev/null +++ b/packages/devs/flash/mips/atlas/current/src/flash_query.c @@ -0,0 +1,75 @@ +//========================================================================== +// +// flash_query.c +// +// Flash programming - query device +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 2000-07-26 +// Purpose: +// Description: +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include "flash.h" + +#include +#include +#include +#include CYGHWR_MEMORY_LAYOUT_H + +// +// CAUTION! This code must be copied to RAM before execution. Therefore, +// it must not contain any code which might be position dependent! +// + +#define CNT 20*1000*10 // Approx 20ms + +int +flash_query(unsigned char *data) +{ + volatile unsigned long *ROM; + int i, cnt; + + ROM = (volatile unsigned long *)0xBC000000; // base of system flash + + ROM[0] = FLASH_Read_Query; + for (cnt = CNT; cnt > 0; cnt--) ; + for (i = 0; i < sizeof(struct FLASH_query); i++) { + *data++ = *ROM++; + } + + ROM[0] = FLASH_Reset; + + return 0; +} diff --git a/packages/devs/flash/mips/atlas/current/src/flash_unlock_block.c b/packages/devs/flash/mips/atlas/current/src/flash_unlock_block.c new file mode 100644 --- /dev/null +++ b/packages/devs/flash/mips/atlas/current/src/flash_unlock_block.c @@ -0,0 +1,121 @@ +//========================================================================== +// +// flash_unlock_block.c +// +// Flash programming +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 2000-09-10 +// Purpose: +// Description: +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include "flash.h" + +#include + +// +// CAUTION! This code must be copied to RAM before execution. Therefore, +// it must not contain any code which might be position dependent! +// + +// +// The difficulty with this operation is that the hardware does not support +// unlocking single blocks. However, the logical layer would like this to +// be the case, so this routine emulates it. The hardware can clear all of +// the locks in the device at once. This routine will use that approach and +// then reset the regions which are known to be locked. +// + +#define MAX_FLASH_BLOCKS 128 + +int +flash_unlock_block(volatile unsigned long *block, int block_size, int blocks) +{ + volatile unsigned long *ROM, *bp; + unsigned long stat; + int timeout = 5000000; + unsigned char is_locked[MAX_FLASH_BLOCKS]; + int i; + + FLASH_WRITE_ENABLE(); + + block = (volatile unsigned long *)CYGARC_UNCACHED_ADDRESS((unsigned long)block); + ROM = (volatile unsigned long *)((unsigned long)block & FLASH_BASE_MASK); + + // Clear any error conditions + ROM[0] = FLASH_Clear_Status; + + // Get current block lock state. This needs to access each block on + // the device so currently locked blocks can be re-locked. + bp = ROM; + for (i = 0; i < (blocks/2); i++) { + if (bp == block) { + is_locked[i] = 0; + } else { + *bp = FLASH_Read_Query; + is_locked[i] = bp[2]; + } + bp += block_size / sizeof(*bp); + } + + // Clears all lock bits + block[0] = FLASH_Clear_Locks; + block[0] = FLASH_Clear_Locks_Confirm; // Confirmation + timeout = 5000000; + while(((stat = ROM[0]) & FLASH_Status_Ready) != FLASH_Status_Ready) { + if (--timeout == 0) break; + } + + // Restore the lock state + bp = ROM; + for (i = 0; i < (blocks/2); i++) { + if (is_locked[i]) { + *bp = FLASH_Set_Lock; + *bp = FLASH_Set_Lock_Confirm; // Confirmation + timeout = 5000000; + while(((stat = ROM[0]) & FLASH_Status_Ready) != FLASH_Status_Ready) { + if (--timeout == 0) break; + } + } + bp += block_size / sizeof(*bp); + } + + // Restore ROM to "normal" mode + ROM[0] = FLASH_Reset; + + FLASH_WRITE_DISABLE(); + + return stat; +} diff --git a/packages/devs/flash/mips/ocelot/current/ChangeLog b/packages/devs/flash/mips/ocelot/current/ChangeLog new file mode 100644 --- /dev/null +++ b/packages/devs/flash/mips/ocelot/current/ChangeLog @@ -0,0 +1,29 @@ +2000-12-05 Jesper Skov + + * Created. + +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//=========================================================================== diff --git a/packages/devs/flash/mips/ocelot/current/cdl/flash_mips_qed_ocelot.cdl b/packages/devs/flash/mips/ocelot/current/cdl/flash_mips_qed_ocelot.cdl new file mode 100644 --- /dev/null +++ b/packages/devs/flash/mips/ocelot/current/cdl/flash_mips_qed_ocelot.cdl @@ -0,0 +1,64 @@ +# ==================================================================== +# +# flash_mips_qed_ocelot.cdl +# +# FLASH memory - Hardware support for QED Ocelot board +# +# ==================================================================== +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Red Hat eCos Public License +# Version 1.1 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://www.redhat.com/ +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Configurable Operating System, +# released September 30, 1998. +# +# The Initial Developer of the Original Code is Red Hat. +# Portions created by Red Hat are +# Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +# All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +# ==================================================================== +######DESCRIPTIONBEGIN#### +# +# Author(s): jskov +# Contributors: jskov +# Date: 2000-12-05 +# +#####DESCRIPTIONEND#### +# +# ==================================================================== + +cdl_package CYGPKG_DEVS_FLASH_MIPS_QED_OCELOT { + display "Flash memory support for QED Ocelot board" + + parent CYGPKG_IO_FLASH + active_if CYGPKG_IO_FLASH + + # FIXME: This really belongs in the ADM_AM29F040B package + cdl_interface CYGINT_DEVS_FLASH_AMD_AM29F040B_REQUIRED { + display "AMD AM29F040B driver required" + } + + include_dir cyg/io + description "FLASH memory device support for QED Ocelot board" + + implements CYGINT_DEVS_FLASH_AMD_AM29F040B_REQUIRED + + define_proc { + puts $::cdl_system_header "/***** flash driver proc output start *****/" + puts $::cdl_system_header "#define CYGDAT_DEVS_FLASH_AMD_AM29F040B_INL " + puts $::cdl_system_header "#define CYGDAT_DEVS_FLASH_AMD_AM29F040B_CFG " + puts $::cdl_system_header "/***** flash driver proc output end *****/" + } +} diff --git a/packages/devs/flash/mips/ocelot/current/include/devs_flash_mips_qed_ocelot.inl b/packages/devs/flash/mips/ocelot/current/include/devs_flash_mips_qed_ocelot.inl new file mode 100644 --- /dev/null +++ b/packages/devs/flash/mips/ocelot/current/include/devs_flash_mips_qed_ocelot.inl @@ -0,0 +1,50 @@ +#ifndef CYGONCE_DEVS_FLASH_MIPS_OCELOT_H +#define CYGONCE_DEVS_FLASH_MIPS_OCELOT_H +//========================================================================== +// +// devs_flash_mips_qed_ocelot.inl +// +// Ocelot flash information +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jskov +// Contributors: jskov +// Date: 2000-12-05 +// Purpose: +// Description: +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#define CYGHWR_FLASH_INTERLEAVE 1 +#define CYGHWR_FLASH_SERIES 1 +#define CYGHWR_FLASH_BASE 0xbfc00000 + +#endif // CYGONCE_DEVS_FLASH_MIPS_OCELOT_H diff --git a/packages/devs/flash/mips/ocelot/current/include/plf_flash.inc b/packages/devs/flash/mips/ocelot/current/include/plf_flash.inc new file mode 100644 --- /dev/null +++ b/packages/devs/flash/mips/ocelot/current/include/plf_flash.inc @@ -0,0 +1,65 @@ +#ifndef CYGONCE_DEVS_PLF_FLASH_INC +#define CYGONCE_DEVS_PLF_FLASH_INC + +##============================================================================= +## +## plf_flash.inc +## +## MIPS assembler header file +## +##============================================================================= +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Red Hat eCos Public License +# Version 1.1 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://www.redhat.com/ +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Configurable Operating System, +# released September 30, 1998. +# +# The Initial Developer of the Original Code is Red Hat. +# Portions created by Red Hat are +# Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +# All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +##============================================================================= +#######DESCRIPTIONBEGIN#### +## +## Author(s): jskov +## Contributors:jskov +## Date: 2000-12-05 +## Purpose: MIPS definitions. +## Description: This file contains various definitions and macros that are +## useful for writing assembly code for the MIPS CPU family. +## Usage: +## #include +## ... +## +## +######DESCRIPTIONEND#### +## +##============================================================================= + +#define FUNC_START(name) \ + .type name,@function; \ + .globl name; \ + .ent name; \ +name: + +#define FUNC_END(name) \ + .globl name; \ +name: + + +#------------------------------------------------------------------------------ +#endif // ifndef CYGONCE_DEVS_PLF_FLASH_INC +# end of plf_flash.inc diff --git a/packages/devs/kbd/arm/ipaq/current/ChangeLog b/packages/devs/kbd/arm/ipaq/current/ChangeLog new file mode 100644 --- /dev/null +++ b/packages/devs/kbd/arm/ipaq/current/ChangeLog @@ -0,0 +1,30 @@ +2001-03-15 Gary Thomas + + * src/ipaq_kbd.c: + * cdl/kbd_ipaq.cdl: New file(s) - keypad driver for iPAQ. + +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//=========================================================================== diff --git a/packages/devs/kbd/arm/ipaq/current/cdl/kbd_ipaq.cdl b/packages/devs/kbd/arm/ipaq/current/cdl/kbd_ipaq.cdl new file mode 100644 --- /dev/null +++ b/packages/devs/kbd/arm/ipaq/current/cdl/kbd_ipaq.cdl @@ -0,0 +1,87 @@ +#========================================================================== +# +# kbd_ipaq.cdl +# +# eCos configuration data for the Compaq iPAQ keypad/buttons +# +#========================================================================== +#####COPYRIGHTBEGIN#### +# +# The contents of this file are subject to the Red Hat eCos Public License +# Version 1.1 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://www.redhat.com/ +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Configurable Operating System, +# released September 30, 1998. +# +# The Initial Developer of the Original Code is Red Hat. +# Portions created by Red Hat are +# Copyright (C) 2001 Red Hat, Inc. +# All Rights Reserved. +# +#####COPYRIGHTEND#### +#========================================================================== +######DESCRIPTIONBEGIN#### +# +# Author(s): gthomas +# Contributors: gthomas +# Date: 2001-03-15 +# Purpose: +# Description: Kbdscreen drivers for Compaq iPAQ +# +#####DESCRIPTIONEND#### +# +#========================================================================== + +cdl_package CYGPKG_DEVS_KBD_IPAQ { + display "Keypad driver for iPAQ" + include_dir cyg/io + requires CYGPKG_IO + requires CYGFUN_KERNEL_API_C + requires CYGPKG_HAL_ARM_SA11X0_IPAQ + active_if !CYGSEM_IPAQ_LCD_COMM + + compile -library=libextras.a ipaq_kbd.c + + description "Keypad driver for the iPAQ using the Atmel micro-controller" + + cdl_component CYGPKG_DEVS_KBD_IPAQ_OPTIONS { + display "options" + flavor none + no_define + + cdl_option CYGPKG_DEVS_KBD_IPAQ_CFLAGS { + display "Additional compiler flags" + flavor data + no_define + default_value { "" } + description " + This option modifies the set of compiler flags for + building the keypad driver package. These flags + are used in addition to the set of global flags." + } + + cdl_option CYGDAT_DEVS_KBD_IPAQ_NAME { + display "Device name for the keypad driver" + flavor data + default_value {"\"/dev/kbd\""} + description " This option specifies the name of the keypad device" + } + + cdl_option CYGNUM_DEVS_KBD_IPAQ_EVENT_BUFFER_SIZE { + display "Number of events the driver can buffer" + flavor data + default_value { 32 } + description " + This option defines the size of the keypad device internal + buffer. The cyg_io_read() function will return as many of these + as there is space for in the buffer passed." + } + } +} diff --git a/packages/devs/kbd/arm/ipaq/current/src/ipaq_kbd.c b/packages/devs/kbd/arm/ipaq/current/src/ipaq_kbd.c new file mode 100644 --- /dev/null +++ b/packages/devs/kbd/arm/ipaq/current/src/ipaq_kbd.c @@ -0,0 +1,216 @@ +//========================================================================== +// +// ipaq_kbd.c +// +// Keypad driver for the Compaq iPAQ +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 2001 Red Hat, Inc. +// All Rights Reserved. +//------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 2001-03-15 +// Purpose: +// Description: Keypad driver for Compaq IPAQ +// +//####DESCRIPTIONEND#### +// +//========================================================================== + + +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include // For select() functionality +static cyg_selinfo kbd_select_info; +static cyg_bool kbd_select_active; + +#include +#include + +// Functions in this module + +static Cyg_ErrNo kbd_read(cyg_io_handle_t handle, + void *buffer, + cyg_uint32 *len); +static cyg_bool kbd_select(cyg_io_handle_t handle, + cyg_uint32 which, + cyg_addrword_t info); +static Cyg_ErrNo kbd_set_config(cyg_io_handle_t handle, + cyg_uint32 key, + const void *buffer, + cyg_uint32 *len); +static Cyg_ErrNo kbd_get_config(cyg_io_handle_t handle, + cyg_uint32 key, + void *buffer, + cyg_uint32 *len); +static bool kbd_init(struct cyg_devtab_entry *tab); +static Cyg_ErrNo kbd_lookup(struct cyg_devtab_entry **tab, + struct cyg_devtab_entry *st, + const char *name); + +CHAR_DEVIO_TABLE(ipaq_kbd_handlers, + NULL, // Unsupported write() function + kbd_read, + kbd_select, + kbd_get_config, + kbd_set_config); + +CHAR_DEVTAB_ENTRY(ipaq_kbd_device, + CYGDAT_DEVS_KBD_IPAQ_NAME, + NULL, // Base device name + &ipaq_kbd_handlers, + kbd_init, + kbd_lookup, + NULL); // Private data pointer + +#define MAX_EVENTS CYGNUM_DEVS_KBD_IPAQ_EVENT_BUFFER_SIZE +static int num_events; +static int _event_put, _event_get; +static unsigned char _events[MAX_EVENTS]; + +static bool _is_open = false; + +// +// Note: this routine is called from the Atmel processing DSR +// +static void +kbd_handler(atmel_pkt *pkt) +{ + unsigned char *dp = pkt->data; + unsigned char *ev; + +// diag_printf("KBD = %x\n", dp[1]); + if (num_events < MAX_EVENTS) { + num_events++; + ev = &_events[_event_put++]; + if (_event_put == MAX_EVENTS) { + _event_put = 0; + } + *ev = dp[1]; + if (kbd_select_active) { + kbd_select_active = false; + cyg_selwakeup(&kbd_select_info); + } + } +} + +static Cyg_ErrNo +kbd_read(cyg_io_handle_t handle, + void *buffer, + cyg_uint32 *len) +{ + unsigned char *ev; + int tot = *len; + unsigned char *bp = (unsigned char *)buffer; + + cyg_scheduler_lock(); // Prevent interaction with DSR code + while (tot >= sizeof(*ev)) { + if (num_events > 0) { + ev = &_events[_event_get++]; + if (_event_get == MAX_EVENTS) { + _event_get = 0; + } + memcpy(bp, ev, sizeof(*ev)); + bp += sizeof(*ev); + tot -= sizeof(*ev); + num_events--; + } else { + break; // No more events + } + } + cyg_scheduler_unlock(); // Allow DSRs again + *len -= tot; + return ENOERR; +} + +static cyg_bool +kbd_select(cyg_io_handle_t handle, + cyg_uint32 which, + cyg_addrword_t info) +{ + if (which == CYG_FREAD) { + cyg_scheduler_lock(); // Prevent interaction with DSR code + if (num_events > 0) { + cyg_scheduler_unlock(); // Reallow interaction with DSR code + return true; + } + if (!kbd_select_active) { + kbd_select_active = true; + cyg_selrecord(info, &kbd_select_info); + } + cyg_scheduler_unlock(); // Reallow interaction with DSR code + } + return false; +} + +static Cyg_ErrNo +kbd_set_config(cyg_io_handle_t handle, + cyg_uint32 key, + const void *buffer, + cyg_uint32 *len) +{ + return EINVAL; +} + +static Cyg_ErrNo +kbd_get_config(cyg_io_handle_t handle, + cyg_uint32 key, + void *buffer, + cyg_uint32 *len) +{ + return EINVAL; +} + +static bool +kbd_init(struct cyg_devtab_entry *tab) +{ + cyg_selinit(&kbd_select_info); + return true; +} + +static Cyg_ErrNo +kbd_lookup(struct cyg_devtab_entry **tab, + struct cyg_devtab_entry *st, + const char *name) +{ + if (!_is_open) { + _is_open = true; + atmel_register(ATMEL_CMD_KEYBD, kbd_handler); + atmel_interrupt_mode(true); + } + return ENOERR; +} diff --git a/packages/devs/pcmcia/arm/ipaq/current/ChangeLog b/packages/devs/pcmcia/arm/ipaq/current/ChangeLog new file mode 100644 --- /dev/null +++ b/packages/devs/pcmcia/arm/ipaq/current/ChangeLog @@ -0,0 +1,40 @@ +2001-03-14 Gary Thomas + + * src/ipaq_pcmcia.c (cf_hwr_init): Leave GPIO/timing setup to HAL code. + +2001-03-01 Gary Thomas + + * src/ipaq_pcmcia.c (cf_hwr_init): Remove [illegal] delay which caused + this code to be unreliable when run in non-ROM mode. + +2001-02-24 Gary Thomas + + * src/ipaq_pcmcia.c: + * cdl/pcmcia_ipaq.cdl: New file(s) - initial import of + iPAQ support, contributed by Richard Panton, 3G Labs. + +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//=========================================================================== diff --git a/packages/devs/pcmcia/arm/ipaq/current/cdl/pcmcia_ipaq.cdl b/packages/devs/pcmcia/arm/ipaq/current/cdl/pcmcia_ipaq.cdl new file mode 100644 --- /dev/null +++ b/packages/devs/pcmcia/arm/ipaq/current/cdl/pcmcia_ipaq.cdl @@ -0,0 +1,57 @@ +# ==================================================================== +# +# pcmcia_ipaq.cdl +# +# PCMCIA (Compact Flash) - Hardware support on iPAQ +# +# ==================================================================== +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Red Hat eCos Public License +# Version 1.1 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://www.redhat.com/ +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Configurable Operating System, +# released September 30, 1998. +# +# The Initial Developer of the Original Code is Red Hat. +# Portions created by Red Hat are +# Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +# All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +# ==================================================================== +######DESCRIPTIONBEGIN#### +# +# Author(s): gthomas +# Original data: gthomas +# Contributors: +# Richard Panton +# Date: 2001-02-24 +# +#####DESCRIPTIONEND#### +# +# ==================================================================== + +cdl_package CYGPKG_DEVS_PCMCIA_IPAQ { + display "SA11x0/iPaq PCMCIA support" + + parent CYGPKG_IO_PCMCIA + active_if CYGPKG_IO_PCMCIA + active_if CYGPKG_HAL_ARM_SA11X0_IPAQ + + implements CYGHWR_IO_PCMCIA_DEVICE + + include_dir . + include_files ; # none _exported_ whatsoever + description "PCMCIA (Compact Flash) device support for SA11x0/iPAQ" + compile ipaq_pcmcia.c +} diff --git a/packages/devs/pcmcia/arm/ipaq/current/src/ipaq_pcmcia.c b/packages/devs/pcmcia/arm/ipaq/current/src/ipaq_pcmcia.c new file mode 100644 --- /dev/null +++ b/packages/devs/pcmcia/arm/ipaq/current/src/ipaq_pcmcia.c @@ -0,0 +1,249 @@ +//========================================================================== +// +// devs/pcmcia/ipaq/ipaq_pcmcia.c +// +// PCMCIA support (Card Services) +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// richard.panton@3glab.com +// Date: 2001-02-24 +// Purpose: PCMCIA support +// Description: +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include + +#include // IO macros +#include // Register state info +#include // HAL interrupt macros +#include + +#ifdef CYGPKG_KERNEL +#include // Configuration header +#include +#endif +#include + +#include +#include + +#include // Board definitions +#include + +#ifdef CYGPKG_KERNEL +static cyg_interrupt cf_detect_interrupt; +static cyg_handle_t cf_detect_interrupt_handle; +static cyg_interrupt cf_irq_interrupt; +static cyg_handle_t cf_irq_interrupt_handle; + +// This ISR is called when a CompactFlash board is inserted +static int +cf_detect_isr(cyg_vector_t vector, cyg_addrword_t data, HAL_SavedRegisters *regs) +{ + cyg_drv_interrupt_mask(SA1110_CF_DETECT); + return (CYG_ISR_HANDLED|CYG_ISR_CALL_DSR); // Run the DSR +} + +// This DSR handles the board insertion +static void +cf_detect_dsr(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data) +{ + unsigned long new_state = *SA11X0_GPIO_PIN_LEVEL; + struct cf_slot *slot = (struct cf_slot *)data; + if ((new_state & SA1110_GPIO_CF_DETECT) == SA1110_GPIO_CF_PRESENT) { + slot->state = CF_SLOT_STATE_Inserted; + } else { + slot->state = CF_SLOT_STATE_Removed; // Implies powered up, etc. + } + cyg_drv_interrupt_acknowledge(SA1110_CF_DETECT); + cyg_drv_interrupt_unmask(SA1110_CF_DETECT); +} + +// This ISR is called when the card interrupt occurs +static int +cf_irq_isr(cyg_vector_t vector, cyg_addrword_t data, HAL_SavedRegisters *regs) +{ + cyg_drv_interrupt_mask(SA1110_CF_IRQ); + return (CYG_ISR_HANDLED|CYG_ISR_CALL_DSR); // Run the DSR +} + +// This DSR handles the card interrupt +static void +cf_irq_dsr(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data) +{ + struct cf_slot *slot = (struct cf_slot *)data; +#if defined(CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT) + cyg_bool was_ctrlc_int; +#endif + + // Clear interrupt [edge indication] + cyg_drv_interrupt_acknowledge(SA1110_CF_IRQ); +#if defined(CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT) + was_ctrlc_int = HAL_CTRLC_CHECK(vector, data); + if (!was_ctrlc_int) // Fall through and run normal code +#endif + // Process interrupt + (slot->irq_handler.handler)(vector, count, slot->irq_handler.param); + // Allow interrupts to happen again + cyg_drv_interrupt_unmask(SA1110_CF_IRQ); +} +#endif + +static void +do_delay(int ticks) +{ +#ifdef CYGPKG_KERNEL + cyg_thread_delay(ticks); +#else + CYGACC_CALL_IF_DELAY_US(10000*ticks); +#endif +} + +// +// Fill in the details of a PCMCIA slot and initialize the device +// +void +cf_hwr_init(struct cf_slot *slot) +{ + static int int_init = 0; + unsigned long new_state = *SA11X0_GPIO_PIN_LEVEL; + + if (!int_init) { + int_init = 1; +#ifdef CYGPKG_KERNEL + // Set up interrupts + cyg_drv_interrupt_create(SA1110_CF_DETECT, + 99, // Priority - what goes here? + (cyg_addrword_t) slot, // Data item passed to interrupt handler + (cyg_ISR_t *)cf_detect_isr, + (cyg_DSR_t *)cf_detect_dsr, + &cf_detect_interrupt_handle, + &cf_detect_interrupt); + cyg_drv_interrupt_attach(cf_detect_interrupt_handle); + cyg_drv_interrupt_configure(SA1110_CF_DETECT, true, true); // Detect either edge + cyg_drv_interrupt_acknowledge(SA1110_CF_DETECT); + cyg_drv_interrupt_unmask(SA1110_CF_DETECT); + + cyg_drv_interrupt_create(SA1110_CF_IRQ, + 99, // Priority - what goes here? + (cyg_addrword_t) slot, // Data item passed to interrupt handler + (cyg_ISR_t *)cf_irq_isr, + (cyg_DSR_t *)cf_irq_dsr, + &cf_irq_interrupt_handle, + &cf_irq_interrupt); + cyg_drv_interrupt_attach(cf_irq_interrupt_handle); + cyg_drv_interrupt_unmask(SA1110_CF_IRQ); + cyg_drv_interrupt_configure(SA1110_CF_IRQ, false, false); // Falling edge + cyg_drv_interrupt_acknowledge(SA1110_CF_IRQ); +#endif + } + slot->attr = (unsigned char *)0x28000000; + slot->attr_length = 0x200; + slot->io = (unsigned char *)0x20000000; + slot->io_length = 0x04000000; + slot->mem = (unsigned char *)0x2C000000; + slot->mem_length = 0x04000000; + slot->int_num = SA1110_CF_IRQ; +#ifdef CYG_HAL_STARTUP_ROM + // Disable CF bus & power (idle/off) + ipaq_EGPIO( SA1110_EIO_OPT_PWR | SA1110_EIO_OPT | SA1110_EIO_CF_RESET, + SA1110_EIO_OPT_PWR_ON | SA1110_EIO_OPT_ON | SA1110_EIO_CF_RESET_ENABLE ); +#endif + if ((new_state & SA1110_GPIO_CF_DETECT) == SA1110_GPIO_CF_PRESENT) { + if ((_ipaq_EGPIO & SA1110_EIO_OPT_PWR) == SA1110_EIO_OPT_PWR_ON) { + // Assume that the ROM environment has turned the bus on + slot->state = CF_SLOT_STATE_Ready; + } else { + slot->state = CF_SLOT_STATE_Inserted; + } + } else { + slot->state = CF_SLOT_STATE_Empty; + } +} + +void +cf_hwr_poll(struct cf_slot *slot) +{ + unsigned long new_state = *SA11X0_GPIO_PIN_LEVEL; + if ((new_state & SA1110_GPIO_CF_DETECT) == SA1110_GPIO_CF_PRESENT) { + slot->state = CF_SLOT_STATE_Inserted; + } else { + slot->state = CF_SLOT_STATE_Empty; + } +} + +// +// Transition the card/slot to a new state +// note: currently only supports transitions to Ready, Empty +// +bool +cf_hwr_change_state(struct cf_slot *slot, int new_state) +{ + int i, ptr, len; + unsigned char buf[64]; + + if (new_state == CF_SLOT_STATE_Ready) { + if (slot->state == CF_SLOT_STATE_Inserted) { + ipaq_EGPIO( SA1110_EIO_OPT_PWR | SA1110_EIO_OPT | SA1110_EIO_CF_RESET, + SA1110_EIO_OPT_PWR_ON | SA1110_EIO_OPT_ON | SA1110_EIO_CF_RESET_DISABLE); + do_delay(30); // At least 300 ms + slot->state = CF_SLOT_STATE_Powered; + ipaq_EGPIO( SA1110_EIO_CF_RESET, SA1110_EIO_CF_RESET_ENABLE); + do_delay(1); // At least 10 us + slot->state = CF_SLOT_STATE_Reset; + ipaq_EGPIO( SA1110_EIO_CF_RESET, SA1110_EIO_CF_RESET_DISABLE); + do_delay(5); // At least 20 ms + // Wait until the card is ready to talk + for (i = 0; i < 10; i++) { + ptr = 0; + if (cf_get_CIS(slot, CF_CISTPL_MANFID, buf, &len, &ptr)) { + diag_printf("Ready!\n"); + slot->state = CF_SLOT_STATE_Ready; + break; + } + do_delay(10); + } + } + } +} + +// +// Acknowledge interrupt (used in non-kernel environments) +// +void +cf_hwr_clear_interrupt(struct cf_slot *slot) +{ + // Clear interrupt [edge indication] + cyg_drv_interrupt_acknowledge(SA1110_CF_IRQ); +} diff --git a/packages/devs/serial/generic/16x5x/current/ChangeLog b/packages/devs/serial/generic/16x5x/current/ChangeLog --- a/packages/devs/serial/generic/16x5x/current/ChangeLog +++ b/packages/devs/serial/generic/16x5x/current/ChangeLog @@ -1,3 +1,33 @@ +2001-03-13 Jonathan Larmour + + * cdl/ser_generic_16x5x.cdl: Rename + CYGPKG_IO_SERIAL_GENERIC_16X5X_FIFO_OPTIONS to + CYGPKG_IO_SERIAL_GENERIC_16X5X_FIFO and make it a boolean. Clarify + descriptions a little. + + * src/ser_16x5x.c (serial_config_port): Only program FCR if FIFO + support requested. + Don't bother with intermediate _fifo_thresh. + Detabify. + +2001-03-13 Jesper Skov + + * cdl/ser_generic_16x5x.cdl: Removed the default value. + +2001-03-09 Julian Smart + Removed default value for flavor none in + CYGPKG_IO_SERIAL_GENERIC_16X5X_FIFO_OPTIONS since it + causes an assert in libcdl + +2001-03-05 Jesper Skov + 2001-02-15 Dave Airlie + + * src/ser_16x5x.c (serial_config_port): Add support for setting + a FIFO RX Threshold via CDL + + * cdl/ser_generic_16x5x.cdl: Add support for setting a FIFO + RX threshold via CDL + 2001-01-24 Dave Airlie * src/ser_16x5x.c (pc_serial_DSR): Allow RX timeouts to be interpreted diff --git a/packages/devs/serial/generic/16x5x/current/cdl/ser_generic_16x5x.cdl b/packages/devs/serial/generic/16x5x/current/cdl/ser_generic_16x5x.cdl --- a/packages/devs/serial/generic/16x5x/current/cdl/ser_generic_16x5x.cdl +++ b/packages/devs/serial/generic/16x5x/current/cdl/ser_generic_16x5x.cdl @@ -67,9 +67,29 @@ cdl_package CYGPKG_IO_SERIAL_GENERIC_16X puts $::cdl_header "#include CYGDAT_IO_SERIAL_GENERIC_16X5X_CFG"; } + cdl_component CYGPKG_IO_SERIAL_GENERIC_16X5X_FIFO { + display "16x5x FIFO support" + flavor bool + default_value 1 + description " + Options to configure the FIFO on a 16550 (or above) variant." + + cdl_option CYGPKG_IO_SERIAL_GENERIC_16X5X_FIFO_RX_THRESHOLD { + display "Threshold for RX interrupt on 16550 FIFO" + flavor data + legal_values { 14 8 4 1 } + default_value 1 + description " + This options configures the threshold value at which + the RX interrupt occurs when a FIFO is used. (16550 and + above only), this may be after 1, 4, 8 or 14 characters." + } + } + cdl_component CYGPKG_IO_SERIAL_GENERIC_16X5X_OPTIONS { display "Serial device driver build options" flavor none + description " Package specific build options including control over compiler flags used only in building this package, diff --git a/packages/devs/serial/generic/16x5x/current/src/ser_16x5x.c b/packages/devs/serial/generic/16x5x/current/src/ser_16x5x.c --- a/packages/devs/serial/generic/16x5x/current/src/ser_16x5x.c +++ b/packages/devs/serial/generic/16x5x/current/src/ser_16x5x.c @@ -223,7 +223,23 @@ serial_config_port(serial_channel *chan, HAL_WRITE_UINT8(base+REG_ldl, baud_divisor & 0xFF); HAL_WRITE_UINT8(base+REG_lcr, _lcr); if (init) { - HAL_WRITE_UINT8(base+REG_fcr, FCR_FE|FCR_CRF|FCR_CTF|FCR_RT1); // Enable and clear FIFO +#ifdef CYGPKG_IO_SERIAL_GENERIC_16X5X_FIFO + unsigned char _fcr_thresh; + + switch(CYGPKG_IO_SERIAL_GENERIC_16X5X_FIFO_RX_THRESHOLD) { + default: + case 1: + _fcr_thresh=FCR_RT1; break; + case 4: + _fcr_thresh=FCR_RT4; break; + case 8: + _fcr_thresh=FCR_RT8; break; + case 14: + _fcr_thresh=FCR_RT14; break; + } + _fcr_thresh|=FCR_FE|FCR_CRF|FCR_CTF; + HAL_WRITE_UINT8(base+REG_fcr, _fcr_thresh); // Enable and clear FIFO +#endif if (chan->out_cbuf.len != 0) { _ier = IER_RCV; } else { diff --git a/packages/devs/serial/mips/atlas/current/ChangeLog b/packages/devs/serial/mips/atlas/current/ChangeLog new file mode 100644 --- /dev/null +++ b/packages/devs/serial/mips/atlas/current/ChangeLog @@ -0,0 +1,36 @@ +2000-08-01 Jonathan Larmour + + * src/atlas_serial.c (atlas_serial_set_config): Now use keys to make + more flexible. + +2000-07-14 Drew Moseley + + * cdl/ser_mips_atlas.cdl: New file. Implement a serial driver for the mips Atlas board + * src/atlas_serial.c: Ditto. + * src/atlas_serial.h: Ditto. + +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//=========================================================================== diff --git a/packages/devs/serial/mips/atlas/current/cdl/ser_mips_atlas.cdl b/packages/devs/serial/mips/atlas/current/cdl/ser_mips_atlas.cdl new file mode 100644 --- /dev/null +++ b/packages/devs/serial/mips/atlas/current/cdl/ser_mips_atlas.cdl @@ -0,0 +1,150 @@ +# ==================================================================== +# +# ser_mips_atlas.cdl +# +# eCos serial MIPS/ATLAS configuration data +# +# ==================================================================== +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Red Hat eCos Public License +# Version 1.1 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://www.redhat.com/ +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Configurable Operating System, +# released September 30, 1998. +# +# The Initial Developer of the Original Code is Red Hat. +# Portions created by Red Hat are +# Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +# All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +# ==================================================================== +######DESCRIPTIONBEGIN#### +# +# Author(s): dmoseley +# Original data: gthomas +# Contributors: +# Date: 2000-06-23 +# +#####DESCRIPTIONEND#### +# +# ==================================================================== + + +cdl_package CYGPKG_IO_SERIAL_MIPS_ATLAS { + display "MIPS ATLAS serial device drivers" + + parent CYGPKG_IO_SERIAL_DEVICES + active_if CYGPKG_IO_SERIAL + active_if CYGPKG_HAL_MIPS_ATLAS + + requires CYGPKG_ERROR + include_dir cyg/io +# include_files ; # none _exported_ whatsoever + description " + This option enables the serial device drivers for the + MIPS ATLAS." + doc redirect/ecos-device-drivers.html + + compile -library=libextras.a atlas_serial.c + + define_proc { + puts $::cdl_system_header "/***** serial driver proc output start *****/" + puts $::cdl_system_header "#define CYGDAT_IO_SERIAL_DEVICE_HEADER " + puts $::cdl_system_header "/***** serial driver proc output end *****/" + } + +# FIXME: Bad name +cdl_option CYGPKG_IO_SERIAL_MIPS_ATLAS_POLLED_MODE { + display "MIPS ATLAS polled mode serial drivers" + flavor bool + default_value 0 + description " + If asserted, this option specifies that the serial device + drivers for the MIPS ATLAS should be polled-mode instead of + interrupt driven." +} + +cdl_component CYGPKG_IO_SERIAL_MIPS_ATLAS_SERIAL_A { + display "MIPS ATLAS serial port driver" + flavor bool + default_value 1 + description " + This option includes the serial device driver for the 16C550C on the + MIPS ATLAS." + + cdl_option CYGDAT_IO_SERIAL_MIPS_ATLAS_SERIAL_A_NAME { + display "Device name for MIPS ATLAS serial port" + flavor data + default_value {"\"/dev/ser0\""} + description " + This option specifies the device name on the MIPS ATLAS." + } + + cdl_option CYGNUM_IO_SERIAL_MIPS_ATLAS_SERIAL_A_BAUD { + display "Baud rate for the MIPS ATLAS serial port driver" + flavor data + legal_values { 50 75 110 "134_5" 150 200 300 600 1200 1800 2400 3600 + 4800 7200 9600 14400 19200 38400 57600 115200 234000 + } + default_value 38400 + description " + This option specifies the default baud rate (speed) for the + MIPS ATLAS 16c550c port." + } + + cdl_option CYGNUM_IO_SERIAL_MIPS_ATLAS_SERIAL_A_BUFSIZE { + display "Buffer size for the MIPS ATLAS serial port driver" + flavor data + legal_values 0 to 8192 + default_value 512 + description " + This option specifies the size of the internal buffers used + for the MIPS ATLAS 16c550c port." + } +} + + cdl_component CYGPKG_IO_SERIAL_MIPS_ATLAS_OPTIONS { + display "Serial device driver build options" + flavor none + description " + Package specific build options including control over + compiler flags used only in building this package, + and details of which tests are built." + + + cdl_option CYGPKG_IO_SERIAL_MIPS_ATLAS_CFLAGS_ADD { + display "Additional compiler flags" + flavor data + no_define + default_value { "" } + description " + This option modifies the set of compiler flags for + building these serial device drivers. These flags are used in addition + to the set of global flags." + } + + cdl_option CYGPKG_IO_SERIAL_MIPS_ATLAS_CFLAGS_REMOVE { + display "Suppressed compiler flags" + flavor data + no_define + default_value { "" } + description " + This option modifies the set of compiler flags for + building these serial device drivers. These flags are removed from + the set of global flags if present." + } + } +} + +# EOF ser_mips_atlas.cdl diff --git a/packages/devs/serial/mips/atlas/current/src/atlas_serial.c b/packages/devs/serial/mips/atlas/current/src/atlas_serial.c new file mode 100644 --- /dev/null +++ b/packages/devs/serial/mips/atlas/current/src/atlas_serial.c @@ -0,0 +1,364 @@ +//========================================================================== +// +// atlas_serial.c +// +// Serial device driver for ATLAS on-chip serial devices +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): dmoseley, based on POWERPC driver by jskov +// Contributors: gthomas, jskov, dmoseley +// Date: 2000-06-23 +// Purpose: ATLAS serial device driver +// Description: ATLAS serial device driver +// +// To Do: +// Put in magic to effectively use the FIFOs. Transmitter FIFO fill is a +// problem, and setting receiver FIFO interrupts to happen only after +// n chars may conflict with hal diag. +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include +#include + +#include +#include +#include +#include +#include + +#ifdef CYGPKG_IO_SERIAL_MIPS_ATLAS + +#include "atlas_serial.h" + +typedef struct atlas_serial_info { + CYG_ADDRWORD base; + CYG_WORD int_num; + cyg_interrupt serial_interrupt; + cyg_handle_t serial_interrupt_handle; + cyg_uint8 iir; +} atlas_serial_info; + +static bool atlas_serial_init(struct cyg_devtab_entry *tab); +static bool atlas_serial_putc(serial_channel *chan, unsigned char c); +static Cyg_ErrNo atlas_serial_lookup(struct cyg_devtab_entry **tab, + struct cyg_devtab_entry *sub_tab, + const char *name); +static unsigned char atlas_serial_getc(serial_channel *chan); +static Cyg_ErrNo atlas_serial_set_config(serial_channel *chan, cyg_uint32 key, + const void *xbuf, cyg_uint32 *len); +static void atlas_serial_start_xmit(serial_channel *chan); +static void atlas_serial_stop_xmit(serial_channel *chan); + +static cyg_uint32 atlas_serial_ISR(cyg_vector_t vector, cyg_addrword_t data); +static void atlas_serial_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data); + +static SERIAL_FUNS(atlas_serial_funs, + atlas_serial_putc, + atlas_serial_getc, + atlas_serial_set_config, + atlas_serial_start_xmit, + atlas_serial_stop_xmit + ); + +static atlas_serial_info atlas_serial_info0 ={ATLAS_SER_16550_BASE_A, + CYGNUM_HAL_INTERRUPT_SER}; + +#if CYGNUM_IO_SERIAL_MIPS_ATLAS_SERIAL_A_BUFSIZE > 0 +static unsigned char atlas_serial_out_buf0[CYGNUM_IO_SERIAL_MIPS_ATLAS_SERIAL_A_BUFSIZE]; +static unsigned char atlas_serial_in_buf0[CYGNUM_IO_SERIAL_MIPS_ATLAS_SERIAL_A_BUFSIZE]; + +static SERIAL_CHANNEL_USING_INTERRUPTS(atlas_serial_channel0, + atlas_serial_funs, + atlas_serial_info0, + CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_MIPS_ATLAS_SERIAL_A_BAUD), + CYG_SERIAL_STOP_DEFAULT, + CYG_SERIAL_PARITY_DEFAULT, + CYG_SERIAL_WORD_LENGTH_DEFAULT, + CYG_SERIAL_FLAGS_DEFAULT, + &atlas_serial_out_buf0[0], + sizeof(atlas_serial_out_buf0), + &atlas_serial_in_buf0[0], + sizeof(atlas_serial_in_buf0) + ); +#else +static SERIAL_CHANNEL(atlas_serial_channel0, + atlas_serial_funs, + atlas_serial_info0, + CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_MIPS_ATLAS_SERIAL_A_BAUD), + CYG_SERIAL_STOP_DEFAULT, + CYG_SERIAL_PARITY_DEFAULT, + CYG_SERIAL_WORD_LENGTH_DEFAULT, + CYG_SERIAL_FLAGS_DEFAULT + ); +#endif + +DEVTAB_ENTRY(atlas_serial_io0, + CYGDAT_IO_SERIAL_MIPS_ATLAS_SERIAL_A_NAME, + 0, // Does not depend on a lower level interface + &cyg_io_serial_devio, + atlas_serial_init, + atlas_serial_lookup, // Serial driver may need initializing + &atlas_serial_channel0 + ); + + + +// Internal function to actually configure the hardware to desired baud rate, etc. +static bool +atlas_serial_config_port(serial_channel *chan, cyg_serial_info_t *new_config, bool init) +{ + atlas_serial_info *atlas_chan = (atlas_serial_info *)chan->dev_priv; + cyg_addrword_t port = atlas_chan->base; + cyg_uint16 baud_divisor = select_baud[new_config->baud]; + cyg_uint8 _lcr, _ier; + + if (baud_divisor == 0) + return false; // Invalid baud rate selected + + // + // We may need to increase the timeout before causing a break reset. + // According to the Atlas Users Manual (Document MD00005) The BRKRES + // register will need to be programmed with a value larger that 0xA (the default) + // if we are going to use a baud rate lower than 2400. + // + if (new_config->baud <= CYGNUM_SERIAL_BAUD_2400) + { + // For now, just disable the break reset entirely. + HAL_WRITE_UINT32(HAL_ATLAS_BRKRES, 0); + } else { + // Put the break reset state back to the default + HAL_WRITE_UINT32(HAL_ATLAS_BRKRES, HAL_ATLAS_BRKRES_DEFAULT_VALUE); + } + + // Disable port interrupts while changing hardware + HAL_READ_UINT8(port+SER_16550_IER, _ier); + HAL_WRITE_UINT8(port+SER_16550_IER, 0); + + // Set databits, stopbits and parity. + _lcr = select_word_length[(new_config->word_length - + CYGNUM_SERIAL_WORD_LENGTH_5)] | + select_stop_bits[new_config->stop] | + select_parity[new_config->parity]; + HAL_WRITE_UINT8(port+SER_16550_LCR, _lcr); + + // Set baud rate. + _lcr |= LCR_DL; + HAL_WRITE_UINT8(port+SER_16550_LCR, _lcr); + HAL_WRITE_UINT8(port+SER_16550_DLM, baud_divisor >> 8); + HAL_WRITE_UINT8(port+SER_16550_DLL, baud_divisor & 0xff); + _lcr &= ~LCR_DL; + HAL_WRITE_UINT8(port+SER_16550_LCR, _lcr); + + if (init) { + // Enable and clear FIFO + HAL_WRITE_UINT8(port+SER_16550_FCR, + (FCR_ENABLE | FCR_CLEAR_RCVR | FCR_CLEAR_XMIT)); + + if (chan->out_cbuf.len != 0) { + HAL_WRITE_UINT8(port+SER_16550_IER, SIO_IER_ERDAI); + } else { + HAL_WRITE_UINT8(port+SER_16550_IER, 0); + } + } else { + HAL_WRITE_UINT8(port+SER_16550_IER, _ier); + } + if (new_config != &chan->config) { + chan->config = *new_config; + } + return true; +} + +// Function to initialize the device. Called at bootstrap time. +static bool +atlas_serial_init(struct cyg_devtab_entry *tab) +{ + serial_channel *chan = (serial_channel *)tab->priv; + atlas_serial_info *atlas_chan = (atlas_serial_info *)chan->dev_priv; +#ifdef CYGDBG_IO_INIT + diag_printf("ATLAS SERIAL init - dev: %x.%d\n", atlas_chan->base, atlas_chan->int_num); +#endif + (chan->callbacks->serial_init)(chan); // Really only required for interrupt driven devices + if (chan->out_cbuf.len != 0) { + cyg_drv_interrupt_create(atlas_chan->int_num, + 0, // can change IRQ0 priority + (cyg_addrword_t)chan, // Data item passed to interrupt handler + atlas_serial_ISR, + atlas_serial_DSR, + &atlas_chan->serial_interrupt_handle, + &atlas_chan->serial_interrupt); + cyg_drv_interrupt_attach(atlas_chan->serial_interrupt_handle); + cyg_drv_interrupt_unmask(atlas_chan->int_num); + } + atlas_serial_config_port(chan, &chan->config, true); + return true; +} + +// This routine is called when the device is "looked" up (i.e. attached) +static Cyg_ErrNo +atlas_serial_lookup(struct cyg_devtab_entry **tab, + struct cyg_devtab_entry *sub_tab, + const char *name) +{ + serial_channel *chan = (serial_channel *)(*tab)->priv; + (chan->callbacks->serial_init)(chan); // Really only required for interrupt driven devices + return ENOERR; +} + +// Send a character to the device output buffer. +// Return 'true' if character is sent to device +static bool +atlas_serial_putc(serial_channel *chan, unsigned char c) +{ + atlas_serial_info *atlas_chan = (atlas_serial_info *)chan->dev_priv; + cyg_addrword_t port = atlas_chan->base; + cyg_uint8 _lsr; + + HAL_READ_UINT8(port+SER_16550_LSR, _lsr); + if (_lsr & SIO_LSR_THRE) { + // Transmit buffer is empty + HAL_WRITE_UINT8(port+SER_16550_THR, c); + return true; + } else { + // No space + return false; + } +} + +// Fetch a character from the device input buffer, waiting if necessary +static unsigned char +atlas_serial_getc(serial_channel *chan) +{ + unsigned char c; + atlas_serial_info *atlas_chan = (atlas_serial_info *)chan->dev_priv; + cyg_addrword_t port = atlas_chan->base; + cyg_uint8 _lsr; + + do { + HAL_READ_UINT8(port+SER_16550_LSR, _lsr); + } while ((_lsr & SIO_LSR_DR) == 0); + HAL_READ_UINT8(port+SER_16550_RBR, c); + return c; +} + +// Set up the device characteristics; baud rate, etc. +static Cyg_ErrNo +atlas_serial_set_config(serial_channel *chan, cyg_uint32 key, + const void *xbuf, cyg_uint32 *len) +{ + switch (key) { + case CYG_IO_SET_CONFIG_SERIAL_INFO: + { + cyg_serial_info_t *config = (cyg_serial_info_t *)xbuf; + if ( *len < sizeof(cyg_serial_info_t) ) { + return -EINVAL; + } + *len = sizeof(cyg_serial_info_t); + if ( true != atlas_serial_config_port(chan, config, false) ) + return -EINVAL; + } + break; + default: + return -EINVAL; + } + return ENOERR; +} + +// Enable the transmitter on the device +static void +atlas_serial_start_xmit(serial_channel *chan) +{ + atlas_serial_info *atlas_chan = (atlas_serial_info *)chan->dev_priv; + cyg_addrword_t port = atlas_chan->base; + cyg_uint8 _ier; + + HAL_READ_UINT8(port+SER_16550_IER, _ier); + _ier |= IER_XMT; // Enable xmit interrupt + HAL_WRITE_UINT8(port+SER_16550_IER, _ier); + + // We should not need to call this here. THRE Interrupts are enabled, and the DSR + // below calls this function. However, sometimes we get called with Master Interrupts + // disabled, and thus the DSR never runs. This is unfortunate because it means we + // will be doing multiple processing steps for the same thing. + (chan->callbacks->xmt_char)(chan); +} + +// Disable the transmitter on the device +static void +atlas_serial_stop_xmit(serial_channel *chan) +{ + atlas_serial_info *atlas_chan = (atlas_serial_info *)chan->dev_priv; + cyg_addrword_t port = atlas_chan->base; + cyg_uint8 _ier; + + HAL_READ_UINT8(port+SER_16550_IER, _ier); + _ier &= ~IER_XMT; // Disable xmit interrupt + HAL_WRITE_UINT8(port+SER_16550_IER, _ier); +} + +// Serial I/O - low level interrupt handler (ISR) +static cyg_uint32 +atlas_serial_ISR(cyg_vector_t vector, cyg_addrword_t data) +{ + serial_channel *chan = (serial_channel *)data; + atlas_serial_info *atlas_chan = (atlas_serial_info *)chan->dev_priv; + + cyg_drv_interrupt_mask(atlas_chan->int_num); + cyg_drv_interrupt_acknowledge(atlas_chan->int_num); + return CYG_ISR_CALL_DSR; // Cause DSR to be run +} + +// Serial I/O - high level interrupt handler (DSR) +static void +atlas_serial_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data) +{ + serial_channel *chan = (serial_channel *)data; + atlas_serial_info *atlas_chan = (atlas_serial_info *)chan->dev_priv; + cyg_addrword_t port = atlas_chan->base; + cyg_uint8 _iir; + + HAL_READ_UINT8(port+SER_16550_IIR, _iir); + _iir &= SIO_IIR_ID_MASK; + if ( ISR_Tx_Empty == _iir ) { + (chan->callbacks->xmt_char)(chan); + } else if (( ISR_Rx_Avail == _iir ) || ( ISR_Rx_Char_Timeout == _iir )) { + cyg_uint8 _c; + HAL_READ_UINT8(port+SER_16550_RBR, _c); + (chan->callbacks->rcv_char)(chan, _c); + } + + cyg_drv_interrupt_unmask(atlas_chan->int_num); +} + +#endif + +//------------------------------------------------------------------------- +// EOF atlas_serial.c diff --git a/packages/devs/serial/mips/atlas/current/src/atlas_serial.h b/packages/devs/serial/mips/atlas/current/src/atlas_serial.h new file mode 100644 --- /dev/null +++ b/packages/devs/serial/mips/atlas/current/src/atlas_serial.h @@ -0,0 +1,205 @@ +//========================================================================== +// +// io/serial/mips/atlas/atlas_serial.h +// +// MIPS Atlas Serial I/O definitions. +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): dmoseley, based on PowerPC driver by jskov +// Contributors:gthomas, jskov, dmoseley +// Date: 2000-06-23 +// Purpose: Atlas Serial definitions +//####DESCRIPTIONEND#### +//========================================================================== + +// Description of serial ports on Atlas board + +// Interrupt Enable Register +#define IER_RCV 0x01 +#define IER_XMT 0x02 +#define IER_LS 0x04 +#define IER_MS 0x08 + +// Line Control Register +#define LCR_WL5 0x00 // Word length +#define LCR_WL6 0x01 +#define LCR_WL7 0x02 +#define LCR_WL8 0x03 +#define LCR_SB1 0x00 // Number of stop bits +#define LCR_SB1_5 0x04 // 1.5 -> only valid with 5 bit words +#define LCR_SB2 0x04 +#define LCR_PN 0x00 // Parity mode - none +#define LCR_PE 0x0C // Parity mode - even +#define LCR_PO 0x08 // Parity mode - odd +#define LCR_PM 0x28 // Forced "mark" parity +#define LCR_PS 0x38 // Forced "space" parity +#define LCR_DL 0x80 // Enable baud rate latch + +// Line Status Register +#define LSR_RSR 0x01 +#define LSR_THE 0x20 + +// Modem Control Register +#define MCR_DTR 0x01 +#define MCR_RTS 0x02 +#define MCR_INT 0x08 // Enable interrupts + +// Interrupt status register +#define ISR_None 0x01 +#define ISR_Rx_Line_Status 0x06 +#define ISR_Rx_Avail 0x04 +#define ISR_Rx_Char_Timeout 0x0C +#define ISR_Tx_Empty 0x02 +#define IRS_Modem_Status 0x00 + +// FIFO control register +#define FCR_ENABLE 0x01 +#define FCR_CLEAR_RCVR 0x02 +#define FCR_CLEAR_XMIT 0x04 + + +//////////////////////////////////////////////////////////// +// Clean this up. + +#define ATLAS_SER_16550_BASE_A 0xBF000900 +#define SER_16550_BASE ATLAS_SER_16550_BASE_A + +//----------------------------------------------------------------------------- +// Define the serial registers. The Atlas board is equipped with a 16550C +// serial chip. +#define SER_16550_RBR 0x00 // receiver buffer register, read, dlab = 0 +#define SER_16550_THR 0x00 // transmitter holding register, write, dlab = 0 +#define SER_16550_DLL 0x00 // divisor latch (LS), read/write, dlab = 1 +#define SER_16550_IER 0x08 // interrupt enable register, read/write, dlab = 0 +#define SER_16550_DLM 0x08 // divisor latch (MS), read/write, dlab = 1 +#define SER_16550_IIR 0x10 // interrupt identification reg, read, dlab = 0 +#define SER_16550_FCR 0x10 // fifo control register, write, dlab = 0 +#define SER_16550_AFR 0x10 // alternate function reg, read/write, dlab = 1 +#define SER_16550_LCR 0x18 // line control register, read/write +#define SER_16550_MCR 0x20 // modem control register, read/write +#define SER_16550_LSR 0x28 // line status register, read +#define SER_16550_MSR 0x30 // modem status register, read +#define SER_16550_SCR 0x38 // scratch pad register + +// The interrupt enable register bits. +#define SIO_IER_ERDAI 0x01 // enable received data available irq +#define SIO_IER_ETHREI 0x02 // enable THR empty interrupt +#define SIO_IER_ELSI 0x04 // enable receiver line status irq +#define SIO_IER_EMSI 0x08 // enable modem status interrupt + +// The interrupt identification register bits. +#define SIO_IIR_IP 0x01 // 0 if interrupt pending +#define SIO_IIR_ID_MASK 0x0e // mask for interrupt ID bits + +// The line status register bits. +#define SIO_LSR_DR 0x01 // data ready +#define SIO_LSR_OE 0x02 // overrun error +#define SIO_LSR_PE 0x04 // parity error +#define SIO_LSR_FE 0x08 // framing error +#define SIO_LSR_BI 0x10 // break interrupt +#define SIO_LSR_THRE 0x20 // transmitter holding register empty +#define SIO_LSR_TEMT 0x40 // transmitter register empty +#define SIO_LSR_ERR 0x80 // any error condition + +// The modem status register bits. +#define SIO_MSR_DCTS 0x01 // delta clear to send +#define SIO_MSR_DDSR 0x02 // delta data set ready +#define SIO_MSR_TERI 0x04 // trailing edge ring indicator +#define SIO_MSR_DDCD 0x08 // delta data carrier detect +#define SIO_MSR_CTS 0x10 // clear to send +#define SIO_MSR_DSR 0x20 // data set ready +#define SIO_MSR_RI 0x40 // ring indicator +#define SIO_MSR_DCD 0x80 // data carrier detect + +// The line control register bits. +#define SIO_LCR_WLS0 0x01 // word length select bit 0 +#define SIO_LCR_WLS1 0x02 // word length select bit 1 +#define SIO_LCR_STB 0x04 // number of stop bits +#define SIO_LCR_PEN 0x08 // parity enable +#define SIO_LCR_EPS 0x10 // even parity select +#define SIO_LCR_SP 0x20 // stick parity +#define SIO_LCR_SB 0x40 // set break +#define SIO_LCR_DLAB 0x80 // divisor latch access bit + +// The FIFO control register +#define SIO_FCR_FCR0 0x01 // enable xmit and rcvr fifos +#define SIO_FCR_FCR1 0x02 // clear RCVR FIFO +#define SIO_FCR_FCR2 0x04 // clear XMIT FIFO +///////////////////////////////////////// + + +static unsigned char select_word_length[] = { + LCR_WL5, // 5 bits / word (char) + LCR_WL6, + LCR_WL7, + LCR_WL8 +}; + +static unsigned char select_stop_bits[] = { + 0, + LCR_SB1, // 1 stop bit + LCR_SB1_5, // 1.5 stop bit + LCR_SB2 // 2 stop bits +}; + +static unsigned char select_parity[] = { + LCR_PN, // No parity + LCR_PE, // Even parity + LCR_PO, // Odd parity + LCR_PM, // Mark parity + LCR_PS, // Space parity +}; + +// FIXME: calc all properly +// The Atlas board has a 3.6864 MHz crystal +static unsigned short select_baud[] = { + 0, // Unused + 0, // 50 + 0, // 75 + 2094, // 110 + 0, // 134.5 + 1536, // 150 + 0, // 200 + 768, // 300 + 384, // 600 + 192, // 1200 + 0, // 1800 + 96, // 2400 + 0, // 3600 + 48, // 4800 + 32, // 7200 + 24, // 9600 + 16, // 14400 + 12, // 19200 + 6, // 38400 + 4, // 57600 + 2, // 115200 + 1, // 230400 +}; + diff --git a/packages/devs/serial/sh/scif/current/ChangeLog b/packages/devs/serial/sh/scif/current/ChangeLog --- a/packages/devs/serial/sh/scif/current/ChangeLog +++ b/packages/devs/serial/sh/scif/current/ChangeLog @@ -1,3 +1,7 @@ +2001-02-27 Jesper Skov + + * src/sh_scif_serial.c (sh3_scif_er_DSR): Clear break flag. + 2001-02-26 Jesper Skov * src/sh_scif_serial.c (sh3_scif_er_DSR): Enable interrupts on diff --git a/packages/devs/serial/sh/scif/current/src/sh_scif_serial.c b/packages/devs/serial/sh/scif/current/src/sh_scif_serial.c --- a/packages/devs/serial/sh/scif/current/src/sh_scif_serial.c +++ b/packages/devs/serial/sh/scif/current/src/sh_scif_serial.c @@ -845,8 +845,7 @@ sh3_scif_er_DSR(cyg_vector_t vector, cyg #endif } if (_ssr & CYGARC_REG_SCSSR2_BRK) { - // don't bother clearing - it will be set immediately anyway - // _ssr2 &= ~CYGARC_REG_SCSSR2_BRK; + _ssr2 &= ~CYGARC_REG_SCSSR2_BRK; #ifdef CYGOPT_IO_SERIAL_SUPPORT_LINE_STATUS stat.which = CYGNUM_SERIAL_STATUS_BREAK; (chan->callbacks->indicate_status)(chan, &stat ); diff --git a/packages/devs/serial/v85x/v850/current/ChangeLog b/packages/devs/serial/v85x/v850/current/ChangeLog --- a/packages/devs/serial/v85x/v850/current/ChangeLog +++ b/packages/devs/serial/v85x/v850/current/ChangeLog @@ -1,3 +1,15 @@ +2001-03-21 Jonathan Larmour + + * cdl/ser_v85x_v850.cdl: Default driver on if CYGPKG_IO_SERIAL_DEVICES + enabled - like other drivers. + Descriptions should not be specific to SA1. + + * src/v85x_v850_serial.h: Generate baud table dependent on CPU + frequency always. + * src/v85x_v850_serial.c (v850_serial_config_port): Normalize + baud settings from above table before setting. + (v850_serial_putc): Silence warning. + 2000-10-12 Jesper Skov * cdl/ser_v85x_v850.cdl: Moved testing parameters here. @@ -61,7 +73,7 @@ 2000-05-28 Gary Thomas #include #include +#ifdef CYGPKG_KERNEL #include +#endif #include CYGBLD_HAL_TARGET_H #include @@ -144,7 +146,7 @@ v850_serial_config_port(serial_channel * unsigned char parity = select_parity[new_config->parity]; unsigned char word_length = select_word_length[new_config->word_length-CYGNUM_SERIAL_WORD_LENGTH_5]; unsigned char stop_bits = select_stop_bits[new_config->stop]; - int mode, count; + int divisor, count; if ((select_baud[new_config->baud].count == 0) || (word_length == 0xFF) || @@ -153,19 +155,21 @@ v850_serial_config_port(serial_channel * return false; // Unsupported configuration } port->asim = ASIM_TxRx_Tx | ASIM_TxRx_Rx | parity | word_length | stop_bits; - mode = select_baud[new_config->baud].mode + 1; count = select_baud[new_config->baud].count; + divisor = select_baud[new_config->baud].divisor; + while (count > 0xFF) { count >>= 1; - mode++; + divisor++; } + port->brgc = count; -#if CYGINT_HAL_V85X_VARIANT_SB1 - port->brgm = mode & 0x07; - port->brgm1 = mode >> 3; -#else - port->brgm = mode; + + port->brgm = divisor & 0x07; +#if CYGINT_HAL_V850_VARIANT_SB1 + port->brgm1 = divisor >> 3; #endif + if (new_config != &chan->config) { chan->config = *new_config; } @@ -256,6 +260,7 @@ v850_serial_putc(serial_channel *chan, u #ifdef CYGVAR_KERNEL_COUNTERS_CLOCK cyg_alarm_initialize(v850_chan->tx_timeout_handle, cyg_current_time()+10, 0); #endif + return true; } else { return false; // Couldn't send, tx was busy } @@ -342,3 +347,5 @@ v850_serial_DSR(cyg_vector_t vector, cyg cyg_drv_interrupt_unmask(vector); } #endif + +// EOF v85x_v850_serial.c diff --git a/packages/devs/serial/v85x/v850/current/src/v85x_v850_serial.h b/packages/devs/serial/v85x/v850/current/src/v85x_v850_serial.h --- a/packages/devs/serial/v85x/v850/current/src/v85x_v850_serial.h +++ b/packages/devs/serial/v85x/v850/current/src/v85x_v850_serial.h @@ -26,7 +26,7 @@ // // The Initial Developer of the Original Code is Red Hat. // Portions created by Red Hat are -// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. // All Rights Reserved. // ------------------------------------------- // @@ -35,8 +35,8 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): gthomas -// Contributors: gthomas -// Date: 2000-03-31 +// Contributors: gthomas,jlarmour +// Date: 2001-03-21 // Purpose: Internal interfaces for serial I/O drivers // Description: // @@ -64,7 +64,7 @@ struct serial_port { unsigned char _filler4[5]; unsigned char brgm; // Baud rate mode unsigned char _filler5; -#if CYGINT_HAL_V85X_VARIANT_SB1 +#if CYGINT_HAL_V850_VARIANT_SB1 unsigned char _filler6[0x10]; unsigned char brgm1; // Baud rate overflow #endif @@ -122,59 +122,35 @@ static unsigned char select_parity[] = { }; static struct v850_baud { - unsigned char count; - unsigned char mode; + unsigned int count; + unsigned int divisor; } select_baud[] = { -#if CYGINT_HAL_V85X_VARIANT_SB1 // Baud rate values, using defined system clock -#define BAUD_COUNT (CYGHWR_HAL_V85X_V850_BOARD_FREQUENCY/2)/19200 - {0, 0}, // Unused - {0, 0}, // 50 - {0, 0}, // 75 - {0, 0}, // 110 - {0, 0}, // 134.5 - {0, 0}, // 150 - {0, 0}, // 200 - {0, 0}, // 300 - {0, 0}, // 600 - {BAUD_COUNT, 5}, // 1200 - {0, 0}, // 1800 - {BAUD_COUNT, 4}, // 2400 - {0, 0}, // 3600 - {BAUD_COUNT, 3}, // 4800 - {0, 0}, // 7200 - {BAUD_COUNT, 2}, // 9600 - {0, 0}, // 14400 - {BAUD_COUNT, 1}, // 19200 - {BAUD_COUNT, 0}, // 38400 - {0, 0}, // 57600 - {0, 0}, // 115200 - {0, 0}, // 230400 -#else -// Baud rate values, based on raw 17MHz clock - {0, 0}, // Unused - {0, 0}, // 50 - {0, 0}, // 75 - {0, 0}, // 110 - {0, 0}, // 134.5 - {0, 0}, // 150 - {0, 0}, // 200 - {0, 0}, // 300 - {0, 0}, // 600 - {221, 5}, // 1200 - {0, 0}, // 1800 - {221, 4}, // 2400 - {0, 0}, // 3600 - {221, 3}, // 4800 - {0, 0}, // 7200 - {221, 2}, // 9600 - {0, 0}, // 14400 - {221, 1}, // 19200 - {221, 0}, // 38400 - {0, 0}, // 57600 - {0, 0}, // 115200 - {0, 0}, // 230400 -#endif +#define BAUDCOUNT(X) ((CYGHWR_HAL_V85X_CPU_FREQ/2)/(X)) + {0, 0}, // Unused + {0, 0}, // 50 + {0, 0}, // 75 + {0, 0}, // 110 + {0, 0}, // 134.5 + {0, 0}, // 150 + {0, 0}, // 200 + {0, 0}, // 300 + {0, 0}, // 600 + {BAUDCOUNT(1200), 1}, // 1200 + {0, 0}, // 1800 + {BAUDCOUNT(2400), 1}, // 2400 + {0, 0}, // 3600 + {BAUDCOUNT(4800), 1}, // 4800 + {0, 0}, // 7200 + {BAUDCOUNT(9600), 1}, // 9600 + {0, 0}, // 14400 + {BAUDCOUNT(19200), 1}, // 19200 + {BAUDCOUNT(38400), 1}, // 38400 + {0, 0}, // 57600 + {0, 0}, // 115200 + {0, 0}, // 230400 }; #endif // CYGONCE_V85X_V850_SERIAL_H + +// EOF v85x_v850_serial.h diff --git a/packages/devs/touch/arm/ipaq/current/ChangeLog b/packages/devs/touch/arm/ipaq/current/ChangeLog new file mode 100644 --- /dev/null +++ b/packages/devs/touch/arm/ipaq/current/ChangeLog @@ -0,0 +1,38 @@ +2001-03-06 Gary Thomas + + * src/ipaq_ts.c: Fully interrupt driven mode, including select() + support. Note: scaling for the touch screen is self calibrating. + + * cdl/touch_ipaq.cdl: Remove unused option for repeat interval. + Repeat is automatic from the Atmel micro-controller. + +2001-03-05 Gary Thomas + + * src/ipaq_ts.c: + * cdl/touch_ipaq.cdl: New file(s). iPAQ touch screen driver. + +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//=========================================================================== diff --git a/packages/devs/touch/arm/ipaq/current/cdl/touch_ipaq.cdl b/packages/devs/touch/arm/ipaq/current/cdl/touch_ipaq.cdl new file mode 100644 --- /dev/null +++ b/packages/devs/touch/arm/ipaq/current/cdl/touch_ipaq.cdl @@ -0,0 +1,87 @@ +#========================================================================== +# +# touch_ipaq.cdl +# +# eCos configuration data for the Compaq iPAQ touchscreen +# +#========================================================================== +#####COPYRIGHTBEGIN#### +# +# The contents of this file are subject to the Red Hat eCos Public License +# Version 1.1 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://www.redhat.com/ +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Configurable Operating System, +# released September 30, 1998. +# +# The Initial Developer of the Original Code is Red Hat. +# Portions created by Red Hat are +# Copyright (C) 2001 Red Hat, Inc. +# All Rights Reserved. +# +#####COPYRIGHTEND#### +#========================================================================== +######DESCRIPTIONBEGIN#### +# +# Author(s): gthomas +# Contributors: gthomas +# Date: 2001-03-05 +# Purpose: +# Description: Touchscreen drivers for Compaq iPAQ +# +#####DESCRIPTIONEND#### +# +#========================================================================== + +cdl_package CYGPKG_DEVS_TOUCH_IPAQ { + display "Touch screen driver for iPAQ" + include_dir cyg/io + requires CYGPKG_IO + requires CYGFUN_KERNEL_API_C + requires CYGPKG_HAL_ARM_SA11X0_IPAQ + active_if !CYGSEM_IPAQ_LCD_COMM + + compile -library=libextras.a ipaq_ts.c + + description "Touch screen driver for the iPAQ using the Atmel micro-controller" + + cdl_component CYGPKG_DEVS_TOUCH_IPAQ_OPTIONS { + display "options" + flavor none + no_define + + cdl_option CYGPKG_DEVS_TOUCH_IPAQ_CFLAGS { + display "Additional compiler flags" + flavor data + no_define + default_value { "" } + description " + This option modifies the set of compiler flags for + building the touchscreen driver package. These flags + are used in addition to the set of global flags." + } + + cdl_option CYGDAT_DEVS_TOUCH_IPAQ_NAME { + display "Device name for the touch screen driver" + flavor data + default_value {"\"/dev/ts\""} + description " This option specifies the name of the touch screen device" + } + + cdl_option CYGNUM_DEVS_TOUCH_IPAQ_EVENT_BUFFER_SIZE { + display "Number of events the driver can buffer" + flavor data + default_value { 32 } + description " + This option defines the size of the touchscreen device internal + buffer. The cyg_io_read() function will return as many of these + as there is space for in the buffer passed." + } + } +} diff --git a/packages/devs/touch/arm/ipaq/current/src/ipaq_ts.c b/packages/devs/touch/arm/ipaq/current/src/ipaq_ts.c new file mode 100644 --- /dev/null +++ b/packages/devs/touch/arm/ipaq/current/src/ipaq_ts.c @@ -0,0 +1,274 @@ +//========================================================================== +// +// ipaq_ts.c +// +// Touchscreen driver for the Compaq iPAQ +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 2001 Red Hat, Inc. +// All Rights Reserved. +//------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 2001-03-05 +// Purpose: +// Description: Touchscreen driver for Compaq IPAQ +// +//####DESCRIPTIONEND#### +// +//========================================================================== + + +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include // For select() functionality +static cyg_selinfo ts_select_info; +static cyg_bool ts_select_active; + +#include +#include + +// Functions in this module + +static Cyg_ErrNo ts_read(cyg_io_handle_t handle, + void *buffer, + cyg_uint32 *len); +static cyg_bool ts_select(cyg_io_handle_t handle, + cyg_uint32 which, + cyg_addrword_t info); +static Cyg_ErrNo ts_set_config(cyg_io_handle_t handle, + cyg_uint32 key, + const void *buffer, + cyg_uint32 *len); +static Cyg_ErrNo ts_get_config(cyg_io_handle_t handle, + cyg_uint32 key, + void *buffer, + cyg_uint32 *len); +static bool ts_init(struct cyg_devtab_entry *tab); +static Cyg_ErrNo ts_lookup(struct cyg_devtab_entry **tab, + struct cyg_devtab_entry *st, + const char *name); + +CHAR_DEVIO_TABLE(ipaq_ts_handlers, + NULL, // Unsupported write() function + ts_read, + ts_select, + ts_get_config, + ts_set_config); + +CHAR_DEVTAB_ENTRY(ipaq_ts_device, + CYGDAT_DEVS_TOUCH_IPAQ_NAME, + NULL, // Base device name + &ipaq_ts_handlers, + ts_init, + ts_lookup, + NULL); // Private data pointer + +struct _event { + short button_state; + short xPos, yPos; + short _unused; +}; +#define MAX_EVENTS CYGNUM_DEVS_TOUCH_IPAQ_EVENT_BUFFER_SIZE +static int num_events; +static int _event_put, _event_get; +static bool pen_down = false; +static struct _event _events[MAX_EVENTS]; + +static bool _is_open = false; +#ifdef DEBUG_RAW_EVENTS +static unsigned char _ts_buf[512]; +static int _ts_buf_ptr = 0; +#endif + +// +// Note: this routine is called from the Atmel processing DSR +// +static void +ts_handler(atmel_pkt *pkt) +{ + unsigned char *dp = pkt->data; + static short lastX, lastY; + short x, y; + struct _event *ev; + +#ifdef DEBUG_RAW_EVENTS + memcpy(&_ts_buf[_ts_buf_ptr], pkt->data, 8); + _ts_buf_ptr += 8; + if (_ts_buf_ptr == 512) { + diag_printf("TS handler\n"); + diag_dump_buf(_ts_buf, 512); + _ts_buf_ptr = 0; + } +#endif + // Try and interpret the mouse data + if ((dp[0] & 0x0F) == 0) { + // This is a pen up event + x = lastX; + y = lastY; + pen_down = false; + } else { + // Some sort of event with the pen down + x = lastX = (dp[1] << 8) | dp[2]; + y = lastY = (dp[3] << 8) | dp[4]; + pen_down = true; + } + if (num_events < MAX_EVENTS) { + num_events++; + ev = &_events[_event_put++]; + if (_event_put == MAX_EVENTS) { + _event_put = 0; + } + ev->button_state = pen_down ? 0x04 : 0x00; + ev->xPos = x; + ev->yPos = y; + if (ts_select_active) { + ts_select_active = false; + cyg_selwakeup(&ts_select_info); + } + } +} + +typedef struct { + short min; + short max; + short span; +} bounds; + +static bounds xBounds = {1024, 0, 1024}; +static bounds yBounds = {1024, 0, 1024}; + +static Cyg_ErrNo +ts_read(cyg_io_handle_t handle, + void *buffer, + cyg_uint32 *len) +{ + struct _event *ev; + int tot = *len; + unsigned char *bp = (unsigned char *)buffer; + + cyg_scheduler_lock(); // Prevent interaction with DSR code + while (tot >= sizeof(struct _event)) { + if (num_events > 0) { + ev = &_events[_event_get++]; + if (_event_get == MAX_EVENTS) { + _event_get = 0; + } + // Self calibrate + if (ev->xPos > xBounds.max) xBounds.max = ev->xPos; + if (ev->xPos < xBounds.min) xBounds.min = ev->xPos; + if (ev->yPos > yBounds.max) yBounds.max = ev->yPos; + if (ev->yPos < yBounds.min) yBounds.min = ev->yPos; + if ((xBounds.span = xBounds.max - xBounds.min) <= 1) { + xBounds.span = 1; + } + if ((yBounds.span = yBounds.max - yBounds.min) <= 1) { + yBounds.span = 1; + } + // Scale values - done here so these potentially lengthy + // operations take place outside of interrupt processing + ev->xPos = ((xBounds.max - ev->xPos) * 320) / xBounds.span; + ev->yPos = ((yBounds.max - ev->yPos) * 240) / yBounds.span; + memcpy(bp, ev, sizeof(*ev)); + bp += sizeof(*ev); + tot -= sizeof(*ev); + num_events--; + } else { + break; // No more events + } + } + cyg_scheduler_unlock(); // Allow DSRs again + *len -= tot; + return ENOERR; +} + +static cyg_bool +ts_select(cyg_io_handle_t handle, + cyg_uint32 which, + cyg_addrword_t info) +{ + if (which == CYG_FREAD) { + cyg_scheduler_lock(); // Prevent interaction with DSR code + if (num_events > 0) { + cyg_scheduler_unlock(); // Reallow interaction with DSR code + return true; + } + if (!ts_select_active) { + ts_select_active = true; + cyg_selrecord(info, &ts_select_info); + } + cyg_scheduler_unlock(); // Reallow interaction with DSR code + } + return false; +} + +static Cyg_ErrNo +ts_set_config(cyg_io_handle_t handle, + cyg_uint32 key, + const void *buffer, + cyg_uint32 *len) +{ + return EINVAL; +} + +static Cyg_ErrNo +ts_get_config(cyg_io_handle_t handle, + cyg_uint32 key, + void *buffer, + cyg_uint32 *len) +{ + return EINVAL; +} + +static bool +ts_init(struct cyg_devtab_entry *tab) +{ + cyg_selinit(&ts_select_info); + return true; +} + +static Cyg_ErrNo +ts_lookup(struct cyg_devtab_entry **tab, + struct cyg_devtab_entry *st, + const char *name) +{ + if (!_is_open) { + _is_open = true; + atmel_register(ATMEL_CMD_TOUCH, ts_handler); + atmel_interrupt_mode(true); + } + return ENOERR; +} diff --git a/packages/devs/usb/sa11x0/current/doc/makefile b/packages/devs/usb/sa11x0/current/doc/makefile new file mode 100644 --- /dev/null +++ b/packages/devs/usb/sa11x0/current/doc/makefile @@ -0,0 +1,46 @@ +#============================================================================= +# +# makefile +# +# For building the SA11x0 USB device driver documentation +# +#============================================================================= +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Red Hat eCos Public License +# Version 1.1 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://www.redhat.com/ +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Configurable Operating System, +# released September 30, 1998. +# +# The Initial Developer of the Original Code is Red Hat. +# Portions created by Red Hat are +# Copyright (C) 2001 Red Hat, Inc. +# All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +#============================================================================= +#####DESCRIPTIONBEGIN#### +# +# Author(s): bartv +# Date: 2001-01-11 +#####DESCRIPTIONEND#### +#============================================================================= + +TOPLEVEL := ../../../../.. +MAIN_SGML := usbs_sa11x0.sgml +MAIN_HTML := devs-usb-sa11x0.html +MAIN_PDF := devs-usb-sa11x0.pdf +OTHER_SGML := +PICTURES := + +include $(TOPLEVEL)/pkgconf/rules.doc diff --git a/packages/devs/wallclock/sh3/current/ChangeLog b/packages/devs/wallclock/sh3/current/ChangeLog --- a/packages/devs/wallclock/sh3/current/ChangeLog +++ b/packages/devs/wallclock/sh3/current/ChangeLog @@ -1,3 +1,7 @@ +2001-03-20 Jesper Skov + + * src/wallclock_sh3.cxx: Don't include kernel config. + 2000-05-26 Jesper Skov * cdl/wallclock_sh3.cdl: CYGSEM_WALLCLOCK_SET_GET_MODE moved to IO diff --git a/packages/devs/wallclock/sh3/current/src/wallclock_sh3.cxx b/packages/devs/wallclock/sh3/current/src/wallclock_sh3.cxx --- a/packages/devs/wallclock/sh3/current/src/wallclock_sh3.cxx +++ b/packages/devs/wallclock/sh3/current/src/wallclock_sh3.cxx @@ -40,7 +40,6 @@ // //========================================================================== -#include // Kernel config #include // Wallclock device config #include // IO macros diff --git a/packages/devs/watchdog/arm/sa11x0/current/ChangeLog b/packages/devs/watchdog/arm/sa11x0/current/ChangeLog new file mode 100644 --- /dev/null +++ b/packages/devs/watchdog/arm/sa11x0/current/ChangeLog @@ -0,0 +1,41 @@ +2001-02-28 Hugo Tyson + + * src/watchdog_sa11x0.cxx: New file. + * cdl/watchdog_sa11x0.cdl: New file. + Copied from those referred to below. + +2000-05-31 Jesper Skov + + * cdl/watchdog_ebsa285.cdl: + * src/watchdog_ebsa285.cxx: + Driver moved to devs/watchdog/arm/ebsa285. Stripped out + unrelated ChangeLog entries. + +1999-08-27 Jesper Skov + + * src/ebsa285.cxx: + Added watchdog device for 21285. + +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### diff --git a/packages/devs/watchdog/arm/sa11x0/current/cdl/watchdog_sa11x0.cdl b/packages/devs/watchdog/arm/sa11x0/current/cdl/watchdog_sa11x0.cdl new file mode 100644 --- /dev/null +++ b/packages/devs/watchdog/arm/sa11x0/current/cdl/watchdog_sa11x0.cdl @@ -0,0 +1,93 @@ +# ==================================================================== +# +# watchdog_sa11x0.cdl +# +# eCos watchdog for ARM/SA11X0 driver configuration data +# +# ==================================================================== +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Red Hat eCos Public License +# Version 1.1 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://www.redhat.com/ +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Configurable Operating System, +# released September 30, 1998. +# +# The Initial Developer of the Original Code is Red Hat. +# Portions created by Red Hat are +# Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +# All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +# ==================================================================== +######DESCRIPTIONBEGIN#### +# +# Author(s): jskov +# Contributors: hmt, jskov +# Date: 2001-02-27 +# +#####DESCRIPTIONEND#### +# +# ==================================================================== + +cdl_package CYGPKG_DEVICES_WATCHDOG_ARM_SA11X0 { + parent CYGPKG_IO_WATCHDOG + active_if CYGPKG_IO_WATCHDOG + display "SA11X0 watchdog driver" + requires CYGPKG_HAL_ARM_SA11X0 + requires CYGPKG_KERNEL + hardware + compile watchdog_sa11x0.cxx + implements CYGINT_WATCHDOG_HW_IMPLEMENTATIONS + implements CYGINT_WATCHDOG_RESETS_ON_TIMEOUT + active_if CYGIMP_WATCHDOG_HARDWARE + + cdl_option CYGIMP_WATCHDOG_HARDWARE { + parent CYGPKG_IO_WATCHDOG_IMPLEMENTATION + display "Hardware watchdog" + default_value 1 + implements CYGINT_WATCHDOG_IMPLEMENTATIONS + } + + cdl_component CYGPKG_DEVICES_WATCHDOG_ARM_SA11X0_OPTIONS { + display "SA11X0 watchdog build options" + flavor none + description " + Package specific build options including control over + compiler flags used only in building this package, + and details of which tests are built." + + + cdl_option CYGPKG_DEVICES_WATCHDOG_ARM_SA11X0_CFLAGS_ADD { + display "Additional compiler flags" + flavor data + no_define + default_value { "" } + description " + This option modifies the set of compiler flags for + building the watchdog device. These flags are used in addition + to the set of global flags." + } + + cdl_option CYGPKG_DEVICES_WATCHDOG_ARM_SA11X0_CFLAGS_REMOVE { + display "Suppressed compiler flags" + flavor data + no_define + default_value { "" } + description " + This option modifies the set of compiler flags for + building the watchdog device. These flags are removed from + the set of global flags if present." + } + + } +} diff --git a/packages/devs/watchdog/arm/sa11x0/current/src/watchdog_sa11x0.cxx b/packages/devs/watchdog/arm/sa11x0/current/src/watchdog_sa11x0.cxx new file mode 100644 --- /dev/null +++ b/packages/devs/watchdog/arm/sa11x0/current/src/watchdog_sa11x0.cxx @@ -0,0 +1,138 @@ +//========================================================================== +// +// watchdog/sa11x0.cxx +// +// Watchdog implementation for StrongARM SA11x0s +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): hmt, jskov (based on the MN10300 watchdog code by nickg) +// Contributors: jskov, nickg +// Date: 2001-02-27 +// Purpose: Watchdog class implementation +// Description: Contains an implementation of the Watchdog class for use +// with the SA11X0 hardware watchdog timer. +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include // system configuration file +#include // configuration for this package +#include // kernel config + +#include // tracing macros +#include // instrumentation + +#include // IO register access +#include // Interrupts +#include // IO registers per se + +#include // watchdog API + +// ------------------------------------------------------------------------- +// SA11x0 watchdog works by enabling the watchdog (duh!) which means that +// when OS Timer Match Register #3 "OSMR3" compares equal to the 3.6864MHz +// clock in OSCR, then the system resets. +// +// To stay ahead of this, we must repeatedly set OSMR3 to OSCR + K where K +// is the watchdog timeout. This REQUIRES that the OSCR be freerunning. +// +// OSCR runs at 3.6864MHz, so one second is 3686400 ticks. +// +// The match register is 32 bits, and wraps as an int32 does (the +// comparison is exact, so you don't need to take special care.) So we can +// literally do the addition in the obvious way. + +#define WATCHDOG_TIMER_TICKS 3686400 +#define WATCHDOG_RESOLUTION (1000000000) + +// ------------------------------------------------------------------------- +// Constructor + +void +Cyg_Watchdog::init_hw(void) +{ + CYG_REPORT_FUNCTION(); + + // HW doesn't need init + + resolution = WATCHDOG_RESOLUTION; + + CYG_REPORT_RETURN(); +} + + + +// ------------------------------------------------------------------------- +// Start the watchdog running. + +void +Cyg_Watchdog::start(void) +{ + int old; + CYG_REPORT_FUNCTION(); + + HAL_DISABLE_INTERRUPTS( old ); + + // Init the watchdog timer. + *SA11X0_OSMR3 = *SA11X0_OSCR + WATCHDOG_TIMER_TICKS; + *SA11X0_OSSR = SA11X0_OSSR_TIMER3; // Ack any pending intr + *SA11X0_OIER |= SA11X0_OIER_TIMER3; // Enable interrupt is necessary + + CYG_ASSERT( *SA11X0_OSCR < *SA11X0_OSMR3 || + *SA11X0_OSMR3 <= WATCHDOG_TIMER_TICKS, "Watchdog wierdness" ); + + // Enable the watchdog. + *SA11X0_OWER = SA11X0_OWER_ENABLE; + + HAL_RESTORE_INTERRUPTS( old ); + + CYG_REPORT_RETURN(); +} + +// ------------------------------------------------------------------------- +// Reset watchdog timer. This needs to be called regularly to prevent +// the watchdog firing. + +void +Cyg_Watchdog::reset() +{ + CYG_REPORT_FUNCTION(); + + *SA11X0_OSMR3 = *SA11X0_OSCR + WATCHDOG_TIMER_TICKS; + + CYG_ASSERT( *SA11X0_OSCR < *SA11X0_OSMR3 || + *SA11X0_OSMR3 <= WATCHDOG_TIMER_TICKS, "Watchdog wierdness" ); + + CYG_REPORT_RETURN(); +} + + +// ------------------------------------------------------------------------- +// EOF watchdog_sa11x0.cxx diff --git a/packages/ecos.db b/packages/ecos.db --- a/packages/ecos.db +++ b/packages/ecos.db @@ -105,6 +105,16 @@ package CYGPKG_DEVS_PCMCIA_ASSABET { and Compact Flash devices on the SA11x0/Assabet board." } +package CYGPKG_DEVS_PCMCIA_IPAQ { + alias { "SA11x0/iPAQ PCMCIA & Compact Flash support" pcmcia_ipaq ipaq_pcmcia ipaq_cf io_ipaq_pcmcia} + directory devs/pcmcia/arm/ipaq + script pcmcia_ipaq.cdl + hardware + description " + This package contains hardware support for PCMCIA + and Compact Flash devices on the Compaq iPAQ pocket PC." +} + package CYGPKG_IO_FLASH { alias { "Generic FLASH memory support" flash } directory io/flash @@ -152,6 +162,25 @@ package CYGPKG_DEVS_FLASH_ARM_PID { on the ARM PID platform." } +package CYGPKG_DEVS_FLASH_AMD_AM29F040B { + alias { "Support for AMD AM29F040B flash memory" flash_amd_am29f040b } + directory devs/flash/amd/am29f040b + script flash_amd_am29f040b.cdl + hardware + description " + This package contains hardware support for AMD AM29F040B + flash memory." +} +package CYGPKG_DEVS_FLASH_MIPS_QED_OCELOT { + alias { "Support for flash memory on QED/Ocelot board" flash_qed_ocelot } + directory devs/flash/mips/ocelot + script flash_mips_qed_ocelot.cdl + hardware + description " + This package contains hardware support for flash memory + on the QED Ocelot platform." +} + package CYGPKG_DEVS_FLASH_EBSA285 { alias { "FLASH memory support for StrongARM EBSA-285" flash_ebsa285 } directory devs/flash/arm/ebsa285 @@ -191,6 +220,37 @@ package CYGPKG_DEVS_FLASH_ASSABET { This package contains hardware support for FLASH memory on the Intel StrongARM SA-1110 Assabet platform." } + +package CYGPKG_DEVS_FLASH_IPAQ { + alias { "FLASH memory support for Intel SA1110 (Ipaq)" flash_ipaq } + directory devs/flash/arm/ipaq + script flash_ipaq.cdl + hardware + description " + This package contains hardware support for FLASH memory + on the Intel StrongARM SA-1110 iPAQ platform." +} + +package CYGPKG_DEVS_FLASH_STRATA { + alias { "Generic FLASH memory support for Intel StrataFLASH" strata } + directory devs/flash/intel/strata + script flash_strata.cdl + hardware + description " + This package contains generic hardware support for Intel + StrataFLASH memory devices." +} + +package CYGPKG_DEVS_FLASH_INTEL_28FXXX { + alias { "Generic FLASH memory support for Intel 28Fxxx Flash parts" flashfile } + directory devs/flash/intel/28fxxx + script flash_intel_28fxxx.cdl + hardware + description " + This package contains generic hardware support for Intel + Flash memory devices." +} + package CYGPKG_DEVS_FLASH_IQ80310 { alias { "FLASH memory support for Cyclone IQ80310" flash_iq80310 } directory devs/flash/arm/iq80310 @@ -211,6 +271,35 @@ package CYGPKG_DEVS_FLASH_MBX { on the Motorola PowerPC/860 MBX platform." } +package CYGPKG_DEVS_FLASH_ATLAS { + alias { "FLASH memory support for MIPS Atlas" flash_atlas } + directory devs/flash/mips/atlas + script flash_atlas.cdl + hardware + description " + This package contains hardware support for FLASH memory + on the MIPS Atlas platform." +} + +package CYGPKG_DEVS_TOUCH_IPAQ { + alias { "Touch screen support for iPAQ" touch_ipaq } + directory devs/touch/arm/ipaq + script touch_ipaq.cdl + hardware + description " + This package contains hardware support for the touch screen + on the Compaq iPAQ Pocket PC." +} + +package CYGPKG_DEVS_KBD_IPAQ { + alias { "Kaypad/button support for iPAQ" kbd_ipaq } + directory devs/kbd/arm/ipaq + script kbd_ipaq.cdl + hardware + description " + This package contains hardware support for the keyboard buttons + on the Compaq iPAQ Pocket PC." +} package CYGPKG_IO_SERIAL_ARM_EBSA285 { alias { "Intel EBSA285 serial driver" devs_serial_arm_ebsa285 ebsa285_serial_driver } @@ -313,6 +402,16 @@ package CYGPKG_IO_SERIAL_TX39_JMR3904 { description "TX39 JMR3904 serial device drivers" } +package CYGPKG_IO_SERIAL_MIPS_ATLAS { + alias { "Atlas serial device drivers" + devs_serial_atlas atlas_serial_driver + devs_serial_mips_atlas mips_atlas_serial_driver } + hardware + directory devs/serial/mips/atlas + script ser_mips_atlas.cdl + description "Atlas serial device drivers" +} + package CYGPKG_IO_SERIAL_MIPS_REF4955 { alias { "TX49 REF4955 serial device drivers" devs_serial_mips_ref4955 ref4955_serial_driver } @@ -432,6 +531,14 @@ package CYGPKG_FS_RAM { This package contains a RAM resident filesystem." } +package CYGPKG_FS_ROM { + alias { "ROM Filesystem" romfs rom_fs fs_rom } + directory fs/rom + script romfs.cdl + description " + This package contains a ROM resident filesystem." +} + package CYGPKG_IO_ETH_DRIVERS { alias { "Common ethernet support" net_drivers eth_drivers } directory io/eth @@ -525,6 +632,15 @@ package CYGPKG_DEVS_ETH_INTEL_I82559 { description "Ethernet driver for Intel 82559 NIC." } +package CYGPKG_DEVS_ETH_MIPS_RM7000_OCELOT { + alias { "Ocelot ethernet drivers" + devs_eth_mips_rm7000_ocelot ocelot_eth_driver } + hardware + directory devs/eth/mips/ocelot + script mips_rm7000_ocelot_eth_drivers.cdl + description "Ethernet driver for QED Ocelot board." +} + package CYGPKG_DEVS_ETH_ARM_IQ80310 { alias { "Intel IQ80310 with onboard 82559 ethernet driver" devs_eth_arm_iq80310 iq80310_eth_driver } @@ -534,6 +650,15 @@ package CYGPKG_DEVS_ETH_ARM_IQ80310 { description "Ethernet driver for Intel IQ80310 with onboard 82559 NIC." } +package CYGPKG_DEVS_ETH_MIPS_ATLAS { + alias { "MIPS Atlas with onboard SAA9730 ethernet driver" + devs_eth_mips_atlas atlas_eth_driver } + hardware + directory devs/eth/mips/atlas + script atlas_eth_drivers.cdl + description "Ethernet driver for MIPS Atlas with onboard SAA9730 NIC." +} + # Not sure whether this should be "hardware"; if so, it should be mentioned # in all targets that can use it. package CYGPKG_DEVS_ETH_CF { @@ -610,6 +735,16 @@ package CYGPKG_DEVICES_WATCHDOG_ARM_EBSA ARM/EBSA285 board." } +package CYGPKG_DEVICES_WATCHDOG_ARM_SA11X0 { + alias { "Watchdog driver for StrongARM SA11x0 devices" devices_watchdog_sa11x0 device_watchdog_sa11x0 } + directory devs/watchdog/arm/sa11x0 + script watchdog_sa11x0.cdl + hardware + description " + This package provides a watchdog driver implementation for + Intel StrongARM SA11x0 integrated devices." +} + package CYGPKG_DEVICES_WATCHDOG_MN10300_MN10300 { alias { "Watchdog driver for MN10300 chip" devices_watchdog_mn10300 device_watchdog_mn10300 } directory devs/watchdog/mn10300/mn10300 @@ -659,6 +794,15 @@ This package provides memory allocator i dynamic memory allocators, including the ISO standard malloc interface. It also contains some sample implementations." } + +package CYGPKG_COMPRESS_ZLIB { + alias { "Zlib compress/decompress" zlib_compress compress_zlib } + directory services/compress/zlib + script compress_zlib.cdl + description " +This package provides zlib compression and decompression support." +} + package CYGPKG_UITRON { alias { "uITRON compatibility" uitron } directory compat/uitron @@ -858,6 +1002,7 @@ package CYGPKG_HAL_ARM_AEB { The aeb HAL package provides the support needed to run eCos on a ARM AEB-1 eval board." } + package CYGPKG_HAL_ARM_EBSA285 { alias { "Intel EBSA285 StrongARM board" hal_arm_ebsa285 arm_ebsa285_hal } directory hal/arm/ebsa285 @@ -888,6 +1033,16 @@ package CYGPKG_HAL_ARM_SA11X0_ASSABET { eCos on a Intel StrongARM SA1110 evaulation board (assabet)." } +package CYGPKG_HAL_ARM_SA11X0_IPAQ { + alias { "Compaq iPAQ Pocket PC" hal_arm_sa11x0_ipaq } + directory hal/arm/sa11x0/ipaq + script hal_arm_sa11x0_ipaq.cdl + hardware + description " + The IPAQ HAL package provides the support needed to run + eCos on a Intel StrongARM SA1110 pocket PC (Compaq iPAQ)." +} + package CYGPKG_HAL_ARM_SA11X0_BRUTUS { alias { "Intel SA1100 Brutus eval board" hal_arm_sa11x0_brutus } directory hal/arm/sa11x0/brutus @@ -1226,6 +1381,37 @@ package CYGPKG_HAL_MIPS_TX39_JMR3904 { `target sim --board=jmr3904' should be used from inside gdb." } +package CYGPKG_HAL_MIPS_MIPS32 { + alias { "MIPS32 HAL" hal_mips32 mips32_hal mips32_arch_hal } + directory hal/mips/mips32/ + script hal_mips_mips32.cdl + hardware + description " + The MIPS 32 architecture HAL package provides generic support + for this processor architecture. It is also necessary to + select a specific target platform HAL package." +} + +package CYGPKG_HAL_MIPS_MIPS64 { + alias { "MIPS64 HAL" hal_mips64 mips64_hal mips64_arch_hal } + directory hal/mips/mips64/ + script hal_mips_mips64.cdl + hardware + description " + The MIPS 64 architecture HAL package provides generic support + for this processor architecture. It is also necessary to + select a specific target platform HAL package." +} + +package CYGPKG_HAL_MIPS_ATLAS { + alias { "MIPS Atlas board" hal_atlas atlas_hal } + directory hal/mips/atlas + script hal_mips_atlas.cdl + hardware + description " + The Atlas HAL package should be used when targetting the + actual hardware. " +} package CYGPKG_HAL_MIPS_TX49 { alias { "TX49 chip HAL" hal_tx49 tx49_hal tx49_arch_hal } directory hal/mips/tx49/ @@ -1247,6 +1433,27 @@ package CYGPKG_HAL_MIPS_TX49_REF4955 { actual hardware." } +package CYGPKG_HAL_MIPS_RM7000 { + alias { "RM7000 chip HAL" hal_rm7000 rm7000_hal rm7000_arch_hal } + directory hal/mips/rm7000/var + script hal_mips_rm7000.cdl + hardware + description " + The RM7000 architecture HAL package provides generic support + for this processor architecture. It is also necessary to + select a specific target platform HAL package." +} + +package CYGPKG_HAL_MIPS_RM7000_OCELOT { + alias { "QED Ocelot platform" hal_rm7000_ocelot rm7000_ocelot_hal } + directory hal/mips/rm7000/ocelot + script hal_mips_rm7000_ocelot.cdl + hardware + description " + The Ocelot HAL package should be used when targetting the + actual hardware." +} + package CYGPKG_HAL_MIPS_VR4300 { alias { "VR4300 chip HAL" hal_vr4300 vr4300_hal vr4300_arch_hal } directory hal/mips/vr4300/ @@ -1404,6 +1611,7 @@ The aeb target provides the packages nee evaluation board (AEB-1)." } + target ebsa285 { alias { "Intel EBSA285 StrongARM board" ebsa } packages { CYGPKG_HAL_ARM @@ -1430,12 +1638,31 @@ target assabet { CYGPKG_IO_USB CYGPKG_IO_USB_SLAVE CYGPKG_DEVS_USB_SA11X0 + CYGPKG_DEVICES_WATCHDOG_ARM_SA11X0 } description " The assabet target provides the packages needed to run eCos on an Intel StrongARM SA1110 evaluation board." } +target ipaq { + alias { "Compaq iPAQ Pocket PC" ipaq } + packages { CYGPKG_HAL_ARM + CYGPKG_HAL_ARM_SA11X0 + CYGPKG_HAL_ARM_SA11X0_IPAQ + CYGPKG_IO_SERIAL_ARM_SA11X0 + CYGPKG_DEVS_PCMCIA_IPAQ + CYGPKG_DEVS_FLASH_IPAQ + CYGPKG_DEVS_FLASH_STRATA + CYGPKG_DEVICES_WATCHDOG_ARM_SA11X0 + CYGPKG_DEVS_TOUCH_IPAQ + CYGPKG_DEVS_KBD_IPAQ + } + description " + The IPAQ target provides the packages needed to run + eCos on an Intel StrongARM SA1110 Pocket PC (Compaq iPAQ)." +} + target brutus { alias { "Intel StrongARM SA1100 board" brutus } packages { CYGPKG_HAL_ARM @@ -1657,6 +1884,36 @@ target jmr3904 { `target sim --board=jmr3904' should be used from inside gdb." } +target atlas_mips32_4kc { + alias { "MIPS Atlas board with Mips32 4Kc processor" atlas_mips32_4kc } + packages { CYGPKG_HAL_MIPS + CYGPKG_HAL_MIPS_MIPS32 + CYGPKG_HAL_MIPS_ATLAS + CYGPKG_IO_SERIAL_MIPS_ATLAS + CYGPKG_DEVS_FLASH_ATLAS + CYGPKG_DEVS_ETH_MIPS_ATLAS + CYGPKG_IO_PCI + } + set_value CYGHWR_HAL_MIPS_MIPS32_CORE "4Kc" + description " + The atlas_mips32_4Kc target provides the packages needed to run + eCos on a MIPS Atlas board with a Mips32 4Kc processor." +} + +target atlas_mips64_5kc { + alias { "MIPS Atlas board with Mips64 5Kc processor" atlas_mips64_5kc ruby } + packages { CYGPKG_HAL_MIPS + CYGPKG_HAL_MIPS_MIPS64 + CYGPKG_HAL_MIPS_ATLAS + CYGPKG_IO_SERIAL_MIPS_ATLAS + CYGPKG_DEVS_FLASH_ATLAS + CYGPKG_DEVS_ETH_MIPS_ATLAS + } + set_value CYGHWR_HAL_MIPS_MIPS64_CORE "5K" + description " + The atlas_mips32_5Kc target provides the packages needed to run + eCos on a MIPS Atlas board with a Mips64 5Kc processor." +} target tx39_sim { alias { "TX39 minimal simulator" } packages { CYGPKG_HAL_MIPS @@ -1686,6 +1943,23 @@ target ref4955 { eCos on a Toshiba TX4955 reference platform." } +target ocelot { + alias { "QED Ocelot platform" ocelot } + packages { CYGPKG_HAL_MIPS + CYGPKG_HAL_MIPS_RM7000 + CYGPKG_HAL_MIPS_RM7000_OCELOT + CYGPKG_IO_PCI + CYGPKG_DEVS_FLASH_MIPS_QED_OCELOT + CYGPKG_DEVS_FLASH_AMD_AM29F040B + CYGPKG_IO_SERIAL_GENERIC_16X5X + CYGPKG_DEVS_ETH_INTEL_I82559 + CYGPKG_DEVS_ETH_MIPS_RM7000_OCELOT + } + description " + The ocelot target provides the packages needed to run + eCos on a QED Ocelot Hot-Swap Computer." +} + target vrc4373 { alias { "NEC VRC4373 board" } packages { CYGPKG_HAL_MIPS @@ -1746,7 +2020,7 @@ target stb { # NEC targets target ceb_v850 { - alias { "Cosmo CEB-V850/SA1 board" CEB ceb_v850_sa1 } + alias { "Cosmo CEB-V850 board" CEB ceb_v850_sa1 } packages { CYGPKG_HAL_V85X CYGPKG_HAL_V85X_V850 CYGPKG_HAL_V85X_V850_CEB @@ -1754,7 +2028,7 @@ target ceb_v850 { } description " The ceb_v850 target provides the packages needed to run eCos on a -Cosmo CEB-V850 evaluation board fitted with a V850/SA1 or V850/SB1." +Cosmo CEB-V850 evaluation board fitted with a NEC V850/SA1 or NEC V850/SB1." } # -------------------------------------------------------------------------- diff --git a/packages/ecosadmin.tcl b/packages/ecosadmin.tcl --- a/packages/ecosadmin.tcl +++ b/packages/ecosadmin.tcl @@ -36,7 +36,7 @@ # # The Initial Developer of the Original Code is Red Hat. # Portions created by Red Hat are -# Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +# Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. # All Rights Reserved. # ------------------------------------------- # @@ -661,14 +661,6 @@ proc ecosadmin::locate_files { dir { pat } } - # Eliminate any obviously spurious entries. - foreach file { CVS Makefile.am Makefile.in makefile acinclude.m4 aclocal.m4 configure.in configure } { - set index [lsearch -exact $filenames $file] - if { $index != -1 } { - set filenames [lreplace $filenames $index $index] - } - } - # Eliminate any subdirectories. set subdirs "" foreach name $filenames { diff --git a/packages/fs/rom/current/ChangeLog b/packages/fs/rom/current/ChangeLog new file mode 100644 --- /dev/null +++ b/packages/fs/rom/current/ChangeLog @@ -0,0 +1,37 @@ +2000-10-25 Richard Panton (richard.panton@3glab.com) + + * cdl/romfs.cdl: + * src/romfs.c: + * support/mk_romfs.c: + * tests/fileio1.c: + A sample ROM filesystem implementation + + + +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//=========================================================================== + + diff --git a/packages/fs/rom/current/cdl/romfs.cdl b/packages/fs/rom/current/cdl/romfs.cdl new file mode 100644 --- /dev/null +++ b/packages/fs/rom/current/cdl/romfs.cdl @@ -0,0 +1,79 @@ +# ==================================================================== +# +# romfs.cdl +# +# ROM Filesystem configuration data +# +# ==================================================================== +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Red Hat eCos Public License +# Version 1.1 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://www.redhat.com/ +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Configurable Operating System, +# released September 30, 1998. +# +# The Initial Developer of the Original Code is Red Hat. +# Portions created by Red Hat are +# Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +# All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +# ==================================================================== +######DESCRIPTIONBEGIN#### +# +# Author(s): nickg +# Original data: nickg +# Contributors: richard.panton@3glab.com +# Date: 2000-08-01 +# +#####DESCRIPTIONEND#### +# +# ==================================================================== + +cdl_package CYGPKG_FS_ROM { + display "ROM filesystem" + doc doc/index.html + include_dir cyg/romfs + + requires CYGPKG_IO_FILEIO + + requires CYGPKG_ISOINFRA + requires CYGPKG_ERROR + requires CYGINT_ISO_ERRNO + requires CYGINT_ISO_ERRNO_CODES + + compile -library=libextras.a romfs.c + + cdl_option CYGNUM_FS_ROM_BASE_ADDRESS { + display "Base of the ROM filesystem in memory" + flavor data + default_value { 0x50040000 } + description "Set this value to the base address of the ROM + filesystem in memory." + } + + # ---------------------------------------------------------------- + # Tests + + cdl_option CYGPKG_FS_ROM_TESTS { + display "ROM FS tests" + flavor data + no_define + calculated { "tests/fileio1.c" } + description " + This option specifies the set of tests for the ROM FS package." + } + +} + +# End of romfs.cdl diff --git a/packages/fs/rom/current/doc/mk_romfs.txt b/packages/fs/rom/current/doc/mk_romfs.txt new file mode 100644 --- /dev/null +++ b/packages/fs/rom/current/doc/mk_romfs.txt @@ -0,0 +1,94 @@ +MK_ROMFS - Make a ROMFS image +============================= + +This program creates a ROMFS image that can be read by eCos. + +mk_romfs - Create an eCos ROMFS disk image from the files + contained under a specified directory + +Usage: ../support/mk_romfs [options] + fs_root is the directory containing the files to package into the ROMFS image + fs_file is the name of the ROMFS image file to create + Options include: + -v / -q increase / decrease verbosity + -n do everything EXCEPT creating the output file + -b write a big-endian image (default is little endian) + -l collapse hard links to a single node + +----------- +How to use. +----------- + +For example, suppose you wish to access the following directories and files: + / + /etc passwd, group + /dev + /mnt + /tmp (for a RAMFS) + /var (for a RAMFS) + +1. Create the required directories and files under a suitable root, eg. under + ~/rom: + $ mkdir ~/rom + $ cd ~/rom + $ mkdir etc dev mnt tmp var + $ cp /etc/passwd /etc/group etc/ + ( remembering to edit these files....;-) + +2. Make the romfs image in a suitable place, eg /tftpboot for direct upload to + the RedBoot monitor. + $ mk_romfs -v . /tftpboot/romfs.img + mk_romfs: Verbosity 2 little endian + Phase 1 - Build file list + Phase 2 - Calculate space allocation + Phase 2a - * Directories + Phase 2b - * Regular files + Phase 2c - * Executable files + Phase 3 - Construct ROMFS image file (3 kb) + Phase 3a - * Node table + Phase 3b - * Data blocks + /tftpboot/romfs.img completed + +3. Connect to your target RedBoot monitor, and load the romfs image. You will + need to determine a suitable place in RAM to load the image into. + $ telnet xxx.xxx.xxx.xxx 1000 + Trying xxx.xxx.xxx.xxx... + Connected to xxx.xxx.xxx.xxx. + Escape character is '^]'. + RedBoot> load romfs.img -r -v -b 0x1000000 + Raw file loaded 0x01000000-0x0100093e + RedBoot> + +4. Determine where to load the romfs image in the ROM. See what's there... + RedBoot> fis list + Name FLASH addr Mem addr Length Entry point + RedBoot 0x50000000 0x50000000 0x020000 0x00000000 + RedBoot[backup] 0x50020000 0x50020000 0x020000 0x00000000 + RedBoot config 0x503C0000 0x503C0000 0x020000 0x00000000 + FIS directory 0x503E0000 0x503E0000 0x020000 0x00000000 + RedBoot> fis free + 0x50040000 .. 0x503C0000 + RedBoot> + We can see that a suitable place would be 0x50040000. + Alternatively, you can let RedBoot determine the address itself... + +5. Copy the image from RAM to ROM... + RedBoot> fis create -b 0x1000000 -l 0x940 RomFs + ... Erase from 0x50040000-0x50040940: . + ... Program from 0x01000000-0x01000940 at 0x50040000: . + ... Erase from 0x503e0000-0x50400000: . + ... Program from 0x01fd0000-0x01ff0000 at 0x503e0000: . + RedBoot> fis list + Name FLASH addr Mem addr Length Entry point + RedBoot 0x50000000 0x50000000 0x020000 0x00000000 + RedBoot[backup] 0x50020000 0x50020000 0x020000 0x00000000 + RedBoot config 0x503C0000 0x503C0000 0x020000 0x00000000 + FIS directory 0x503E0000 0x503E0000 0x020000 0x00000000 + RomFs 0x50040000 0x01000000 0x000940 0x00000000 + RedBoot> + +6. MAKE A NOTE OF THE ADDRESS IN FLASH THAT THE IMAGE IS LOADED AT. + The ROMFS option 'CYGNUM_FS_ROM_BASE_ADDRESS' needs to be set to this + value in order to access the filesystem. + + diff --git a/packages/fs/rom/current/doc/romfs.txt b/packages/fs/rom/current/doc/romfs.txt new file mode 100644 --- /dev/null +++ b/packages/fs/rom/current/doc/romfs.txt @@ -0,0 +1,12 @@ +ROMFS - A rom filesystem plug-in module for eCos +================================================ + +You can use this module if you have flash ROM available to install the +filesystem into. Instructions are given for creating and installing a +rom filesystem into a RedBoot monitor. + +See mk_romfs for instructions for making the filesystem. + +See romfs.c for comments about the filesystem structure. + + diff --git a/packages/fs/rom/current/src/romfs.c b/packages/fs/rom/current/src/romfs.c new file mode 100644 --- /dev/null +++ b/packages/fs/rom/current/src/romfs.c @@ -0,0 +1,1096 @@ +//========================================================================== +// +// romfs.c +// +// ROM file system +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg +// Contributors: nickg, richard.panton@3glab.com +// Date: 2000-07-25 +// Purpose: ROM file system +// Description: This is a ROM filesystem for eCos. It attempts to +// provide full POSIX-compatible filesystem behaviour +// while at the same time being efficient in terms of +// time and space used. +// +// +//####DESCRIPTIONEND#### +// +//========================================================================== +// +// General Description +// =================== +// +// This is an implementation of a ROM filesystem for eCos. Its goal is +// to provide a working example of a filesystem that provides most of +// the required POSIX functionality. And obviously it may also be +// useful in its own right. +// +// +// Header +// ------ +// +// There is a single header that describes the overall format of the ROMFS +// disk. The address of this header is used as the base for all offsets used +// in the node and directory structures. It contains the following fields: +// +// label - A human readable label for various purposes +// fssize - The size in bytes of the entire ROMFS disk +// nodes - A count of the nodes in the disk +// +// Immediately following thisin memory is the node table, consisting of +// 'nodes' repetitions of the node object. +// +// Nodes +// ----- +// +// All files and directories are represented by node objects. Each +// romfs_node structure contains the following fields: +// +// mode - Node type, file or directory. +// nlink - Number of links to this node. Each directory entry that references +// this node is a link. +// size - Size of the data in this node in bytes. +// ctime - Creation time of the file (NOT the ROMFS) +// data - Offset of the first data byte for this node from the header +// +// Directories +// ----------- +// +// A directory is a node whose data is a list of directory entries. +// These contain the +// following fields: +// +// node - Index of the node in the romfs_disk table that is referenced by +// this entry. This is present in every directory entry fragment. +// next - Offset of the next name entry. +// name - The filename associated with this link to the node. +// +// Data Storage +// ------------ +// +// Each file has its data stored in a single contiguous memory block +// referenced by the offset in the node. +// +// [ The start of the data for each node is aligned to a boundary - a four ] +// [ byte boundary in the case of data files, or a PAGESIZE boudary in the ] +// [ case of executable files. This alignment is enforced by the mk_romfs ] +// [ program, and has no effect on the code contained in this file. ] +// +//========================================================================== + +#include +#include +#include +#include +#include + +#include // base kernel types +#include // tracing macros +#include // assertion macros + +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include + +#include +#include + +//========================================================================== +// Alignment values. Must tie in with the similar defintions given in mk_romfs.c +#define ROMFS_DIRENT_ALIGNMENT 32 + +// Eventually we want to eXecute In Place from the ROM in a protected +// environment, so we'll need executables to be aligned to a boundary +// suitable for MMU protection. A suitable boundary would be the 4k +// boundary in all the CPU architectures I am currently aware of. + +// Forward definitions + +// Filesystem operations +static int romfs_mount ( cyg_fstab_entry *fste, cyg_mtab_entry *mte ); +static int romfs_umount ( cyg_mtab_entry *mte ); +static int romfs_open ( cyg_mtab_entry *mte, cyg_dir dir, const char *name, + int mode, cyg_file *fte ); +static int romfs_opendir ( cyg_mtab_entry *mte, cyg_dir dir, const char *name, + cyg_file *fte ); +static int romfs_chdir ( cyg_mtab_entry *mte, cyg_dir dir, const char *name, + cyg_dir *dir_out ); +static int romfs_stat ( cyg_mtab_entry *mte, cyg_dir dir, const char *name, + struct stat *buf); +static int romfs_getinfo ( cyg_mtab_entry *mte, cyg_dir dir, const char *name, + int key, void *buf, int len ); +static int romfs_setinfo ( cyg_mtab_entry *mte, cyg_dir dir, const char *name, + int key, void *buf, int len ); + +// File operations +static int romfs_fo_read (struct CYG_FILE_TAG *fp, struct CYG_UIO_TAG *uio); +static int romfs_fo_lseek (struct CYG_FILE_TAG *fp, off_t *pos, int whence ); +static int romfs_fo_ioctl (struct CYG_FILE_TAG *fp, CYG_ADDRWORD com, + CYG_ADDRWORD data); +static int romfs_fo_fsync (struct CYG_FILE_TAG *fp, int mode ); +static int romfs_fo_close (struct CYG_FILE_TAG *fp); +static int romfs_fo_fstat (struct CYG_FILE_TAG *fp, struct stat *buf ); +static int romfs_fo_getinfo (struct CYG_FILE_TAG *fp, int key, void *buf, int len ); +static int romfs_fo_setinfo (struct CYG_FILE_TAG *fp, int key, void *buf, int len ); + +// Directory operations +static int romfs_fo_dirread (struct CYG_FILE_TAG *fp, struct CYG_UIO_TAG *uio); +static int romfs_fo_dirlseek (struct CYG_FILE_TAG *fp, off_t *pos, int whence ); + + +//========================================================================== +// Filesystem table entries + +// ------------------------------------------------------------------------- +// Fstab entry. +// This defines the entry in the filesystem table. +// For simplicity we use _FILESYSTEM synchronization for all accesses since +// we should never block in any filesystem operations. + +FSTAB_ENTRY( romfs_fste, "romfs", 0, + CYG_SYNCMODE_FILE_FILESYSTEM|CYG_SYNCMODE_IO_FILESYSTEM, + romfs_mount, + romfs_umount, + romfs_open, + (cyg_fsop_unlink *)cyg_fileio_erofs, + (cyg_fsop_mkdir *)cyg_fileio_erofs, + (cyg_fsop_rmdir *)cyg_fileio_erofs, + (cyg_fsop_rename *)cyg_fileio_erofs, + (cyg_fsop_link *)cyg_fileio_erofs, + romfs_opendir, + romfs_chdir, + romfs_stat, + romfs_getinfo, + romfs_setinfo); + +// ------------------------------------------------------------------------- +// mtab entry. +// This defines a single ROMFS loaded into ROM at the configured address +// +// MTAB_ENTRY( rom_mte, // structure name +// "/rom", // mount point +// "romfs", // FIlesystem type +// "", // hardware device +// (CYG_ADDRWORD) CYGNUM_FS_ROM_BASE_ADDRESS // Address in ROM +// ); + + +// ------------------------------------------------------------------------- +// File operations. +// This set of file operations are used for normal open files. + +static cyg_fileops romfs_fileops = +{ + romfs_fo_read, + (cyg_fileop_write *)cyg_fileio_erofs, + romfs_fo_lseek, + romfs_fo_ioctl, + cyg_fileio_seltrue, + romfs_fo_fsync, + romfs_fo_close, + romfs_fo_fstat, + romfs_fo_getinfo, + romfs_fo_setinfo +}; + +// ------------------------------------------------------------------------- +// Directory file operations. +// This set of operations are used for open directories. Most entries +// point to error-returning stub functions. Only the read, lseek and +// close entries are functional. + +static cyg_fileops romfs_dirops = +{ + romfs_fo_dirread, + (cyg_fileop_write *)cyg_fileio_enosys, + romfs_fo_dirlseek, + (cyg_fileop_ioctl *)cyg_fileio_enosys, + cyg_fileio_seltrue, + (cyg_fileop_fsync *)cyg_fileio_enosys, + romfs_fo_close, + (cyg_fileop_fstat *)cyg_fileio_enosys, + (cyg_fileop_getinfo *)cyg_fileio_enosys, + (cyg_fileop_setinfo *)cyg_fileio_enosys +}; + +//========================================================================== +// Data typedefs +// Some forward typedefs for the main data structures. + +struct romfs_disk; +typedef struct romfs_disk romfs_disk; + +struct romfs_node; +typedef struct romfs_node romfs_node; + +struct romfs_dirent; +typedef struct romfs_dirent romfs_dirent; + +//========================================================================== +// File and directory node +// This data structure represents a file or directory. + +struct romfs_node +{ + cyg_uint32 mode; // 0-3 node type + cyg_ucount32 nlink; // 4-7 number of links to this node + cyg_uint16 uid; // 8-9 Owner id + cyg_uint16 gid; // 10-11 Group id + cyg_uint32 size; // 12-15 size of file in bytes + cyg_uint32 ctime; // 16-19 creation status time + cyg_uint32 offset; // 20-23 offset of data from start of ROMFS + cyg_uint32 pad[2]; // 24-31 padding to align to 32byte boundary +}; + +//========================================================================== +// Directory entry. +// Variable sized entry containing the name and node of a directory entry + +struct romfs_dirent +{ + cyg_ucount32 node; // Index of node in romfs_disk structure + cyg_uint32 next; // Offset from start of directory of + // a) the next entry, or + // b) the end of the directory data + char name[0]; // The name, NUL terminated +}; + +//========================================================================== +// ROMFS header +// This data structure contains overall information on the ROMFS + +struct romfs_disk +{ + cyg_uint32 magic; // 0-3 Marks a valid ROMFS entry + cyg_ucount32 nodecount; // 4-7 Count of nodes in this filesystem + cyg_ucount32 disksize; // 8-11 Count of bytes in this filesystem + cyg_uint32 dev_id; // 12-15 ID of disk (put into stat.st_dev) + char name[16]; // 16-31 Name - pads to 32 bytes + romfs_node node[0]; +}; + +#define ROMFS_MAGIC 0x526f6d2e // The magic signature word for a romfs +#define ROMFS_CIGAM 0x2e6d6f52 // The byte sex is wrong if you see this + +//========================================================================== +// Directory search data +// Parameters for a directory search. The fields of this structure are +// updated as we follow a pathname through the directory tree. + +struct romfs_dirsearch +{ + romfs_disk *disk; // disk structure + romfs_node *dir; // directory to search + const char *path; // path to follow + romfs_node *node; // Node found + const char *name; // last name used + int namelen; // name fragment length + cyg_bool last; // last name in path? +}; + +typedef struct romfs_dirsearch romfs_dirsearch; + +//========================================================================== +// This seems to be the only string function referenced. Define as static +// here to avoid having to load the string library + +static bool match( const char *a, const char *b, int len ) +{ + for ( ; len > 0 && *a && *b && *a == *b ; a++, b++, len-- ) + ; + return ( len == 0 ); +} + + +//========================================================================== +// SIMPLE buffer management. +// Each node has a data buffer pointer and a size. + +// ------------------------------------------------------------------------- +// findbuffer_node() +// return a pointer to the data at the indicated file position. + +static int findbuffer_node( romfs_disk *disk, // header pointer + romfs_node *node, // node pointer + off_t pos, // data position to get + cyg_uint8 **buffer, // returned buffer pointer + size_t *size) // returned buffer size +{ + if ( pos >= node->size || node->size == 0 ) + { + // Indicate end of data. + *size = 0; + } else { + + // Calculate the buffer position + *buffer = (cyg_uint8*)disk + node->offset + pos; + *size = node->size-pos; + } + + return ENOERR; +} + +//========================================================================== +// Directory operations + + +// ------------------------------------------------------------------------- +// find_direntry() +// Find a directory entry for the name and return a pointer to the first +// entry fragment. + +static romfs_dirent *find_direntry( romfs_disk *disk, romfs_node *dir, const char *name, int namelen ) +{ + off_t pos = 0; + int err; + + // Loop over all the entries until a match is found or we run out + // of data. + while( pos < dir->size ) + { + romfs_dirent *d; + cyg_uint8 *buf; + size_t size; + + err = findbuffer_node( disk, dir, pos, &buf, &size ); + if( err != ENOERR || size == 0) + return NULL; + + if ( (int)buf & (ROMFS_DIRENT_ALIGNMENT-1) ) + return NULL; + + d = (romfs_dirent *)buf; + + // Is this the directory entry we're looking for? + if ( match( d->name, name, namelen ) ) + return d; + + // Otherwise move on to next entry in chain + pos = d->next; + } + + return NULL; +} + +//========================================================================== +// Directory search + +// ------------------------------------------------------------------------- +// init_dirsearch() +// Initialize a dirsearch object to start a search + +static void init_dirsearch( romfs_dirsearch *ds, + romfs_disk *disk, + romfs_node *dir, + const char *name) +{ + ds->disk = disk; + ds->dir = dir; + ds->path = name; + ds->node = dir; + ds->name = name; + ds->namelen = 0; + ds->last = false; +} + +// ------------------------------------------------------------------------- +// find_entry() +// Search a single directory for the next name in a path and update the +// dirsearch object appropriately. + +static int find_entry( romfs_dirsearch *ds ) +{ + romfs_node *dir = ds->dir; + const char *name = ds->path; + const char *n = name; + int namelen = 0; + romfs_dirent *d; + + // check that we really have a directory + if( !S_ISDIR(dir->mode) ) + return ENOTDIR; + + // Isolate the next element of the path name. + while( *n != '\0' && *n != '/' ) + n++, namelen++; + + // If we terminated on a NUL, set last flag. + if( *n == '\0' ) + ds->last = true; + + // update name in dirsearch object + ds->name = name; + ds->namelen = namelen; + + // Here we have the name and its length set up. + // Search the directory for a matching entry + + d = find_direntry( ds->disk, dir, name, namelen ); + + if( d == NULL ) + return ENOENT; + + // pass back the node we have found + ds->node = &ds->disk->node[d->node]; + + return ENOERR; + +} + +// ------------------------------------------------------------------------- +// romfs_find() +// Main interface to directory search code. This is used in all file +// level operations to locate the object named by the pathname. + +static int romfs_find( romfs_dirsearch *d ) +{ + int err; + + // Short circuit empty paths + if( *(d->path) == '\0' ) + return ENOERR; + + // iterate down directory tree until we find the object + // we want. + for(;;) + { + err = find_entry( d ); + + if( err != ENOERR ) + return err; + + if( d->last ) + return ENOERR; + + // Update dirsearch object to search next directory. + d->dir = d->node; + d->path += d->namelen; + if( *(d->path) == '/' ) d->path++; // skip dirname separators + } +} + +//========================================================================== +// Pathconf support +// This function provides support for pathconf() and fpathconf(). + +static int romfs_pathconf( romfs_node *node, struct cyg_pathconf_info *info ) +{ + int err = ENOERR; + + switch( info->name ) + { + case _PC_LINK_MAX: + info->value = LINK_MAX; + break; + + case _PC_MAX_CANON: + info->value = -1; // not supported + err = EINVAL; + break; + + case _PC_MAX_INPUT: + info->value = -1; // not supported + err = EINVAL; + break; + + case _PC_NAME_MAX: + info->value = NAME_MAX; + break; + + case _PC_PATH_MAX: + info->value = PATH_MAX; + break; + + case _PC_PIPE_BUF: + info->value = -1; // not supported + err = EINVAL; + break; + + + case _PC_ASYNC_IO: + info->value = -1; // not supported + err = EINVAL; + break; + + case _PC_CHOWN_RESTRICTED: + info->value = -1; // not supported + err = EINVAL; + break; + + case _PC_NO_TRUNC: + info->value = 0; + break; + + case _PC_PRIO_IO: + info->value = 0; + break; + + case _PC_SYNC_IO: + info->value = 0; + break; + + case _PC_VDISABLE: + info->value = -1; // not supported + err = EINVAL; + break; + + default: + err = EINVAL; + break; + } + + return err; +} + +//========================================================================== +// Filesystem operations + +// ------------------------------------------------------------------------- +// romfs_mount() +// Process a mount request. This mainly finds root for the +// filesystem. + +static int romfs_mount ( cyg_fstab_entry *fste, cyg_mtab_entry *mte ) +{ + romfs_disk *disk; + + if ( !mte->data ) { + // If the image address was not in the MTE data word, + if ( mte->devname && mte->devname[0] ) { + // And there's something in the 'hardware device' field, + // then read the address from there. + sscanf( mte->devname, "%p", (char**)&mte->data ); + } + } + + if ( !mte->data ) { + // If still no address, try the FSTAB entry data word + mte->data = fste->data; + } + + if ( !mte->data ) { + // If still no address, give up... + return ENOENT; + } + + disk = (romfs_disk *)mte->data; + + // Check the ROMFS magic number to ensure that there's really an fs. + if ( disk->magic == ROMFS_CIGAM ) { + // The disk image has the wrong byte sex!!! + return EIO; + } else if ( disk->magic != ROMFS_MAGIC || disk->nodecount == 0 ) { + // No image found + return ENOENT; + } + + mte->root = (cyg_dir)&disk->node[0]; + + return ENOERR; +} + +// ------------------------------------------------------------------------- +// romfs_umount() +// Unmount the filesystem. This will currently always succeed. + +static int romfs_umount ( cyg_mtab_entry *mte ) +{ + // Clear root pointer + mte->root = CYG_DIR_NULL; + + // That's all folks. + + return ENOERR; +} + +// ------------------------------------------------------------------------- +// romfs_open() +// Open a file for reading + +static int romfs_open ( cyg_mtab_entry *mte, cyg_dir dir, const char *name, + int mode, cyg_file *file ) +{ + + romfs_dirsearch ds; + romfs_node *node = NULL; + int err; + + init_dirsearch( &ds, (romfs_disk *)mte->data, (romfs_node *)dir, name ); + + err = romfs_find( &ds ); + + if( err == ENOENT ) + { + return ENOENT; + } + else if( err == ENOERR ) + { + // The node exists. If the O_CREAT and O_EXCL bits are set, we + // must fail the open. + + if( (mode & (O_CREAT|O_EXCL)) == (O_CREAT|O_EXCL) ) + err = EEXIST; + else node = ds.node; + } + + if( err == ENOERR && (mode & O_TRUNC ) ) + { + // If the O_TRUNC bit is set we must fail the open + + err = EPERM; + } + + if( err != ENOERR ) return err; + + // Check that we actually have a file here + if( S_ISDIR(node->mode) ) return EISDIR; + + // Initialize the file object + + file->f_flag |= mode & CYG_FILE_MODE_MASK; + file->f_type = CYG_FILE_TYPE_FILE; + file->f_ops = &romfs_fileops; + file->f_offset = 0; + file->f_data = (CYG_ADDRWORD)node; + file->f_xops = 0; + + return ENOERR; +} + +// ------------------------------------------------------------------------- +// romfs_opendir() +// Open a directory for reading. + +static int romfs_opendir ( cyg_mtab_entry *mte, cyg_dir dir, const char *name, + cyg_file *file ) +{ + romfs_dirsearch ds; + int err; + + init_dirsearch( &ds, (romfs_disk *)mte->data, (romfs_node *)dir, name ); + + err = romfs_find( &ds ); + + if( err != ENOERR ) return err; + + // check it is really a directory. + if( !S_ISDIR(ds.node->mode) ) return ENOTDIR; + + // Initialize the file object, setting the f_ops field to a + // special set of file ops. + + file->f_type = CYG_FILE_TYPE_FILE; + file->f_ops = &romfs_dirops; + file->f_offset = 0; + file->f_data = (CYG_ADDRWORD)ds.node; + file->f_xops = 0; + + return ENOERR; + +} + +// ------------------------------------------------------------------------- +// romfs_chdir() +// Change directory support. + +static int romfs_chdir ( cyg_mtab_entry *mte, cyg_dir dir, const char *name, + cyg_dir *dir_out ) +{ + if( dir_out != NULL ) + { + // This is a request to get a new directory pointer in + // *dir_out. + + romfs_dirsearch ds; + int err; + + init_dirsearch( &ds, (romfs_disk *)mte->data, (romfs_node *)dir, name ); + + err = romfs_find( &ds ); + + if( err != ENOERR ) return err; + + // check it is a directory + if( !S_ISDIR(ds.node->mode) ) + return ENOTDIR; + + // Pass it out + *dir_out = (cyg_dir)ds.node; + } + // If no output dir is required, this means that the mte and + // dir arguments are the current cdir setting and we should + // forget this fact. Do nothing in ROMFS. + + return ENOERR; +} + +// ------------------------------------------------------------------------- +// romfs_stat() +// Get struct stat info for named object. + +static int romfs_stat ( cyg_mtab_entry *mte, cyg_dir dir, const char *name, + struct stat *buf) +{ + romfs_dirsearch ds; + int err; + romfs_disk *disk = (romfs_disk *)mte->data; + + init_dirsearch( &ds, disk, (romfs_node *)dir, name ); + + err = romfs_find( &ds ); + + if( err != ENOERR ) return err; + + // Fill in the status + buf->st_mode = ds.node->mode; + buf->st_ino = (ino_t)(ds.node - &disk->node[0]); + buf->st_dev = (dev_t)disk->dev_id; + buf->st_nlink = ds.node->nlink; + buf->st_uid = ds.node->uid; + buf->st_gid = ds.node->gid; + buf->st_size = ds.node->size; + buf->st_atime = ds.node->ctime; + buf->st_mtime = ds.node->ctime; + buf->st_ctime = ds.node->ctime; + + return err; +} + +// ------------------------------------------------------------------------- +// romfs_getinfo() +// Getinfo. Currently only support pathconf(). + +static int romfs_getinfo ( cyg_mtab_entry *mte, cyg_dir dir, const char *name, + int key, void *buf, int len ) +{ + romfs_dirsearch ds; + int err; + + init_dirsearch( &ds, (romfs_disk *)mte->data, (romfs_node *)dir, name ); + + err = romfs_find( &ds ); + + if( err != ENOERR ) return err; + + switch( key ) + { + case FS_INFO_CONF: + err = romfs_pathconf( ds.node, (struct cyg_pathconf_info *)buf ); + break; + + default: + err = EINVAL; + } + return err; +} + +// ------------------------------------------------------------------------- +// romfs_setinfo() +// Setinfo. Nothing to support here at present. + +static int romfs_setinfo ( cyg_mtab_entry *mte, cyg_dir dir, const char *name, + int key, void *buf, int len ) +{ + // No setinfo keys supported at present + + return EINVAL; +} + + +//========================================================================== +// File operations + +// ------------------------------------------------------------------------- +// romfs_fo_read() +// Read data from the file. + +static int romfs_fo_read (struct CYG_FILE_TAG *fp, struct CYG_UIO_TAG *uio) +{ + romfs_node *node = (romfs_node *)fp->f_data; + int i; + off_t pos = fp->f_offset; + ssize_t resid = uio->uio_resid; + + // Loop over the io vectors until there are none left + for( i = 0; i < uio->uio_iovcnt; i++ ) + { + cyg_iovec *iov = &uio->uio_iov[i]; + char *buf = (char *)iov->iov_base; + off_t len = iov->iov_len; + + // Loop over each vector filling it with data from the file. + while( len > 0 && pos < node->size ) + { + cyg_uint8 *fbuf; + size_t bsize; + off_t l = len; + int err; + + // Get a pointer to the data at offset _pos_. + err = findbuffer_node( (romfs_disk *)fp->f_mte->data, node, pos, &fbuf, &bsize ); + + if( err != ENOERR ) + return err; + + // adjust size to end of file if necessary + if( l > node->size-pos ) + l = node->size-pos; + + // adjust size to the amount of contiguous data we can see + // at present. + if( l > bsize ) + l = bsize; + + // copy data out + memcpy( buf, fbuf, l ); + + // Update working vars + len -= l; + buf += l; + pos += l; + resid -= l; + } + } + + // We successfully read some data + // Update the file offset and transfer residue. + + uio->uio_resid = resid; + fp->f_offset = pos; + + return ENOERR; +} + +// ------------------------------------------------------------------------- +// romfs_fo_lseek() +// Seek to a new file position. + +static int romfs_fo_lseek (struct CYG_FILE_TAG *fp, off_t *apos, int whence ) +{ + romfs_node *node = (romfs_node *)fp->f_data; + off_t pos = *apos; + + switch( whence ) + { + case SEEK_SET: + // Pos is already where we want to be. + break; + + case SEEK_CUR: + // Add pos to current offset. + pos += fp->f_offset; + break; + + case SEEK_END: + // Add pos to file size. + pos += node->size; + break; + + default: + return EINVAL; + } + + // Check that pos is still within current file size, or at the + // very end. + if( pos < 0 || pos > node->size ) + return EINVAL; + + // All OK, set fp offset and return new position. + *apos = fp->f_offset = pos; + + return ENOERR; +} + +// ------------------------------------------------------------------------- +// romfs_fo_ioctl() +// Handle ioctls. Currently none are defined. + +static int romfs_fo_ioctl (struct CYG_FILE_TAG *fp, CYG_ADDRWORD com, + CYG_ADDRWORD data) +{ + // No Ioctls currenly defined. + + return EINVAL; +} + +// ------------------------------------------------------------------------- +// romfs_fo_fsync(). +// Force the file out to data storage. + +static int romfs_fo_fsync (struct CYG_FILE_TAG *fp, int mode ) +{ + // Data is always permanently where it belongs, nothing to do + // here. + + return ENOERR; +} + +// ------------------------------------------------------------------------- +// romfs_fo_close() +// Close a file. We just clear out the data pointer. + +static int romfs_fo_close (struct CYG_FILE_TAG *fp) +{ + fp->f_data = 0; // zero data pointer + + return ENOERR; +} + +// ------------------------------------------------------------------------- +//romfs_fo_fstat() +// Get file status. + +static int romfs_fo_fstat (struct CYG_FILE_TAG *fp, struct stat *buf ) +{ + romfs_node *node = (romfs_node *)fp->f_data; + romfs_disk *disk = (romfs_disk*)(fp->f_mte->data); + + // Fill in the status + buf->st_mode = node->mode; + buf->st_ino = (ino_t)(node - &disk->node[0]); + buf->st_dev = disk->dev_id; + buf->st_nlink = node->nlink; + buf->st_uid = node->uid; + buf->st_gid = node->gid; + buf->st_size = node->size; + buf->st_atime = node->ctime; + buf->st_mtime = node->ctime; + buf->st_ctime = node->ctime; + + return ENOERR; +} + +// ------------------------------------------------------------------------- +// romfs_fo_getinfo() +// Get info. Currently only supports fpathconf(). + +static int romfs_fo_getinfo (struct CYG_FILE_TAG *fp, int key, void *buf, int len ) +{ + romfs_node *node = (romfs_node *)fp->f_data; + int err; + + switch( key ) + { + case FS_INFO_CONF: + err = romfs_pathconf( node, (struct cyg_pathconf_info *)buf ); + break; + + default: + err = EINVAL; + } + return err; +} + +// ------------------------------------------------------------------------- +// romfs_fo_setinfo() +// Set info. Nothing supported here. + +static int romfs_fo_setinfo (struct CYG_FILE_TAG *fp, int key, void *buf, int len ) +{ + // No setinfo key supported at present + + return ENOERR; +} + + +//========================================================================== +// Directory operations + +// ------------------------------------------------------------------------- +// romfs_fo_dirread() +// Read a single directory entry from a file. + +static int romfs_fo_dirread (struct CYG_FILE_TAG *fp, struct CYG_UIO_TAG *uio) +{ + romfs_node *dir = (romfs_node *)fp->f_data; + off_t pos = fp->f_offset; + int err = ENOERR; + struct dirent *ent = (struct dirent *)uio->uio_iov[0].iov_base; + char *nbuf = ent->d_name; + int nlen = sizeof(ent->d_name)-1; + off_t len = uio->uio_iov[0].iov_len; + romfs_dirent *d = NULL; + cyg_uint8 *buf; + size_t size; + int i; + + if( len < sizeof(struct dirent) ) + return EINVAL; + + // Get the next entry + err = findbuffer_node( (romfs_disk *)fp->f_mte->data, dir, pos, &buf, &size ); + if( err != ENOERR || size == 0 || pos >= dir->size ) + return err; + + d = (romfs_dirent *)buf; + + for ( i = 0 ; i < nlen && d->name[i] ; i++, nbuf++ ) + *nbuf = d->name[i]; + + // A successful read. Terminate the entry name with a NUL, set the + // residue and set the file offset to restart at the next + // directory entry. + + *nbuf = '\0'; + uio->uio_resid -= sizeof(struct dirent); + fp->f_offset = d->next; + + return ENOERR; +} + +// ------------------------------------------------------------------------- +// romfs_fo_dirlseek() +// Seek directory to start. + +static int romfs_fo_dirlseek (struct CYG_FILE_TAG *fp, off_t *pos, int whence ) +{ + // Only allow SEEK_SET to zero + + if( whence != SEEK_SET || *pos != 0) + return EINVAL; + + *pos = fp->f_offset = 0; + + return ENOERR; +} + +// ------------------------------------------------------------------------- +// EOF romfs.c diff --git a/packages/fs/rom/current/support/Makefile b/packages/fs/rom/current/support/Makefile new file mode 100644 --- /dev/null +++ b/packages/fs/rom/current/support/Makefile @@ -0,0 +1,30 @@ +#========================================================================== +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Red Hat eCos Public License +# Version 1.1 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http:#www.redhat.com/ +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Configurable Operating System, +# released September 30, 1998. +# +# The Initial Developer of the Original Code is Red Hat. +# Portions created by Red Hat are +# Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +# All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +#========================================================================== + +CC = gcc +CFLAGS = -ggdb -Wall + +mk_romfs: diff --git a/packages/fs/rom/current/support/mk_romfs.c b/packages/fs/rom/current/support/mk_romfs.c new file mode 100644 --- /dev/null +++ b/packages/fs/rom/current/support/mk_romfs.c @@ -0,0 +1,698 @@ +//========================================================================== +// +// mk_romfs.c +// +// Create ROM file system image +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): richard.panton@3glab.com +// Contributors: richard.panton@3glab.com +// Date: 2000-07-25 +// Purpose: ROM file system +// Description: This program creates a ROM file system image, suitable +// for use with the sample ROM file system implemented by +// this package. +// * CAUTION! * This is host code and can only be built +// in a host, e.g. Linux, environment. +// +//####DESCRIPTIONEND#### +//========================================================================== + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +//========================================================================== +// +// CONFIGURABLE ITEMS HERE +// +//========================================================================== + +// define LONG to be a four byte unsigned integer on the host +#define LONG unsigned long + +// define SHORT to be a two byte unsigned integer on the host +#define SHORT unsigned short + +// All data files should be aligned to this sized boundary (minimum probably 32) +#define DATA_ALIGN 32 + +// The data stored in a directory should be aligned to this size boundary +#define DIRECTORY_ALIGN 32 + +// All executable files should be aligned to this sized boundary (minimum probably 32) +#define EXEC_ALIGN 32 + +// Undefine this if the host filesystem does not support lstat() +#define HAS_LSTAT + +//========================================================================== + +// Return (n) aligned to the next (b) byte boundary +#define ALIGN_TO( n, b ) (( (n) + (b)-1 ) & ~((b)-1)) + +// Set the stat call to use +#ifdef HAS_LSTAT +#define get_status( p, b ) lstat( (p), (b) ) +#else +#define get_status( p, b ) stat( (p), (b) ) +#endif + +// This is how we identify a directory from its mode +#define IS_DIRECTORY( m ) (S_ISDIR(m)) + +// This is how we identify a data file from its mode +#define IS_DATAFILE( m ) (S_ISREG(m) && ((m)&S_IXUSR) == 0 ) + +// This is how we identify an executable from its mode +#define IS_EXECUTABLE( m ) (S_ISREG(m) && ((m)&S_IXUSR) != 0 ) + +// This is how we identify a symbolic link from its mode +#define IS_SYMLINK( m ) (S_ISLNK(m)) + +#define ROMFS_MAGIC 0x526f6d2e + +//========================================================================= +// EXIT CODES +#define EXIT_SUCCESS 0 +#define EXIT_ARGS 1 +#define EXIT_MALLOC 2 +#define EXIT_FILESYS 3 +#define EXIT_WRITE 4 +#define EXIT_SEEK 5 +#define EXIT_COMPILE 6 +#define EXIT_BUG 7 + + + +// These are the structures we will build into the ROMFS image. +// The sizes of these structures should be fixed for all architectures +typedef struct romfs_dirent { + LONG node; // 4 + LONG next; // 8 + char name[0]; // 8 + strlen(name) + 1 +} romfs_dirent; // Aligns to next 32 byte boundary + +typedef struct romfs_node { + LONG mode; // 4 + LONG nlink; // 8 + SHORT uid; // 10 + SHORT gid; // 12 + LONG size; // 16 + LONG ctime; // 20 + LONG data_offset; // 24 + char pad[8]; // 32 +} romfs_node; // Next node begins here + +typedef struct romfs_disk { + LONG magic; // 4 + LONG nodecount; // 8 + LONG disksize; // 12 + LONG dev_id; // 16 + char name[16]; // 32 +} romfs_disk; // Nodes start here + +// This is the holding structure for a node +typedef struct node { + const char *path; // Filename (inc. path) of a link to this node + size_t size; // Size of file/directory/link + mode_t mode; // Type and permissions + uid_t uid; // Owner id + gid_t gid; // Group id + time_t ctime; // File creation time + int nodenum; // Nodenumber of this node in the ROMFS image + dev_t device; // Device (for hardlink check) + ino_t inode; // Inode (for hardlink check) + int nlink; // [DIRECTORIES] Number of sub-directories [FILES] hard links + romfs_dirent *entry; // [DIRECTORIES] Points to an array of directory entries + int entry_size; // Size to be allocated to file (includes alignment bytes) + unsigned long offset; // Offset within ROMFS image of data + struct node *sibling; // Points to the next entry in this directory + struct node *child; // [DIRECTORIES] Points to any subdirectories + struct node *next_in_rom; // Next in ROMFS write order + struct node *next_multilink;// Next node that is multilinked +} node; + +static int nodes = 0; +static char *prog; +static int verbose = 1; +static int dowrite = 1; +static int bigendian = 0; +static int hardlinks = 0; +static unsigned long coffset = 0; +static node * first = NULL; +static node ** last_p = &first; +static node * first_multilink = NULL; +static node ** last_multilink_p = &first_multilink; +static int fd = -1; + +#define VERB_NONE 0 +#define VERB_MINIMUM 1 +#define VERB_SUB 2 +#define VERB_MAX 3 +#define VERB_EXCESSIVE 4 + +// Use gcc format argument checking on this function, which cannot return +static void fatal_error( int exitcode, const char *fmt, ... ) \ + __attribute__ (( noreturn,format (printf, 2, 3) )); + +// Use gcc format argument checking on this function +static void verb_printf( int level, const char *fmt, ... ) \ + __attribute__ ((format (printf, 2, 3) )); + +static void fatal_error( int exitcode, const char *fmt, ... ) { + va_list v; + + va_start( v, fmt ); + vfprintf( stderr, fmt, v ); + + exit(exitcode); +} + +static void verb_printf( int level, const char *fmt, ... ){ + if ( level <= verbose ) { + va_list v; + va_start( v,fmt ); + vprintf(fmt, v); + } +} + +static void *mymalloc( size_t size ) { + void *p = malloc(size); + if ( !p ) { + fatal_error( EXIT_MALLOC, "Out of memory allocating %d bytes\n", size ); + } + return p; +} + +static void myrealloc( void **o, size_t newsize ) { + if ( *o == NULL ) + *o = mymalloc( newsize ); + else if ( !(*o = realloc( *o, newsize )) ) { + fatal_error( EXIT_MALLOC, "Out of memory re-allocating %d bytes\n", newsize ); + } +} + +static void outputlong( unsigned char *b, unsigned long w ) { + if ( bigendian ) { + b[0] = (w>>24) & 0xff; + b[1] = (w>>16) & 0xff; + b[2] = (w>> 8) & 0xff; + b[3] = (w ) & 0xff; + } else { + b[3] = (w>>24) & 0xff; + b[2] = (w>>16) & 0xff; + b[1] = (w>> 8) & 0xff; + b[0] = (w ) & 0xff; + } +} + +static void outputshort( unsigned char *b, unsigned short w ) { + if ( bigendian ) { + b[0] = (w>> 8) & 0xff; + b[1] = (w ) & 0xff; + } else { + b[1] = (w>> 8) & 0xff; + b[0] = (w ) & 0xff; + } +} + +static const char *AddDirEntry( const char *name, node *parent_node, int node_num ) { + int this_size = ((strlen(name) + 4 + 4 + 1) + 31) & ~31; + int start = parent_node->size; + romfs_dirent *g; + myrealloc( (void**)&parent_node->entry, (parent_node->size += this_size) ); + g = (romfs_dirent *)((unsigned char *)parent_node->entry + start); + memset( (void*)g, '\0', this_size ); + outputlong( (char*)&g->node, node_num); + outputlong( (char*)&g->next, parent_node->size); + strcpy(g->name,name); + verb_printf( VERB_MAX, "\t%s --> node %d\n", name, node_num ); + return (const char *)g->name; +} + +extern int errno; + +static node * FindLink( dev_t d, ino_t i ) { + // See if the node has been previously included by checking the device/inode + // combinations of all known multi-linked nodes + node *np = first_multilink; + + for ( ; np ; np = np->next_multilink ) { + if ( np->device == d && np->inode == i ) + return np; + } + return NULL; +} + +static node * GetNodeInfo( const char *path, const char *name, int *hlink ) { + char newpath[1024]; + node *node, *lnode; + struct stat stbuff; + + sprintf(newpath,"%s/%s",path,name); + if ( (get_status(newpath,&stbuff)) < 0 ) { + fatal_error(EXIT_FILESYS, "stat(%s) failed: %s\n", newpath, strerror(errno)); + } + if ( !(stbuff.st_mode & S_IRUSR) ) { + fatal_error(EXIT_FILESYS, "\"%s\" is not readable\n", newpath ); + } + if ( hardlinks && S_ISREG( stbuff.st_mode ) && stbuff.st_nlink > 1 ) { + + // See if this node has already been loaded + lnode = FindLink( stbuff.st_dev, stbuff.st_ino ); + + if ( lnode ) { + lnode->nlink++; + *hlink = 1; + return lnode; // Return the found link instead + } + + // Create a new node + node = mymalloc( sizeof(struct node) ); + + // Incorporate the new link into the 'multi-linked' node list + *last_multilink_p = node; + last_multilink_p = &node->next_multilink; + } else { + // Create a new node + node = mymalloc( sizeof(struct node) ); + } + node->path = strdup( newpath ); + // We re-calculate the size for directories + node->size = IS_DIRECTORY( stbuff.st_mode ) ? 0 : stbuff.st_size; + node->mode = stbuff.st_mode; + node->uid = stbuff.st_uid; + node->gid = stbuff.st_gid; + node->ctime = stbuff.st_ctime; + node->nodenum = nodes++; + node->device = stbuff.st_dev; + node->inode = stbuff.st_ino; + // We always re-calculate the number of links + node->nlink = IS_DIRECTORY( stbuff.st_mode ) ? 2 : 1; + node->entry = NULL; + node->entry_size = 0; + node->offset = 0; + node->sibling = NULL; + node->child = NULL; + node->next_in_rom = NULL; + node->next_multilink = NULL; + *hlink = 0; + return node; +} + +static void ScanDirectory(node *mynode, int p_node) { + + DIR *dh; + struct dirent *e; + node **last_p = &mynode->child; + node *th; + int was_hardlinked; + + if ( (dh = opendir( mynode->path )) == NULL ) { + perror(mynode->path); + return; + } + + verb_printf(VERB_EXCESSIVE, "Construct directory '%s'(%d):\n", + mynode->path, mynode->nodenum ); + + // Add . & .. here because they MUST be present in the image + AddDirEntry( ".", mynode, mynode->nodenum ); + AddDirEntry( "..", mynode, p_node ); + + while ( (e = readdir( dh )) ) { + // Ignore . & .. here because they MAY NOT be in the host filesystem + if ( strcmp(e->d_name,".") && strcmp(e->d_name,"..") ) { + + + th = GetNodeInfo( mynode->path, e->d_name, &was_hardlinked ); + AddDirEntry( e->d_name, mynode, th->nodenum ); + + if ( !was_hardlinked ) { + verb_printf( VERB_EXCESSIVE, "\t\tNew node %d for entry '%s'\n", th->nodenum, e->d_name); + *last_p = th; + last_p = &th->sibling; + } else { + verb_printf( VERB_EXCESSIVE, "\t\tRe-used node %d for entry '%s'\n", th->nodenum, e->d_name); + } + } + } + closedir( dh ); + verb_printf(VERB_EXCESSIVE,"Completed '%s'. Checking for child directories...\n", mynode->path); + + for ( th = mynode->child ; th ; th = th->sibling ) { + if ( IS_DIRECTORY( th->mode ) ) { + mynode->nlink++; + ScanDirectory( th, mynode->nodenum ); + } + } +} + +static void AllocateSpaceToDirectories( node *first ) { + node *np; + + for ( np = first ; np ; np = np->sibling ) { + if ( IS_DIRECTORY( np->mode ) ) { + // The first node is a directory. Add its data + np->offset = coffset; + np->entry_size = ALIGN_TO( np->size, DIRECTORY_ALIGN ); + coffset += np->entry_size; + + verb_printf( VERB_MAX, "\t\tnode %5d : 0x%06lX (+0x%05X)\n", + np->nodenum, np->offset, np->entry_size ); + + // Link this node into the write order chain. + // For node 0 (the root), this will overwrite the first pointer with itself + *last_p = np; + last_p = &np->next_in_rom; + } + } + + // Now add any child directories + for ( np = first ; np ; np = np->sibling ) { + if ( IS_DIRECTORY( np->mode ) && np->child ) + AllocateSpaceToDirectories( np->child ); + } +} + +static void AllocateSpaceToDataFiles( node *first ) { + node *np; + + // There are two loops below. It CAN be done in just one, but this re-orders + // the file positions in relation to their inode numbers. To keep it simple + // to check, allocation takes place in the first loop, recursion in the second + + // Search for child data files + for ( np = first->child ; np ; np = np->sibling ) { + if ( IS_DATAFILE( np->mode ) || IS_SYMLINK( np->mode ) ) { + np->offset = coffset; + np->entry_size = ALIGN_TO( np->size, DATA_ALIGN ); + coffset += np->entry_size; + + // Link in to the rom write order list + *last_p = np; + last_p = &np->next_in_rom; + + verb_printf( VERB_MAX, "\t\tnode %5d : 0x%06lX (+0x%05X)\n", + np->nodenum, np->offset, np->entry_size ); + } + } + + // Recurse into sub-directories + for ( np = first->child ; np ; np = np->sibling ) { + if ( IS_DIRECTORY( np->mode ) ) { + AllocateSpaceToDataFiles( np ); + } + } +} + +static void AllocateSpaceToExecutables( node *first ) { + node *np; + + // The first node is a directory. Don't bother with that... + + // Search for child executables + for ( np = first->child ; np ; np = np->sibling ) { + if ( IS_EXECUTABLE( np->mode ) ) { + np->offset = coffset; + np->entry_size = ALIGN_TO( np->size, EXEC_ALIGN ); + coffset += np->entry_size; + + // Link in to the rom write order list + *last_p = np; + last_p = &np->next_in_rom; + + verb_printf( VERB_MAX, "\t\tnode %5d : 0x%06lX (+0x%05X)\n", + np->nodenum, np->offset, np->entry_size ); + } + } + + // Recurse into sub-directories + for ( np = first->child ; np ; np = np->sibling ) { + if ( IS_DIRECTORY( np->mode ) ) { + AllocateSpaceToExecutables( np ); + } + } +} + +static void WriteNode( int fd, node *np ) { + romfs_node anode; + char padhere[9]; + outputlong( (char*) &anode.mode, np->mode ); + outputlong( (char*) &anode.nlink, np->nlink ); + outputshort((char*) &anode.uid, np->uid ); + outputshort((char*) &anode.gid, np->gid ); + outputlong( (char*) &anode.size, np->size ); + outputlong( (char*) &anode.ctime, np->ctime ); + outputlong( (char*) &anode.data_offset, np->offset ); + sprintf( padhere, "<%6d>", np->nodenum ); + memcpy( anode.pad, padhere, 8 ); + if ( dowrite && write( fd, (void*)&anode, sizeof(anode) ) != sizeof(anode) ) + fatal_error(EXIT_WRITE, "Error writing node %d (%s): %s\n", np->nodenum, np->path, strerror(errno) ); +} + +static int WriteNodeAndSiblings( int fd, int nodenum, node *first ) { + node *np; + + for ( np = first ; np ; np = np->sibling ) { + if ( np->nodenum != nodenum++ ) { + fatal_error(EXIT_BUG, "BUG: Out of sequence node number; got %d, expected %d\n", np->nodenum, nodenum-1); + } + WriteNode( fd, np ); + } + + for ( np = first ; np ; np = np->sibling ) { + if ( IS_DIRECTORY( np->mode ) && np->child ) { + nodenum = WriteNodeAndSiblings( fd, nodenum, np->child ); + } + } + return nodenum; +} + +static void WriteNodeTable( int fd ) { + romfs_disk header; + int wnodes; + + outputlong( (char*) &header.magic, ROMFS_MAGIC ); + outputlong( (char*) &header.nodecount, nodes ); + outputlong( (char*) &header.disksize, coffset ); + outputlong( (char*) &header.dev_id, 0x01020304 ); + strcpy( header.name, "ROMFS v1.0" ); + if ( dowrite && write( fd, (void*)&header, sizeof(header) ) != sizeof(header) ) + fatal_error(EXIT_WRITE, "Error writing ROMFS header: %s\n", strerror(errno) ); + + if ( (wnodes = WriteNodeAndSiblings( fd, 0, first )) != nodes ) { + fatal_error(EXIT_BUG, "BUG: Lost/gained some nodes; wrote %d, expected %d\n", wnodes, nodes ); + } +} + +static void WriteData( int fd, node *np ) { + char newpath[1024]; + int ffd; + unsigned long todo; + + if ( IS_SYMLINK( np->mode ) ) { + if ( (ffd = readlink( np->path, newpath, sizeof(newpath) )) < 0 ) + fatal_error(EXIT_FILESYS, "Error reading symlink \"%s\": %s\n", np->path, strerror(errno) ); + + if ( !dowrite ) return; + + if ( lseek( fd, np->offset, SEEK_SET ) != np->offset ) + fatal_error(EXIT_SEEK, "Error seeking to offset 0x%lX: %s\n", np->offset, strerror(errno) ); + + if ( write( fd, newpath, ffd ) != ffd ) + fatal_error(EXIT_WRITE, "Write error: %s\n", strerror(errno) ); + + return; + } + + if ( (ffd=open(np->path, O_RDONLY)) < 0 ) + fatal_error(EXIT_FILESYS, "Error opening \"%s\": %s\n", np->path, strerror(errno) ); + + if ( dowrite && lseek( fd, np->offset, SEEK_SET ) != np->offset ) + fatal_error(EXIT_SEEK, "Error seeking to offset 0x%lX: %s\n", np->offset, strerror(errno) ); + + todo = np->size; + while ( todo >= 1024 ) { + if ( read( ffd, newpath, 1024 ) != 1024 ) + fatal_error(EXIT_FILESYS, "Error reading file \"%s\" at offset 0x%lX: %s\n", np->path, np->size - todo, strerror(errno) ); + if ( dowrite && write( fd, newpath, 1024 ) != 1024 ) + fatal_error(EXIT_WRITE, "Write error: %s\n", strerror(errno) ); + todo -= 1024; + } + + if ( todo ) { + if ( read( ffd, newpath, todo ) != todo ) + fatal_error(EXIT_FILESYS, "Error reading file \"%s\" at offset 0x%lX: %s\n", np->path, np->size - todo, strerror(errno) ); + if ( dowrite && write( fd, newpath, todo ) != todo ) + fatal_error(EXIT_WRITE, "Write error: %s\n", strerror(errno) ); + } + + close(ffd); + +} + +static void WriteDataBlocks( int fd, node *first ) { + for ( ; first ; first = first->next_in_rom ) { + if ( dowrite && lseek( fd, first->offset, SEEK_SET ) != first->offset ) + fatal_error(EXIT_SEEK, "Error seeking to offset 0x%lX: %s\n", first->offset, strerror(errno) ); + if ( IS_DIRECTORY( first->mode ) ) { + if ( dowrite && write( fd, first->entry, first->size ) != first->size ) + fatal_error(EXIT_WRITE, "Write error: %s\n", strerror(errno) ); + } else { + WriteData( fd, first ); + } + } +} + +static void usage(void) { + fprintf(stderr,"\n%s - Create an eCos ROMFS disk image from the files\n",prog); + fprintf(stderr,"%*s contained under a specified directory\n\n", strlen(prog), ""); + fprintf(stderr,"Usage: %s [options] \n", prog); + fprintf(stderr," fs_root is the directory containing the files to package into the ROMFS image\n"); + fprintf(stderr," fs_file is the name of the ROMFS image file to create\n"); + fprintf(stderr," Options include:\n"); + fprintf(stderr," -v / -q increase / decrease verbosity\n"); + fprintf(stderr," -n do everything EXCEPT creating the output file\n"); + fprintf(stderr," -b write a big-endian image (default is little endian\n"); + fprintf(stderr," -l collapse hard links to a single node\n"); + fprintf(stderr,"\n"); + exit(EXIT_ARGS); +} + +int main(int ac, char *av[]) { + int dummy; + + prog = av[0]; + + // Check structure sizes + if (sizeof(romfs_node) != 32) { + fatal_error(EXIT_COMPILE , "Size of romfs_node is %d, NOT 32\n", sizeof(romfs_node) ); + } else if (sizeof(romfs_dirent) != 8) { + fatal_error(EXIT_COMPILE , "Size of romfs_dirent is %d, NOT 8\n", sizeof(romfs_dirent) ); + } else if (sizeof(romfs_disk) != 32) { + fatal_error(EXIT_COMPILE , "Size of romfs_disk is %d, NOT 32\n", sizeof(romfs_disk) ); + } + + // Parse option arguments + while ( ac > 1 && av[1][0] == '-' ) { + char *o = &av[1][1]; + for ( ; *o ; o++ ) { + switch ( *o ) { + case 'q' : + verbose--; + break; + case 'v' : + verbose++; + break; + case 'n' : + dowrite = 0; + break; + case 'b' : + bigendian = 1; + break; + case 'l' : + hardlinks = 1; + break; + default : + fprintf(stderr,"%s: Invalid flag -%c\n", prog, *o ); + usage(); + } + } + av++; ac--; + } + + // Check remaining arguments + if ( ac != 3 ) usage(); + + + verb_printf( VERB_MINIMUM, "%s: Verbosity %d %s%s endian\n", + prog, verbose, + dowrite ? "" : "no write, ", + bigendian ? "big" : "little" ); + + // Phase 1. Recursively scan the root directory for files and directories. + verb_printf(VERB_MINIMUM, "Phase 1 - Build file list\n"); + + first = GetNodeInfo( av[1], ".", &dummy ); // Initialize the root node entry. + ScanDirectory( first, 0 ); + + // Phase 2. Work out space allocations for filesystem + verb_printf(VERB_MINIMUM, "Phase 2 - Calculate space allocation\n"); + coffset = sizeof(romfs_disk) + nodes * sizeof(romfs_node); + verb_printf(VERB_MAX,"\t\tnode table : 0x000000 (+0x%05lX) %d nodes\n", coffset, nodes ); + + // Phase 2a. Work out space allocations for the directories of the filesystem + verb_printf(VERB_SUB,"Phase 2a - * Directories\n"); + coffset = ALIGN_TO( coffset, DIRECTORY_ALIGN ); + AllocateSpaceToDirectories( first ); + + // Phase 2b. Work out space allocations for the data files of the filesystem + verb_printf(VERB_SUB,"Phase 2b - * Regular files\n"); + coffset = ALIGN_TO( coffset, DATA_ALIGN ); + AllocateSpaceToDataFiles( first ); + + // Phase 2c. Work out space allocations for the executable files of the filesystem + verb_printf(VERB_SUB,"Phase 2c - * Executable files\n"); + coffset = ALIGN_TO( coffset, EXEC_ALIGN ); + AllocateSpaceToExecutables( first ); + + // Round off the image size... + coffset = ALIGN_TO( coffset, EXEC_ALIGN ); + + // Phase 3. Write out the image file + verb_printf(VERB_MINIMUM, "Phase 3 - Construct ROMFS image file (%ld kb)\n", ALIGN_TO( coffset, 1024 )/1024); + + if ( dowrite ) { + if ( (fd = open( av[2], O_WRONLY|O_CREAT|O_TRUNC, 0666 )) < 0 ) { + fatal_error(EXIT_WRITE,"Failed to open output file '%s', errno=%d\n", av[2], errno ); + } + } else { + verb_printf(VERB_NONE," (No image is being written)\n"); + } + + verb_printf(VERB_SUB,"Phase 3a - * Node table\n"); + WriteNodeTable( fd ); + + verb_printf(VERB_SUB,"Phase 3b - * Data blocks\n"); + WriteDataBlocks( fd, first ); + + if ( fd >= 0 ) close(fd); + + verb_printf(VERB_MINIMUM, "%s completed\n", av[2] ); + + return 0; +} diff --git a/packages/fs/rom/current/tests/fileio1.c b/packages/fs/rom/current/tests/fileio1.c new file mode 100644 --- /dev/null +++ b/packages/fs/rom/current/tests/fileio1.c @@ -0,0 +1,357 @@ +//========================================================================== +// +// fileio1.c +// +// Test fileio system +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg +// Contributors: nickg, richard.panton@3glab.com +// Date: 2000-05-25 +// Purpose: Test fileio system +// Description: This test uses the testfs to check out the initialization +// and basic operation of the fileio system +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include +#include +#include + +#include // base kernel types +#include // tracing macros +#include // assertion macros + +#include +#include +#include +#include +#include +#include + +#include + +#include +#include // HAL polled output + +#include // Address of ROMFS + +//========================================================================== + +MTAB_ENTRY( romfs_mte1, + "/", + "romfs", + "", + (CYG_ADDRWORD) CYGNUM_FS_ROM_BASE_ADDRESS ); + + +//========================================================================== + +#define SHOW_RESULT( _fn, _res ) \ +diag_printf(": " #_fn "() returned %d %s\n", _res, _res<0?strerror(errno):""); + +#define CHKFAIL_TYPE( _fn, _res, _type ) { \ +if ( _res != -1 ) \ + diag_printf(": " #_fn "() returned %d (expected -1)\n", _res); \ +else if ( errno != _type ) \ + diag_printf(": " #_fn "() failed with errno %d (%s),\n expected %d (%s)\n", errno, strerror(errno), _type, strerror(_type) ); \ +} + +//========================================================================== + +#define IOSIZE 100 + +#define LONGNAME1 "long_file_name_that_should_take_up_more_than_one_directory_entry_1" +#define LONGNAME2 "long_file_name_that_should_take_up_more_than_one_directory_entry_2" + + +//========================================================================== + +#ifndef CYGPKG_LIBC_STRING + +char *strcat( char *s1, const char *s2 ) +{ + char *s = s1; + while( *s1 ) s1++; + while( (*s1++ = *s2++) != 0); + return s; +} + +#endif + +//========================================================================== + +static void listdir( char *name, int statp ) +{ + int err; + DIR *dirp; + + diag_printf(": reading directory %s\n",name); + + dirp = opendir( name ); + if( dirp == NULL ) SHOW_RESULT( opendir, -1 ); + + for(;;) + { + struct dirent *entry = readdir( dirp ); + + if( entry == NULL ) + break; + + diag_printf(": entry %14s",entry->d_name); + if( statp ) + { + char fullname[PATH_MAX]; + struct stat sbuf; + + if( name[0] ) + { + strcpy(fullname, name ); + if( !(name[0] == '/' && name[1] == 0 ) ) + strcat(fullname, "/" ); + } + else fullname[0] = 0; + + strcat(fullname, entry->d_name ); + + err = stat( fullname, &sbuf ); + if( err < 0 ) + { + if( errno == ENOSYS ) + diag_printf(" "); + else SHOW_RESULT( stat, err ); + } + else + { + diag_printf(" [mode %08x ino %08x nlink %d size %d]", + sbuf.st_mode,sbuf.st_ino,sbuf.st_nlink,sbuf.st_size); + } + } + + diag_printf("\n"); + } + + err = closedir( dirp ); + if( err < 0 ) SHOW_RESULT( stat, err ); +} + +//========================================================================== + +static void copyfile( char *name2, char *name1 ) +{ + + int err; + char buf[IOSIZE]; + int fd1, fd2; + ssize_t done, wrote; + + diag_printf(": copy file %s -> %s\n",name2,name1); + + err = access( name1, F_OK ); + if( err < 0 && errno != EACCES ) SHOW_RESULT( access, err ); + + err = access( name2, F_OK ); + if( err != 0 ) SHOW_RESULT( access, err ); + + fd1 = open( name1, O_WRONLY|O_CREAT ); + if( fd1 < 0 ) SHOW_RESULT( open, fd1 ); + + fd2 = open( name2, O_RDONLY ); + if( fd2 < 0 ) SHOW_RESULT( open, fd2 ); + + for(;;) + { + done = read( fd2, buf, IOSIZE ); + if( done < 0 ) SHOW_RESULT( read, done ); + + if( done == 0 ) break; + + wrote = write( fd1, buf, done ); + if( wrote != done ) SHOW_RESULT( write, wrote ); + + if( wrote != done ) break; + } + + err = close( fd1 ); + if( err < 0 ) SHOW_RESULT( close, err ); + + err = close( fd2 ); + if( err < 0 ) SHOW_RESULT( close, err ); + +} + +//========================================================================== + +static void comparefiles( char *name2, char *name1 ) +{ + int err; + char buf1[IOSIZE]; + char buf2[IOSIZE]; + int fd1, fd2; + ssize_t done1, done2; + int i; + + diag_printf(": compare files %s == %s\n",name2,name1); + + err = access( name1, F_OK ); + if( err != 0 ) SHOW_RESULT( access, err ); + + err = access( name1, F_OK ); + if( err != 0 ) SHOW_RESULT( access, err ); + + fd1 = open( name1, O_RDONLY ); + if( fd1 < 0 ) SHOW_RESULT( open, fd1 ); + + fd2 = open( name2, O_RDONLY ); + if( fd2 < 0 ) SHOW_RESULT( open, fd2 ); + + for(;;) + { + done1 = read( fd1, buf1, IOSIZE ); + if( done1 < 0 ) SHOW_RESULT( read, done1 ); + + done2 = read( fd2, buf2, IOSIZE ); + if( done2 < 0 ) SHOW_RESULT( read, done2 ); + + if( done1 != done2 ) + diag_printf("Files different sizes\n"); + + if( done1 == 0 ) break; + + for( i = 0; i < done1; i++ ) + if( buf1[i] != buf2[i] ) + { + diag_printf("buf1[%d](%02x) != buf1[%d](%02x)\n",i,buf1[i],i,buf2[i]); + CYG_TEST_FAIL("Data in files not equal\n"); + } + } + + err = close( fd1 ); + if( err < 0 ) SHOW_RESULT( close, err ); + + err = close( fd2 ); + if( err < 0 ) SHOW_RESULT( close, err ); + +} + +//========================================================================== +// main + +int main( int argc, char **argv ) +{ + int err; + char address[16]; + + CYG_TEST_INIT(); + + // -------------------------------------------------------------- + + diag_printf(": ROMFS root follows\n"); + diag_printf(": Note that dev cannot be stat()ed\n"); + listdir( "/", true ); + + diag_printf(": cd /etc\n" ); + err = chdir( "/etc" ); + if ( err < 0 ) SHOW_RESULT( chdir, err ); + + diag_printf(": ROMFS list of '' follows\n"); + listdir( "", true ); + + diag_printf(": ROMFS list of /etc follows\n"); + listdir( "/etc", true ); + + diag_printf(": ROMFS list of . follows\n"); + listdir( ".", true ); + + err = mount( "", "/var", "ramfs" ); + if( err < 0 ) SHOW_RESULT( mount, err ); + + copyfile( "/etc/passwd", "/var/passwd_copy" ); + + comparefiles( "/etc/passwd", "/var/passwd_copy" ); + + diag_printf(": ROMFS list of / follows\n"); + diag_printf(": Note that /var now gives stat() info for RAMFS\n"); + listdir( "/", true ); + + diag_printf(": Mount ROMFS again onto /mnt\n"); + sprintf( address, "%p", (void*)CYGNUM_FS_ROM_BASE_ADDRESS ); + err = mount( address, "/mnt", "romfs" ); + if( err < 0 ) SHOW_RESULT( mount, err ); + + comparefiles( "/etc/passwd", "/mnt/etc/passwd" ); + + + err = mkdir( "/foo", 0 ); + CHKFAIL_TYPE( mkdir, err, EROFS ); + + err = rename( "/var", "/tmp" ); // RAMFS is mounted here + CHKFAIL_TYPE( rename, err, EXDEV ); + + err = rename( "/var/passwd_copy", "/mnt/etc/passwd_copy" ); + CHKFAIL_TYPE( rename, err, EXDEV ); + + err = rename( "/etc", "/tmp" ); + CHKFAIL_TYPE( rename, err, EROFS ); + + diag_printf(": cd /etc\n"); + err = chdir( "/etc" ); + if( err < 0 ) SHOW_RESULT( chdir, err ); + + err = chdir( "/mnt/etc" ); + if( err < 0 ) SHOW_RESULT( chdir, err ); + + listdir( ".", true ); + + diag_printf(": unlink /tmp\n"); + err = unlink( "/tmp" ); + CHKFAIL_TYPE( unlink, err, EROFS ); + + diag_printf(": mount random area\n"); + sprintf(address, "%p", (void*)(CYGNUM_FS_ROM_BASE_ADDRESS + 0x20000)); + err = mount( address, "/tmp", "romfs" ); + SHOW_RESULT( mount, err ); + + err = umount( "/mnt" ); + if( err < 0 ) SHOW_RESULT( umount, err ); + + err = umount( "/var" ); + if( err < 0 ) SHOW_RESULT( umount, err ); + + err = umount( "/" ); + if( err < 0 ) SHOW_RESULT( umount, err ); + + + CYG_TEST_PASS_FINISH("fileio1"); +} + +// ------------------------------------------------------------------------- +// EOF fileio1.c diff --git a/packages/hal/arm/aeb/current/ChangeLog b/packages/hal/arm/aeb/current/ChangeLog --- a/packages/hal/arm/aeb/current/ChangeLog +++ b/packages/hal/arm/aeb/current/ChangeLog @@ -1,3 +1,7 @@ +2001-03-08 Jesper Skov + + * cdl/hal_arm_aeb.cdl: Does not guarantee virtual vector support. + 2001-02-13 Gary Thomas * src/aeb_misc.c (hal_IRQ_handler): Use CYGNUM_HAL_INTERRUPT_NONE diff --git a/packages/hal/arm/aeb/current/cdl/hal_arm_aeb.cdl b/packages/hal/arm/aeb/current/cdl/hal_arm_aeb.cdl --- a/packages/hal/arm/aeb/current/cdl/hal_arm_aeb.cdl +++ b/packages/hal/arm/aeb/current/cdl/hal_arm_aeb.cdl @@ -56,6 +56,7 @@ cdl_package CYGPKG_HAL_ARM_AEB { implements CYGINT_HAL_DEBUG_GDB_STUBS implements CYGINT_HAL_DEBUG_GDB_STUBS_BREAK implements CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT + implements CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT_NOT_GUARANTEED define_proc { puts $::cdl_system_header "#define CYGBLD_HAL_TARGET_H " diff --git a/packages/hal/arm/arch/current/ChangeLog b/packages/hal/arm/arch/current/ChangeLog --- a/packages/hal/arm/arch/current/ChangeLog +++ b/packages/hal/arm/arch/current/ChangeLog @@ -1,3 +1,14 @@ +2001-03-28 Hugo Tyson + + * src/vectors.S (__GDB_stack_base): Increase stubs stack size to + "enough". We tend to have either RedBoot (with no interrupt + stack) or an app (with no stubs stack) these days, so I used + CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE. It defaults to 4k in + RedBoot which is enough compared to the previous hard-wired 1k. + The overflow occurred in RedBoot, with i82559 ether driver, during + GDB connection - but manifested as "network stack out of buffers" + because of a recursion in trying to report a trap. + 2001-02-24 Gary Thomas * include/hal_mmu.h (MMU_Control_X): Add - used by Win/CE. diff --git a/packages/hal/arm/arch/current/src/vectors.S b/packages/hal/arm/arch/current/src/vectors.S --- a/packages/hal/arm/arch/current/src/vectors.S +++ b/packages/hal/arm/arch/current/src/vectors.S @@ -1068,7 +1068,7 @@ irq_level: #ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS .balign 16 __GDB_stack_base: - .rept 0x400 + .rept CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE // rather than 1k .byte 0 .endr __GDB_stack: diff --git a/packages/hal/arm/cma230/current/ChangeLog b/packages/hal/arm/cma230/current/ChangeLog --- a/packages/hal/arm/cma230/current/ChangeLog +++ b/packages/hal/arm/cma230/current/ChangeLog @@ -1,3 +1,8 @@ +2001-03-08 Jesper Skov + + * cdl/hal_arm_cma230.cdl: Does not guarantee virtual vector + support. + 2001-02-20 Jesper Skov * cdl/hal_arm_cma230.cdl: Also enable -mthumb-interwork when diff --git a/packages/hal/arm/cma230/current/cdl/hal_arm_cma230.cdl b/packages/hal/arm/cma230/current/cdl/hal_arm_cma230.cdl --- a/packages/hal/arm/cma230/current/cdl/hal_arm_cma230.cdl +++ b/packages/hal/arm/cma230/current/cdl/hal_arm_cma230.cdl @@ -55,6 +55,7 @@ cdl_package CYGPKG_HAL_ARM_CMA230 { implements CYGINT_HAL_DEBUG_GDB_STUBS implements CYGINT_HAL_DEBUG_GDB_STUBS_BREAK implements CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT + implements CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT_NOT_GUARANTEED define_proc { puts $::cdl_system_header "#define CYGBLD_HAL_TARGET_H " diff --git a/packages/hal/arm/ebsa285/current/ChangeLog b/packages/hal/arm/ebsa285/current/ChangeLog --- a/packages/hal/arm/ebsa285/current/ChangeLog +++ b/packages/hal/arm/ebsa285/current/ChangeLog @@ -1,3 +1,9 @@ +2001-03-08 Jesper Skov + + * cdl/hal_arm_ebsa285.cdl: Removed + CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT_GUARANTEED which is now the + default. + 2001-02-23 Jesper Skov * include/hal_cache.h (HAL_FLASH_CACHES_OLD_MACROS): This platform diff --git a/packages/hal/arm/ebsa285/current/cdl/hal_arm_ebsa285.cdl b/packages/hal/arm/ebsa285/current/cdl/hal_arm_ebsa285.cdl --- a/packages/hal/arm/ebsa285/current/cdl/hal_arm_ebsa285.cdl +++ b/packages/hal/arm/ebsa285/current/cdl/hal_arm_ebsa285.cdl @@ -54,7 +54,6 @@ cdl_package CYGPKG_HAL_ARM_EBSA285 { implements CYGINT_HAL_DEBUG_GDB_STUBS implements CYGINT_HAL_DEBUG_GDB_STUBS_BREAK implements CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT - implements CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT_GUARANTEED implements CYGINT_HAL_ARM_MEM_REAL_REGION_TOP define_proc { diff --git a/packages/hal/arm/edb7xxx/current/ChangeLog b/packages/hal/arm/edb7xxx/current/ChangeLog --- a/packages/hal/arm/edb7xxx/current/ChangeLog +++ b/packages/hal/arm/edb7xxx/current/ChangeLog @@ -1,3 +1,9 @@ +2001-03-08 Jesper Skov + + * cdl/hal_arm_edb7xxx.cdl: Removed + CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT_GUARANTEED which is now the + default. + 2001-02-23 Jesper Skov * include/hal_cache.h (HAL_FLASH_CACHES_OLD_MACROS): This platform diff --git a/packages/hal/arm/edb7xxx/current/cdl/hal_arm_edb7xxx.cdl b/packages/hal/arm/edb7xxx/current/cdl/hal_arm_edb7xxx.cdl --- a/packages/hal/arm/edb7xxx/current/cdl/hal_arm_edb7xxx.cdl +++ b/packages/hal/arm/edb7xxx/current/cdl/hal_arm_edb7xxx.cdl @@ -55,7 +55,6 @@ cdl_package CYGPKG_HAL_ARM_EDB7XXX { implements CYGINT_HAL_DEBUG_GDB_STUBS implements CYGINT_HAL_DEBUG_GDB_STUBS_BREAK implements CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT - implements CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT_GUARANTEED define_proc { puts $::cdl_system_header "#define CYGBLD_HAL_TARGET_H " diff --git a/packages/hal/arm/iq80310/current/ChangeLog b/packages/hal/arm/iq80310/current/ChangeLog --- a/packages/hal/arm/iq80310/current/ChangeLog +++ b/packages/hal/arm/iq80310/current/ChangeLog @@ -1,3 +1,12 @@ +2001-03-12 Jonathan Larmour + + * src/iq80310_misc.c: Ensure case ranges have spaces around + identifiers to allow correct parsing by compiler. + +2001-02-27 Jonathan Larmour + + * src/diag/pci_bios.h: Remove CVS-unfriendly keyword substitutions + 2001-02-23 Jesper Skov * include/hal_cache.h (HAL_FLASH_CACHES_OLD_MACROS): This platform diff --git a/packages/hal/arm/iq80310/current/src/diag/pci_bios.h b/packages/hal/arm/iq80310/current/src/diag/pci_bios.h --- a/packages/hal/arm/iq80310/current/src/diag/pci_bios.h +++ b/packages/hal/arm/iq80310/current/src/diag/pci_bios.h @@ -44,11 +44,6 @@ /* */ /* Use: mon960 */ /* */ -/* $Source: /dev/shm/cvs2hg/cvs/ecos/packages/hal/arm/iq80310/current/src/diag/Attic/pci_bios.h,v $ */ -/* $Revision: 1.3 $ */ -/* Last $Author: jlarmour $ */ -/* $Date: 2001/02/27 01:21:46 $ */ -/* */ /* Purpose: PCI BIOS Routines */ /* */ /* Remarks: Conforming to the Revision 2.1 PCI BIOS Specfication */ diff --git a/packages/hal/arm/iq80310/current/src/iq80310_misc.c b/packages/hal/arm/iq80310/current/src/iq80310_misc.c --- a/packages/hal/arm/iq80310/current/src/iq80310_misc.c +++ b/packages/hal/arm/iq80310/current/src/iq80310_misc.c @@ -717,10 +717,10 @@ void hal_interrupt_mask(int vector) case CYGNUM_HAL_INTERRUPT_AAIP: *ADCR_REG &= ~1; return; - case CYGNUM_HAL_INTERRUPT_I2C_TX_EMPTY...CYGNUM_HAL_INTERRUPT_I2C_ADDRESS: + case CYGNUM_HAL_INTERRUPT_I2C_TX_EMPTY ... CYGNUM_HAL_INTERRUPT_I2C_ADDRESS: *ICR_REG &= ~(1<<(vector - CYGNUM_HAL_INTERRUPT_I2C_TX_EMPTY)); return; - case CYGNUM_HAL_INTERRUPT_MESSAGE_0...CYGNUM_HAL_INTERRUPT_INDEX_REGISTER: + case CYGNUM_HAL_INTERRUPT_MESSAGE_0 ... CYGNUM_HAL_INTERRUPT_INDEX_REGISTER: *IIMR_REG &= ~(1<<(vector - CYGNUM_HAL_INTERRUPT_MESSAGE_0)); return; case CYGNUM_HAL_INTERRUPT_BIST: @@ -732,7 +732,7 @@ void hal_interrupt_mask(int vector) case CYGNUM_HAL_INTERRUPT_S_SERR: // FIQ *ATUCR_REG &= ~(1<<10); return; - case CYGNUM_HAL_INTERRUPT_TIMER...CYGNUM_HAL_INTERRUPT_PCI_S_INTD: + case CYGNUM_HAL_INTERRUPT_TIMER ... CYGNUM_HAL_INTERRUPT_PCI_S_INTD: *X3MASK_REG |= (1<<(vector - CYGNUM_HAL_INTERRUPT_TIMER)); return; @@ -809,10 +809,10 @@ void hal_interrupt_unmask(int vector) case CYGNUM_HAL_INTERRUPT_AAIP: *ADCR_REG |= 1; return; - case CYGNUM_HAL_INTERRUPT_I2C_TX_EMPTY...CYGNUM_HAL_INTERRUPT_I2C_ADDRESS: + case CYGNUM_HAL_INTERRUPT_I2C_TX_EMPTY ... CYGNUM_HAL_INTERRUPT_I2C_ADDRESS: *ICR_REG |= (1<<(vector - CYGNUM_HAL_INTERRUPT_I2C_TX_EMPTY)); return; - case CYGNUM_HAL_INTERRUPT_MESSAGE_0...CYGNUM_HAL_INTERRUPT_INDEX_REGISTER: + case CYGNUM_HAL_INTERRUPT_MESSAGE_0 ... CYGNUM_HAL_INTERRUPT_INDEX_REGISTER: *IIMR_REG |= (1<<(vector - CYGNUM_HAL_INTERRUPT_MESSAGE_0)); return; case CYGNUM_HAL_INTERRUPT_BIST: @@ -824,7 +824,7 @@ void hal_interrupt_unmask(int vector) case CYGNUM_HAL_INTERRUPT_S_SERR: // FIQ *ATUCR_REG |= (1<<10); return; - case CYGNUM_HAL_INTERRUPT_TIMER...CYGNUM_HAL_INTERRUPT_PCI_S_INTD: + case CYGNUM_HAL_INTERRUPT_TIMER ... CYGNUM_HAL_INTERRUPT_PCI_S_INTD: *X3MASK_REG &= ~(1<<(vector - CYGNUM_HAL_INTERRUPT_TIMER)); return; diff --git a/packages/hal/arm/pid/current/ChangeLog b/packages/hal/arm/pid/current/ChangeLog --- a/packages/hal/arm/pid/current/ChangeLog +++ b/packages/hal/arm/pid/current/ChangeLog @@ -1,3 +1,12 @@ +2001-03-08 Jesper Skov + + * cdl/hal_arm_pid.cdl: Does not guarantee virtual vector support. + +2001-02-27 Jesper Skov + + * include/hal_cache.h: Added HAL_DCACHE_IS_ENABLED and + HAL_ICACHE_IS_ENABLED. + 2001-02-24 Gary Thomas * cdl/hal_arm_pid.cdl: Add CYGSEM_HAL_ARM_PID_ANGEL_BOOT so diff --git a/packages/hal/arm/pid/current/cdl/hal_arm_pid.cdl b/packages/hal/arm/pid/current/cdl/hal_arm_pid.cdl --- a/packages/hal/arm/pid/current/cdl/hal_arm_pid.cdl +++ b/packages/hal/arm/pid/current/cdl/hal_arm_pid.cdl @@ -55,6 +55,7 @@ cdl_package CYGPKG_HAL_ARM_PID { implements CYGINT_HAL_DEBUG_GDB_STUBS implements CYGINT_HAL_DEBUG_GDB_STUBS_BREAK implements CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT + implements CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT_NOT_GUARANTEED define_proc { puts $::cdl_system_header "#define CYGBLD_HAL_TARGET_H " diff --git a/packages/hal/arm/pid/current/include/hal_cache.h b/packages/hal/arm/pid/current/include/hal_cache.h --- a/packages/hal/arm/pid/current/include/hal_cache.h +++ b/packages/hal/arm/pid/current/include/hal_cache.h @@ -85,6 +85,12 @@ // Purge contents of data cache #define HAL_DCACHE_PURGE_ALL() +// Query the state of the data cache (does not affect the caching) +#define HAL_DCACHE_IS_ENABLED(_state_) \ + CYG_MACRO_START \ + (_state_) = 0; \ + CYG_MACRO_END + // Set the data cache refill burst size //#define HAL_DCACHE_BURST_SIZE(_size_) @@ -147,6 +153,12 @@ // Synchronize the contents of the cache with memory. #define HAL_ICACHE_SYNC() +// Query the state of the instruction cache (does not affect the caching) +#define HAL_ICACHE_IS_ENABLED(_state_) \ + CYG_MACRO_START \ + (_state_) = 0; \ + CYG_MACRO_END + // Set the instruction cache refill burst size //#define HAL_ICACHE_BURST_SIZE(_size_) diff --git a/packages/hal/arm/sa11x0/assabet/current/ChangeLog b/packages/hal/arm/sa11x0/assabet/current/ChangeLog --- a/packages/hal/arm/sa11x0/assabet/current/ChangeLog +++ b/packages/hal/arm/sa11x0/assabet/current/ChangeLog @@ -1,3 +1,9 @@ +2001-03-08 Jesper Skov + + * cdl/hal_arm_sa11x0_assabet.cdl: Removed + CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT_GUARANTEED which is now the + default. + 2001-02-24 Gary Thomas * src/lcd_support.c: Make check for sscanf() consistent. diff --git a/packages/hal/arm/sa11x0/assabet/current/cdl/hal_arm_sa11x0_assabet.cdl b/packages/hal/arm/sa11x0/assabet/current/cdl/hal_arm_sa11x0_assabet.cdl --- a/packages/hal/arm/sa11x0/assabet/current/cdl/hal_arm_sa11x0_assabet.cdl +++ b/packages/hal/arm/sa11x0/assabet/current/cdl/hal_arm_sa11x0_assabet.cdl @@ -55,7 +55,6 @@ cdl_package CYGPKG_HAL_ARM_SA11X0_ASSABE implements CYGINT_HAL_DEBUG_GDB_STUBS implements CYGINT_HAL_DEBUG_GDB_STUBS_BREAK implements CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT - implements CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT_GUARANTEED implements CYGHWR_HAL_ARM_SA11X0_UART1 diff --git a/packages/hal/arm/sa11x0/brutus/current/ChangeLog b/packages/hal/arm/sa11x0/brutus/current/ChangeLog --- a/packages/hal/arm/sa11x0/brutus/current/ChangeLog +++ b/packages/hal/arm/sa11x0/brutus/current/ChangeLog @@ -1,3 +1,9 @@ +2001-03-08 Jesper Skov + + * cdl/hal_arm_sa11x0_brutus.cdl: Removed + CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT_GUARANTEED which is now the + default. + 2001-02-23 Gary Thomas * misc/redboot_ROM.ecm: Renamed from redboot_ROM.cfg diff --git a/packages/hal/arm/sa11x0/brutus/current/cdl/hal_arm_sa11x0_brutus.cdl b/packages/hal/arm/sa11x0/brutus/current/cdl/hal_arm_sa11x0_brutus.cdl --- a/packages/hal/arm/sa11x0/brutus/current/cdl/hal_arm_sa11x0_brutus.cdl +++ b/packages/hal/arm/sa11x0/brutus/current/cdl/hal_arm_sa11x0_brutus.cdl @@ -55,7 +55,6 @@ cdl_package CYGPKG_HAL_ARM_SA11X0_BRUTUS implements CYGINT_HAL_DEBUG_GDB_STUBS implements CYGINT_HAL_DEBUG_GDB_STUBS_BREAK implements CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT - implements CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT_GUARANTEED implements CYGHWR_HAL_ARM_SA11X0_UART1 implements CYGHWR_HAL_ARM_SA11X0_UART3 diff --git a/packages/hal/arm/sa11x0/ipaq/current/ChangeLog b/packages/hal/arm/sa11x0/ipaq/current/ChangeLog new file mode 100644 --- /dev/null +++ b/packages/hal/arm/sa11x0/ipaq/current/ChangeLog @@ -0,0 +1,210 @@ +2001-03-24 Gary Thomas + + * cdl/hal_arm_sa11x0_ipaq.cdl: LCD comm only in RedBoot mode. + +2001-03-23 Gary Thomas + + * src/lcd_support.c (init_kbd_coord): Make screen calibration more + user friendly. User can abort at any time with 'return' button. + + * cdl/hal_arm_sa11x0_ipaq.cdl: Set default clock speed to 206MHz. + +2001-03-21 Gary Thomas + + * include/pkgconf/mlt_arm_sa11x0_ipaq_rom.ldi: + * include/pkgconf/mlt_arm_sa11x0_ipaq_rom.mlt: Decrease heap alignment. + + * src/lcd_support.c: Keyboard map had / & \ backwards. + +2001-03-20 Gary Thomas + + * src/redboot_cmds.c (idle): Add idle processing - turn off LCD + screen and backlight when not in use. + + * src/lcd_support.c: + * include/lcd_support.h (lcd_getinfo): New function used to export + information about LCD screen, video memory, etc. + (lcd_on): New function - used to enable/disable screen. + +2001-03-14 Gary Thomas + + * src/lcd_support.c: Improved LCD virtual keyboard support. + Better initialization and setup. Remember parameters so it's + not necessary to calibrate on every boot. + + * include/pkgconf/mlt_arm_sa11x0_ipaq_rom.mlt: + * include/pkgconf/mlt_arm_sa11x0_ipaq_rom.ldi: + * include/pkgconf/mlt_arm_sa11x0_ipaq_rom.h: + * include/pkgconf/mlt_arm_sa11x0_ipaq_ram.mlt: + * include/pkgconf/mlt_arm_sa11x0_ipaq_ram.ldi: + * include/pkgconf/mlt_arm_sa11x0_ipaq_ram.h: Reserve LCD memory. + + * include/ipaq.h: + * include/hal_platform_setup.h: Add LCD screen parameters to fixed area. + +2001-03-09 Gary Thomas + + * include/pkgconf/mlt_arm_sa11x0_ipaq_wince.mlt: + * include/pkgconf/mlt_arm_sa11x0_ipaq_wince.ldi: + * include/pkgconf/mlt_arm_sa11x0_ipaq_wince.h: New file(s). + + * include/hal_platform_setup.h: Support starting from Windows/CR. + + * cdl/hal_arm_sa11x0_ipaq.cdl: Add new startup type: WinCE. + +2001-03-08 Jesper Skov + + * cdl/hal_arm_sa11x0_ipaq.cdl: Removed + CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT_GUARANTEED which is now the + default. + +2001-03-06 Gary Thomas + + * src/lcd_support.c: Massive improvement in non-interrupt + driven keyboard scanning. Support 'return' button for ^C. + Support control keymap. + + * src/atmel_support.c: Improve interrupt support. Fix + keypad [buttons] reporting. + + * include/atmel_support.h: Add interrupt driven support. + Define button values (using icons for names). + +2001-03-05 Gary Thomas + + * src/lcd_support.c: Use new Atmel asynchronous handling. + + * src/ipaq_misc.c (plf_if_init): Always required [now]. + + * src/atmel_support.c: Restructure for asynchronous event + handling - many changes. + + * include/lcd_support.h: New file - define LCD interfaces. + + * include/atmel_support.h: Add asynchronous response handling. + +2001-03-01 Gary Thomas + + * cdl/hal_arm_sa11x0_ipaq.cdl: Define CYGINT_HAL_PLF_IF_INIT + to indicate that this platform requires plf_if_init();. + + * src/lcd_support.c: Minor cleanup during screen calibrate. + + * src/ipaq_misc.c: Only init LCD when creating I/O channel. + +2001-02-28 Gary Thomas + + * src/ipaq_misc.c: Initialize LCD/TS I/O channel. + + * src/banner.xpm: Trim and clean up a few lines. + + * src/atmel_support.c: + * include/atmel_support.h: Define simple touch screen interface. + + * cdl/hal_arm_sa11x0_ipaq.cdl: Add CDL to support using LCD/TS + as a communications channel. + + * src/lcd_support.c: Lots of changes. Support pesudo keyboard + using touchscreen. + + * src/kbd.xpm: New file. Includes pixmaps for keyboard matrix. + +2001-02-27 Gary Thomas + + * src/lcd_support.c: Move logo to bottom of screen. Also + turn on LCD light using Atmel micro-controller. + + * src/ipaq_misc.c: Initialize Atmel hardware. + + * src/banner.xpm: Improve look in portrait mode (borders). + + * src/atmel_support.c: + * include/atmel_support.h: New file(s). Interfaces to control + and interact with the Atmel micro-controller which is used to + handle the LCD light, LED, touch panel, etc. + + * cdl/hal_arm_sa11x0_ipaq.cdl: Adding Atmel micro-controller support. + +2001-02-26 Jonathan Larmour + + * src/lcd_support.c: Define frame pointer with volatile correctly. + Silence warnings. + +2001-02-25 Gary Thomas + + * src/lcd_support.c: Fix character rendering for + portrait mode. Scrolling still broken. + + * src/font.h: New file - extracted from lcd_support.c + + * src/banner.xpm: Add portrait mode version. + + * src/lcd_support.c: Initial portrait mode support. + + * src/redboot_cmds.c (do_physaddr): Use common support. + + * src/lcd_support.c: Merge ISOINFRA changes from Assabet. + Put frame buffer at end of RAM. + + * src/ipaq_misc.c: Remove unused code. Enable LCD display. + + * include/hal_platform_setup.h: + Prune some debug code. Fix up DRAM initialization. + + * cdl/hal_arm_sa11x0_ipaq.cdl: + Add option to enable DRAM controller init. + +2001-02-24 Gary Thomas + + * cdl/hal_arm_sa11x0_ipaq.cdl: + Define machine type for Linux bootstrap. + + * src/redboot_cmds.c: Linux 'exec' command now in generic code. + +2001-02-24 Gary Thomas + + * src/redboot_cmds.c: + * src/lcd_support.c: + * src/ipaq_misc.c: + * src/banner.xpm.bin: + * src/banner.xpm: + * misc/redboot_ROM.ecm: + * include/pkgconf/mlt_arm_sa11x0_ipaq_rom.mlt: + * include/pkgconf/mlt_arm_sa11x0_ipaq_rom.ldi: + * include/pkgconf/mlt_arm_sa11x0_ipaq_rom.h: + * include/pkgconf/mlt_arm_sa11x0_ipaq_ram.mlt: + * include/pkgconf/mlt_arm_sa11x0_ipaq_ram.ldi: + * include/pkgconf/mlt_arm_sa11x0_ipaq_ram.h: + * include/plf_mmap.h: + * include/ipaq.h (SA1110_EIO_IR_OFF): + * include/hal_platform_setup.h: + * include/hal_platform_ints.h: + * doc/README.ipaq: + * cdl/hal_arm_sa11x0_ipaq.cdl: New file(s) - initial import + based on contribution by Richard Panton, 3G Labs, Inc. + +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//=========================================================================== diff --git a/packages/hal/arm/sa11x0/ipaq/current/cdl/hal_arm_sa11x0_ipaq.cdl b/packages/hal/arm/sa11x0/ipaq/current/cdl/hal_arm_sa11x0_ipaq.cdl new file mode 100644 --- /dev/null +++ b/packages/hal/arm/sa11x0/ipaq/current/cdl/hal_arm_sa11x0_ipaq.cdl @@ -0,0 +1,376 @@ +# ==================================================================== +# +# hal_arm_sa11x0_ipaq.cdl +# +# ARM SA1110/iPAQ platform HAL package configuration data +# +# ==================================================================== +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Red Hat eCos Public License +# Version 1.1 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://www.redhat.com/ +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Configurable Operating System, +# released September 30, 1998. +# +# The Initial Developer of the Original Code is Red Hat. +# Portions created by Red Hat are +# Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +# All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +# ==================================================================== +######DESCRIPTIONBEGIN#### +# +# Author(s): gthomas +# Original data: gthomas +# Contributors: richard.panton@3glab.com +# Date: 2001-02-24 +# +#####DESCRIPTIONEND#### +# +# ==================================================================== +cdl_package CYGPKG_HAL_ARM_SA11X0_IPAQ { + display "ARM SA1110/IPAQ" + parent CYGPKG_HAL_ARM_SA11X0 + hardware + include_dir cyg/hal + define_header hal_arm_sa11x0_ipaq.h + description " + This HAL platform package provides generic + support for the Compaq iPaq pocket PC." + + compile ipaq_misc.c lcd_support.c atmel_support.c + + implements CYGINT_HAL_DEBUG_GDB_STUBS + implements CYGINT_HAL_DEBUG_GDB_STUBS_BREAK + implements CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT + implements CYGINT_HAL_PLF_IF_INIT + + implements CYGHWR_HAL_ARM_SA11X0_UART3 + + define_proc { + puts $::cdl_system_header "#define CYGBLD_HAL_TARGET_H " + puts $::cdl_system_header "#define CYGBLD_HAL_VARIANT_H " + puts $::cdl_system_header "#define CYGBLD_HAL_PLATFORM_H " + puts $::cdl_header "#define HAL_PLATFORM_CPU \"StrongARM 1110\"" + puts $::cdl_header "#define HAL_PLATFORM_BOARD \"Compaq iPAQ Pocket PC\"" + puts $::cdl_header "#define HAL_PLATFORM_EXTRA \"\"" + puts $::cdl_header "#define HAL_PLATFORM_MACHINE_TYPE 22" + } + + cdl_option CYGHWR_HAL_ARM_SA11X0_PROCESSOR_CLOCK_OVERRIDE_DEFAULT { + display "Processor clock rate" + calculated 206400 + flavor data + description "The iPAQ is optimal at this speed. Caution - selecting + higher speeds may be unreliable." + } + + cdl_component CYG_HAL_STARTUP { + display "Startup type" + flavor data + default_value {"RAM"} + legal_values {"RAM" "ROM" "WinCE"} + no_define + define -file system.h CYG_HAL_STARTUP + description " + When targetting the iPaq board it is possible to build + the system for either RAM bootstrap or ROM bootstrap(s). Select + 'ram' when building programs to load into RAM using eCos GDB + stubs. Select 'rom' when building a stand-alone application + which will be put into ROM, or for the special case of + building the eCos GDB stubs themselves." + + cdl_option CYGBLD_HAL_STARTUP_ROM_INIT_DRAM { + display "Initialize DRAM" + active_if { (CYG_HAL_STARTUP == "ROM") || (CYG_HAL_STARTUP == "WinCE") } + default_value { (CYG_HAL_STARTUP == "ROM") } + description " + If the ROM startup code is run from something other than + the reset state, it should not be necessary (and even + possibly detrimental) to initialize the DRAM controller. + Turn this option to force those registers to be set up." + } + } + + cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_BAUD { + display "Diagnostic serial port baud rate" + flavor data + legal_values 9600 19200 38400 115200 + default_value 38400 + description " + This option selects the baud rate used for the diagnostic port. + Note: this should match the value chosen for the GDB port if the + diagnostic and GDB port are the same." + } + + cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL_BAUD { + display "GDB serial port baud rate" + flavor data + legal_values 9600 19200 38400 115200 + default_value 38400 + description " + This option selects the baud rate used for the diagnostic port. + Note: this should match the value chosen for the GDB port if the + diagnostic and GDB port are the same." + } + + cdl_option CYGSEM_IPAQ_LCD_COMM { + display "Support LCD/touchscreen for comminication channel" + active_if CYGPKG_REDBOOT + flavor bool + default_value 1 + description " + Enabling this option will use the LCD and touchscreen for a + communications channel, suitable for RedBoot, etc." + } + + cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS { + display "Number of communication channels on the board" + flavor data + calculated 1+CYGSEM_IPAQ_LCD_COMM + } + + cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL { + display "Debug serial port" + flavor data + legal_values 0 to CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS-1 + default_value 0 + description " + The ipaq board has only one serial port. This option + chooses which port will be used to connect to a host + running GDB." + } + + cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL { + display "Diagnostic serial port" + flavor data + legal_values 0 to CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS-1 + default_value 0 + description " + The ipaq board has only one serial port. This option + chooses which port will be used for diagnostic output." + } + + cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_DEFAULT { + display "Default console channel." + flavor data + legal_values 0 to CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS-1 + calculated 0 + } + + cdl_component CYGBLD_GLOBAL_OPTIONS { + display "Global build options" + flavor none + no_define + description " + Global build options including control over + compiler flags, linker flags and choice of toolchain." + + + parent CYGPKG_NONE + + cdl_option CYGBLD_GLOBAL_COMMAND_PREFIX { + display "Global command prefix" + flavor data + no_define + default_value { "arm-elf" } + description " + This option specifies the command prefix used when + invoking the build tools." + } + + cdl_option CYGBLD_GLOBAL_CFLAGS { + display "Global compiler flags" + flavor data + no_define + default_value { "-mcpu=strongarm1100 -Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef -Woverloaded-virtual -g -O2 -ffunction-sections -fdata-sections -fno-rtti -fno-exceptions -fvtable-gc -finit-priority" } + description " + This option controls the global compiler flags which are used to + compile all packages by default. Individual packages may define + options which override these global flags." + } + + cdl_option CYGBLD_GLOBAL_LDFLAGS { + display "Global linker flags" + flavor data + no_define + default_value { "-Wl,--gc-sections -Wl,-static -Wl,-N -g -O2 -nostdlib" } + description " + This option controls the global linker flags. Individual + packages may define options which override these global flags." + } + + cdl_option CYGBLD_BUILD_GDB_STUBS { + display "Build GDB stub ROM image" + default_value 0 + requires { CYG_HAL_STARTUP == "ROM" } + requires CYGSEM_HAL_ROM_MONITOR + requires CYGBLD_BUILD_COMMON_GDB_STUBS + requires CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + requires CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT + requires CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT + requires ! CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT + requires ! CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM + no_define + description " + This option enables the building of the GDB stubs for the + board. The common HAL controls takes care of most of the + build process, but the final conversion from ELF image to + binary data is handled by the platform CDL, allowing + relocation of the data if necessary." + + make -priority 320 { + /bin/gdb_module.bin : /bin/gdb_module.img + $(OBJCOPY) --remove-section=.fixed_vectors -O binary $< $@ + } + } + } + + cdl_component CYGPKG_HAL_ARM_SA11X0_IPAQ_OPTIONS { + display "StrongARM SA1110/IPAQ build options" + flavor none + no_define + description " + Package specific build options including control over + compiler flags used only in building this package, + and details of which tests are built." + + + cdl_option CYGPKG_HAL_ARM_SA11X0_IPAQ_CFLAGS_ADD { + display "Additional compiler flags" + flavor data + no_define + default_value { "" } + description " + This option modifies the set of compiler flags for + building the StrongARM IPAQ HAL. These flags are used in addition + to the set of global flags." + } + + cdl_option CYGPKG_HAL_ARM_SA11X0_IPAQ_CFLAGS_REMOVE { + display "Supressed compiler flags" + flavor data + no_define + default_value { "" } + description " + This option modifies the set of compiler flags for + building the StrongARM IPAQ HAL. These flags are removed from + the set of global flags if present." + } + + cdl_option CYGPKG_HAL_ARM_SA11X0_IPAQ_TESTS { + display "StrongARM SA1110/IPAQ tests" + flavor data + no_define +# calculated { "tests/dram-test" } + calculated { "" } + description " + This option specifies the set of tests for the StrongARM IPAQ HAL." + } + } + + cdl_component CYGHWR_MEMORY_LAYOUT { + display "Memory layout" + flavor data + no_define + calculated { CYG_HAL_STARTUP == "RAM" ? "arm_sa11x0_ipaq_ram" : \ + CYG_HAL_STARTUP == "WinCE" ? "arm_sa11x0_ipaq_wince" : \ + "arm_sa11x0_ipaq_rom" } + + cdl_option CYGHWR_MEMORY_LAYOUT_LDI { + display "Memory layout linker script fragment" + flavor data + no_define + define -file system.h CYGHWR_MEMORY_LAYOUT_LDI + calculated { CYG_HAL_STARTUP == "RAM" ? "" : \ + CYG_HAL_STARTUP == "WinCE" ? "" : \ + "" } + } + + cdl_option CYGHWR_MEMORY_LAYOUT_H { + display "Memory layout header file" + flavor data + no_define + define -file system.h CYGHWR_MEMORY_LAYOUT_H + calculated { CYG_HAL_STARTUP == "RAM" ? "" : \ + CYG_HAL_STARTUP == "WinCE" ? "" : \ + "" } + } + } + + cdl_option CYGSEM_HAL_ROM_MONITOR { + display "Behave as a ROM monitor" + flavor bool + default_value 0 + parent CYGPKG_HAL_ROM_MONITOR + requires { CYG_HAL_STARTUP == "ROM" } + description " + Enable this option if this program is to be used as a ROM monitor, + i.e. applications will be loaded into RAM on the board, and this + ROM monitor may process exceptions or interrupts generated from the + application. This enables features such as utilizing a separate + interrupt stack when exceptions are generated." + } + + cdl_option CYGSEM_HAL_USE_ROM_MONITOR { + display "Work with a ROM monitor" + flavor booldata + legal_values { "Generic" "GDB_stubs" } + default_value { CYG_HAL_STARTUP == "RAM" ? "GDB_stubs" : 0 } + parent CYGPKG_HAL_ROM_MONITOR + requires { CYG_HAL_STARTUP == "RAM" } + description " + Support can be enabled for different varieties of ROM monitor. + This support changes various eCos semantics such as the encoding + of diagnostic output, or the overriding of hardware interrupt + vectors. + Firstly there is \"Generic\" support which prevents the HAL + from overriding the hardware vectors that it does not use, to + instead allow an installed ROM monitor to handle them. This is + the most basic support which is likely to be common to most + implementations of ROM monitor. + \"GDB_stubs\" provides support when GDB stubs are included in + the ROM monitor or boot ROM." + } + + cdl_component CYGPKG_REDBOOT_HAL_OPTIONS { + display "Redboot HAL options" + flavor none + no_define + parent CYGPKG_REDBOOT + active_if CYGPKG_REDBOOT + description " + This option lists the target's requirements for a valid Redboot + configuration." + + cdl_option CYGBLD_BUILD_REDBOOT_BIN { + display "Build Redboot ROM binary image" + active_if CYGBLD_BUILD_REDBOOT + default_value 1 + no_define + description "This option enables the conversion of the Redboot ELF + image to a binary image suitable for ROM programming." + + compile -library=libextras.a redboot_cmds.c + + make -priority 325 { + /bin/redboot.bin : /bin/redboot.elf + $(OBJCOPY) --strip-debug $< $(@:.bin=.img) + $(OBJCOPY) -O srec $< $(@:.bin=.srec) + $(OBJCOPY) -O binary $< $@ + } + } + } + +} diff --git a/packages/hal/arm/sa11x0/ipaq/current/doc/README.ipaq b/packages/hal/arm/sa11x0/ipaq/current/doc/README.ipaq new file mode 100644 --- /dev/null +++ b/packages/hal/arm/sa11x0/ipaq/current/doc/README.ipaq @@ -0,0 +1,367 @@ +Feb 24, 2001 + +These are the original notes, based on the contribution from +Richard Panton at 3G Labs, Inc. + +eCOS For The Compaq iPAQ H3600 Series Handheld PC +================================================= + +Intro +----- + +IMPORTANT - this current version does not allow the construction of a +_bootable_ ROM image for the iPAQ. However, it DOES allow the creation +of ROM and RAM based images. + +You will need: + A Compaq iPAQ h3600 series. + The SERIAL docking cradle. + +You can use: + The CF-Card expansion sleeve. + A Socket LP-E CF Ethernet card. + +In order to load any Free Software onto the iPAQ, the Flash ROM must be +reprogrammed with the Linux Bootloader. Please see the instructions +at >>> www.handhelds.org <<< for installing the 'stable' bootloader. Note +that installing the bootloader will erase WinCE from the Flash ROMs, and +that .. + + .. IT MAY NOT BE POSSIBLE TO RE-INSTALL WinCE AFTER THIS. + + +(You WILL be able to load ARMLinux, however ;-) + +The rest of this document assumes that you have a working bootloader on +your iPAQ, such that when you boot, the 'boot>' prompt comes out of the +serial port. + +As the bootloader resides at address 0x0000 in the ROM, and we do not +wish to overwrite the bootloader (dangerous - this would turn the iPAQ +into what is colloquially known as a 'brick'), the eCOS Redboot image +must be loaded at some other address. In order to make memory mapping +simpler, eCOS/Redboot must be loaded onto a 1Mb boundary - i.e. at +address 0x00x00000, where x is 1,2,3...f. The eCOS startup code has been +adjusted for iPAQ to allow this. To minimise the changes to the memory +map, the MMU will map the correct 1Mb section to the start of ROM space +at 0x50000000 so that the rest of the image can run unchanged. + +Patches to existing code +------------------------ + +Two patches to code are required: + +$ECOS_REPOSITORY/hal/arm/arch/current/src/vectors.S: + 148c148,149 + < ldr pc,.reset_vector // 0x00 + --- + > //ldr pc,.reset_vector // 0x00 + > b vectors // 0x00 + 161c162,163 + < UNMAPPED_PTR(reset_vector) // 0x20 + --- + > //UNMAPPED_PTR(reset_vector) // 0x20 + > b reset_vector + +[This patch changes the reset vector to be position independant.] + + + +and to $ECOS_REPOSITORY/hal/arm/sa11x0/var/current/src/hal_diag.c + 116,117c116 + < + < // Set UART to 8N1 (8 data bits, no partity, 1 stop bit) + --- + > // Set UART to 8N1 (8 data bits, no parity, 1 stop bit) + 182a182,187 + > #if defined(CYGPKG_HAL_ARM_SA11X0_IPAQ) + > static channel_data_t ser_channels[2] = { + > { (volatile struct sa11x0_serial*)SA11X0_UART3_BASE, 1000, CYGNUM_HAL_INTERRUPT_UART3 }, + > { (volatile struct sa11x0_serial*)SA11X0_UART1_BASE, 1000, CYGNUM_HAL_INTERRUPT_UART1 } + > }; + > #else + 186a192 + > #endif + +[This patch makes the iPAQ use UART3 for debugging rather than UART1] + + +Flash Support +------------- + +The iPAQ uses the same flash devices as the Intel Assabet board, and +uses the same eCOS package, CYGPKG_DEVS_FLASH_ASSABET. + +To enable the iPAQ HAL to use the Assabet flash driver, you must edit +the file: + $ECOS_REPOSITORY/devs/flash/arm/assabet/current/cdl/flash_assabet.cdl + +changing the line: + requires CYGPKG_HAL_ARM_SA11X0_ASSABET + +to: + requires CYGPKG_HAL_ARM_SA11X0_ASSABET || CYGPKG_HAL_ARM_SA11X0_IPAQ + +This change allows the assabet flash package to be used with this iPAQ +HAL. + +When running RedBoot, it is important to execute the command: + + RedBoot> egpio -s 1 + +(which will turn on the programming power supply) before attempting to +program any flash area. + +VERY IMPORTANT: Do NOT attempt to re-program any flash memory between +addresses 0x00000000 and 0x000fffff with RedBoot, since that is where +the iPAQ Linux bootloader resides. + + + +Packages +-------- +hal_ipaq-v1_0_0.epk CYGPKG_HAL_ARM_SA11X0_IPAQ + Basic support for the iPAQ platform. + +pcmcia_ipaq-v1_0_0.epk CYGPKG_DEVS_PCMCIA_IPAQ + PCMCIA and CF card support for the iPAQ. Allows the use of the + Socket LP-E Ethernet CF card for network and debugging. + + + +Compiling and installing RedBoot +-------------------------------- + +As a concrete example (stuff you type is highlighted like this) + ^^^^ + + $ ecosconfig new ipaq redboot + ^^^^^^^^^^^^^^^^^^^^^^^^^^^ + U CYGSEM_HAL_USE_ROM_MONITOR, new inferred value 0 + U CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT, new inferred value 1 + U CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT, new inferred value 0 + U CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM, new inferred value 0 + U CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS, new inferred value 1 + $ ecosconfig import \ + ^^^^^^^^^^^^^^^^^^^ + > $ECOS_REPOSITORY/hal/arm/sa11x0/ipaq/current/misc/redboot_ROM.cfg + ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +If you see an error here relating to unresolved FLASH components, then you +should edit the flash_assabet.cdl file as described above. + + $ ecosconfig resolve + ^^^^^^^^^^^^^^^^^^ + $ ecosconfig tree + ^^^^^^^^^^^^^^^ + $ make + ^^^^ + ... + ... + [ creates install/bin/redboot.* ] + $ + +You can now power up the iPAQ and connect to it via the serial port by using, +for example, minicom, at 115200 baud (8 data bits, 1 stop bit, no parity). +You should see the 'boot>' prompt if you press space/return a couple of times. + + @000002BC + F + *MTST + ... + ... [ loads of status and copyright info here ] + ... + booting flash... + no boot image in flash + boot> + boot> load flash 0x00100000 + ^^^^^^^^^^^^^^^^^^^^^ +Now start an XMODEM send of install/bin/redboot.bin +When the download is complete, you should see the following: + + programming flash...erasing ... + Erasing sector 00100000 + len=00019500 + writing flash.. + addr: 00100000 data: EA000006 + addr: 00110000 data: E3530006 + verifying ... done. + boot> + +[ You may find that the iPAQ bootloader times out before you get the chance +to start the XMODEM send. In this case, use a script to perform the download +- this also will ensure that you never type the incorrect address. A sample +script for minicom can be found below in appendix A.] + +In order to see the RedBoot start-up messages, it is a good idea to change +the baudrate used by the Linx bootloader now. + + boot> set baudrate 38400 + ^^^^^^^^^^^^^^^^^^ + setting param=baudrate to value=38400 + update_baudrate: new baudrate=00009600 + CSRBASE=42000000 + l_ubrlcr=00000005 + m_ubrlcr=00000000 + h_ubrlcr=00000000 + baudrate changed to 0x00009600 + boot> + +The final part of this message will be corrupted (since you are listening +at 115200 baud). Change your communications program to work at 38400 baud +and hit return a couple of times. + +To make this change permanent (recommended), execute the following command: + + boot> params save + ^^^^^^^^^^^ + bootldr: set baudrate 0x00009600 + + programming flash...erasing ... + Erasing sector 000C0000 + len=00000084 + writing flash.. + addr: 000C0000 data: 746F6F62 + verifying ... done. + boot> + + + +Assuming that the download and flash programming have been successful, you +will now be able to launch RedBoot by issuing the following command to the +iPAQ bootloader: + + boot> jump 0x00100000 + ^^^^^^^^^^^^^^^ + Calling fcn=00100000 + a0=00000000 + a1=00000000 + a2=00000000 + a3=0......j + + + RedBoot(tm) debug environment - built 14:56:04, Dec 7 2000 + Platform: Compaq iPaq handheld PC (StrongARM 1110) + This port Copyright (C) 2000, 3G Lab Ltd. + Copyright (C) 2000, Red Hat, Inc. + + RAM: 0x00000000-0x02000000 + FLASH: 0x50000000 - 0x51000000, 64 blocks of 0x00040000 bytes each. + FLASH configuration checksum error or invalid key + ... Waiting for network card: .Ready! + + Socket Communications, Inc: Low Power Ethernet CF Revision C 5V/3.3V 08/27/98 + IP: 192.168.0.106, Default server: 192.168.0.1 + RedBoot> + + + +Hints and Tips +-------------- + +Set the iPAQ Linux bootloader to operate at 38400 (ie. the same as GDB). This +means you don't have to switch baud rate when starting RedBoot. + +Don't load a Linux kernel into flash, otherwise it may be booted +automatically before you get the chance to get to the boot> prompt. + +Use Ethernet if possible! + +Flash support WILL NOT WORK unless you have modified the flash_assabet.cdl +file as described above. + + + +Extended RedBoot Commands +------------------------- + +Four new commands have been added to RedBoot to aid system development. + +1) gpio [-s ] [-c ] + + gpio will display the current state of the GPIO pins. + -s will set the bits that are set in , leaving + other bits unchanged. + -c will clear the bits that are set in , leaving + other bits unchanged. -s and -c may be used in the + same command. + +2) egpio [-s ] [-c ] + egpio will display the current state of the EGPIO pins. + -s will set the bits that are set in , leaving + other bits unchanged. + -c will clear the bits that are set in , leaving + other bits unchanged. -s and -c may be used in the + same command. + [ In particular, "egpio -s 1" will enable flash programming ]. + +3) physaddr + will manually walk the translation and page tables + to determine which physical address is referenced + by the given . Also printed are + the page size (section, large (64k) page, or + small (4k) page), the ARM domain, and the access + permissions. Invalid mappings will be indicated + with an error message explaining WHY the mapping + is invalid. + +4) mem [-a
] [-b|-h] + Stores the value given by at the address + given by
.
defaults to the + last address used if not supplied. + -b indicates a byte store (8 bits only). + -h indicates a half-word store (16 bits only). + Default is a word store (all 32 bits). + + +Appendix A - A sample minicom script to download images to flash +---------------------------------------------------------------- + +<<<<----------- CUT HERE ----------->>>> +getipaq: + send " \c" + expect { + "boot>" goto gotit + " " goto tryenter + timeout 1 goto getipaq + } +tryenter: + send "" + expect { + "boot>" goto gotit + timeout 1 goto getipaq + } +gotit: + send "load flash 0x00100000" + ! sx install/bin/redboot.bin + +<<<<----------- CUT HERE ----------->>>> + + + +Appendix B - Differences between the Assabet and iPAQ source code +----------------------------------------------------------------- + +memory map - Allocated space for LCD buffer at 0x8000. Use space at +0x0400 - 0x3fff for page tables. + +hal_platform_setup.h - EGPIO word and initialisation. Skip memory +controller initialisation (for now). + +redboot_cmds.c - Extra RedBoot commands as described above. + +lcd_support.c - various changes for the iPAQ display. + +ipaq_misc.c - Corrected descriptor structures. Added macros for setting +up page tables as well as sections. Use of domains. LCD is switched on +during plf_hardware_init(). phys_addr() function to perform translation +table walk under software control. + +References +---------- + +ARM Architecture Reference Manual + (Prentice-Hall ISBN 0-13-736299-4) + +Compaq iPAQ H3600 Hardware Design Specification (Version 0.2f) + +[ later versions of these documents may be available ]. diff --git a/packages/hal/arm/sa11x0/ipaq/current/include/atmel_support.h b/packages/hal/arm/sa11x0/ipaq/current/include/atmel_support.h new file mode 100644 --- /dev/null +++ b/packages/hal/arm/sa11x0/ipaq/current/include/atmel_support.h @@ -0,0 +1,132 @@ +#ifndef CYGONCE_ATMEL_SUPPORT_H +#define CYGONCE_ATMEL_SUPPORT_H + +//============================================================================= +// +// atmel_support.h +// +// Platform specific support (register layout, etc) +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 2001-02-27 +// Purpose: Intel SA1110/iPAQ platform specific support routines +// Description: +// Usage: #include +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +// Command codes +#define ATMEL_CMD_VERSION 0 +#define ATMEL_CMD_UNKNOWN 1 +#define ATMEL_CMD_KEYBD 2 +#define ATMEL_CMD_TOUCH 3 +#define ATMEL_CMD_EEPROM_READ 4 +#define ATMEL_CMD_EEPROM_WRITE 5 +#define ATMEL_CMD_THERMAL 6 +#define ATMEL_CMD_LED 8 +#define ATMEL_CMD_BATTERY 9 +#define ATMEL_CMD_SPI_READ 11 +#define ATMEL_CMD_SPI_WRITE 12 +#define ATMEL_CMD_LIGHT 13 +#define NUM_ATMEL_CMDS 16 + +// Structure of actual packets +// +// Byte 0 - SOF +// Byte 1 - (cmd << 4) | length +// Byte 2 - Data | +// ... | 'length' bytes (0..15) +// Byte m - Data | +// Byte n - Checksum +// +// Since the length must be less than 16, the entire +// packet will fit in 18 bytes +// +#define ATMEL_PKT_LEN 18 +typedef struct _atmel_pkt { + struct _atmel_pkt *next; + unsigned char data[ATMEL_PKT_LEN]; + int len, size; +} atmel_pkt; +#define ATMEL_PKT_SOF 0 +#define ATMEL_PKT_CMD 1 +#define ATMEL_PKT_DATA 2 + +#define ATMEL_NUM_PKT 4 + +#define SOF 0x02 + +// +// Keyboard events are one byte with the button code +// and state or'd +// +#define ATMEL_BUTTON_STATE 0x80 +#define ATMEL_BUTTON_STATE_DOWN 0x00 +#define ATMEL_BUTTON_STATE_UP 0x80 +#define ATMEL_BUTTON_VALUE 0x7F + +#define ATMEL_BUTTON_RECORD 0x01 +#define ATMEL_BUTTON_CALENDAR 0x02 +#define ATMEL_BUTTON_MEMO 0x03 +#define ATMEL_BUTTON_Q 0x04 +#define ATMEL_BUTTON_RETURN 0x05 +#define ATMEL_BUTTON_JOY_UP 0x06 +#define ATMEL_BUTTON_JOY_RIGHT 0x07 +#define ATMEL_BUTTON_JOY_DOWN 0x09 +#define ATMEL_BUTTON_JOY_LEFT 0x08 + +struct key_event { + unsigned char button_info; +}; + +// +// Touch screen events +// Note: up/down is really hard to discern +// +struct ts_event { + bool up; + short x, y; +}; + +// Functions +void atmel_init(void); +bool atmel_send(int, unsigned char *, int); +int atmel_recv(unsigned char *, int); +typedef void atmel_handler(atmel_pkt *); +void atmel_register(int, atmel_handler *); +void atmel_interrupt_mode(bool enable); + +bool ts_get_event(struct ts_event *); +bool key_get_event(struct key_event *); + +#endif /* CYGONCE_ATMEL_SUPPORT_H */ diff --git a/packages/hal/arm/sa11x0/ipaq/current/include/hal_platform_ints.h b/packages/hal/arm/sa11x0/ipaq/current/include/hal_platform_ints.h new file mode 100644 --- /dev/null +++ b/packages/hal/arm/sa11x0/ipaq/current/include/hal_platform_ints.h @@ -0,0 +1,108 @@ +#ifndef CYGONCE_HAL_PLATFORM_INTS_H +#define CYGONCE_HAL_PLATFORM_INTS_H +//========================================================================== +// +// hal_platform_ints.h +// +// HAL Interrupt and clock support +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 2001-02-24 +// Purpose: Define Interrupt support +// Description: The interrupt details for the SA1110/iPAQ are defined here. +// Usage: +// #include +// ... +// +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#define CYGNUM_HAL_INTERRUPT_GPIO0 0 +#define CYGNUM_HAL_INTERRUPT_GPIO1 1 +#define CYGNUM_HAL_INTERRUPT_GPIO2 2 +#define CYGNUM_HAL_INTERRUPT_GPIO3 3 +#define CYGNUM_HAL_INTERRUPT_GPIO4 4 +#define CYGNUM_HAL_INTERRUPT_GPIO5 5 +#define CYGNUM_HAL_INTERRUPT_GPIO6 6 +#define CYGNUM_HAL_INTERRUPT_GPIO7 7 +#define CYGNUM_HAL_INTERRUPT_GPIO8 8 +#define CYGNUM_HAL_INTERRUPT_GPIO9 9 +#define CYGNUM_HAL_INTERRUPT_GPIO10 10 +#define CYGNUM_HAL_INTERRUPT_GPIO 11 // Don't use directly! +#define CYGNUM_HAL_INTERRUPT_LCD 12 +#define CYGNUM_HAL_INTERRUPT_UDC 13 +#define CYGNUM_HAL_INTERRUPT_UART1 15 +#define CYGNUM_HAL_INTERRUPT_UART2 16 +#define CYGNUM_HAL_INTERRUPT_UART3 17 +#define CYGNUM_HAL_INTERRUPT_MCP 18 +#define CYGNUM_HAL_INTERRUPT_SSP 19 +#define CYGNUM_HAL_INTERRUPT_TIMER0 26 +#define CYGNUM_HAL_INTERRUPT_TIMER1 27 +#define CYGNUM_HAL_INTERRUPT_TIMER2 28 +#define CYGNUM_HAL_INTERRUPT_TIMER3 29 +#define CYGNUM_HAL_INTERRUPT_HZ 30 +#define CYGNUM_HAL_INTERRUPT_ALARM 31 + +// GPIO bits 31..11 can generate interrupts as well, but they all +// end up clumped into interrupt signal #11. Using the symbols +// below allow for detection of these separately. + +#define CYGNUM_HAL_INTERRUPT_GPIO11 (32+11) +#define CYGNUM_HAL_INTERRUPT_GPIO12 (32+12) +#define CYGNUM_HAL_INTERRUPT_GPIO13 (32+13) +#define CYGNUM_HAL_INTERRUPT_GPIO14 (32+14) +#define CYGNUM_HAL_INTERRUPT_GPIO15 (32+15) +#define CYGNUM_HAL_INTERRUPT_GPIO16 (32+16) +#define CYGNUM_HAL_INTERRUPT_GPIO17 (32+17) +#define CYGNUM_HAL_INTERRUPT_GPIO18 (32+18) +#define CYGNUM_HAL_INTERRUPT_GPIO19 (32+19) +#define CYGNUM_HAL_INTERRUPT_GPIO20 (32+20) +#define CYGNUM_HAL_INTERRUPT_GPIO21 (32+21) +#define CYGNUM_HAL_INTERRUPT_GPIO22 (32+22) +#define CYGNUM_HAL_INTERRUPT_GPIO23 (32+23) +#define CYGNUM_HAL_INTERRUPT_GPIO24 (32+24) +#define CYGNUM_HAL_INTERRUPT_GPIO25 (32+25) +#define CYGNUM_HAL_INTERRUPT_GPIO26 (32+26) +#define CYGNUM_HAL_INTERRUPT_GPIO27 (32+27) + +#define CYGNUM_HAL_INTERRUPT_NONE -1 + +#define CYGNUM_HAL_ISR_MIN 0 +#define CYGNUM_HAL_ISR_MAX (27+32) + +#define CYGNUM_HAL_ISR_COUNT (CYGNUM_HAL_ISR_MAX+1) + +// The vector used by the Real time clock +#define CYGNUM_HAL_INTERRUPT_RTC CYGNUM_HAL_INTERRUPT_TIMER0 + +#endif // CYGONCE_HAL_PLATFORM_INTS_H diff --git a/packages/hal/arm/sa11x0/ipaq/current/include/hal_platform_setup.h b/packages/hal/arm/sa11x0/ipaq/current/include/hal_platform_setup.h new file mode 100644 --- /dev/null +++ b/packages/hal/arm/sa11x0/ipaq/current/include/hal_platform_setup.h @@ -0,0 +1,517 @@ +#ifndef CYGONCE_HAL_PLATFORM_SETUP_H +#define CYGONCE_HAL_PLATFORM_SETUP_H + +/*============================================================================= +// +// hal_platform_setup.h +// +// Platform specific support for HAL (assembly code) +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas, richard.panton@3glab.com +// Date: 2001-02-24 +// Purpose: Intel SA1110/iPAQ platform specific support routines +// Description: +// Usage: #include +// Only used by "vectors.S" +// +//####DESCRIPTIONEND#### +// +//===========================================================================*/ + +#include // System-wide configuration info +#include CYGBLD_HAL_VARIANT_H // Variant (SA11x0) specific configuration +#include CYGBLD_HAL_PLATFORM_H // Platform specific configuration +#include // Variant specific hardware definitions +#include // MMU definitions +#include // Platform specific hardware definitions + +#if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_WinCE) +#define PLATFORM_SETUP1 _platform_setup1 +#define CYGHWR_HAL_ARM_HAS_MMU +#if defined(CYG_HAL_STARTUP_WinCE) +#define UNMAPPED(x) (x)+SA11X0_RAM_BANK0_BASE +#endif + +#if defined(CYG_HAL_STARTUP_ROM) +#if (CYGHWR_HAL_ARM_SA11X0_PROCESSOR_CLOCK == 59000) +#define SA11X0_PLL_CLOCK 0x0 +#elif (CYGHWR_HAL_ARM_SA11X0_PROCESSOR_CLOCK == 73700) +#define SA11X0_PLL_CLOCK 0x1 +#elif (CYGHWR_HAL_ARM_SA11X0_PROCESSOR_CLOCK == 88500) +#define SA11X0_PLL_CLOCK 0x2 +#elif (CYGHWR_HAL_ARM_SA11X0_PROCESSOR_CLOCK == 103200) +#define SA11X0_PLL_CLOCK 0x3 +#elif (CYGHWR_HAL_ARM_SA11X0_PROCESSOR_CLOCK == 118000) +#define SA11X0_PLL_CLOCK 0x4 +#elif (CYGHWR_HAL_ARM_SA11X0_PROCESSOR_CLOCK == 132700) +#define SA11X0_PLL_CLOCK 0x5 +#elif (CYGHWR_HAL_ARM_SA11X0_PROCESSOR_CLOCK == 147500) +#define SA11X0_PLL_CLOCK 0x6 +#elif (CYGHWR_HAL_ARM_SA11X0_PROCESSOR_CLOCK == 162200) +#define SA11X0_PLL_CLOCK 0x7 +#elif (CYGHWR_HAL_ARM_SA11X0_PROCESSOR_CLOCK == 176900) +#define SA11X0_PLL_CLOCK 0x8 +#elif (CYGHWR_HAL_ARM_SA11X0_PROCESSOR_CLOCK == 191700) +#define SA11X0_PLL_CLOCK 0x9 +#elif (CYGHWR_HAL_ARM_SA11X0_PROCESSOR_CLOCK == 206400) +#define SA11X0_PLL_CLOCK 0xA +#elif (CYGHWR_HAL_ARM_SA11X0_PROCESSOR_CLOCK == 221200) +#define SA11X0_PLL_CLOCK 0xB +#else +#error Invalid processor clock speed +#endif +#endif + +//#define DEBUG_INIT + +#ifdef DEBUG_INIT + .macro InitUART3 +#define EGPIOBase 0x49000000 +#define EGPIO_BITSY_RS232_ON (1 << 7) /* UART3 transceiver force on. Active high. */ + +#define SA1100_UTCR0 0x00 +#define SA1100_UTCR1 0x04 +#define SA1100_UTCR2 0x08 +#define SA1100_UTCR3 0x0C +#define SA1100_UTDR 0x14 +#define SA1100_UTSR0 0x1c +#define SA1100_UTSR1 0x20 + +#define SA1100_UTCR0_PE (1 << 0) /* parity enable */ +#define SA1100_UTCR0_OES (1 << 1) /* 1 for even parity */ +#define SA1100_UTCR0_2STOP (1 << 2) /* 1 for 2 stop bits */ +#define SA1100_UTCR0_8BIT (1 << 3) /* 1 for 8 bit data */ +#define SA1100_UTCR0_SCE (1 << 4) /* sample clock enable */ +#define SA1100_UTCR0_RCE (1 << 5) /* receive clock edge select */ +#define SA1100_UTCR0_TCE (1 << 6) /* transmit clock edge select */ + +#define SA1100_UTCR1_BRDHIMASK 0xF +#define SA1100_UTCR2_BRDLoMASK 0xFF + +#define SA1100_UTCR3_RXE (1 << 0) /* receiver enable */ +#define SA1100_UTCR3_TXE (1 << 1) /* transmit enable */ +#define SA1100_UTCR3_BRK (1 << 2) /* send a BRK */ +#define SA1100_UTCR3_RIE (1 << 3) /* receive FIFO interrupt enable */ +#define SA1100_UTCR3_TIE (1 << 4) /* transmit FIFO interrupt enable */ +#define SA1100_UTCR3_LBM (1 << 5) /* loopback mode */ + +/* [1] 11.11.6 */ +#define SA1100_UTDR_PRE (1 << 8) /* parity error */ +#define SA1100_UTDR_FRE (1 << 9) /* framing error */ +#define SA1100_UTDR_ROR (1 << 10) /* receiver overrun */ + +/* [1] 11.11.7 */ +#define SA1100_UTSR0_TFS (1 << 0) /* transmit FIFO service request */ + +/* [1] 11.11.8 */ +#define SA1100_UTSR1_TBY (1 << 0) /* transmit FIFO busy */ +#define SA1100_UTSR1_RNE (1 << 1) /* receive FIFO not empty */ +#define SA1100_UTSR1_TNF (1 << 2) /* transmit FIFO not full */ +#define SA1100_UTSR1_PRE (1 << 3) /* parity error */ +#define SA1100_UTSR1_FRE (1 << 4) /* framing error */ +#define SA1100_UTSR1_ROR (1 << 5) /* receiver overrun */ + +#define SA1100_UTSR1_ERROR_MASK 0x38 + +#define SA1100_UART3BASE 0x80050000 + + /* + ;; ******************************************************************** + ;; InitUART3 - Initialize Serial Communications + ;; ******************************************************************** + ;; Following reset, the UART is disabled. So, we do the following: + */ + + ldr r1, =SA1100_UART3BASE + /* disable the UART */ + mov r2, #0x00 + str r2, [r1, #SA1100_UTCR3] /* UART1 Control Reg. 3 */ + /* Now clear all 'sticky' bits in serial I registers, cf. [1] 11.11 */ + mov r2, #0xFF + str r2, [r1, #SA1100_UTSR0] /* UART1 Status Reg. 0 */ + + /* Set the serial port to sensible defaults: no break, no interrupts, */ + /* no parity, 8 databits, 1 stopbit. */ + mov r2, #SA1100_UTCR0_8BIT + str r2, [r1, #SA1100_UTCR0] /* UART1 Control Reg. 0 */ + + /* Set BRD to 1, for a baudrate of 115K2 ([1] 11.11.4.1) */ + /* Set BRD to 3, for a baudrate of 57k6 ([1] 11.11.4.1) */ + /* Set BRD to 5, for a baudrate of 38k4 ([1] 11.11.4.1) */ + /* Set BRD to 23, for a baudrate of 9k6 ([1] 11.11.4.1) */ + mov r2, #0x00 + str r2, [r1, #SA1100_UTCR1] + mov r2, #SA11X0_UART_BAUD_RATE_DIVISOR(CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_BAUD) + str r2, [r1, #SA1100_UTCR2] + /* enable the UART TX and RX */ +InitUart3Enable: + mov r2, #(SA1100_UTCR3_RXE|SA1100_UTCR3_TXE) + str r2, [r1, #SA1100_UTCR3] + + ldr r3, =EGPIOBase + mov r2, #EGPIO_BITSY_RS232_ON + str r2, [r3, #0] + ldr r2, [r3, #0] + + // Give a little pause to let the thing settle + ldr r1,=1000000 +10: sub r1,r1,#1 + cmp r1,#0 + bne 10b + + .endm + + .macro PutC c + ldr r8,=\c + PutCh r8 + .endm + + .macro PutCh c + ldr r9,=SA1100_UART3BASE + str \c,[r9,#SA1100_UTDR] +77: ldr \c,[r9,#SA1100_UTSR1] + tst \c,#SA1100_UTSR1_TNF // Tx FIFO not full + beq 77b + .endm + + .macro PutNibble n + and \n,\n,#0x0F + cmp \n,#0x0A + blt 78f + add \n,\n,#'A'-'0'-0x0A +78: add \n,\n,#'0' + PutCh \n + .endm + + .macro PutHex1 h + mov r0,\h,LSR #4 + PutNibble r0 + PutNibble \h + .endm + + .macro PutHex2 h + mov r1,\h,LSR #8 + PutHex1 r1 + PutHex1 \h + .endm + + .macro PutHex4 h + PutC '0' + PutC 'x' + mov r2,\h,LSR #16 + PutHex2 r2 + PutHex2 \h + .endm +#endif // DEBUG_INIT + +// This macro represents the initial startup code for the platform + .macro _platform_setup1 + +#ifdef DEBUG_INIT + b 54f +// Dump hex memory +// R5 - base address +// R4 - length +// R0..R6 destroyed +dump: + PutC '\r' + PutC '\n' +50: mov r6,r5 + PutHex4 r6 + PutC ' ' + ldr r3,=8 +52: PutC ' ' + ldr r6,[r5],#4 + PutHex4 r6 + sub r3,r3,#1 + cmp r3,#0 + bne 52b + PutC '\n' + PutC '\r' + sub r4,r4,#1 + cmp r4,#0 + bne 50b + mov pc,lr + +hexR6: + PutHex4 r6 + PutC ' ' + mov pc,lr +54: +#endif // DEBUG_INIT + + // Make sure MMU is OFF + mov r0,#0xE0000000 // Force cache writeback by reloading + add r2,r0,#0x4000 // cache from the zeros bank +123: ldr r1,[r0],#32 + cmp r0, r2 + bne 123b + mov r0,#0 + mov r1,#0x0070 // MMU Control System bit + mcr p15,0,r0,c7,c7,0 // Flush data and instruction cache + mcr p15,0,r0,c8,c7,0 // Flush ID TLBs + mcr p15,0,r0,c9,c0,0 // Flush Read-Buffer + mcr p15,0,r0,c7,c10,4 // Drain write buffer + mcr p15,0,r0,c13,c0,0 // Disable virtual ID mapping + mcr p15,0,r0,c1,c0,0 // Write MMU control register + nop; nop; nop; nop + +#ifdef DEBUG_INIT + InitUART3 + mov r7,#5 +05: PutC '\n' + PutC '\r' + sub r7,r7,#1 + cmp r7,#0 + bne 05b + + mrs r6,cpsr + bl hexR6 +#endif // DEBUG_INIT + +#if 0 // This made no difference + ldr r1,=10f + ldr r2,=SA11X0_RAM_BANK0_BASE + add r1,r1,r2 + mov r0,#(CPSR_IRQ_DISABLE|CPSR_FIQ_DISABLE|CPSR_SUPERVISOR_MODE) + msr cpsr,r0 + msr spsr,r0 + movs pc,r1 +10: +#else + + mov r0,#(CPSR_IRQ_DISABLE|CPSR_FIQ_DISABLE|CPSR_SUPERVISOR_MODE) + msr cpsr,r0 +#endif +#ifdef DEBUG_INIT + mrs r6,cpsr + bl hexR6 + + ldr r5,=0x00000000 + ldr r4,=0x100/32 + bl dump +#endif // DEBUG_INIT + + // Initialise extended GPIO + ldr r0,=SA1110_EGPIO + ldr r4,=SA1110_EIO_MIN + + // Initialize pin directions + ldr r1,=SA11X0_GPIO_PIN_DIRECTION + ldr r2,=0x0401F3FC + str r2,[r1] + + ldr r2,[r1,#4] + tst r2,#0x08000000 // Look for expansion pack + orreq r4,r4,#0x01B0 // Power it up if there + str r4,[r0] + +#if defined(CYG_HAL_STARTUP_ROM) + // Disable clock switching + mcr p15,0,r0,\ + SA11X0_TEST_CLOCK_AND_IDLE_REGISTER,\ + SA11X0_DISABLE_CLOCK_SWITCHING_RM,\ + SA11X0_DISABLE_CLOCK_SWITCHING_OPCODE + + // Set up processor clock + ldr r1,=SA11X0_PWR_MGR_PLL_CONFIG + ldr r2,=SA11X0_PLL_CLOCK + str r2,[r1] + + // Turn clock switching back on + mcr p15,0,r0,\ + SA11X0_TEST_CLOCK_AND_IDLE_REGISTER,\ + SA11X0_ENABLE_CLOCK_SWITCHING_RM,\ + SA11X0_ENABLE_CLOCK_SWITCHING_OPCODE + nop + nop +#endif + + // Pause + ldr r1,=100000 +10: sub r1,r1,#1 + cmp r1,#0 + bne 10b + +#ifdef CYGBLD_HAL_STARTUP_ROM_INIT_DRAM + + // Initialize DRAM controller + bl 19f +// DRAM controller initialization +dram_table: + .word SA11X0_DRAM0_CAS_0, 0xAAAAAAA7 + .word SA11X0_DRAM0_CAS_1, 0xAAAAAAAA + .word SA11X0_DRAM0_CAS_2, 0xAAAAAAAA +// .word SA11X0_STATIC_CONTROL_0, 0x4B384B38 +// .word SA11X0_STATIC_CONTROL_1, 0x22212419 + .word SA11X0_EXP_BUS_CONFIGURATION, 0x994A994A // 0x90E790E7 + .word SA11X0_REFRESH_CONFIGURATION, 0x00302001 + .word SA11X0_DRAM2_CAS_0, 0xAAAAAAA7 + .word SA11X0_DRAM2_CAS_1, 0xAAAAAAAA + .word SA11X0_DRAM2_CAS_2, 0xAAAAAAAA +// .word SA11X0_STATIC_CONTROL_2, 0x42194449 + .word SA11X0_SMROM_CONFIGURATION, 0x00000000 // 0xAFCCAFCC + .word SA11X0_DRAM_CONFIGURATION, 0x0000F354 // 0x72547254 // Disabled + .word 0, 0 + +19: mov r1,lr // Points to 'dram_table' + ldr r2,[r1],#4 // First control register +20: ldr r3,[r1],#4 + str r3,[r2] + ldr r2,[r1],#4 // Next control register + cmp r2,#0 + bne 20b + + // Enable UART + ldr r1,=SA1110_GPCLK_CONTROL_0 + ldr r2,=SA1110_GPCLK_SUS_UART + str r2,[r1] + + // Release DRAM hold (set by RESET) + ldr r1,=SA11X0_PWR_MGR_SLEEP_STATUS + ldr r2,=SA11X0_DRAM_CONTROL_HOLD + str r2,[r1] + + // Perform 8 reads from unmapped/unenabled DRAM + ldr r1,=SA11X0_RAM_BANK0_BASE + ldr r2,[r1] + ldr r2,[r1] + ldr r2,[r1] + ldr r2,[r1] + ldr r2,[r1] + ldr r2,[r1] + ldr r2,[r1] + ldr r2,[r1] + + // Enable DRAM controller + ldr r1,=SA11X0_DRAM_CONFIGURATION + ldr r2,=0x0000F355 // 0x72547255 + str r2,[r1] + +#endif // CYGBLD_HAL_STARTUP_ROM_INIT_DRAM + + // Release peripheral hold (set by RESET) + ldr r1,=SA11X0_PWR_MGR_SLEEP_STATUS + ldr r2,=SA11X0_PERIPHERAL_CONTROL_HOLD + str r2,[r1] + + // Set up a stack [for calling C code] + ldr r1,=__startup_stack + ldr r2,=SA11X0_RAM_BANK0_BASE + orr sp,r1,r2 + +#ifdef DEBUG_INIT + mrc p15,0,r6,c1,c0,0 + bl hexR6 + mrc p15,0,r6,c2,c0,0 + bl hexR6 + mrc p15,0,r6,c3,c0,0 + bl hexR6 + + mrc p15,0,r5,c2,c0,0 + ldr r6,=0xFFFFC000 + and r5,r5,r6 + ldr r4,=0x100/32 + bl dump +#endif // DEBUG_INIT + + // Create MMU tables + bl hal_mmu_init + +#ifdef DEBUG_INIT + ldr r5,=0x00000000 + ldr r4,=0x100/32 + bl dump + + ldr r5,=0xC0020000 + ldr r4,=0x100/32 + bl dump + + mrc p15,0,r5,c2,c0,0 + ldr r6,=0xFFFFC000 + and r5,r5,r6 +// ldr r4,=0x4000/32 + ldr r4,=0x100/32 + bl dump +#endif // DEBUG_INIT + + // Enable MMU + ldr r2,=10f + ldr r1,=MMU_Control_Init|MMU_Control_M + mcr MMU_CP,0,r1,MMU_Control,c0 + mov pc,r2 + mcr MMU_CP,0,r0,MMU_InvalidateCache,c7,0 // Flush data and instruction cache + mcr MMU_CP,0,r0,MMU_TLB,c7,0 // Flush ID TLBs +10: + nop + nop + nop + +#ifdef DEBUG_INIT + ldr r5,=0x00022000 + ldr r4,=0xDEADDEAD + str r4,[r5],#4 + str r4,[r5],#4 + str r4,[r5],#4 + str r4,[r5],#4 + + ldr r5,=0x00022000 + ldr r4,=0x100/32 + bl dump +#endif // DEBUG_INIT + + // Save shadow copy of BCR + ldr r1,=_ipaq_EGPIO +#ifdef DEGUG_INIT + ldr r4,=SA1110_EIO_MIN +#endif // DEBUG_INIT + str r4,[r1] + .endm + +#else // defined(CYG_HAL_STARTUP_ROM) +#define PLATFORM_SETUP1 +#endif + +#define PLATFORM_VECTORS _platform_vectors + .macro _platform_vectors + .globl _ipaq_EGPIO +_ipaq_EGPIO: .long 0 // Extended GPIO shadow + + .globl _ipaq_LCD_params +_ipaq_LCD_params: + .short 0,0,0,0 // Coordinates used by virtual keyboard + .short 0,0,0,0 + .short 0 // Checksum of above + .endm + +/*---------------------------------------------------------------------------*/ +/* end of hal_platform_setup.h */ +#endif /* CYGONCE_HAL_PLATFORM_SETUP_H */ diff --git a/packages/hal/arm/sa11x0/ipaq/current/include/ipaq.h b/packages/hal/arm/sa11x0/ipaq/current/include/ipaq.h new file mode 100644 --- /dev/null +++ b/packages/hal/arm/sa11x0/ipaq/current/include/ipaq.h @@ -0,0 +1,151 @@ +#ifndef CYGONCE_IPAQ_H +#define CYGONCE_IPAQ_H + +//============================================================================= +// +// ipaq.h +// +// Platform specific support (register layout, etc) +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas, richard.panton@3glab.com +// Date: 2001-02-24 +// Purpose: Intel SA1110/iPAQ platform specific support routines +// Description: +// Usage: #include +// +//####DESCRIPTIONEND#### +// +//============================================================================= + + +#ifndef __ASSEMBLER__ +// +// Extended GPIO +// Note: This register is write-only. Thus a shadow copy is provided so that +// it may be safely updated/shared by multiple threads. +// +extern unsigned long _ipaq_EGPIO; // Shadow copy + +extern unsigned short _ipaq_LCD_params[(4*2)+1]; // Various LCD parameters + +extern void ipaq_EGPIO(unsigned long mask, unsigned long value); + +#endif + +// +// Signal assertion levels +// +#define SA1110_LOGIC_ONE(m) (m & 0xFFFF) +#define SA1110_LOGIC_ZERO(m) (m & 0x0000) + +// +// iPAQ Extended GPIO definitions +// +#define SA1110_EGPIO REG16_PTR(0x49000000) +#define SA1110_EIO_MIN 0x0080 + +#define SA1110_EIO_VPP 0x0001 +# define SA1110_EIO_VPP_OFF SA1110_LOGIC_ZERO(SA1110_EIO_VPP) +# define SA1110_EIO_VPP_ON SA1110_LOGIC_ONE(SA1110_EIO_VPP) +#define SA1110_EIO_CF_RESET 0x0002 +# define SA1110_EIO_CF_RESET_DISABLE SA1110_LOGIC_ZERO(SA1110_EIO_CF_RESET) +# define SA1110_EIO_CF_RESET_ENABLE SA1110_LOGIC_ONE(SA1110_EIO_CF_RESET) +#define SA1110_EIO_OPT_RESET 0x0004 +# define SA1110_EIO_OPT_RESET_DISABLE SA1110_LOGIC_ZERO(SA1110_EIO_OPT_RESET) +# define SA1110_EIO_OPT_RESET_ENABLE SA1110_LOGIC_ONE(SA1110_EIO_OPT_RESET) +#define SA1110_EIO_CODEC_RESET 0x0008 // Active LOW +# define SA1110_EIO_CODEC_RESET_DISABLE SA1110_LOGIC_ONE(SA1110_EIO_CODEC_RESET) +# define SA1110_EIO_CODEC_RESET_ENABLE SA1110_LOGIC_ZERO(SA1110_EIO_CODEC_RESET) +#define SA1110_EIO_OPT_PWR 0x0010 +# define SA1110_EIO_OPT_PWR_OFF SA1110_LOGIC_ZERO(SA1110_EIO_OPT_PWR) +# define SA1110_EIO_OPT_PWR_ON SA1110_LOGIC_ONE(SA1110_EIO_OPT_PWR) +#define SA1110_EIO_OPT 0x0020 +# define SA1110_EIO_OPT_OFF SA1110_LOGIC_ZERO(SA1110_EIO_OPT) +# define SA1110_EIO_OPT_ON SA1110_LOGIC_ONE(SA1110_EIO_OPT) +#define SA1110_EIO_LCD_3V3 0x0040 +# define SA1110_EIO_LCD_3V3_OFF SA1110_LOGIC_ZERO(SA1110_EIO_LCD_3V3) +# define SA1110_EIO_LCD_3V3_ON SA1110_LOGIC_ONE(SA1110_EIO_LCD_3V3) +#define SA1110_EIO_RS232 0x0080 +# define SA1110_EIO_RS232_OFF SA1110_LOGIC_ZERO(SA1110_EIO_RS232) +# define SA1110_EIO_RS232_ON SA1110_LOGIC_ONE(SA1110_EIO_RS232) +#define SA1110_EIO_LCD_CTRL 0x0100 +# define SA1110_EIO_LCD_CTRL_OFF SA1110_LOGIC_ZERO(SA1110_EIO_LCD_CTRL) +# define SA1110_EIO_LCD_CTRL_ON SA1110_LOGIC_ONE(SA1110_EIO_LCD_CTRL) +#define SA1110_EIO_IR 0x0200 +# define SA1110_EIO_IR_OFF SA1110_LOGIC_ZERO(SA1110_EIO_IR) +# define SA1110_EIO_IR_ON SA1110_LOGIC_ONE(SA1110_EIO_IR) +#define SA1110_EIO_AMP 0x0400 +# define SA1110_EIO_AMP_OFF SA1110_LOGIC_ZERO(SA1110_EIO_AMP) +# define SA1110_EIO_AMP_ON SA1110_LOGIC_ONE(SA1110_EIO_AMP) +#define SA1110_EIO_AUDIO 0x0800 +# define SA1110_EIO_AUDIO_OFF SA1110_LOGIC_ZERO(SA1110_EIO_AUDIO) +# define SA1110_EIO_AUDIO_ON SA1110_LOGIC_ONE(SA1110_EIO_AUDIO) +#define SA1110_EIO_MUTE 0x1000 +# define SA1110_EIO_MUTE_OFF SA1110_LOGIC_ZERO(SA1110_EIO_MUTE) +# define SA1110_EIO_MUTE_ON SA1110_LOGIC_ONE(SA1110_EIO_MUTE) +#define SA1110_EIO_IR_FSEL 0x2000 +# define SA1110_EIO_SIR SA1110_LOGIC_ZERO(SA1110_EIO_IR_FSEL) +# define SA1110_EIO_FIR SA1110_LOGIC_ONE(SA1110_EIO_IR_FSEL) +#define SA1110_EIO_LCD_5V 0x4000 +# define SA1110_EIO_LCD_5V_OFF SA1110_LOGIC_ZERO(SA1110_EIO_LCD_5V) +# define SA1110_EIO_LCD_5V_ON SA1110_LOGIC_ONE(SA1110_EIO_LCD_5V) +#define SA1110_EIO_LCD_VDD 0x8000 +# define SA1110_EIO_LCD_VDD_OFF SA1110_LOGIC_ZERO(SA1110_EIO_LCD_VDD) +# define SA1110_EIO_LCD_VDD_ON SA1110_LOGIC_ONE(SA1110_EIO_LCD_VDD) + +// +// Special purpose GPIO interrupt mappings +// +#define SA1110_CF_IRQ CYGNUM_HAL_INTERRUPT_GPIO21 +#define SA1110_CF_DETECT CYGNUM_HAL_INTERRUPT_GPIO17 + +// +// GPIO layout +// +#define SA1110_GPIO_CF_DETECT 0x00020000 // 0 = Compact Flash detect +#define SA1110_GPIO_CF_PRESENT SA1110_LOGIC_ZERO(SA1110_GPIO_CF_DETECT) +#define SA1110_GPIO_CF_ABSENT SA1110_LOGIC_ONE(SA1110_GPIO_CF_DETECT) + +// +// LCD Controller +// +#define SA1110_LCCR0 SA11X0_REGISTER(0x30100000) +#define SA1110_LCSR SA11X0_REGISTER(0x30100004) +#define SA1110_DBAR1 SA11X0_REGISTER(0x30100010) +#define SA1110_DCAR1 SA11X0_REGISTER(0x30100014) +#define SA1110_DBAR2 SA11X0_REGISTER(0x30100018) +#define SA1110_DCAR2 SA11X0_REGISTER(0x3010001C) +#define SA1110_LCCR1 SA11X0_REGISTER(0x30100020) +#define SA1110_LCCR2 SA11X0_REGISTER(0x30100024) +#define SA1110_LCCR3 SA11X0_REGISTER(0x30100028) + +/* end of ipaq.h */ +#endif /* CYGONCE_IPAQ_H */ diff --git a/packages/hal/arm/sa11x0/ipaq/current/include/lcd_support.h b/packages/hal/arm/sa11x0/ipaq/current/include/lcd_support.h new file mode 100644 --- /dev/null +++ b/packages/hal/arm/sa11x0/ipaq/current/include/lcd_support.h @@ -0,0 +1,66 @@ +#ifndef _LCD_SUPPORT_H_ +#define _LCD_SUPPORT_H_ +//========================================================================== +// +// lcd_support.h +// +// SA1110/iPAQ - LCD support routines +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 2001-02-24 +// Description: Simple LCD support +//####DESCRIPTIONEND#### + +struct lcd_info { + short height, width; // Pixels + short bpp; // Depth (bits/pixel) + short type; + short rlen; // Length of one raster line in bytes + void *fb; // Frame buffer +}; + +// Frame buffer types +#define FB_TRUE_RGB565 0x01 + +// Exported functions +void lcd_init(int depth); +void lcd_clear(void); +void lcd_brightness(int level); +void lcd_moveto(int X, int Y); +void lcd_putc(cyg_int8 c); +int lcd_printf(char const *fmt, ...); +void lcd_setbg(int red, int green, int blue); +void lcd_setfg(int red, int green, int blue); +void lcd_comm_init(void); +int lcd_getinfo(struct lcd_info *info); +void lcd_on(bool enable); + +#endif // _LCD_SUPPORT_H_ diff --git a/packages/hal/arm/sa11x0/ipaq/current/include/pkgconf/mlt_arm_sa11x0_ipaq_ram.h b/packages/hal/arm/sa11x0/ipaq/current/include/pkgconf/mlt_arm_sa11x0_ipaq_ram.h new file mode 100644 --- /dev/null +++ b/packages/hal/arm/sa11x0/ipaq/current/include/pkgconf/mlt_arm_sa11x0_ipaq_ram.h @@ -0,0 +1,17 @@ +// eCos memory layout - Fri Oct 20 05:56:24 2000 + +// This is a generated file - do not edit + +#ifndef __ASSEMBLER__ +#include +#include + +#endif +#define CYGMEM_REGION_ram (0) +#define CYGMEM_REGION_ram_SIZE (0x1FC0000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__heap1) []; +#endif +#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1)) +#define CYGMEM_SECTION_heap1_SIZE (0x1FC0000 - (size_t) CYG_LABEL_NAME (__heap1)) diff --git a/packages/hal/arm/sa11x0/ipaq/current/include/pkgconf/mlt_arm_sa11x0_ipaq_ram.ldi b/packages/hal/arm/sa11x0/ipaq/current/include/pkgconf/mlt_arm_sa11x0_ipaq_ram.ldi new file mode 100644 --- /dev/null +++ b/packages/hal/arm/sa11x0/ipaq/current/include/pkgconf/mlt_arm_sa11x0_ipaq_ram.ldi @@ -0,0 +1,27 @@ +// eCos memory layout - Fri Oct 20 05:56:24 2000 + +// This is a generated file - do not edit + +#include + +MEMORY +{ + ram : ORIGIN = 0x0000, LENGTH = 0x1fc0000 +} + +SECTIONS +{ + SECTIONS_BEGIN + SECTION_fixed_vectors (ram, 0x0020, LMA_EQ_VMA) + SECTION_rom_vectors (ram, 0x20000, LMA_EQ_VMA) + SECTION_text (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fini (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_rodata (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_rodata1 (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fixup (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_gcc_except_table (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_data (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA) + CYG_LABEL_DEFN(__heap1) = ALIGN (0x1000); + SECTIONS_END +} diff --git a/packages/hal/arm/sa11x0/ipaq/current/include/pkgconf/mlt_arm_sa11x0_ipaq_ram.mlt b/packages/hal/arm/sa11x0/ipaq/current/include/pkgconf/mlt_arm_sa11x0_ipaq_ram.mlt new file mode 100644 --- /dev/null +++ b/packages/hal/arm/sa11x0/ipaq/current/include/pkgconf/mlt_arm_sa11x0_ipaq_ram.mlt @@ -0,0 +1,13 @@ +version 0 +region ram 0 1fc0000 0 ! +section fixed_vectors 0 1 0 1 1 0 1 0 20 20 ! +section rom_vectors 0 1 0 1 1 1 1 1 20000 20000 text text ! +section text 0 4 0 1 0 1 0 1 fini fini ! +section fini 0 4 0 1 0 1 0 1 rodata rodata ! +section rodata 0 4 0 1 0 1 0 1 rodata1 rodata1 ! +section rodata1 0 4 0 1 0 1 0 1 fixup fixup ! +section fixup 0 4 0 1 0 1 0 1 gcc_except_table gcc_except_table ! +section gcc_except_table 0 4 0 1 0 1 0 1 data data ! +section data 0 4 0 1 0 1 0 1 bss bss ! +section bss 0 4 0 1 0 1 0 1 heap1 heap1 ! +section heap1 0 1000 0 0 0 0 0 0 ! diff --git a/packages/hal/arm/sa11x0/ipaq/current/include/pkgconf/mlt_arm_sa11x0_ipaq_rom.h b/packages/hal/arm/sa11x0/ipaq/current/include/pkgconf/mlt_arm_sa11x0_ipaq_rom.h new file mode 100644 --- /dev/null +++ b/packages/hal/arm/sa11x0/ipaq/current/include/pkgconf/mlt_arm_sa11x0_ipaq_rom.h @@ -0,0 +1,20 @@ +// eCos memory layout - Fri Oct 20 05:56:55 2000 + +// This is a generated file - do not edit + +#ifndef __ASSEMBLER__ +#include +#include + +#endif +#define CYGMEM_REGION_ram (0) +#define CYGMEM_REGION_ram_SIZE (0x1FC0000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) +#define CYGMEM_REGION_rom (0x50000000) +#define CYGMEM_REGION_rom_SIZE (0x2000000) +#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R) +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__heap1) []; +#endif +#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1)) +#define CYGMEM_SECTION_heap1_SIZE (0x1FC0000 - (size_t) CYG_LABEL_NAME (__heap1)) diff --git a/packages/hal/arm/sa11x0/ipaq/current/include/pkgconf/mlt_arm_sa11x0_ipaq_rom.ldi b/packages/hal/arm/sa11x0/ipaq/current/include/pkgconf/mlt_arm_sa11x0_ipaq_rom.ldi new file mode 100644 --- /dev/null +++ b/packages/hal/arm/sa11x0/ipaq/current/include/pkgconf/mlt_arm_sa11x0_ipaq_rom.ldi @@ -0,0 +1,28 @@ +// eCos memory layout - Fri Oct 20 05:56:55 2000 + +// This is a generated file - do not edit + +#include + +MEMORY +{ + ram : ORIGIN = 0, LENGTH = 0x1FC0000 + rom : ORIGIN = 0x50000000, LENGTH = 0x02000000 +} + +SECTIONS +{ + SECTIONS_BEGIN + SECTION_rom_vectors (rom, 0x50000000, LMA_EQ_VMA) + SECTION_text (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fini (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_rodata (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_rodata1 (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fixup (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_gcc_except_table (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fixed_vectors (ram, 0x20, LMA_EQ_VMA) + SECTION_data (ram, 0x8000, FOLLOWING (.gcc_except_table)) + SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA) + CYG_LABEL_DEFN(__heap1) = ALIGN (0x100); + SECTIONS_END +} diff --git a/packages/hal/arm/sa11x0/ipaq/current/include/pkgconf/mlt_arm_sa11x0_ipaq_rom.mlt b/packages/hal/arm/sa11x0/ipaq/current/include/pkgconf/mlt_arm_sa11x0_ipaq_rom.mlt new file mode 100644 --- /dev/null +++ b/packages/hal/arm/sa11x0/ipaq/current/include/pkgconf/mlt_arm_sa11x0_ipaq_rom.mlt @@ -0,0 +1,14 @@ +version 0 +region ram 0 1fc0000 0 ! +region rom 50000000 2000000 1 ! +section fixed_vectors 0 1 0 1 1 0 1 0 20 20 ! +section data 0 1 1 1 1 1 0 0 8000 bss ! +section bss 0 4 0 1 0 1 0 1 heap1 heap1 ! +section heap1 0 100 0 0 0 0 0 0 ! +section rom_vectors 0 1 0 1 1 1 1 1 50000000 50000000 text text ! +section text 0 4 0 1 0 1 0 1 fini fini ! +section fini 0 4 0 1 0 1 0 1 rodata rodata ! +section rodata 0 4 0 1 0 1 0 1 rodata1 rodata1 ! +section rodata1 0 4 0 1 0 1 0 1 fixup fixup ! +section fixup 0 4 0 1 0 1 0 1 gcc_except_table gcc_except_table ! +section gcc_except_table 0 4 0 1 0 0 0 1 data ! diff --git a/packages/hal/arm/sa11x0/ipaq/current/include/pkgconf/mlt_arm_sa11x0_ipaq_wince.h b/packages/hal/arm/sa11x0/ipaq/current/include/pkgconf/mlt_arm_sa11x0_ipaq_wince.h new file mode 100644 --- /dev/null +++ b/packages/hal/arm/sa11x0/ipaq/current/include/pkgconf/mlt_arm_sa11x0_ipaq_wince.h @@ -0,0 +1,17 @@ +// eCos memory layout - Fri Oct 20 05:56:24 2000 + +// This is a generated file - do not edit + +#ifndef __ASSEMBLER__ +#include +#include + +#endif +#define CYGMEM_REGION_ram (0) +#define CYGMEM_REGION_ram_SIZE (0x2000000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__heap1) []; +#endif +#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1)) +#define CYGMEM_SECTION_heap1_SIZE (0x2000000 - (size_t) CYG_LABEL_NAME (__heap1)) diff --git a/packages/hal/arm/sa11x0/ipaq/current/include/pkgconf/mlt_arm_sa11x0_ipaq_wince.ldi b/packages/hal/arm/sa11x0/ipaq/current/include/pkgconf/mlt_arm_sa11x0_ipaq_wince.ldi new file mode 100644 --- /dev/null +++ b/packages/hal/arm/sa11x0/ipaq/current/include/pkgconf/mlt_arm_sa11x0_ipaq_wince.ldi @@ -0,0 +1,27 @@ +// eCos memory layout - Fri Oct 20 05:56:24 2000 + +// This is a generated file - do not edit + +#include + +MEMORY +{ + ram : ORIGIN = 0x0000, LENGTH = 0x2000000 +} + +SECTIONS +{ + SECTIONS_BEGIN + SECTION_fixed_vectors (ram, 0x0020, LMA_EQ_VMA) + SECTION_rom_vectors (ram, 0x22000, LMA_EQ_VMA) + SECTION_text (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fini (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_rodata (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_rodata1 (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fixup (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_gcc_except_table (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_data (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA) + CYG_LABEL_DEFN(__heap1) = ALIGN (0x1000); + SECTIONS_END +} diff --git a/packages/hal/arm/sa11x0/ipaq/current/include/pkgconf/mlt_arm_sa11x0_ipaq_wince.mlt b/packages/hal/arm/sa11x0/ipaq/current/include/pkgconf/mlt_arm_sa11x0_ipaq_wince.mlt new file mode 100644 --- /dev/null +++ b/packages/hal/arm/sa11x0/ipaq/current/include/pkgconf/mlt_arm_sa11x0_ipaq_wince.mlt @@ -0,0 +1,13 @@ +version 0 +region ram 0 2000000 0 ! +section fixed_vectors 0 1 0 1 1 0 1 0 20 20 ! +section rom_vectors 0 1 0 1 1 1 1 1 22000 22000 text text ! +section text 0 4 0 1 0 1 0 1 fini fini ! +section fini 0 4 0 1 0 1 0 1 rodata rodata ! +section rodata 0 4 0 1 0 1 0 1 rodata1 rodata1 ! +section rodata1 0 4 0 1 0 1 0 1 fixup fixup ! +section fixup 0 4 0 1 0 1 0 1 gcc_except_table gcc_except_table ! +section gcc_except_table 0 4 0 1 0 1 0 1 data data ! +section data 0 4 0 1 0 1 0 1 bss bss ! +section bss 0 4 0 1 0 1 0 1 heap1 heap1 ! +section heap1 0 1000 0 0 0 0 0 0 ! diff --git a/packages/hal/arm/sa11x0/ipaq/current/include/plf_mmap.h b/packages/hal/arm/sa11x0/ipaq/current/include/plf_mmap.h new file mode 100644 --- /dev/null +++ b/packages/hal/arm/sa11x0/ipaq/current/include/plf_mmap.h @@ -0,0 +1,123 @@ +#ifndef CYGONCE_HAL_SA11X0_PLATFORM_PLF_MMAP_H +#define CYGONCE_HAL_SA11X0_PLATFORM_PLF_MMAP_H +/*============================================================================= +// +// plf_mmap.h +// +// Platform specific memory map support +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): hmt +// Contributors: hmt +// Date: 2001-01-04 +// Purpose: Intel SA11x0 series platform-specific memory mapping macros +// Description: Macros to convert a cached, virtual address to +// 1) an uncached adddress for the same memory (if available) +// 2) the equivalent physical address for giving to external +// hardware eg. DMA engines. +// +// NB: this mapping is expressed here statically, independent +// of the actual mapping installed in the MMAP table. So if +// someone changes that, or its initialisation is changed, +// then this module must change. This is intended to be +// efficient at a cost of generality. It is also intended to +// be called with constants (such as &my_struct) as input +// args, so that all the work can be done at compile time, +// with optimization on. +// +// Usage: #include +// (which includes this file itself) +// +//####DESCRIPTIONEND#### +// +//===========================================================================*/ + +#include + +// Get the pagesize for a particular virtual address: + +// This does not depend on the vaddr. +#define HAL_MM_PAGESIZE( vaddr, pagesize ) CYG_MACRO_START \ + (pagesize) = SZ_1M; \ +CYG_MACRO_END + +// Get the physical address from a virtual address: + +// Only RAM and ROM are mapped; we just pass through all other values, +// rather than detecting nonexistent areas here. + +#define HAL_VIRT_TO_PHYS_ADDRESS( vaddr, paddr ) CYG_MACRO_START \ + cyg_uint32 _v_ = (cyg_uint32)(vaddr); \ + if ( 32 * SZ_1M > _v_ ) /* 32Mb of SDRAM Bank 0 from 0-32Mb */ \ + _v_ += 0xc00u * SZ_1M; \ + else if ( 0x500u * SZ_1M > _v_ ) /* Space between RAM and mapped ROM */\ + /* no change */ ; \ + else if ( 0x520u * SZ_1M > _v_ ) /* Mapped boot ROM size 32Mb */ \ + _v_ -= 0x500u * SZ_1M; \ + else /* Rest of it */ \ + /* no change */ ; \ + (paddr) = _v_; \ +CYG_MACRO_END + +// Get the virtual address for a physical address: + +// Only RAM and ROM are mapped; we just pass through all other values, +// rather than detecting nonexistent areas here. + +#define HAL_PHYS_TO_VIRT_ADDRESS( paddr, vaddr ) CYG_MACRO_START \ + cyg_uint32 _p_ = (cyg_uint32)(paddr); \ + if ( 32 * SZ_1M > _p_ ) /* 32Mb Boot ROM mapped to 0x500Mb */ \ + _p_ += 0x500u * SZ_1M; \ + else if ( 0xc00u * SZ_1M > _p_ ) /* Space between ROM and SDRAM */ \ + /* no change */ ; \ + else if ( 0xc20u * SZ_1M > _p_ ) /* Raw RAM size 32Mb */ \ + _p_ -= 0xc00u * SZ_1M; \ + else /* Rest of it */ \ + /* no change */ ; \ + (vaddr) = _p_ ; \ +CYG_MACRO_END + +// Get a non-cacheable address for accessing the same store as a virtual +// (assumed cachable) address: + +// Only RAM is mapped: ROM is only available cachable, everything else is +// not cachable anyway. + +#define HAL_VIRT_TO_UNCACHED_ADDRESS( vaddr, uaddr ) CYG_MACRO_START \ + cyg_uint32 _v_ = (cyg_uint32)(vaddr); \ + if ( 32 * SZ_1M > _v_ ) /* 32Mb of SDRAM Bank 0 from 0-32Mb */ \ + _v_ += 0xc00u * SZ_1M; \ + else /* Everything else is already uncacheable or is ROM */ \ + /* no change */ ; \ + (uaddr) = _v_ ; \ +CYG_MACRO_END + +//--------------------------------------------------------------------------- +#endif // CYGONCE_HAL_SA11X0_PLATFORM_PLF_MMAP_H +// EOF plf_mmap.h diff --git a/packages/hal/arm/sa11x0/ipaq/current/misc/redboot_ROM.ecm b/packages/hal/arm/sa11x0/ipaq/current/misc/redboot_ROM.ecm new file mode 100644 --- /dev/null +++ b/packages/hal/arm/sa11x0/ipaq/current/misc/redboot_ROM.ecm @@ -0,0 +1,77 @@ +cdl_savefile_version 1; +cdl_savefile_command cdl_savefile_version {}; +cdl_savefile_command cdl_savefile_command {}; +cdl_savefile_command cdl_configuration { description hardware template package }; +cdl_savefile_command cdl_package { value_source user_value wizard_value inferred_value }; +cdl_savefile_command cdl_component { value_source user_value wizard_value inferred_value }; +cdl_savefile_command cdl_option { value_source user_value wizard_value inferred_value }; +cdl_savefile_command cdl_interface { value_source user_value wizard_value inferred_value }; + +cdl_configuration eCos { + description "" ; + hardware ipaq ; + template redboot ; + package -hardware CYGPKG_HAL_ARM current ; + package -hardware CYGPKG_HAL_ARM_SA11X0 current ; + package -hardware CYGPKG_HAL_ARM_SA11X0_IPAQ v1_0_0 ; + package -hardware CYGPKG_IO_SERIAL_ARM_SA11X0 current ; + package -template CYGPKG_HAL current ; + package -template CYGPKG_INFRA current ; + package -template CYGPKG_REDBOOT current ; + package -hardware CYGPKG_DEVS_PCMCIA_IPAQ v1_0_0 ; + package CYGPKG_IO_PCMCIA current ; + package CYGPKG_DEVS_ETH_CF current ; + package CYGPKG_IO_ETH_DRIVERS current ; + package CYGPKG_DEVS_FLASH_ASSABET current ; + package CYGPKG_IO_FLASH current ; +}; + +cdl_option CYGBLD_BUILD_GDB_STUBS { + user_value 0 +}; + +cdl_option CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT { + user_value 0 +}; + +cdl_option CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM { + inferred_value 0 +}; + +cdl_option CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS { + inferred_value 1 +}; + +cdl_option CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT { + inferred_value 1 +}; + +cdl_option CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT { + inferred_value 0 +}; + +cdl_option CYGSEM_HAL_ROM_MONITOR { + user_value 1 +}; + +cdl_option CYGSEM_HAL_USE_ROM_MONITOR { + inferred_value 0 0 +}; + +cdl_component CYG_HAL_STARTUP { + user_value ROM +}; + +cdl_component CYGBLD_BUILD_REDBOOT { + user_value 1 +}; + +cdl_component CYGPKG_REDBOOT_NETWORKING { + user_value 1 +}; + +cdl_option CYGSEM_REDBOOT_FLASH_CONFIG { + user_value 1 +}; + + diff --git a/packages/hal/arm/sa11x0/ipaq/current/src/atmel_support.c b/packages/hal/arm/sa11x0/ipaq/current/src/atmel_support.c new file mode 100644 --- /dev/null +++ b/packages/hal/arm/sa11x0/ipaq/current/src/atmel_support.c @@ -0,0 +1,459 @@ +//========================================================================== +// +// atmel_support.c +// +// SA1110/iPAQ - Atmel micro-controller support routines +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 2001-02-27 +// Description: Simple Atmel support +//####DESCRIPTIONEND#### + +#include +#include + +#ifdef CYGPKG_REDBOOT +#include +#endif + +#include +#include // Virtual vector functions +#include // IO macros +#include // Register state info +#include // HAL interrupt macros + +#include // Board definitions +#include +#include + +#ifdef CYGPKG_IO +// Need to export interrupt driven interfaces +#include +#define ATMEL_INT CYGNUM_HAL_INTERRUPT_UART1 +static cyg_interrupt atmel_interrupt; +static cyg_handle_t atmel_interrupt_handle; +#endif + +#include // Interfaces, commands + +struct sa11x0_serial { + volatile cyg_uint32 utcr0; + volatile cyg_uint32 utcr1; + volatile cyg_uint32 utcr2; + volatile cyg_uint32 utcr3; + volatile cyg_uint32 pad0010; + volatile cyg_uint32 utdr; + volatile cyg_uint32 pad0018; + volatile cyg_uint32 utsr0; + volatile cyg_uint32 utsr1; +}; + +#define ATMEL_PUTQ_SIZE 32 +unsigned char atmel_putq[ATMEL_PUTQ_SIZE]; +int atmel_putq_put, atmel_putq_get; + +bool atmel_use_ints; + +bool +atmel_putc(unsigned char c) +{ + atmel_putq[atmel_putq_put++] = c; + if (atmel_putq_put == ATMEL_PUTQ_SIZE) { + atmel_putq_put = 0; + } +} + +static atmel_handler *handlers[NUM_ATMEL_CMDS]; + +static void +null_handler(atmel_pkt *pkt) +{ + diag_printf("Atmel - packet ignored: %x\n", pkt->data[0]); + diag_dump_buf(pkt->data, 16); +} + +// +// Register a handler for a particular packet type +// +void +atmel_register(int cmd, atmel_handler *fun) +{ + handlers[cmd] = fun; +} + +// +// This routine is called to process an input character from the +// Atmel micro-controller. Since command packets are multiple +// characters, this routine has to keep state for the packet. Once +// a complete packet is received, the appropriate handler function +// will be called (if the checksum matches) +// +static void +atmel_in(unsigned char ch) +{ + static atmel_pkt pkt; + static unsigned char cksum; + static bool sof = false; + + if (!sof) { + // Wait for start of packet (SOF) + if (ch != SOF) { + return; // Just ignore out of order characters + } + sof = true; + pkt.size = 0; + return; + } + if (pkt.size == 0) { + // First byte of packet - command+length; + pkt.len = (ch & 0x0F) + 1; + cksum = 0; + } + pkt.data[pkt.size++] = ch; + if (pkt.size > pkt.len) { + // End of packet data + if (cksum == ch) { + (*handlers[pkt.data[0] >> 4])(&pkt); + } + sof = false; + } else { + cksum += ch; + } +} + +// +// This [internal] routine is used to handle data from the Atmel micro-controller +// +static void +atmel_poll(void) +{ + volatile struct sa11x0_serial *base = (volatile struct sa11x0_serial *)SA11X0_UART1_BASE; + unsigned char ch; + + while ((base->utsr1 & SA11X0_UART_RX_FIFO_NOT_EMPTY) != 0) { + ch = (char)base->utdr; + atmel_in(ch); + } +} + +// +// This [internal] routine is used to send data to the Atmel micro-controller +// +static void +atmel_flush(void) +{ + volatile struct sa11x0_serial *base = (volatile struct sa11x0_serial *)SA11X0_UART1_BASE; + +#ifdef CYGPKG_IO + cyg_drv_isr_lock(); +#endif + while (atmel_putq_get != atmel_putq_put) { + if ((base->utsr1 & SA11X0_UART_TX_FIFO_NOT_FULL) == 0) { + // Wait forever if in non-interrupt mode + if (atmel_use_ints) { + break; + } + } else { + base->utdr = atmel_putq[atmel_putq_get++]; + if (atmel_putq_get == ATMEL_PUTQ_SIZE) { + atmel_putq_get = 0; + } + } + } +#ifdef CYGPKG_IO + cyg_drv_isr_unlock(); +#endif +} + +#ifdef CYGPKG_IO + +// Low level interrupt handler (ISR) +static cyg_uint32 +atmel_ISR(cyg_vector_t vector, cyg_addrword_t data) +{ + cyg_drv_interrupt_mask(vector); + cyg_drv_interrupt_acknowledge(vector); + return CYG_ISR_CALL_DSR; // Cause DSR to be run +} + +// High level interrupt handler (DSR) +static void +atmel_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data) +{ + volatile struct sa11x0_serial *base = (volatile struct sa11x0_serial *)SA11X0_UART1_BASE; + unsigned int stat0 = base->utsr0; + + if (stat0 & SA11X0_UART_TX_SERVICE_REQUEST) { + atmel_flush(); + } + if (stat0 & (SA11X0_UART_RX_SERVICE_REQUEST|SA11X0_UART_RX_IDLE)) { + atmel_poll(); + base->utsr0 = SA11X0_UART_RX_IDLE; // Need to clear this manually + } + cyg_drv_interrupt_unmask(vector); +} + +// +// Connect/disconnect interrupt processing +// +void +atmel_interrupt_mode(bool enable) +{ + volatile struct sa11x0_serial *base = (volatile struct sa11x0_serial *)SA11X0_UART1_BASE; + + if (enable) { + // Enable the receiver (with interrupts) and the transmitter. + base->utcr3 = SA11X0_UART_RX_ENABLED | + SA11X0_UART_TX_ENABLED | + SA11X0_UART_RX_FIFO_INT_ENABLED; + cyg_drv_interrupt_unmask(ATMEL_INT); + } else { + cyg_drv_interrupt_mask(ATMEL_INT); + } + atmel_use_ints = enable; +} +#endif + +// +// Set up the Atmel micro-controller environment +// +void +atmel_init(void) +{ + volatile struct sa11x0_serial *base = (volatile struct sa11x0_serial *)SA11X0_UART1_BASE; + cyg_uint32 brd; + int i; + static bool _init = false; + + if (_init) return; + + // Disable Receiver and Transmitter (clears FIFOs) + base->utcr3 = SA11X0_UART_RX_DISABLED | SA11X0_UART_TX_DISABLED; + + // Clear sticky (writable) status bits. + base->utsr0 = SA11X0_UART_RX_IDLE | SA11X0_UART_RX_BEGIN_OF_BREAK | + SA11X0_UART_RX_END_OF_BREAK; + + // Set UART to 8N1 (8 data bits, no partity, 1 stop bit) + base->utcr0 = SA11X0_UART_PARITY_DISABLED | SA11X0_UART_STOP_BITS_1 | + SA11X0_UART_DATA_BITS_8; + + // Set the desired baud rate. + brd = SA11X0_UART_BAUD_RATE_DIVISOR(115200); + base->utcr1 = (brd >> 8) & SA11X0_UART_H_BAUD_RATE_DIVISOR_MASK; + base->utcr2 = brd & SA11X0_UART_L_BAUD_RATE_DIVISOR_MASK; + + // Enable the receiver and the transmitter. + base->utcr3 = SA11X0_UART_RX_ENABLED | SA11X0_UART_TX_ENABLED; + + // Set up character queues + atmel_putq_put = atmel_putq_get = 0; + atmel_use_ints = false; + + // Set up handlers + for (i = 0; i < NUM_ATMEL_CMDS; i++) { + atmel_register(i, null_handler); + } + +#ifdef CYGPKG_IO + cyg_drv_interrupt_create(ATMEL_INT, + 99, // Priority - unused + (cyg_addrword_t)base, // Data item passed to interrupt handler + atmel_ISR, + atmel_DSR, + &atmel_interrupt_handle, + &atmel_interrupt); + cyg_drv_interrupt_attach(atmel_interrupt_handle); +#endif + + _init = true; +} + +static void +atmel_pkt_send(atmel_pkt *pkt) +{ + int i; + + for (i = 0; i < pkt->len; i++) { + atmel_putc(pkt->data[i]); + } + atmel_flush(); +} + +bool +atmel_send(int cmd, unsigned char *data, int len) +{ + atmel_pkt pkt; + unsigned char cksum, *dp; + int i; + + dp = pkt.data; + *dp++ = SOF; + *dp++ = cksum = (cmd << 4) | len; + for (i = 0; i < len; i++) { + *dp++ = data[i]; + cksum += data[i]; + } + *dp = cksum; + pkt.len = len + 3; + atmel_pkt_send(&pkt); +} + +#define MAX_TS_EVENTS 32 +static struct ts_event ts_event_list[MAX_TS_EVENTS]; +static int num_ts_events = 0; +static int ts_event_get, ts_event_put; + +static void +ts_event_handler(atmel_pkt *pkt) +{ + unsigned char *buf = pkt->data; + static bool up = true; + static int down_count = 0; + static short last_x, last_y; + struct ts_event *tse; + + if (num_ts_events == MAX_TS_EVENTS) { + return; + } + if ((buf[0] & 0x0F) == 0) { + // Stylus up + up = true; + down_count = 0; + tse = &ts_event_list[ts_event_put++]; + if (ts_event_put == MAX_TS_EVENTS) { + ts_event_put = 0; + } + num_ts_events++; + tse->x = (buf[1] << 8) | buf[2]; + tse->y = (buf[3] << 8) | buf[4]; + tse->up = up; + } else { + up = false; + if (down_count++ == 0) { + // First 'down' event + } else { + } + { + tse = &ts_event_list[ts_event_put++]; + if (ts_event_put == MAX_TS_EVENTS) { + ts_event_put = 0; + } + num_ts_events++; + tse->x = (buf[1] << 8) | buf[2]; + tse->y = (buf[3] << 8) | buf[4]; + tse->up = up; + } + } +} + +bool +ts_get_event(struct ts_event *tse) +{ + static bool _init = false; + + if (!_init) { + atmel_register(ATMEL_CMD_TOUCH, ts_event_handler); + atmel_register(ATMEL_CMD_UNKNOWN, ts_event_handler); + _init = true; + } + + if (num_ts_events == 0) { + atmel_poll(); + } + if (num_ts_events) { + num_ts_events--; + memcpy(tse, &ts_event_list[ts_event_get++], sizeof(*tse)); + if (ts_event_get == MAX_TS_EVENTS) { + ts_event_get = 0; + } + return true; + } else { + return false; + } +} + +#define MAX_KEY_EVENTS 8 +static struct key_event key_event_list[MAX_KEY_EVENTS]; +static int num_key_events = 0; +static int key_event_get, key_event_put; + +static void +kbd_event_handler(atmel_pkt *pkt) +{ + unsigned char *buf = pkt->data; + struct key_event *ke; + + if (num_key_events == MAX_KEY_EVENTS) { + return; + } +// printf("Keybd = %x\n", buf[1]); + ke = &key_event_list[key_event_put++]; + if (key_event_put == MAX_KEY_EVENTS) { + key_event_put = 0; + } + ke->button_info = buf[1]; + num_key_events++; +} + +bool +key_get_event(struct key_event *ke) +{ + static bool _init = false; + + if (!_init) { + atmel_register(ATMEL_CMD_KEYBD, kbd_event_handler); + _init = true; + } + + if (num_key_events == 0) { + atmel_poll(); + } + if (num_key_events) { + num_key_events--; + memcpy(ke, &key_event_list[key_event_get++], sizeof(*ke)); + if (key_event_get == MAX_KEY_EVENTS) { + key_event_get = 0; + } + return true; + } else { + return false; + } +} + +#ifdef CYGPKG_REDBOOT + +void +atmel_check(void) +{ +} +RedBoot_idle(atmel_check, RedBoot_BEFORE_NETIO); +#endif diff --git a/packages/hal/arm/sa11x0/ipaq/current/src/banner.xpm b/packages/hal/arm/sa11x0/ipaq/current/src/banner.xpm new file mode 100644 --- /dev/null +++ b/packages/hal/arm/sa11x0/ipaq/current/src/banner.xpm @@ -0,0 +1,182 @@ +#ifdef PORTRAIT_MODE +/* XPM */ +static char * banner_xpm[] = { +"240 39 65 1", +" c None", +". c #020206", +"+ c #FAFAFA", +"@ c #E61606", +"# c #C2C0C1", +"$ c #EAE5E7", +"% c #BB0F06", +"& c #949394", +"* c #F1B8C0", +"= c #6C686A", +"- c #710206", +"; c #F3A19B", +"> c #404043", +", c #B9B7B8", +"' c #EC8F9A", +") c #353536", +"! c #EA6C6F", +"~ c #29282B", +"{ c #E85A5C", +"] c #E27A7A", +"^ c #300507", +"/ c #1D1C1D", +"( c #626262", +"_ c #E74844", +": c #141415", +"< c #E2554D", +"[ c #C6C6C6", +"} c #5B595C", +"| c #E6342D", +"1 c #9B9B9B", +"2 c #7C0806", +"3 c #060606", +"4 c #737072", +"5 c #C20E06", +"6 c #DEDEDE", +"7 c #E23734", +"8 c #EEEAEA", +"9 c #F4C0C3", +"0 c #820807", +"a c #505050", +"b c #FEFEFA", +"c c #CA1206", +"d c #A7A6A7", +"e c #7F7E7F", +"f c #E62419", +"g c #950E07", +"h c #F6C6CA", +"i c #550206", +"j c #0F0E0F", +"k c #CE1206", +"l c #F4F2F1", +"m c #1C0206", +"n c #CBCACB", +"o c #4B4A4B", +"p c #E2322E", +"q c #A90B06", +"r c #888888", +"s c #B0B0B0", +"t c #EEAFB6", +"u c #F8D4D4", +"v c #FAE1E3", +"w c #DB1506", +"x c #D3D2D2", +"y c #430306", +"z c #DF9D9B", +"................................................................................................................................................................................................................................................", +".................................................................................................................................bbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbb...", +".................................................................................................................................bbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbb...", +"333333333333333333333333333333333333333333333333333333333333333333333333333333333333333333333333333333333333333333333333333333333bbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbb...", +"..........3/~~~~~//3.............................................................................................................+++++++++++++++++++++++866xxxxxxxxxxxxxxxxxxxxxxxxxx$++++uuuuuuuuuuuuuuuuuuuuuuuuuuuuuuuuuuvvb++++++++++++++...", +"......../a&d,##sn,d&a/...........................................................................................................bbbbbbbbbbbbbbbbbbbbb8d4~/3........................3ebbbb@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@pp,1~.3m^^mj^^^^.33~1s)...................................................j33.................................................+++++++++++++++++bs/..........:::..................3e+bbb@w@@@@@@@@@ff@@@@@@@@@@@@@@@@@@@@@@@@@@f'l+++++++b+...", +"...o#4j..mqg5g0qi^^im..j4,~................................................~}eo~.................................................bbbbbbbbbbbbbbbbb8~3.......jorsds&(:.............:>>dbbbb@@@@@@@@@{';tt;3j~3............................................bbbbbbbbbbbbbbbbbr...3.3.3),8+bbb+l6=3........3:rx8$lb+bb@@@w@wf_9l+bbbb89{fw@w@w@|'$l++lvu!f@@@@@!+bbbbb+b+...", +"3:11:3...q-i025kqqq%q..33:&&:333333333333333333333333333333333333333333333.:dbb8)j4#)33333333333333333333333:33333333333333333333bbbbbbbbbbbbbbbb8)..3.3.:=$bbbbbbb++l&:3333333}6bbbbb+b+b@@@@@@!vbbbb++bbbb!f@@@@ftb+bbb+b+'f@@@@@@vbbbbbbbb...", +".a[:..3..cy.j^2kcq@cqy..3.~#o.............................................3~d++$).eba....................../4/3..................+++++++++++++++b,/3.....}$+++++b+bbbblr.....3axbbbbbbbbbb@w@@@{8b++bbbbbbbbl]f@@@{lb++bbbbv_w@@@@@@;++++b+b+...", +"/d4...3..wg22k0@wwwwwg.3.3.4&:..................3..3.......3............333/db+xa.4+(:.3..........3j:3...3.&x(j..................bbbbbbbbbbbbbbbb1j.....36bbblda~)ex+bbl)....3$b++bl*''t$b@@@@7ub+bbu'''u+b++l_@@f'bbbv!_{;'@@w@@@@@!bbbbbbbb...", +"od~.yyqqmqqw@5wk5qkq@0m....~s>...............3)~)/:oo~j.j:)a>o~.......j~oo))dbb$)jel}/:>>~j....3:/))))33.~~s6a~//................bbbbbbbbbbbbbbbb&3.3.33rbbb6>.3.33/s+bbsj..3rbbb+v!w@w@pt@@@f'bbbb;f@@@@'8bbbt@w@hbbbtf@@wf@@@@w@@@!bbb+b+b+...", +"e&j^%w%@-mi-qk5wk@wk5cy....jre333333333333333~d#d>=x6r::)e,666#a:333:/r[6x#4sbb6)3e+a>r#n,=/33:34&,n[&)::e&6ld1&o3333333333333333bbbbbbbbbbbbbb+be33.3.:nbb+e///////}bbb6)33/n+bb8!f@@@@@fw@@p*+bb*f@w@@@f'lbbbf@@u+bb$z7f@@@@@@@@@@!bbbbbbbb...", +"s(.^ww55k33mm^-wqwq@kc--y...=d.............33)8b6d6++d/)dlb+++b6}..3~,lbbbb$6bb$)34+enlxnl$e~.j>$8xn6l,)3#$ll8$l=................+++++++++++++b+be....3o6+bb6xxnxxxx6+bbb4..>$bbbhf@@w@@@@@@@_lb+8<@@@@@@@_ubb+_@@;+bb++v*!@@@@@@@w@{b+b+b+b+...", +"6>3m-qwwqk-^m..0www5q%%w%g3.)[...............>8++8+b+&/,bb8,d6+b8o3/,bbb866bb+b$)jrl$,>33~nla..)r~3.jel&:j:d$o/~:................bbbbbbbbbbbbbbbbe.....}8bbbbb+b+b++bb+blr..(8++b'w@@@w@@@@@@xbbd:(lbb$(>o,b+b$).eb#~.333(8s...3....:un~..s6a.3.................bbbbbbbbbbbbbbbbe333.3}8b++666x666xx6x6x43.}8b+b'@@@@@@@@w@@{bbb*p@w@@@@@@hbbb]@@@!*bbb+b+bu|@@@@@@{b+b+b+b+...", +"[/3.3mq@kwqkwc5%qkk%kq5wwwg3/x)3333333333333.)8bbl(/j3[b+,~/3:1bb8:1bb84.3.>xb+6o34le.....~xx/3..3/j:j,8)33d$}j.33333333333333333bbbbbbbbbbbb+bbbe33...a8+b+o~))~~)))))))/..}8bbbz@@@@@@@@@@@6+b,/3..~db+$)3e8}.3.33/,l..3en8$6n86)..s$o...................bbbbbbbbbbbbbb+b&3....:sbbb6}3.3..)r&&re/..:sbb++zf@@@@f!@@@ftbb+v_@@@@@7hbbbv@@@f_7@@@|u++bz@@@@@@!bbbbbbbb...", +"x)..../dl(myg@kq@kk5qw5q0m.3)x.............3.)$bb&:..~bb+ll8blll88o6bbs/.3.~dbb$)3r+}...../,6..(lxe))),8).3d8}...................bbbbbbbbbbbbbb++&:.3...>++b+6&):/en++b+r33..>bb+b+h_fw_'$@@@@!vbb+u'p@|!ubbbb]@@@~x++6).../,bl$)3ela....3~[6j>xn>33..s8)..d6o3333333333333333333bbbbbbbbbb+bbbbbs:..3..31++bb+l8l+bbbbn3....3rlbbbb+ll+bb@@@@ftbbb+l+lllb+b+t|@@f*+++llb+b+l_@@@@@@;bbbbbbbb...", +"&r}s#x=/ebb+=~~/>~))~:3.33.3ee...............)$+b1/333nbbx).:33:..:dbb843j:o6bb6)3eb}...../#6j=8&...j3#8)..s6o...................+++++++++b++bbbb6)..3333/s++bbbbbb++bx>....3./&lbb+bb++bb@@@w@fh+bb++bb+b+b97@w@_bb++bbbbbl'f@w@@@whb+b+b+b+...", +"axx++b81&bb+8n#[xnxxn:.3..3/d>...........3..3)$bb&:..3=bbl,4a>a4e/.=8bb8e}e#bbb$)34+}.33..~#$3=l1:333/l$>..d$}3..................bbbbbbbbbbbb+bbbb=.......~1b+bb+b+bb,>j3.33.../(6+b+bbbbb@@@@@@7;lbbb+bbb+*_@@@@p'8bb++b++'p@@@@@@|bbbbbbbbb...", +"~#bbbbb+++bbbbb6r&xb[....33=s/...........3.33)8bb1j3../s+bb+l8ll8)./,bbb+ll+l+b$)3e+}...3./,$.o6n>/))dl8)33&le):3................bbbbbbbbbbbb++bbb6j..333..jas68886n4:..3..3..333/a&dnb+b+@@@@@w@f_*v8v88h!f@@@@@@@|!thuu'7@@@@@@@@9bb+b+b+b+...", +".(8b+bb+b+b+b++n=}6+&.:~>~),a.3333333333..3.3)8b+&j...3~dl+++bbblo33)xlbb+bxs8b$).ela..3..~#l..el61s6618)3.)$xd,a3333333333333333bbbbbbbb+bbbbb+b++e:.......3.~}((~:..3.....33...3...rbb+b@@w@@@@@@@|_<_7@@w@@@@@@@@@@@@@@@@@@@w@f!v+bbbbbbbb...", +"3/dbb+bbbbbbbb+bl8bx)je#xxnd:...............3~d,,(..3.33~(sn6xxs4/333)e#6xs>od#d~.as).....:e1.3/en6x,a~,~..3=n$6}................+++++++b++bbbbbbbb843..3.....3...3...........3...3..ebbbb@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@{vb+b+b+b+b+...", +".3~8+bbbb+b+bbbbbb8()#8bbb8:...........3....33:::3.3.....j:////:33....3////33:::333:j3.....::...j///j3j/3.333///j................bbbbbbbbbb+bbb+bbbb8&:3..33........3.3.33...3...3...ebbbb@@@@@@@@@@@@@@@@@@@@@@@@@w@@@@@@@@@@@f{lbbbbbbbbbbb...", +".33a$b+bbbbbbb++bb#}xbbbb6>............3.33.333333...3....3.33.3..3........3.....33...3.33..3....3.3...33........................bbbbbbbbbb++bbbb++bbb#(>:33....3.3...3..3....3...3.3eb++b@@w@@@@@@@@@@@@@@w@@@@@@@@@w@@@@@wf|!*l+bb+b+b+b+b+...", +".3.j}6b+b+b++bbbbb68bbbbnoj.3333333333..3.......3...3..3...........3333......333.....3.3...3.....33.....3..33.3.33333333333333333bbbbbb+bbbbb+b++bbb++bl6dd&1&1&1&&&1&&&&&11&&&11&&1&n+bbb;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;t*lbbb+bbbbbbbbbb...", +"....3>xlbbbb+bb++b+b++l[)33..................3....3..3..3....3.33......3...3.....33......3..333.....3.3..3..3....................+++++b++bbbbbbbbb+bbbb+b+bbb+bbbbb+bbbbb++bbb+bbb+bbbbbb+bbbb+b+b++bbb++++++++++++bbbbbbbb+b+b+bb+b+b+b+b+b+...", +".3...3:exlbbbbbbb+bblne:33...........3....33.....3.....3..3...3.......3.33.....33..3...........3...3.3..3.....3..................bbbbbbbb+bbb+bbbbbbbbbbbb+bbbb+b+bbb+bb+bbbb+bbb+bbbbbb+bbb+bbbb+bb+bbbbbbbb++b+bbbb++bbbbbbbbbbbbbbbbbbbbbb...", +".3.3.33.)=s6++bbbb6d4~33.............3.33..3.333...3....3.33....3........3..........3.33..3......3....3..........................bbbbbbbb++bbbb++bbb++b+bbbbbbbbb+b+b++bbb+bbb+bbb++b++bbbbbbbbbbbbb+bbbbbbbbbbbbb+bbbb+bbbbbbb+bb+b+b+b+b+b+...", +".................................................................................................................................bbbb+bbbbb+b++bbb++bbbbbbb+b+b+bbbbbbbbbbb+bbb+bbbb+bbbbb+b+b+bbb+bb+++b+b+bbbb+bb+bb+b+bb+b+bb+bbbbbbbbbbbb...", +".................................................................................................................................++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++...", +"................................................................................................................................................................................................................................................"}; +#else +/* XPM */ +static char * banner_xpm[] = { +"320 54 17 1", +" c None", +". c #030305", +"+ c #949394", +"@ c #CFC9CD", +"# c #525052", +"$ c #B7B6B8", +"% c #E2515E", +"& c #FDFDFB", +"* c #737073", +"= c #820204", +"- c #E33533", +"; c #343232", +"> c #E895AE", +", c #E51604", +"' c #E67284", +") c #EABAD4", +"! c #D8D7D9", +"............................................................................................................................................................................&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&", +"............................................................................................................................................................................&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&", +"............................................................................................................................................................................&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&", +"............................................................................................................................................................................&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&", +"............................................................................................................................................................................&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&", +"............................................................................................................................................................................&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&", +"............................................................................................................................................................................&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&", +"............................................................................................................................................................................&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&", +"............................................................................................................................................................................&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&", +"..............*+@&&&&&&$+*..................................................................................................................................................&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&+#;;...................................&&&&&&,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,--%>&&&&&&&&&&&&&&&&&&&&&&&&", +"...........#$&&@+*##;#++@&&$#...............................................................................................................................................&&&&&&&&&&&&&&&&&&&&&&&&&&&&&#........................................&&&&&&,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,'&&&&&&&&&&&&&&&&&&&&&&", +".........#$&$*...........;#!&$;.............................................................................................................................................&&&&&&&&&&&&&&&&&&&&&&&&&&&+..........................................&&&&&&,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,>&&&&&&&&&&&&&&&&&&&&", +"........+&$#................#$&+............................................................................................................................................&&&&&&&&&&&&&&&&&&&&&&&&&&#...........................................&&&&&&,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,'&&&&&&&&&&&&&&&&&&&", +"......;!&*....................*&@...........................................................................................................................................&&&&&&&&&&&&&&&&&&&&&&&&&#............................................&&&&&&,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,'&&&&&&&&&&&&&&&&&&", +".....;!@;.....====;.=====......;!@;....................................................................;.;..................................................................&&&&&&&&&&&&&&&&&&&&&&&&+...............;;;;..........................&&&&&&,,,,,,,,,,,,,,,---,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,>&&&&&&&&&&&&&&&&&", +"....;&@......,,=,,=,,=...==......!!.................................................................;#!$*#..................................................................&&&&&&&&&&&&&&&&&&&&&&&!.............#+&&&&&&@*...................;***&&&&&&,,,,,,,,,,,,')&&&&&&>-,,,,,,,,,,,,,,%>!&&)>'-,,,,,,,,,,&&&&&&&&&&&&&&&&&", +"....@@;.....=,,,,,,=,,=..=,.......!!.................................................................#&&&&+;...;............................................................&&&&&&&&&&&&&&&&&&&&&&&#...........;@&&&&&&&&&&&+...............*&&&&&&&&&&&,,,,,,,,,,'&&&&&&&&&&&)-,,,,,,,,,,-)&&&&&&&&&)-,,,,,,,,'&&&&&&&&&&&&&&&&", +"...$&;......====,=,,,====,==......;!+................................................................#&&&&@..;>+;...........................................................&&&&&&&&&&&&&&&&&&&&&&&...........*&&&&&&&&&&&&&&$............#&&&&&&&&&&&&&,,,,,,,,,)&&&&&&&&&&&&&&%,,,,,,,,-&&&&&&&&&&&&%,,,,,,,,,&&&&&&&&&&&&&&&&", +"..#&;.......,=.....=,,,,,,,,.......*&#...............................................................#&&&&@...&&*...............................;...........................&&&&&&&&&&&&&&&&&&&&&&+..........+&&&&&&&&&&&&&&&&@..........#&&&&&&&&&&&&&&,,,,,,,,)&&&&&&&&&&&&&&&&',,,,,,,)&&&&&&&&&&&!,,,,,,,,,,>&&&&&&&&&&&&&&&", +"..!$........,=...;==,=,=,=,==.......$$..............................................................;#&&&&@...&&*..............................#$*..........................&&&&&&&&&&&&&&&&&&&&&&#.........#&&&&&&&&&&&&&&&&&&$........#&&&&&&&&&&&&&&&,,,,,,,)&&&&&&&&&&&&&&&&&&%,,,,,%&&&&&&&&&&&&-,,,,,,,,,,'&&&&&&&&&&&&&&&", +".*&;........,,===,,=,,,,,,,,,.......;&#..............................................................#&&&&$;..!&*;...................;.........!&+;.........................&&&&&&&&&&&&&&&&&&&&&&;.........&&&&&&&*;...#$&&&&&&#.......&&&&&&&&!'''>!&&,,,,,,'&&&&&&&)'''>&&&&&&&&,,,,,'&&&&&)-,,%)),,,,,,,,,,,-&&&&&&&&&&&&&&&", +".@+.....===.,=,,,,=,,=,=,=,,=........$$.......................;.;.;.;.;......;.;.;..............;.;.;#&&&&@..;!&*.;.;.;..........;.;.;.;....;.;!&+.;.;......................&&&&&&&&&&&&&&&&&&&&&&;........+&&&&&@........#&&&&&!......+&&&&&&&',,,,,,'&,,,,,,&&&&&&&-,,,,,,>&&&&&&',,,,)&&&&&%,,,,,-,,,,,,,,,,,-&&&&&&&&&&&&&&&", +";&#..=,,,,,..=,=,,,,,,,,,=,,,=.......#&;.....................#***;.;+$$#;..;.#+$$@+*..........#+$$$*.#&&&&@...!&*.;;*++#;.......;.#*++*;.;..;;;!&+;;;;......................&&&&&&&&&&&&&&&&&&&&&&.........&&&&&!..........+&&&&&#.....&&&&&&&-,,,,,,,,%,,,,,%&&&&&&-,,,,,,,,'&&&&&&,,,,)&&&&&>,,,,,,,,,,,,,,,,,-&&&&&&&&&&&&&&&", +"*&...,=,=,,=...===,=,=,,,,,=,=........!*.....................!&&&*;@&&&*..;#@&&&&&&&$;.....;.$&&&&&&!*&&&&@..;&&*.$!&&&&$#....;.+!&&&&&!*..;$!&&&&!&&!......................&&&&&&&&&&&&&&&&&&&&&&........#&&&&&*;;;;;;;;;;#&&&&&+....#&&&&&&',,,,,,,,,,,,,,,>&&&&&%,,,,,,,,,,)&&&&&-,,,)&&&&&&!'-,,,,,,,,,,,,,,-&&&&&&&&&&&&&&&", +"$$...,,,,=,,.......=,,=,=,,,,====.....@$.....................!&&&+!&&&&+;.*!&&&&&&&&&!.....;!&&&&&&&&!&&&&@...!&*!&&!$!&&&;;...*&&!@$@!&&*..$&!&&!&!&!......................&&&&&&&&&&&&&&&&&&&&&&........+&&&&&&&&&&&&&&&&&&&&&&&....+&&&&&&,,,,,,,,,,,,,,,,&&&&&!,,,,,,,,,,,%&&&&&',,,'&&&&&&&&&)',,,,,,,,,,,,-&&&&&&&&&&&&&&&", +"&+...==,,,,=,=......=,,,,=,=,=,,=,....*!.....................!&&&!&&&&&*.#&&&&&!!&&&&&@....!&&&&&&&&&&&&&&@..;!&!&$;...#!&!....#@*....;@&&...;.!&+.;;;......................&&&&&&&&&&&&&&&&&&&&&&........$&&&&&&&&&&&&&&&&&&&&&&&....$&&&&&),,,,,,,,,,,,,,,,&&&&&',,,,,,,,,,,,&&&&&',,,-&&&&&&&&&&&&-,,,,,,,,,,-&&&&&&&&&&&&&&&", +"&#....==,=,,,,,==....,=,,,,,=,=,,,,...#&.....................!&&&&&&&!&*.@&&&&*;.;@&&&&#;.+&&&&&@+*+&&&&&&@...&&&+......*&&*............!&+....!&+..........................&&&&&&&&&&&&&&&&&&&&&&........$&&&&&&&&&&&&&&&&&&&&&&&....$&&&&&),,,,,,,,,,,,,,,-&&&&&',,,,,,,,,,,,&&&&&),,,,%&&&&&&&&&&&&-,,,,,,,,,-&&&&&&&&&&&&&&&", +"&;.....=,,,=,=,,,===.=,,=,,,,,,,=,==..#&;....................@&&&&&@*;;.*&&&&*.....&&&&$..&&&&&$....#&&&&&@...&&!........@&$...........;)&$....&&+..........................&&&&&&&&&&&&&&&&&&&&&&........$&&&&&$$$$$$$$$$$$$$$$$$....$&&&&&),,,,,,,,,,,,,,,,&&&&&',,,,,,,,,,,,&&&&&>,,,,,->&&&&&&&&&&&,,,,,,,,,-&&&&&&&&&&&&&&&", +"&;......=,,,,,=,,,,,,,=,,,=,=,=,,,,=..;&#....................!&&&&!.....@&&&!;.;.;.$&&&&.#&&&&!;.....+&&&&$;..!&+........+&@;......;.;..+&!....!&+;.........................&&&&&&&&&&&&&&&&&&&&&&........+&&&&&;.....................$&&&&&!,,,,,,,,,,,,,,,,&&&&&),,,,,,,,,,,-&&&&&',,,,,,,,%>&&&&&&&&-,,,,,,,,-&&&&&&&&&&&&&&&", +"&;........==,,,,=,=,=,,,=,,,,,,,=,,...#&;....................!&&&&*.....!&&&!+$+$$+@&&&&.+&&&&$......#&&&&@..;&&*........+&!.....;.;*+$$@&@....!&+..........................&&&&&&&&&&&&&&&&&&&&&&........*&&&&&+................;....*&&&&&&-,,,,,,,,,,,,,,,)&&&&&-,,,,,,,,,,>&&&&&%,,,,,,,,,,,'&&&&&&',,,,,,,,-&&&&&&&&&&&&&&&", +"&#.........==,=,,,,,,=,,,=,=,=,,=,=...#&;....................@&&&&#....;&&&&&&&&&&&&&&&&;$&&&&+......#&&&&@...!&*........*&&....;*@&&&&&&&!....!&+..........................&&&&&&&&&&&&&&&&&&&&&&........;&&&&&&;.........;;;;;;;....;&&&&&&!,,,,,,,,,-,,,,,'&&&&&),,,,,,,,,-&&&&&&,,,,,,,,,,,,,>&&&&&',,,,,,,,-&&&&&&&&&&&&&&&", +"&;.......;&@.==,=,,=,,,=,,,,,,,,,=....#&.....................!&&&!;....#&&&&&&&&&&&&&&&&.@&&&&#.....;#&&&&@..;!&*........*&!....$&&!!$++@&@....&&+..........................&&&&&&&&&&&&&&&&&&&&&&;........$&&&&&&;.......@&&&&&&;.....$&&&&&&),,,,,,,-!,,,,,-&&&&&&>,,,,,,,-&&&&&&>,,,,,')-,,,,,>&&&&&',,,,,,,,-&&&&&&&&&&&&&&&", +"&*.......*&&$...=,,,=,,,,=,=,=,==.....*&.....................@&&&&;....;&&&&&!&!&&!&&!&!;$&&&&*......#&&&&@...&&*........*&!...$&&+;....+&!....!&$..........................&&&&&&&&&&&&&&&&&&&&&&;........;&&&&&&&$#;.;+&&&&&&&+......;&&&&&&&&'-,,%>&&,,,,,,>&&&&&&&'-,-%>&&&&&&&-,,,,-&&&'-,,'&&&&&&-,,,,,,,,-&&&&&&&&&&&&&&&", +"@+.......;&&&@&;...==,=,,,,,,==.......+$.....................!&&&&;.....&&&&$..########;.$&&&&$......*&&&&@..;!&*........+&!.;#&&*......+&!....!&+..........................&&&&&&&&&&&&&&&&&&&&&&#.........+&&&&&&&&&&&&&&&&&&!........*&&&&&&&&&&&&&&&,,,,,,-&&&&&&&&&&&&&&&&&&&',,,,,>&&&&&&&&&&&&&&,,,,,,,,,'&&&&&&&&&&&&&&&", +"+!.#*++$;.;&&&&&;.....................!*.....................@&&&&;;....!&&&&............*&&&&!......+&&&&@...&&*........*&!..$&!.......+&!....!&+..........................&&&&&&&&&&&&&&&&&&&&&&+..........@&&&&&&&&&&&&&&&&&;.........+&&&&&&&&&&&&&&,,,,,,,-&&&&&&&&&&&&&&&&&),,,,,-&&&&&&&&&&&&&&',,,,,,,,,>&&&&&&&&&&&&&&&", +"#&#+&&&&&;.;&&&&!+;##*+#*+#*;........;&;.....................!&&&&;.....+&&&&)..;.;.;.....&&&&&$.;.;#&&&&&@...&&*........+&!.;)&$.....;.@&@....&&+..........................&&&&&&&&&&&&&&&&&&&&&&&...........@&&&&&&&&&&&&&&&;...........+&&&&&&&&&&&&&,,,,,,,,%&&&&&&&&&&&&&&&),,,,,,'&&&&&&&&&&&&&>,,,,,,,,,,&&&&&&&&&&&&&&&&", +".!&&&&&&&&$@&&&&&&&&&&&&&&&&.........+@......................@&&&&;......&&&&&!+*##*+!+...$&&&&&)+*$!&&&&&@...!&*........*&!..@&);.....;&&!....!&+;.........................&&&&&&&&&&&&&&&&&&&&&&&#...........+&&&&&&&&&&&&$;.............;$&&&&&&&&&&&,,,,,,,,,-)&&&&&&&&&&&&',,,,,,,,-)&&&&&&&&&&',,,,,,,,,,%&&&&&&&&&&&&&&&&", +".+&&&&&&&&&&&&&&&&&&&*$+@&&$........;&*......................!&&&&;......*&&&&&&&&&&&&!...;&&&&&&&&&&&&&&&@...&&*........*&!..+&&;;.;.;!&&!....@&@.;........................&&&&&&&&&&&&&&&&&&&&&&&!............;+&&&&&&&&@#.................;*$$$&&&&&&,,,,,,,,,,,%)&&&&&&&&>-,,,,,,,,,,,-')!&&&)',,,,,,,,,,,,&&&&&&&&&&&&&&&&&", +"..&&&&&&&&&&&&&&&&&&!;..$&&+........+!.......................!&&&&;.......+&&&&&&&&&&&&....*&&&&&&&&&!@&&&!...&&*........+&&...!&&+#*+&&$&!....*&&+*+*......................&&&&&&&&&&&&&&&&&&&&&&&&*..............#++++#;........................&&&&&&,,,,,,,,,,,,,-%''''%,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,'&&&&&&&&&&&&&&&&&", +"..*&&&&&&&&&&&&&&&&&&&!!&&&;..**+*+*&#.......................!&&&!;........*!&&&&&&&&&@;....*!&&&&&&!;$&&&@...!&*........*&!...#!&&&&&&+.&!.....$&&&&!......................&&&&&&&&&&&&&&&&&&&&&&&&&#............................................&&&&&&,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,%&&&&&&&&&&&&&&&&&&", +"...$&&&&&&&&&&&&&&&&&&&&&&*..;&&&&&&$........................*++++...........*+$@@$$+#........*$@@$*..#+++*...*+;........;+*....;+@!@$#..++......+@!!+......................&&&&&&&&&&&&&&&&&&&&&&&&&&;...........................................&&&&&&,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,%&&&&&&&&&&&&&&&&&&&", +"...;&&&&&&&&&&&&&&&&&&&&&$.;@&&&&&&&........................................................................................................................................&&&&&&&&&&&&&&&&&&&&&&&&&&&*..........................................&&&&&&,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,'&&&&&&&&&&&&&&&&&&&&", +"....;&&&&&&&&&&&&&&&&&&&&;.&&&&&&&&;........................................................................................................................................&&&&&&&&&&&&&&&&&&&&&&&&&&&&@;........................................&&&&&&,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,%!&&&&&&&&&&&&&&&&&&&&&", +".....*&&&&&&&&&&&&&&&&&&$+&&&&&&&&;.........................................................................................................................................&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&!+;;....................................&&&&&&,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,--'!&&&&&&&&&&&&&&&&&&&&&&&", +"......;&&&&&&&&&&&&&&&&&&&&&&&&&!;..........................................................................................................................................&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&", +".......;@&&&&&&&&&&&&&&&&&&&&&&$;...........................................................................................................................................&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&", +".........*&&&&&&&&&&&&&&&&&&&&*.............................................................................................................................................&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&", +"...........+!&&&&&&&&&&&&&&!*...............................................................................................................................................&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&", +".............#+@&&&&&&&&!+;.................................................................................................................................................&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&", +".................;####;.....................................................................................................................................................&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&", +"............................................................................................................................................................................&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&", +"............................................................................................................................................................................&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&", +"................................................................................................................................................................................................................................................................................................................................"}; +#endif diff --git a/packages/hal/arm/sa11x0/ipaq/current/src/banner.xpm.bin b/packages/hal/arm/sa11x0/ipaq/current/src/banner.xpm.bin new file mode 100644 --- /dev/null +++ b/packages/hal/arm/sa11x0/ipaq/current/src/banner.xpm.bin @@ -0,0 +1,74 @@ +/* XPM */ +static char * banner_xpm[] = { +"320 54 17 1", +" c None", +". c #020204", +"+ c #6D8AB0", +"@ c #D3D2D8", +"# c #EA96AC", +"$ c #314577", +"% c #9FB0C8", +"& c #FEFEFC", +"* c #93949D", +"= c #E56878", +"- c #820204", +"; c #E23634", +"> c #6479A5", +", c #243259", +"' c #E61604", +") c #BDB7C4", +"! c #515259", +"................................................................................................................................................&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&", +"................................................................................................................................................&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&", +"................................................................................................................................................&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&", +"................................................................................................................................................&&&&&&&@@)))))@@&&&&&&&&&&&&&&&&&&&&&@@@)%))@@&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&", +"................................................................................................................................................&&)++>>>>>+>+>>>>>+%&&&&&&&&&&&&&)++>+>>>+>>>>>>>%@&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&", +"................................................................................................................................................&@>>>>>+>>>>>>>>>>>>>*@&&&&&&&@+>>>>>>>>>>>>>>>>>+*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&", +"................................................................................................................................................&&>>>>>>>>>>>>>+>>>>>++@&&&&&+>>+>>>>>>>>>>>>>>>>>%&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&", +"................................................................................................................................................&&>>>>>>>+>>+>>>>>>>>>>>@&&)>>>>>>>>>>>>+>>+>+>>>>@&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&", +"................................................................................................................................................&&>>>+>>>>>>>>>>>>>>>>>>+&%>>>>>>>>+>>+>>>>>>>>>>>@&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&", +"..............>*@&&&&&&)*+......................................................................................................................&&>>+%%@@@@@)%>>>+>>>>>>>%>>>>>>>>>>>>>%)@@@@%+>>+@&&&&&&&&&&&&&&&&&&&+!,,...................................&&&&&&'''''''''''''''''''''''''''''''''''''''''''';;;#&&&&&&&&&&&&&", +"...........!@&&@*>!!,!**@&&)!...................................................................................................................&&@&&&&&&&&&&&&%>>>>>>>>>+>>>+>>+>>>+@&&&&&&&&&&@+&&&&&&&&&&&&&&&&&&$........................................&&&&&&'''''''''''''''''''''''''''''''''''''''''''''''''=&&&&&&&&&&&", +".........!)&)>...........,!@&)$.................................................................................................................&&&&&&&&&&&&&&&&+>+>>>>>>%>>>>>>>>>+&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*..........................................&&&&&&'''''''''''''''''''''''''''''''''''''''''''''''''''#&&&&&&&&&", +"........%&)!................!)&*................................................................................................................&&&&&&&&&&&&&&&&*>>>>>>>>@>>>>>>>>+&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&$...........................................&&&&&&''''''''''''''''''''''''''''''''''''''''''''''''''''=&&&&&&&&", +"......,@&>....................>&@...............................................................................................................&&&&&&&&&&&&&&&&+>>>>+>>+@>+>>+>>>%&&&&&&&&&&&&&&&&&&&&&&&&&&&&&!............................................&&&&&&'''''''''''''''''''''''''''''''''''''''''''''''''''''=&&&&&&&", +".....$@@,.....----,.-----......,@@$......................................................$.$....................................................&&&&&&&&&&&&&&&%>>+>>>>>+&+>>>>>>>&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*...............,,,,..........................&&&&&&''''''''''''''';;;''''''''''''''''''''''''''''''''''''#&&&&&&", +"....,&@......''-''-''-...--......@@...................................................$!@)>!....................................................&&&&&&&&&&&&@%+>>>>>>>>>@&)>>>>+>>&&&&&&&&&&&&&&&&&&&&&&&&&&&&@.............!*&&&&&&@>...................,>>>&&&&&&''''''''''''=)&&&&&&#;'''''''''''''';#@&&)#=;''''''''''&&&&&&", +"....@@,.....-''''''-''-..-'.......@@...................................................!&&&&*$...$..............................................&&&&&&)>>>>>>>>>>>>>+>>%&&&%>>>>>+&&&&&%+++++++++++)&&&&&&&&&&!...........,@&&&&&&&&&&&*...............>&&&&&&&&&&&''''''''''=&&&&&&&&&&&);'''''''''';)&&&&&&&&&);''''''''=&&&&&", +"...)&,......----'-'''----'--......$@%..................................................!&&&&@..,#*$.............................................&&&&&&)>>>>>>>>>>+>>>+@&&&&&@+>+>%&&&&&*>>>+>>+>>+>%&&&&&&&&&&...........>&&&&&&&&&&&&&&)............!&&&&&&&&&&&&&''''''''')&&&&&&&&&&&&&&;'''''''';&&&&&&&&&&&&;'''''''''&&&&&", +"..!&,.......'-.....-''''''''.......>&!.................................................!&&&&@...&&>...............................$.............&&&&&&@>>>>>>+>>>>+%@&&&&&&&&&@%>%&&&&&*>>>>>>>>>>>%&&&&&&&&&*..........*&&&&&&&&&&&&&&&&@..........!&&&&&&&&&&&&&&'''''''')&&&&&&&&&&&&&&&&=''''''')&&&&&&&&&&&@''''''''''#&&&&", +"..@)........'-...,--'-'-'-'--.......)@................................................,!&&&&@...&&>..............................!)+............&&&&&&)>>>>>>>>>>>>+>+@&&&&&)+>>>*&&&&&%>>>>>>>>>>+%&&&&&&&&&!.........!&&&&&&&&&&&&&&&&&&)........!&&&&&&&&&&&&&&&''''''')&&&&&&&&&&&&&&&&&&;''''';&&&&&&&&&&&&;''''''''''=&&&&", +".>&,........''---''-'''''''''.......,&!................................................!&&&&),..@&>,...................$.........@&*,...........&&&&&&@+++++>>+>>>>>>>>%&&&+>>>>>*&&&&&++>>>>>>>>>>%&&&&&&&&&,.........&&&&&&&>,...!)&&&&&&!.......&&&&&&&&@===#@&&''''''=&&&&&&&)===#&&&&&&&&'''''=&&&&&);'';@)''''''''''';&&&&", +".@*.....---.'-''''-''-'-'-''-........)).........$.$.$.$.$......$.$.$..............$.,.,!&&&&@..,@&>.$.$.$..........$.$.$.$....$.,@&*.$.$........&&&&&&&&&&&&&@%+>>>>>+>>@&)+>>>>++&&&&&%++++>+>>>>+%&&&&&&&&&,........*&&&&&@........!&&&&&@......*&&&&&&&=''''''=&''''''&&&&&&&;''''''#&&&&&&='''')&&&&&;''''';''''''''''';&&&&", +",&!..-'''''..-'-'''''''''-'''-.......!&$.......!>>>,.,*))!$..$.!*))@*>..........!*)))>.!&&&&@...@&>.,,>**!$.......$.!>**>,.$..,,,@&*,,,,........&&&&&&&&&&&&&&&&++>>>>>>+&+>>+>>>+&&&&&&&&&&>>>+>>>%&&&&&&&&&.........&&&&&@..........*&&&&&!.....&&&&&&&;'''''''';''''';&&&&&&;''''''''=&&&&&&''''@&&&&&#''''''''''''''''';&&&&", +">&...'-'-''-...---'-'-'''''-'-........@>.......@&&&>,@&&&>..,!@&&&&&&&)$.....$.)&&&&&&@>&&&&@..,&&>.)@&&&&)!....$.*@&&&&&@>..,)@&&&&@&&@........&&&&&&&&&&&&&&&&@>>>>>+>>@>>>>>>>+@&&&&&&&&&+>>>>>+%&&&&&&&&&........!&&&&&>,,,,,,,,,,!&&&&&%....!&&&&&&='''''''''''''''#&&&&&;'''''''''')&&&&&;'''#&&&&&&@=;'''''''''''''';&&&&", +"))...''''-''.......-''-'-''''----.....@).......@&&&*@&&&&*,.>@&&&&&&&&&@.....,@&&&&&&&&@&&&&)...@&>@&&@)@&&&,$...>&&@))@@&&>..)&@&&@&@&@........&&&&&&&&&&&&&&&&&>>>>>>>>@>>>>>>>>%&&&&&&&&&>>>>>>>%&&&&&&&&&........*&&&&&&&&&&&&&&&&&&&&&&&....*&&&&&&''''''''''''''''&&&&&@''''''''''';&&&&&='''=&&&&&&&&&)='''''''''''';&&&&", +"&*...--''''-'-......-''''-'-'-''-'....>@.......@&&&@&&&&&>.!&&&&&@@&&&&&@....@&&&&&&&&&&&&&&@..,@&@&),...!@&@....!@>....,@&&...,.@&*.,,,........&&&&&&&&&&&&&&&&@>>+>>>>+%>>>+>>>>>&&&&&&&&&+>>>>>+%&&&&&&&&&........)&&&&&&&&&&&&&&&&&&&&&&&....)&&&&&)''''''''''''''''&&&&&=''''''''''''&&&&&=''';&&&&&&&&&&&&;'''''''''';&&&&", +"&!....--'-'''''--....'-'''''-'-''''...!&.......@&&&&&&&@&>.@&&&&>,.,@&&&&!$.*&&&&&@*>*&&&&&&@...&&&*......>&&>............@&*....@&*............&&&&&&&&&&&&&&&@>>>>>>+>>>+>>>>>+>>>@&&&&&&&+>>>>>>%&&&&&&&&&........)&&&&&&&&&&&&&&&&&&&&&&&....)&&&&&)''''''''''''''';&&&&&=''''''''''''&&&&&@'''';&&&&&&&&&&&&;''''''''';&&&&", +"&,.....-'''-'-'''---.-''-'''''''-'--..!&$......@&&&&&@>,,.>&&&&>.....&&&&)..&&&&&)....!&&&&&@...&&@........@&)...........,@&)....&&*............&+*%&&&&&&&&&@%>>+>>>>>>>+>>>>>>>>>+>%&&&&&@>>+>>>+%&&&&&&&&&........%&&&&&))%))%)))%))%)))))....%&&&&&)''''''''''''''''&&&&&=''''''''''''&&&&&#''''';#&&&&&&&&&&&''''''''';&&&&", +"&,......-'''''-'''''''-'''-'-'-''''-..,&!......@&&&&@.....@&&&@,.,.,.)&&&&.!&&&&@,.....*&&&&),..@&*........*&@,......,.,..*&@....@&*,...........@+>>>>>>>>>>>>>>>>>+>>>>+&++>>>>>>>>>>>>>>>+>>>>>>>%&&&&&&&&&........*&&&&&,.....................)&&&&&@''''''''''''''''&&&&&)''''''''''';&&&&&='''''''';#&&&&&&&&;'''''''';&&&&", +"&$........--''''-'-'-'''-'''''''-''...!&$......@&&&&>.....@&&&@*)*))*@&&&&.*&&&&)......!&&&&@..,&&>........*&@.....,.,>*))@&@....@&*............@>>>>>>>>>>>>>>>>>>>>>>>@&&++>>+>>>>>>>>>>>>>>>>>>+%&&&&&&&&&........!&&&&&*................,....!&&&&&&;''''''''''''''')&&&&&;''''''''''#&&&&&='''''''''''=&&&&&&='''''''';&&&&", +"&!.........--'-''''''-'''-'-'-''-'-...!&,......@&&&&!....,&&&&&&&&&&&&&&&&,)&&&&*......!&&&&)...@&>........>&&....,>@&&&&&&&@....@&*............@+>>>>>>+>>>>>>+>>>>+>>@&&&&%>>>>>>>>>>>>>>>>+>>>>>%&&&&&&&&&........$&&&&&&,.........,,,,,,,....$&&&&&&@''''''''';'''''=&&&&&)''''''''';&&&&&&'''''''''''''#&&&&&='''''''';&&&&", +"&,.......,&@.--'-''-'''-'''''''''-....!&.......@&&&@,....!&&&&&&&&&&&&&&&&.)&&&&!.....,!&&&&@..,@&>........>&@....)&&@@)**@&@....&&*............@>>>+>>>>+>>+>>>+>>>>+&&&&&&&&+>>>+>>>>>>+>>>>>>>>+%&&&&&&&&&$........)&&&&&&,.......@&&&&&&$.....%&&&&&&)''''''';@''''';&&&&&&#''''''';&&&&&&#'''''=);'''''#&&&&&='''''''';&&&&", +"&>.......>&&)...-'''-''''-'-'-'--.....>&.......@&&&&,....,&&&&&@&@&&@&&@&@,)&&&&>......!&&&&@...&&>........>&@...)&&*,....*&@....@&)............@>>>>>>>>>>>>>>>>>+%@&&&&&&&&&&&%>>>+>>+>>>>>>+>>++@&&&&&&&&&,........,&&&&&&&)!,.,*&&&&&&&*......,&&&&&&&&=;'';#&&''''''#&&&&&&&=;';;#&&&&&&&;'''';&&&=;''=&&&&&&;'''''''';&&&&", +"@*.......,&&&@&$...--'-''''''--.......*).......@&&&&,.....&&&&)..!!!!!!!!,.)&&&&)......!&&&&@..,@&>........*&@.,!&&>......*&@....@&*............&&@%%*++>>>>>++%@@&&&&&&&&&&&&&&&&&)%+>>>>>++%%@@&&&&&&&&&&&&!.........*&&&&&&&&&&&&&&&&&&@........>&&&&&&&&&&&&&&&'''''';&&&&&&&&&&&&&&&&&&&='''''#&&&&&&&&&&&&&&'''''''''=&&&&", +"*@.!>**),.,&&&&&,.....................@>.......@&&&&,,....@&&&&............>&&&&@......*&&&&)...&&>........>&@..)&@.......*&@....@&*............&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*..........)&&&&&&&&&&&&&&&&&,.........*&&&&&&&&&&&&&&''''''';&&&&&&&&&&&&&&&&&)''''';&&&&&&&&&&&&&&='''''''''#&&&&", +"!&!*&&&&&,.,&&&&@*$!!>*!>*!>$........,&$.......@&&&&,.....*&&&&)..,.,.,.....&&&&&).,.,!&&&&&@...&&>........*&@.,)&).....,.@&@....&&*............&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&...........)&&&&&&&&&&&&&&&,...........*&&&&&&&&&&&&&'''''''';&&&&&&&&&&&&&&&)''''''=&&&&&&&&&&&&&#''''''''''&&&&&", +".@&&&&&&&&)@&&&&&&&&&&&&&&&&.........*@........@&&&&,......&&&&&@*>!!>*@*...)&&&&&@*>)@&&&&&@...@&>........>&@..@&),.....,&&@....@&*,...........&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&!...........*&&&&&&&&&&&&),.............,)&&&&&&&&&&&''''''''';)&&&&&&&&&&&&='''''''';)&&&&&&&&&&='''''''''';&&&&&", +".*&&&&&&&&&&&&&&&&&&&>)*@&&)........,&>........@&&&&,......>&&&&&&&&&&&&@...,&&&&&&&&&&&&&&&@...&&>........>&@..*&&,,.,.,@&&@....@&@.$..........&&,,,,,,*&&&&&&&&&&@,,,,,,,,,!&&&&&*,,,,,,,,,,,,,>@&&&&&&&&&&&@............,*&&&&&&&&)!.................,>%)%&&&&&&''''''''''';)&&&&&&&&#;''''''''''';=)@&&&)=''''''''''''&&&&&&", +"..&&&&&&&&&&&&&&&&&&@,..)&&*........*@.........@&&&&,.......*&&&&&&&&&&&&....>&&&&&&&&&@)&&&@...&&>........*&&...@&&*!>*&&)&@....>&&*>*>........&&,,,,,,+&&&&&&&&&&$,,,,,,,,,,@&&&&*,,,,,,,,,,,,,,,+&&&&&&&&&&&>..............!****!,........................&&&&&&''''''''''''';;====;''''''''''''''''''''''''''''''''''=&&&&&&", +"..>&&&&&&&&&&&&&&&&&&&@@&&&,..>>*>*>&!.........@&&&@,........>@&&&&&&&&&@,....>@&&&&&&@,)&&&@...@&>........>&@...!@&&&&&&*.&@.....)&&&&@........&&,,,,,,*&&&&&&&&&&,,,,,,,,,,,>&&&&*,,,,,,>!$,,,,,,,@&&&&&&&&&&&!............................................&&&&&&'''''''''''''''''''''''''''''''''''''''''''''''''''''=&&&&&&&", +"...)&&&&&&&&&&&&&&&&&&&&&&>..,&&&&&&)..........>****...........>*))@)%*!........>))))>..!***>...>*,........,*>....,*@@@)!..**......*@@@*........&&,,,,,,+&&&&&&&&&>,,,,,+,,,,,,&&&&*,,,,,$&&&%,,,,,,@&&&&&&&&&&&&,...........................................&&&&&&'''''''''''''''''''''''''''''''''''''''''''''''''''';&&&&&&&&", +"...,&&&&&&&&&&&&&&&&&&&&&).,@&&&&&&&............................................................................................................&&,,,,,,*&&&&&&&&&,,,,,,&$,,,,,*&&&*,,,,,!&&&@,,,,,,@&&&&&&&&&&&&&>..........................................&&&&&&'''''''''''''''''''''''''''''''''''''''''''''''''''=&&&&&&&&&", +"....,&&&&&&&&&&&&&&&&&&&&,.&&&&&&&&,............................................................................................................&&,,,,,,+&&&&&&&&+,,,,,+&),,,,,,&&&*,,,,,$**>,,,,,,>&&&&&&&&&&&&&&&@,........................................&&&&&&''''''''''''''''''''''''''''''''''''''''''''''''';@&&&&&&&&&&", +".....!&&&&&&&&&&&&&&&&&&)*&&&&&&&&,.............................................................................................................&&,,,,,,*&&&&&&&&,,,,,,&&&$,,,,,%&&*,,,,,,,,,,,,,,+&&&&&&&&&&&&&&&&&&@*,,....................................&&&&&&''''''''''''''''''''''''''''''''''''''''''''';;=@&&&&&&&&&&&&", +"......,&&&&&&&&&&&&&&&&&&&&&&&&&@,..............................................................................................................&&,,,,,,+&&&&&&&%,,,,,$@@@>,,,,,$&&*,,,,,,,,,,,,,$%&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&", +".......,)&&&&&&&&&&&&&&&&&&&&&&),...............................................................................................................&@,,,,,,*&&&&&&&$,,,,,,,,,,,,,,,,@&*,,,,,$%%+,,,,,,!&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&", +".........>&&&&&&&&&&&&&&&&&&&&>.................................................................................................................&&,,,,,,+&&&&&&@,,,,,,,,,,,,,,,,,!&*,,,,,!&&&@$,,,,,*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&", +"...........*@&&&&&&&&&&&&&&@>...................................................................................................................&&,,,,,,,$$$$$$,,,,,,,,,,,,,,,,,,,@*,,,,,!&&&@,,,,,,$&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&", +".............!*)&&&&&&&&@*,.....................................................................................................................&&,,,,,,,,,,,,,,,,,,,+@@@@@+,,,,,,>%,,,,,$>>>,,,,,,,+&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&", +".................,!$!!,.........................................................................................................................&@,,,,,,,,,,,,,,,,,,,@&&&&&&,,,,,,,*,,,,,,,,,,,,,,,$@&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&", +"................................................................................................................................................&&,,,,,,,,,,,,,,,,,,$&&&&&&&>,,,,,,$,,,,,,,,,,,,,,$&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&", +"................................................................................................................................................&&%%%%%%%%%%%%%%%%%%@&&&&&&&@%%%%%%%%%%%%%%%%%%)@&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&", +"................................................................................................................................................&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&", +"................................................................................................................................................................................................................................................................................................................................"}; diff --git a/packages/hal/arm/sa11x0/ipaq/current/src/font.h b/packages/hal/arm/sa11x0/ipaq/current/src/font.h new file mode 100644 --- /dev/null +++ b/packages/hal/arm/sa11x0/ipaq/current/src/font.h @@ -0,0 +1,150 @@ +//========================================================================== +// +// font.h +// +// SA1110/iPAQ - LCD display font +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 2001-02-25 +// Description: Simple LCD font +//####DESCRIPTIONEND#### + +#ifndef _LCD_FONT_H_ +#define _LCD_FONT_H_ + +// 8x8 Font - from Helios + +#define FIRST_CHAR 0x20 +#define LAST_CHAR 0x7E +#define FONT_HEIGHT 8 +#define FONT_WIDTH 8 +#define CURSOR_ON 0x5F +#define CURSOR_OFF 0x20 +static char font_table[LAST_CHAR-FIRST_CHAR+1][8] = +{ + { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, /* */ + { 0x18, 0x18, 0x18, 0x18, 0x18, 0x00, 0x18, 0x00 }, /* ! */ + { 0x36, 0x36, 0x36, 0x00, 0x00, 0x00, 0x00, 0x00 }, /* " */ + { 0x6C, 0x6C, 0xFE, 0x6C, 0xFE, 0x6C, 0x6C, 0x00 }, /* # */ + { 0x30, 0xFC, 0x16, 0x7C, 0xD0, 0x7E, 0x18, 0x00 }, /* $ */ + { 0x06, 0x66, 0x30, 0x18, 0x0C, 0x66, 0x60, 0x00 }, /* % */ + { 0x1C, 0x36, 0x36, 0x1C, 0xB6, 0x66, 0xDC, 0x00 }, /* & */ + { 0x18, 0x18, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00 }, /* ' */ + { 0x30, 0x18, 0x0C, 0x0C, 0x0C, 0x18, 0x30, 0x00 }, /* ( */ + { 0x0C, 0x18, 0x30, 0x30, 0x30, 0x18, 0x0C, 0x00 }, /* ) */ + { 0x00, 0x18, 0x7E, 0x3C, 0x7E, 0x18, 0x00, 0x00 }, /* * */ + { 0x00, 0x18, 0x18, 0x7E, 0x18, 0x18, 0x00, 0x00 }, /* + */ + { 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x0C }, /* , */ + { 0x00, 0x00, 0x00, 0x7E, 0x00, 0x00, 0x00, 0x00 }, /* - */ + { 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x00 }, /* . */ + { 0x00, 0x60, 0x30, 0x18, 0x0C, 0x06, 0x00, 0x00 }, /* / */ + { 0x3C, 0x66, 0x76, 0x7E, 0x6E, 0x66, 0x3C, 0x00 }, /* 0 */ + { 0x18, 0x1C, 0x18, 0x18, 0x18, 0x18, 0x7E, 0x00 }, /* 1 */ + { 0x3C, 0x66, 0x60, 0x30, 0x18, 0x0C, 0x7E, 0x00 }, /* 2 */ + { 0x3C, 0x66, 0x60, 0x38, 0x60, 0x66, 0x3C, 0x00 }, /* 3 */ + { 0x30, 0x38, 0x3C, 0x36, 0x7E, 0x30, 0x30, 0x00 }, /* 4 */ + { 0x7E, 0x06, 0x3E, 0x60, 0x60, 0x66, 0x3C, 0x00 }, /* 5 */ + { 0x38, 0x0C, 0x06, 0x3E, 0x66, 0x66, 0x3C, 0x00 }, /* 6 */ + { 0x7E, 0x60, 0x30, 0x18, 0x0C, 0x0C, 0x0C, 0x00 }, /* 7 */ + { 0x3C, 0x66, 0x66, 0x3C, 0x66, 0x66, 0x3C, 0x00 }, /* 8 */ + { 0x3C, 0x66, 0x66, 0x7C, 0x60, 0x30, 0x1C, 0x00 }, /* 9 */ + { 0x00, 0x00, 0x18, 0x18, 0x00, 0x18, 0x18, 0x00 }, /* : */ + { 0x00, 0x00, 0x18, 0x18, 0x00, 0x18, 0x18, 0x0C }, /* ; */ + { 0x30, 0x18, 0x0C, 0x06, 0x0C, 0x18, 0x30, 0x00 }, /* < */ + { 0x00, 0x00, 0x7E, 0x00, 0x7E, 0x00, 0x00, 0x00 }, /* = */ + { 0x0C, 0x18, 0x30, 0x60, 0x30, 0x18, 0x0C, 0x00 }, /* > */ + { 0x3C, 0x66, 0x30, 0x18, 0x18, 0x00, 0x18, 0x00 }, /* ? */ + { 0x3C, 0x66, 0x76, 0x56, 0x76, 0x06, 0x3C, 0x00 }, /* @ */ + { 0x3C, 0x66, 0x66, 0x7E, 0x66, 0x66, 0x66, 0x00 }, /* A */ + { 0x3E, 0x66, 0x66, 0x3E, 0x66, 0x66, 0x3E, 0x00 }, /* B */ + { 0x3C, 0x66, 0x06, 0x06, 0x06, 0x66, 0x3C, 0x00 }, /* C */ + { 0x1E, 0x36, 0x66, 0x66, 0x66, 0x36, 0x1E, 0x00 }, /* D */ + { 0x7E, 0x06, 0x06, 0x3E, 0x06, 0x06, 0x7E, 0x00 }, /* E */ + { 0x7E, 0x06, 0x06, 0x3E, 0x06, 0x06, 0x06, 0x00 }, /* F */ + { 0x3C, 0x66, 0x06, 0x76, 0x66, 0x66, 0x3C, 0x00 }, /* G */ + { 0x66, 0x66, 0x66, 0x7E, 0x66, 0x66, 0x66, 0x00 }, /* H */ + { 0x7E, 0x18, 0x18, 0x18, 0x18, 0x18, 0x7E, 0x00 }, /* I */ + { 0x7C, 0x30, 0x30, 0x30, 0x30, 0x36, 0x1C, 0x00 }, /* J */ + { 0x66, 0x36, 0x1E, 0x0E, 0x1E, 0x36, 0x66, 0x00 }, /* K */ + { 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x7E, 0x00 }, /* L */ + { 0xC6, 0xEE, 0xFE, 0xD6, 0xD6, 0xC6, 0xC6, 0x00 }, /* M */ + { 0x66, 0x66, 0x6E, 0x7E, 0x76, 0x66, 0x66, 0x00 }, /* N */ + { 0x3C, 0x66, 0x66, 0x66, 0x66, 0x66, 0x3C, 0x00 }, /* O */ + { 0x3E, 0x66, 0x66, 0x3E, 0x06, 0x06, 0x06, 0x00 }, /* P */ + { 0x3C, 0x66, 0x66, 0x66, 0x56, 0x36, 0x6C, 0x00 }, /* Q */ + { 0x3E, 0x66, 0x66, 0x3E, 0x36, 0x66, 0x66, 0x00 }, /* R */ + { 0x3C, 0x66, 0x06, 0x3C, 0x60, 0x66, 0x3C, 0x00 }, /* S */ + { 0x7E, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x00 }, /* T */ + { 0x66, 0x66, 0x66, 0x66, 0x66, 0x66, 0x3C, 0x00 }, /* U */ + { 0x66, 0x66, 0x66, 0x66, 0x66, 0x3C, 0x18, 0x00 }, /* V */ + { 0xC6, 0xC6, 0xD6, 0xD6, 0xFE, 0xEE, 0xC6, 0x00 }, /* W */ + { 0x66, 0x66, 0x3C, 0x18, 0x3C, 0x66, 0x66, 0x00 }, /* X */ + { 0x66, 0x66, 0x66, 0x3C, 0x18, 0x18, 0x18, 0x00 }, /* Y */ + { 0x7E, 0x60, 0x30, 0x18, 0x0C, 0x06, 0x7E, 0x00 }, /* Z */ + { 0x3E, 0x06, 0x06, 0x06, 0x06, 0x06, 0x3E, 0x00 }, /* [ */ + { 0x00, 0x06, 0x0C, 0x18, 0x30, 0x60, 0x00, 0x00 }, /* \ */ + { 0x7C, 0x60, 0x60, 0x60, 0x60, 0x60, 0x7C, 0x00 }, /* ] */ + { 0x3C, 0x66, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, /* ^ */ + { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF }, /* _ */ + { 0x0C, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, /* ` */ + { 0x00, 0x00, 0x3C, 0x60, 0x7C, 0x66, 0x7C, 0x00 }, /* a */ + { 0x06, 0x06, 0x3E, 0x66, 0x66, 0x66, 0x3E, 0x00 }, /* b */ + { 0x00, 0x00, 0x3C, 0x66, 0x06, 0x66, 0x3C, 0x00 }, /* c */ + { 0x60, 0x60, 0x7C, 0x66, 0x66, 0x66, 0x7C, 0x00 }, /* d */ + { 0x00, 0x00, 0x3C, 0x66, 0x7E, 0x06, 0x3C, 0x00 }, /* e */ + { 0x38, 0x0C, 0x0C, 0x3E, 0x0C, 0x0C, 0x0C, 0x00 }, /* f */ + { 0x00, 0x00, 0x7C, 0x66, 0x66, 0x7C, 0x60, 0x3C }, /* g */ + { 0x06, 0x06, 0x3E, 0x66, 0x66, 0x66, 0x66, 0x00 }, /* h */ + { 0x18, 0x00, 0x1C, 0x18, 0x18, 0x18, 0x3C, 0x00 }, /* i */ + { 0x18, 0x00, 0x1C, 0x18, 0x18, 0x18, 0x18, 0x0E }, /* j */ + { 0x06, 0x06, 0x66, 0x36, 0x1E, 0x36, 0x66, 0x00 }, /* k */ + { 0x1C, 0x18, 0x18, 0x18, 0x18, 0x18, 0x3C, 0x00 }, /* l */ + { 0x00, 0x00, 0x6C, 0xFE, 0xD6, 0xD6, 0xC6, 0x00 }, /* m */ + { 0x00, 0x00, 0x3E, 0x66, 0x66, 0x66, 0x66, 0x00 }, /* n */ + { 0x00, 0x00, 0x3C, 0x66, 0x66, 0x66, 0x3C, 0x00 }, /* o */ + { 0x00, 0x00, 0x3E, 0x66, 0x66, 0x3E, 0x06, 0x06 }, /* p */ + { 0x00, 0x00, 0x7C, 0x66, 0x66, 0x7C, 0x60, 0xE0 }, /* q */ + { 0x00, 0x00, 0x36, 0x6E, 0x06, 0x06, 0x06, 0x00 }, /* r */ + { 0x00, 0x00, 0x7C, 0x06, 0x3C, 0x60, 0x3E, 0x00 }, /* s */ + { 0x0C, 0x0C, 0x3E, 0x0C, 0x0C, 0x0C, 0x38, 0x00 }, /* t */ + { 0x00, 0x00, 0x66, 0x66, 0x66, 0x66, 0x7C, 0x00 }, /* u */ + { 0x00, 0x00, 0x66, 0x66, 0x66, 0x3C, 0x18, 0x00 }, /* v */ + { 0x00, 0x00, 0xC6, 0xD6, 0xD6, 0xFE, 0x6C, 0x00 }, /* w */ + { 0x00, 0x00, 0x66, 0x3C, 0x18, 0x3C, 0x66, 0x00 }, /* x */ + { 0x00, 0x00, 0x66, 0x66, 0x66, 0x7C, 0x60, 0x3C }, /* y */ + { 0x00, 0x00, 0x7E, 0x30, 0x18, 0x0C, 0x7E, 0x00 }, /* z */ + { 0x30, 0x18, 0x18, 0x0E, 0x18, 0x18, 0x30, 0x00 }, /* { */ + { 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x00 }, /* | */ + { 0x0C, 0x18, 0x18, 0x70, 0x18, 0x18, 0x0C, 0x00 }, /* } */ + { 0x8C, 0xD6, 0x62, 0x00, 0x00, 0x00, 0x00, 0x00 } /* ~ */ +}; + +#endif // _LCD_FONT_H_ diff --git a/packages/hal/arm/sa11x0/ipaq/current/src/ipaq_misc.c b/packages/hal/arm/sa11x0/ipaq/current/src/ipaq_misc.c new file mode 100644 --- /dev/null +++ b/packages/hal/arm/sa11x0/ipaq/current/src/ipaq_misc.c @@ -0,0 +1,164 @@ +//========================================================================== +// +// ipaq_misc.c +// +// HAL misc board support code for StrongARM SA1110/iPAQ +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: hmt +// Travis C. Furrer +// Richard Panton +// Date: 2001-02-24 +// Purpose: HAL board support +// Description: Implementations of HAL board interfaces +// +//####DESCRIPTIONEND#### +// +//========================================================================*/ + +#include + +#include // base types +#include // tracing macros +#include // assertion macros + +#include // IO macros +#include // Virtual vector interfaces +#include // Register state info +#include +#include // Interrupt names +#include +#include // Hardware definitions +#include // Platform specifics + +#include // diag_printf + +#include +#include + +// All the MM table layout is here: +#include + +void +hal_mmu_init(void) +{ + unsigned long ttb_base = SA11X0_RAM_BANK0_BASE + 0x4000; + unsigned long i; + + /* + * Set the TTB register + */ + asm volatile ("mcr p15,0,%0,c2,c0,0" : : "r"(ttb_base) /*:*/); + + /* + * Set the Domain Access Control Register + */ + i = ARM_ACCESS_DACR_DEFAULT; + asm volatile ("mcr p15,0,%0,c3,c0,0" : : "r"(i) /*:*/); + + /* + * First clear all TT entries - ie Set them to Faulting + */ + memset((void *)ttb_base, 0, ARM_FIRST_LEVEL_PAGE_TABLE_SIZE); + + /* Actual Virtual Size Attributes Function */ + /* Base Base MB cached? buffered? access permissions */ + /* xxx00000 xxx00000 */ + X_ARM_MMU_SECTION(0x000, 0x500, 32, ARM_CACHEABLE, ARM_BUFFERABLE, ARM_ACCESS_PERM_RW_RW); /* Boot flash ROMspace */ + X_ARM_MMU_SECTION(0x080, 0x080, 4, ARM_CACHEABLE, ARM_BUFFERABLE, ARM_ACCESS_PERM_RW_RW); /* Application flash ROM */ + X_ARM_MMU_SECTION(0x100, 0x100, 128, ARM_UNCACHEABLE, ARM_UNBUFFERABLE, ARM_ACCESS_PERM_RW_RW); /* SA-1101 Development Board Registers */ + X_ARM_MMU_SECTION(0x180, 0x180, 128, ARM_UNCACHEABLE, ARM_UNBUFFERABLE, ARM_ACCESS_PERM_RW_RW); /* Ethernet Adaptor */ + X_ARM_MMU_SECTION(0x184, 0x184, 1, ARM_UNCACHEABLE, ARM_UNBUFFERABLE, ARM_ACCESS_PERM_RW_RW); /* XBusReg */ + X_ARM_MMU_SECTION(0x188, 0x188, 1, ARM_UNCACHEABLE, ARM_UNBUFFERABLE, ARM_ACCESS_PERM_RW_RW); /* SysRegA */ + X_ARM_MMU_SECTION(0x18C, 0x18C, 1, ARM_UNCACHEABLE, ARM_UNBUFFERABLE, ARM_ACCESS_PERM_RW_RW); /* SysRegB */ + X_ARM_MMU_SECTION(0x190, 0x190, 4, ARM_UNCACHEABLE, ARM_UNBUFFERABLE, ARM_ACCESS_PERM_RW_RW); /* CPLD A */ + X_ARM_MMU_SECTION(0x194, 0x194, 4, ARM_UNCACHEABLE, ARM_UNBUFFERABLE, ARM_ACCESS_PERM_RW_RW); /* CPLD B */ + X_ARM_MMU_SECTION(0x200, 0x200, 512, ARM_UNCACHEABLE, ARM_UNBUFFERABLE, ARM_ACCESS_PERM_RW_RW); /* PCMCIA Socket A */ + X_ARM_MMU_SECTION(0x300, 0x300, 512, ARM_UNCACHEABLE, ARM_UNBUFFERABLE, ARM_ACCESS_PERM_RW_RW); /* PCMCIA Sockets B */ + X_ARM_MMU_SECTION(0x400, 0x400, 128, ARM_UNCACHEABLE, ARM_UNBUFFERABLE, ARM_ACCESS_PERM_RW_RW); /* SA1111 Daughter card */ + X_ARM_MMU_SECTION(0x480, 0x480, 128, ARM_UNCACHEABLE, ARM_UNBUFFERABLE, ARM_ACCESS_PERM_RW_RW); /* Video Controller Daughter card */ + X_ARM_MMU_SECTION(0x800, 0x800, 0x400, ARM_UNCACHEABLE, ARM_UNBUFFERABLE, ARM_ACCESS_PERM_RW_RW); /* StrongARM(R) Registers */ + X_ARM_MMU_SECTION(0xC00, 0x000, 32, ARM_CACHEABLE, ARM_BUFFERABLE, ARM_ACCESS_PERM_RW_RW); /* DRAM Bank 0 */ + X_ARM_MMU_SECTION(0xC00, 0xC00, 32, ARM_UNCACHEABLE, ARM_BUFFERABLE, ARM_ACCESS_PERM_RW_RW); /* DRAM Bank 0 */ + X_ARM_MMU_SECTION(0xE00, 0xE00, 128, ARM_CACHEABLE, ARM_BUFFERABLE, ARM_ACCESS_PERM_RW_RW); /* Zeros (Cache Clean) Bank */ + +} + +// +// Board control register support +// Update the board control register (write only). Only the bits +// specified by 'mask' are changed to 'value'. +// + +void +ipaq_EGPIO(unsigned long mask, unsigned long value) +{ + _ipaq_EGPIO = (_ipaq_EGPIO & ~mask) | (mask & value); + *SA1110_EGPIO = _ipaq_EGPIO; +} + +// +// Platform specific initialization +// + +void +plf_hardware_init(void) +{ + // Force "alternate" use of GPIO pins used for LCD screen + *SA11X0_GPIO_ALTERNATE_FUNCTION |= 0x000003FC; // Bits 2..9 + *SA11X0_GPIO_PIN_DIRECTION |= 0x000003FC; // Bits 2..9 + *SA11X0_GPIO_PIN_OUTPUT_CLEAR = 0x000003FC; // Bits 2..9 + + // Pins used for buttons, communications with Atmel + //*SA11X0_GPIO_PIN_DIRECTION &= 0x03FE0C003; + *SA11X0_GPIO_RISING_EDGE_DETECT |= 0x00000002; + *SA11X0_GPIO_FALLING_EDGE_DETECT |= 0x00000002; + + // Setup communication with Atmel micro-controller + *SA1110_GPCLK_CONTROL_0 = SA1110_GPCLK_SUS_UART; + *SA11X0_PPC_PIN_ASSIGNMENT &= ~SA11X0_PPC_UART_PIN_REASSIGNED; + atmel_init(); +} + +// +// Support for platform specific I/O channels +// + +void +plf_if_init(void) +{ +#ifdef CYGSEM_IPAQ_LCD_COMM + // Initialize screen + lcd_init(16); + // Initialize I/O channel + lcd_comm_init(); +#endif +} + diff --git a/packages/hal/arm/sa11x0/ipaq/current/src/kbd.xpm b/packages/hal/arm/sa11x0/ipaq/current/src/kbd.xpm new file mode 100644 --- /dev/null +++ b/packages/hal/arm/sa11x0/ipaq/current/src/kbd.xpm @@ -0,0 +1,667 @@ +#if 0 // Originals +/* XPM */ +static char * keynorm_xpm[] = { +"160 61 3 1", +" c None", +". c #000000", +"+ c #FFFFFF", +"................................................................................................................................................................", +".+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.++++++++++++++++++.", +".+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.++++++++++++++++++.", +".+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.++++++++++++++++++.", +".+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.++++++.++++++.+++++++++++++.+++++++++++++.++++++.++++++.+++++++++++++.+++++++++++++.++++++++++++++++++.", +".+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.++++++.++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.++++++.+++++++++++.", +".+++++...+++++.++++.+++.++++.++++++..+++++.+++++.+.+++++.+++++....++++.+++++.++.++++.+++++.++.++++.++++++.++++++.++++++..+++++.+++++...+++++.+++++..+++++++++++.", +".++++.++.+++++.++++.+++.++++.+++++.++.++++.+++++..++++++.++++++.++++++.+++++.++.++++.+++++.++.++++.++++++.++++++.+++++.++.++++.+++++.++.++++.++++...+++++++++++.", +".++++.++.+++++.++++.+.+.++++.+++++.++.++++.+++++.+++++++.++++++.++++++.+++++.++.++++.+++++.++.++++.++++++.++++++.+++++.++.++++.+++++.++.++++.+++............+++.", +".++++.++.+++++.++++.+.+.++++.+++++....++++.+++++.+++++++.++++++.++++++.+++++.++.++++.+++++.++.++++.++++++.++++++.+++++.++.++++.+++++.++.++++.++++...+++++++++++.", +".+++++...+++++.+++++.+.+++++.+++++.+++++++.+++++.+++++++.++++++.+.++++.++++++...++++.+++++.++.++++.++++++.++++++.+++++.++.++++.+++++...+++++.+++++..+++++++++++.", +".+++++++.+++++.+++++.+.+++++.++++++...++++.+++++.+++++++.+++++++.+++++.++++++++.++++.++++++..+++++.++++++.++++++.++++++..+++++.+++++.+++++++.++++++.+++++++++++.", +".+++++++.+++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.++++++..+++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++.+++++++.++++++++++++++++++.", +".+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.++++++++++++++++++.", +".+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.++++++++++++++++++.", +"................................................................................................................................................................", +".+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.++++++++++++++++++.", +".+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.++++++++++++++++++.", +".+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.++++++++++++++++++.", +".+++++++++++++.+++++++++++++.++++++++.++++.+++++++.+++++.+++++++++++++.+++++.+++++++.++++++++.++++.+++++.+++++++.++++++.++++++.+++++++++++++.++++++++++++++++++.", +".+++++++++++++.+++++++++++++.++++++++.++++.++++++.+.++++.+++++++++++++.+++++.+++++++.+++++++++++++.+++++.+++++++.++++++.++++++.+++++++++++++.++++++.+++++++.+++.", +".+++++..++++++.++++++..+++++.++++++...++++.++++++.++++++.++++++..+++++.+++++...+++++.++++++++.++++.+++++.++.++++.++++++.++++++.+++++++++++++.+++++..+++++++.+++.", +".+++++++.+++++.+++++.++.++++.+++++.++.++++.+++++....++++.+++++.++.++++.+++++.++.++++.++++++++.++++.+++++.++.++++.++++++.++++++.+++++++++++++.++++...+++++++.+++.", +".+++++...+++++.++++++.++++++.+++++.++.++++.++++++.++++++.+++++.++.++++.+++++.++.++++.++++++++.++++.+++++.+.+++++.++++++.++++++.++++.....++++.+++............+++.", +".++++.++.+++++.+++++++.+++++.+++++.++.++++.++++++.++++++.+++++.++.++++.+++++.++.++++.++++++++.++++.+++++..++++++.++++++.++++++.+++++++++++++.++++...+++++++++++.", +".++++.++.+++++.+++++.++.++++.+++++.++.++++.++++++.++++++.++++++...++++.+++++.++.++++.++++++++.++++.+++++.+.+++++.++++++.++++++.+++++++++++++.+++++..+++++++++++.", +".+++++...+++++.++++++..+++++.++++++...++++.++++++.++++++.++++++++.++++.+++++.++.++++.++++++.+.++++.+++++.++.++++.++++++.++++++.+++++++++++++.++++++.+++++++++++.", +".+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++...+++++.+++++++++++++.+++++++.+++++.+++++++++++++.+++++++++++++.+++++++++++++.++++++++++++++++++.", +".+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.++++++++++++++++++.", +".+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.++++++++++++++++++.", +"................................................................................................................................................................", +".++++++++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.", +".++++++++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.", +".++++++++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.", +".++++++++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++.+++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.", +".++..++.++++++.++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++.+++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++..++++++.", +".+.++.+.++++++.++++.+++++....++++.++++.+++.++++.++++++...++++.++++.+++.++++.+++++...+++++.+++++...+++++.+++++....++++.+++++++++++++.+++++++++++++.+++++..++++++.", +".+.+++...+.+.+.++++.++++++++.++++.+++++.+.+++++.+++++.+++++++.++++.+++.++++.+++++.++.++++.+++++.++.++++.+++++.+.+.+++.+++++++++++++.+++++++++++++.+++++++++++++.", +".+.++++.++..++.++++.+++++++.+++++.++++++.++++++.+++++.+++++++.+++++.+.+++++.+++++.++.++++.+++++.++.++++.+++++.+.+.+++.+++++++++++++.+++++++++++++.+++++..++++++.", +".+.++++.++.+++.++++.++++++.++++++.++++++.++++++.+++++.+++++++.+++++.+.+++++.+++++.++.++++.+++++.++.++++.+++++.+.+.+++.+++++..++++++.++++++..+++++.+++++..++++++.", +".+.++.+.++.+++.++++.+++++.+++++++.+++++.+.+++++.+++++.+++++++.++++++.++++++.+++++.++.++++.+++++.++.++++.+++++.+.+.+++.+++++..++++++.++++++..+++++.++++++.++++++.", +".++..+++.+.+++.++++.+++++....++++.++++.+++.++++.++++++...++++.++++++.++++++.+++++...+++++.+++++.++.++++.+++++.+.+.+++.++++++.++++++.+++++++++++++.+++++.+++++++.", +".++++++++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++.+++++++.+++++++++++++.+++++++++++++.", +".++++++++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.", +".++++++++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.", +"................................................................................................................................................................", +".++++++++++++++++++++.++++++++++++++.++++++++++++++++++++++++++++++++++++++++++++++++.+++++++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.", +".++++++++++++++++++++.++++++++++++++.++++++++++++++++++++++++++++++++++++++++++++++++.+++++++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.", +".++++++++++++++++++++.++++++++++++++.++++++++++++++++++++++++++++++++++++++++++++++++.+++++++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.", +".++++++++++++++++++++.++++++++++.+++.++++++++++++++++++++++++++++++++++++++++++++++++.+++..++..+++..+++.++++++..+++++.+++++++++++++.+++++.+++++++.++++++++.++++.", +".++...+.+++.+++.++.++.+.+++++.++.+.+.++++++++++++++++++++++++++++++++++++++++++++++++.++++.+.++.+.++.++.++++++..+++++.+++++++++++++.+++++.+++++++.++++++++.++++.", +".+.++++.++++++.+++.++.+.+++++.++.+.+.++++++++++++++++++++++++++++++++++++++++++++++++.++++.++++.++++.++.+++++++.+++++.+++++++++++++.+++++.+++++++.++++++++.++++.", +".+.++++..++.+...+...+.+.+..+...+++.+.++++++++++++++++++++++++++++++++++++++++++++++++.++++.++++.++++.++.++++++.++++++.++++......+++.++++++.++++++.+++++++.+++++.", +".++..++.+.+.++.+++.++.+.+.+.+.++++.+.++++++++++++++++++++++++++++++++++++++++++++++++.++++.+++.+++..+++.+++++++++++++.+++++++++++++.++++++.++++++.+++++++.+++++.", +".++++.+.+.+.++.+++.++.+.+.+.+.++++.+.++++++++++++++++++++++++++++++++++++++++++++++++.++++.++.++++++.++.+++++++++++++.++++......+++.++++++.++++++.+++++++.+++++.", +".++++.+.+.+.++.+++.++.+.+.+.+.++++.+.++++++++++++++++++++++++++++++++++++++++++++++++.++++.+.+++++++.++.+++++++++++++.+++++++++++++.+++++++.+++++.++++++.++++++.", +".+...++.+.+.++.++++.+.+.+.+.++.+++.+.++++++++++++++++++++++++++++++++++++++++++++++++.++++.+.++++.++.++.+++++++++++++.+++++++++++++.+++++++.+++++.++++++.++++++.", +".++++++++++++++++++++.++++++++++++++.++++++++++++++++++++++++++++++++++++++++++++++++.++++.+....++..+++.+++++++++++++.+++++++++++++.+++++++.+++++.++++++.++++++.", +".++++++++++++++++++++.++++++++++++++.++++++++++++++++++++++++++++++++++++++++++++++++.+++++++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.", +".++++++++++++++++++++.++++++++++++++.++++++++++++++++++++++++++++++++++++++++++++++++.+++++++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.", +"................................................................................................................................................................"}; + +/* XPM */ +static char * keyshft_xpm[] = { +"160 61 3 1", +" c None", +". c #000000", +"+ c #FFFFFF", +"................................................................................................................................................................", +".+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.++++++++++++++++++.", +".+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.++++++++++++++++++.", +".+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.++++++++++++++++++.", +".+++++...+++++.+++.++.++.+++.+++++....++++.+++++....++++.++++.....++++.++++.+++.++++.++++.+++.++++.++++++.++++++.+++++...+++++.+++++....++++.++++++++++++++++++.", +".++++.+++.++++.+++.++.++.+++.+++++.+++++++.+++++.+++.+++.++++++.++++++.++++.+++.++++.++++.+++.++++.++++++.++++++.++++.+++.++++.+++++.+++.+++.++++++.+++++++++++.", +".++++.+++.++++.+++.++.++.+++.+++++.+++++++.+++++.+++.+++.++++++.++++++.++++.+++.++++.++++.+++.++++.++++++.++++++.++++.+++.++++.+++++.+++.+++.+++++..+++++++++++.", +".++++.+++.++++.+++.++.++.+++.+++++.+++++++.+++++.+++.+++.++++++.++++++.+++++.+.+++++.++++.+++.++++.++++++.++++++.++++.+++.++++.+++++.+++.+++.++++...+++++++++++.", +".++++..++.++++.+++.+.+.+.+++.+++++....++++.+++++....++++.++++++.++++++.++++++.++++++.++++.+++.++++.++++++.++++++.++++.+++.++++.+++++....++++.+++............+++.", +".++++.+.+.++++.+++.+.+.+.+++.+++++.+++++++.+++++.+++.+++.++++++.++++++.++++++.++++++.++++.+++.++++.++++++.++++++.++++.+++.++++.+++++.+++++++.++++...+++++++++++.", +".++++.++..++++.+++.+.+.+.+++.+++++.+++++++.+++++.+++.+++.++++++.++++++.++++++.++++++.++++.+++.++++.++++++.++++++.++++.+++.++++.+++++.+++++++.+++++..+++++++++++.", +".++++.+++.++++.++++.+++.++++.+++++.+++++++.+++++.+++.+++.++++++.++++++.++++++.++++++.++++.+++.++++.++++++.++++++.++++.+++.++++.+++++.+++++++.++++++.+++++++++++.", +".+++++...+.+++.++++.+++.++++.+++++....++++.+++++.+++.+++.++++++.++++++.++++++.++++++.+++++...+++++.++++++.++++++.+++++...+++++.+++++.+++++++.++++++++++++++++++.", +".+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.++++++++++++++++++.", +".+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.++++++++++++++++++.", +"................................................................................................................................................................", +".+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.++++++++++++++++++.", +".+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.++++++++++++++++++.", +".+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.++++++++++++++++++.", +".+++++...+++++.+++++....++++.++++....+++++.+++++....++++.+++++...+++++.++++.+++.++++.++++.....++++.++++.+++.++++.++++.++++++++.+++++++++++++.++++++++++++++++++.", +".++++.+++.++++.++++.++++++++.++++.+++.++++.+++++.+++++++.++++.++++++++.++++.+++.++++.+++++++.+++++.++++.+++.++++.++++.++++++++.+++++++++++++.++++++.+++++++.+++.", +".++++.+++.++++.++++.++++++++.++++.+++.++++.+++++.+++++++.++++.++++++++.++++.+++.++++.+++++++.+++++.++++.++.+++++.++++.++++++++.+++++++++++++.+++++..+++++++.+++.", +".++++.+++.++++.++++.++++++++.++++.+++.++++.+++++.+++++++.++++.++++++++.++++.+++.++++.+++++++.+++++.++++.+.++++++.++++.++++++++.+++++++++++++.++++...+++++++.+++.", +".++++.+++.++++.+++++...+++++.++++.+++.++++.+++++....++++.++++.+...++++.++++.....++++.+++++++.+++++.++++..+++++++.++++.++++++++.+++++++++++++.+++............+++.", +".++++.....++++.++++++++.++++.++++.+++.++++.+++++.+++++++.++++.+++.++++.++++.+++.++++.+++++++.+++++.++++.+.++++++.++++.++++++++.+++++++++++++.++++...+++++++++++.", +".++++.+++.++++.++++++++.++++.++++.+++.++++.+++++.+++++++.++++.+++.++++.++++.+++.++++.+++++++.+++++.++++.++.+++++.++++.++++++++.+++++++++++++.+++++..+++++++++++.", +".++++.+++.++++.++++++++.++++.++++.+++.++++.+++++.+++++++.++++.+++.++++.++++.+++.++++.++++.++.+++++.++++.+++.++++.++++.++++++++.+++++++++++++.++++++.+++++++++++.", +".++++.+++.++++.++++....+++++.++++....+++++.+++++.+++++++.+++++...+++++.++++.+++.++++.+++++..++++++.++++.+++.++++.++++.....++++.+++.......+++.++++++++++++++++++.", +".+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.++++++++++++++++++.", +".+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.++++++++++++++++++.", +"................................................................................................................................................................", +".++++++++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.", +".++++++++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.", +".++++++++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.", +".++++++++++++++++++.++++.....++++.++++.+++.++++.+++++...+++++.++++.+++.++++.++++....+++++.++++.++++.+++.+++.+++++.+++.++++++++.++++.+++++.+++++++.+++++++++++++.", +".++..++.++++++.++++.++++++++.++++.++++.+++.++++.++++.+++.++++.++++.+++.++++.++++.+++.++++.++++..+++.+++.+++..+++..+++.+++++++.+++++.++++++.++++++.+++++++++++++.", +".+.++.+.++++++.++++.++++++++.++++.++++.+++.++++.++++.++++++++.++++.+++.++++.++++.+++.++++.++++..+++.+++.+++.+.+.+.+++.++++++.++++++.+++++++.+++++.++++++..+++++.", +".+.+++...+.+.+.++++.+++++++.+++++.+++++.+.+++++.++++.++++++++.+++++.+.+++++.++++.+++.++++.++++.+.++.+++.+++.++.++.+++.+++++.+++++++.++++++++.++++.++++++..+++++.", +".+.++++.++..++.++++.++++++.++++++.++++++.++++++.++++.++++++++.+++++.+.+++++.++++....+++++.++++.+.++.+++.+++.+++++.+++.++++.++++++++.+++++++++.+++.+++++++++++++.", +".+.++++.++.+++.++++.+++++.+++++++.+++++.+.+++++.++++.++++++++.+++++.+.+++++.++++.+++.++++.++++.++.+.+++.+++.+++++.+++.+++++.+++++++.++++++++.++++.++++++..+++++.", +".+.++.+.++.+++.++++.++++.++++++++.++++.+++.++++.++++.++++++++.++++++.++++++.++++.+++.++++.++++.++.+.+++.+++.+++++.+++.++++++.++++++.+++++++.+++++.++++++..+++++.", +".++..+++.+.+++.++++.++++.++++++++.++++.+++.++++.++++.+++.++++.++++++.++++++.++++.+++.++++.++++.+++..+++.+++.+++++.+++.+++++++.+++++.++++++.++++++.+++++++++++++.", +".++++++++++++++++++.++++.....++++.++++.+++.++++.+++++...+++++.++++++.++++++.++++....+++++.++++.+++..+++.+++.+++++.+++.++++++++.++++.+++++.+++++++.+++++++++++++.", +".++++++++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.", +".++++++++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.", +"................................................................................................................................................................", +"......................++++++++++++++.++++++++++++++++++++++++++++++++++++++++++++++++.+++++++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.", +"......................++++++++++++++.++++++++++++++++++++++++++++++++++++++++++++++++.+++++++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.", +"......................++++++++++++++.++++++++++++++++++++++++++++++++++++++++++++++++.+++++++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.", +"..................+...++++++++++.+++.++++++++++++++++++++++++++++++++++++++++++++++++.+++..++..+++..+++.+++++++++++++.+++++++++++++.++++++.++++++.+++++...+++++.", +"...+++.+...+...+..+...+.+++++.++.+.+.++++++++++++++++++++++++++++++++++++++++++++++++.++++.+.++.+.++.++.+++++.+.+++++.++++++.++++++.++++++.++++++.++++.+++.++++.", +"..+....+......+...+...+.+++++.++.+.+.++++++++++++++++++++++++++++++++++++++++++++++++.++++.++++.++++.++.+++++.+.+++++.++++++.++++++.++++++.++++++.++++++++.++++.", +"..+....++..+.+++.+++..+.+..+...+++.+.++++++++++++++++++++++++++++++++++++++++++++++++.++++.++++.++++.++.+++++.+.+++++.++++++.++++++.++++++.++++++.++++++++.++++.", +"...++..+.+.+..+...+...+.+.+.+.++++.+.++++++++++++++++++++++++++++++++++++++++++++++++.++++.+++.+++..+++.+++++++++++++.+++.......+++.++++++.++++++.+++++++.+++++.", +".....+.+.+.+..+...+...+.+.+.+.++++.+.++++++++++++++++++++++++++++++++++++++++++++++++.++++.++.++++++.++.+++++++++++++.++++++.++++++.++++++.++++++.++++++.++++++.", +".....+.+.+.+..+...+...+.+.+.+.++++.+.++++++++++++++++++++++++++++++++++++++++++++++++.++++.+.+++++++.++.+++++++++++++.++++++.++++++.++++++.++++++.++++++.++++++.", +"..+++..+.+.+..+....+..+.+.+.++.+++.+.++++++++++++++++++++++++++++++++++++++++++++++++.++++.+.++++.++.++.+++++++++++++.++++++.++++++.++++++.++++++.+++++++++++++.", +"......................++++++++++++++.++++++++++++++++++++++++++++++++++++++++++++++++.++++.+....++..+++.+++++++++++++.+++++++++++++.++++++.++++++.++++++.++++++.", +"......................++++++++++++++.++++++++++++++++++++++++++++++++++++++++++++++++.+++++++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.", +"......................++++++++++++++.++++++++++++++++++++++++++++++++++++++++++++++++.+++++++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.", +"................................................................................................................................................................"}; + +/* XPM */ +static char * keynum_xpm[] = { +"160 61 3 1", +" c None", +". c #000000", +"+ c #FFFFFF", +"................................................................................................................................................................", +".+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.++++++++++++++++++.", +".+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.++++++++++++++++++.", +".+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.++++++++++++++++++.", +".+++++..++++++.+++++...+++++.+++++...+++++.++++++++.++++.++++....+++++.+++++...+++++.+++++....++++.+++++...+++++.+++++...+++++.+++++...+++++.++++++++++++++++++.", +".++++++.++++++.++++.+++.++++.++++.+++.++++.+++++++..++++.++++.++++++++.++++.++++++++.++++++++.++++.++++.+++.++++.++++.+++.++++.++++.+++.++++.++++++.+++++++++++.", +".++++++.++++++.++++++++.++++.++++++++.++++.++++++.+.++++.++++.++++++++.++++.++++++++.++++++++.++++.++++.+++.++++.++++.+++.++++.++++.+++.++++.+++++..+++++++++++.", +".++++++.++++++.+++++++.+++++.++++++++.++++.+++++.++.++++.++++.++++++++.++++.++++++++.+++++++.+++++.++++.+++.++++.++++.+++.++++.++++.+++.++++.++++...+++++++++++.", +".++++++.++++++.++++++.++++++.+++++...+++++.++++.+++.++++.++++....+++++.++++....+++++.+++++++.+++++.+++++...+++++.+++++...+++++.++++.+++.++++.+++............+++.", +".++++++.++++++.+++++.+++++++.++++++++.++++.++++......+++.++++++++.++++.++++.+++.++++.+++++++.+++++.++++.+++.++++.++++++++.++++.++++.+++.++++.++++...+++++++++++.", +".++++++.++++++.++++.++++++++.++++++++.++++.++++++++.++++.++++++++.++++.++++.+++.++++.++++++.++++++.++++.+++.++++.++++++++.++++.++++.+++.++++.+++++..+++++++++++.", +".++++++.++++++.++++.++++++++.++++.+++.++++.++++++++.++++.++++++++.++++.++++.+++.++++.++++++.++++++.++++.+++.++++.++++++++.++++.++++.+++.++++.++++++.+++++++++++.", +".++++++.++++++.++++.....++++.+++++...+++++.++++++++.++++.++++....+++++.+++++...+++++.++++++.++++++.+++++...+++++.+++++...+++++.+++++...+++++.++++++++++++++++++.", +".+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.++++++++++++++++++.", +".+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.++++++++++++++++++.", +"................................................................................................................................................................", +".+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.++++++++++++++++++.", +".+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.++++++++++++++++++.", +".+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.++++++.++++++.+++++++++++++.+++++++++++++.++++++++++++++++++.", +".++++++.++++++.+++++...+++++.++++++.+.++++.++++++.++++++.++++.++++.+++.+++++++++++++.+++++..++++++.+++.++.++.+++.+++++++.+++++.+++++.+++++++.++++++++++++++++++.", +".++++++.++++++.++++.+++.++++.++++++.+.++++.+++++....++++.+++.+.+++.+++.++++++.++++++.++++.++.+++++.++++.+.+.++++.++++++.++++++.++++++.++++++.++++++.+++++++.+++.", +".++++++.++++++.+++.+...+.+++.++++......+++.++++.+.++++++.+++.+.++.++++.+++++.+.+++++.++++.+.++++++.+++++.+.+++++.+++++.+++++++.+++++++.+++++.+++++..+++++++.+++.", +".++++++.++++++.++.+.++.++.++.++++++.+.++++.++++.+.++++++.++++.++.+++++.++++.+++.++++.+++++.+++++++.++++++.++++++.+++++.+++++++.+++++++.+++++.++++...+++++++.+++.", +".++++++.++++++.++.+.++.++.++.+++++.+.+++++.+++++...+++++.++++++.++++++.+++.+++++.+++.++++.+.++++++.+++...+...+++.+++++.+++++++.+++++++.+++++.+++............+++.", +".++++++.++++++.++.+.++.++.++.++++.+.++++++.++++++.+.++++.+++++.++.++++.++.+++++++.++.+++.+++.+.+++.++++++.++++++.+++++.+++++++.+++++++.+++++.++++...+++++++++++.", +".++++++.++++++.+++.+..+..+++.+++......++++.++++++.+.++++.++++.++.+.+++.+++++++++++++.+++.++++.++++.+++++.+.+++++.+++++.+++++++.+++++++.+++++.+++++..+++++++++++.", +".+++++++++++++.++++.++++++++.++++.+.++++++.++++....+++++.+++.+++.+.+++.+++++++++++++.++++.++.+.+++.++++.+.+.++++.++++++.++++++.++++++.++++++.++++++.+++++++++++.", +".++++++.++++++.+++++...+++++.++++.+.++++++.++++++.++++++.+++.++++.++++.+++++++++++++.+++++..+++.++.+++.++.++.+++.+++++++.+++++.+++++.+++++++.++++++++++++++++++.", +".+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.++++++.++++++.+++++++++++++.+++++++++++++.++++++++++++++++++.", +".+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.++++++++++++++++++.", +"................................................................................................................................................................", +".++++++++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.", +".++++++++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.", +".++++++++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.", +".++++++++++++++++++.++++.++..++++.+++.++...++++.+++.++...++++.+++.+++++.+++.+++.+....++++.+++.++...++++.+++.++....+++.+++.++...++++.+++++++++++++.+++++++++++++.", +".++..++.++++++.++++.+++.+.++.++++.++.+..+++.+++.++.+..+++.+++.++.+.+++..+++.++.+..+++++++.++.+..+++++++.++.+.++++.+++.++.+..+++.+++.+++++++++++++.+++++++++++++.", +".+.++.+.++++++.++++.+++.++++.++++.++.++++++.+++.++.++++++.+++.++.++++.+.+++.++.++.+++++++.++.++.+++++++.++.++++++.+++.++.++.+++.+++.++++++..+++++.+++++++++++++.", +".+.+++...+.+.+.++++.++....++.++++.+....+++.++++.+....++++.+++.+....+.++.+++.+.....+++++++.+.....+++++++.+....+++.++++.+.....+++.+++.++++++..+++++.+++++..++.+++.", +".+.++++.++..++.++++.+++.++++.++++.++.++++.+++++.++.+++...++++.++.++.+++.+++.++.++....++++.++.++....++++.++.+++++.++++.++.+++...++++.++++++.++++++.++++.++..++++.", +".+.++++.++.+++.++++.+++.++++.++++.++.+++.++++++.++.++++++.+++.++.++......++.++.++++++.+++.++.++.+++.+++.++.+++++.++++.++.++.+++.+++.+++++++.+++++.+++++++++++++.", +".+.++.+.++.+++.++++.+++.++++.++++.++.++.+++++++.++.++++++.+++.++.++++++.+++.++.++++++.+++.++.++.+++.+++.++.++++.+++++.++.++.+++.+++.+++++++++++++.+++++++++++++.", +".++..+++.+.+++.++++.+++.++++.++++.++.++.+++++++.++.++.+++.+++.++.++++++.+++.++.++++++.+++.++.++.+++.+++.++.++++.+++++.++.++.+++.+++.+++++++++++++.+++++++++++++.", +".++++++++++++++++++.+++.++++.++++.++.++.....+++.++.+++...++++.++.++++++.+++.++.++....++++.++.+++...++++.++.++++.+++++.++.+++...++++.+++++++++++++.+++++++++++++.", +".++++++++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.", +".++++++++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.", +"................................................................................................................................................................", +".++++++++++++++++++++.++++++++++++++.++++++++++++++++++++++++++++++++++++++++++++++++...................+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.", +".++++++++++++++++++++.++++++++++++++.++++++++++++++++++++++++++++++++++++++++++++++++...................+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.", +".++++++++++++++++++++.++++++++++++++.++++++++++++++++++++++++++++++++++++++++++++++++...................+++++...+++++.+++++...+++++.+++++++.+++++.+++++.+++++++.", +".++++++++++++++++++++.++++++++++.+++.++++++++++++++++++++++++++++++++++++++++++++++++....++..++...++....+++++.+++++++.+++++++.+++++.++++++.++++++.++++++.++++++.", +".++...+.+++.+++.++.++.+.+++++.++.+.+.++++++++++++++++++++++++++++++++++++++++++++++++.....+.+..+.+..+...+++++.+++++++.+++++++.+++++.++++++.++++++.++++++.++++++.", +".+.++++.++++++.+++.++.+.+++++.++.+.+.++++++++++++++++++++++++++++++++++++++++++++++++.....+....+....+...+++++.+++++++.+++++++.+++++.++++++.++++++.++++++.++++++.", +".+.++++..++.+...+...+.+.+..+...+++.+.++++++++++++++++++++++++++++++++++++++++++++++++.....+....+....+...+++++.+++++++.+++++++.+++++.+++++.+++++++.+++++++.+++++.", +".++..++.+.+.++.+++.++.+.+.+.+.++++.+.++++++++++++++++++++++++++++++++++++++++++++++++.....+...+...++....+++++.+++++++.+++++++.+++++.++++++.++++++.++++++.++++++.", +".++++.+.+.+.++.+++.++.+.+.+.+.++++.+.++++++++++++++++++++++++++++++++++++++++++++++++.....+..+......+...+++++.+++++++.+++++++.+++++.++++++.++++++.++++++.++++++.", +".++++.+.+.+.++.+++.++.+.+.+.+.++++.+.++++++++++++++++++++++++++++++++++++++++++++++++.....+.+.......+...+++++.+++++++.+++++++.+++++.++++++.++++++.++++++.++++++.", +".+...++.+.+.++.++++.+.+.+.+.++.+++.+.++++++++++++++++++++++++++++++++++++++++++++++++.....+.+....+..+...+++++...+++++.+++++...+++++.+++++++.+++++.+++++.+++++++.", +".++++++++++++++++++++.++++++++++++++.++++++++++++++++++++++++++++++++++++++++++++++++.....+.++++..++....+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.", +".++++++++++++++++++++.++++++++++++++.++++++++++++++++++++++++++++++++++++++++++++++++...................+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.", +".++++++++++++++++++++.++++++++++++++.++++++++++++++++++++++++++++++++++++++++++++++++...................+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.", +"................................................................................................................................................................"}; + +/* XPM */ +static char * keyctrl_xpm[] = { +"160 61 3 1", +" c None", +". c #000000", +"+ c #FFFFFF", +"................................................................................................................................................................", +".+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.++++++++++++++++++.", +".+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.++++++++++++++++++.", +".+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.++++++++++++++++++.", +".+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.++++++.++++++.+++++++++++++.+++++++++++++.++++++.++++++.+++++++++++++.+++++++++++++.+....++....++...++.", +".+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.++++++.++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+.++++.+++++.+++.+.", +".+++++...+++++.++++.+++.++++.++++++..+++++.+++++.+.+++++.+++++....++++.+++++.++.++++.+++++.++.++++.++++++.++++++.++++++..+++++.+++++...+++++.+.++++.+++++.+++++.", +".++++.++.+++++.++++.+++.++++.+++++.++.++++.+++++..++++++.++++++.++++++.+++++.++.++++.+++++.++.++++.++++++.++++++.+++++.++.++++.+++++.++.++++.+.++++.+++++.+++++.", +".++++.++.+++++.++++.+.+.++++.+++++.++.++++.+++++.+++++++.++++++.++++++.+++++.++.++++.+++++.++.++++.++++++.++++++.+++++.++.++++.+++++.++.++++.+....++...++.+++++.", +".++++.++.+++++.++++.+.+.++++.+++++....++++.+++++.+++++++.++++++.++++++.+++++.++.++++.+++++.++.++++.++++++.++++++.+++++.++.++++.+++++.++.++++.+.++++++++.+.+++++.", +".+++++...+++++.+++++.+.+++++.+++++.+++++++.+++++.+++++++.++++++.+.++++.++++++...++++.+++++.++.++++.++++++.++++++.+++++.++.++++.+++++...+++++.+.++++++++.+.+++++.", +".+++++++.+++++.+++++.+.+++++.++++++...++++.+++++.+++++++.+++++++.+++++.++++++++.++++.++++++..+++++.++++++.++++++.++++++..+++++.+++++.+++++++.+.++++++++.+.+++.+.", +".+++++++.+++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.++++++..+++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++.+++++++.+....+....+++...++.", +".+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.++++++++++++++++++.", +".+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.++++++++++++++++++.", +"................................................................................................................................................................", +".+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.++++++++++++++++++.", +".+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.++++++++++++++++++.", +".+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.++++++++++++++++++.", +".+++++++++++++.+++++++++++++.++++++++.++++.+++++++.+++++.+++++++++++++.+++++.+++++++.++++++++.++++.+++++.+++++++.++++++.++++++.+++++++++++++.++++++++++++++++++.", +".+++++++++++++.+++++++++++++.++++++++.++++.++++++.+.++++.+++++++++++++.+++++.+++++++.+++++++++++++.+++++.+++++++.++++++.++++++.+++++++++++++.++++++.+++++++.+++.", +".+++++..++++++.++++++..+++++.++++++...++++.++++++.++++++.++++++..+++++.+++++...+++++.++++++++.++++.+++++.++.++++.++++++.++++++.+++++++++++++.+++++..+++++++.+++.", +".+++++++.+++++.+++++.++.++++.+++++.++.++++.+++++....++++.+++++.++.++++.+++++.++.++++.++++++++.++++.+++++.++.++++.++++++.++++++.+++++++++++++.++++...+++++++.+++.", +".+++++...+++++.++++++.++++++.+++++.++.++++.++++++.++++++.+++++.++.++++.+++++.++.++++.++++++++.++++.+++++.+.+++++.++++++.++++++.+++++++++++++.+++............+++.", +".++++.++.+++++.+++++++.+++++.+++++.++.++++.++++++.++++++.+++++.++.++++.+++++.++.++++.++++++++.++++.+++++..++++++.++++++.++++++.+++++++++++++.++++...+++++++++++.", +".++++.++.+++++.+++++.++.++++.+++++.++.++++.++++++.++++++.++++++...++++.+++++.++.++++.++++++++.++++.+++++.+.+++++.++++++.++++++.+++++++++++++.+++++..+++++++++++.", +".+++++...+++++.++++++..+++++.++++++...++++.++++++.++++++.++++++++.++++.+++++.++.++++.++++++.+.++++.+++++.++.++++.++++++.++++++.+++++++++++++.++++++.+++++++++++.", +".+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++...+++++.+++++++++++++.+++++++.+++++.+++++++++++++.+++++++++++++.+++.......+++.++++++++++++++++++.", +".+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.++++++++++++++++++.", +".+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.++++++++++++++++++.", +"................................................................................................................................................................", +"....................+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.", +"....................+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.", +"....................+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++.+++++++.++++...++++++.+++++++++++++.", +"....................+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++.+++++++.+++++++++++++.+++++++++++++.+++++.+++++++.++++++.++++++.+++++++++++++.", +"...++..+......+.....+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++.+++++++.+++++++++++++.+++++++++++++.+++++.+++++++.++++++.++++++.++++++.++++++.", +"..+..+.+......+.....+++++....++++.++++.+++.++++.++++++...++++.++++.+++.++++.+++++...+++++.+++++...+++++.+++++....++++.++++++.++++++.++++++.++++++.+++++.+.+++++.", +"..+...+++.+.+.+.....++++++++.++++.+++++.+.+++++.+++++.+++++++.++++.+++.++++.+++++.++.++++.+++++.++.++++.+++++.+.+.+++.++++++.++++++.++++++.++++++.++++.+++.++++.", +"..+....+..++..+.....+++++++.+++++.++++++.++++++.+++++.+++++++.+++++.+.+++++.+++++.++.++++.+++++.++.++++.+++++.+.+.+++.++++++.++++++.++++++.++++++.+++.+++++.+++.", +"..+....+..+...+.....++++++.++++++.++++++.++++++.+++++.+++++++.+++++.+.+++++.+++++.++.++++.+++++.++.++++.+++++.+.+.+++.+++++++.+++++.++++++.++++++.++.+++++++.++.", +"..+..+.+..+...+.....+++++.+++++++.+++++.+.+++++.+++++.+++++++.++++++.++++++.+++++.++.++++.+++++.++.++++.+++++.+.+.+++.+++++++.+++++.++++++.++++++.+++++++++++++.", +"...++...+.+...+.....+++++....++++.++++.+++.++++.++++++...++++.++++++.++++++.+++++...+++++.+++++.++.++++.+++++.+.+.+++.+++++++.+++++.++++...++++++.+++++++++++++.", +"....................+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.", +"....................+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.", +"....................+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.", +"................................................................................................................................................................", +".++++++++++++++++++++.++++++++++++++.++++++++++++++++++++++++++++++++++++++++++++++++.+++++++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.", +".++++++++++++++++++++.++++++++++++++.++++++++++++++++++++++++++++++++++++++++++++++++.+++++++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.", +".++++++++++++++++++++.++++++++++++++.++++++++++++++++++++++++++++++++++++++++++++++++.+++++++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+..++++++++++.", +".++++++++++++++++++++.++++++++++.+++.++++++++++++++++++++++++++++++++++++++++++++++++.+++..++..+++..+++.+++++++++++++.+++++++++++++.+++++++++++++.+.+.+++++++++.", +".++...+.+++.+++.++.++.+.+++++.++.+.+.++++++++++++++++++++++++++++++++++++++++++++++++.++++.+.++.+.++.++.+++++++++++++.+++++++++++++.+++++++++++++.+.+.+++++++++.", +".+.++++.++++++.+++.++.+.+++++.++.+.+.++++++++++++++++++++++++++++++++++++++++++++++++.++++.++++.++++.++.+++++++++++++.+++++++++++++.+++++++++++++.+.+.+...+++++.", +".+.++++..++.+...+...+.+.+..+...+++.+.++++++++++++++++++++++++++++++++++++++++++++++++.++++.++++.++++.++.+++++++++++++.+++++++++++++.+++++++++++++.+..++.+++++++.", +".++..++.+.+.++.+++.++.+.+.+.+.++++.+.++++++++++++++++++++++++++++++++++++++++++++++++.++++.+++.+++..+++.+++++++++++++.+++++++++++++.+++++++++++++.+++++...+++++.", +".++++.+.+.+.++.+++.++.+.+.+.+.++++.+.++++++++++++++++++++++++++++++++++++++++++++++++.++++.++.++++++.++.+++++++++++++.+++++++++++++.+++++++++++++.+++++.+++.+++.", +".++++.+.+.+.++.+++.++.+.+.+.+.++++.+.++++++++++++++++++++++++++++++++++++++++++++++++.++++.+.+++++++.++.+++++++++++++.+++++++++++++.+++++++++++++.+++++...+.+++.", +".+...++.+.+.++.++++.+.+.+.+.++.+++.+.++++++++++++++++++++++++++++++++++++++++++++++++.++++.+.++++.++.++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++.+++.", +".++++++++++++++++++++.++++++++++++++.++++++++++++++++++++++++++++++++++++++++++++++++.++++.+....++..+++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++.+++.", +".++++++++++++++++++++.++++++++++++++.++++++++++++++++++++++++++++++++++++++++++++++++.+++++++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++...+.", +".++++++++++++++++++++.++++++++++++++.++++++++++++++++++++++++++++++++++++++++++++++++.+++++++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.+++++++++++++.", +"................................................................................................................................................................"}; +#else // Resized +/* XPM */ +static char * keynorm_xpm[] = { +"241 92 3 1", +" c None", +". c #000000", +"+ c #FFFFFF", +".................................................................................................................................................................................................................................................", +".................................................................................................................................................................................................................................................", +"..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.+++++++++++++++++++++++++++..", +"..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.+++++++++++++++++++++++++++..", +"..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.+++++++++++++++++++++++++++..", +"..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.+++++++++++++++++++++++++++..", +"..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++.+++++++++..++++++++++++++++++++.++++++++++++++++++++.+++++++++..+++++++++.++++++++++++++++++++.++++++++++++++++++++.+++++++++++++++++++++++++++..", +"..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++.+++++++++..++++++++++++++++++++.++++++++++++++++++++.+++++++++..+++++++++.++++++++++++++++++++.++++++++++++++++++++.+++++++++++++++++++++++++++..", +"..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++.+++++++++..++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.+++++++++..++++++++++++++++..", +"..+++++++.....+++++++..++++++.+++++.++++++..+++++++++...+++++++..+++++++..+..+++++++..+++++++......++++++..+++++++..+++.+++++++.++++++++.+++..++++++.+++++++++..+++++++++.+++++++++...++++++++.++++++++....++++++++.++++++++...++++++++++++++++..", +"..+++++++.....+++++++..++++++.+++++.++++++..+++++++++...+++++++..+++++++..+..+++++++..+++++++......++++++..+++++++..+++.+++++++.++++++++.+++..++++++.+++++++++..+++++++++.+++++++++...++++++++.++++++++....++++++++.++++++++...++++++++++++++++..", +"..++++++.+++..+++++++..++++++.+++++.++++++..+++++++..+++.++++++..+++++++...+++++++++..+++++++++.+++++++++..+++++++..+++.+++++++.++++++++.+++..++++++.+++++++++..+++++++++.++++++++.+++..++++++.++++++++.+++..++++++.++++++.....++++++++++++++++..", +"..++++++.+++..+++++++..++++++.++.++.++++++..+++++++..+++.++++++..+++++++..++++++++++..+++++++++.+++++++++..+++++++..+++.+++++++.++++++++.+++..++++++.+++++++++..+++++++++.++++++++.+++..++++++.++++++++.+++..++++++.+++++..................++++..", +"..++++++.+++..+++++++..++++++.++.++.++++++..+++++++..+++.++++++..+++++++..++++++++++..+++++++++.+++++++++..+++++++..+++.+++++++.++++++++.+++..++++++.+++++++++..+++++++++.++++++++.+++..++++++.++++++++.+++..++++++.+++++..................++++..", +"..++++++.+++..+++++++..++++++.++.++.++++++..+++++++......++++++..+++++++..++++++++++..+++++++++.+++++++++..+++++++..+++.+++++++.++++++++.+++..++++++.+++++++++..+++++++++.++++++++.+++..++++++.++++++++.+++..++++++.++++++.....++++++++++++++++..", +"..+++++++.....+++++++..+++++++..+..+++++++..+++++++..++++++++++..+++++++..++++++++++..+++++++++.++.++++++..+++++++++....+++++++.++++++++.+++..++++++.+++++++++..+++++++++.++++++++.+++..++++++.++++++++....++++++++.++++++++...++++++++++++++++..", +"..+++++++.....+++++++..+++++++..+..+++++++..+++++++..++++++++++..+++++++..++++++++++..+++++++++.++.++++++..+++++++++....+++++++.++++++++.+++..++++++.+++++++++..+++++++++.++++++++.+++..++++++.++++++++....++++++++.++++++++...++++++++++++++++..", +"..++++++++++..+++++++..+++++++..+..+++++++..+++++++++....++++++..+++++++..++++++++++..++++++++++..+++++++..++++++++++++.+++++++.+++++++++...++++++++.+++++++++..+++++++++.+++++++++...++++++++.++++++++.+++++++++++.+++++++++..++++++++++++++++..", +"..++++++++++..+++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++...++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++.+++++++++++.+++++++++++++++++++++++++++..", +"..++++++++++..+++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++...++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++.+++++++++++.+++++++++++++++++++++++++++..", +"..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.+++++++++++++++++++++++++++..", +"..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.+++++++++++++++++++++++++++..", +"..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.+++++++++++++++++++++++++++..", +".................................................................................................................................................................................................................................................", +"..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.+++++++++++++++++++++++++++..", +"..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.+++++++++++++++++++++++++++..", +"..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.+++++++++++++++++++++++++++..", +"..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.+++++++++++++++++++++++++++..", +"..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.+++++++++++++++++++++++++++..", +"..+++++++++++++++++++..+++++++++++++++++++..++++++++++++.++++++..++++++++++..+++++++..+++++++++++++++++++..+++++++..+++++++++++.++++++++++++..++++++.++++++++.+++++++++++.+++++++++..+++++++++.++++++++++++++++++++.+++++++++++++++++++++++++++..", +"..+++++++++++++++++++..+++++++++++++++++++..++++++++++++.++++++..+++++++++.++.++++++..+++++++++++++++++++..+++++++..+++++++++++.++++++++++++++++++++.++++++++.+++++++++++.+++++++++..+++++++++.++++++++++++++++++++.+++++++++..++++++++++..++++..", +"..+++++++++++++++++++..+++++++++++++++++++..++++++++++++.++++++..+++++++++.++.++++++..+++++++++++++++++++..+++++++..+++++++++++.++++++++++++++++++++.++++++++.+++++++++++.+++++++++..+++++++++.++++++++++++++++++++.+++++++++..++++++++++..++++..", +"..+++++++...+++++++++..+++++++++...+++++++..+++++++++....++++++..+++++++++.+++++++++..+++++++++...+++++++..+++++++.....++++++++.++++++++++++..++++++.++++++++.+++..++++++.+++++++++..+++++++++.++++++++++++++++++++.++++++++...++++++++++..++++..", +"..++++++++++..+++++++..+++++++..+++.++++++..+++++++..+++.++++++..+++++++......++++++..+++++++..+++.++++++..+++++++..+++.+++++++.++++++++++++..++++++.++++++++.+++..++++++.+++++++++..+++++++++.++++++++++++++++++++.++++++.....++++++++++..++++..", +"..++++++++++..+++++++..+++++++..+++.++++++..+++++++..+++.++++++..+++++++......++++++..+++++++..+++.++++++..+++++++..+++.+++++++.++++++++++++..++++++.++++++++.+++..++++++.+++++++++..+++++++++.++++++++++++++++++++.++++++.....++++++++++..++++..", +"..+++++++.....+++++++..+++++++++.+++++++++..+++++++..+++.++++++..+++++++++.+++++++++..+++++++..+++.++++++..+++++++..+++.+++++++.++++++++++++..++++++.++++++++.++.++++++++.+++++++++..+++++++++.++++++........++++++.+++++..................++++..", +"..++++++.+++..+++++++..++++++++++..+++++++..+++++++..+++.++++++..+++++++++.+++++++++..+++++++..+++.++++++..+++++++..+++.+++++++.++++++++++++..++++++.++++++++...+++++++++.+++++++++..+++++++++.++++++++++++++++++++.++++++.....++++++++++++++++..", +"..++++++.+++..+++++++..++++++++++..+++++++..+++++++..+++.++++++..+++++++++.+++++++++..+++++++..+++.++++++..+++++++..+++.+++++++.++++++++++++..++++++.++++++++...+++++++++.+++++++++..+++++++++.++++++++++++++++++++.++++++.....++++++++++++++++..", +"..++++++.+++..+++++++..+++++++..+++.++++++..+++++++..+++.++++++..+++++++++.+++++++++..+++++++++....++++++..+++++++..+++.+++++++.++++++++++++..++++++.++++++++.++.++++++++.+++++++++..+++++++++.++++++++++++++++++++.++++++++...++++++++++++++++..", +"..+++++++.....+++++++..+++++++++...+++++++..+++++++++....++++++..+++++++++.+++++++++..++++++++++++.++++++..+++++++..+++.+++++++.+++++++++..+..++++++.++++++++.+++..++++++.+++++++++..+++++++++.++++++++++++++++++++.+++++++++..++++++++++++++++..", +"..+++++++.....+++++++..+++++++++...+++++++..+++++++++....++++++..+++++++++.+++++++++..++++++++++++.++++++..+++++++..+++.+++++++.+++++++++..+..++++++.++++++++.+++..++++++.+++++++++..+++++++++.++++++++++++++++++++.+++++++++..++++++++++++++++..", +"..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++.....+++++++..++++++++++++++++++++.+++++++++++.++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.+++++++++++++++++++++++++++..", +"..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.+++++++++++++++++++++++++++..", +"..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.+++++++++++++++++++++++++++..", +"..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.+++++++++++++++++++++++++++..", +".................................................................................................................................................................................................................................................", +".................................................................................................................................................................................................................................................", +"..+++++++++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..", +"..+++++++++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..", +"..+++++++++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..", +"..+++++++++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..", +"..+++++++++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++..++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..", +"..+++++++++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++..++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..", +"..+++...+++.+++++++++..++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++..++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++...+++++++++..", +"..+..+++.++.+++++++++..++++++.++++++++......++++++.++++++..++++..++++++.+++++++++.....++++++.++++++..++++..++++++.++++++++.....+++++++..+++++++.....+++++++..+++++++......++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++...+++++++++..", +"..+..+++.++.+++++++++..++++++.++++++++......++++++.++++++..++++..++++++.+++++++++.....++++++.++++++..++++..++++++.++++++++.....+++++++..+++++++.....+++++++..+++++++......++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++...+++++++++..", +"..+..++++.....+..+..+..++++++.++++++++++++..++++++.++++++++.++.++++++++.++++++++.+++++++++++.++++++..++++..++++++.++++++++..+++.++++++..+++++++..+++.++++++..+++++++..+..+..++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..", +"..+..++++++.+++...+++..++++++.+++++++++++.++++++++.+++++++++..+++++++++.++++++++.+++++++++++.++++++++.++.++++++++.++++++++..+++.++++++..+++++++..+++.++++++..+++++++..+..+..++++..+++++++++++++++++++..+++++++++++++++++++..+++++++...+++++++++..", +"..+..++++++.+++...+++..++++++.+++++++++++.++++++++.+++++++++..+++++++++.++++++++.+++++++++++.++++++++.++.++++++++.++++++++..+++.++++++..+++++++..+++.++++++..+++++++..+..+..++++..+++++++++++++++++++..+++++++++++++++++++..+++++++...+++++++++..", +"..+..++++++.+++..++++..++++++.+++++++++..+++++++++.+++++++++..+++++++++.++++++++.+++++++++++.++++++++.++.++++++++.++++++++..+++.++++++..+++++++..+++.++++++..+++++++..+..+..++++..+++++++...+++++++++..+++++++++...+++++++..+++++++...+++++++++..", +"..+..+++.++.+++..++++..++++++.++++++++.+++++++++++.++++++++.++.++++++++.++++++++.+++++++++++.+++++++++..+++++++++.++++++++..+++.++++++..+++++++..+++.++++++..+++++++..+..+..++++..+++++++...+++++++++..+++++++++...+++++++..+++++++++.+++++++++..", +"..+..+++.++.+++..++++..++++++.++++++++.+++++++++++.++++++++.++.++++++++.++++++++.+++++++++++.+++++++++..+++++++++.++++++++..+++.++++++..+++++++..+++.++++++..+++++++..+..+..++++..+++++++...+++++++++..+++++++++...+++++++..+++++++++.+++++++++..", +"..+++...++++..+..++++..++++++.++++++++......++++++.++++++..++++..++++++.+++++++++.....++++++.+++++++++..+++++++++.++++++++.....+++++++..+++++++..+++.++++++..+++++++..+..+..++++..+++++++++.+++++++++..+++++++++++++++++++..+++++++..++++++++++..", +"..+++++++++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++..++++++++++..+++++++++++++++++++..+++++++++++++++++++..", +"..+++++++++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++..++++++++++..+++++++++++++++++++..+++++++++++++++++++..", +"..+++++++++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..", +"..+++++++++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..", +"..+++++++++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..", +".................................................................................................................................................................................................................................................", +"..++++++++++++++++++++++++++++++.+++++++++++++++++++++..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++..+++++++++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..", +"..++++++++++++++++++++++++++++++.+++++++++++++++++++++..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++..+++++++++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..", +"..++++++++++++++++++++++++++++++.+++++++++++++++++++++..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++..+++++++++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..", +"..++++++++++++++++++++++++++++++.+++++++++++++++++++++..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++..+++++++++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..", +"..++++++++++++++++++++++++++++++.+++++++++++++++++++++..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++..+++++++++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..", +"..++++++++++++++++++++++++++++++.+++++++++++++++..++++..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++..++++...+++...+++++...++++..+++++++++...+++++++..+++++++++++++++++++..+++++++..++++++++++..++++++++++++.++++++..", +"..+++....++.+++++.+++++.+++..+++.++.++++++++.+++..+..+..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++..++++++.++.+++..+..+++.+++..+++++++++...+++++++..+++++++++++++++++++..+++++++..++++++++++..++++++++++++.++++++..", +"..+++....++.+++++.+++++.+++..+++.++.++++++++.+++..+..+..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++..++++++.++.+++..+..+++.+++..+++++++++...+++++++..+++++++++++++++++++..+++++++..++++++++++..++++++++++++.++++++..", +"..+..++++++.+++++++++..++++..+++.++.++++++++.+++..+..+..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++..++++++.++++++..++++++.+++..++++++++++..+++++++..+++++++++++++++++++..+++++++..++++++++++..++++++++++++.++++++..", +"..+..++++++...+++.++....++....++.++.++...+.....++++..+..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++..++++++.++++++..++++++.+++..+++++++++.+++++++++..++++++.........++++..+++++++++.+++++++++..++++++++++..+++++++..", +"..+..++++++...+++.++....++....++.++.++...+.....++++..+..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++..++++++.++++++..++++++.+++..+++++++++.+++++++++..++++++.........++++..+++++++++.+++++++++..++++++++++..+++++++..", +"..+++...+++.++.++.+++..++++..+++.++.++.++.++.++++++..+..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++..++++++.+++++.+++++...++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++.+++++++++..++++++++++..+++++++..", +"..++++++.++.++.++.+++..++++..+++.++.++.++.++.++++++..+..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++..++++++.+++..+++++++++.+++..+++++++++++++++++++..++++++.........++++..+++++++++.+++++++++..++++++++++..+++++++..", +"..++++++.++.++.++.+++..++++..+++.++.++.++.++.++++++..+..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++..++++++.+++..+++++++++.+++..+++++++++++++++++++..++++++.........++++..+++++++++.+++++++++..++++++++++..+++++++..", +"..++++++.++.++.++.+++..++++..+++.++.++.++.++.++++++..+..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++..++++++.++.+++++++++++.+++..+++++++++++++++++++..+++++++++++++++++++..++++++++++..+++++++..+++++++++.+++++++++..", +"..+.....+++.++.++.+++..++++++.++.++.++.++.+++..++++..+..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++..++++++.++.++++++..+++.+++..+++++++++++++++++++..+++++++++++++++++++..++++++++++..+++++++..+++++++++.+++++++++..", +"..+.....+++.++.++.+++..++++++.++.++.++.++.+++..++++..+..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++..++++++.++.++++++..+++.+++..+++++++++++++++++++..+++++++++++++++++++..++++++++++..+++++++..+++++++++.+++++++++..", +"..++++++++++++++++++++++++++++++.+++++++++++++++++++++..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++..++++++.++......+++...++++..+++++++++++++++++++..+++++++++++++++++++..++++++++++..+++++++..+++++++++.+++++++++..", +"..++++++++++++++++++++++++++++++.+++++++++++++++++++++..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++..+++++++++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..", +"..++++++++++++++++++++++++++++++.+++++++++++++++++++++..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++..+++++++++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..", +"..++++++++++++++++++++++++++++++.+++++++++++++++++++++..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++..+++++++++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..", +".................................................................................................................................................................................................................................................", +"................................................................................................................................................................................................................................................."}; +/* XPM */ +static char * keyshft_xpm[] = { +"241 92 3 1", +" c None", +". c #000000", +"+ c #FFFFFF", +".................................................................................................................................................................................................................................................", +".................................................................................................................................................................................................................................................", +"..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.+++++++++++++++++++++++++++..", +"..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.+++++++++++++++++++++++++++..", +"..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.+++++++++++++++++++++++++++..", +"..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.+++++++++++++++++++++++++++..", +"..+++++++.....+++++++..++++..+++.+++..++++..+++++++......++++++..+++++++......++++++..++++++.......++++++..++++++.+++++.+++++++.++++++..++++..++++++.+++++++++..+++++++++.++++++++....++++++++.++++++++......++++++.+++++++++++++++++++++++++++..", +"..+++++++.....+++++++..++++..+++.+++..++++..+++++++......++++++..+++++++......++++++..++++++.......++++++..++++++.+++++.+++++++.++++++..++++..++++++.+++++++++..+++++++++.++++++++....++++++++.++++++++......++++++.+++++++++++++++++++++++++++..", +"..++++++.+++++.++++++..++++..+++.+++..++++..+++++++..++++++++++..+++++++..++++..++++..+++++++++.+++++++++..++++++.+++++.+++++++.++++++..++++..++++++.+++++++++..+++++++++.++++++..++++..++++++.++++++++.+++++.+++++.+++++++++..++++++++++++++++..", +"..++++++.+++++.++++++..++++..+++.+++..++++..+++++++..++++++++++..+++++++..++++..++++..+++++++++.+++++++++..++++++.+++++.+++++++.++++++..++++..++++++.+++++++++..+++++++++.++++++..++++..++++++.++++++++.+++++.+++++.++++++++...++++++++++++++++..", +"..++++++.+++++.++++++..++++..+++.+++..++++..+++++++..++++++++++..+++++++..++++..++++..+++++++++.+++++++++..++++++.+++++.+++++++.++++++..++++..++++++.+++++++++..+++++++++.++++++..++++..++++++.++++++++.+++++.+++++.++++++++...++++++++++++++++..", +"..++++++.+++++.++++++..++++..+++.+++..++++..+++++++..++++++++++..+++++++..++++..++++..+++++++++.+++++++++..+++++++..+..++++++++.++++++..++++..++++++.+++++++++..+++++++++.++++++..++++..++++++.++++++++.+++++.+++++.++++++.....++++++++++++++++..", +"..++++++...+++.++++++..++++..+..+..+..++++..+++++++......++++++..+++++++......++++++..+++++++++.+++++++++..+++++++++.++++++++++.++++++..++++..++++++.+++++++++..+++++++++.++++++..++++..++++++.++++++++......++++++.+++++..................++++..", +"..++++++...+++.++++++..++++..+..+..+..++++..+++++++......++++++..+++++++......++++++..+++++++++.+++++++++..+++++++++.++++++++++.++++++..++++..++++++.+++++++++..+++++++++.++++++..++++..++++++.++++++++......++++++.+++++..................++++..", +"..++++++.++.++.++++++..++++..+..+..+..++++..+++++++..++++++++++..+++++++..++++..++++..+++++++++.+++++++++..+++++++++.++++++++++.++++++..++++..++++++.+++++++++..+++++++++.++++++..++++..++++++.++++++++.+++++++++++.++++++.....++++++++++++++++..", +"..++++++.+++...++++++..++++..+..+..+..++++..+++++++..++++++++++..+++++++..++++..++++..+++++++++.+++++++++..+++++++++.++++++++++.++++++..++++..++++++.+++++++++..+++++++++.++++++..++++..++++++.++++++++.+++++++++++.++++++++...++++++++++++++++..", +"..++++++.+++...++++++..++++..+..+..+..++++..+++++++..++++++++++..+++++++..++++..++++..+++++++++.+++++++++..+++++++++.++++++++++.++++++..++++..++++++.+++++++++..+++++++++.++++++..++++..++++++.++++++++.+++++++++++.++++++++...++++++++++++++++..", +"..++++++.+++++.++++++..++++++.+++++.++++++..+++++++..++++++++++..+++++++..++++..++++..+++++++++.+++++++++..+++++++++.++++++++++.++++++..++++..++++++.+++++++++..+++++++++.++++++..++++..++++++.++++++++.+++++++++++.+++++++++..++++++++++++++++..", +"..+++++++.....+..++++..++++++.+++++.++++++..+++++++......++++++..+++++++..++++..++++..+++++++++.+++++++++..+++++++++.++++++++++.++++++++....++++++++.+++++++++..+++++++++.++++++++....++++++++.++++++++.+++++++++++.+++++++++++++++++++++++++++..", +"..+++++++.....+..++++..++++++.+++++.++++++..+++++++......++++++..+++++++..++++..++++..+++++++++.+++++++++..+++++++++.++++++++++.++++++++....++++++++.+++++++++..+++++++++.++++++++....++++++++.++++++++.+++++++++++.+++++++++++++++++++++++++++..", +"..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.+++++++++++++++++++++++++++..", +"..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.+++++++++++++++++++++++++++..", +"..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.+++++++++++++++++++++++++++..", +".................................................................................................................................................................................................................................................", +"..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.+++++++++++++++++++++++++++..", +"..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.+++++++++++++++++++++++++++..", +"..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.+++++++++++++++++++++++++++..", +"..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.+++++++++++++++++++++++++++..", +"..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.+++++++++++++++++++++++++++..", +"..+++++++.....+++++++..+++++++......++++++..++++++......+++++++..+++++++......++++++..+++++++.....+++++++..++++++.+++++.+++++++.++++++........++++++.++++++..++++..++++++.++++++..++++++++++++.++++++++++++++++++++.+++++++++++++++++++++++++++..", +"..++++++.+++++.++++++..++++++.++++++++++++..++++++.+++++.++++++..+++++++..++++++++++..++++++.++++++++++++..++++++.+++++.+++++++.+++++++++++.++++++++.++++++..++++..++++++.++++++..++++++++++++.++++++++++++++++++++.+++++++++..++++++++++..++++..", +"..++++++.+++++.++++++..++++++.++++++++++++..++++++.+++++.++++++..+++++++..++++++++++..++++++.++++++++++++..++++++.+++++.+++++++.+++++++++++.++++++++.++++++..++++..++++++.++++++..++++++++++++.++++++++++++++++++++.+++++++++..++++++++++..++++..", +"..++++++.+++++.++++++..++++++.++++++++++++..++++++.+++++.++++++..+++++++..++++++++++..++++++.++++++++++++..++++++.+++++.+++++++.+++++++++++.++++++++.++++++..+++.++++++++.++++++..++++++++++++.++++++++++++++++++++.++++++++...++++++++++..++++..", +"..++++++.+++++.++++++..++++++.++++++++++++..++++++.+++++.++++++..+++++++..++++++++++..++++++.++++++++++++..++++++.+++++.+++++++.+++++++++++.++++++++.++++++..+..+++++++++.++++++..++++++++++++.++++++++++++++++++++.++++++.....++++++++++..++++..", +"..++++++.+++++.++++++..++++++.++++++++++++..++++++.+++++.++++++..+++++++..++++++++++..++++++.++++++++++++..++++++.+++++.+++++++.+++++++++++.++++++++.++++++..+..+++++++++.++++++..++++++++++++.++++++++++++++++++++.++++++.....++++++++++..++++..", +"..++++++.+++++.++++++..+++++++.....+++++++..++++++.+++++.++++++..+++++++......++++++..++++++.++....++++++..++++++.......+++++++.+++++++++++.++++++++.++++++...+++++++++++.++++++..++++++++++++.++++++++++++++++++++.+++++..................++++..", +"..++++++.......++++++..++++++++++++.++++++..++++++.+++++.++++++..+++++++..++++++++++..++++++.+++++.++++++..++++++.+++++.+++++++.+++++++++++.++++++++.++++++..+..+++++++++.++++++..++++++++++++.++++++++++++++++++++.++++++.....++++++++++++++++..", +"..++++++.......++++++..++++++++++++.++++++..++++++.+++++.++++++..+++++++..++++++++++..++++++.+++++.++++++..++++++.+++++.+++++++.+++++++++++.++++++++.++++++..+..+++++++++.++++++..++++++++++++.++++++++++++++++++++.++++++.....++++++++++++++++..", +"..++++++.+++++.++++++..++++++++++++.++++++..++++++.+++++.++++++..+++++++..++++++++++..++++++.+++++.++++++..++++++.+++++.+++++++.+++++++++++.++++++++.++++++..+++.++++++++.++++++..++++++++++++.++++++++++++++++++++.++++++++...++++++++++++++++..", +"..++++++.+++++.++++++..++++++++++++.++++++..++++++.+++++.++++++..+++++++..++++++++++..++++++.+++++.++++++..++++++.+++++.+++++++.++++++..+++.++++++++.++++++..++++..++++++.++++++..++++++++++++.++++++++++++++++++++.+++++++++..++++++++++++++++..", +"..++++++.+++++.++++++..++++++++++++.++++++..++++++.+++++.++++++..+++++++..++++++++++..++++++.+++++.++++++..++++++.+++++.+++++++.++++++..+++.++++++++.++++++..++++..++++++.++++++..++++++++++++.++++++++++++++++++++.+++++++++..++++++++++++++++..", +"..++++++.+++++.++++++..++++++......+++++++..++++++......+++++++..+++++++..++++++++++..+++++++.....+++++++..++++++.+++++.+++++++.++++++++...+++++++++.++++++..++++..++++++.++++++........++++++.+++++..........+++++.+++++++++++++++++++++++++++..", +"..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.+++++++++++++++++++++++++++..", +"..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.+++++++++++++++++++++++++++..", +"..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.+++++++++++++++++++++++++++..", +".................................................................................................................................................................................................................................................", +".................................................................................................................................................................................................................................................", +"..+++++++++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..", +"..+++++++++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..", +"..+++++++++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..", +"..+++++++++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..", +"..+++++++++++++++++++++++++++.++++++........++++++.++++++..++++..++++++.++++++++....++++++++.++++++..++++..++++++.++++++.......+++++++..++++++.++++++..++++..++++..+++++++..++++..++++++++++++.++++++..+++++++..++++++++++..+++++++++++++++++++..", +"..+++++++++++++++++++++++++++.++++++........++++++.++++++..++++..++++++.++++++++....++++++++.++++++..++++..++++++.++++++.......+++++++..++++++.++++++..++++..++++..+++++++..++++..++++++++++++.++++++..+++++++..++++++++++..+++++++++++++++++++..", +"..+++...+++.+++++++++..++++++.++++++++++++..++++++.++++++..++++..++++++.++++++..++++..++++++.++++++..++++..++++++.++++++..+++++.++++++..++++++...++++..++++..++++...+++++...++++..++++++++++..+++++++..+++++++++.+++++++++..+++++++++++++++++++..", +"..+..+++.++.+++++++++..++++++.++++++++++++..++++++.++++++..++++..++++++.++++++..++++++++++++.++++++..++++..++++++.++++++..+++++.++++++..++++++...++++..++++..++++..+..+..+..++++..+++++++++.+++++++++..++++++++++..+++++++..+++++++++...+++++++..", +"..+..+++.++.+++++++++..++++++.++++++++++++..++++++.++++++..++++..++++++.++++++..++++++++++++.++++++..++++..++++++.++++++..+++++.++++++..++++++...++++..++++..++++..+..+..+..++++..+++++++++.+++++++++..++++++++++..+++++++..+++++++++...+++++++..", +"..+..++++.....+..+..+..++++++.+++++++++++.++++++++.++++++++.++.++++++++.++++++..++++++++++++.++++++++.++.++++++++.++++++..+++++.++++++..++++++.++.+++..++++..++++..+++.+++..++++..+++++++..++++++++++..++++++++++++.++++++..+++++++++...+++++++..", +"..+..++++++.+++...+++..++++++.+++++++++..+++++++++.+++++++++..+++++++++.++++++..++++++++++++.++++++++.++.++++++++.++++++.......+++++++..++++++.++.+++..++++..++++..+++++++..++++..++++++.++++++++++++..+++++++++++++..++++..+++++++++++++++++++..", +"..+..++++++.+++...+++..++++++.+++++++++..+++++++++.+++++++++..+++++++++.++++++..++++++++++++.++++++++.++.++++++++.++++++.......+++++++..++++++.++.+++..++++..++++..+++++++..++++..++++++.++++++++++++..+++++++++++++..++++..+++++++++++++++++++..", +"..+..++++++.+++..++++..++++++.++++++++.+++++++++++.++++++++.++.++++++++.++++++..++++++++++++.++++++++.++.++++++++.++++++..+++++.++++++..++++++.+++..+..++++..++++..+++++++..++++..+++++++..++++++++++..++++++++++++.++++++..+++++++++...+++++++..", +"..+..+++.++.+++..++++..++++++.++++++..++++++++++++.++++++..++++..++++++.++++++..++++++++++++.+++++++++..+++++++++.++++++..+++++.++++++..++++++.+++..+..++++..++++..+++++++..++++..+++++++++.+++++++++..++++++++++..+++++++..+++++++++...+++++++..", +"..+..+++.++.+++..++++..++++++.++++++..++++++++++++.++++++..++++..++++++.++++++..++++++++++++.+++++++++..+++++++++.++++++..+++++.++++++..++++++.+++..+..++++..++++..+++++++..++++..+++++++++.+++++++++..++++++++++..+++++++..+++++++++...+++++++..", +"..+++...++++..+..++++..++++++.++++++..++++++++++++.++++++..++++..++++++.++++++..++++..++++++.+++++++++..+++++++++.++++++..+++++.++++++..++++++.+++++...++++..++++..+++++++..++++..++++++++++..+++++++..+++++++++.+++++++++..+++++++++++++++++++..", +"..+++++++++++++++++++++++++++.++++++........++++++.++++++..++++..++++++.++++++++....++++++++.+++++++++..+++++++++.++++++.......+++++++..++++++.+++++...++++..++++..+++++++..++++..++++++++++++.++++++..+++++++..++++++++++..+++++++++++++++++++..", +"..+++++++++++++++++++++++++++.++++++........++++++.++++++..++++..++++++.++++++++....++++++++.+++++++++..+++++++++.++++++.......+++++++..++++++.+++++...++++..++++..+++++++..++++..++++++++++++.++++++..+++++++..++++++++++..+++++++++++++++++++..", +"..+++++++++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..", +"..+++++++++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..", +"..+++++++++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..", +".................................................................................................................................................................................................................................................", +".................................+++++++++++++++++++++..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++..+++++++++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..", +".................................+++++++++++++++++++++..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++..+++++++++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..", +".................................+++++++++++++++++++++..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++..+++++++++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..", +".................................+++++++++++++++++++++..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++..+++++++++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..", +".................................+++++++++++++++++++++..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++..+++++++++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..", +"...........................++....+++++++++++++++..++++..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++..++++...+++...+++++...++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++.+++++++++..+++++++.....+++++++..", +".....++++..+.....+.....+...++....++.++++++++.+++..+..+..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++..++++++.++.+++..+..+++.+++..+++++++..+..+++++++..+++++++++.+++++++++..+++++++++.+++++++++..++++++.+++++.++++++..", +".....++++..+.....+.....+...++....++.++++++++.+++..+..+..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++..++++++.++.+++..+..+++.+++..+++++++..+..+++++++..+++++++++.+++++++++..+++++++++.+++++++++..++++++.+++++.++++++..", +"...++......+.........++....++....++.++++++++.+++..+..+..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++..++++++.++++++..++++++.+++..+++++++..+..+++++++..+++++++++.+++++++++..+++++++++.+++++++++..++++++++++++.++++++..", +"...++......+++...+..++++..++++...++.++...+.....++++..+..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++..++++++.++++++..++++++.+++..+++++++..+..+++++++..+++++++++.+++++++++..+++++++++.+++++++++..++++++++++++.++++++..", +"...++......+++...+..++++..++++...++.++...+.....++++..+..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++..++++++.++++++..++++++.+++..+++++++..+..+++++++..+++++++++.+++++++++..+++++++++.+++++++++..++++++++++++.++++++..", +".....+++...+..+..+...++....++....++.++.++.++.++++++..+..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++..++++++.+++++.+++++...++++..+++++++++++++++++++..++++...........++++..+++++++++.+++++++++..++++++++++..+++++++..", +"........+..+..+..+...++....++....++.++.++.++.++++++..+..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++..++++++.+++..+++++++++.+++..+++++++++++++++++++..+++++++++.+++++++++..+++++++++.+++++++++..+++++++++.+++++++++..", +"........+..+..+..+...++....++....++.++.++.++.++++++..+..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++..++++++.+++..+++++++++.+++..+++++++++++++++++++..+++++++++.+++++++++..+++++++++.+++++++++..+++++++++.+++++++++..", +"........+..+..+..+...++....++....++.++.++.++.++++++..+..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++..++++++.++.+++++++++++.+++..+++++++++++++++++++..+++++++++.+++++++++..+++++++++.+++++++++..+++++++++.+++++++++..", +"...+++++...+..+..+...++......+...++.++.++.+++..++++..+..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++..++++++.++.++++++..+++.+++..+++++++++++++++++++..+++++++++.+++++++++..+++++++++.+++++++++..+++++++++++++++++++..", +"...+++++...+..+..+...++......+...++.++.++.+++..++++..+..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++..++++++.++.++++++..+++.+++..+++++++++++++++++++..+++++++++.+++++++++..+++++++++.+++++++++..+++++++++++++++++++..", +".................................+++++++++++++++++++++..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++..++++++.++......+++...++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++.+++++++++..+++++++++.+++++++++..", +".................................+++++++++++++++++++++..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++..+++++++++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..", +".................................+++++++++++++++++++++..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++..+++++++++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..", +".................................+++++++++++++++++++++..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++..+++++++++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..", +".................................................................................................................................................................................................................................................", +"................................................................................................................................................................................................................................................."}; +/* XPM */ +static char * keyctrl_xpm[] = { +"241 92 3 1", +" c None", +". c #000000", +"+ c #FFFFFF", +".................................................................................................................................................................................................................................................", +".................................................................................................................................................................................................................................................", +"..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.+++++++++++++++++++++++++++..", +"..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.+++++++++++++++++++++++++++..", +"..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.+++++++++++++++++++++++++++..", +"..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.+++++++++++++++++++++++++++..", +"..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++.+++++++++..++++++++++++++++++++.++++++++++++++++++++.+++++++++..+++++++++.++++++++++++++++++++.++++++++++++++++++++.++......+++......+++....+++..", +"..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++.+++++++++..++++++++++++++++++++.++++++++++++++++++++.+++++++++..+++++++++.++++++++++++++++++++.++++++++++++++++++++.++......+++......+++....+++..", +"..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++.+++++++++..++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++.++++++..+++++++..++++..+..", +"..+++++++.....+++++++..++++++.+++++.++++++..+++++++++...+++++++..+++++++..+..+++++++..+++++++......++++++..+++++++..+++.+++++++.++++++++.+++..++++++.+++++++++..+++++++++.+++++++++...++++++++.++++++++....++++++++.++.++++++..+++++++..+++++++..", +"..+++++++.....+++++++..++++++.+++++.++++++..+++++++++...+++++++..+++++++..+..+++++++..+++++++......++++++..+++++++..+++.+++++++.++++++++.+++..++++++.+++++++++..+++++++++.+++++++++...++++++++.++++++++....++++++++.++.++++++..+++++++..+++++++..", +"..++++++.+++..+++++++..++++++.+++++.++++++..+++++++..+++.++++++..+++++++...+++++++++..+++++++++.+++++++++..+++++++..+++.+++++++.++++++++.+++..++++++.+++++++++..+++++++++.++++++++.+++..++++++.++++++++.+++..++++++.++.++++++..+++++++..+++++++..", +"..++++++.+++..+++++++..++++++.++.++.++++++..+++++++..+++.++++++..+++++++..++++++++++..+++++++++.+++++++++..+++++++..+++.+++++++.++++++++.+++..++++++.+++++++++..+++++++++.++++++++.+++..++++++.++++++++.+++..++++++.++......+++....+++..+++++++..", +"..++++++.+++..+++++++..++++++.++.++.++++++..+++++++..+++.++++++..+++++++..++++++++++..+++++++++.+++++++++..+++++++..+++.+++++++.++++++++.+++..++++++.+++++++++..+++++++++.++++++++.+++..++++++.++++++++.+++..++++++.++......+++....+++..+++++++..", +"..++++++.+++..+++++++..++++++.++.++.++++++..+++++++......++++++..+++++++..++++++++++..+++++++++.+++++++++..+++++++..+++.+++++++.++++++++.+++..++++++.+++++++++..+++++++++.++++++++.+++..++++++.++++++++.+++..++++++.++.++++++++++++..+..+++++++..", +"..+++++++.....+++++++..+++++++..+..+++++++..+++++++..++++++++++..+++++++..++++++++++..+++++++++.++.++++++..+++++++++....+++++++.++++++++.+++..++++++.+++++++++..+++++++++.++++++++.+++..++++++.++++++++....++++++++.++.++++++++++++..+..+++++++..", +"..+++++++.....+++++++..+++++++..+..+++++++..+++++++..++++++++++..+++++++..++++++++++..+++++++++.++.++++++..+++++++++....+++++++.++++++++.+++..++++++.+++++++++..+++++++++.++++++++.+++..++++++.++++++++....++++++++.++.++++++++++++..+..+++++++..", +"..++++++++++..+++++++..+++++++..+..+++++++..+++++++++....++++++..+++++++..++++++++++..++++++++++..+++++++..++++++++++++.+++++++.+++++++++...++++++++.+++++++++..+++++++++.+++++++++...++++++++.++++++++.+++++++++++.++.++++++++++++..+..++++..+..", +"..++++++++++..+++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++...++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++.+++++++++++.++......+......+++++....+++..", +"..++++++++++..+++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++...++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++.+++++++++++.++......+......+++++....+++..", +"..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.+++++++++++++++++++++++++++..", +"..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.+++++++++++++++++++++++++++..", +"..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.+++++++++++++++++++++++++++..", +".................................................................................................................................................................................................................................................", +"..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.+++++++++++++++++++++++++++..", +"..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.+++++++++++++++++++++++++++..", +"..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.+++++++++++++++++++++++++++..", +"..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.+++++++++++++++++++++++++++..", +"..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.+++++++++++++++++++++++++++..", +"..+++++++++++++++++++..+++++++++++++++++++..++++++++++++.++++++..++++++++++..+++++++..+++++++++++++++++++..+++++++..+++++++++++.++++++++++++..++++++.++++++++.+++++++++++.+++++++++..+++++++++.++++++++++++++++++++.+++++++++++++++++++++++++++..", +"..+++++++++++++++++++..+++++++++++++++++++..++++++++++++.++++++..+++++++++.++.++++++..+++++++++++++++++++..+++++++..+++++++++++.++++++++++++++++++++.++++++++.+++++++++++.+++++++++..+++++++++.++++++++++++++++++++.+++++++++..++++++++++..++++..", +"..+++++++++++++++++++..+++++++++++++++++++..++++++++++++.++++++..+++++++++.++.++++++..+++++++++++++++++++..+++++++..+++++++++++.++++++++++++++++++++.++++++++.+++++++++++.+++++++++..+++++++++.++++++++++++++++++++.+++++++++..++++++++++..++++..", +"..+++++++...+++++++++..+++++++++...+++++++..+++++++++....++++++..+++++++++.+++++++++..+++++++++...+++++++..+++++++.....++++++++.++++++++++++..++++++.++++++++.+++..++++++.+++++++++..+++++++++.++++++++++++++++++++.++++++++...++++++++++..++++..", +"..++++++++++..+++++++..+++++++..+++.++++++..+++++++..+++.++++++..+++++++......++++++..+++++++..+++.++++++..+++++++..+++.+++++++.++++++++++++..++++++.++++++++.+++..++++++.+++++++++..+++++++++.++++++++++++++++++++.++++++.....++++++++++..++++..", +"..++++++++++..+++++++..+++++++..+++.++++++..+++++++..+++.++++++..+++++++......++++++..+++++++..+++.++++++..+++++++..+++.+++++++.++++++++++++..++++++.++++++++.+++..++++++.+++++++++..+++++++++.++++++++++++++++++++.++++++.....++++++++++..++++..", +"..+++++++.....+++++++..+++++++++.+++++++++..+++++++..+++.++++++..+++++++++.+++++++++..+++++++..+++.++++++..+++++++..+++.+++++++.++++++++++++..++++++.++++++++.++.++++++++.+++++++++..+++++++++.++++++++++++++++++++.+++++..................++++..", +"..++++++.+++..+++++++..++++++++++..+++++++..+++++++..+++.++++++..+++++++++.+++++++++..+++++++..+++.++++++..+++++++..+++.+++++++.++++++++++++..++++++.++++++++...+++++++++.+++++++++..+++++++++.++++++++++++++++++++.++++++.....++++++++++++++++..", +"..++++++.+++..+++++++..++++++++++..+++++++..+++++++..+++.++++++..+++++++++.+++++++++..+++++++..+++.++++++..+++++++..+++.+++++++.++++++++++++..++++++.++++++++...+++++++++.+++++++++..+++++++++.++++++++++++++++++++.++++++.....++++++++++++++++..", +"..++++++.+++..+++++++..+++++++..+++.++++++..+++++++..+++.++++++..+++++++++.+++++++++..+++++++++....++++++..+++++++..+++.+++++++.++++++++++++..++++++.++++++++.++.++++++++.+++++++++..+++++++++.++++++++++++++++++++.++++++++...++++++++++++++++..", +"..+++++++.....+++++++..+++++++++...+++++++..+++++++++....++++++..+++++++++.+++++++++..++++++++++++.++++++..+++++++..+++.+++++++.+++++++++..+..++++++.++++++++.+++..++++++.+++++++++..+++++++++.++++++++++++++++++++.+++++++++..++++++++++++++++..", +"..+++++++.....+++++++..+++++++++...+++++++..+++++++++....++++++..+++++++++.+++++++++..++++++++++++.++++++..+++++++..+++.+++++++.+++++++++..+..++++++.++++++++.+++..++++++.+++++++++..+++++++++.++++++++++++++++++++.+++++++++..++++++++++++++++..", +"..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++.....+++++++..++++++++++++++++++++.+++++++++++.++++++++.++++++++++++++++++++.++++++++++++++++++++.+++++..........+++++.+++++++++++++++++++++++++++..", +"..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.+++++++++++++++++++++++++++..", +"..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.+++++++++++++++++++++++++++..", +"..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.+++++++++++++++++++++++++++..", +".................................................................................................................................................................................................................................................", +".................................................................................................................................................................................................................................................", +"..............................++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..", +"..............................++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..", +"..............................++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..", +"..............................++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++..++++++++++..++++++....+++++++++..+++++++++++++++++++..", +"..............................++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++..++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++..++++++++++..+++++++++.+++++++++..+++++++++++++++++++..", +"..............................++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++..++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++..++++++++++..+++++++++.+++++++++..+++++++++++++++++++..", +".....+++...+.........++.......++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++..++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++..++++++++++..+++++++++.+++++++++..+++++++++.+++++++++..", +"...++...+..+.........++.......++++++++......++++++.++++++..++++..++++++.+++++++++.....++++++.++++++..++++..++++++.++++++++.....+++++++..+++++++.....+++++++..+++++++......++++++..+++++++++.+++++++++..+++++++++.+++++++++..+++++++..+..+++++++..", +"...++...+..+.........++.......++++++++......++++++.++++++..++++..++++++.+++++++++.....++++++.++++++..++++..++++++.++++++++.....+++++++..+++++++.....+++++++..+++++++......++++++..+++++++++.+++++++++..+++++++++.+++++++++..+++++++..+..+++++++..", +"...++....+++++.++.++.++.......++++++++++++..++++++.++++++++.++.++++++++.++++++++.+++++++++++.++++++..++++..++++++.++++++++..+++.++++++..+++++++..+++.++++++..+++++++..+..+..++++..+++++++++.+++++++++..+++++++++.+++++++++..++++++.+++++.++++++..", +"...++......+...+++...++.......+++++++++++.++++++++.+++++++++..+++++++++.++++++++.+++++++++++.++++++++.++.++++++++.++++++++..+++.++++++..+++++++..+++.++++++..+++++++..+..+..++++..+++++++++.+++++++++..+++++++++.+++++++++..++++..+++++++..++++..", +"...++......+...+++...++.......+++++++++++.++++++++.+++++++++..+++++++++.++++++++.+++++++++++.++++++++.++.++++++++.++++++++..+++.++++++..+++++++..+++.++++++..+++++++..+..+..++++..+++++++++.+++++++++..+++++++++.+++++++++..++++..+++++++..++++..", +"...++......+...++....++.......+++++++++..+++++++++.+++++++++..+++++++++.++++++++.+++++++++++.++++++++.++.++++++++.++++++++..+++.++++++..+++++++..+++.++++++..+++++++..+..+..++++..++++++++++..+++++++..+++++++++.+++++++++..+++.+++++++++++.+++..", +"...++...+..+...++....++.......++++++++.+++++++++++.++++++++.++.++++++++.++++++++.+++++++++++.+++++++++..+++++++++.++++++++..+++.++++++..+++++++..+++.++++++..+++++++..+..+..++++..++++++++++..+++++++..+++++++++.+++++++++..+++++++++++++++++++..", +"...++...+..+...++....++.......++++++++.+++++++++++.++++++++.++.++++++++.++++++++.+++++++++++.+++++++++..+++++++++.++++++++..+++.++++++..+++++++..+++.++++++..+++++++..+..+..++++..++++++++++..+++++++..+++++++++.+++++++++..+++++++++++++++++++..", +".....+++....++.++....++.......++++++++......++++++.++++++..++++..++++++.+++++++++.....++++++.+++++++++..+++++++++.++++++++.....+++++++..+++++++..+++.++++++..+++++++..+..+..++++..++++++++++..+++++++..++++++....+++++++++..+++++++++++++++++++..", +"..............................++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..", +"..............................++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..", +"..............................++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..", +"..............................++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..", +"..............................++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..", +".................................................................................................................................................................................................................................................", +"..++++++++++++++++++++++++++++++.+++++++++++++++++++++..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++..+++++++++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..", +"..++++++++++++++++++++++++++++++.+++++++++++++++++++++..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++..+++++++++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..", +"..++++++++++++++++++++++++++++++.+++++++++++++++++++++..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++..+++++++++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..", +"..++++++++++++++++++++++++++++++.+++++++++++++++++++++..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++..+++++++++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+...+++++++++++++++..", +"..++++++++++++++++++++++++++++++.+++++++++++++++++++++..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++..+++++++++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+...+++++++++++++++..", +"..++++++++++++++++++++++++++++++.+++++++++++++++..++++..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++..++++...+++...+++++...++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+..+..+++++++++++++..", +"..+++....++.+++++.+++++.+++..+++.++.++++++++.+++..+..+..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++..++++++.++.+++..+..+++.+++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+..+..+++++++++++++..", +"..+++....++.+++++.+++++.+++..+++.++.++++++++.+++..+..+..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++..++++++.++.+++..+..+++.+++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+..+..+++++++++++++..", +"..+..++++++.+++++++++..++++..+++.++.++++++++.+++..+..+..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++..++++++.++++++..++++++.+++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+..+..+.....+++++++..", +"..+..++++++...+++.++....++....++.++.++...+.....++++..+..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++..++++++.++++++..++++++.+++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+...+++..++++++++++..", +"..+..++++++...+++.++....++....++.++.++...+.....++++..+..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++..++++++.++++++..++++++.+++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+...+++..++++++++++..", +"..+++...+++.++.++.+++..++++..+++.++.++.++.++.++++++..+..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++..++++++.+++++.+++++...++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++.....+++++++..", +"..++++++.++.++.++.+++..++++..+++.++.++.++.++.++++++..+..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++..++++++.+++..+++++++++.+++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++..++++..++++..", +"..++++++.++.++.++.+++..++++..+++.++.++.++.++.++++++..+..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++..++++++.+++..+++++++++.+++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++..++++..++++..", +"..++++++.++.++.++.+++..++++..+++.++.++.++.++.++++++..+..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++..++++++.++.+++++++++++.+++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++.....+..++++..", +"..+.....+++.++.++.+++..++++++.++.++.++.++.+++..++++..+..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++..++++++.++.++++++..+++.+++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++..++++..", +"..+.....+++.++.++.+++..++++++.++.++.++.++.+++..++++..+..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++..++++++.++.++++++..+++.+++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++..++++..", +"..++++++++++++++++++++++++++++++.+++++++++++++++++++++..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++..++++++.++......+++...++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++..++++..", +"..++++++++++++++++++++++++++++++.+++++++++++++++++++++..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++..+++++++++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++.....+..", +"..++++++++++++++++++++++++++++++.+++++++++++++++++++++..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++..+++++++++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++.....+..", +"..++++++++++++++++++++++++++++++.+++++++++++++++++++++..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++..+++++++++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..", +".................................................................................................................................................................................................................................................", +"................................................................................................................................................................................................................................................."}; +/* XPM */ +static char * keynum_xpm[] = { +"241 92 3 1", +" c None", +". c #000000", +"+ c #FFFFFF", +".................................................................................................................................................................................................................................................", +".................................................................................................................................................................................................................................................", +"..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.+++++++++++++++++++++++++++..", +"..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.+++++++++++++++++++++++++++..", +"..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.+++++++++++++++++++++++++++..", +"..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.+++++++++++++++++++++++++++..", +"..+++++++...+++++++++..+++++++.....+++++++..+++++++.....+++++++..++++++++++++.++++++..++++++......+++++++..+++++++.....++++++++.++++++++......++++++.++++++++....++++++++.++++++++....++++++++.++++++++....++++++++.+++++++++++++++++++++++++++..", +"..+++++++...+++++++++..+++++++.....+++++++..+++++++.....+++++++..++++++++++++.++++++..++++++......+++++++..+++++++.....++++++++.++++++++......++++++.++++++++....++++++++.++++++++....++++++++.++++++++....++++++++.+++++++++++++++++++++++++++..", +"..+++++++++.+++++++++..++++++.+++++.++++++..++++++.+++++.++++++..++++++++++...++++++..++++++.++++++++++++..++++++.+++++++++++++.++++++++++++..++++++.++++++..++++..++++++.++++++..++++..++++++.++++++..++++..++++++.+++++++++..++++++++++++++++..", +"..+++++++++.+++++++++..++++++++++++.++++++..++++++++++++.++++++..+++++++++.++.++++++..++++++.++++++++++++..++++++.+++++++++++++.++++++++++++..++++++.++++++..++++..++++++.++++++..++++..++++++.++++++..++++..++++++.++++++++...++++++++++++++++..", +"..+++++++++.+++++++++..++++++++++++.++++++..++++++++++++.++++++..+++++++++.++.++++++..++++++.++++++++++++..++++++.+++++++++++++.++++++++++++..++++++.++++++..++++..++++++.++++++..++++..++++++.++++++..++++..++++++.++++++++...++++++++++++++++..", +"..+++++++++.+++++++++..++++++++++..+++++++..++++++++++++.++++++..+++++++..+++.++++++..++++++.++++++++++++..++++++.+++++++++++++.+++++++++++.++++++++.++++++..++++..++++++.++++++..++++..++++++.++++++..++++..++++++.++++++.....++++++++++++++++..", +"..+++++++++.+++++++++..+++++++++.+++++++++..+++++++.....+++++++..++++++.+++++.++++++..++++++......+++++++..++++++......++++++++.+++++++++++.++++++++.++++++++....++++++++.++++++++....++++++++.++++++..++++..++++++.+++++..................++++..", +"..+++++++++.+++++++++..+++++++++.+++++++++..+++++++.....+++++++..++++++.+++++.++++++..++++++......+++++++..++++++......++++++++.+++++++++++.++++++++.++++++++....++++++++.++++++++....++++++++.++++++..++++..++++++.+++++..................++++..", +"..+++++++++.+++++++++..+++++++..++++++++++..++++++++++++.++++++..++++++.........++++..++++++++++++.++++++..++++++.+++++.+++++++.+++++++++++.++++++++.++++++..++++..++++++.++++++++++++..++++++.++++++..++++..++++++.++++++.....++++++++++++++++..", +"..+++++++++.+++++++++..++++++.++++++++++++..++++++++++++.++++++..++++++++++++.++++++..++++++++++++.++++++..++++++.+++++.+++++++.+++++++++..+++++++++.++++++..++++..++++++.++++++++++++..++++++.++++++..++++..++++++.++++++++...++++++++++++++++..", +"..+++++++++.+++++++++..++++++.++++++++++++..++++++++++++.++++++..++++++++++++.++++++..++++++++++++.++++++..++++++.+++++.+++++++.+++++++++..+++++++++.++++++..++++..++++++.++++++++++++..++++++.++++++..++++..++++++.++++++++...++++++++++++++++..", +"..+++++++++.+++++++++..++++++.++++++++++++..++++++.+++++.++++++..++++++++++++.++++++..++++++++++++.++++++..++++++.+++++.+++++++.+++++++++..+++++++++.++++++..++++..++++++.++++++++++++..++++++.++++++..++++..++++++.+++++++++..++++++++++++++++..", +"..+++++++++.+++++++++..++++++.......++++++..+++++++.....+++++++..++++++++++++.++++++..++++++......+++++++..+++++++.....++++++++.+++++++++..+++++++++.++++++++....++++++++.++++++++....++++++++.++++++++....++++++++.+++++++++++++++++++++++++++..", +"..+++++++++.+++++++++..++++++.......++++++..+++++++.....+++++++..++++++++++++.++++++..++++++......+++++++..+++++++.....++++++++.+++++++++..+++++++++.++++++++....++++++++.++++++++....++++++++.++++++++....++++++++.+++++++++++++++++++++++++++..", +"..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.+++++++++++++++++++++++++++..", +"..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.+++++++++++++++++++++++++++..", +"..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.+++++++++++++++++++++++++++..", +".................................................................................................................................................................................................................................................", +"..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.+++++++++++++++++++++++++++..", +"..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.+++++++++++++++++++++++++++..", +"..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.+++++++++++++++++++++++++++..", +"..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..++++++++++++++++++++.++++++++++++++++++++.+++++++++..+++++++++.++++++++++++++++++++.++++++++++++++++++++.+++++++++++++++++++++++++++..", +"..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..++++++++++++++++++++.++++++++++++++++++++.+++++++++..+++++++++.++++++++++++++++++++.++++++++++++++++++++.+++++++++++++++++++++++++++..", +"..+++++++++.+++++++++..+++++++.....+++++++..+++++++++.++.++++++..+++++++++.+++++++++..++++++.++++++..++++..++++++++++++++++++++.++++++++...+++++++++.+++++.+++..+++.+++++.+++++++++++.++++++++.++++++++.+++++++++++.+++++++++++++++++++++++++++..", +"..+++++++++.+++++++++..++++++.+++++.++++++..+++++++++.++.++++++..+++++++......++++++..++++..+..++++..++++..+++++++++.++++++++++.++++++..+++.++++++++.++++++..+..+..++++++.+++++++++..+++++++++.+++++++++..+++++++++.+++++++++..++++++++++..++++..", +"..+++++++++.+++++++++..++++++.+++++.++++++..+++++++++.++.++++++..+++++++......++++++..++++..+..++++..++++..+++++++++.++++++++++.++++++..+++.++++++++.++++++..+..+..++++++.+++++++++..+++++++++.+++++++++..+++++++++.+++++++++..++++++++++..++++..", +"..+++++++++.+++++++++..++++..+.....+..++++..++++++.........++++..++++++.++.+++++++++..++++..+..+++.++++++..+++++++..+..++++++++.++++++..+..+++++++++.++++++++.++.++++++++.++++++++.+++++++++++.+++++++++++.++++++++.++++++++...++++++++++..++++..", +"..+++++++++.+++++++++..+++.++.+++..+++.+++..+++++++++.++.++++++..++++++.++.+++++++++..++++++.+++..+++++++..++++++.+++++.+++++++.++++++++.+++++++++++.+++++++++..+++++++++.++++++++.+++++++++++.+++++++++++.++++++++.++++++.....++++++++++..++++..", +"..+++++++++.+++++++++..+++.++.+++..+++.+++..+++++++++.++.++++++..++++++.++.+++++++++..++++++.+++..+++++++..++++++.+++++.+++++++.++++++++.+++++++++++.+++++++++..+++++++++.++++++++.+++++++++++.+++++++++++.++++++++.++++++.....++++++++++..++++..", +"..+++++++++.+++++++++..+++.++.+++..+++.+++..+++++++..+..+++++++..+++++++.....+++++++..+++++++++.+++++++++..++++..+++++++..+++++.++++++..+..+++++++++.+++++....++....+++++.++++++++.+++++++++++.+++++++++++.++++++++.+++++..................++++..", +"..+++++++++.+++++++++..+++.++.+++..+++.+++..++++++.++.+++++++++..+++++++++.++.++++++..+++++++..+++.++++++..+++.+++++++++++..+++.+++++.+++++.++.+++++.+++++++++..+++++++++.++++++++.+++++++++++.+++++++++++.++++++++.++++++.....++++++++++++++++..", +"..+++++++++.+++++++++..+++.++.+++..+++.+++..++++++.++.+++++++++..+++++++++.++.++++++..+++++++..+++.++++++..+++.+++++++++++..+++.+++++.+++++.++.+++++.+++++++++..+++++++++.++++++++.+++++++++++.+++++++++++.++++++++.++++++.....++++++++++++++++..", +"..+++++++++.+++++++++..++++..+...++...++++..++++.........++++++..+++++++++.++.++++++..++++++.+++..+..++++..++++++++++++++++++++.+++++.++++++..++++++.++++++++.++.++++++++.++++++++.+++++++++++.+++++++++++.++++++++.++++++++...++++++++++++++++..", +"..+++++++++++++++++++..++++++.++++++++++++..++++++.++.+++++++++..++++++......+++++++..++++..++++..+..++++..++++++++++++++++++++.++++++..+++.++.+++++.++++++..+..+..++++++.+++++++++..+++++++++.+++++++++..+++++++++.+++++++++..++++++++++++++++..", +"..+++++++++++++++++++..++++++.++++++++++++..++++++.++.+++++++++..++++++......+++++++..++++..++++..+..++++..++++++++++++++++++++.++++++..+++.++.+++++.++++++..+..+..++++++.+++++++++..+++++++++.+++++++++..+++++++++.+++++++++..++++++++++++++++..", +"..+++++++++.+++++++++..+++++++.....+++++++..++++++.++.+++++++++..+++++++++.+++++++++..++++..++++++.++++++..++++++++++++++++++++.++++++++...++++..+++.+++++.+++..+++.+++++.+++++++++++.++++++++.++++++++.+++++++++++.+++++++++++++++++++++++++++..", +"..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..++++++++++++++++++++.++++++++++++++++++++.+++++++++..+++++++++.++++++++++++++++++++.++++++++++++++++++++.+++++++++++++++++++++++++++..", +"..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..++++++++++++++++++++.++++++++++++++++++++.+++++++++..+++++++++.++++++++++++++++++++.++++++++++++++++++++.+++++++++++++++++++++++++++..", +"..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.+++++++++++++++++++++++++++..", +".................................................................................................................................................................................................................................................", +".................................................................................................................................................................................................................................................", +"..+++++++++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..", +"..+++++++++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..", +"..+++++++++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..", +"..+++++++++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..", +"..+++++++++++++++++++++++++++.++++++..+++...++++++.+++++.+++.....++++++.+++++.+++.....++++++.+++++.++++++++.+++++.+++++.++......++++++..++++..+++....++++++..++++..+++......++++..++++..+++....++++++..+++++++++++++++++++..+++++++++++++++++++..", +"..+++++++++++++++++++++++++++.++++++..+++...++++++.+++++.+++.....++++++.+++++.+++.....++++++.+++++.++++++++.+++++.+++++.++......++++++..++++..+++....++++++..++++..+++......++++..++++..+++....++++++..+++++++++++++++++++..+++++++++++++++++++..", +"..+++...+++.+++++++++..++++++.+++++.++.+++..++++++.+++..+...+++++.+++++.+++..+...+++++.+++++.+++..+..++++...+++++.+++..+....++++++++++..+++.++...++++++++++..+++.++.++++++..++++..+++.++...++++..++++..+++++++++++++++++++..+++++++++++++++++++..", +"..+..+++.++.+++++++++..++++++.+++++.++++++..++++++.+++..+++++++++.+++++.+++..+++++++++.+++++.+++..++++++.++.+++++.+++..+++..++++++++++..+++.+++..++++++++++..+++.+++++++++..++++..+++.+++..++++..++++..+++++++++...+++++++..+++++++++++++++++++..", +"..+..+++.++.+++++++++..++++++.+++++.++++++..++++++.+++..+++++++++.+++++.+++..+++++++++.+++++.+++..++++++.++.+++++.+++..+++..++++++++++..+++.+++..++++++++++..+++.+++++++++..++++..+++.+++..++++..++++..+++++++++...+++++++..+++++++++++++++++++..", +"..+..++++.....+..+..+..++++++.+++......+++..++++++.++......++++..++++++.++......++++++.+++++.++......+..+++.+++++.++........++++++++++..+........++++++++++..+......+++++.++++++..+........++++..++++..+++++++++...+++++++..+++++++...+++..++++..", +"..+..++++++.+++...+++..++++++.+++++.++++++..++++++.+++..++++++.++++++++.+++..++++.....++++++.+++..+++.+++++.+++++.+++..+++......++++++..+++.+++......++++++..+++.++++++++.++++++..+++.+++++....++++++..+++++++++.+++++++++..++++++.+++...++++++..", +"..+..++++++.+++...+++..++++++.+++++.++++++..++++++.+++..++++++.++++++++.+++..++++.....++++++.+++..+++.+++++.+++++.+++..+++......++++++..+++.+++......++++++..+++.++++++++.++++++..+++.+++++....++++++..+++++++++.+++++++++..++++++.+++...++++++..", +"..+..++++++.+++..++++..++++++.+++++.++++++..++++++.+++..++++..+++++++++.+++..+++++++++.+++++.+++..+++.........+++.+++..+++++++++..++++..+++.+++..++++..++++..+++.++++++++.++++++..+++.+++..++++..++++..++++++++++..+++++++..+++++++++++++++++++..", +"..+..+++.++.+++..++++..++++++.+++++.++++++..++++++.+++..+++.+++++++++++.+++..+++++++++.+++++.+++..+++++++++.+++++.+++..+++++++++..++++..+++.+++..++++..++++..+++.++++++..+++++++..+++.+++..++++..++++..+++++++++++++++++++..+++++++++++++++++++..", +"..+..+++.++.+++..++++..++++++.+++++.++++++..++++++.+++..+++.+++++++++++.+++..+++++++++.+++++.+++..+++++++++.+++++.+++..+++++++++..++++..+++.+++..++++..++++..+++.++++++..+++++++..+++.+++..++++..++++..+++++++++++++++++++..+++++++++++++++++++..", +"..+++...++++..+..++++..++++++.+++++.++++++..++++++.+++..+++.+++++++++++.+++..+++.+++++.+++++.+++..+++++++++.+++++.+++..+++++++++..++++..+++.+++..++++..++++..+++.++++++..+++++++..+++.+++..++++..++++..+++++++++++++++++++..+++++++++++++++++++..", +"..+++++++++++++++++++++++++++.+++++.++++++..++++++.+++..+++.......+++++.+++..++++.....++++++.+++..+++++++++.+++++.+++..+++......++++++..+++.+++++....++++++..+++.++++++..+++++++..+++.+++++....++++++..+++++++++++++++++++..+++++++++++++++++++..", +"..+++++++++++++++++++++++++++.+++++.++++++..++++++.+++..+++.......+++++.+++..++++.....++++++.+++..+++++++++.+++++.+++..+++......++++++..+++.+++++....++++++..+++.++++++..+++++++..+++.+++++....++++++..+++++++++++++++++++..+++++++++++++++++++..", +"..+++++++++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..", +"..+++++++++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..", +"..+++++++++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++.++++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..", +".................................................................................................................................................................................................................................................", +"..++++++++++++++++++++++++++++++.+++++++++++++++++++++..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++.............................+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..", +"..++++++++++++++++++++++++++++++.+++++++++++++++++++++..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++.............................+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..", +"..++++++++++++++++++++++++++++++.+++++++++++++++++++++..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++.............................+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..", +"..++++++++++++++++++++++++++++++.+++++++++++++++++++++..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++.............................+++++++.....+++++++..+++++++.....+++++++..++++++++++..+++++++..+++++++..++++++++++..", +"..++++++++++++++++++++++++++++++.+++++++++++++++++++++..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++.............................+++++++.....+++++++..+++++++.....+++++++..++++++++++..+++++++..+++++++..++++++++++..", +"..++++++++++++++++++++++++++++++.+++++++++++++++..++++..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++......+++...+++.....+++......+++++++..++++++++++..++++++++++..+++++++..+++++++++.+++++++++..+++++++++.+++++++++..", +"..+++....++.+++++.+++++.+++..+++.++.++++++++.+++..+..+..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++........+..+...++.++...+.....+++++++..++++++++++..++++++++++..+++++++..+++++++++.+++++++++..+++++++++.+++++++++..", +"..+++....++.+++++.+++++.+++..+++.++.++++++++.+++..+..+..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++........+..+...++.++...+.....+++++++..++++++++++..++++++++++..+++++++..+++++++++.+++++++++..+++++++++.+++++++++..", +"..+..++++++.+++++++++..++++..+++.++.++++++++.+++..+..+..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++........+......++......+.....+++++++..++++++++++..++++++++++..+++++++..+++++++++.+++++++++..+++++++++.+++++++++..", +"..+..++++++...+++.++....++....++.++.++...+.....++++..+..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++........+......++......+.....+++++++..++++++++++..++++++++++..+++++++..+++++++..++++++++++..++++++++++..+++++++..", +"..+..++++++...+++.++....++....++.++.++...+.....++++..+..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++........+......++......+.....+++++++..++++++++++..++++++++++..+++++++..+++++++..++++++++++..++++++++++..+++++++..", +"..+++...+++.++.++.+++..++++..+++.++.++.++.++.++++++..+..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++........+.....+.....+++......+++++++..++++++++++..++++++++++..+++++++..+++++++++.+++++++++..+++++++++.+++++++++..", +"..++++++.++.++.++.+++..++++..+++.++.++.++.++.++++++..+..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++........+...++.........+.....+++++++..++++++++++..++++++++++..+++++++..+++++++++.+++++++++..+++++++++.+++++++++..", +"..++++++.++.++.++.+++..++++..+++.++.++.++.++.++++++..+..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++........+...++.........+.....+++++++..++++++++++..++++++++++..+++++++..+++++++++.+++++++++..+++++++++.+++++++++..", +"..++++++.++.++.++.+++..++++..+++.++.++.++.++.++++++..+..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++........+..+...........+.....+++++++..++++++++++..++++++++++..+++++++..+++++++++.+++++++++..+++++++++.+++++++++..", +"..+.....+++.++.++.+++..++++++.++.++.++.++.+++..++++..+..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++........+..+......++...+.....+++++++.....+++++++..+++++++.....+++++++..++++++++++..+++++++..+++++++..++++++++++..", +"..+.....+++.++.++.+++..++++++.++.++.++.++.+++..++++..+..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++........+..+......++...+.....+++++++.....+++++++..+++++++.....+++++++..++++++++++..+++++++..+++++++..++++++++++..", +"..++++++++++++++++++++++++++++++.+++++++++++++++++++++..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++........+..++++++...+++......+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..", +"..++++++++++++++++++++++++++++++.+++++++++++++++++++++..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++.............................+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..", +"..++++++++++++++++++++++++++++++.+++++++++++++++++++++..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++.............................+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..", +"..++++++++++++++++++++++++++++++.+++++++++++++++++++++..++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++.............................+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..+++++++++++++++++++..", +".................................................................................................................................................................................................................................................", +"................................................................................................................................................................................................................................................."}; + +#endif \ No newline at end of file diff --git a/packages/hal/arm/sa11x0/ipaq/current/src/lcd_support.c b/packages/hal/arm/sa11x0/ipaq/current/src/lcd_support.c new file mode 100644 --- /dev/null +++ b/packages/hal/arm/sa11x0/ipaq/current/src/lcd_support.c @@ -0,0 +1,1350 @@ +//========================================================================== +// +// lcd_support.c +// +// SA1110/iPAQ - LCD support routines +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Richard Panton +// Date: 2001-02-24 +// Description: Simple LCD support +//####DESCRIPTIONEND#### + +#include + +#include +#include // IO macros +#include // Virtual vector support +#include // Register state info +#include // HAL interrupt macros + +#include // Board definitions +#include +#include +#include +#include + +#ifdef CYGPKG_ISOINFRA +# include +# ifdef CYGINT_ISO_STDIO_FORMATTED_IO +# include // sscanf +# endif +#endif + +#ifndef FALSE +#define FALSE 0 +#define TRUE 1 +#endif + +#define PORTRAIT_MODE +//#define LOGO_AT_TOP +#include "banner.xpm" +#include "font.h" + +// Physical dimensions of LCD display +#define DISPLAY_WIDTH 320 +#define DISPLAY_HEIGHT 240 + +// Logical layout +#ifdef PORTRAIT_MODE +#define LCD_WIDTH 240 +#define LCD_HEIGHT 320 +#else +#define LCD_WIDTH 320 +#define LCD_HEIGHT 240 +#endif +#define LCD_DEPTH 16 + +static struct lcd_frame { + unsigned short palette[16]; + unsigned short pixels[DISPLAY_HEIGHT][DISPLAY_WIDTH]; + unsigned char pad[256]; +} *lcd_frame_buffer = (struct lcd_frame *)0x01FC0000; // Actually just 0x26000 bytes, but... + +#define USE_RGB565 +#ifdef USE_RGB565 +#define RGB_RED(x) (((x)&0x1F)<<11) +#define RGB_GREEN(x) (((x)&0x3F)<<5) +#define RGB_BLUE(x) ((x)&0x1F) +#else +#define RGB_RED(x) (((x)&0x0F)<<12) +#define RGB_GREEN(x) (((x)&0x0F)<<7) +#define RGB_BLUE(x) (((x)&0x0F)<<1) +#endif + +static struct lcd_frame * volatile fp; + +// This can be 1 or 2 +#define SCREEN_SCALE 2 +#define NIBBLES_PER_PIXEL (1*SCREEN_SCALE) +#define PIXELS_PER_BYTE (2/NIBBLES_PER_PIXEL) +#define PIXEL_MASK ((1<pixels[col][(DISPLAY_WIDTH-1)-row] = val; +} +#else +static void +set_pixel(int row, int col, unsigned short val) +{ + fp->pixels[row][col] = val; +} +#endif + +static int +_hexdigit(char c) +{ + if ((c >= '0') && (c <= '9')) { + return c - '0'; + } else + if ((c >= 'A') && (c <= 'F')) { + return (c - 'A') + 0x0A; + } else + if ((c >= 'a') && (c <= 'f')) { + return (c - 'a') + 0x0a; + } +} + +static int +_hex(char *cp) +{ + return (_hexdigit(*cp)<<4) | _hexdigit(*(cp+1)); +} + +static unsigned short +parse_color(char *cp) +{ + int red, green, blue; + + while (*cp && (*cp != 'c')) cp++; + if (cp) { + cp += 2; + if (*cp == '#') { + red = _hex(cp+1); + green = _hex(cp+3); + blue = _hex(cp+5); +#ifdef USE_RGB565 + return RGB_RED(red>>3) | RGB_GREEN(green>>2) | RGB_BLUE(blue>>3); +#else + return RGB_RED(red>>3) | RGB_GREEN(green>>3) | RGB_BLUE(blue>>3); +#endif + } else { + // Should be "None" + return 0xFFFF; + } + } else { + return 0xFFFF; + } +} + +#ifndef CYGINT_ISO_STDIO_FORMATTED_IO +static int +get_int(char **_cp) +{ + char *cp = *_cp; + char c; + int val = 0; + + while ((c = *cp++) && (c != ' ')) { + if ((c >= '0') && (c <= '9')) { + val = val * 10 + (c - '0'); + } else { + return -1; + } + } + *_cp = cp; + return val; +} +#endif + +int +show_xpm(char *xpm[], int screen_pos) +{ + int i, row, col, offset; + char *cp; + int nrows, ncols, nclrs; + unsigned short colors[256]; // Mapped by character index + + cp = xpm[0]; +#ifdef CYGINT_ISO_STDIO_FORMATTED_IO + if (sscanf(cp, "%d %d %d", &ncols, &nrows, &nclrs) != 3) { +#else + if (((ncols = get_int(&cp)) < 0) || + ((nrows = get_int(&cp)) < 0) || + ((nclrs = get_int(&cp)) < 0)) { + +#endif + diag_printf("Can't parse XPM data, sorry\n"); + return 0; + } + // printf("%d rows, %d cols, %d colors\n", nrows, ncols, nclrs); + + for (i = 0; i < 256; i++) { + colors[i] = 0x0000; + } + for (i = 0; i < nclrs; i++) { + cp = xpm[i+1]; + colors[(unsigned int)*cp] = parse_color(&cp[1]); + // printf("Color[%c] = %x\n", *cp, colors[(unsigned int)*cp]); + } + +#ifdef LOGO_AT_TOP + offset = screen_pos; +#else + offset = screen_pos-nrows; +#endif + for (row = 0; row < nrows; row++) { + cp = xpm[nclrs+1+row]; + for (col = 0; col < ncols; col++) { + set_pixel(row+offset, col, colors[(unsigned int)*cp++]); + } + } + // cyg_thread_delay(100); +#ifdef LOGO_AT_TOP + screen_start = (nrows + (FONT_HEIGHT-1))/FONT_HEIGHT; + return offset+nrows; +#else + screen_height = offset / FONT_HEIGHT; + return offset; +#endif +} + +void +lcd_init(int depth) +{ + // Currently only color/16bpp supported + + if (depth != 16) { + return; + } + lcd_bpp = depth; + fp = (struct lcd_frame *)hal_virt_to_phys_address((cyg_uint32)lcd_frame_buffer); + // Enable LCD in 320x240 16bpp + *SA1110_DBAR1 = (unsigned long)&(fp->palette); + *SA1110_LCCR1 = 0x09100C00 + DISPLAY_WIDTH - 16; + *SA1110_LCCR2 = 0x08010C00 + DISPLAY_HEIGHT - 1; + *SA1110_LCCR3 = 0x0030000a; + fp->palette[0] = 0x2000; // Tell controller true color / 16 bits + *SA1110_LCCR0 = 0xB9; // Color + ipaq_EGPIO(SA1110_EIO_LCD_3V3|SA1110_EIO_LCD_CTRL|SA1110_EIO_LCD_5V|SA1110_EIO_LCD_VDD, + SA1110_EIO_LCD_3V3_ON|SA1110_EIO_LCD_CTRL_ON|SA1110_EIO_LCD_5V_ON|SA1110_EIO_LCD_VDD_ON); + lcd_clear(); + lcd_brightness(31); +} + +// Get information about the frame buffer +int +lcd_getinfo(struct lcd_info *info) +{ + if (lcd_bpp == 0) { + return 0; // LCD not initialized + } + info->width = DISPLAY_WIDTH; + info->height = DISPLAY_HEIGHT; + info->bpp = lcd_bpp; + info->fb = (void *)lcd_frame_buffer->pixels; // Note: this is cached + info->rlen = DISPLAY_WIDTH * 2; + info->type = FB_TRUE_RGB565; + return 1; // Information valid +} + +// Control screen light [brightness] + +static void +lcd_brightness_ack(atmel_pkt *pkt) +{ +} + +static int _lcd_brightness; + +void +lcd_brightness(int level) +{ + unsigned char cmd[3]; + + atmel_register(ATMEL_CMD_LIGHT, lcd_brightness_ack); + cmd[0] = 1; // LCD magic + cmd[1] = (level > 0) ? 1 : 0; // Turn light on + cmd[2] = level; + if (level) _lcd_brightness = level; + atmel_send(ATMEL_CMD_LIGHT, cmd, 3); +} + +// Clear screen +void +lcd_clear(void) +{ + int row, col; + int pos; + +#ifndef USE_RGB565 + int val; + for (row = 0; row < lcd_height; row++) { + for (col = 0; col < lcd_width; col++) { + set_pixel(row, col, RGB_RED(31)); + } + } + CYGACC_CALL_IF_DELAY_US(100000); + + for (row = 0; row < lcd_height; row++) { + for (col = 0; col < lcd_width; col++) { + set_pixel(row, col, RGB_GREEN(31)); + } + } + CYGACC_CALL_IF_DELAY_US(100000); + val = 0; + for (pos = 0; pos < 16; pos++) { + val = (1<= screen_width) X = screen_width-1; + curX = X; + if (Y < screen_start) Y = screen_start; + if (Y >= screen_height) Y = screen_height-1; + curY = Y; + if (cursor_enable) { + lcd_drawc(CURSOR_ON, curX, curY); + } +} + +int holdX, holdY, holdC; + +// Render a character at position (X,Y) with current background/foreground +static void +lcd_drawc(cyg_int8 c, int x, int y) +{ + // Currently hard-coded for 16bpp + cyg_uint8 bits; + int l, p; + + holdX = x; holdY = y; holdC = c; + if ((c < FIRST_CHAR) || (c > LAST_CHAR)) c = '.'; + screen[y][x] = c; + for (l = 0; l < FONT_HEIGHT; l++) { + bits = font_table[c-FIRST_CHAR][l]; + for (p = 0; p < 8; p++) { + if (bits & 0x01) { + set_pixel(y*FONT_HEIGHT+l, x*FONT_WIDTH + p, fg); + } else { + set_pixel(y*FONT_HEIGHT+l, x*FONT_WIDTH + p, bg); + } + bits >>= 1; + } + } +} + +static void +lcd_scroll(void) +{ + int row, col; + cyg_uint8 *c1, *c2; +#ifndef PORTRAIT_MODE + cyg_uint16 *p1, *p2; +#endif + + // First scroll up the virtual screen + for (row = (screen_start+1); row < screen_height; row++) { + c1 = &screen[row-1][0]; + c2 = &screen[row][0]; + for (col = 0; col < screen_width; col++) { + *c1++ = *c2++; + } + } + c1 = &screen[screen_height-1][0]; + for (col = 0; col < screen_width; col++) { + *c1++ = 0x20; + } +#ifdef PORTRAIT_MODE + for (row = screen_start; row < screen_height; row++) { + for (col = 0; col < screen_width; col++) { + lcd_drawc(screen[row][col], col, row); + } + } +#else + // Now the physical screen + for (row = FONT_HEIGHT*(screen_start+1); row < LCD_HEIGHT; row++) { + p1 = &fp->pixels[row-FONT_HEIGHT][0]; + p2 = &fp->pixels[row][0]; + for (col = 0; col < LCD_WIDTH; col++) { + *p1++ = *p2++; + } + } + for (row = LCD_HEIGHT-FONT_HEIGHT; row < LCD_HEIGHT; row++) { + p1 = &fp->pixels[row][0]; + for (col = 0; col < LCD_WIDTH; col++) { + *p1++ = bg; + } + } +#endif +} + +// Draw one character at the current position +void +lcd_putc(cyg_int8 c) +{ + if (cursor_enable) { + lcd_drawc(CURSOR_OFF, curX, curY); + } + switch (c) { + case '\r': + curX = 0; + break; + case '\n': + curY++; + break; + case '\b': + curX--; + if (curX < 0) { + curY--; + if (curY < 0) curY = 0; + curX = screen_width-1; + } + break; + default: + lcd_drawc(c, curX, curY); + curX++; + if (curX == screen_width) { + curY++; + curX = 0; + } + } + if (curY >= screen_height) { + lcd_scroll(); + curY = (screen_height-1); + } + if (cursor_enable) { + lcd_drawc(CURSOR_ON, curX, curY); + } +} + +// Basic LCD 'printf()' support + +#include + +#define is_digit(c) ((c >= '0') && (c <= '9')) + +static int +_cvt(unsigned long val, char *buf, long radix, char *digits) +{ + char temp[80]; + char *cp = temp; + int length = 0; + if (val == 0) { + /* Special case */ + *cp++ = '0'; + } else { + while (val) { + *cp++ = digits[val % radix]; + val /= radix; + } + } + while (cp != temp) { + *buf++ = *--cp; + length++; + } + *buf = '\0'; + return (length); +} + +static int +lcd_vprintf(void (*putc)(cyg_int8), const char *fmt0, va_list ap) +{ + char c, sign, *cp; + int left_prec, right_prec, zero_fill, length, pad, pad_on_right; + char buf[32]; + long val; + while ((c = *fmt0++)) { + cp = buf; + length = 0; + if (c == '%') { + c = *fmt0++; + left_prec = right_prec = pad_on_right = 0; + if (c == '-') { + c = *fmt0++; + pad_on_right++; + } + if (c == '0') { + zero_fill = TRUE; + c = *fmt0++; + } else { + zero_fill = FALSE; + } + while (is_digit(c)) { + left_prec = (left_prec * 10) + (c - '0'); + c = *fmt0++; + } + if (c == '.') { + c = *fmt0++; + zero_fill++; + while (is_digit(c)) { + right_prec = (right_prec * 10) + (c - '0'); + c = *fmt0++; + } + } else { + right_prec = left_prec; + } + sign = '\0'; + switch (c) { + case 'd': + case 'x': + case 'X': + val = va_arg(ap, long); + switch (c) { + case 'd': + if (val < 0) { + sign = '-'; + val = -val; + } + length = _cvt(val, buf, 10, "0123456789"); + break; + case 'x': + length = _cvt(val, buf, 16, "0123456789abcdef"); + break; + case 'X': + length = _cvt(val, buf, 16, "0123456789ABCDEF"); + break; + } + break; + case 's': + cp = va_arg(ap, char *); + length = strlen(cp); + break; + case 'c': + c = va_arg(ap, long /*char*/); + (*putc)(c); + continue; + default: + (*putc)('?'); + } + pad = left_prec - length; + if (sign != '\0') { + pad--; + } + if (zero_fill) { + c = '0'; + if (sign != '\0') { + (*putc)(sign); + sign = '\0'; + } + } else { + c = ' '; + } + if (!pad_on_right) { + while (pad-- > 0) { + (*putc)(c); + } + } + if (sign != '\0') { + (*putc)(sign); + } + while (length-- > 0) { + (*putc)(c = *cp++); + if (c == '\n') { + (*putc)('\r'); + } + } + if (pad_on_right) { + while (pad-- > 0) { + (*putc)(' '); + } + } + } else { + (*putc)(c); + if (c == '\n') { + (*putc)('\r'); + } + } + } +} + +int +lcd_printf(char const *fmt, ...) +{ + int ret; + va_list ap; + + va_start(ap, fmt); + ret = lcd_vprintf(lcd_putc, fmt, ap); + va_end(ap); + return (ret); +} + +void +lcd_setbg(int red, int green, int blue) +{ + bg = RGB_RED(red) | RGB_GREEN(green) | RGB_BLUE(blue); +} + +void +lcd_setfg(int red, int green, int blue) +{ + fg = RGB_RED(red) | RGB_GREEN(green) | RGB_BLUE(blue); +} + +#ifdef CYGSEM_IPAQ_LCD_COMM + +// +// Support LCD/touchscreen as a virtual I/O channel +// + +#include "kbd.xpm" // Contains 4 keyboard images + +static int _timeout = 500; + +struct coord { + short x,y; +}; + +#ifdef PORTRAIT_MODE +#define CS_UL 1 +#define CS_UR 0 +#define CS_LL 3 +#define CS_LR 2 +#else +#define CS_UL 0 +#define CS_UR 1 +#define CS_LL 2 +#define CS_LR 3 +#endif +#define KBD_FUZZ 50 +static struct coord kbd_limits[4]; +static short minX, maxX, minY, maxY; // Coordinates for the keyboard matrix + +#define CODE_NONE 0x00 +#define CODE_CTRL 0x81 +#define CODE_SHIFT 0x82 +#define CODE_NUM 0x83 +#define CODE_BS 0x08 +#define CODE_CR 0x0D +#define CODE_ESC 0x1B +#define CODE_DEL 0x7F +#define CTRL(x) (x&0x1F) + +typedef unsigned char kbd_map[4][11]; +static kbd_map kbd_norm_map = { + { 'q', 'w', 'e', 'r', 't', 'y', 'u', 'i', 'o', 'p', CODE_BS }, + { 'a', 's', 'd', 'f', 'g', 'h', 'j', 'k', 'l', '-', CODE_CR }, + { CODE_CTRL, 'z', 'x', 'c', 'v', 'b', 'n', 'm', ',', '.', ';' }, + { CODE_SHIFT, CODE_SHIFT, ' ', ' ', ' ', ' ', CODE_NUM, '\'', '=', '\\', '/'} +}; + +static kbd_map kbd_num_map = { + { '1', '2', '3', '4', '5', '6', '7', '8', '9', '0', CODE_BS }, + { '!', '@', '#', '$', '%', '^', '&', '*', '(', ')', CODE_CR }, + { CODE_CTRL, ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', '`', '~' }, + { CODE_SHIFT, CODE_SHIFT, ' ', ' ', ' ', ' ', CODE_NUM, '[', ']', '{', '}'} +}; + +static kbd_map kbd_ctrl_map = { + { CTRL('q'), CTRL('w'), CTRL('e'), CTRL('r'), CTRL('t'), CTRL('y'), + CTRL('u'), CTRL('i'), CTRL('o'), CTRL('p'), CODE_ESC }, + { CTRL('a'), CTRL('s'), CTRL('d'), CTRL('f'), CTRL('g'), CTRL('h'), + CTRL('j'), CTRL('k'), CTRL('l'), CTRL('_'), CODE_CR }, + { CODE_CTRL, CTRL('z'), CTRL('x'), CTRL('c'), CTRL('v'), CTRL('b'), + CTRL('n'), CTRL('m'), '\\', CTRL(']'), CTRL('^') }, + { CODE_SHIFT, CODE_SHIFT, ' ', ' ', ' ', ' ', CODE_NUM, ' ', ' ', ' ', CODE_DEL} +}; + +static kbd_map kbd_shift_map = { + { 'Q', 'W', 'E', 'R', 'T', 'Y', 'U', 'I', 'O', 'P', CODE_BS }, + { 'A', 'S', 'D', 'F', 'G', 'H', 'J', 'K', 'L', '_', CODE_CR }, + { CODE_CTRL, 'Z', 'X', 'C', 'V', 'B', 'N', 'M', '<', '>', ':' }, + { CODE_SHIFT, CODE_SHIFT, ' ', ' ', ' ', ' ', CODE_NUM, '"', '+', '|', '?'} +}; + +static kbd_map *cur_kbd_map = &kbd_norm_map; +static bool kbd_active = false; + +// Pseudo-keyboard indicator +#define LCD_KBD_NORM 0 +#define LCD_KBD_SHIFT 1 +#define LCD_KBD_NUM 2 +#define LCD_KBD_CTRL 3 + +// Display pseudo keyboard +static void +lcd_kbd(int which) +{ + char **kbd_xpm; + + switch (which) { + case LCD_KBD_NORM: + kbd_xpm = keynorm_xpm; + break; + case LCD_KBD_SHIFT: + kbd_xpm = keyshft_xpm; + break; + case LCD_KBD_CTRL: + kbd_xpm = keyctrl_xpm; + break; + case LCD_KBD_NUM: + kbd_xpm = keynum_xpm; + break; + default: + return; + } + show_xpm(kbd_xpm, kbd_pos); +} + +static bool +inside(int pos, int lim1, int lim2) +{ + if (lim1 <= lim2) { + return ((pos >= lim1) && (pos <= lim2)); + } else { + return ((pos >= lim2) && (pos <= lim1)); + } +} + +static int +abs(int x) +{ + if (x < 0) { + return -x; + } else { + return x; + } +} + +static int +min(int x, int y) +{ + if (x < y) { + return x; + } else { + return y; + } +} + +static int +max(int x, int y) +{ + if (x < y) { + return y; + } else { + return x; + } +} + +static cyg_bool +lcd_comm_getc_nonblock(void* __ch_data, cyg_uint8* ch) +{ + static bool pen_down = false; + static int total_events = 0; + static unsigned long totalX, totalY; + struct ts_event tse; + struct key_event ke; + + // See if any buttons have been pushed + if (key_get_event(&ke)) { + if ((ke.button_info & ATMEL_BUTTON_STATE) == ATMEL_BUTTON_STATE_UP) { +// diag_printf("Key = %x\n", ke.button_info); + switch (ke.button_info & ATMEL_BUTTON_VALUE) { + case ATMEL_BUTTON_RETURN: + *ch = CTRL('C'); + return true; + default: + return false; + } + } + return false; // Ignore down presses + } + // If keyboard not active, always returns false + if (!kbd_active) { + return false; + } + // Wait for pen down + if (!pen_down && (total_events == 0)) { + if (ts_get_event(&tse)) { + if (!tse.up) { + pen_down = true; + totalX = totalY = 0; + } + } + return false; + } + // Now that the pen is down, accumulate some data + if (total_events < 50) { + if (ts_get_event(&tse)) { + if (tse.up) { + pen_down = false; + } else { + total_events++; + pen_down = true; +#ifdef PORTRAIT_MODE + totalX += tse.y; + totalY += tse.x; +#else + totalX += tse.x; + totalY += tse.y; +#endif + } + } + return false; + } + // Now wait for the pen to go up + while (pen_down) { + if (ts_get_event(&tse)) { + if (tse.up) { + pen_down = false; + } + } + } + if (true) { + // If pen just went up then see if this was a valid + // character (inside the keyboard picture, etc) + int x = totalX/total_events; + int y = totalY/total_events; + int row, col; + int char_width, char_height; + unsigned char kbd_ch; +#if 0 + { + int cur = start_console(0); + printf("Pen[%d] at %d/%d\n", total_events, x, y); + end_console(cur); + } +#endif + total_events = 0; + // Try and determine row/col in our keyboard matrix + if (inside(x, minX, maxX) && inside(y, minY, maxY)) { + // Point seems to be with the matrix + char_width = abs(minX - maxX) / 11; + char_height = abs(minY - maxY) / 4; + col = abs(x-maxX) / char_width; + row = abs(y-minY) / char_height; + kbd_ch = (*cur_kbd_map)[row][col]; +#if 0 + { + int cur = start_console(0); + printf("Row/Col = %d/%d = %x\n", row, col, kbd_ch); + end_console(cur); + } +#endif + switch (kbd_ch) { + case CODE_SHIFT: + if (cur_kbd_map == &kbd_shift_map) { + cur_kbd_map = &kbd_norm_map; + lcd_kbd(LCD_KBD_NORM); + } else { + cur_kbd_map = &kbd_shift_map; + lcd_kbd(LCD_KBD_SHIFT); + } + break; + case CODE_CTRL: + if (cur_kbd_map == &kbd_ctrl_map) { + cur_kbd_map = &kbd_norm_map; + lcd_kbd(LCD_KBD_NORM); + } else { + cur_kbd_map = &kbd_ctrl_map; + lcd_kbd(LCD_KBD_CTRL); + } + break; + case CODE_NUM: + if (cur_kbd_map == &kbd_num_map) { + cur_kbd_map = &kbd_norm_map; + lcd_kbd(LCD_KBD_NORM); + } else { + cur_kbd_map = &kbd_num_map; + lcd_kbd(LCD_KBD_NUM); + } + break; + case CODE_NONE: + break; + default: + *ch = kbd_ch; + return true; + } + } + } + return false; +} + +static cyg_uint8 +lcd_comm_getc(void* __ch_data) +{ + cyg_uint8 ch; + + while (!lcd_comm_getc_nonblock(__ch_data, &ch)) ; + return ch; +} + +static void +lcd_comm_putc(void* __ch_data, cyg_uint8 c) +{ + lcd_putc(c); +} + +static void +lcd_comm_write(void* __ch_data, const cyg_uint8* __buf, cyg_uint32 __len) +{ +#if 0 + CYGARC_HAL_SAVE_GP(); + + while(__len-- > 0) + lcd_comm_putc(__ch_data, *__buf++); + + CYGARC_HAL_RESTORE_GP(); +#endif +} + +static void +lcd_comm_read(void* __ch_data, cyg_uint8* __buf, cyg_uint32 __len) +{ +#if 0 + CYGARC_HAL_SAVE_GP(); + + while(__len-- > 0) + *__buf++ = lcd_comm_getc(__ch_data); + + CYGARC_HAL_RESTORE_GP(); +#endif +} + +static cyg_bool +lcd_comm_getc_timeout(void* __ch_data, cyg_uint8* ch) +{ + int delay_count; + cyg_bool res; + + delay_count = _timeout * 10; // delay in .1 ms steps + for(;;) { + res = lcd_comm_getc_nonblock(__ch_data, ch); + if (res || 0 == delay_count--) + break; + CYGACC_CALL_IF_DELAY_US(100); + } + return res; +} + +static int +lcd_comm_control(void *__ch_data, __comm_control_cmd_t __func, ...) +{ + static int vector = 0; + int ret = 0; + static int irq_state = 0; + + CYGARC_HAL_SAVE_GP(); + + switch (__func) { + case __COMMCTL_IRQ_ENABLE: + irq_state = 1; +#if 0 + if (vector == 0) { + vector = eth_drv_int_vector(); + } + HAL_INTERRUPT_UNMASK(vector); +#endif + break; + case __COMMCTL_IRQ_DISABLE: + ret = irq_state; + irq_state = 0; +#if 0 + HAL_INTERRUPT_MASK(vector); +#endif + break; + case __COMMCTL_DBG_ISR_VECTOR: + ret = vector; + break; + case __COMMCTL_SET_TIMEOUT: + { + va_list ap; + + va_start(ap, __func); + + ret = _timeout; + _timeout = va_arg(ap, cyg_uint32); + + va_end(ap); + break; + } + case __COMMCTL_FLUSH_OUTPUT: + break; + default: + break; + } + CYGARC_HAL_RESTORE_GP(); + return ret; +} + +static int +lcd_comm_isr(void *__ch_data, int* __ctrlc, + CYG_ADDRWORD __vector, CYG_ADDRWORD __data) +{ +#if 0 + char ch; + + cyg_drv_interrupt_acknowledge(__vector); + *__ctrlc = 0; + if (lcd_comm_getc_nonblock(__ch_data, &ch)) { + if (ch == 0x03) { + *__ctrlc = 1; + } + } + return CYG_ISR_HANDLED; +#endif +} + +static bool +init_kbd_coord(int indx, char *prompt_char) +{ + char prompt[] = "Press %s on kbd graphic"; + int off = ((screen_width-sizeof(prompt))/2)-1; + int off2 = ((screen_width-20)/2)-1; + struct ts_event tse; + struct key_event ke; + bool pen_down; + int i, down_timer, total_events; + unsigned long totalX, totalY; + + lcd_moveto(off, screen_height/2); + lcd_printf(prompt, prompt_char); + lcd_moveto(off2, (screen_height/2)+2); + lcd_printf("Keep pen down until"); + lcd_moveto(off2, (screen_height/2)+3); + lcd_printf("message disappears"); + pen_down = false; + down_timer = 0; + total_events = 0; + totalX = totalY = 0; + // Wait for a pen-down event + while (!pen_down) { + if (ts_get_event(&tse)) { + if (!tse.up) { + pen_down = true; + } + } + if (key_get_event(&ke)) { + if (ke.button_info == (ATMEL_BUTTON_STATE_UP|ATMEL_BUTTON_RETURN)) { + return true; + } + } + } + // Now accumulate data + // Assumption: the Atmel can send at most 3 position reports + // per millisecond. We should wait for 50ms before moving on + while (total_events < 100) { + if (ts_get_event(&tse)) { + if (tse.up) { + pen_down = false; + continue; + } else { +#ifdef PORTRAIT_MODE + totalX += tse.y; + totalY += tse.x; +#else + totalX += tse.x; + totalY += tse.y; +#endif + total_events++; + pen_down = true; + } + } + if (key_get_event(&ke)) { + if (ke.button_info == (ATMEL_BUTTON_STATE_UP|ATMEL_BUTTON_RETURN)) { + return true; + } + } + } + // Tell the guy we have enough data + lcd_moveto(off, screen_height/2); + for (i = 0; i < screen_width; i++) { + lcd_putc(' '); + } + // Now wait for the pen to go back up + while (pen_down) { + if (ts_get_event(&tse)) { + if (tse.up) { + pen_down = false; + } + } + if (key_get_event(&ke)) { + if (ke.button_info == (ATMEL_BUTTON_STATE_UP|ATMEL_BUTTON_RETURN)) { + return true; + } + } + } + kbd_limits[indx].x = totalX / total_events; + kbd_limits[indx].y = totalY / total_events; + return false; +} + +static bool +close(int c1, int c2) +{ + int diff = c1 - c2; + if (diff < 0) diff = -diff; + return (diff < 50); +} + +void +lcd_comm_init(void) +{ + static int init = 0; + bool need_params = true; + unsigned short cksum, param; + int i; + + if (!init) { + hal_virtual_comm_table_t* comm; + int cur = CYGACC_CALL_IF_SET_CONSOLE_COMM(CYGNUM_CALL_IF_SET_COMM_ID_QUERY_CURRENT); + + // Setup procs in the vector table + CYGACC_CALL_IF_SET_CONSOLE_COMM(1); + comm = CYGACC_CALL_IF_CONSOLE_PROCS(); + //CYGACC_COMM_IF_CH_DATA_SET(*comm, chan); + CYGACC_COMM_IF_WRITE_SET(*comm, lcd_comm_write); + CYGACC_COMM_IF_READ_SET(*comm, lcd_comm_read); + CYGACC_COMM_IF_PUTC_SET(*comm, lcd_comm_putc); + CYGACC_COMM_IF_GETC_SET(*comm, lcd_comm_getc); + CYGACC_COMM_IF_CONTROL_SET(*comm, lcd_comm_control); + CYGACC_COMM_IF_DBG_ISR_SET(*comm, lcd_comm_isr); + CYGACC_COMM_IF_GETC_TIMEOUT_SET(*comm, lcd_comm_getc_timeout); + + // Restore original console + CYGACC_CALL_IF_SET_CONSOLE_COMM(cur); + + init = 1; + + // Pick up parameters for virtual keyboard from RAM + cksum = (unsigned short)&_ipaq_LCD_params[0]; + for (i = 0; i < 4; i++) { + param = _ipaq_LCD_params[i*2]; + kbd_limits[i].x = param; + cksum ^= param; + param = _ipaq_LCD_params[(i*2)+1]; + kbd_limits[i].y = param; + cksum ^= param; + } + need_params = cksum != _ipaq_LCD_params[(4*2)+1]; + + if (!need_params) { + // See if the guy wants to force new parameters + lcd_clear(); + lcd_moveto(5, screen_height/2); + lcd_printf("Calibrate touch screen?\n"); + for (i = 0; i < 20; i++) { + struct key_event ke; + if (key_get_event(&ke) && ((ke.button_info & ATMEL_BUTTON_STATE) == ATMEL_BUTTON_STATE_UP)) { + need_params = (ke.button_info & ATMEL_BUTTON_VALUE) != ATMEL_BUTTON_RETURN; + break; + } + CYGACC_CALL_IF_DELAY_US(50000); + lcd_putc('.'); + } + } + + while (need_params) { + cursor_enable = false; + lcd_clear(); + lcd_kbd(LCD_KBD_NORM); + if (init_kbd_coord(CS_UL, "'q'")) { + goto no_kbd; + } + if (init_kbd_coord(CS_UR, "BS ")) { + goto no_kbd; + } + if (init_kbd_coord(CS_LL, "SHIFT")) { + goto no_kbd; + } + if (init_kbd_coord(CS_LR, "'/' ")) { + goto no_kbd; + } +// cursor_enable = true; + if (close(kbd_limits[CS_UL].x, kbd_limits[CS_LL].x) && + close(kbd_limits[CS_UR].x, kbd_limits[CS_LR].x) && + close(kbd_limits[CS_UL].y, kbd_limits[CS_UR].y) && + close(kbd_limits[CS_LL].y, kbd_limits[CS_LR].y)) { + // Save values so we don't need to repeat this + cksum = (unsigned short)&_ipaq_LCD_params[0]; + for (i = 0; i < 4; i++) { + param = kbd_limits[i].x; + cksum ^= param; + _ipaq_LCD_params[i*2] = param; + param = kbd_limits[i].y; + cksum ^= param; + _ipaq_LCD_params[(i*2)+1] = param; + } + _ipaq_LCD_params[(4*2)+1] = cksum; + break; + } + } + kbd_active = true; + + // Munge the limits to allow for some slop + if (kbd_limits[CS_UL].x < kbd_limits[CS_UR].x) { + minX = min(kbd_limits[CS_UL].x, kbd_limits[CS_LL].x) - KBD_FUZZ; + maxX = max(kbd_limits[CS_UR].x, kbd_limits[CS_LR].x) + KBD_FUZZ; + } else { + minX = min(kbd_limits[CS_UR].x, kbd_limits[CS_LR].x) - KBD_FUZZ; + maxX = max(kbd_limits[CS_UL].x, kbd_limits[CS_LL].x) + KBD_FUZZ; + } + if (kbd_limits[CS_UL].y < kbd_limits[CS_LL].y) { + minY = min(kbd_limits[CS_UL].y, kbd_limits[CS_UR].y) - KBD_FUZZ; + maxY = max(kbd_limits[CS_LL].y, kbd_limits[CS_LR].y) + KBD_FUZZ; + } else { + minY = min(kbd_limits[CS_LR].y, kbd_limits[CS_LL].y) - KBD_FUZZ; + maxY = max(kbd_limits[CS_UL].y, kbd_limits[CS_UR].y) + KBD_FUZZ; + } + no_kbd: + lcd_clear(); + if (kbd_active) { + lcd_kbd(LCD_KBD_NORM); + } +#if 0 + printf("Limits[] = %d/%d, %d/%d, %d/%d, %d/%d\n", + limits[CS_UL].x, limits[CS_UL].y, + limits[CS_UR].x, limits[CS_UR].y, + limits[CS_LL].x, limits[CS_LL].y, + limits[CS_LR].x, limits[CS_LR].y); + printf("KBD Limits[] = %d/%d, %d/%d, %d/%d, %d/%d\n", + kbd_limits[CS_UL].x, kbd_limits[CS_UL].y, + kbd_limits[CS_UR].x, kbd_limits[CS_UR].y, + kbd_limits[CS_LL].x, kbd_limits[CS_LL].y, + kbd_limits[CS_LR].x, kbd_limits[CS_LR].y); + printf("KBD in %d/%d .. %d/%d\n", minX, minY, maxX, maxY); + printf("screen %d x %d\n", screen_height, screen_width); +#endif + } +} + +// Control state of LCD display + +void +lcd_on(bool enable) +{ + static bool enabled = true; + + if (enable) { + if (!enabled) { + ipaq_EGPIO(SA1110_EIO_LCD_3V3|SA1110_EIO_LCD_CTRL|SA1110_EIO_LCD_5V|SA1110_EIO_LCD_VDD, + SA1110_EIO_LCD_3V3_ON|SA1110_EIO_LCD_CTRL_ON|SA1110_EIO_LCD_5V_ON|SA1110_EIO_LCD_VDD_ON); + lcd_brightness(_lcd_brightness); + } + enabled = true; + } else { + if (enabled) { + lcd_brightness(0); + ipaq_EGPIO(SA1110_EIO_LCD_3V3|SA1110_EIO_LCD_CTRL|SA1110_EIO_LCD_5V|SA1110_EIO_LCD_VDD, + SA1110_EIO_LCD_3V3_OFF|SA1110_EIO_LCD_CTRL_OFF|SA1110_EIO_LCD_5V_OFF|SA1110_EIO_LCD_VDD_OFF); + } + enabled = false; + } +} +#endif diff --git a/packages/hal/arm/sa11x0/ipaq/current/src/redboot_cmds.c b/packages/hal/arm/sa11x0/ipaq/current/src/redboot_cmds.c new file mode 100644 --- /dev/null +++ b/packages/hal/arm/sa11x0/ipaq/current/src/redboot_cmds.c @@ -0,0 +1,220 @@ +//========================================================================== +// +// redboot_cmds.c +// +// iPAQ [platform] specific RedBoot commands +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Richard Panton +// Date: 2001-02-24 +// Purpose: +// Description: +// +// This code is part of RedBoot (tm). +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include + +#include // Board definitions +#include +#include +#include + +// Exported CLI function(s) +RedBoot_cmd("gpio", + "Query and/or set the GPIO status", + "[-s bits] [-c bits]", + do_gpio + ); + +RedBoot_cmd("egpio", + "Query and/or set the EGPIO status", + "[-s bits] [-c bits]", + do_egpio + ); + +RedBoot_cmd("mem", + "Set a memory location", + "[-h|-b] [-a
] ", + do_mem + ); + +RedBoot_cmd("physaddr", + "Converts a virtual to a physical address", + "
", + do_physaddr + ); + +static void +do_gpio(int argc,char *argv[]) { + struct option_info opts[2]; + bool set_bits_set, clr_bits_set; + int set_bits, clr_bits; + init_opts(&opts[0], 's', true, OPTION_ARG_TYPE_NUM, + (void **)&set_bits, (bool *)&set_bits_set, "bits to set"); + init_opts(&opts[1], 'c', true, OPTION_ARG_TYPE_NUM, + (void **)&clr_bits, (bool *)&clr_bits_set, "bits to clear"); + if (!scan_opts(argc, argv, 1, opts, 2, NULL, 0, NULL)) + { + return; + } + if ( !set_bits_set && !clr_bits_set ) { + // display only + printf(" gpio = 0x%08lX\n", *SA11X0_GPIO_PIN_LEVEL); + printf(" 0x%08lX are output\n", *SA11X0_GPIO_PIN_DIRECTION); + printf(" 0x%08lX rising edge detect\n", *SA11X0_GPIO_RISING_EDGE_DETECT); + printf(" 0x%08lX falling edge detect\n", *SA11X0_GPIO_FALLING_EDGE_DETECT); + printf(" 0x%08lX edge detect status\n", *SA11X0_GPIO_EDGE_DETECT_STATUS); + printf(" 0x%08lX alternate function\n", *SA11X0_GPIO_ALTERNATE_FUNCTION); + return; + } + printf( " gpio 0x%08lX, ", *SA11X0_GPIO_PIN_LEVEL); + if ( set_bits_set ) { + printf("set(0x%08X) ",set_bits); + *SA11X0_GPIO_PIN_OUTPUT_SET = set_bits; + } + if ( clr_bits_set ) { + printf("clear(0x%08X) ",clr_bits); + *SA11X0_GPIO_PIN_OUTPUT_CLEAR = clr_bits; + } + printf( "gives 0x%08lX\n", *SA11X0_GPIO_PIN_LEVEL); +} + +static void +do_egpio(int argc,char *argv[]) { + struct option_info opts[2]; + bool set_bits_set, clr_bits_set; + int set_bits, clr_bits; + init_opts(&opts[0], 's', true, OPTION_ARG_TYPE_NUM, + (void **)&set_bits, (bool *)&set_bits_set, "bits to set"); + init_opts(&opts[1], 'c', true, OPTION_ARG_TYPE_NUM, + (void **)&clr_bits, (bool *)&clr_bits_set, "bits to clear"); + if (!scan_opts(argc, argv, 1, opts, 2, NULL, 0, NULL)) return; + if ( !set_bits_set && !clr_bits_set ) { + // display only + printf(" egpio = 0x%04X\n", (int)(_ipaq_EGPIO & 0xffff)); + return; + } + printf( " egpio 0x%04X, ", (int)(_ipaq_EGPIO & 0xffff)); + if ( set_bits_set ) { + printf("set(0x%08X) ",set_bits); + ipaq_EGPIO( set_bits, set_bits ); + } + if ( clr_bits_set ) { + printf("clear(0x%08X) ",clr_bits); + ipaq_EGPIO( clr_bits, 0x0000 ); + } + printf( "gives 0x%04X\n", (int)(_ipaq_EGPIO & 0xffff)); +} + +static void +do_mem(int argc, char *argv[]) { + struct option_info opts[3]; + bool mem_half_word, mem_byte; + static int address = 0x00000000; + int value; + init_opts(&opts[0], 'b', false, OPTION_ARG_TYPE_FLG, + (void**)&mem_byte, 0, "write a byte"); + init_opts(&opts[1], 'h', false, OPTION_ARG_TYPE_FLG, + (void**)&mem_half_word, 0, "write a half-word"); + init_opts(&opts[2], 'a', true, OPTION_ARG_TYPE_NUM, + (void**)&address, NULL, "address to write at"); + if (!scan_opts(argc, argv, 1, opts, 3, (void*)&value, OPTION_ARG_TYPE_NUM, "address to set")) + return; + if ( mem_byte && mem_half_word ) { + printf("*ERR: Should not specify both byte and half-word access\n"); + } else if ( mem_byte ) { + *(cyg_uint8*)address = (cyg_uint8)(value & 255); + printf(" Set 0x%08X to 0x%02X (result 0x%02X)\n", address, value & 255, (int)*(cyg_uint8*)address ); + } else if ( mem_half_word ) { + if ( address & 1 ) { + printf( "*ERR: Badly aligned address 0x%08X for half-word store\n", address ); + } else { + *(cyg_uint16*)address = (cyg_uint16)(value & 0xffff); + printf(" Set 0x%08X to 0x%04X (result 0x%04X)\n", address, value & 0xffff, (int)*(cyg_uint16*)address ); + } + } else { + if ( address & 3 ) { + printf( "*ERR: Badly aligned address 0x%08X for word store\n", address ); + } else { + *(cyg_uint32*)address = (cyg_uint32)value; + printf(" Set 0x%08X to 0x%08X (result 0x%08X)\n", address, value, (int)*(cyg_uint32*)address ); + } + } +} + +static void +do_physaddr(int argc, char *argv[]) { + unsigned long phys_addr, virt_addr; + + if ( !scan_opts(argc,argv,1,0,0,(void*)&virt_addr, OPTION_ARG_TYPE_NUM, "virtual address") ) + return; + phys_addr = hal_virt_to_phys_address(virt_addr); + printf("Virtual addr %p = physical addr %p\n", virt_addr, phys_addr); +} + +// Get here when RedBoot is idle. If it's been long enough, then +// dim the LCD. The problem is - how to determine other activities +// so at this doesn't get in the way. In the default case, this will +// be called from RedBoot every 10ms (CYGNUM_REDBOOT_CLI_IDLE_TIMEOUT) + +#define MAX_IDLE_TIME (30*100) + +static void +idle(bool is_idle) +{ + static int idle_time = 0; + static bool was_idled = false; + + if (is_idle) { + if (!was_idled) { + if (++idle_time == MAX_IDLE_TIME) { + was_idled = true; +#ifdef CYGSEM_IPAQ_LCD_COMM + lcd_on(false); +#endif + } + } + } else { + idle_time = 0; + if (was_idled) { + was_idled = false; +#ifdef CYGSEM_IPAQ_LCD_COMM + lcd_on(true); +#endif + } + } +} + +RedBoot_idle(idle, RedBoot_AFTER_NETIO); diff --git a/packages/hal/arm/sa11x0/sa1100mm/current/ChangeLog b/packages/hal/arm/sa11x0/sa1100mm/current/ChangeLog --- a/packages/hal/arm/sa11x0/sa1100mm/current/ChangeLog +++ b/packages/hal/arm/sa11x0/sa1100mm/current/ChangeLog @@ -1,3 +1,9 @@ +2001-03-08 Jesper Skov + + * cdl/hal_arm_sa11x0_sa1100mm.cdl: Removed + CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT_GUARANTEED which is now the + default. + 2001-02-23 Gary Thomas * misc/redboot_ROM.ecm: Renamed from redboot_ROM.cfg diff --git a/packages/hal/arm/sa11x0/sa1100mm/current/cdl/hal_arm_sa11x0_sa1100mm.cdl b/packages/hal/arm/sa11x0/sa1100mm/current/cdl/hal_arm_sa11x0_sa1100mm.cdl --- a/packages/hal/arm/sa11x0/sa1100mm/current/cdl/hal_arm_sa11x0_sa1100mm.cdl +++ b/packages/hal/arm/sa11x0/sa1100mm/current/cdl/hal_arm_sa11x0_sa1100mm.cdl @@ -55,7 +55,6 @@ cdl_package CYGPKG_HAL_ARM_SA11X0_SA1100 implements CYGINT_HAL_DEBUG_GDB_STUBS implements CYGINT_HAL_DEBUG_GDB_STUBS_BREAK implements CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT - implements CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT_GUARANTEED define_proc { puts $::cdl_system_header "#define CYGBLD_HAL_TARGET_H " diff --git a/packages/hal/arm/sa11x0/var/current/ChangeLog b/packages/hal/arm/sa11x0/var/current/ChangeLog --- a/packages/hal/arm/sa11x0/var/current/ChangeLog +++ b/packages/hal/arm/sa11x0/var/current/ChangeLog @@ -1,3 +1,53 @@ +2001-03-23 Gary Thomas + + * src/redboot_linux_exec.c (do_exec): + Entry point must be a physical address. + + * cdl/hal_arm_sa11x0.cdl: + Allow platforms to override default clock speed. + +2001-03-20 Gary Thomas + + * src/redboot_linux_exec.c (do_exec): Improve wait timeout. + +2001-03-07 Hugo Tyson + + * src/redboot_linux_exec.c: Do not build anything if + HAL_PLATFORM_MACHINE_TYPE is not defined. + +2001-03-02 Gary Thomas + + * cdl/hal_arm_sa11x0.cdl: HAL_PLF_INIT stuff moved to hal/common. + +2001-03-01 Gary Thomas + + * src/sa11x0_misc.c: + * cdl/hal_arm_sa11x0.cdl: New interface CYGINT_HAL_PLF_IF_INIT + which, if defined, indicates that the platform has plf_if_init. + +2001-03-01 Hugo Tyson + + * src/sa11x0_misc.c: Remove warnings from lack of prototype for + plf_if_init() - for platforms that don't have it. + +2001-02-28 Gary Thomas + + * src/sa11x0_misc.c: Allow platform to perform additional + I/O initialization (virtual vector based). The function + plf_if_init() can be overridden by platform code for this. + +2001-02-28 Hugo Tyson + + * include/hal_sa11x0.h (SA11X0_TUCR_RESERVED_BITS): + (SA11X0_TUCR_EXTERNAL_MEMORY_MASTER): Add definitions of these + bits for enabling an external bus master. + +2001-02-28 Hugo Tyson + + * include/hal_sa11x0.h (SA11X0_OWER): Add OS Timer Watchdog Match + Enable Register for use by Watchdog package. + (SA11X0_OWER_ENABLE): And a long-winded "1" to enable it. + 2001-02-24 Gary Thomas * cdl/hal_arm_sa11x0.cdl: Add RedBoot commands/options. diff --git a/packages/hal/arm/sa11x0/var/current/cdl/hal_arm_sa11x0.cdl b/packages/hal/arm/sa11x0/var/current/cdl/hal_arm_sa11x0.cdl --- a/packages/hal/arm/sa11x0/var/current/cdl/hal_arm_sa11x0.cdl +++ b/packages/hal/arm/sa11x0/var/current/cdl/hal_arm_sa11x0.cdl @@ -65,7 +65,8 @@ cdl_package CYGPKG_HAL_ARM_SA11X0 { active_if { CYG_HAL_STARTUP == "ROM" } flavor data legal_values 59000 73700 88500 103200 118000 132700 147500 162200 176900 191700 206400 221200 - default_value 221200 + default_value { CYGHWR_HAL_ARM_SA11X0_PROCESSOR_CLOCK_OVERRIDE_DEFAULT ? + CYGHWR_HAL_ARM_SA11X0_PROCESSOR_CLOCK_OVERRIDE_DEFAULT : 221200} description " The SA-1100 processor can run at various frequencies. These values are expressed in KHz. Note that there are diff --git a/packages/hal/arm/sa11x0/var/current/include/hal_sa11x0.h b/packages/hal/arm/sa11x0/var/current/include/hal_sa11x0.h --- a/packages/hal/arm/sa11x0/var/current/include/hal_sa11x0.h +++ b/packages/hal/arm/sa11x0/var/current/include/hal_sa11x0.h @@ -23,7 +23,7 @@ // // The Initial Developer of the Original Code is Red Hat. // Portions created by Red Hat are -// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. // All Rights Reserved. // ------------------------------------------- // @@ -379,6 +379,7 @@ #define SA11X0_OSMR3 SA11X0_REGISTER(0x1000000C) #define SA11X0_OSCR SA11X0_REGISTER(0x10000010) #define SA11X0_OSSR SA11X0_REGISTER(0x10000014) +#define SA11X0_OWER SA11X0_REGISTER(0x10000018) #define SA11X0_OIER SA11X0_REGISTER(0x1000001C) #define SA11X0_RCNR SA11X0_REGISTER(0x10010004) #define SA11X0_RTTR SA11X0_REGISTER(0x10010008) @@ -396,6 +397,9 @@ #define SA11X0_OIER_TIMER2 (1<<2) #define SA11X0_OIER_TIMER3 (1<<3) +// OS Timer Watchdog Match Enable Register +#define SA11X0_OWER_ENABLE (1<<0) // write-once! + /* * SA-1100 Reset Controller Register Definition */ @@ -403,6 +407,9 @@ #define SA11X0_RESET_STATUS SA11X0_REGISTER(0x10030004) #define SA11X0_TUCR SA11X0_REGISTER(0x10030008) +#define SA11X0_TUCR_EXTERNAL_MEMORY_MASTER (1<<10) +#define SA11X0_TUCR_RESERVED_BITS 0x1FFFF9FF + /* * SA-1100 Reset Controller Bit Field Definitions */ diff --git a/packages/hal/arm/sa11x0/var/current/src/redboot_linux_exec.c b/packages/hal/arm/sa11x0/var/current/src/redboot_linux_exec.c --- a/packages/hal/arm/sa11x0/var/current/src/redboot_linux_exec.c +++ b/packages/hal/arm/sa11x0/var/current/src/redboot_linux_exec.c @@ -49,6 +49,8 @@ #include #include +#ifdef HAL_PLATFORM_MACHINE_TYPE + // Exported CLI function(s) static void do_exec(int argc, char *argv[]); RedBoot_cmd("exec", @@ -210,7 +212,7 @@ do_exec(int argc, char *argv[]) char *cmd_line; struct tag *params = (struct tag *)0x0100; - entry = (unsigned long)entry_address; // Default from last 'load' operation + entry = (unsigned long)UNMAPPED_ADDR(0xC0008000); // Default Linux execute address base_addr = 0x8000; ramdisk_size = 4096*1024; init_opts(&opts[0], 'w', true, OPTION_ARG_TYPE_NUM, @@ -225,7 +227,7 @@ do_exec(int argc, char *argv[]) (void **)&ramdisk_addr, (bool *)&ramdisk_addr_set, "ramdisk_addr"); init_opts(&opts[5], 's', true, OPTION_ARG_TYPE_NUM, (void **)&ramdisk_size, (bool *)&ramdisk_size_set, "ramdisk_size"); - if (!scan_opts(argc, argv, 1, opts, 6, (void *)&entry, OPTION_ARG_TYPE_NUM, "starting address")) + if (!scan_opts(argc, argv, 1, opts, 6, (void *)&entry, OPTION_ARG_TYPE_NUM, "[physical] starting address")) { return; } @@ -260,11 +262,18 @@ do_exec(int argc, char *argv[]) params->hdr.tag = ATAG_NONE; if (wait_time_set) { + int script_timeout_ms = wait_time * 1000; + unsigned char *hold_script = script; printf("About to start execution at %p - abort with ^C within %d seconds\n", (void *)entry, wait_time); - res = gets(line, sizeof(line), wait_time*1000); - if (res == _GETS_CTRLC) { - return; + script = (unsigned char *)0; + while (script_timeout_ms >= CYGNUM_REDBOOT_CLI_IDLE_TIMEOUT) { + res = gets(line, sizeof(line), CYGNUM_REDBOOT_CLI_IDLE_TIMEOUT); + if (res == _GETS_CTRLC) { + script = hold_script; // Re-enable script + return; + } + script_timeout_ms -= CYGNUM_REDBOOT_CLI_IDLE_TIMEOUT; } } if (base_addr_set && !length_set) { @@ -273,7 +282,7 @@ do_exec(int argc, char *argv[]) } ip = (unsigned long *)&&lab1; _prg = (unsigned long *)0x1F00; // Should be a very safe location to execute from - fun = (code_fun *)UNMAPPED_ADDR(entry); + fun = (code_fun *)entry; prg = (code_fun *)UNMAPPED_ADDR(_prg); base_addr = UNMAPPED_ADDR(base_addr); for (i = 0; i < (unsigned long)&&end1-(unsigned long)&&lab1; i++) { @@ -328,3 +337,7 @@ do_exec(int argc, char *argv[]) "movs pc,lr" : : ); end1: } + +#endif // HAL_PLATFORM_MACHINE_TYPE - otherwise we do not support this stuff... + +// EOF redboot_linux_exec.c diff --git a/packages/hal/arm/sa11x0/var/current/src/sa11x0_misc.c b/packages/hal/arm/sa11x0/var/current/src/sa11x0_misc.c --- a/packages/hal/arm/sa11x0/var/current/src/sa11x0_misc.c +++ b/packages/hal/arm/sa11x0/var/current/src/sa11x0_misc.c @@ -99,7 +99,6 @@ void hal_hardware_init(void) HAL_ICACHE_ENABLE(); } - // ------------------------------------------------------------------------- static cyg_uint32 clock_period; diff --git a/packages/hal/common/current/ChangeLog b/packages/hal/common/current/ChangeLog --- a/packages/hal/common/current/ChangeLog +++ b/packages/hal/common/current/ChangeLog @@ -1,3 +1,86 @@ +2001-03-28 Jonathan Larmour + + * include/dbg-threads-api.h: Add dbg_thread_id() function prototype. + +2001-03-21 Mark Salter + + * src/hal_if.c (hal_if_init): Add explicit typecast when setting + version. Needed when sizeof(int) < sizeof(CYG_ADDRWORD). + +2001-03-21 Jesper Skov + + * src/hal_if.c (hal_if_init): Added warning about debugging. + +2001-03-20 Jonathan Larmour + + * include/hal_if.h: Add argument names to __call_if_flash_cfg_op_fn_t + +2001-03-16 Mark Salter + + * src/hal_stub.c (__build_t_packet): Add hook for adding arch-specific + registers to T packet. + (handle_exception_cleanup): Skip orig_registers past breakpoint so we + return to original context rather than hit breakpoint again. + +2001-03-16 Hugo Tyson + + * include/hal_if.h: Define types and slots and macros themed with + the phrase CALL_IF_FLASH_CFG_OP following the pattern of what's + there for the other slots. Thus CYGNUM_CALL_IF_FLASH_CFG_OP, + CYGACC_CALL_IF_FLASH_CFG_OP(...) and __call_if_flash_cfg_op_fn_t + are all newly defined. Also CYGNUM_CALL_IF_FLASH_CFG_GET which is + the only operation supported in this initial version. + + Also changed many typedef'd function pointers to not include the + pointerness; that way the type can be used to validate the + correctness of arguments in the called function. + + * src/hal_stub.c (__reset): Minor change to reset function + handling; pointerness of typedef removed. + + * src/hal_if.c (flash_config_op): New function to call flash ops + in RedBoot. This is so that RedBoot can manage ethernet addresses + for you, and the application can get at the data "cleanly". + (hal_if_init): Install flash_config_op() in the table if defined. + +2001-03-12 Mark Salter + + * src/hal_misc.c (cyg_hal_user_break): Use macro to find PC + in saved regs. + + * src/generic-stub.c: Add support for harvard memories. + * src/bplist-dynamic.c: Ditto. + * include/generic-stub.h: Ditto. + * include/hal_stub.h: Add dummy harvard memory macros for + princeton memory systems. + +2001-03-12 Jesper Skov + + * src/drv_api.c (cyg_drv_interrupt_detach): Fix missing intr-> + change. + +2001-03-08 Jesper Skov + + * cdl/hal.cdl: Change sense of + CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT_GUARANTEED to new + CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT_NOT_GUARANTEED. + +2001-03-07 Jesper Skov + + * src/drv_api.c: Use macro to provide symbol alias. + +2001-03-05 Jesper Skov + + * src/hal_if.c (hal_if_diag_init): Ensure the function only + executes once. + +2001-03-02 Gary Thomas + + * cdl/hal.cdl: + * include/hal_if.h: + * src/hal_if.c (hal_if_init): + Support platform specific initializations. + 2001-02-26 Mark Salter * src/generic-stub.c (__process_packet): Change 'k' packet to cause diff --git a/packages/hal/common/current/cdl/hal.cdl b/packages/hal/common/current/cdl/hal.cdl --- a/packages/hal/common/current/cdl/hal.cdl +++ b/packages/hal/common/current/cdl/hal.cdl @@ -139,12 +139,12 @@ cdl_package CYGPKG_HAL { } - cdl_interface CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT_GUARANTEED { - display "The platform port was written with vector support" + cdl_interface CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT_NOT_GUARANTEED { + display "The platform port predates virtual vectors" no_define description " Many platform HALs have adopted the virtual vector support - after its introduction. On those platforms, old ROM + only after its introduction. On those platforms, old ROM monitors will not provide the necessary services - and so the use of these services should be disabled per default. Newer ports, however, guarantee to provide the necessary @@ -167,7 +167,7 @@ cdl_package CYGPKG_HAL { cdl_option CYGSEM_HAL_VIRTUAL_VECTOR_INHERIT_CONSOLE { display "Inherit console settings from ROM monitor" active_if CYGSEM_HAL_USE_ROM_MONITOR - default_value { CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT_GUARANTEED \ + default_value { !CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT_NOT_GUARANTEED \ && !CYGSEM_HAL_VIRTUAL_VECTOR_CLAIM_COMMS } description " When this option is set, the application will inherit @@ -199,7 +199,7 @@ cdl_package CYGPKG_HAL { cdl_option CYGSEM_HAL_VIRTUAL_VECTOR_INIT_WHOLE_TABLE { display "Initialize whole of virtual vector table" - default_value { CYG_HAL_STARTUP != "RAM" || !CYGSEM_HAL_USE_ROM_MONITOR || !CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT_GUARANTEED } + default_value { CYG_HAL_STARTUP != "RAM" || !CYGSEM_HAL_USE_ROM_MONITOR || CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT_NOT_GUARANTEED } requires CYGSEM_HAL_VIRTUAL_VECTOR_CLAIM_ICTRL requires CYGSEM_HAL_VIRTUAL_VECTOR_CLAIM_RESET requires CYGSEM_HAL_VIRTUAL_VECTOR_CLAIM_DELAY_US @@ -358,6 +358,15 @@ cdl_package CYGPKG_HAL { } + # Does platform need special I/O initializations? + cdl_interface CYGINT_HAL_PLF_IF_INIT { + display "Platform defined I/O channels." + description " + Platforms which provide additional I/O channels can implement + this interface, indicating that the function plf_if_init() + needs to be called." + } + define_proc { puts $::cdl_header "/***** proc output start *****/" puts $::cdl_header "#include " diff --git a/packages/hal/common/current/include/dbg-threads-api.h b/packages/hal/common/current/include/dbg-threads-api.h --- a/packages/hal/common/current/include/dbg-threads-api.h +++ b/packages/hal/common/current/include/dbg-threads-api.h @@ -73,6 +73,10 @@ externC int dbg_thread_capabilities(stru /* return 1 if defined, 0 if not defined */ externC int dbg_currthread(threadref * varparm) ; +/* Return the unique ID number of a given thread. */ +/* Return 0 if not valid. */ +externC int dbg_thread_id(threadref *threadid); + /* Return the unique ID number of the current thread. */ externC int dbg_currthread_id(void); diff --git a/packages/hal/common/current/include/generic-stub.h b/packages/hal/common/current/include/generic-stub.h --- a/packages/hal/common/current/include/generic-stub.h +++ b/packages/hal/common/current/include/generic-stub.h @@ -23,7 +23,7 @@ // // The Initial Developer of the Original Code is Red Hat. // Portions created by Red Hat are -// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. // All Rights Reserved. // ------------------------------------------- // @@ -150,6 +150,10 @@ extern int __read_mem_safe (void *buf, void *addr, int count); +extern int __read_progmem_safe (void *buf, + void *addr, + int count); + /* Copy COUNT bytes of memory from BUF to ADDR. ADDR is assumed to live in the user program's space. Returns number of bytes successfully read @@ -160,6 +164,10 @@ extern int __write_mem_safe (void *buf, int count); #endif +extern int __write_progmem_safe (void *buf, + void *addr, + int count); + /* Set to a non-zero value if a memory fault occurs while __set_mem_fault_trap () is running. */ extern volatile int __mem_fault; diff --git a/packages/hal/common/current/include/hal_if.h b/packages/hal/common/current/include/hal_if.h --- a/packages/hal/common/current/include/hal_if.h +++ b/packages/hal/common/current/include/hal_if.h @@ -225,8 +225,9 @@ typedef cyg_bool (*__comm_if_getc_timeou #define CYGNUM_CALL_IF_CONSOLE_INTERRUPT_FLAG 17 #define CYGNUM_CALL_IF_DELAY_US 18 #define CYGNUM_CALL_IF_DBG_DATA 19 +#define CYGNUM_CALL_IF_FLASH_CFG_OP 20 -#define CYGNUM_CALL_IF_LAST_ENTRY CYGNUM_CALL_IF_DBG_DATA +#define CYGNUM_CALL_IF_LAST_ENTRY CYGNUM_CALL_IF_FLASH_CFG_OP #define CYGNUM_CALL_IF_INSTALL_BPT_FN 35 @@ -270,22 +271,24 @@ typedef bsp_handler_t *__call_if_dbg_vec typedef bsp_handler_t __call_if_kill_vector_t; typedef hal_virtual_comm_table_t *__call_if_console_procs_t; typedef hal_virtual_comm_table_t *__call_if_debug_procs_t; -typedef void (*__call_if_flush_dcache_t)(void *__p, int __nbytes); -typedef void (*__call_if_flush_icache_t)(void *__p, int __nbytes); +typedef void (__call_if_flush_dcache_t)(void *__p, int __nbytes); +typedef void (__call_if_flush_icache_t)(void *__p, int __nbytes); typedef void* __call_if_cpu_data_t; typedef void* __call_if_board_data_t; -typedef int (*__call_if_sysinfo_t)(int __id, void* __ap); -//typedef int (*__call_if_sysinfo_t)(enum bsp_info_id __id, va_list __ap); -typedef int (*__call_if_set_debug_comm_t)(int __comm_id); -typedef int (*__call_if_set_console_comm_t)(int __comm_id); -typedef int (*__call_if_set_serial_baud_t)(int __comm_id, int __baud); +typedef int (__call_if_sysinfo_t)(int __id, void* __ap); +//typedef int (__call_if_sysinfo_t)(enum bsp_info_id __id, va_list __ap); +typedef int (__call_if_set_debug_comm_t)(int __comm_id); +typedef int (__call_if_set_console_comm_t)(int __comm_id); +typedef int (__call_if_set_serial_baud_t)(int __comm_id, int __baud); typedef void* __call_if_dbg_data_t; -typedef int (*__call_if_dbg_syscall_t) (enum dbg_syscall_ids id, +typedef int (__call_if_dbg_syscall_t) (enum dbg_syscall_ids id, union dbg_thread_syscall_parms *p ); -typedef void (*__call_if_reset_t)(void); +typedef void (__call_if_reset_t)(void); typedef int __call_if_console_interrupt_flag_t; -typedef void (*__call_if_delay_us_t)(cyg_int32 usecs); -typedef void (*__call_if_install_bpt_fn_t)(void *__epc); +typedef void (__call_if_delay_us_t)(cyg_int32 usecs); +typedef void (__call_if_install_bpt_fn_t)(void *__epc); +typedef cyg_bool (__call_if_flash_cfg_op_fn_t)(int __oper, char *__key, + void *__val, int __type); #ifndef CYGACC_CALL_IF_DEFINED @@ -325,12 +328,12 @@ typedef void (*__call_if_install_bpt_fn_ hal_virtual_vector_table[CYGNUM_CALL_IF_DEBUG_PROCS]=(CYG_ADDRWORD)(_x_) #define CYGACC_CALL_IF_FLUSH_DCACHE(_p_, _n_) \ - ((__call_if_flush_dcache_t)hal_virtual_vector_table[CYGNUM_CALL_IF_FLUSH_DCACHE])((_p_), (_n_)) + ((__call_if_flush_dcache_t*)hal_virtual_vector_table[CYGNUM_CALL_IF_FLUSH_DCACHE])((_p_), (_n_)) #define CYGACC_CALL_IF_FLUSH_DCACHE_SET(_x_) \ hal_virtual_vector_table[CYGNUM_CALL_IF_FLUSH_DCACHE]=(CYG_ADDRWORD)(_x_) #define CYGACC_CALL_IF_FLUSH_ICACHE(_p_, _n_) \ - ((__call_if_flush_icache_t)hal_virtual_vector_table[CYGNUM_CALL_IF_FLUSH_ICACHE])((_p_), (_n_)) + ((__call_if_flush_icache_t*)hal_virtual_vector_table[CYGNUM_CALL_IF_FLUSH_ICACHE])((_p_), (_n_)) #define CYGACC_CALL_IF_FLUSH_ICACHE_SET(_x_) \ hal_virtual_vector_table[CYGNUM_CALL_IF_FLUSH_ICACHE]=(CYG_ADDRWORD)(_x_) @@ -345,22 +348,22 @@ typedef void (*__call_if_install_bpt_fn_ hal_virtual_vector_table[CYGNUM_CALL_IF_BOARD_DATA]=(CYG_ADDRWORD)(_x_) #define CYGACC_CALL_IF_SYSINFO(_i_, _a_) \ - ((__call_if_sysinfo_t)hal_virtual_vector_table[CYGNUM_CALL_IF_SYSINFO])((_i_), (_a_)) + ((__call_if_sysinfo_t*)hal_virtual_vector_table[CYGNUM_CALL_IF_SYSINFO])((_i_), (_a_)) #define CYGACC_CALL_IF_SYSINFO_SET(_x_) \ hal_virtual_vector_table[CYGNUM_CALL_IF_SYSINFO]=(CYG_ADDRWORD)(_x_) #define CYGACC_CALL_IF_SET_DEBUG_COMM(_i_) \ - ((__call_if_set_debug_comm_t)hal_virtual_vector_table[CYGNUM_CALL_IF_SET_DEBUG_COMM])((_i_)) + ((__call_if_set_debug_comm_t*)hal_virtual_vector_table[CYGNUM_CALL_IF_SET_DEBUG_COMM])((_i_)) #define CYGACC_CALL_IF_SET_DEBUG_COMM_SET(_x_) \ hal_virtual_vector_table[CYGNUM_CALL_IF_SET_DEBUG_COMM]=(CYG_ADDRWORD)(_x_) #define CYGACC_CALL_IF_SET_CONSOLE_COMM(_i_) \ - ((__call_if_set_console_comm_t)hal_virtual_vector_table[CYGNUM_CALL_IF_SET_CONSOLE_COMM])((_i_)) + ((__call_if_set_console_comm_t*)hal_virtual_vector_table[CYGNUM_CALL_IF_SET_CONSOLE_COMM])((_i_)) #define CYGACC_CALL_IF_SET_CONSOLE_COMM_SET(_x_) \ hal_virtual_vector_table[CYGNUM_CALL_IF_SET_CONSOLE_COMM]=(CYG_ADDRWORD)(_x_) #define CYGACC_CALL_IF_SET_SERIAL_BAUD(_i_, _b_) \ - ((__call_if_set_serial_baud_t)hal_virtual_vector_table[CYGNUM_CALL_IF_SET_SERIAL_BAUD])((_i_), (_b_)) + ((__call_if_set_serial_baud_t*)hal_virtual_vector_table[CYGNUM_CALL_IF_SET_SERIAL_BAUD])((_i_), (_b_)) #define CYGACC_CALL_IF_SET_SERIAL_BAUD_SET(_x_) \ hal_virtual_vector_table[CYGNUM_CALL_IF_SET_SERIAL_BAUD]=(CYG_ADDRWORD)(_x_) @@ -375,11 +378,11 @@ typedef void (*__call_if_install_bpt_fn_ hal_virtual_vector_table[CYGNUM_CALL_IF_DBG_SYSCALL]=(CYG_ADDRWORD)(_x_) #define CYGACC_CALL_IF_RESET() \ - ((__call_if_reset_t)hal_virtual_vector_table[CYGNUM_CALL_IF_RESET])() + ((__call_if_reset_t*)hal_virtual_vector_table[CYGNUM_CALL_IF_RESET])() #define CYGACC_CALL_IF_RESET_SET(_x_) \ hal_virtual_vector_table[CYGNUM_CALL_IF_RESET]=(CYG_ADDRWORD)(_x_) #define CYGACC_CALL_IF_RESET_GET() \ - ((__call_if_reset_t)hal_virtual_vector_table[CYGNUM_CALL_IF_RESET]) + ((__call_if_reset_t*)hal_virtual_vector_table[CYGNUM_CALL_IF_RESET]) #define CYGACC_CALL_IF_CONSOLE_INTERRUPT_FLAG() \ ((__call_if_console_interrupt_flag_t)hal_virtual_vector_table[CYGNUM_CALL_IF_CONSOLE_INTERRUPT_FLAG]) @@ -387,15 +390,21 @@ typedef void (*__call_if_install_bpt_fn_ hal_virtual_vector_table[CYGNUM_CALL_IF_CONSOLE_INTERRUPT_FLAG]=(CYG_ADDRWORD)(_x_) #define CYGACC_CALL_IF_DELAY_US(_u_) \ - ((__call_if_delay_us_t)hal_virtual_vector_table[CYGNUM_CALL_IF_DELAY_US])((_u_)) + ((__call_if_delay_us_t*)hal_virtual_vector_table[CYGNUM_CALL_IF_DELAY_US])((_u_)) #define CYGACC_CALL_IF_DELAY_US_SET(_x_) \ hal_virtual_vector_table[CYGNUM_CALL_IF_DELAY_US]=(CYG_ADDRWORD)(_x_) #define CYGACC_CALL_IF_INSTALL_BPT_FN(_e_) \ - ((__call_if_install_bpt_fn_t)hal_virtual_vector_table[CYGNUM_CALL_IF_INSTALL_BPT_FN])((_e_)) + ((__call_if_install_bpt_fn_t*)hal_virtual_vector_table[CYGNUM_CALL_IF_INSTALL_BPT_FN])((_e_)) #define CYGACC_CALL_IF_INSTALL_BPT_FN_SET(_x_) \ hal_virtual_vector_table[CYGNUM_CALL_IF_INSTALL_BPT_FN]=(CYG_ADDRWORD)(_x_) +#define CYGACC_CALL_IF_FLASH_CFG_OP(_o_,_k_,_d_,_t_) \ + ((__call_if_flash_cfg_op_fn_t*)hal_virtual_vector_table[CYGNUM_CALL_IF_FLASH_CFG_OP])((_o_),(_k_),(_d_),(_t_)) +#define CYGACC_CALL_IF_FLASH_CFG_OP_SET(_x_) \ + hal_virtual_vector_table[CYGNUM_CALL_IF_FLASH_CFG_OP]=(CYG_ADDRWORD)(_x_) +#define CYGNUM_CALL_IF_FLASH_CFG_GET (0) + #endif // CYGACC_CALL_IF_DEFINED //-------------------------------------------------------------------------- @@ -425,6 +434,9 @@ externC cyg_bool hal_ctrlc_check(CYG_A //-------------------------------------------------------------------------- // Functions provided by the HAL interface. externC void hal_if_init(void); +#if 0 != CYGINT_HAL_PLF_IF_INIT +externC void plf_if_init(void); +#endif //----------------------------------------------------------------------------- #endif // CYGONCE_HAL_HAL_IF_H diff --git a/packages/hal/common/current/include/hal_stub.h b/packages/hal/common/current/include/hal_stub.h --- a/packages/hal/common/current/include/hal_stub.h +++ b/packages/hal/common/current/include/hal_stub.h @@ -95,6 +95,14 @@ extern "C" { # endif #endif +//----------------------------------------------------------------------------- +// Dummy definitions for harvard memory support for princeton memory systems. +#ifndef TARGET_HAS_HARVARD_MEMORY +typedef target_register_t target_addr_t; +#define TARGET_ADDR_IS_PROGMEM(x) 0 +#define TARGET_ADDR_TO_PTR(x) ((char *) (x)) +#endif + //---------------------------------------------------------------------------- // Signal definitions to avoid 'signal.h'/ #define SIGHUP 1 /* hangup */ diff --git a/packages/hal/common/current/src/bplist-dynamic.c b/packages/hal/common/current/src/bplist-dynamic.c --- a/packages/hal/common/current/src/bplist-dynamic.c +++ b/packages/hal/common/current/src/bplist-dynamic.c @@ -53,6 +53,11 @@ #include #include +#ifdef TARGET_HAS_HARVARD_MEMORY +#define __read_mem_safe __read_progmem_safe +#define __write_mem_safe __write_progmem_safe +#endif + /* * A simple target breakpoint list without using malloc. * To use this package, you must define HAL_BREAKINST_SIZE to be the size diff --git a/packages/hal/common/current/src/drv_api.c b/packages/hal/common/current/src/drv_api.c --- a/packages/hal/common/current/src/drv_api.c +++ b/packages/hal/common/current/src/drv_api.c @@ -62,7 +62,8 @@ static volatile cyg_int32 isr_disable_counter = 1; // ISR disable counter -volatile cyg_int32 dsr_disable_counter asm("cyg_scheduler_sched_lock"); // DSR disable counter +volatile cyg_int32 dsr_disable_counter // DSR disable counter + CYGBLD_ATTRIB_ASM_ALIAS( cyg_scheduler_sched_lock ); static cyg_interrupt* volatile dsr_list; // List of pending DSRs @@ -591,7 +592,7 @@ externC void cyg_drv_interrupt_detach( c cyg_uint32 index; cyg_interrupt **p; - HAL_TRANSLATE_VECTOR( vector, index ); + HAL_TRANSLATE_VECTOR( intr->vector, index ); p = &chain_list[index]; diff --git a/packages/hal/common/current/src/generic-stub.c b/packages/hal/common/current/src/generic-stub.c --- a/packages/hal/common/current/src/generic-stub.c +++ b/packages/hal/common/current/src/generic-stub.c @@ -11,7 +11,7 @@ int stubhex (unsigned char ch); static void getpacket (char *buffer); static void unlock_thread_scheduler (void); -static uint32 crc32 (unsigned char *ptr, int len, uint32 crc); +static uint32 crc32 (target_addr_t mem, int len, uint32 crc); #endif #include "thread-pkts.h" @@ -456,6 +456,9 @@ int static int hexMemCount; static char *hexMemSrc, *hexMemDst; static int may_fault_mode; +#ifdef TARGET_HAS_HARVARD_MEMORY +static int progMem; +#endif /* Hamburger helper? */ static void @@ -481,6 +484,11 @@ static void } else { len = 1; } +#ifdef TARGET_HAS_HARVARD_MEMORY + if (progMem) + __read_progmem_safe(&val.bytes[0], hexMemSrc, len); + else +#endif __read_mem_safe(&val.bytes[0], hexMemSrc, len); } else { len = 1; @@ -523,6 +531,9 @@ char * hexMemSrc = (unsigned char *) mem; hexMemCount = count; may_fault_mode = may_fault; +#ifdef TARGET_HAS_HARVARD_MEMORY + progMem = 0; +#endif if (may_fault) { @@ -537,6 +548,32 @@ char * return (char *) hexMemDst; } +/* Convert the target memory identified by MEM into HEX, placing result in BUF. + * Return a pointer to the last char put in buf (NUL). In case of a memory + * fault, return 0. + */ + +static char * +__mem2hex_safe (target_addr_t mem, char *buf, int count) +{ + hexMemDst = (unsigned char *) buf; + hexMemSrc = (unsigned char *) TARGET_ADDR_TO_PTR(mem); + hexMemCount = count; + may_fault_mode = 1; +#ifdef TARGET_HAS_HARVARD_MEMORY + progMem = TARGET_ADDR_IS_PROGMEM(mem); +#endif + + if (__set_mem_fault_trap (__mem2hex_helper)) + return 0; + + *hexMemDst = 0; + + return (char *) hexMemDst; +} + + + static void __hex2mem_helper (void) { @@ -574,9 +611,14 @@ static void val.bytes[i] = ch; } - if (may_fault_mode) + if (may_fault_mode) { +#ifdef TARGET_HAS_HARVARD_MEMORY + if (progMem) + __write_progmem_safe (&val.bytes[0], hexMemDst, len); + else +#endif __write_mem_safe (&val.bytes[0], hexMemDst, len); - else + } else *hexMemDst = ch; if (__mem_fault) @@ -606,6 +648,9 @@ char * hexMemDst = (unsigned char *) mem; hexMemCount = count; may_fault_mode = may_fault; +#ifdef TARGET_HAS_HARVARD_MEMORY + progMem = 0; +#endif if (may_fault) { @@ -618,6 +663,28 @@ char * return (char *) hexMemDst; } +/* Convert COUNT bytes of the hex array pointed to by BUF into binary + to be placed in target MEM. Return a pointer to the character AFTER + the last byte written. +*/ +char * +__hex2mem_safe (char *buf, target_addr_t mem, int count) +{ + hexMemSrc = (unsigned char *) buf; + hexMemDst = (unsigned char *) TARGET_ADDR_TO_PTR(mem); + hexMemCount = count; + may_fault_mode = 1; +#ifdef TARGET_HAS_HARVARD_MEMORY + progMem = TARGET_ADDR_IS_PROGMEM(mem); +#endif + + if (__set_mem_fault_trap (__hex2mem_helper)) + return 0; + + return (char *) hexMemDst; +} + + void set_debug_traps (void) { @@ -653,6 +720,35 @@ unsigned int return (numChars); } +/* + * While we find nice hex chars, build a target memory address. + * Return number of chars processed. + */ + +unsigned int +__hexToAddr (char **ptr, target_addr_t *val) +{ + int numChars = 0; + int hexValue; + + *val = 0; + + while (**ptr) + { + hexValue = stubhex (**ptr); + if (hexValue < 0) + break; + + *val = (*val << 4) | hexValue; + numChars ++; + + (*ptr)++; + } + + return (numChars); +} + + /* * Complement of __hexToInt: take an int of size "numBits", * convert it to a hex string. Return length of (unterminated) output. @@ -1121,14 +1217,15 @@ int case 'm': /* mAA..AA,LLLL Read LLLL bytes at address AA..AA */ /* Try to read %x,%x. */ { - target_register_t addr, length; + target_register_t length; char *ptr = &packet[1]; + target_addr_t addr; - if (__hexToInt (&ptr, &addr) + if (__hexToAddr (&ptr, &addr) && *ptr++ == ',' && __hexToInt (&ptr, &length)) { - if (__mem2hex ((char *) addr, remcomOutBuffer, length, 1)) + if (__mem2hex_safe (addr, remcomOutBuffer, length)) break; strcpy (remcomOutBuffer, "E03"); @@ -1145,12 +1242,13 @@ int case 'M': /* MAA..AA,LLLL: Write LLLL bytes at address AA.AA return OK */ /* Try to read '%x,%x:'. */ { - target_register_t addr, length; + target_register_t length; char *ptr = &packet[1], buf[128]; int i; + target_addr_t addr; - if (__hexToInt (&ptr, &addr) - && *ptr++ == ',' + if (__hexToAddr (&ptr, &addr) + && *ptr++ == ',' && __hexToInt (&ptr, &length) && *ptr++ == ':') { @@ -1162,8 +1260,15 @@ int if ((buf[i] = *ptr++) == 0x7d) buf[i] = 0x20 | (*ptr++ & 0xff); - if (__write_mem_safe (buf, (void *)addr, i) != i) - break; +#ifdef TARGET_HAS_HARVARD_MEMORY + if (TARGET_ADDR_IS_PROGMEM(addr)) { + if (__write_progmem_safe (buf, (void *)TARGET_ADDR_TO_PTR(addr), i) != i) + break; + } else +#endif + if (__write_mem_safe (buf, (void *)TARGET_ADDR_TO_PTR(addr), i) != i) + break; + length -= i; addr += i; @@ -1175,7 +1280,7 @@ int } else { - if (__hex2mem (ptr, (char *) addr, length, 1) != NULL) + if (__hex2mem_safe (ptr, addr, length) != NULL) strcpy (remcomOutBuffer, "OK"); else strcpy (remcomOutBuffer, "E03"); @@ -1194,7 +1299,7 @@ int { char *ptr = &packet[1]; - target_register_t addr; + target_addr_t addr; target_register_t sigval = 0; if (packet[0] == 'C' || packet[0] == 'S') @@ -1204,8 +1309,8 @@ int ptr++; } - if (__hexToInt (&ptr, &addr)) - set_pc (addr); + if (__hexToAddr (&ptr, &addr)) + set_pc ((target_register_t)TARGET_ADDR_TO_PTR(addr)); /* Need to flush the instruction cache here, as we may have deposited a breakpoint, and the icache probably has no way of @@ -1340,10 +1445,11 @@ int char *ptr = &packet[1]; target_register_t ztype, addr, length; int err; + target_addr_t taddr; if (__hexToInt (&ptr, &ztype) && *(ptr++) == ',') { - if (__hexToInt (&ptr, &addr)) + if (__hexToAddr (&ptr, &taddr)) { if (*(ptr++) == ',') { @@ -1357,6 +1463,8 @@ int else length = 0; + addr = (target_register_t)TARGET_ADDR_TO_PTR(taddr); + switch (ztype) { case 0: @@ -1704,11 +1812,13 @@ static int tableInit = 0; PTR is assumed to be a pointer in the user program. */ static uint32 -crc32 (ptr, len, crc) - unsigned char *ptr; - int len; - uint32 crc; +crc32 (target_addr_t mem, int len, uint32 crc) { + unsigned char *ptr = (unsigned char *)TARGET_ADDR_TO_PTR(mem); +#ifdef TARGET_HAS_HARVARD_MEMORY + int is_progmem = TARGET_ADDR_IS_PROGMEM(mem); +#endif + if (! tableInit) { /* Initialize the CRC table and the decoding table. */ @@ -1729,6 +1839,11 @@ crc32 (ptr, len, crc) { unsigned char ch; +#ifdef TARGET_HAS_HARVARD_MEMORY + if (is_progmem) + __read_progmem_safe (&ch, (void *)ptr, 1); + else +#endif __read_mem_safe (&ch, (void *)ptr, 1); if (__mem_fault) { @@ -1755,16 +1870,16 @@ process_query (char *pkt) if (strncmp (pkt, "CRC:", 4) == 0) #endif // __ECOS__ { - target_register_t startmem; + target_addr_t startmem; target_register_t length; uint32 our_crc; pkt += 4; - if (__hexToInt (&pkt, &startmem) + if (__hexToAddr (&pkt, &startmem) && *(pkt++) == ',' && __hexToInt (&pkt, &length)) { - our_crc = crc32 ((unsigned char *) startmem, length, 0xffffffff); + our_crc = crc32 (startmem, length, 0xffffffff); if (__mem_fault) { strcpy (remcomOutBuffer, "E01"); diff --git a/packages/hal/common/current/src/hal_if.c b/packages/hal/common/current/src/hal_if.c --- a/packages/hal/common/current/src/hal_if.c +++ b/packages/hal/common/current/src/hal_if.c @@ -59,6 +59,13 @@ #include // hal_vsr_table and others +#ifdef CYGPKG_REDBOOT +#include +#ifdef CYGSEM_REDBOOT_FLASH_CONFIG +#include +#include +#endif +#endif //-------------------------------------------------------------------------- @@ -68,10 +75,32 @@ externC void init_thread_syscall(void * //-------------------------------------------------------------------------- // Implementations and function wrappers for monitor services +// flash config state queries +#ifdef CYGSEM_REDBOOT_FLASH_CONFIG + +static __call_if_flash_cfg_op_fn_t flash_config_op; + +static cyg_bool +flash_config_op( int op, char * key, void *val, int type) +{ + switch ( op ) { + case CYGNUM_CALL_IF_FLASH_CFG_GET: + return flash_get_config( key, val, type ); + default: + // nothing else supported yet - though it is expected that "set" + // will fit the same set of arguments, potentially. + break; + } + return 0; +} +#endif + //---------------------------- // Delay uS #ifdef CYGSEM_HAL_VIRTUAL_VECTOR_CLAIM_DELAY_US +static __call_if_delay_us_t delay_us; + static void delay_us(cyg_int32 usecs) { @@ -129,6 +158,9 @@ delay_us(cyg_int32 usecs) // Reset functions #ifdef CYGSEM_HAL_VIRTUAL_VECTOR_CLAIM_RESET + +static __call_if_reset_t reset; + static void reset(void) { @@ -587,6 +619,12 @@ externC void cyg_hal_plf_comms_init(void void hal_if_diag_init(void) { + // This function may be called from various places and the code + // should only run once. + static cyg_uint8 called = 0; + if (called) return; + called = 1; + #ifndef CYGSEM_HAL_VIRTUAL_VECTOR_INHERIT_CONSOLE #if defined(CYGDBG_HAL_DIAG_TO_DEBUG_CHAN) @@ -746,6 +784,31 @@ hal_ctrlc_check(CYG_ADDRWORD vector, CYG void hal_if_init(void) { + //********************************************************************** + // + // Note that if your RAM application is configured to initialize + // the whole table _or_ the communication channels, you _cannot_ + // step through this function with the debugger. If your channel + // configurations are set to the default, you should be able to + // simply step over this function though (or use 'finish' once you + // have entered this function if that GDB command works). + // + // If you really do need to debug this code, the best approach is + // to have a working RedBoot / GDB stub in ROM and then change the + // hal_virtual_vector_table to reside at some other address in the + // RAM configuration than that used by the ROM monitor. Then + // you'll be able to use the ROM monitor to debug the below code + // and check that it does the right thing. + // + // Note that if you have a ROM monitor in ROM/flash which does + // support virtual vectors, you should be able to disable the + // option CYGSEM_HAL_VIRTUAL_VECTOR_INIT_WHOLE_TABLE. On some + // targets (which predate the introduction of virtual vectors) + // that option is enabled per default and needs to be explicitly + // disabled when you have an updated ROM monitor. + // + //********************************************************************** + #ifdef CYGSEM_HAL_VIRTUAL_VECTOR_INIT_WHOLE_TABLE { int i; @@ -758,7 +821,7 @@ hal_if_init(void) // Version number CYGACC_CALL_IF_VERSION_SET(CYGNUM_CALL_IF_TABLE_VERSION_CALL - |(CYGNUM_CALL_IF_TABLE_VERSION_COMM<pc) +#endif + #if defined(CYGPKG_CYGMON) unsigned long cygmon_memsize = 0; #endif @@ -99,7 +105,7 @@ cyg_hal_user_break( CYG_ADDRWORD *regs ) CYGARC_HAL_GET_RETURN_ADDRESS(__ra); if( regs == NULL ) __pc = __ra; - else __pc = sreg->pc; + else CYGARC_HAL_GET_PC_REG(sreg, __pc); CYGACC_CALL_IF_INSTALL_BPT_FN((void *)__pc); diff --git a/packages/hal/common/current/src/hal_stub.c b/packages/hal/common/current/src/hal_stub.c --- a/packages/hal/common/current/src/hal_stub.c +++ b/packages/hal/common/current/src/hal_stub.c @@ -108,6 +108,11 @@ int *_registers_valid = registers_valid; static volatile __PFI __interruptible_control; #endif +// Some architectures need extras regs reported in T packet +#ifndef HAL_STUB_ARCH_T_PACKET_EXTRAS +#define HAL_STUB_ARCH_T_PACKET_EXTRAS(x) +#endif + //----------------------------------------------------------------------------- // Register access @@ -358,6 +363,10 @@ handle_exception_cleanup( void ) int i; for (i = 0; i < (sizeof(registers)/sizeof(registers[0])); i++) orig_registers[i] = registers[i]; + _registers = &orig_registers[0]; + if (__is_breakpoint_function ()) + __skipinst (); + _registers = ®isters[0]; orig_registers_set = 1; } @@ -473,9 +482,9 @@ void __reset (void) { #ifdef CYGSEM_HAL_VIRTUAL_VECTOR_SUPPORT - __call_if_reset_t __rom_reset = CYGACC_CALL_IF_RESET_GET(); + __call_if_reset_t *__rom_reset = CYGACC_CALL_IF_RESET_GET(); if (__rom_reset) - __rom_reset(); + (*__rom_reset)(); #else HAL_PLATFORM_RESET(); #endif @@ -519,34 +528,34 @@ void #ifdef CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT // Include thread ID if thread manipulation is required. { - int id; - - *ptr++ = 't'; - *ptr++ = 'h'; - *ptr++ = 'r'; - *ptr++ = 'e'; - *ptr++ = 'a'; - *ptr++ = 'd'; - *ptr++ = ':'; + int id = dbg_currthread_id (); + + if (id != 0) { + *ptr++ = 't'; + *ptr++ = 'h'; + *ptr++ = 'r'; + *ptr++ = 'e'; + *ptr++ = 'a'; + *ptr++ = 'd'; + *ptr++ = ':'; -#if (CYG_BYTEORDER == CYG_MSBFIRST) - id = dbg_currthread_id (); -#else - // FIXME: Temporary workaround for PR 18903. Thread ID must be - // big-endian in the T packet. - { - unsigned char* bep = (unsigned char*)&id; - int be_id; +#if (CYG_BYTEORDER == CYG_LSBFIRST) + // FIXME: Temporary workaround for PR 18903. Thread ID must be + // big-endian in the T packet. + { + unsigned char* bep = (unsigned char*)&id; + int be_id; - be_id = dbg_currthread_id (); - *bep++ = (be_id >> 24) & 0xff ; - *bep++ = (be_id >> 16) & 0xff ; - *bep++ = (be_id >> 8) & 0xff ; - *bep++ = (be_id & 0xff) ; - } + be_id = id; + *bep++ = (be_id >> 24) & 0xff ; + *bep++ = (be_id >> 16) & 0xff ; + *bep++ = (be_id >> 8) & 0xff ; + *bep++ = (be_id & 0xff) ; + } #endif - ptr = __mem2hex((char *)&id, ptr, sizeof(id), 0); - *ptr++ = ';'; + ptr = __mem2hex((char *)&id, ptr, sizeof(id), 0); + *ptr++ = ';'; + } } #endif @@ -617,6 +626,8 @@ void } ptr = __mem2hex((char *)&addr, ptr, sizeof(addr), 0); *ptr++ = ';'; + + HAL_STUB_ARCH_T_PACKET_EXTRAS(ptr); *ptr++ = 0; } @@ -780,6 +791,134 @@ int return count - memCount; // return number of bytes successfully written } +#ifdef TARGET_HAS_HARVARD_MEMORY +static void +__do_copy_from_progmem (unsigned char* src, unsigned char* dst) +{ + unsigned long *long_dst; + unsigned long *long_src; + unsigned short *short_dst; + unsigned short *short_src; + + __mem_fault = 1; /* Defaults to 'fail'. Is cleared */ + /* when the copy loop completes. */ + __mem_fault_handler = &&err; + + // See if it's safe to do multi-byte, aligned operations + while (memCount) { + if ((memCount >= sizeof(long)) && + (((target_register_t)dst & (sizeof(long)-1)) == 0) && + (((target_register_t)src & (sizeof(long)-1)) == 0)) { + + long_dst = (unsigned long *)dst; + long_src = (unsigned long *)src; + + *long_dst++ = __read_prog_uint32(long_src++); + memCount -= sizeof(long); + + dst = (unsigned char *)long_dst; + src = (unsigned char *)long_src; + } else if ((memCount >= sizeof(short)) && + (((target_register_t)dst & (sizeof(short)-1)) == 0) && + (((target_register_t)src & (sizeof(short)-1)) == 0)) { + + short_dst = (unsigned short *)dst; + short_src = (unsigned short *)src; + + *short_dst++ = __read_prog_uint16(short_src++); + memCount -= sizeof(short); + + dst = (unsigned char *)short_dst; + src = (unsigned char *)short_src; + } else { + *dst++ = __read_prog_uint8(src++); + memCount--; + } + } + + __mem_fault = 0; + + err: + __mem_fault_handler = (void *)0; +} + +static void +__do_copy_to_progmem (unsigned char* src, unsigned char* dst) +{ + unsigned long *long_dst; + unsigned long *long_src; + unsigned short *short_dst; + unsigned short *short_src; + + __mem_fault = 1; /* Defaults to 'fail'. Is cleared */ + /* when the copy loop completes. */ + __mem_fault_handler = &&err; + + // See if it's safe to do multi-byte, aligned operations + while (memCount) { + if ((memCount >= sizeof(long)) && + (((target_register_t)dst & (sizeof(long)-1)) == 0) && + (((target_register_t)src & (sizeof(long)-1)) == 0)) { + + long_dst = (unsigned long *)dst; + long_src = (unsigned long *)src; + + __write_prog_uint32(long_dst++, *long_src++); + memCount -= sizeof(long); + + dst = (unsigned char *)long_dst; + src = (unsigned char *)long_src; + } else if ((memCount >= sizeof(short)) && + (((target_register_t)dst & (sizeof(short)-1)) == 0) && + (((target_register_t)src & (sizeof(short)-1)) == 0)) { + + short_dst = (unsigned short *)dst; + short_src = (unsigned short *)src; + + __write_prog_uint16(short_dst++, *short_src++); + memCount -= sizeof(short); + + dst = (unsigned char *)short_dst; + src = (unsigned char *)short_src; + } else { + __write_prog_uint8(dst++, *src++); + memCount--; + } + } + + __mem_fault = 0; + + err: + __mem_fault_handler = (void *)0; +} + +/* + * __read_progmem_safe: + * Get contents of target memory, abort on error. + */ + +int +__read_progmem_safe (void *dst, void *src, int count) +{ + memCount = count; + __do_copy_from_progmem((unsigned char*) src, (unsigned char*) dst); + return count - memCount; // return number of bytes successfully read +} + +/* + * __write_progmem_safe: + * Set contents of target memory, abort on error. + */ + +int +__write_progmem_safe (void *src, void *dst, int count) +{ + memCount = count; + __do_copy_to_progmem((unsigned char*) src, (unsigned char*) dst); + return count - memCount; // return number of bytes successfully written +} +#endif + //----------------------------------------------------------------------------- // Target extras?! int diff --git a/packages/hal/mips/arch/current/ChangeLog b/packages/hal/mips/arch/current/ChangeLog --- a/packages/hal/mips/arch/current/ChangeLog +++ b/packages/hal/mips/arch/current/ChangeLog @@ -20,6 +20,7 @@ 2001-02-12 Nick Garnett * src/vectors.S: Small tweak of comments to work around tools problem + with mipsisa32 tools. 2001-01-31 Nick Garnett @@ -69,6 +70,8 @@ 2000-12-06 Jesper Skov * include/hal_cache.h: IWAY->_IWAY, DWAY->_DWAY for namespace @@ -145,6 +148,17 @@ 2000-07-21 Drew Moseley + + * include/mips-stub.h: Define CYGARC_REGSIZE_DIFFERS_FROM_TARGET_REGISTER_T + for the MIPS32 targets since GDB needs 64 bit registers regardless of + what size we are really storing. + +2000-07-19 Drew Moseley + + * include/mips-stub.h (CYGARC_SIGN_EXTEND_REGISTERS): Make sure + the stub sign-extends the registers before returning them to GDB. + 2000-07-14 Drew Moseley * src/vectors.S: Added hal_reset_vector_first_code and @@ -163,6 +177,11 @@ 2000-07-14 Drew Moseley + + * include/arch.inc: Support for mips3264. + * include/mips-stub.h: Ditto. + 2000-06-21 Nick Garnett * src/mips-stub.c: Removed use of CYG_LABEL_NAME() and added diff --git a/packages/hal/mips/arch/current/cdl/hal_mips.cdl b/packages/hal/mips/arch/current/cdl/hal_mips.cdl --- a/packages/hal/mips/arch/current/cdl/hal_mips.cdl +++ b/packages/hal/mips/arch/current/cdl/hal_mips.cdl @@ -58,6 +58,7 @@ cdl_package CYGPKG_HAL_MIPS { } compile hal_misc.c context.S mips-stub.c mipsfp.c + compile hal_syscall.c make { /lib/vectors.o : /src/vectors.S diff --git a/packages/hal/mips/arch/current/include/arch.inc b/packages/hal/mips/arch/current/include/arch.inc --- a/packages/hal/mips/arch/current/include/arch.inc +++ b/packages/hal/mips/arch/current/include/arch.inc @@ -177,6 +177,17 @@ # Initialize CPU .macro hal_cpu_init +#if defined(CYGPKG_HAL_MIPS_MIPS32) || defined(CYGPKG_HAL_MIPS_MIPS64) + # Initialize/clear watchpoint registers + mvatc0 zero, C0_WATCHLO + nop + nop + nop + mtc0 zero, C0_WATCHHI + nop + nop + nop +#endif /* CYGPKG_HAL_MIPS_MIPS32 || CYGPKG_HAL_MIPS_MIPS64 */ mtc0 zero,cause # zero cause reg nop la v0,INITIAL_SR # initialize status register diff --git a/packages/hal/mips/arch/current/include/mips-stub.h b/packages/hal/mips/arch/current/include/mips-stub.h --- a/packages/hal/mips/arch/current/include/mips-stub.h +++ b/packages/hal/mips/arch/current/include/mips-stub.h @@ -71,6 +71,20 @@ extern "C" { // We need to sign-extend the registers so GDB doesn't get confused. #define CYGARC_SIGN_EXTEND_REGISTERS +#elif defined(CYGPKG_HAL_MIPS_RM7000) + // Even though we are only working with 32 bit registers, GDB expects 64 bits + #define REGSIZE(X) 8 + typedef unsigned long target_register_t; + + // We need to sign-extend the registers so GDB doesn't get confused. + #define CYGARC_SIGN_EXTEND_REGISTERS +#elif defined(CYGPKG_HAL_MIPS_MIPS32) + // Even though we are only working with 32 bit registers, GDB expects 64 bits + #define REGSIZE(X) 8 + typedef unsigned long target_register_t; + + // We need to sign-extend the registers so GDB doesn't get confused. + #define CYGARC_SIGN_EXTEND_REGISTERS #else #define REGSIZE(X) 4 typedef unsigned long target_register_t; diff --git a/packages/hal/mips/arch/current/src/hal_syscall.c b/packages/hal/mips/arch/current/src/hal_syscall.c new file mode 100644 --- /dev/null +++ b/packages/hal/mips/arch/current/src/hal_syscall.c @@ -0,0 +1,104 @@ +//============================================================================= +// +// hal_syscall.c +// +// +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): msalter +// Contributors:msalter +// Date: 2000-11-5 +// Purpose: +// Description: +// +// +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include + +#ifdef CYGPKG_REDBOOT +#include +#endif + +#if defined(CYGSEM_REDBOOT_BSP_SYSCALLS) + +#include // Our header +#include // HAL_BREAKINST +#include // HAL_xCACHE_x +#include // interrupt disable/restore + +#include // ROM calling interface +#include // Helper functions + +extern CYG_ADDRWORD __do_syscall(CYG_ADDRWORD func, // syscall function number + CYG_ADDRWORD arg1, CYG_ADDRWORD arg2, // up to four args. + CYG_ADDRWORD arg3, CYG_ADDRWORD arg4, + CYG_ADDRWORD *retval); // syscall return value + +#define SYS_exit 1 +#define SYS_interrupt 1000 + +int +hal_syscall_handler(void) +{ + CYG_ADDRWORD func, arg1, arg2, arg3, arg4; + CYG_ADDRWORD err; + + func = get_register(REG_A0); + arg1 = get_register(REG_A1); + arg2 = get_register(REG_A2); + arg3 = get_register(REG_A3); + arg4 = 0; + + put_register(REG_PC, get_register(REG_PC)+4); + + if (func == SYS_exit) { + // We want to stop in exit so that the user may poke around + // to see why his app exited. + return SIGTRAP; + } + + if (func == SYS_interrupt) { + // A console interrupt landed us here. + // Invoke the debug agent so as to cause a SIGINT. + return SIGINT; + } + + if (__do_syscall(func, arg1, arg2, arg3, arg4, &err)) { + put_register(REG_V0, err); + return 0; + } + + return SIGTRAP; +} + +#endif // CYGSEM_REDBOOT_BSP_SYSCALLS diff --git a/packages/hal/mips/atlas/current/ChangeLog b/packages/hal/mips/atlas/current/ChangeLog new file mode 100644 --- /dev/null +++ b/packages/hal/mips/atlas/current/ChangeLog @@ -0,0 +1,204 @@ +2001-03-09 Jesper Skov + + * src/redboot_cmds.c: Added (linux) exec command. + * cdl/hal_mips_atlas.cdl: Build redboot cmd file. + +2001-03-08 Jesper Skov + + * cdl/hal_mips_atlas.cdl: Removed + CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT_GUARANTEED which is now the + default. + +2001-02-23 Gary Thomas + + * misc/redboot_ROM.ecm: Renamed from redboot_ROM.cfg + + * misc/redboot_RAM.ecm: Renamed from redboot_RAM.cfg + +2001-02-19 Nick Garnett + + * src/ser16c550c.c (cyg_hal_plf_serial_isr): Removed enable of + interrupt under RedBoot, apparrently RedBoot already does this + itself. + +2001-02-15 Nick Garnett + + * src/ser16c550c.c (cyg_hal_plf_serial_isr): Added code to set up + ctrl-c interrupt when in RedBoot. + + * src/platform.S: + Added interrupt vector tables. + + * include/plf_io.h: + Moved interrupt controller defines here from plf_intr.h. + + * include/plf_intr.h: + Renumbered interrupts to make them correspond to the bits in the + interrupt controller registers. Removed _MASK defines and + CYGNUM_HAL_INTERRUPT_MASK() macro - now done with a shift. + Moved intc register defines to plf_io.h. + + * include/platform.inc: + Added INITIAL_SR_PLF to permit interrupts for INTN[0]. + Added local interrupt decode and init macros. + +2001-02-08 Jesper Skov + + * cdl/hal_mips_atlas.cdl: Respect channel configuration + constraints. + +2001-01-31 Nick Garnett + + * src/ser16c550c.c (cyg_hal_plf_serial_init_channel): + Added enable of RTS line so that it is compatible with YAMON, + which uses hardware flow control. The main effect of this is to + avoid having to switch flow control on the host during + development. + + * misc/redboot_ROM.cfg: + * misc/redboot_RAM.cfg: + Removed requirement for MIPS32 package. + Enabled CYGSEM_REDBOOT_BSP_SYSCALLS. + + * cdl/hal_mips_atlas.cdl: + Reorganized define_proc so that we can choose the right value for + CYGBLD_HAL_TARGET_H depending on MIPS32 or MIPS64 target. + Moved build options out to relevant variant HALs. + +2001-01-26 Jesper Skov + + * src/hal_diag.c: Removed CYGSEM_HAL_VIRTUAL_VECTOR_DIAG check. + * include/plf_stub.h: Reset macros moved + * include/plf_intr.h: to this file. + +2000-12-22 Bart Veer + (Patch supplied by Mark Salter) + * include/pkgconf/mlt_mips_atlas_*.h, *.mlt, *.ldi + More address changes. + +2000-12-21 Mark Salter + + * include/pkgconf/mlt_mips_atlas_ram.mlt: + Change ram origin and length. + + * include/pkgconf/mlt_mips_atlas_ram.ldi: + * include/pkgconf/mlt_mips_atlas_ram.h: + Regenerated. + + * misc/redboot_RAM.cfg: New file. + * misc/redboot_ROM.cfg: New file. + + * src/ser16c550c.c: Add support for + CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_BAUD + + * include/plf_io.h: Add PCI support. + * src/platform.S: Ditto. + * src/plf_misc.c: Ditto. + + * cdl/hal_mips_atlas.cdl: Add CYGPKG_REDBOOT_HAL_OPTIONS. + Add -msoft-float flag. Add RTC constants. Change default + baud to 115200. + +2000-12-05 Drew Moseley + + * include/platform.inc: Rewrite the memory controller initialization. + * include/plf_io.h: Ditto. + * src/platform.S: Ditto. + + * cdl/hal_mips_atlas.cdl: Do not build the binary image. + +2000-10-20 Jonathan Larmour + + * include/pkgconf/mlt_mips_atlas_rom.mlt: + Reinstate padding to 0x40 + + * include/pkgconf/mlt_mips_atlas_rom.ldi: + Regenerated + +2000-10-20 Jesper Skov + + * include/plf_io.h: Move volatile keyword before type. + * src/hal_diag.c: Same. + +2000-10-20 Jonathan Larmour + + * include/pkgconf/mlt_mips_atlas_ram.mlt: + * include/pkgconf/mlt_mips_atlas_rom.mlt: + Add heap1 section + + * include/pkgconf/mlt_mips_atlas_ram.h: + * include/pkgconf/mlt_mips_atlas_rom.h: + * include/pkgconf/mlt_mips_atlas_ram.ldi: + * include/pkgconf/mlt_mips_atlas_rom.ldi: + Regenerated + +2000-08-14 Drew Moseley + + * src/plf_misc.c (__get_syscall_num): Only define this function if + CYGPKG_CYGMON is defined since Cygmon is the one providing syscall + handling in this case. + +2000-08-10 Drew Moseley + + * cdl/hal_mips_atlas.cdl: Implement STUBS_BREAK and + CYGSEM_HAL_ROM_MONITOR. + + * src/plf_misc.c: Cleanup. + +2000-07-21 Drew Moseley + + * include/platform.inc: Define CYGARC_START_FUNC_UNCACHED so vectors.S + will jump to _start at the uncached address. + +2000-07-21 Drew Moseley + + * src/plf_misc.c: Rearrange the linkage between Cygmon and HAL so + that Cygmon needs HAL but not vice-versa. ie HAL no longer calls + any Cygmon functions. + +2000-07-14 Drew Moseley + + * cdl/hal_mips_atlas.cdl: New file. New platform support + * include/hal_diag.h: Ditto. + * include/platform.inc: Ditto. + * include/plf_cache.h: Ditto. + * include/plf_intr.h: Ditto. + * include/plf_io.h: Ditto. + * include/plf_stub.h: Ditto. + * include/pkgconf/mlt_mips_atlas_ram.h: Ditto. + * include/pkgconf/mlt_mips_atlas_ram.ldi: Ditto. + * include/pkgconf/mlt_mips_atlas_ram.mlt: Ditto. + * include/pkgconf/mlt_mips_atlas_rom.h: Ditto. + * include/pkgconf/mlt_mips_atlas_rom.ldi: Ditto. + * include/pkgconf/mlt_mips_atlas_rom.mlt: Ditto. + * src/hal_diag.c: Ditto. + * src/makefile: Ditto. + * src/platform.S: Ditto. + * src/plf_misc.c: Ditto. + * src/ser16c550c.c: Ditto. + +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//=========================================================================== diff --git a/packages/hal/mips/atlas/current/cdl/hal_mips_atlas.cdl b/packages/hal/mips/atlas/current/cdl/hal_mips_atlas.cdl new file mode 100644 --- /dev/null +++ b/packages/hal/mips/atlas/current/cdl/hal_mips_atlas.cdl @@ -0,0 +1,337 @@ +# ==================================================================== +# +# hal_mips_atlas.cdl +# +# MIPS Atlas board HAL package configuration data +# +# ==================================================================== +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Red Hat eCos Public License +# Version 1.1 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://www.redhat.com/ +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Configurable Operating System, +# released September 30, 1998. +# +# The Initial Developer of the Original Code is Red Hat. +# Portions created by Red Hat are +# Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +# All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +# ==================================================================== +######DESCRIPTIONBEGIN#### +# +# Author(s): dmoseley +# Original data: bartv +# Contributors: +# Date: 2000-06-06 +# +#####DESCRIPTIONEND#### +# +# ==================================================================== + +cdl_package CYGPKG_HAL_MIPS_ATLAS { + display "Atlas evaluation board" + parent CYGPKG_HAL_MIPS + requires { ((((CYGHWR_HAL_MIPS_MIPS32_CORE == "4Kc") || \ + (CYGHWR_HAL_MIPS_MIPS32_CORE == "4Kp") || \ + (CYGHWR_HAL_MIPS_MIPS32_CORE == "4Km")) && CYGPKG_HAL_MIPS_MIPS32) || \ + (((CYGHWR_HAL_MIPS_MIPS64_CORE == "5K") || \ + (CYGHWR_HAL_MIPS_MIPS64_CORE == "20K")) && CYGPKG_HAL_MIPS_MIPS64)) \ + } + include_dir cyg/hal + description " + The Atlas HAL package should be used when targetting the + actual hardware." + + compile hal_diag.c platform.S plf_misc.c ser16c550c.c + + implements CYGINT_HAL_DEBUG_GDB_STUBS + implements CYGINT_HAL_DEBUG_GDB_STUBS_BREAK + implements CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT + + cdl_option CYGBLD_HAL_TARGET_H { + display "Variant header" + flavor data + no_define + calculated { CYGPKG_HAL_MIPS_MIPS32 ? "" : \ + "" } + define -file system.h CYGBLD_HAL_TARGET_H + description "Variant header." + + define_proc { + puts $::cdl_system_header "#define CYGBLD_HAL_PLATFORM_H " + puts $::cdl_system_header "" + puts $::cdl_system_header "/* Make sure we get the CORE type definitions for HAL_PLATFORM_CPU */" + puts $::cdl_system_header "#include CYGBLD_HAL_TARGET_H" + puts $::cdl_system_header "#define HAL_PLATFORM_BOARD \"Atlas\"" + puts $::cdl_system_header "#define HAL_PLATFORM_EXTRA \"\"" + puts $::cdl_system_header "" + puts $::cdl_system_header "#if defined(CYGHWR_HAL_MIPS_MIPS32_CORE_4Kc)" + puts $::cdl_system_header "# define HAL_PLATFORM_CPU \"MIPS32 4Kc\"" + puts $::cdl_system_header "#elif defined(CYGHWR_HAL_MIPS_MIPS32_CORE_4Kp)" + puts $::cdl_system_header "# define HAL_PLATFORM_CPU \"MIPS32 4Kp\"" + puts $::cdl_system_header "#elif defined(CYGHWR_HAL_MIPS_MIPS32_CORE_4Km)" + puts $::cdl_system_header "# define HAL_PLATFORM_CPU \"MIPS32 4Km\"" + puts $::cdl_system_header "#elif defined(CYGHWR_HAL_MIPS_MIPS64_CORE_5K)" + puts $::cdl_system_header "# define HAL_PLATFORM_CPU \"MIPS64 5K\"" + puts $::cdl_system_header "#elif defined(CYGHWR_HAL_MIPS_MIPS64_CORE_20K)" + puts $::cdl_system_header "# define HAL_PLATFORM_CPU \"MIPS64 20K\"" + puts $::cdl_system_header "#else" + puts $::cdl_system_header "# error Unknown Core" + puts $::cdl_system_header "#endif" + puts $::cdl_system_header "" + } + + } + + cdl_component CYG_HAL_STARTUP { + display "Startup type" + flavor data + legal_values {"RAM" "ROM"} + default_value {"ROM"} + no_define + define -file system.h CYG_HAL_STARTUP + description " + Currently only ROM startup type is supported." + } + + cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_BAUD { + display "Diagnostic serial port baud rate" + flavor data + legal_values 9600 19200 38400 57600 115200 + default_value 115200 + description " + This option selects the baud rate used for the diagnostic port. + Note: this should match the value chosen for the GDB port if the + diagnostic and GDB port are the same." + } + + cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL_BAUD { + display "GDB serial port baud rate" + flavor data + legal_values 9600 19200 38400 57600 115200 + default_value 115200 + description " + This option controls the baud rate used for the GDB connection." + } + + # Real-time clock/counter specifics + cdl_component CYGNUM_HAL_RTC_CONSTANTS { + display "Real-time clock constants." + flavor none + + cdl_option CYGNUM_HAL_RTC_NUMERATOR { + display "Real-time clock numerator" + flavor data + calculated 1000000000 + } + cdl_option CYGNUM_HAL_RTC_DENOMINATOR { + display "Real-time clock denominator" + flavor data + calculated 100 + } + cdl_option CYGNUM_HAL_RTC_PERIOD { + display "Real-time clock period" + flavor data + calculated { 40000000 / CYGNUM_HAL_RTC_DENOMINATOR } + description " + The count and compare registers of the Atlas are used + to drive the eCos kernel RTC. The count register + increments at the CPU clock speed." + } + } + + cdl_option CYGBLD_BUILD_GDB_STUBS { + display "Build GDB stub ROM image" + default_value 0 + parent CYGBLD_GLOBAL_OPTIONS + requires { CYG_HAL_STARTUP == "ROM" } + requires CYGSEM_HAL_ROM_MONITOR + requires CYGBLD_BUILD_COMMON_GDB_STUBS + requires CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + requires ! CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT + requires ! CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT + requires ! CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT + requires ! CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM + no_define + description " + This option enables the building of the GDB stubs for the + board. The common HAL controls takes care of most of the + build process, but the final conversion from ELF image to + binary data is handled by the platform CDL, allowing + relocation of the data if necessary." + + make -priority 320 { + /bin/gdb_module.bin : /bin/gdb_module.img + $(OBJCOPY) -O binary $< $@ + } + } + + + cdl_option CYGNUM_HAL_BREAKPOINT_LIST_SIZE { + display "Number of breakpoints supported by the HAL." + flavor data + default_value 25 + description " + This option determines the number of breakpoints supported by the HAL." + } + + cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS { + display "Number of communication channels on the board" + flavor data + calculated 1 + } + + cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL { + display "Debug serial port" + active_if CYGPRI_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL_CONFIGURABLE + flavor data + legal_values 0 to CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS-1 + default_value 0 + description " + The Atlas board has only one serial port. This option + chooses which port will be used to connect to a host + running GDB." + } + + cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL { + display "Diagnostic serial port" + active_if CYGPRI_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_CONFIGURABLE + flavor data + legal_values 0 to CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS-1 + default_value 0 + description " + The Atlas board has only one serial port. This option + chooses which port will be used for diagnostic output." + } + + cdl_component CYGHWR_MEMORY_LAYOUT { + display "Memory layout" + flavor data + no_define + calculated { CYG_HAL_STARTUP == "RAM" ? "mips_atlas_ram" : \ + "mips_atlas_rom" } + + cdl_option CYGHWR_MEMORY_LAYOUT_LDI { + display "Memory layout linker script fragment" + flavor data + no_define + define -file system.h CYGHWR_MEMORY_LAYOUT_LDI + calculated { CYG_HAL_STARTUP == "RAM" ? "" : \ + "" } + } + + cdl_option CYGHWR_MEMORY_LAYOUT_H { + display "Memory layout header file" + flavor data + no_define + define -file system.h CYGHWR_MEMORY_LAYOUT_H + calculated { CYG_HAL_STARTUP == "RAM" ? "" : \ + "" } + } + } + + cdl_option CYGSEM_HAL_USE_ROM_MONITOR { + display "Work with a ROM monitor" + flavor booldata + legal_values { "Generic" "CygMon" "GDB_stubs" } + default_value { CYG_HAL_STARTUP == "RAM" ? "CygMon" : 0 } + parent CYGPKG_HAL_ROM_MONITOR + requires { CYG_HAL_STARTUP == "RAM" } + description " + Support can be enabled for three different varieties of ROM monitor. + This support changes various eCos semantics such as the encoding + of diagnostic output, or the overriding of hardware interrupt + vectors. + Firstly there is \"Generic\" support which prevents the HAL + from overriding the hardware vectors that it does not use, to + instead allow an installed ROM monitor to handle them. This is + the most basic support which is likely to be common to most + implementations of ROM monitor. + \"CygMon\" provides support for the Cygnus ROM Monitor. + And finally, \"GDB_stubs\" provides support when GDB stubs are + included in the ROM monitor or boot ROM." + } + + cdl_option CYGSEM_HAL_ROM_MONITOR { + display "Behave as a ROM monitor" + flavor bool + default_value 1 + parent CYGPKG_HAL_ROM_MONITOR + requires { CYG_HAL_STARTUP == "ROM" } + description " + Enable this option if this program is to be used as a ROM monitor, + i.e. applications will be loaded into RAM on the board, and this + ROM monitor may process exceptions or interrupts generated from the + application. This enables features such as utilizing a separate + interrupt stack when exceptions are generated." + } + + cdl_component CYGPKG_CYGMON_HAL_OPTIONS { + display "CygMon HAL options" + flavor none + no_define + parent CYGPKG_CYGMON + active_if CYGPKG_CYGMON + description " + This option also lists the target's requirements for a valid CygMon + configuration." + + cdl_option CYGBLD_BUILD_CYGMON_BIN { + display "Build CygMon ROM binary image" + active_if CYGBLD_BUILD_CYGMON + default_value 1 + no_define + description "This option enables the conversion of the CygMon ELF + image to a binary image suitable for ROM programming." + + make -priority 325 { + /bin/cygmon.srec : /bin/cygmon.elf + $(OBJCOPY) --strip-debug $< $(@:.bin=.img) + $(OBJCOPY) -O srec $< $@ + } + } + } + + cdl_component CYGPKG_REDBOOT_HAL_OPTIONS { + display "Redboot HAL options" + flavor none + no_define + parent CYGPKG_REDBOOT + active_if CYGPKG_REDBOOT + description " + This option lists the target's requirements for a valid Redboot + configuration." + + compile -library=libextras.a redboot_cmds.c + + cdl_option CYGBLD_BUILD_REDBOOT_BIN { + display "Build Redboot ROM binary image" + active_if CYGBLD_BUILD_REDBOOT + default_value 1 + no_define + description "This option enables the conversion of the Redboot ELF + image to a binary image suitable for ROM programming." + + compile -library=libextras.a + + make -priority 325 { + /bin/redboot.srec : /bin/redboot.elf + $(OBJCOPY) --strip-all $< $(@:.srec=.img) + $(OBJCOPY) -O srec $< $@ + } + } + } + +} diff --git a/packages/hal/mips/atlas/current/include/hal_diag.h b/packages/hal/mips/atlas/current/include/hal_diag.h new file mode 100644 --- /dev/null +++ b/packages/hal/mips/atlas/current/include/hal_diag.h @@ -0,0 +1,86 @@ +#ifndef CYGONCE_HAL_DIAG_H +#define CYGONCE_HAL_DIAG_H + +/*============================================================================= +// +// hal_diag.h +// +// HAL Support for Kernel Diagnostic Routines +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg, gthomas +// Contributors: nickg, gthomas +// Date: 1998-09-11 +// Purpose: HAL Support for Kernel Diagnostic Routines +// Description: Diagnostic routines for use during kernel development. +// Usage: #include +// +//####DESCRIPTIONEND#### +// +//===========================================================================*/ + +#include + +#include + +#if defined(CYGSEM_HAL_VIRTUAL_VECTOR_DIAG) + +#include + +#define HAL_DIAG_INIT() hal_if_diag_init() +#define HAL_DIAG_WRITE_CHAR(_c_) hal_if_diag_write_char(_c_) +#define HAL_DIAG_READ_CHAR(_c_) hal_if_diag_read_char(&_c_) + +#else // everything by steam + +/*---------------------------------------------------------------------------*/ +/* functions implemented in hal_diag.c */ + +externC void hal_diag_init(void); +externC void hal_diag_write_char(char c); +externC void hal_diag_read_char(char *c); + +/*---------------------------------------------------------------------------*/ + +#define HAL_DIAG_INIT() hal_diag_init() + +#define HAL_DIAG_WRITE_CHAR(_c_) hal_diag_write_char(_c_) + +#define HAL_DIAG_READ_CHAR(_c_) hal_diag_read_char(&_c_) + +#endif // CYGSEM_HAL_VIRTUAL_VECTOR_DIAG + +/*---------------------------------------------------------------------------*/ +// LED + +externC void hal_diag_led(int n); + +/*---------------------------------------------------------------------------*/ +/* end of hal_diag.h */ +#endif /* CYGONCE_HAL_DIAG_H */ diff --git a/packages/hal/mips/atlas/current/include/pkgconf/mlt_mips_atlas_ram.h b/packages/hal/mips/atlas/current/include/pkgconf/mlt_mips_atlas_ram.h new file mode 100644 --- /dev/null +++ b/packages/hal/mips/atlas/current/include/pkgconf/mlt_mips_atlas_ram.h @@ -0,0 +1,17 @@ +// eCos memory layout - Fri Oct 20 06:11:28 2000 + +// This is a generated file - do not edit + +#ifndef __ASSEMBLER__ +#include +#include + +#endif +#define CYGMEM_REGION_ram (0x80020000) +#define CYGMEM_REGION_ram_SIZE (0xfe0000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__heap1) []; +#endif +#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1)) +#define CYGMEM_SECTION_heap1_SIZE (0x81000000 - (size_t) CYG_LABEL_NAME (__heap1)) diff --git a/packages/hal/mips/atlas/current/include/pkgconf/mlt_mips_atlas_ram.ldi b/packages/hal/mips/atlas/current/include/pkgconf/mlt_mips_atlas_ram.ldi new file mode 100644 --- /dev/null +++ b/packages/hal/mips/atlas/current/include/pkgconf/mlt_mips_atlas_ram.ldi @@ -0,0 +1,39 @@ +// eCos memory layout - Fri Oct 20 06:11:28 2000 + +// This is a generated file - do not edit + +#include + +MEMORY +{ + ram : ORIGIN = 0x80020000, LENGTH = 0xfe0000 +} + +SECTIONS +{ + SECTIONS_BEGIN + SECTION_rom_vectors (ram, 0x80020000, LMA_EQ_VMA) + SECTION_ROMISC (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_RELOCS (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_init (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_text (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fini (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_rodata (ram, ALIGN (0x8), LMA_EQ_VMA) + SECTION_rodata1 (ram, ALIGN (0x8), LMA_EQ_VMA) + SECTION_data (ram, ALIGN (0x8), LMA_EQ_VMA) + SECTION_data1 (ram, ALIGN (0x8), LMA_EQ_VMA) + SECTION_eh_frame (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_gcc_except_table (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_ctors (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_dtors (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_devtab (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_got (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_dynamic (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_sdata (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_lit8 (ram, ALIGN (0x8), LMA_EQ_VMA) + SECTION_lit4 (ram, ALIGN (0x8), LMA_EQ_VMA) + SECTION_sbss (ram, ALIGN (0x8), LMA_EQ_VMA) + SECTION_bss (ram, ALIGN (0x8), LMA_EQ_VMA) + CYG_LABEL_DEFN(__heap1) = ALIGN (0x8); + SECTIONS_END +} diff --git a/packages/hal/mips/atlas/current/include/pkgconf/mlt_mips_atlas_ram.mlt b/packages/hal/mips/atlas/current/include/pkgconf/mlt_mips_atlas_ram.mlt new file mode 100644 --- /dev/null +++ b/packages/hal/mips/atlas/current/include/pkgconf/mlt_mips_atlas_ram.mlt @@ -0,0 +1,25 @@ +version 0 +region ram 80020000 fe0000 0 ! +section rom_vectors 0 1 0 1 1 1 1 1 80020000 80020000 ROMISC ROMISC ! +section ROMISC 0 4 0 1 0 1 0 1 RELOCS RELOCS ! +section RELOCS 0 4 0 1 0 1 0 1 init init ! +section init 0 4 0 1 0 1 0 1 text text ! +section text 0 4 0 1 0 1 0 1 fini fini ! +section fini 0 4 0 1 0 1 0 1 rodata rodata ! +section rodata 0 8 0 1 0 1 0 1 rodata1 rodata1 ! +section rodata1 0 8 0 1 0 1 0 1 data data ! +section data 0 8 0 1 0 1 0 1 data1 data1 ! +section data1 0 8 0 1 0 1 0 1 eh_frame eh_frame ! +section eh_frame 0 4 0 1 0 1 0 1 gcc_except_table gcc_except_table ! +section gcc_except_table 0 4 0 1 0 1 0 1 ctors ctors ! +section ctors 0 4 0 1 0 1 0 1 dtors dtors ! +section dtors 0 4 0 1 0 1 0 1 devtab devtab ! +section devtab 0 4 0 1 0 1 0 1 got got ! +section got 0 4 0 1 0 1 0 1 dynamic dynamic ! +section dynamic 0 4 0 1 0 1 0 1 sdata sdata ! +section sdata 0 4 0 1 0 1 0 1 lit8 lit8 ! +section lit8 0 8 0 1 0 1 0 1 lit4 lit4 ! +section lit4 0 8 0 1 0 1 0 1 sbss sbss ! +section sbss 0 8 0 1 0 1 0 1 bss bss ! +section bss 0 8 0 1 0 1 0 1 heap1 heap1 ! +section heap1 0 8 0 0 0 0 0 0 ! diff --git a/packages/hal/mips/atlas/current/include/pkgconf/mlt_mips_atlas_rom.h b/packages/hal/mips/atlas/current/include/pkgconf/mlt_mips_atlas_rom.h new file mode 100644 --- /dev/null +++ b/packages/hal/mips/atlas/current/include/pkgconf/mlt_mips_atlas_rom.h @@ -0,0 +1,20 @@ +// eCos memory layout - Fri Oct 20 06:10:29 2000 + +// This is a generated file - do not edit + +#ifndef __ASSEMBLER__ +#include +#include + +#endif +#define CYGMEM_REGION_ram (0x80000400) +#define CYGMEM_REGION_ram_SIZE (0xfffc00) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) +#define CYGMEM_REGION_rom (0x9fc00000) +#define CYGMEM_REGION_rom_SIZE (0x80000) +#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R) +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__heap1) []; +#endif +#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1)) +#define CYGMEM_SECTION_heap1_SIZE (0x81000000 - (size_t) CYG_LABEL_NAME (__heap1)) diff --git a/packages/hal/mips/atlas/current/include/pkgconf/mlt_mips_atlas_rom.ldi b/packages/hal/mips/atlas/current/include/pkgconf/mlt_mips_atlas_rom.ldi new file mode 100644 --- /dev/null +++ b/packages/hal/mips/atlas/current/include/pkgconf/mlt_mips_atlas_rom.ldi @@ -0,0 +1,40 @@ +// eCos memory layout - Fri Oct 20 06:10:29 2000 + +// This is a generated file - do not edit + +#include + +MEMORY +{ + ram : ORIGIN = 0x80000400, LENGTH = 0xfffc00 + rom : ORIGIN = 0x9fc00000, LENGTH = 0x80000 +} + +SECTIONS +{ + SECTIONS_BEGIN + SECTION_rom_vectors (rom, 0x9fc00000, LMA_EQ_VMA) + SECTION_ROMISC (rom, ALIGN (0x40), LMA_EQ_VMA) + SECTION_RELOCS (rom, ALIGN (0x40), LMA_EQ_VMA) + SECTION_init (rom, ALIGN (0x40), LMA_EQ_VMA) + SECTION_text (rom, ALIGN (0x40), LMA_EQ_VMA) + SECTION_fini (rom, ALIGN (0x40), LMA_EQ_VMA) + SECTION_rodata (rom, ALIGN (0x40), LMA_EQ_VMA) + SECTION_rodata1 (rom, ALIGN (0x40), LMA_EQ_VMA) + SECTION_data (ram, 0x80000400, FOLLOWING (.rodata1)) + SECTION_data1 (ram, ALIGN (0x40), FOLLOWING (.data)) + SECTION_eh_frame (ram, ALIGN (0x40), FOLLOWING (.data1)) + SECTION_gcc_except_table (ram, ALIGN (0x40), FOLLOWING (.eh_frame)) + SECTION_ctors (ram, ALIGN (0x40), FOLLOWING (.gcc_except_table)) + SECTION_dtors (ram, ALIGN (0x40), FOLLOWING (.ctors)) + SECTION_devtab (ram, ALIGN (0x40), FOLLOWING (.dtors)) + SECTION_got (ram, ALIGN (0x40), FOLLOWING (.devtab)) + SECTION_dynamic (ram, ALIGN (0x40), FOLLOWING (.got)) + SECTION_sdata (ram, ALIGN (0x40), FOLLOWING (.dynamic)) + SECTION_lit8 (ram, ALIGN (0x40), FOLLOWING (.sdata)) + SECTION_lit4 (ram, ALIGN (0x40), FOLLOWING (.lit8)) + SECTION_sbss (ram, ALIGN (0x40), LMA_EQ_VMA) + SECTION_bss (ram, ALIGN (0x40), LMA_EQ_VMA) + CYG_LABEL_DEFN(__heap1) = ALIGN (0x8); + SECTIONS_END +} diff --git a/packages/hal/mips/atlas/current/include/pkgconf/mlt_mips_atlas_rom.mlt b/packages/hal/mips/atlas/current/include/pkgconf/mlt_mips_atlas_rom.mlt new file mode 100644 --- /dev/null +++ b/packages/hal/mips/atlas/current/include/pkgconf/mlt_mips_atlas_rom.mlt @@ -0,0 +1,26 @@ +version 0 +region ram 80000400 fffc00 0 ! +region rom 9fc00000 80000 1 ! +section data 0 40 1 1 1 1 0 1 80000400 data1 data1 ! +section data1 0 40 1 1 0 1 0 1 eh_frame eh_frame ! +section eh_frame 0 40 1 1 0 1 0 1 gcc_except_table gcc_except_table ! +section gcc_except_table 0 40 1 1 0 1 0 1 ctors ctors ! +section ctors 0 40 1 1 0 1 0 1 dtors dtors ! +section dtors 0 40 1 1 0 1 0 1 devtab devtab ! +section devtab 0 40 1 1 0 1 0 1 got got ! +section got 0 40 1 1 0 1 0 1 dynamic dynamic ! +section dynamic 0 40 1 1 0 1 0 1 sdata sdata ! +section sdata 0 40 1 1 0 1 0 1 lit8 lit8 ! +section lit8 0 40 1 1 0 1 0 1 lit4 lit4 ! +section lit4 0 40 1 1 0 1 0 0 sbss ! +section sbss 0 40 0 1 0 1 0 1 bss bss ! +section bss 0 40 0 1 0 1 0 1 heap1 heap1 ! +section heap1 0 8 0 0 0 0 0 0 ! +section rom_vectors 0 1 0 1 1 1 1 1 9fc00000 9fc00000 ROMISC ROMISC ! +section ROMISC 0 40 0 1 0 1 0 1 RELOCS RELOCS ! +section RELOCS 0 40 0 1 0 1 0 1 init init ! +section init 0 40 0 1 0 1 0 1 text text ! +section text 0 40 0 1 0 1 0 1 fini fini ! +section fini 0 40 0 1 0 1 0 1 rodata rodata ! +section rodata 0 40 0 1 0 1 0 1 rodata1 rodata1 ! +section rodata1 0 40 0 1 0 0 0 1 data ! diff --git a/packages/hal/mips/atlas/current/include/platform.inc b/packages/hal/mips/atlas/current/include/platform.inc new file mode 100644 --- /dev/null +++ b/packages/hal/mips/atlas/current/include/platform.inc @@ -0,0 +1,260 @@ +#ifndef CYGONCE_HAL_PLATFORM_INC +#define CYGONCE_HAL_PLATFORM_INC +##============================================================================= +## +## platform.inc +## +## Atlas board assembler header file +## +##============================================================================= +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Red Hat eCos Public License +# Version 1.1 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://www.redhat.com/ +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Configurable Operating System, +# released September 30, 1998. +# +# The Initial Developer of the Original Code is Red Hat. +# Portions created by Red Hat are +# Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +# All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +##============================================================================= +#######DESCRIPTIONBEGIN#### +## +## Author(s): dmoseley +## Contributors: dmoseley +## Date: 2000-06-06 +## Purpose: Atlas board definitions. +## Description: This file contains various definitions and macros that are +## useful for writing assembly code for the Atlas board. +## Usage: +## #include +## ... +## +## +######DESCRIPTIONEND#### +## +##============================================================================= + +#include + +#include +#include + +#------------------------------------------------------------------------------ +# Additional bits for status register. +# We set the IM[0] bit to accept all interrupts. + +#define INITIAL_SR_PLF 0x00000400 + +#------------------------------------------------------------------------------ + +#define CYGPKG_HAL_RESET_VECTOR_FIRST_CODE + .macro hal_reset_vector_first_code + # Branch forward past the board ID register. + b 1f + nop + nop + nop + nop + nop +1: + .endm + +#define CYGPKG_HAL_EARLY_INIT + .macro hal_early_init + # Do these initializations early (rather than in hal_memc_init) so + # we have access to the LEDs on the board for debugging purposes. + + # + # WARNING: THESE WRITES NEED TO HANDLE BYTE-SWAPPING PROPERLY WHEN DOING BIG-ENDIAN + # + + # + # Setup Galileo CPU Interface Register + # + # Set the WriteRate bit - ie Accept 'DDD' back-to-back transfers (see CoreLV "Users Manual") + # All other bits stay the same + # + li k0, CYGARC_UNCACHED_ADDRESS(HAL_GALILEO_REGISTER_BASE) + lw k1, HAL_GALILEO_CPU_INTERFACE_CONFIG_OFFSET(k0) + li k0, HAL_GALILEO_CPU_WRITERATE_MASK + or k1, k1, k0 + li k0, CYGARC_UNCACHED_ADDRESS(HAL_GALILEO_REGISTER_BASE) + sw k1, HAL_GALILEO_CPU_INTERFACE_CONFIG_OFFSET(k0) + + # + # Use BootCS chip-select for the entire device bus region + # + li k1, 0 + sw k1, HAL_GALILEO_CS3_HIGH_DECODE_OFFSET(k0) + li k1, 0xf0 + sw k1, HAL_GALILEO_CSBOOT_LOW_DECODE_OFFSET(k0) + li k1, 0xff + sw k1, HAL_GALILEO_CSBOOT_HIGH_DECODE_OFFSET(k0) + .endm + +#------------------------------------------------------------------------------ +# Interrupt decode macros + +# Only INTN[0] is connected on the Atlas board. We need to access the +# interrupt controller to get the actual vector number. + +#ifndef CYGPKG_HAL_MIPS_INTC_INIT_DEFINED + + .macro hal_intc_init + mfc0 v0,status + nop + lui v1,0xFFFF + ori v1,v1,0x04FF + and v0,v0,v1 # Clear the IntMask bits except IM[0] + mtc0 v0,status + nop + nop + nop + .endm + +#define CYGPKG_HAL_MIPS_INTC_INIT_DEFINED + +#endif + + +#ifndef CYGPKG_HAL_MIPS_INTC_DECODE_DEFINED + .macro hal_intc_decode vnum + + lw v0,HAL_ATLAS_INTSTATUS # Get interrupt status reg + clz v1,v0 # count leading zeros into v1 + la v0,31 # v0 = 31 + sub \vnum,v0,v1 # vnum = 31-v1 == vector number + .endm + + .macro hal_intc_decode_data + .endm + +#define CYGPKG_HAL_MIPS_INTC_DECODE_DEFINED + +// We also define our own interrupt tables in platform.S... +#define CYG_HAL_MIPS_ISR_TABLES_DEFINED + +#endif + +#------------------------------------------------------------------------------ +# Diagnostic macros + +#ifndef CYGPKG_HAL_MIPS_DIAG_DEFINED + + .macro hal_diag_init + .endm + + .macro hal_diag_excpt_start + .endm + + .macro hal_diag_intr_start + .endm + + .macro hal_diag_restore + .endm + +#define CYGPKG_HAL_MIPS_DIAG_DEFINED + +#endif // ifndef CYGPKG_HAL_MIPS_DIAG_DEFINED + +#------------------------------------------------------------------------------ +# MEMC macros. +# + +#if defined(CYG_HAL_STARTUP_ROM) + +#------------------------------------------------------------------------------ +# Make sure the jump to _start in vectors.S is done uncached +# + +#define CYGARC_START_FUNC_UNCACHED + + .macro hal_memc_init + .extern hal_atlas_init_sdram + + lar k0,hal_atlas_init_sdram + CYGARC_ADDRESS_REG_UNCACHED(k0) + jalr k0 + nop + + beqz v0, 2f + nop + + # Error in sizing memory + DEBUG_ASCII_DISPLAY(HAL_DISPLAY_ASCIIPOS0, 'M') + DEBUG_ASCII_DISPLAY(HAL_DISPLAY_ASCIIPOS1, 'E') + DEBUG_ASCII_DISPLAY(HAL_DISPLAY_ASCIIPOS2, 'M') + DEBUG_ASCII_DISPLAY(HAL_DISPLAY_ASCIIPOS3, 'E') + DEBUG_ASCII_DISPLAY(HAL_DISPLAY_ASCIIPOS4, 'R') + DEBUG_ASCII_DISPLAY(HAL_DISPLAY_ASCIIPOS5, 'R') + DEBUG_ASCII_DISPLAY(HAL_DISPLAY_ASCIIPOS6, 'O') + DEBUG_ASCII_DISPLAY(HAL_DISPLAY_ASCIIPOS7, 'R') +1: b 1b + nop + +2: # No error in sizing memory + + # Store the memory size at the base of RAM for later + la k0, 0x80000000 + move k1, k0 + CYGARC_ADDRESS_REG_UNCACHED(k1) + sw v1, 0(k1) + nop + nop + nop + .endm + +#define CYGPKG_HAL_MIPS_MEMC_DEFINED + +#elif defined(CYG_HAL_STARTUP_ROMRAM) +#error ROMRAM STARTUP NOT YET IMPLEMENTED + .macro hal_memc_init + .extern hal_memc_setup + + lar k0,hal_memc_setup + jalr k0 + nop + + # Having got the RAM working, we must now relocate the Entire + # ROM into it and then continue execution from RAM. + + la t0,0x88000000 # dest addr + la t1,0x80000000 # source addr + la t3,__ram_data_end # end dest addr +1: + lw v0,0(t1) # get word + addi t1,t1,4 + sw v0,0(t0) # write word + addi t0,t0,4 + bne t0,t3,1b + nop + + la v0,2f # RAM address to go to + jr v0 + nop +2: + # We are now executing out of RAM! + + .endm + +#define CYGPKG_HAL_MIPS_MEMC_DEFINED + +#endif + +#------------------------------------------------------------------------------ +#endif // ifndef CYGONCE_HAL_PLATFORM_INC +# end of platform.inc diff --git a/packages/hal/mips/atlas/current/include/plf_cache.h b/packages/hal/mips/atlas/current/include/plf_cache.h new file mode 100644 --- /dev/null +++ b/packages/hal/mips/atlas/current/include/plf_cache.h @@ -0,0 +1,64 @@ +#ifndef CYGONCE_PLF_CACHE_H +#define CYGONCE_PLF_CACHE_H + +//============================================================================= +// +// plf_cache.h +// +// HAL cache control API +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg +// Contributors: nickg +// Date: 1998-02-17 +// Purpose: Cache control API +// Description: The macros defined here provide the HAL APIs for handling +// cache control operations. +// Usage: +// #include +// ... +// +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include +#include + +#include + +//============================================================================= + +// Nothing here at present. + +//----------------------------------------------------------------------------- +#endif // ifndef CYGONCE_PLF_CACHE_H +// End of plf_cache.h + diff --git a/packages/hal/mips/atlas/current/include/plf_intr.h b/packages/hal/mips/atlas/current/include/plf_intr.h new file mode 100644 --- /dev/null +++ b/packages/hal/mips/atlas/current/include/plf_intr.h @@ -0,0 +1,158 @@ +#ifndef CYGONCE_HAL_PLF_INTR_H +#define CYGONCE_HAL_PLF_INTR_H + +//========================================================================== +// +// plf_intr.h +// +// Atlas Interrupt and clock support +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg +// Contributors: nickg, jskov, +// gthomas, jlarmour, dmoseley +// Date: 2000-06-06 +// Purpose: Define Interrupt support +// Description: The macros defined here provide the HAL APIs for handling +// interrupts and the clock for the Atlas board. +// +// Usage: +// #include +// ... +// +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include + +#include +#include + +//-------------------------------------------------------------------------- +// Interrupt vectors. + +#ifndef CYGHWR_HAL_INTERRUPT_VECTORS_DEFINED + +// These are decoded via the IP bits of the cause +// register when an external interrupt is delivered. + +#define CYGNUM_HAL_INTERRUPT_SER 0 +#define CYGNUM_HAL_INTERRUPT_TIM0 1 +#define CYGNUM_HAL_INTERRUPT_2 2 +#define CYGNUM_HAL_INTERRUPT_3 3 +#define CYGNUM_HAL_INTERRUPT_RTC 4 +#define CYGNUM_HAL_INTERRUPT_COREHI 5 +#define CYGNUM_HAL_INTERRUPT_CORELO 6 +#define CYGNUM_HAL_INTERRUPT_7 7 +#define CYGNUM_HAL_INTERRUPT_PCIA 8 +#define CYGNUM_HAL_INTERRUPT_PCIB 9 +#define CYGNUM_HAL_INTERRUPT_PCIC 10 +#define CYGNUM_HAL_INTERRUPT_PCID 11 +#define CYGNUM_HAL_INTERRUPT_ENUM 12 +#define CYGNUM_HAL_INTERRUPT_DEG 13 +#define CYGNUM_HAL_INTERRUPT_ATXFAIL 14 +#define CYGNUM_HAL_INTERRUPT_INTA 15 +#define CYGNUM_HAL_INTERRUPT_INTB 16 +#define CYGNUM_HAL_INTERRUPT_INTC 17 +#define CYGNUM_HAL_INTERRUPT_INTD 18 +#define CYGNUM_HAL_INTERRUPT_SERR 19 + +// Min/Max ISR numbers and how many there are +#define CYGNUM_HAL_ISR_MIN 0 +#define CYGNUM_HAL_ISR_MAX 19 +#define CYGNUM_HAL_ISR_COUNT 20 + +#define CYGNUM_HAL_INTERRUPT_DEBUG_UART CYGNUM_HAL_INTERRUPT_SER + +#define CYGHWR_HAL_INTERRUPT_VECTORS_DEFINED + +#endif + +//-------------------------------------------------------------------------- +// Interrupt controller access. + +#ifndef CYGHWR_HAL_INTERRUPT_CONTROLLER_ACCESS_DEFINED + +// Array which stores the configured priority levels for the configured +// interrupts. +externC volatile CYG_BYTE hal_interrupt_level[CYGNUM_HAL_ISR_COUNT]; + +#define HAL_INTERRUPT_MASK( _vector_ ) \ + HAL_WRITE_UINT32( HAL_ATLAS_INTRSTEN, (1<<(_vector_)) ); + +#define HAL_INTERRUPT_UNMASK( _vector_ ) \ + HAL_WRITE_UINT32( HAL_ATLAS_INTSETEN, (1<<(_vector_)) ); + +#define HAL_INTERRUPT_ACKNOWLEDGE( _vector_ ) \ +{ \ +} + +#define HAL_INTERRUPT_CONFIGURE( _vector_, _level_, _up_ ) \ +{ \ +} + +#define HAL_INTERRUPT_SET_LEVEL( _vector_, _level_ ) \ +{ \ +} + +#define CYGHWR_HAL_INTERRUPT_CONTROLLER_ACCESS_DEFINED + +#endif + + +//-------------------------------------------------------------------------- +// Control-C support. + +#if defined(CYGDBG_HAL_MIPS_DEBUG_GDB_CTRLC_SUPPORT) + +# define CYGHWR_HAL_GDB_PORT_VECTOR CYGNUM_HAL_INTERRUPT_SER + +externC cyg_uint32 hal_ctrlc_isr(CYG_ADDRWORD vector, CYG_ADDRWORD data); + +# define HAL_CTRLC_ISR hal_ctrlc_isr + +#endif + + +//---------------------------------------------------------------------------- +// Reset. +#ifndef CYGHWR_HAL_RESET_DEFINED +extern void hal_atlas_reset( void ); +#define CYGHWR_HAL_RESET_DEFINED +#define HAL_PLATFORM_RESET() hal_atlas_reset() + +#define HAL_PLATFORM_RESET_ENTRY 0xbfc00000 + +#endif // CYGHWR_HAL_RESET_DEFINED + +//-------------------------------------------------------------------------- +#endif // ifndef CYGONCE_HAL_PLF_INTR_H +// End of plf_intr.h diff --git a/packages/hal/mips/atlas/current/include/plf_io.h b/packages/hal/mips/atlas/current/include/plf_io.h new file mode 100644 --- /dev/null +++ b/packages/hal/mips/atlas/current/include/plf_io.h @@ -0,0 +1,463 @@ +#ifndef CYGONCE_PLF_IO_H +#define CYGONCE_PLF_IO_H + +//============================================================================= +// +// plf_io.h +// +// Platform specific IO support +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): dmoseley +// Contributors: dmoseley +// Date: 2000-06-06 +// Purpose: Atlas platform IO support +// Description: +// Usage: #include +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include +#include + +#ifdef __ASSEMBLER__ +#define HAL_REG(x) x +#else +#define HAL_REG(x) (volatile CYG_WORD *)(x) +#endif + +//----------------------------------------------------------------------------- + +/* Atlas Memory Definitions */ +#define HAL_ATLAS_RAM_BASE 0x00000000 +#define HAL_ATLAS_PCI_MEM0_BASE 0x08000000 +#define HAL_ATLAS_PCI_MEM0_SIZE 0x08000000 // 128 MB +#define HAL_ATLAS_PCI_MEM1_BASE 0x10000000 +#define HAL_ATLAS_PCI_MEM1_SIZE 0x08000000 // 128 MB +#define HAL_ATLAS_PCI_IO_BASE 0x18000000 +#define HAL_ATLAS_PCI_IO_SIZE 0x03E00000 // 62 MB +#define HAL_ATLAS_CONTROLLER_BASE 0x1BE00000 +#define HAL_ATLAS_CONTROLLER_BASE_ISD_CONFIG (HAL_ATLAS_CONTROLLER_BASE >> 21) +#define HAL_ATLAS_FLASH_BASE 0x1C000000 +#define HAL_ATLAS_FLASH_SIZE SZ_32M +#define HAL_ATLAS_MAX_BANKSIZE SZ_512M + +#define HAL_ATLAS_NULL_DEVNUM 0x0 +#define HAL_ATLAS_SAA9730_DEVNUM 0x9800 +#define HAL_ATLAS_MEMERROR 1 + +/* Atlas Registers */ +#define HAL_ATLAS_REGISTER_BASE 0xBF000000 + +#define HAL_ATLAS_INTBASE HAL_ATLAS_REGISTER_BASE + +#define HAL_ATLAS_INTRAW_OFFSET 0x00000000 +#define HAL_ATLAS_INTSETEN_OFFSET 0x00000008 +#define HAL_ATLAS_INTRSTEN_OFFSET 0x00000010 +#define HAL_ATLAS_INTENABLE_OFFSET 0x00000018 +#define HAL_ATLAS_INTSTATUS_OFFSET 0x00000020 + +#define HAL_ATLAS_INTRAW HAL_REG(HAL_ATLAS_INTBASE + HAL_ATLAS_INTRAW_OFFSET) +#define HAL_ATLAS_INTSETEN HAL_REG(HAL_ATLAS_INTBASE + HAL_ATLAS_INTSETEN_OFFSET) +#define HAL_ATLAS_INTRSTEN HAL_REG(HAL_ATLAS_INTBASE + HAL_ATLAS_INTRSTEN_OFFSET) +#define HAL_ATLAS_INTENABLE HAL_REG(HAL_ATLAS_INTBASE + HAL_ATLAS_INTENABLE_OFFSET) +#define HAL_ATLAS_INTSTATUS HAL_REG(HAL_ATLAS_INTBASE + HAL_ATLAS_INTSTATUS_OFFSET) + + +#define HAL_ATLAS_NMISTATUS_OFFSET 0x00000024 +#define HAL_ATLAS_NMIACK_OFFSET 0x00000104 +#define HAL_ATLAS_SOFTRES_OFFSET 0x00000500 +#define HAL_ATLAS_BRKRES_OFFSET 0x00000508 +#define HAL_ATLAS_REVISION_OFFSET 0x00C00010 + +#define HAL_ATLAS_NMISTATUS HAL_REG(HAL_ATLAS_REGISTER_BASE + HAL_ATLAS_NMISTATUS_OFFSET) +#define HAL_ATLAS_NMIACK HAL_REG(HAL_ATLAS_REGISTER_BASE + HAL_ATLAS_NMIACK_OFFSET) +#define HAL_ATLAS_SOFTRES HAL_REG(HAL_ATLAS_REGISTER_BASE + HAL_ATLAS_SOFTRES_OFFSET) +#define HAL_ATLAS_BRKRES HAL_REG(HAL_ATLAS_REGISTER_BASE + HAL_ATLAS_BRKRES_OFFSET) +#define HAL_ATLAS_REVISION HAL_REG(HAL_ATLAS_REGISTER_BASE + HAL_ATLAS_REVISION_OFFSET) + +/* Atlas NMI controller fields */ +#define HAL_ATLAS_NMISTATUS_FLAG 0x00000001 +#define HAL_ATLAS_NMIACK_FLAG 0x00000001 + +/* Atlas softreset fields */ +#define HAL_ATLAS_GORESET 0x42 + +/* Atlas brkreset fields */ +#define HAL_ATLAS_BRKRES_DEFAULT_VALUE 0xA + +/* Galileo Registers */ +#define HAL_GALILEO_REGISTER_BASE 0xB4000000 +#define HAL_GALILEO_PCI0_MEM0_BASE 0xB2000000 + +#define HAL_GALILEO_CPU_INTERFACE_CONFIG_OFFSET 0x0 +#define HAL_GALILEO_INT_SPACE_DECODE_OFFSET 0x68 +#define HAL_GALILEO_CS3_HIGH_DECODE_OFFSET 0x43c +#define HAL_GALILEO_CSBOOT_LOW_DECODE_OFFSET 0x440 +#define HAL_GALILEO_CSBOOT_HIGH_DECODE_OFFSET 0x444 + +/* Galileo CPU Interface config fields */ +#define HAL_GALILEO_BYTE_SWAP (BIT16 | BIT0) + +#define HAL_GALILEO_CACHEOPMAP_MASK 0x000001FF +#define HAL_GALILEO_CACHEPRES_MASK 0x00000200 +#define HAL_GALILEO_WRITEMODE_MASK 0x00000800 +#define HAL_GALILEO_ENDIAN_MASK 0x00001000 +#define HAL_GALILEO_R5KL2_MASK 0x00004000 +#define HAL_GALILEO_EXT_HIT_DELAY_MASK 0x00008000 +#define HAL_GALILEO_CPU_WRITERATE_MASK 0x00010000 +#define HAL_GALILEO_STOP_RETRY_MASK 0x00020000 +#define HAL_GALILEO_MULTI_GT_MASK 0x00040000 +#define HAL_GALILEO_SYSADCVALID_MASK 0x00080000 + +/* Galileo Memory Controller registers */ +#define HAL_GALILEO_SDRAM_DUPLICATE_BANK_ADDR BIT20 +#define HAL_GALILEO_SDRAM_BANK_INTERLEAVE_DIS BIT14 +#define HAL_GALILEO_CPU_DECODE_SHIFT 21 +#define HAL_GALILEO_DEV_DECODE_SHIFT 20 +#define HAL_GALILEO_SDRAM_SRAS_TO_SCAS_DELAY_3C BIT10 +#define HAL_GALILEO_SDRAM_WIDTH_64BIT BIT6 +#define HAL_GALILEO_SDRAM_SRAS_PRECHARGE_3C BIT3 +#define HAL_GALILEO_SDRAM_BANK0_CASLAT_2 BIT0 +#define HAL_GALILEO_SDRAM_BANK0_SZ_64M BIT11 +#define HAL_GALILEO_SDRAM_NUM_BANKS_4 BIT5 +#define HAL_GALILEO_SDRAM_BANK0_PARITY BIT8 +#define HAL_GALILEO_SDRAM_CFG_RAM_WIDTH BIT15 +#define HAL_GALILEO_PCI0_CONFIG_ADDR_ConfigEn BIT31 +#define HAL_GALILEO_PCI0_STATUS_COMMAND_REGNUM 0x04 +#define HAL_GALILEO_PCI0_BIST_REGNUM 0x0C +#define HAL_GALILEO_PCI0_SCS32_BASE_REGNUM 0x14 +#define HAL_GALILEO_PCI0_CONFIG_MEMEn 0x2 +#define HAL_GALILEO_PCI0_CONFIG_MasEn 0x4 +#define HAL_GALILEO_PCI0_CONFIG_SErrEn 0x100 +#define HAL_GALILEO_PCI0_LAT_TIMER_VAL 0x800 +#define HAL_GALILEO_PCI0_TIMEOUT_RETRY_VALUE 0x00ffffff + +#define HAL_GALILEO_SDRAM_BANK0_OFFSET 0x44c +#define HAL_GALILEO_SDRAM_BANK2_OFFSET 0x454 +#define HAL_GALILEO_SDRAM_CONFIG_OFFSET 0x448 + +#define HAL_GALILEO_SCS10_LD_OFFSET 0x008 +#define HAL_GALILEO_SCS10_HD_OFFSET 0x010 +#define HAL_GALILEO_SCS32_LD_OFFSET 0x018 +#define HAL_GALILEO_SCS32_HD_OFFSET 0x020 +#define HAL_GALILEO_CS20_LD_OFFSET 0x028 +#define HAL_GALILEO_CS20_HD_OFFSET 0x030 +#define HAL_GALILEO_PCIIO_LD_OFFSET 0x048 +#define HAL_GALILEO_PCIIO_HD_OFFSET 0x050 +#define HAL_GALILEO_PCIMEM0_LD_OFFSET 0x058 +#define HAL_GALILEO_PCIMEM0_HD_OFFSET 0x060 +#define HAL_GALILEO_PCIMEM1_LD_OFFSET 0x080 +#define HAL_GALILEO_PCIMEM1_HD_OFFSET 0x088 +#define HAL_GALILEO_PCI1IO_LD_OFFSET 0x090 +#define HAL_GALILEO_PCI1IO_HD_OFFSET 0x098 +#define HAL_GALILEO_PCI1MEM0_LD_OFFSET 0x0a0 +#define HAL_GALILEO_PCI1MEM0_HD_OFFSET 0x0a8 +#define HAL_GALILEO_PCI1MEM1_LD_OFFSET 0x0b0 +#define HAL_GALILEO_PCI1MEM1_HD_OFFSET 0x0b8 +#define HAL_GALILEO_SCS0_LD_OFFSET 0x400 +#define HAL_GALILEO_SCS0_HD_OFFSET 0x404 +#define HAL_GALILEO_SCS1_LD_OFFSET 0x408 +#define HAL_GALILEO_SCS1_HD_OFFSET 0x40c +#define HAL_GALILEO_SCS2_LD_OFFSET 0x410 +#define HAL_GALILEO_SCS2_HD_OFFSET 0x414 +#define HAL_GALILEO_SCS3_LD_OFFSET 0x418 +#define HAL_GALILEO_SCS3_HD_OFFSET 0x41c +#define HAL_GALILEO_CS0_LD_OFFSET 0x420 +#define HAL_GALILEO_CS0_HD_OFFSET 0x424 +#define HAL_GALILEO_CS1_LD_OFFSET 0x428 +#define HAL_GALILEO_CS1_HD_OFFSET 0x42c +#define HAL_GALILEO_CS2_LD_OFFSET 0x430 +#define HAL_GALILEO_CS2_HD_OFFSET 0x434 + +// GALILEO PCI Internal +#define HAL_GALILEO_PCI_INTERNAL_COMMAND_OFFSET 0xC00 +#define HAL_GALILEO_PCI0_TIMEOUT_RETRY_OFFSET 0xc04 +#define HAL_GALILEO_PCI0_SCS10_SIZE_OFFSET 0xc08 +#define HAL_GALILEO_PCI0_SCS32_SIZE_OFFSET 0xc0c +#define HAL_GALILEO_PCI0_SCS20_SIZE_OFFSET 0xc10 +#define HAL_GALILEO_PCI0_CS3_SIZE_OFFSET 0xc14 +#define HAL_GALILEO_BAR_ENA_OFFSET 0xc3c +# define HAL_GALILEO_BAR_ENA_SWCS3 (1 << 0) +# define HAL_GALILEO_BAR_ENA_SWCS32 (1 << 1) +# define HAL_GALILEO_BAR_ENA_SWCS10 (1 << 2) +# define HAL_GALILEO_BAR_ENA_IO (1 << 3) +# define HAL_GALILEO_BAR_ENA_MEM (1 << 4) +# define HAL_GALILEO_BAR_ENA_CS3 (1 << 5) +# define HAL_GALILEO_BAR_ENA_CS20 (1 << 6) +# define HAL_GALILEO_BAR_ENA_SCS32 (1 << 7) +# define HAL_GALILEO_BAR_ENA_SCS10 (1 << 8) +#define HAL_GALILEO_PCI0_CONFIG_ADDR_OFFSET 0xcf8 +# define HAL_GALILEO_PCI0_CONFIG_ADDR_ENABLE (1 << 31) +#define HAL_GALILEO_PCI0_CONFIG_DATA_OFFSET 0xcfc + +// GALILEO Interrupts +#define HAL_GALILEO_IRQ_CAUSE_OFFSET 0xc18 +# define HAL_GALILEO_IRQCAUSE_INTSUM (1 << 0) +# define HAL_GALILEO_IRQCAUSE_MEMOUT (1 << 1) +# define HAL_GALILEO_IRQCAUSE_DMAOUT (1 << 2) +# define HAL_GALILEO_IRQCAUSE_CPUOUT (1 << 3) +# define HAL_GALILEO_IRQCAUSE_DMA0 (1 << 4) +# define HAL_GALILEO_IRQCAUSE_DMA1 (1 << 5) +# define HAL_GALILEO_IRQCAUSE_DMA2 (1 << 6) +# define HAL_GALILEO_IRQCAUSE_DMA3 (1 << 7) +# define HAL_GALILEO_IRQCAUSE_T0 (1 << 8) +# define HAL_GALILEO_IRQCAUSE_T1 (1 << 9) +# define HAL_GALILEO_IRQCAUSE_T2 (1 << 10) +# define HAL_GALILEO_IRQCAUSE_T3 (1 << 11) +# define HAL_GALILEO_IRQCAUSE_MASRD (1 << 12) +# define HAL_GALILEO_IRQCAUSE_SLVWR (1 << 13) +# define HAL_GALILEO_IRQCAUSE_MASWR (1 << 14) +# define HAL_GALILEO_IRQCAUSE_SLVRD (1 << 15) +# define HAL_GALILEO_IRQCAUSE_AERR (1 << 16) +# define HAL_GALILEO_IRQCAUSE_MERR (1 << 17) +# define HAL_GALILEO_IRQCAUSE_MASABT (1 << 18) +# define HAL_GALILEO_IRQCAUSE_TARABT (1 << 19) +# define HAL_GALILEO_IRQCAUSE_RETRY (1 << 20) +# define HAL_GALILEO_IRQCAUSE_CPUSUM (1 << 30) +# define HAL_GALILEO_IRQCAUSE_PCISUM (1 << 31) +#define HAL_GALILEO_HIRQ_CAUSE_OFFSET 0xc98 +#define HAL_GALILEO_CPUIRQ_MASK_OFFSET 0xc1c +#define HAL_GALILEO_CPUHIRQ_MASK_OFFSET 0xc9c + +#define HAL_SAA9730_I2CSC_I2CCC_6400 0x500 +#define HAL_SAA9730_I2CTFR_ATTR0_START 0xC +#define HAL_SAA9730_I2CTFR_ATTR2_START 0xC0 +#define HAL_SAA9730_I2CTFR_ATTR2_STOP 0x40 +#define HAL_SAA9730_I2CTFR_ATTR1_CONT 0x20 +#define HAL_SAA9730_I2CTFR_OFFSET 0x2400 +#define HAL_SAA9730_I2CSC_OFFSET 0x2404 +#define HAL_SAA9730_SYSRESET_OFFSET 0x4020 +#define HAL_SAA9730_SYSRESET_ALL 0xdeae + +#define HAL_SPD_GET_NUM_ROW_BITS 3 +#define HAL_SPD_GET_NUM_COL_BITS 4 +#define HAL_SPD_GET_NUM_MODULE_BANKS 5 +#define HAL_SPD_GET_CONFIG_TYPE 11 +#define HAL_SPD_GET_REFRESH_RATE 12 +#define HAL_SPD_GET_SDRAM_WIDTH 13 +#define HAL_SPD_GET_ERROR_CHECK_WIDTH 14 +#define HAL_SPD_GET_BURST_LENGTH 16 +#define HAL_SPD_GET_NUM_DEVICE_BANKS 17 +#define HAL_SPD_GET_CAS_LAT 18 +#define HAL_SPD_GET_ROW_DENSITY 31 +#define HAL_SPD_CONFIG_TYPE_PARITY BIT0 +#define HAL_SPD_CONFIG_TYPE_ECC BIT1 +#define HAL_SPD_REFRESH_RATE_125 5 +#define HAL_SPD_REFRESH_RATE_62_5 4 +#define HAL_SPD_REFRESH_RATE_31_3 3 +#define HAL_SPD_REFRESH_RATE_15_625 0 +#define HAL_SPD_REFRESH_RATE_7_8 2 +#define HAL_SPD_REFRESH_RATE_3_9 1 + +#define HAL_SPD_REFRESH_COUNTER_125 (125*2) +#define HAL_SPD_REFRESH_COUNTER_62_5 (62*2) +#define HAL_SPD_REFRESH_COUNTER_31_3 (31*2) +#define HAL_SPD_REFRESH_COUNTER_15_625 (15*2) +#define HAL_SPD_REFRESH_COUNTER_7_8 (7*2) +#define HAL_SPD_REFRESH_COUNTER_3_9 (3*2) + +/* Atlas Display Registers */ +#define HAL_DISPLAY_BASE (HAL_ATLAS_REGISTER_BASE + 0x400) + +#define HAL_DISPLAY_LEDGREEN_OFFSET 0x00 +#define HAL_DISPLAY_LEDBAR_OFFSET 0x08 +#define HAL_DISPLAY_ASCIIWORD_OFFSET 0x10 +#define HAL_DISPLAY_ASCIIPOS0_OFFSET 0x18 +#define HAL_DISPLAY_ASCIIPOS1_OFFSET 0x20 +#define HAL_DISPLAY_ASCIIPOS2_OFFSET 0x28 +#define HAL_DISPLAY_ASCIIPOS3_OFFSET 0x30 +#define HAL_DISPLAY_ASCIIPOS4_OFFSET 0x38 +#define HAL_DISPLAY_ASCIIPOS5_OFFSET 0x40 +#define HAL_DISPLAY_ASCIIPOS6_OFFSET 0x48 +#define HAL_DISPLAY_ASCIIPOS7_OFFSET 0x50 + +#define HAL_DISPLAY_LEDGREEN HAL_REG(HAL_DISPLAY_BASE + HAL_DISPLAY_LEDGREEN_OFFSET) +#define HAL_DISPLAY_LEDBAR HAL_REG(HAL_DISPLAY_BASE + HAL_DISPLAY_LEDBAR_OFFSET) +#define HAL_DISPLAY_ASCIIWORD HAL_REG(HAL_DISPLAY_BASE + HAL_DISPLAY_ASCIIWORD_OFFSET) +#define HAL_DISPLAY_ASCIIPOS0 HAL_REG(HAL_DISPLAY_BASE + HAL_DISPLAY_ASCIIPOS0_OFFSET) +#define HAL_DISPLAY_ASCIIPOS1 HAL_REG(HAL_DISPLAY_BASE + HAL_DISPLAY_ASCIIPOS1_OFFSET) +#define HAL_DISPLAY_ASCIIPOS2 HAL_REG(HAL_DISPLAY_BASE + HAL_DISPLAY_ASCIIPOS2_OFFSET) +#define HAL_DISPLAY_ASCIIPOS3 HAL_REG(HAL_DISPLAY_BASE + HAL_DISPLAY_ASCIIPOS3_OFFSET) +#define HAL_DISPLAY_ASCIIPOS4 HAL_REG(HAL_DISPLAY_BASE + HAL_DISPLAY_ASCIIPOS4_OFFSET) +#define HAL_DISPLAY_ASCIIPOS5 HAL_REG(HAL_DISPLAY_BASE + HAL_DISPLAY_ASCIIPOS5_OFFSET) +#define HAL_DISPLAY_ASCIIPOS6 HAL_REG(HAL_DISPLAY_BASE + HAL_DISPLAY_ASCIIPOS6_OFFSET) +#define HAL_DISPLAY_ASCIIPOS7 HAL_REG(HAL_DISPLAY_BASE + HAL_DISPLAY_ASCIIPOS7_OFFSET) + +#ifdef __ASSEMBLER__ + +# define DEBUG_ASCII_DISPLAY(register, character) \ + li k0, CYGARC_UNCACHED_ADDRESS(register); \ + li k1, character; \ + sw k1, 0(k0); \ + nop; \ + nop; \ + nop + +# define DEBUG_LED_IMM(val) \ + li k0, HAL_DISPLAY_LEDBAR; \ + li k1, val; \ + sw k1, 0(k0) + +# define DEBUG_LED_REG(reg) \ + li k0, HAL_DISPLAY_LEDBAR; \ + sw reg, 0(k0) + +# define DEBUG_HEX_DISPLAY_IMM(val) \ + li k0, HAL_DISPLAY_ASCIIWORD; \ + li k1, val; \ + sw k1, 0(k0) + +# define DEBUG_HEX_DISPLAY_REG(reg) \ + li k0, HAL_DISPLAY_ASCIIWORD; \ + sw reg, 0(k0) + +# define DEBUG_DELAY() \ + li k0, 0x20000; \ +0: sub k0, k0, 1; \ + bnez k0, 0b; \ + nop + +#else + +# define DEBUG_ASCII_DISPLAY(register, character) \ + *(register) = character + +# define DEBUG_LED_IMM(val) \ + *HAL_DISPLAY_LEDBAR = val + +# define DEBUG_HEX_DISPLAY_IMM(val) \ + *HAL_DISPLAY_ASCIIWORD = val + +# define DEBUG_DELAY() \ + { \ + volatile int i = 0x20000; \ + while (--i) ; \ + } + +# define DEBUG_DISPLAY(str) \ + { \ + DEBUG_ASCII_DISPLAY(HAL_DISPLAY_ASCIIPOS0, str[0]); \ + DEBUG_ASCII_DISPLAY(HAL_DISPLAY_ASCIIPOS1, str[1]); \ + DEBUG_ASCII_DISPLAY(HAL_DISPLAY_ASCIIPOS2, str[2]); \ + DEBUG_ASCII_DISPLAY(HAL_DISPLAY_ASCIIPOS3, str[3]); \ + DEBUG_ASCII_DISPLAY(HAL_DISPLAY_ASCIIPOS4, str[4]); \ + DEBUG_ASCII_DISPLAY(HAL_DISPLAY_ASCIIPOS5, str[5]); \ + DEBUG_ASCII_DISPLAY(HAL_DISPLAY_ASCIIPOS6, str[6]); \ + DEBUG_ASCII_DISPLAY(HAL_DISPLAY_ASCIIPOS7, str[7]); \ + } + + +#define HAL_GALILEO_PUTREG(x,y) \ + (*((volatile unsigned *)(CYGARC_UNCACHED_ADDRESS(HAL_ATLAS_CONTROLLER_BASE) + (x))) = (y)) +#define HAL_GALILEO_GETREG(x) \ + (*((volatile unsigned *)(CYGARC_UNCACHED_ADDRESS(HAL_ATLAS_CONTROLLER_BASE) + (x)))) + + +extern cyg_uint32 cyg_hal_plf_pci_cfg_read_dword (cyg_uint32 bus, + cyg_uint32 devfn, + cyg_uint32 offset); +extern cyg_uint16 cyg_hal_plf_pci_cfg_read_word (cyg_uint32 bus, + cyg_uint32 devfn, + cyg_uint32 offset); +extern cyg_uint8 cyg_hal_plf_pci_cfg_read_byte (cyg_uint32 bus, + cyg_uint32 devfn, + cyg_uint32 offset); +extern void cyg_hal_plf_pci_cfg_write_dword (cyg_uint32 bus, + cyg_uint32 devfn, + cyg_uint32 offset, + cyg_uint32 val); +extern void cyg_hal_plf_pci_cfg_write_word (cyg_uint32 bus, + cyg_uint32 devfn, + cyg_uint32 offset, + cyg_uint16 val); +extern void cyg_hal_plf_pci_cfg_write_byte (cyg_uint32 bus, + cyg_uint32 devfn, + cyg_uint32 offset, + cyg_uint8 val); + +// Initialize the PCI bus. +externC void cyg_hal_plf_pci_init(void); +#define HAL_PCI_INIT() cyg_hal_plf_pci_init() + +// Map PCI device resources starting from these addresses in PCI space. +#define HAL_PCI_ALLOC_BASE_MEMORY 0x08000000 +#define HAL_PCI_ALLOC_BASE_IO 0x18000000 + +// This is where the PCI spaces are mapped in the CPU's address space. +// +#define HAL_PCI_PHYSICAL_MEMORY_BASE 0xA0000000 +#define HAL_PCI_PHYSICAL_IO_BASE 0xA0000000 + +// Read a value from the PCI configuration space of the appropriate +// size at an address composed from the bus, devfn and offset. +#define HAL_PCI_CFG_READ_UINT8( __bus, __devfn, __offset, __val ) \ + __val = cyg_hal_plf_pci_cfg_read_byte((__bus), (__devfn), (__offset)) + +#define HAL_PCI_CFG_READ_UINT16( __bus, __devfn, __offset, __val ) \ + __val = cyg_hal_plf_pci_cfg_read_word((__bus), (__devfn), (__offset)) + +#define HAL_PCI_CFG_READ_UINT32( __bus, __devfn, __offset, __val ) \ + __val = cyg_hal_plf_pci_cfg_read_dword((__bus), (__devfn), (__offset)) + +// Write a value to the PCI configuration space of the appropriate +// size at an address composed from the bus, devfn and offset. +#define HAL_PCI_CFG_WRITE_UINT8( __bus, __devfn, __offset, __val ) \ + cyg_hal_plf_pci_cfg_write_byte((__bus), (__devfn), (__offset), (__val)) + +#define HAL_PCI_CFG_WRITE_UINT16( __bus, __devfn, __offset, __val ) \ + cyg_hal_plf_pci_cfg_write_word((__bus), (__devfn), (__offset), (__val)) + +#define HAL_PCI_CFG_WRITE_UINT32( __bus, __devfn, __offset, __val ) \ + cyg_hal_plf_pci_cfg_write_dword((__bus), (__devfn), (__offset), (__val)) + + +// Translate the PCI interrupt requested by the device (INTA#, INTB#, +// INTC# or INTD#) to the associated CPU interrupt (i.e., HAL vector). +#define HAL_PCI_TRANSLATE_INTERRUPT( __bus, __devfn, __vec, __valid) \ + CYG_MACRO_START \ + __valid = false; \ + CYG_MACRO_END + + +// Galileo GT64120 on MIPS ATLAS requires special processing. +// First, it will hang when accessing device 31 on the local bus. +// Second, we need to ignore the GT64120 so we can set it up +// outside the generic PCI library. +#define HAL_PCI_IGNORE_DEVICE(__bus, __dev, __fn) \ + ((__bus) == 0 && ((__dev) == 0 || (__dev) == 31)) + +#endif + + +//----------------------------------------------------------------------------- +// end of plf_io.h +#endif // CYGONCE_PLF_IO_H diff --git a/packages/hal/mips/atlas/current/include/plf_stub.h b/packages/hal/mips/atlas/current/include/plf_stub.h new file mode 100644 --- /dev/null +++ b/packages/hal/mips/atlas/current/include/plf_stub.h @@ -0,0 +1,83 @@ +#ifndef CYGONCE_HAL_PLF_STUB_H +#define CYGONCE_HAL_PLF_STUB_H + +//============================================================================= +// +// plf_stub.h +// +// Platform header for GDB stub support. +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jskov +// Contributors:jskov, dmoseley +// Date: 2000-06-06 +// Purpose: Platform HAL stub support for MIPS Atlas boards. +// Usage: #include +// +//####DESCRIPTIONEND#### +// +//============================================================================= +#include + +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + +#include // CYG_UNUSED_PARAM + +#include // architecture stub support + +//---------------------------------------------------------------------------- +// Define some platform specific communication details. This is mostly +// handled by hal_if now, but we need to make sure the comms tables are +// properly initialized. + +externC void cyg_hal_plf_comms_init(void); + +#define HAL_STUB_PLATFORM_INIT_SERIAL() cyg_hal_plf_comms_init() + +#define HAL_STUB_PLATFORM_SET_BAUD_RATE(baud) CYG_UNUSED_PARAM(int, (baud)) +#define HAL_STUB_PLATFORM_INTERRUPTIBLE 0 +#define HAL_STUB_PLATFORM_INIT_BREAK_IRQ() CYG_EMPTY_STATEMENT + +//---------------------------------------------------------------------------- +// Stub initializer. +#define HAL_STUB_PLATFORM_INIT() CYG_EMPTY_STATEMENT + +#endif // ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + +//----------------------------------------------------------------------------- +// Syscall support. +#ifdef CYGPKG_CYGMON +// Cygmon provides syscall handling for this board +#define SIGSYSCALL SIGSYS +extern int __get_syscall_num (void); +#endif + +//----------------------------------------------------------------------------- +#endif // CYGONCE_HAL_PLF_STUB_H +// End of plf_stub.h diff --git a/packages/hal/mips/atlas/current/misc/redboot_RAM.ecm b/packages/hal/mips/atlas/current/misc/redboot_RAM.ecm new file mode 100644 --- /dev/null +++ b/packages/hal/mips/atlas/current/misc/redboot_RAM.ecm @@ -0,0 +1,73 @@ +cdl_savefile_version 1; +cdl_savefile_command cdl_savefile_version {}; +cdl_savefile_command cdl_savefile_command {}; +cdl_savefile_command cdl_configuration { description hardware template package }; +cdl_savefile_command cdl_package { value_source user_value wizard_value inferred_value }; +cdl_savefile_command cdl_component { value_source user_value wizard_value inferred_value }; +cdl_savefile_command cdl_option { value_source user_value wizard_value inferred_value }; +cdl_savefile_command cdl_interface { value_source user_value wizard_value inferred_value }; + +cdl_configuration eCos { + description "" ; + hardware atlas ; + template redboot ; + package -hardware CYGPKG_HAL_MIPS current ; + package -hardware CYGPKG_HAL_MIPS_ATLAS current ; + package -hardware CYGPKG_IO_PCI current ; + package -hardware CYGPKG_DEVS_ETH_MIPS_ATLAS current ; + package -hardware CYGPKG_IO_SERIAL_MIPS_ATLAS current ; + package -hardware CYGPKG_DEVS_FLASH_ATLAS current ; + package -template CYGPKG_HAL current ; + package -template CYGPKG_INFRA current ; + package -template CYGPKG_REDBOOT current ; + package CYGPKG_IO_FLASH current ; + package CYGPKG_IO_ETH_DRIVERS current ; +}; + +cdl_option CYGBLD_BUILD_GDB_STUBS { + user_value 0 +}; + +cdl_option CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT { + user_value 0 +}; + +cdl_option CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM { + inferred_value 0 +}; + +cdl_option CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS { + inferred_value 1 +}; + +cdl_option CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT { + inferred_value 1 +}; + +cdl_option CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT { + inferred_value 0 +}; + +cdl_option CYGSEM_HAL_USE_ROM_MONITOR { + inferred_value 0 0 +}; + +cdl_component CYG_HAL_STARTUP { + user_value RAM +}; + +cdl_option CYGBLD_BUILD_REDBOOT { + user_value 1 +}; + +#cdl_option CYGSEM_REDBOOT_FLASH_CONFIG { +# user_value 1 +#}; + +cdl_option CYGSEM_REDBOOT_BSP_SYSCALLS { + user_value 1 +}; + +cdl_option CYGBLD_REDBOOT_FLASH_BOOT_OFFSET { + inferred_value 0x1C00000 +}; diff --git a/packages/hal/mips/atlas/current/misc/redboot_ROM.ecm b/packages/hal/mips/atlas/current/misc/redboot_ROM.ecm new file mode 100644 --- /dev/null +++ b/packages/hal/mips/atlas/current/misc/redboot_ROM.ecm @@ -0,0 +1,77 @@ +cdl_savefile_version 1; +cdl_savefile_command cdl_savefile_version {}; +cdl_savefile_command cdl_savefile_command {}; +cdl_savefile_command cdl_configuration { description hardware template package }; +cdl_savefile_command cdl_package { value_source user_value wizard_value inferred_value }; +cdl_savefile_command cdl_component { value_source user_value wizard_value inferred_value }; +cdl_savefile_command cdl_option { value_source user_value wizard_value inferred_value }; +cdl_savefile_command cdl_interface { value_source user_value wizard_value inferred_value }; + +cdl_configuration eCos { + description "" ; + hardware atlas ; + template redboot ; + package -hardware CYGPKG_HAL_MIPS current ; + package -hardware CYGPKG_HAL_MIPS_ATLAS current ; + package -hardware CYGPKG_IO_PCI current ; + package -hardware CYGPKG_DEVS_ETH_MIPS_ATLAS current ; + package -hardware CYGPKG_IO_SERIAL_MIPS_ATLAS current ; + package -hardware CYGPKG_DEVS_FLASH_ATLAS current ; + package -template CYGPKG_HAL current ; + package -template CYGPKG_INFRA current ; + package -template CYGPKG_REDBOOT current ; + package CYGPKG_IO_FLASH current ; + package CYGPKG_IO_ETH_DRIVERS current ; +}; + +cdl_option CYGBLD_BUILD_GDB_STUBS { + user_value 0 +}; + +cdl_option CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT { + user_value 0 +}; + +cdl_option CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM { + inferred_value 0 +}; + +cdl_option CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS { + inferred_value 1 +}; + +cdl_option CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT { + inferred_value 1 +}; + +cdl_option CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT { + inferred_value 0 +}; + +cdl_option CYGSEM_HAL_ROM_MONITOR { + user_value 1 +}; + +cdl_option CYGSEM_HAL_USE_ROM_MONITOR { + inferred_value 0 0 +}; + +cdl_component CYG_HAL_STARTUP { + user_value ROM +}; + +cdl_option CYGBLD_BUILD_REDBOOT { + user_value 1 +}; + +cdl_option CYGSEM_REDBOOT_FLASH_CONFIG { + user_value 1 +}; + +cdl_option CYGSEM_REDBOOT_BSP_SYSCALLS { + user_value 1 +}; + +cdl_option CYGBLD_REDBOOT_FLASH_BOOT_OFFSET { + inferred_value 0x1C00000 +}; diff --git a/packages/hal/mips/atlas/current/src/hal_diag.c b/packages/hal/mips/atlas/current/src/hal_diag.c new file mode 100644 --- /dev/null +++ b/packages/hal/mips/atlas/current/src/hal_diag.c @@ -0,0 +1,178 @@ +/*============================================================================= +// +// hal_diag.c +// +// HAL diagnostic output code +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg +// Contributors: nickg, dmoseley +// Date: 1998-03-02 +// Purpose: HAL diagnostic output +// Description: Implementations of HAL diagnostic output support. +// +//####DESCRIPTIONEND#### +// +//===========================================================================*/ + +#include + +#include // base types +#include // tracing macros +#include // assertion macros + +#include +#include + +#include + +#include + +//----------------------------------------------------------------------------- +// Select which diag channels to use + +//#define CYG_KERNEL_DIAG_LCD +#define CYG_KERNEL_DIAG_SERIAL + +/*---------------------------------------------------------------------------*/ + +void hal_diag_led(int x) +{ + HAL_WRITE_UINT32(HAL_DISPLAY_LEDBAR, x); +#if !defined(CYG_KERNEL_DIAG_LCD) + HAL_WRITE_UINT32(HAL_DISPLAY_ASCIIWORD, x); +#endif +} + +externC void diag_write_string (const char*); + +#ifdef CYG_KERNEL_DIAG_SERIAL +extern void cyg_hal_plf_comms_init(void); +extern void cyg_hal_plf_serial_putc(void*, cyg_uint8); +extern cyg_uint8 cyg_hal_plf_serial_getc(void*); +#endif + +void hal_diag_init(void) +{ +#if defined(CYGSEM_HAL_ROM_MONITOR) && !defined(CYG_KERNEL_DIAG_SERIAL) + // It's handy to have the LCD initialized at reset when using it + // for debugging output. + // The serial port likely doesn't work yet. Let's wait. + diag_write_string ("eCos ROM " __TIME__ "\n"); + diag_write_string (__DATE__ "\n"); +#endif + +#if defined(CYG_KERNEL_DIAG_SERIAL) + cyg_hal_plf_comms_init(); +#endif +} + +#if defined(CYG_KERNEL_DIAG_LCD) +static void hal_diag_clear_lcd(void) +{ + volatile int i = 0x20000; + while (--i) ; + + HAL_WRITE_UINT32(HAL_DISPLAY_ASCIIPOS0, ' '); + HAL_WRITE_UINT32(HAL_DISPLAY_ASCIIPOS1, ' '); + HAL_WRITE_UINT32(HAL_DISPLAY_ASCIIPOS2, ' '); + HAL_WRITE_UINT32(HAL_DISPLAY_ASCIIPOS3, ' '); + HAL_WRITE_UINT32(HAL_DISPLAY_ASCIIPOS4, ' '); + HAL_WRITE_UINT32(HAL_DISPLAY_ASCIIPOS5, ' '); + HAL_WRITE_UINT32(HAL_DISPLAY_ASCIIPOS6, ' '); + HAL_WRITE_UINT32(HAL_DISPLAY_ASCIIPOS7, ' '); +} +#endif /* defined(CYG_KERNEL_DIAG_LCD) */ + +void hal_diag_write_char(char c) +{ +#if defined(CYG_KERNEL_DIAG_LCD) + static volatile CYG_WORD* reg = HAL_DISPLAY_ASCIIPOS0; +#endif + + unsigned long __state; + + HAL_DISABLE_INTERRUPTS(__state); + + if(c == '\n') + { +#if defined(CYG_KERNEL_DIAG_LCD) + reg = HAL_DISPLAY_ASCIIPOS0; + hal_diag_clear_lcd(); +#endif +#if defined (CYG_KERNEL_DIAG_SERIAL) + cyg_hal_plf_serial_putc(NULL, '\r'); + cyg_hal_plf_serial_putc(NULL, '\n'); +#endif + } + else if (c == '\r') + { + // Ignore '\r' + } + else + { +#if defined(CYG_KERNEL_DIAG_LCD) + if (reg == HAL_DISPLAY_ASCIIPOS0) + hal_diag_clear_lcd(); + + HAL_WRITE_UINT32(reg, c); + + // Advance to next LED position. + if (reg == HAL_DISPLAY_ASCIIPOS0) + reg = HAL_DISPLAY_ASCIIPOS1; + else if (reg == HAL_DISPLAY_ASCIIPOS1) + reg = HAL_DISPLAY_ASCIIPOS2; + else if (reg == HAL_DISPLAY_ASCIIPOS2) + reg = HAL_DISPLAY_ASCIIPOS3; + else if (reg == HAL_DISPLAY_ASCIIPOS3) + reg = HAL_DISPLAY_ASCIIPOS4; + else if (reg == HAL_DISPLAY_ASCIIPOS4) + reg = HAL_DISPLAY_ASCIIPOS5; + else if (reg == HAL_DISPLAY_ASCIIPOS5) + reg = HAL_DISPLAY_ASCIIPOS6; + else if (reg == HAL_DISPLAY_ASCIIPOS6) + reg = HAL_DISPLAY_ASCIIPOS7; + else // reg == HAL_DISPLAY_ASCIIPOS7 or UNKNOWN + reg = HAL_DISPLAY_ASCIIPOS0; +#endif +#if defined(CYG_KERNEL_DIAG_SERIAL) + cyg_hal_plf_serial_putc(NULL, c); +#endif + } + + HAL_RESTORE_INTERRUPTS(__state); +} + +void hal_diag_read_char(char* c) +{ + *c = cyg_hal_plf_serial_getc(NULL); +} + +/*---------------------------------------------------------------------------*/ +/* End of hal_diag.c */ diff --git a/packages/hal/mips/atlas/current/src/platform.S b/packages/hal/mips/atlas/current/src/platform.S new file mode 100644 --- /dev/null +++ b/packages/hal/mips/atlas/current/src/platform.S @@ -0,0 +1,575 @@ +## +#============================================================================= +## platform.S +## +## MIPS Atlas platform code +## +##============================================================================= +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Red Hat eCos Public License +# Version 1.1 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://www.redhat.com/ +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Configurable Operating System, +# released September 30, 1998. +# +# The Initial Developer of the Original Code is Red Hat. +# Portions created by Red Hat are +# Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +# All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +##============================================================================= +#######DESCRIPTIONBEGIN#### +## +## Author(s): dmoseley +## Contributors: dmoseley +## Date: 2000-06-06 +## Purpose: MIPS Atlas platform code +## Description: Platform specific code for Atlas board. +## +## +## +## +######DESCRIPTIONEND#### +## +##============================================================================= + +#include +#include + +#ifdef CYGPKG_KERNEL +# include +#endif + +#include +#include +#include + +##----------------------------------------------------------------------------- + +##----------------------------------------------------------------------------- +# Platform Initialization. +# This code performs platform specific initialization. + +##----------------------------------------------------------------------------- +## MEMC initialization. +## + +#if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_ROMRAM) + + .text + .set noreorder + + +.macro MASK_WRITE_PCI_REG regnum, devnum, mask + .set noreorder + # First, read the appropriate register + li t0, HAL_GALILEO_PCI0_CONFIG_ADDR_ConfigEn | \regnum | \devnum + sw t0, HAL_GALILEO_PCI0_CONFIG_ADDR_OFFSET(s7) + lw t1, HAL_GALILEO_PCI0_CONFIG_DATA_OFFSET(s7) + + # Now, mask in the appropriate bits + li t2, \mask + or t1, t2 + + # Write the updated value + li t0, HAL_GALILEO_PCI0_CONFIG_ADDR_ConfigEn | \regnum | \devnum + sw t0, HAL_GALILEO_PCI0_CONFIG_ADDR_OFFSET(s7) + sw t1, HAL_GALILEO_PCI0_CONFIG_DATA_OFFSET(s7) +.endm + +.macro WRITE_PCI_REG regnum, devnum, base + .set noreorder + li t0, HAL_GALILEO_PCI0_CONFIG_ADDR_ConfigEn | \regnum | \devnum + li t1, \base + sw t0, HAL_GALILEO_PCI0_CONFIG_ADDR_OFFSET(s7) + sw t1, HAL_GALILEO_PCI0_CONFIG_DATA_OFFSET(s7) +.endm + +#define NO_MASK 0 +#define NO_ERROR_CHECK 0 +#define ERROR_CHECK 1 +.macro READ_SPD_VALUE func, mask, ret_reg, err_check + .set noreorder + jal read_spd_value + li a0, \func # delay slot +.if \err_check + beq v0, zero, error + nop +.endif + move \ret_reg, v0 +.if \mask + and \ret_reg, \mask +.endif +.endm + +##----------------------------------------------------------------------------- +## +## Initialize the RAM. +## +## To do that, we need to first initialize the Galileo PCI stuff to gain access +## to the SAA9730. +## From there, use the I2C bus of the SAA9730 to read the SPD SDRAM +## config data. We then setup the Galileo SDRAM configuration +## +## Returns +## v0 = Error Code +## v1 = SDRAM size +## +FUNC_START(hal_atlas_init_sdram) + + .set noreorder + + # Save the return address + move s8, ra + + # Setup the base address registers + li s7, CYGARC_UNCACHED_ADDRESS(HAL_GALILEO_REGISTER_BASE) + + # Setup the Galileo controller Endian configuration + li t0, (HAL_GALILEO_BYTE_SWAP) + sw t0, HAL_GALILEO_PCI_INTERNAL_COMMAND_OFFSET(s7) + + # Setup the PCI_0 Timeout and retry configuration + li t0, HAL_GALILEO_PCI0_TIMEOUT_RETRY_VALUE + sw t0, HAL_GALILEO_PCI0_TIMEOUT_RETRY_OFFSET(s7) + + # Setup Galileo as PCI Master + MASK_WRITE_PCI_REG HAL_GALILEO_PCI0_STATUS_COMMAND_REGNUM, HAL_ATLAS_NULL_DEVNUM, \ + (HAL_GALILEO_PCI0_CONFIG_MEMEn | HAL_GALILEO_PCI0_CONFIG_MasEn | HAL_GALILEO_PCI0_CONFIG_SErrEn) + + # Setup Galileo PCI latency timer + MASK_WRITE_PCI_REG HAL_GALILEO_PCI0_BIST_REGNUM, HAL_ATLAS_NULL_DEVNUM, \ + HAL_GALILEO_PCI0_LAT_TIMER_VAL + + # Setup base address for SAA9730 + WRITE_PCI_REG HAL_GALILEO_PCI0_SCS32_BASE_REGNUM, HAL_ATLAS_SAA9730_DEVNUM, \ + CYGARC_PHYSICAL_ADDRESS(HAL_GALILEO_PCI0_MEM0_BASE) + + # Setup SAA9730 command and status register + MASK_WRITE_PCI_REG HAL_GALILEO_PCI0_STATUS_COMMAND_REGNUM, HAL_ATLAS_SAA9730_DEVNUM, \ + (HAL_GALILEO_PCI0_CONFIG_MEMEn | HAL_GALILEO_PCI0_CONFIG_SErrEn) + + # Init the I2C controller + li t0, HAL_SAA9730_I2CSC_I2CCC_6400 + li t1, CYGARC_UNCACHED_ADDRESS(HAL_GALILEO_PCI0_MEM0_BASE) + sw t0, HAL_SAA9730_I2CSC_OFFSET(t1) + + ##===================================================================================== + ## + ## Read the SPD device parameters and determine memory size + ## + READ_SPD_VALUE HAL_SPD_GET_NUM_ROW_BITS, 0xf, s0, ERROR_CHECK + READ_SPD_VALUE HAL_SPD_GET_NUM_COL_BITS, 0xf, s1, ERROR_CHECK + READ_SPD_VALUE HAL_SPD_GET_NUM_DEVICE_BANKS, NO_MASK, s2, ERROR_CHECK + + READ_SPD_VALUE HAL_SPD_GET_SDRAM_WIDTH, 0x7f, s3, ERROR_CHECK + READ_SPD_VALUE HAL_SPD_GET_NUM_MODULE_BANKS, NO_MASK, s4, ERROR_CHECK + READ_SPD_VALUE HAL_SPD_GET_ROW_DENSITY, NO_MASK, s5, ERROR_CHECK + + # + # Determine Size + # SIZE = SDRAM_WIDTH * NUM_DEVICE_BANKS * 2 ^ (NUM_ROW_BITS + NUM_COL_BITS) + # + addu t0, s0, s1 # t0 = (NUM_ROW_BITS + NUM_COL_BITS) + li t1, 1 # t1 = 2 ^ 0 + sll t1, t0 # t1 = 2 ^ (NUM_ROW_BITS + NUM_COL_BITS) + multu s2, t1 + mflo s6 # s6 = NUM_DEVICE_BANKS * 2 ^ (NUM_ROW_BITS + NUM_COL_BITS) + nop + nop + nop + multu s6, s3 + mflo s6 # s6 = SDRAM_WIDTH * NUM_DEVICE_BANKS * 2 ^ (NUM_ROW_BITS + NUM_COL_BITS) + nop + nop + nop + + # + # Determine size of Bank 0 + # + li s0, HAL_ATLAS_MAX_BANKSIZE +0: + and t1, s5, BIT7 + bnez t1, 8f + sll s5, 1 + b 0b + srl s0, 1 +8: + + # + # Determine if Bank 1 exists + # + li t0, 1 + beq s4, t0, 8f + move s1, zero + # + # Determine if Bank 1 is different than Bank 0 + # + and t1, s5, 0xFF + beq t1, zero, 8f + move s1, s0 + # + # Determine size of Bank 1 + # + li s1, HAL_ATLAS_MAX_BANKSIZE +0: + and t1, s5, BIT7 + bnez t1, 8f + sll s5, 1 + b 0b + srl s1, 1 +8: + + # + # FIXME: We should probably do some validation on the various + # memory parameters here at some point. + # + + # + # Set the base SDRAM bank configuration value. + # All other fields are zero, and the proper value is masked + # in when they are known + # + li s5, HAL_GALILEO_SDRAM_SRAS_TO_SCAS_DELAY_3C | \ + HAL_GALILEO_SDRAM_WIDTH_64BIT | \ + HAL_GALILEO_SDRAM_SRAS_PRECHARGE_3C + + # + # Setup the CASLAT value. + # Support only CASLAT = 2 + # + READ_SPD_VALUE HAL_SPD_GET_CAS_LAT, NO_MASK, v0, NO_ERROR_CHECK + and t0, v0, 2 + beqz t0, error + nop + ori s5, HAL_GALILEO_SDRAM_BANK0_CASLAT_2 + + # + # Setup SDRAM device size + # + li t0, SZ_16M + beq s6, t0, 8f + nop + ori s5, HAL_GALILEO_SDRAM_BANK0_SZ_64M +8: + + # + # Setup burst length: Support only 8 + # + READ_SPD_VALUE HAL_SPD_GET_BURST_LENGTH, NO_MASK, v0, NO_ERROR_CHECK + and t0, v0, 8 + beqz t0, error + nop + + # + # Setup Parity. + # Only support Parity/Noparity. Don't support ECC. + # + READ_SPD_VALUE HAL_SPD_GET_CONFIG_TYPE, NO_MASK, v0, NO_ERROR_CHECK + li t0, HAL_SPD_CONFIG_TYPE_PARITY + beq t0, v0, 0f + nop + li t0, HAL_SPD_CONFIG_TYPE_ECC + beq t0, v0, error + nop + b 8f + li v1, 0 +0: + ori s5, HAL_GALILEO_SDRAM_BANK0_PARITY + li v1, 1 +8: + + # + # Setup number of device banks + # Only support 2 or 4 banks + # + li t0, 2 + beq s2, t0, 8f + nop + li t0, 4 + beq s2, t0, 0f + nop + b error + nop +0: + ori s5, HAL_GALILEO_SDRAM_NUM_BANKS_4 +8: + + # + # Now actually store the bank config register + # + sw s5, HAL_GALILEO_SDRAM_BANK0_OFFSET(s7) + sw s5, HAL_GALILEO_SDRAM_BANK2_OFFSET(s7) + + # + # Setup the SDRAM configuration register + # All other fields are zero, and the proper value is masked + # in when they are known + # + li s5, HAL_GALILEO_SDRAM_DUPLICATE_BANK_ADDR | HAL_GALILEO_SDRAM_BANK_INTERLEAVE_DIS + + # + # Setup the Refresh Rate + # + READ_SPD_VALUE HAL_SPD_GET_REFRESH_RATE, 0x7f, v0, NO_ERROR_CHECK + + li t0, HAL_SPD_REFRESH_RATE_125 + beq t0, v0, 8f + li t0, HAL_SPD_REFRESH_COUNTER_125 + + li t0, HAL_SPD_REFRESH_RATE_62_5 + beq t0, v0, 8f + li t0, HAL_SPD_REFRESH_COUNTER_62_5 + + li t0, HAL_SPD_REFRESH_RATE_31_3 + beq t0, v0, 8f + li t0, HAL_SPD_REFRESH_COUNTER_31_3 + + li t0, HAL_SPD_REFRESH_RATE_15_625 + beq t0, v0, 8f + li t0, HAL_SPD_REFRESH_COUNTER_15_625 + + li t0, HAL_SPD_REFRESH_RATE_7_8 + beq t0, v0, 8f + li t0, HAL_SPD_REFRESH_COUNTER_7_8 + + # Unknown: assume 3.9 microseconds + li t0, HAL_SPD_REFRESH_COUNTER_3_9 +8: + + or s5, t0 + + # + # Setup RAM_WIDTH + # + beqz v1, 8f + nop + READ_SPD_VALUE HAL_SPD_GET_ERROR_CHECK_WIDTH, 0x7f, v0, NO_ERROR_CHECK + beq v0, zero, 8f + nop + ori s5, HAL_GALILEO_SDRAM_CFG_RAM_WIDTH +8: + + # + # Store the SDRAM configuration register + # + sw s5, HAL_GALILEO_SDRAM_CONFIG_OFFSET(s7) + + # + # Reset SAA9730 now that we are done with the I2C unit. + # This allows the generic PCI library to start with a clean + # slate of devices on the PCI bus. + # + li a0, CYGARC_UNCACHED_ADDRESS(HAL_GALILEO_PCI0_MEM0_BASE) + li t0, HAL_SAA9730_SYSRESET_ALL + sw t0, HAL_SAA9730_SYSRESET_OFFSET(a0) + + # + # Change the Galileo Base address to HAL_ATLAS_CONTROLLER_BASE + # + li t0, HAL_ATLAS_CONTROLLER_BASE_ISD_CONFIG + sw t0, HAL_GALILEO_INT_SPACE_DECODE_OFFSET(s7) + li s7, CYGARC_UNCACHED_ADDRESS(HAL_ATLAS_CONTROLLER_BASE) + + # + # Setup SDRAM Bank 0 Address Decoding + # + li a0, CYGARC_PHYSICAL_ADDRESS(HAL_ATLAS_RAM_BASE) # Physical bottom of Bank 0 + add a1, s0, a0 + subu a1, 1 # Physical top of Bank 0 + + srl t0, a0, HAL_GALILEO_CPU_DECODE_SHIFT # Setup SCS[1:0] + srl t1, a1, HAL_GALILEO_CPU_DECODE_SHIFT # First level decoding + sw t0, HAL_GALILEO_SCS10_LD_OFFSET(s7) # (ie Processor Decode Region) + sw t1, HAL_GALILEO_SCS10_HD_OFFSET(s7) # + + srl t0, a0, HAL_GALILEO_DEV_DECODE_SHIFT # Setup SCS0 + srl t1, a1, HAL_GALILEO_DEV_DECODE_SHIFT # Second level decoding + sw t0, HAL_GALILEO_SCS0_LD_OFFSET(s7) # (ie Device Sub-decode Region) + sw t1, HAL_GALILEO_SCS0_HD_OFFSET(s7) # + + # + # Setup SDRAM Bank 1 Address Decoding + # + add a0, s0, CYGARC_PHYSICAL_ADDRESS(HAL_ATLAS_RAM_BASE) # Physical bottom of Bank 1 + add a1, a0, s1 + subu a1, 1 # Physical top of Bank 1 + + srl t0, a0, HAL_GALILEO_CPU_DECODE_SHIFT # Setup SCS[3:2] + srl t1, a1, HAL_GALILEO_CPU_DECODE_SHIFT # First level decoding + sw t0, HAL_GALILEO_SCS32_LD_OFFSET(s7) # (ie Processor Decode Region) + sw t1, HAL_GALILEO_SCS32_HD_OFFSET(s7) # + + srl t0, a0, HAL_GALILEO_DEV_DECODE_SHIFT # Setup SCS2 + srl t1, a1, HAL_GALILEO_DEV_DECODE_SHIFT # Second level decoding + sw t0, HAL_GALILEO_SCS2_LD_OFFSET(s7) # (ie Device Sub-decode Region) + sw t1, HAL_GALILEO_SCS2_HD_OFFSET(s7) # + + # + # Setup PCI windows + # + li a0, CYGARC_PHYSICAL_ADDRESS(HAL_ATLAS_PCI_MEM0_BASE) + add a1, a0, HAL_ATLAS_PCI_MEM0_SIZE + subu a1, 1 # Physical top of Bank 1 + srl t0, a0, HAL_GALILEO_CPU_DECODE_SHIFT + srl t1, a1, HAL_GALILEO_CPU_DECODE_SHIFT + sw t0, HAL_GALILEO_PCIMEM0_LD_OFFSET(s7) + sw t1, HAL_GALILEO_PCIMEM0_HD_OFFSET(s7) + + li a0, CYGARC_PHYSICAL_ADDRESS(HAL_ATLAS_PCI_MEM1_BASE) + add a1, a0, HAL_ATLAS_PCI_MEM1_SIZE + subu a1, 1 # Physical top of Bank 1 + srl t0, a0, HAL_GALILEO_CPU_DECODE_SHIFT + srl t1, a1, HAL_GALILEO_CPU_DECODE_SHIFT + sw t0, HAL_GALILEO_PCIMEM1_LD_OFFSET(s7) + sw t1, HAL_GALILEO_PCIMEM1_HD_OFFSET(s7) + + li a0, CYGARC_PHYSICAL_ADDRESS(HAL_ATLAS_PCI_IO_BASE) + add a1, a0, HAL_ATLAS_PCI_IO_SIZE + subu a1, 1 # Physical top of Bank 1 + srl t0, a0, HAL_GALILEO_CPU_DECODE_SHIFT + srl t1, a1, HAL_GALILEO_CPU_DECODE_SHIFT + sw t0, HAL_GALILEO_PCIIO_LD_OFFSET(s7) + sw t1, HAL_GALILEO_PCIIO_HD_OFFSET(s7) + + # + # Setup FLASH Address Decoding + # + li a0, CYGARC_PHYSICAL_ADDRESS(HAL_ATLAS_FLASH_BASE) # Physical bottom of Flash Bank + add a1, a0, HAL_ATLAS_FLASH_SIZE + subu a1, 1 # Physical top of Flash Bank + + srl t0, a0, HAL_GALILEO_CPU_DECODE_SHIFT # Setup CS[2:0] + srl t1, a1, HAL_GALILEO_CPU_DECODE_SHIFT # First level decoding + sw t0, HAL_GALILEO_CS20_LD_OFFSET(s7) # (ie Processor Decode Region) + sw t1, HAL_GALILEO_CS20_HD_OFFSET(s7) # + + srl t0, a0, HAL_GALILEO_DEV_DECODE_SHIFT # Setup CS0 + srl t1, a1, HAL_GALILEO_DEV_DECODE_SHIFT # Second level decoding + sw t0, HAL_GALILEO_CS0_LD_OFFSET(s7) # (ie Device Sub-decode Region) + sw t1, HAL_GALILEO_CS0_HD_OFFSET(s7) # + + # + # Now disable all unused decodes + # (SCS1, SCS3, PCI1xx, CS1, CS2) + # + li t0, 0xffff + move t1, zero + sw t0, HAL_GALILEO_SCS1_LD_OFFSET(s7) + sw t1, HAL_GALILEO_SCS1_HD_OFFSET(s7) + sw t0, HAL_GALILEO_SCS3_LD_OFFSET(s7) + sw t1, HAL_GALILEO_SCS3_HD_OFFSET(s7) + sw t0, HAL_GALILEO_PCI1IO_LD_OFFSET(s7) + sw t1, HAL_GALILEO_PCI1IO_HD_OFFSET(s7) + sw t0, HAL_GALILEO_PCI1MEM0_LD_OFFSET(s7) + sw t1, HAL_GALILEO_PCI1MEM0_HD_OFFSET(s7) + sw t0, HAL_GALILEO_PCI1MEM1_LD_OFFSET(s7) + sw t1, HAL_GALILEO_PCI1MEM1_HD_OFFSET(s7) + sw t0, HAL_GALILEO_CS1_LD_OFFSET(s7) + sw t1, HAL_GALILEO_CS1_HD_OFFSET(s7) + sw t0, HAL_GALILEO_CS2_LD_OFFSET(s7) + sw t1, HAL_GALILEO_CS2_HD_OFFSET(s7) + +noerror: + move v0, zero + add v1, s0, s1 + move ra, s8 + jr ra + nop + +error: + li v0, HAL_ATLAS_MEMERROR + move ra, s8 + jr ra + nop + +FUNC_END(hal_atlas_init_sdram) + +## +## Read a value from the SDRAM SPD device. +## +## Parameters: a0 = subaddress +## Returns: v0 = SPD value read +## +FUNC_START(read_spd_value) + # + # Setup a base address register + # + li a1, CYGARC_UNCACHED_ADDRESS(HAL_GALILEO_PCI0_MEM0_BASE) + + # + # Write the I2C command + # + sll a0, 16 + li t0, (HAL_SAA9730_I2CTFR_ATTR1_CONT | \ + ((0xa0 << 24) | HAL_SAA9730_I2CTFR_ATTR2_START) | \ + ((0xa1 << 8) | HAL_SAA9730_I2CTFR_ATTR0_START)) + or a0, t0 + sw a0, HAL_SAA9730_I2CTFR_OFFSET(a1) +1: lw t0, HAL_SAA9730_I2CTFR_OFFSET(a1) + and t0, 0x1 + bnez t0, 1b + nop + + # + # Read the SPD value + # + li a0, HAL_SAA9730_I2CTFR_ATTR2_STOP + sw a0, HAL_SAA9730_I2CTFR_OFFSET(a1) +1: lw t0, HAL_SAA9730_I2CTFR_OFFSET(a1) + and t0, 0x1 + bnez t0, 1b + nop + + # + # Setup the return value. + # + lw v0, HAL_SAA9730_I2CTFR_OFFSET(a1) + srl v0, 24 + + jr ra + nop +FUNC_END(read_spd_value) +#endif /* defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_ROMRAM) */ + +##----------------------------------------------------------------------------- +# Interrupt vector tables. +# These tables contain the isr, data and object pointers used to deliver +# interrupts to user code. + + .extern hal_default_isr + + .data + + .globl hal_interrupt_handlers +hal_interrupt_handlers: + .rept 20 + .long hal_default_isr + .endr + + .globl hal_interrupt_data +hal_interrupt_data: + .rept 20 + .long 0 + .endr + + .globl hal_interrupt_objects +hal_interrupt_objects: + .rept 20 + .long 0 + .endr + + +##----------------------------------------------------------------------------- +## end of platform.S diff --git a/packages/hal/mips/atlas/current/src/plf_misc.c b/packages/hal/mips/atlas/current/src/plf_misc.c new file mode 100644 --- /dev/null +++ b/packages/hal/mips/atlas/current/src/plf_misc.c @@ -0,0 +1,403 @@ +//========================================================================== +// +// plf_misc.c +// +// HAL platform miscellaneous functions +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg +// Contributors: nickg, jlarmour, dmoseley +// Date: 2000-06-06 +// Purpose: HAL miscellaneous functions +// Description: This file contains miscellaneous functions provided by the +// HAL. +// +//####DESCRIPTIONEND#### +// +//========================================================================*/ + +#define CYGARC_HAL_COMMON_EXPORT_CPU_MACROS +#include + +#include // Base types +#include // tracing macros +#include // assertion macros + +#include // architectural definitions + +#include // Interrupt handling + +#include // Cache handling + +#include + + +#if defined(CYGPKG_IO_PCI) +#include +#include +#endif + +/*------------------------------------------------------------------------*/ + +#if defined(CYGPKG_CYGMON) +#include CYGHWR_MEMORY_LAYOUT_H +extern unsigned long cygmon_memsize; +#endif + +void hal_platform_init(void) +{ + HAL_WRITE_UINT32(HAL_DISPLAY_LEDBAR, 0xff); +#if defined(CYGPKG_CYGMON) + HAL_WRITE_UINT32(HAL_DISPLAY_ASCIIPOS0, ' '); + HAL_WRITE_UINT32(HAL_DISPLAY_ASCIIPOS1, 'C'); + HAL_WRITE_UINT32(HAL_DISPLAY_ASCIIPOS2, 'Y'); + HAL_WRITE_UINT32(HAL_DISPLAY_ASCIIPOS3, 'G'); + HAL_WRITE_UINT32(HAL_DISPLAY_ASCIIPOS4, 'M'); + HAL_WRITE_UINT32(HAL_DISPLAY_ASCIIPOS5, 'O'); + HAL_WRITE_UINT32(HAL_DISPLAY_ASCIIPOS6, 'N'); + HAL_WRITE_UINT32(HAL_DISPLAY_ASCIIPOS7, ' '); +#elif defined(CYGPKG_REDBOOT) + HAL_WRITE_UINT32(HAL_DISPLAY_ASCIIPOS0, 'R'); + HAL_WRITE_UINT32(HAL_DISPLAY_ASCIIPOS1, 'e'); + HAL_WRITE_UINT32(HAL_DISPLAY_ASCIIPOS2, 'd'); + HAL_WRITE_UINT32(HAL_DISPLAY_ASCIIPOS3, 'B'); + HAL_WRITE_UINT32(HAL_DISPLAY_ASCIIPOS4, 'o'); + HAL_WRITE_UINT32(HAL_DISPLAY_ASCIIPOS5, 'o'); + HAL_WRITE_UINT32(HAL_DISPLAY_ASCIIPOS6, 't'); + HAL_WRITE_UINT32(HAL_DISPLAY_ASCIIPOS7, ' '); +#else + HAL_WRITE_UINT32(HAL_DISPLAY_ASCIIPOS0, ' '); + HAL_WRITE_UINT32(HAL_DISPLAY_ASCIIPOS1, ' '); + HAL_WRITE_UINT32(HAL_DISPLAY_ASCIIPOS2, 'e'); + HAL_WRITE_UINT32(HAL_DISPLAY_ASCIIPOS3, 'C'); + HAL_WRITE_UINT32(HAL_DISPLAY_ASCIIPOS4, 'O'); + HAL_WRITE_UINT32(HAL_DISPLAY_ASCIIPOS5, 'S'); + HAL_WRITE_UINT32(HAL_DISPLAY_ASCIIPOS6, ' '); + HAL_WRITE_UINT32(HAL_DISPLAY_ASCIIPOS7, ' '); +#endif + + // Set up eCos/ROM interfaces + hal_if_init(); + + HAL_ICACHE_INVALIDATE_ALL(); + HAL_ICACHE_ENABLE(); + HAL_DCACHE_INVALIDATE_ALL(); + HAL_DCACHE_ENABLE(); + +#if defined(CYGPKG_CYGMON) + { + // Store the BSP memory info + unsigned long * ram_real_base = (unsigned long *)0x80000000; + unsigned long memsize = *ram_real_base; + // Adjust memsize for the interrupt vectors reserved space + memsize -= (CYGMEM_REGION_ram - (unsigned long)ram_real_base); + cygmon_memsize = memsize; + } + + { + // + // Go ahead and enable IM[2] (ie HWInt[0]) so that we get interrupts + // from the external devices. The device interrupts will still be + // disabled in the CBUS FPGA interrupt controller, so this will not + // cause spurious interrupts. + // It is still up to the device drivers to enable the interrupts in + // the interrupt controller + // + register unsigned long status; + asm volatile (" mfc0 %0, $12" : "=r" (status) : ); + status |= SR_IBIT3; + asm volatile (" mtc0 %0, $12" : : "r" (status)); + } +#endif +} + + +/*------------------------------------------------------------------------*/ +/* Reset support */ + +void hal_atlas_reset(void) +{ + *HAL_ATLAS_SOFTRES = HAL_ATLAS_GORESET; +} + +/*------------------------------------------------------------------------*/ +/* Syscall support */ +#ifdef CYGPKG_CYGMON +// Cygmon provides syscall handling for this board +#include +int __get_syscall_num (void) +{ + return SIGSYS; +} +#endif + + +/*------------------------------------------------------------------------*/ +/* PCI support */ +#if defined(CYGPKG_IO_PCI) + +#define PCIMEM_START 0x08000000 // PCI memory address +#define PCIMEM_SIZE 0x10000000 // 256 MByte +#define PCIIO_START 0x18000000 // PCI io address +#define PCIIO_SIZE 0x03E00000 // 62 MByte + +static int __check_bar(cyg_uint32 addr, cyg_uint32 size) +{ + int n; + + for (n = 0; n <= 31; n++) + if (size == (1 << n)) { + /* Check that address is naturally aligned */ + if (addr != (addr & ~(size-1))) + return 0; + return size - 1; + } + return 0; +} + + +// One-time PCI initialization. + +void cyg_hal_plf_pci_init(void) +{ + cyg_uint32 bar_ena, start10, start32, end, size; + cyg_uint8 next_bus; + + // Setup for bus mastering + cyg_hal_plf_pci_cfg_write_dword(0, CYG_PCI_DEV_MAKE_DEVFN(0,0), + CYG_PCI_CFG_COMMAND, + CYG_PCI_CFG_COMMAND_IO | + CYG_PCI_CFG_COMMAND_MEMORY | + CYG_PCI_CFG_COMMAND_MASTER | + CYG_PCI_CFG_COMMAND_PARITY | + CYG_PCI_CFG_COMMAND_SERR); + + // Setup latency timer field + cyg_hal_plf_pci_cfg_write_byte(0, CYG_PCI_DEV_MAKE_DEVFN(0,0), + CYG_PCI_CFG_LATENCY_TIMER, 6); + + // Disable all BARs + bar_ena = 0x1ff; + + // Check for active SCS10 + start10 = HAL_GALILEO_GETREG(HAL_GALILEO_SCS10_LD_OFFSET) << 21; + end = ((HAL_GALILEO_GETREG(HAL_GALILEO_SCS10_HD_OFFSET) & 0x7f) + 1) << 21; + if (end > start10) { + if ((size = __check_bar(start10, end - start10)) != 0) { + // Enable BAR + HAL_GALILEO_PUTREG(HAL_GALILEO_PCI0_SCS10_SIZE_OFFSET, size); + bar_ena &= ~HAL_GALILEO_BAR_ENA_SCS10; + } + } + + // Check for active SCS32 + start32 = HAL_GALILEO_GETREG(HAL_GALILEO_SCS32_LD_OFFSET) << 21; + end = ((HAL_GALILEO_GETREG(HAL_GALILEO_SCS32_HD_OFFSET) & 0x7f) + 1) << 21; + if (end > start32) { + if ((size = __check_bar(start32, end - start32)) != 0) { + // Enable BAR + HAL_GALILEO_PUTREG(HAL_GALILEO_PCI0_SCS32_SIZE_OFFSET, size); + bar_ena &= ~HAL_GALILEO_BAR_ENA_SCS32; + } + } + + bar_ena &= ~HAL_GALILEO_BAR_ENA_SCS10; + HAL_GALILEO_PUTREG(HAL_GALILEO_BAR_ENA_OFFSET, bar_ena); + + + cyg_hal_plf_pci_cfg_write_dword(0, CYG_PCI_DEV_MAKE_DEVFN(0,0), + CYG_PCI_CFG_BAR_0, 0xffffffff); + + end = cyg_hal_plf_pci_cfg_read_dword(0, CYG_PCI_DEV_MAKE_DEVFN(0,0), + CYG_PCI_CFG_BAR_0); + + cyg_hal_plf_pci_cfg_write_dword(0, CYG_PCI_DEV_MAKE_DEVFN(0,0), + CYG_PCI_CFG_BAR_0, start10); + + + cyg_hal_plf_pci_cfg_write_dword(0, CYG_PCI_DEV_MAKE_DEVFN(0,0), + CYG_PCI_CFG_BAR_1, 0xffffffff); + + end = cyg_hal_plf_pci_cfg_read_dword(0, CYG_PCI_DEV_MAKE_DEVFN(0,0), + CYG_PCI_CFG_BAR_1); + + cyg_hal_plf_pci_cfg_write_dword(0, CYG_PCI_DEV_MAKE_DEVFN(0,0), + CYG_PCI_CFG_BAR_1, start32); + + +#if 0 // FIXME + + // SAA9730 was previously initialized just enough to use I2C bus + // during SDRAM configuration. We reset it here so generic PCI + // library can deal with it. + *((volatile unsigned *)(HAL_GALILEO_PCI0_MEM0_BASE + HAL_SAA9730_SYSRESET_OFFSET)) + = HAL_SAA9730_SYSRESET_ALL; +#endif + + // Configure PCI bus. + next_bus = 1; + cyg_pci_set_memory_base(CYGARC_PHYSICAL_ADDRESS(HAL_ATLAS_PCI_MEM0_BASE)); + cyg_pci_set_io_base(CYGARC_PHYSICAL_ADDRESS(HAL_ATLAS_PCI_IO_BASE)); + cyg_pci_configure_bus(0, &next_bus); +} + + +// Check for configuration error. +static int pci_config_errcheck(void) +{ + cyg_uint32 irq; + + // Check for master or target abort + irq = HAL_GALILEO_GETREG(HAL_GALILEO_IRQ_CAUSE_OFFSET); + + if (irq & (HAL_GALILEO_IRQCAUSE_MASABT | HAL_GALILEO_IRQCAUSE_TARABT)) { + // Error. Clear bits. + HAL_GALILEO_PUTREG(HAL_GALILEO_IRQ_CAUSE_OFFSET, + ~(HAL_GALILEO_IRQCAUSE_MASABT | HAL_GALILEO_IRQCAUSE_TARABT)); + return 1; + } + return 0; +} + +cyg_uint32 cyg_hal_plf_pci_cfg_read_dword (cyg_uint32 bus, + cyg_uint32 devfn, + cyg_uint32 offset) +{ + cyg_uint32 config_data; + + HAL_GALILEO_PUTREG(HAL_GALILEO_PCI0_CONFIG_ADDR_OFFSET, + HAL_GALILEO_PCI0_CONFIG_ADDR_ENABLE | + (bus << 16) | (devfn << 8) | offset); + + config_data = HAL_GALILEO_GETREG(HAL_GALILEO_PCI0_CONFIG_DATA_OFFSET); + + if (pci_config_errcheck()) + return 0xffffffff; + return config_data; +} + +cyg_uint16 cyg_hal_plf_pci_cfg_read_word (cyg_uint32 bus, + cyg_uint32 devfn, + cyg_uint32 offset) +{ + cyg_uint32 config_dword; + + HAL_GALILEO_PUTREG(HAL_GALILEO_PCI0_CONFIG_ADDR_OFFSET, + HAL_GALILEO_PCI0_CONFIG_ADDR_ENABLE | + (bus << 16) | (devfn << 8) | (offset & ~3)); + + config_dword = HAL_GALILEO_GETREG(HAL_GALILEO_PCI0_CONFIG_DATA_OFFSET); + + if (pci_config_errcheck()) + return 0xffff; + return (cyg_uint16)((config_dword >> ((offset & 3) * 8)) & 0xffff); +} + +cyg_uint8 cyg_hal_plf_pci_cfg_read_byte (cyg_uint32 bus, + cyg_uint32 devfn, + cyg_uint32 offset) +{ + cyg_uint32 config_dword; + + HAL_GALILEO_PUTREG(HAL_GALILEO_PCI0_CONFIG_ADDR_OFFSET, + HAL_GALILEO_PCI0_CONFIG_ADDR_ENABLE | + (bus << 16) | (devfn << 8) | (offset & ~3)); + + config_dword = HAL_GALILEO_GETREG(HAL_GALILEO_PCI0_CONFIG_DATA_OFFSET); + + if (pci_config_errcheck()) + return 0xff; + return (cyg_uint8)((config_dword >> ((offset & 3) * 8)) & 0xff); +} + +void cyg_hal_plf_pci_cfg_write_dword (cyg_uint32 bus, + cyg_uint32 devfn, + cyg_uint32 offset, + cyg_uint32 data) +{ + HAL_GALILEO_PUTREG(HAL_GALILEO_PCI0_CONFIG_ADDR_OFFSET, + HAL_GALILEO_PCI0_CONFIG_ADDR_ENABLE | + (bus << 16) | (devfn << 8) | offset); + + HAL_GALILEO_PUTREG(HAL_GALILEO_PCI0_CONFIG_DATA_OFFSET, data); + + (void)pci_config_errcheck(); +} + +void cyg_hal_plf_pci_cfg_write_word (cyg_uint32 bus, + cyg_uint32 devfn, + cyg_uint32 offset, + cyg_uint16 data) +{ + cyg_uint32 config_dword, shift; + + HAL_GALILEO_PUTREG(HAL_GALILEO_PCI0_CONFIG_ADDR_OFFSET, + HAL_GALILEO_PCI0_CONFIG_ADDR_ENABLE | + (bus << 16) | (devfn << 8) | (offset & ~3)); + + config_dword = HAL_GALILEO_GETREG(HAL_GALILEO_PCI0_CONFIG_DATA_OFFSET); + if (pci_config_errcheck()) + return; + + shift = (offset & 3) * 8; + config_dword &= ~(0xffff << shift); + config_dword |= (data << shift); + + HAL_GALILEO_PUTREG(HAL_GALILEO_PCI0_CONFIG_DATA_OFFSET, config_dword); + + (void)pci_config_errcheck(); +} + +void cyg_hal_plf_pci_cfg_write_byte (cyg_uint32 bus, + cyg_uint32 devfn, + cyg_uint32 offset, + cyg_uint8 data) +{ + cyg_uint32 config_dword, shift; + + HAL_GALILEO_PUTREG(HAL_GALILEO_PCI0_CONFIG_ADDR_OFFSET, + HAL_GALILEO_PCI0_CONFIG_ADDR_ENABLE | + (bus << 16) | (devfn << 8) | (offset & ~3)); + + config_dword = HAL_GALILEO_GETREG(HAL_GALILEO_PCI0_CONFIG_DATA_OFFSET); + if (pci_config_errcheck()) + return; + + shift = (offset & 3) * 8; + config_dword &= ~(0xff << shift); + config_dword |= (data << shift); + + HAL_GALILEO_PUTREG(HAL_GALILEO_PCI0_CONFIG_DATA_OFFSET, config_dword); + + (void)pci_config_errcheck(); +} +#endif // defined(CYGPKG_IO_PCI) + +/*------------------------------------------------------------------------*/ +/* End of plf_misc.c */ diff --git a/packages/hal/mips/atlas/current/src/redboot_cmds.c b/packages/hal/mips/atlas/current/src/redboot_cmds.c new file mode 100644 --- /dev/null +++ b/packages/hal/mips/atlas/current/src/redboot_cmds.c @@ -0,0 +1,180 @@ +//========================================================================== +// +// redboot_cmds.c +// +// Atlas [platform] specific RedBoot commands +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas, jskov +// Date: 2000-07-14 +// Purpose: +// Description: +// +// This code is part of RedBoot (tm). +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include + +#include +#include + +// Exported CLI function(s) + +// The exec command works like the go command in YAMON - that is, +// providing callee with argc, argv, and env. In addition to the +// information provided by the user, + +static void do_exec(int argc, char *argv[]); + +static char exec_usage[] = +#if 0 + "[-r [-s ]] \n" +#endif + "[-w timeout] [-c \"kernel command line\"] []"; + +RedBoot_cmd("exec", + "Execute an image - with MMU off", + exec_usage, + do_exec + ); + +typedef void code_fun(void); + +#define MAX_ARGS_LEN 128 +#define _ARGC 2 + +char _cmd_str[] = "exec"; +char _arg_str[MAX_ARGS_LEN]; +char* _exec_argv[_ARGC] = { _cmd_str, _arg_str }; + +/* Environment variable */ +typedef struct +{ + char *name; + char *val; +} t_env_var; + +char _env_memsize[11]; +char _env_ttymode[32]; +char _env_ethaddr[18]; +t_env_var _exec_envp[] = { + { "memsize", _env_memsize }, + { "modetty0", _env_ttymode }, + { "ethaddr", _env_ethaddr }, + { NULL, NULL } +}; + +static void +do_exec(int argc, char *argv[]) +{ + unsigned long entry; + unsigned long oldints; + bool wait_time_set; + int wait_time, res; + bool cmd_line_set; +#if 0 + bool ramdisk_addr_set, ramdisk_size_set; + unsigned long ramdisk_addr, ramdisk_size; +#endif + struct option_info opts[4]; + char line[8]; + char *cmd_line; + int num_options; + + entry = (unsigned long)entry_address; // Default from last 'load' operation + init_opts(&opts[0], 'w', true, OPTION_ARG_TYPE_NUM, + (void **)&wait_time, (bool *)&wait_time_set, "wait timeout"); + init_opts(&opts[1], 'c', true, OPTION_ARG_TYPE_STR, + (void **)&cmd_line, (bool *)&cmd_line_set, "kernel command line"); + num_options = 2; +#if 0 + init_opts(&opts[2], 'r', true, OPTION_ARG_TYPE_NUM, + (void **)&ramdisk_addr, (bool *)&ramdisk_addr_set, "ramdisk_addr"); + init_opts(&opts[3], 's', true, OPTION_ARG_TYPE_NUM, + (void **)&ramdisk_size, (bool *)&ramdisk_size_set, "ramdisk_size"); + num_options += 2; +#endif + + if (!scan_opts(argc, argv, 1, opts, num_options, (void *)&entry, + OPTION_ARG_TYPE_NUM, "starting address")) + { + return; + } + if (cmd_line_set) { + strncpy(_arg_str, cmd_line, MAX_ARGS_LEN); + } +#if 0 + if (ramdisk_addr_set) { + params->rd_start = ramdisk_addr; + if (ramdisk_size_set) { + params->rd_size = ramdisk_size; + } else { + params->rd_size = 4096*1024; + } + } +#endif + + // Compute memory size + sprintf(_env_memsize, "0x%08x", (ram_end - ram_start + (1024*1024-1)) & ~(1024*1024-1)); + // Set enet address + sprintf(_env_ethaddr, "%02x.%02x.%02x.%02x.%02x.%02x", + __local_enet_addr[0], __local_enet_addr[1], + __local_enet_addr[2], __local_enet_addr[3], + __local_enet_addr[4], __local_enet_addr[5]); + // Set console parameters (only baud rate part configurable for now) + sprintf(_env_ttymode, "%d,n,8,1,hw", CYGNUM_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL_BAUD); + + if (wait_time_set) { + printf("About to start execution at %p - abort with ^C within %d seconds\n", + (void *)entry, wait_time); + res = gets(line, sizeof(line), wait_time*1000); + if (res == _GETS_CTRLC) { + return; + } + } + + HAL_DISABLE_INTERRUPTS(oldints); + HAL_DCACHE_SYNC(); + HAL_ICACHE_DISABLE(); + HAL_DCACHE_DISABLE(); + HAL_DCACHE_SYNC(); + HAL_ICACHE_INVALIDATE_ALL(); + HAL_DCACHE_INVALIDATE_ALL(); + asm volatile ("move $4,%1;" // a0 + "move $5,%2;" // a1 + "move $6,%3;" // a2 + "j %0;" + : : "r"(entry),"r"(_ARGC),"r"(_exec_argv),"r"(_exec_envp) : "$4","$5","$6"); +} + +// EOF redboot_cmds.c diff --git a/packages/hal/mips/atlas/current/src/ser16c550c.c b/packages/hal/mips/atlas/current/src/ser16c550c.c new file mode 100644 --- /dev/null +++ b/packages/hal/mips/atlas/current/src/ser16c550c.c @@ -0,0 +1,599 @@ +//============================================================================= +// +// ser16c550c.c +// +// Simple driver for the 16c550c serial controllers on the Atlas board +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): dmoseley +// Contributors:dmoseley +// Date: 2000-07-06 +// Description: Simple driver for the 16c550c serial controller +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include +#include +#include CYGBLD_HAL_PLATFORM_H + +#include // SAVE/RESTORE GP macros +#include // IO macros +#include // interface API +#include // HAL_ENABLE/MASK/UNMASK_INTERRUPTS +#include // Helper functions +#include // CYG_ISR_HANDLED + +//----------------------------------------------------------------------------- +// There is only one port. +#define ATLAS_SER_16550_BASE 0xBF000900 + +//----------------------------------------------------------------------------- +// Define the serial registers. The Atlas board is equipped with a 16550C +// serial chip. +#define SER_16550_RBR 0x00 // receiver buffer register, read, dlab = 0 +#define SER_16550_THR 0x00 // transmitter holding register, write, dlab = 0 +#define SER_16550_DLL 0x00 // divisor latch (LS), read/write, dlab = 1 +#define SER_16550_IER 0x08 // interrupt enable register, read/write, dlab = 0 +#define SER_16550_DLM 0x08 // divisor latch (MS), read/write, dlab = 1 +#define SER_16550_IIR 0x10 // interrupt identification reg, read, dlab = 0 +#define SER_16550_FCR 0x10 // fifo control register, write, dlab = 0 +#define SER_16550_AFR 0x10 // alternate function reg, read/write, dlab = 1 +#define SER_16550_LCR 0x18 // line control register, read/write +#define SER_16550_MCR 0x20 // modem control register, read/write +#define SER_16550_LSR 0x28 // line status register, read +#define SER_16550_MSR 0x30 // modem status register, read +#define SER_16550_SCR 0x38 // scratch pad register + +// The interrupt enable register bits. +#define SIO_IER_ERDAI 0x01 // enable received data available irq +#define SIO_IER_ETHREI 0x02 // enable THR empty interrupt +#define SIO_IER_ELSI 0x04 // enable receiver line status irq +#define SIO_IER_EMSI 0x08 // enable modem status interrupt + +// The interrupt identification register bits. +#define SIO_IIR_IP 0x01 // 0 if interrupt pending +#define SIO_IIR_ID_MASK 0x0e // mask for interrupt ID bits + +// The line status register bits. +#define SIO_LSR_DR 0x01 // data ready +#define SIO_LSR_OE 0x02 // overrun error +#define SIO_LSR_PE 0x04 // parity error +#define SIO_LSR_FE 0x08 // framing error +#define SIO_LSR_BI 0x10 // break interrupt +#define SIO_LSR_THRE 0x20 // transmitter holding register empty +#define SIO_LSR_TEMT 0x40 // transmitter register empty +#define SIO_LSR_ERR 0x80 // any error condition + +// The modem status register bits. +#define SIO_MSR_DCTS 0x01 // delta clear to send +#define SIO_MSR_DDSR 0x02 // delta data set ready +#define SIO_MSR_TERI 0x04 // trailing edge ring indicator +#define SIO_MSR_DDCD 0x08 // delta data carrier detect +#define SIO_MSR_CTS 0x10 // clear to send +#define SIO_MSR_DSR 0x20 // data set ready +#define SIO_MSR_RI 0x40 // ring indicator +#define SIO_MSR_DCD 0x80 // data carrier detect + +// The line control register bits. +#define SIO_LCR_WLS0 0x01 // word length select bit 0 +#define SIO_LCR_WLS1 0x02 // word length select bit 1 +#define SIO_LCR_STB 0x04 // number of stop bits +#define SIO_LCR_PEN 0x08 // parity enable +#define SIO_LCR_EPS 0x10 // even parity select +#define SIO_LCR_SP 0x20 // stick parity +#define SIO_LCR_SB 0x40 // set break +#define SIO_LCR_DLAB 0x80 // divisor latch access bit + +// The FIFO control register +#define SIO_FCR_FCR0 0x01 // enable xmit and rcvr fifos +#define SIO_FCR_FCR1 0x02 // clear RCVR FIFO +#define SIO_FCR_FCR2 0x04 // clear XMIT FIFO + +///////////////////////////////////////// +// Interrupt Enable Register +#define IER_RCV 0x01 +#define IER_XMT 0x02 +#define IER_LS 0x04 +#define IER_MS 0x08 + +// Line Control Register +#define LCR_WL5 0x00 // Word length +#define LCR_WL6 0x01 +#define LCR_WL7 0x02 +#define LCR_WL8 0x03 +#define LCR_SB1 0x00 // Number of stop bits +#define LCR_SB1_5 0x04 // 1.5 -> only valid with 5 bit words +#define LCR_SB2 0x04 +#define LCR_PN 0x00 // Parity mode - none +#define LCR_PE 0x0C // Parity mode - even +#define LCR_PO 0x08 // Parity mode - odd +#define LCR_PM 0x28 // Forced "mark" parity +#define LCR_PS 0x38 // Forced "space" parity +#define LCR_DL 0x80 // Enable baud rate latch + +// Line Status Register +#define LSR_RSR 0x01 +#define LSR_THE 0x20 + +// Modem Control Register +#define MCR_DTR 0x01 +#define MCR_RTS 0x02 +#define MCR_INT 0x08 // Enable interrupts + +// Interrupt status register +#define ISR_None 0x01 +#define ISR_Rx_Line_Status 0x06 +#define ISR_Rx_Avail 0x04 +#define ISR_Rx_Char_Timeout 0x0C +#define ISR_Tx_Empty 0x02 +#define IRS_Modem_Status 0x00 + +// FIFO control register +#define FCR_ENABLE 0x01 +#define FCR_CLEAR_RCVR 0x02 +#define FCR_CLEAR_XMIT 0x04 + +// The Atlas board has a 3.6864 MHz crystal +#define BAUD_110 2094 +#define BAUD_150 1536 +#define BAUD_300 768 +#define BAUD_600 384 +#define BAUD_1200 192 +#define BAUD_2400 96 +#define BAUD_4800 48 +#define BAUD_7200 32 +#define BAUD_9600 24 +#define BAUD_14400 16 +#define BAUD_19200 12 +#define BAUD_38400 6 +#define BAUD_57600 4 +#define BAUD_115200 2 +#define BAUD_230400 1 + +#if CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_BAUD==9600 +#define CYG_DEV_SERIAL_BAUD_DIVISOR BAUD_9600 +#endif +#if CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_BAUD==19200 +#define CYG_DEV_SERIAL_BAUD_DIVISOR BAUD_19200 +#endif +#if CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_BAUD==38400 +#define CYG_DEV_SERIAL_BAUD_DIVISOR BAUD_38400 +#endif +#if CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_BAUD==57600 +#define CYG_DEV_SERIAL_BAUD_DIVISOR BAUD_57600 +#endif +#if CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_BAUD==115200 +#define CYG_DEV_SERIAL_BAUD_DIVISOR BAUD_115200 +#endif + +#ifndef CYG_DEV_SERIAL_BAUD_DIVISOR +#error Missing/incorrect serial baud rate defined - CDL error? +#endif + + +//----------------------------------------------------------------------------- +typedef struct { + cyg_uint8* base; + cyg_int32 msec_timeout; + int isr_vector; +} channel_data_t; + +static const channel_data_t channels[1] = { + { (cyg_uint8*)ATLAS_SER_16550_BASE, 1000, CYGNUM_HAL_INTERRUPT_DEBUG_UART} +}; + +//----------------------------------------------------------------------------- +// Set the baud rate + +static void +cyg_hal_plf_serial_set_baud(cyg_uint8* port, cyg_uint16 baud_divisor) +{ + cyg_uint8 _lcr; + + HAL_READ_UINT8(port+SER_16550_LCR, _lcr); + _lcr |= LCR_DL; + HAL_WRITE_UINT8(port+SER_16550_LCR, _lcr); + + HAL_WRITE_UINT8(port+SER_16550_DLM, baud_divisor >> 8); + HAL_WRITE_UINT8(port+SER_16550_DLL, baud_divisor & 0xff); + + _lcr &= ~LCR_DL; + HAL_WRITE_UINT8(port+SER_16550_LCR, _lcr); +} + +//----------------------------------------------------------------------------- +// The minimal init, get and put functions. All by polling. + +void +cyg_hal_plf_serial_init_channel(void* __ch_data) +{ + cyg_uint8* port; + cyg_uint8 _lcr; + + // Some of the diagnostic print code calls through here with no idea what the ch_data is. + // Go ahead and assume it is channels[0]. + if (__ch_data == 0) + __ch_data = (void*)&channels[0]; + + port = ((channel_data_t*)__ch_data)->base; + + // Disable port interrupts while changing hardware + HAL_WRITE_UINT8(port+SER_16550_IER, 0); + + // Set databits, stopbits and parity. + _lcr = LCR_WL8 | LCR_SB1 | LCR_PN; + HAL_WRITE_UINT8(port+SER_16550_LCR, _lcr); + + // Set baud rate. + cyg_hal_plf_serial_set_baud(port, CYG_DEV_SERIAL_BAUD_DIVISOR); + + // Enable and clear FIFO + HAL_WRITE_UINT8(port+SER_16550_FCR, (FCR_ENABLE | FCR_CLEAR_RCVR | FCR_CLEAR_XMIT)); + + // enable RTS to keep host side happy + HAL_WRITE_UINT8( port+SER_16550_MCR, MCR_RTS ); + + // Don't allow interrupts. + HAL_WRITE_UINT8(port+SER_16550_IER, 0); +} + +void +cyg_hal_plf_serial_putc(void* __ch_data, cyg_uint8 __ch) +{ + cyg_uint8* port; + cyg_uint8 _lsr; + + // Some of the diagnostic print code calls through here with no idea what the ch_data is. + // Go ahead and assume it is channels[0]. + if (__ch_data == 0) + __ch_data = (void*)&channels[0]; + + port = ((channel_data_t*)__ch_data)->base; + + CYGARC_HAL_SAVE_GP(); + + do { + HAL_READ_UINT8(port+SER_16550_LSR, _lsr); + } while ((_lsr & SIO_LSR_THRE) == 0); + + // Now, the transmit buffer is empty + HAL_WRITE_UINT8(port+SER_16550_THR, __ch); + + // Hang around until the character has been safely sent. + do { + HAL_READ_UINT8(port+SER_16550_LSR, _lsr); + } while ((_lsr & SIO_LSR_THRE) == 0); + + CYGARC_HAL_RESTORE_GP(); +} + +static cyg_bool +cyg_hal_plf_serial_getc_nonblock(void* __ch_data, cyg_uint8* ch) +{ + cyg_uint8* port; + cyg_uint8 _lsr; + + // Some of the diagnostic print code calls through here with no idea what the ch_data is. + // Go ahead and assume it is channels[0]. + if (__ch_data == 0) + __ch_data = (void*)&channels[0]; + + port = ((channel_data_t*)__ch_data)->base; + + HAL_READ_UINT8(port+SER_16550_LSR, _lsr); + if ((_lsr & SIO_LSR_DR) == 0) + return false; + + HAL_READ_UINT8(port+SER_16550_RBR, *ch); + + return true; +} + +cyg_uint8 +cyg_hal_plf_serial_getc(void* __ch_data) +{ + cyg_uint8 ch; + CYGARC_HAL_SAVE_GP(); + + // Some of the diagnostic print code calls through here with no idea what the ch_data is. + // Go ahead and assume it is channels[0]. + if (__ch_data == 0) + __ch_data = (void*)&channels[0]; + + while(!cyg_hal_plf_serial_getc_nonblock(__ch_data, &ch)); + + CYGARC_HAL_RESTORE_GP(); + return ch; +} + +static void +cyg_hal_plf_serial_write(void* __ch_data, const cyg_uint8* __buf, + cyg_uint32 __len) +{ + CYGARC_HAL_SAVE_GP(); + + // Some of the diagnostic print code calls through here with no idea what the ch_data is. + // Go ahead and assume it is channels[0]. + if (__ch_data == 0) + __ch_data = (void*)&channels[0]; + + while(__len-- > 0) + cyg_hal_plf_serial_putc(__ch_data, *__buf++); + + CYGARC_HAL_RESTORE_GP(); +} + +static void +cyg_hal_plf_serial_read(void* __ch_data, cyg_uint8* __buf, cyg_uint32 __len) +{ + CYGARC_HAL_SAVE_GP(); + + // Some of the diagnostic print code calls through here with no idea what the ch_data is. + // Go ahead and assume it is channels[0]. + if (__ch_data == 0) + __ch_data = (void*)&channels[0]; + + while(__len-- > 0) + *__buf++ = cyg_hal_plf_serial_getc(__ch_data); + + CYGARC_HAL_RESTORE_GP(); +} + + +cyg_bool +cyg_hal_plf_serial_getc_timeout(void* __ch_data, cyg_uint8* ch) +{ + int delay_count; + channel_data_t* chan; + cyg_bool res; + CYGARC_HAL_SAVE_GP(); + + // Some of the diagnostic print code calls through here with no idea what the ch_data is. + // Go ahead and assume it is channels[0]. + if (__ch_data == 0) + __ch_data = (void*)&channels[0]; + + chan = (channel_data_t*)__ch_data; + + delay_count = chan->msec_timeout * 10; // delay in .1 ms steps + + for(;;) { + res = cyg_hal_plf_serial_getc_nonblock(__ch_data, ch); + if (res || 0 == delay_count--) + break; + CYGACC_CALL_IF_DELAY_US(100); + } + + CYGARC_HAL_RESTORE_GP(); + return res; +} + +static int +cyg_hal_plf_serial_control(void *__ch_data, __comm_control_cmd_t __func, ...) +{ + static int irq_state = 0; + channel_data_t* chan; + cyg_uint8 ier; + int ret = 0; + CYGARC_HAL_SAVE_GP(); + + // Some of the diagnostic print code calls through here with no idea what the ch_data is. + // Go ahead and assume it is channels[0]. + if (__ch_data == 0) + __ch_data = (void*)&channels[0]; + + chan = (channel_data_t*)__ch_data; + + switch (__func) { + case __COMMCTL_IRQ_ENABLE: + irq_state = 1; + + HAL_READ_UINT8(chan->base + SER_16550_IER, ier); + ier |= SIO_IER_ERDAI; + HAL_WRITE_UINT8(chan->base + SER_16550_IER, ier); + + HAL_INTERRUPT_SET_LEVEL(chan->isr_vector, 1); + HAL_INTERRUPT_UNMASK(chan->isr_vector); + break; + case __COMMCTL_IRQ_DISABLE: + ret = irq_state; + irq_state = 0; + + HAL_READ_UINT8(chan->base + SER_16550_IER, ier); + ier &= ~SIO_IER_ERDAI; + HAL_WRITE_UINT8(chan->base + SER_16550_IER, ier); + + HAL_INTERRUPT_MASK(chan->isr_vector); + break; + case __COMMCTL_DBG_ISR_VECTOR: + ret = chan->isr_vector; + break; + case __COMMCTL_SET_TIMEOUT: + { + va_list ap; + + va_start(ap, __func); + + ret = chan->msec_timeout; + chan->msec_timeout = va_arg(ap, cyg_uint32); + + va_end(ap); + } + break; + case __COMMCTL_SETBAUD: + { + cyg_uint32 baud_rate; + cyg_uint16 baud_divisor; + cyg_uint8* port = chan->base; + va_list ap; + + va_start(ap, __func); + baud_rate = va_arg(ap, cyg_uint32); + va_end(ap); + + switch (baud_rate) + { + case 110: baud_divisor = BAUD_110; break; + case 150: baud_divisor = BAUD_150; break; + case 300: baud_divisor = BAUD_300; break; + case 600: baud_divisor = BAUD_600; break; + case 1200: baud_divisor = BAUD_1200; break; + case 2400: baud_divisor = BAUD_2400; break; + case 4800: baud_divisor = BAUD_4800; break; + case 7200: baud_divisor = BAUD_7200; break; + case 9600: baud_divisor = BAUD_9600; break; + case 14400: baud_divisor = BAUD_14400; break; + case 19200: baud_divisor = BAUD_19200; break; + case 38400: baud_divisor = BAUD_38400; break; + case 57600: baud_divisor = BAUD_57600; break; + case 115200: baud_divisor = BAUD_115200; break; + case 230400: baud_divisor = BAUD_230400; break; + default: return -1; break; // Invalid baud rate selected + } + + // + // We may need to increase the timeout before causing a break reset. + // According to the Atlas Users Manual (Document MD00005) The BRKRES + // register will need to be programmed with a value larger that 0xA (the default) + // if we are going to use a baud rate lower than 2400. + // + if (baud_rate <= 2400) + { + // For now, just disable the break reset entirely. + HAL_WRITE_UINT32(HAL_ATLAS_BRKRES, 0); + } else { + // Put the break reset state back to the default + HAL_WRITE_UINT32(HAL_ATLAS_BRKRES, HAL_ATLAS_BRKRES_DEFAULT_VALUE); + } + + // Disable port interrupts while changing hardware + HAL_READ_UINT8(port+SER_16550_IER, ier); + HAL_WRITE_UINT8(port+SER_16550_IER, 0); + + // Set baud rate. + cyg_hal_plf_serial_set_baud(port, baud_divisor); + + // Reenable interrupts if necessary + HAL_WRITE_UINT8(port+SER_16550_IER, ier); + } + break; + + case __COMMCTL_GETBAUD: + break; + default: + break; + } + CYGARC_HAL_RESTORE_GP(); + return ret; +} + +static int +cyg_hal_plf_serial_isr(void *__ch_data, int* __ctrlc, + CYG_ADDRWORD __vector, CYG_ADDRWORD __data) +{ + int res = 0; + cyg_uint8 _iir, c; + channel_data_t* chan; + CYGARC_HAL_SAVE_GP(); + + // Some of the diagnostic print code calls through here with no idea what the ch_data is. + // Go ahead and assume it is channels[0]. + if (__ch_data == 0) + __ch_data = (void*)&channels[0]; + + chan = (channel_data_t*)__ch_data; + + HAL_INTERRUPT_ACKNOWLEDGE(chan->isr_vector); + + HAL_READ_UINT8(chan->base + SER_16550_IIR, _iir); + _iir &= SIO_IIR_ID_MASK; + + *__ctrlc = 0; + if ((_iir == ISR_Rx_Avail) || (_iir == ISR_Rx_Char_Timeout)) { + + HAL_READ_UINT8(chan->base + SER_16550_RBR, c); + + if( cyg_hal_is_break( &c , 1 ) ) + *__ctrlc = 1; + + res = CYG_ISR_HANDLED; + } + + CYGARC_HAL_RESTORE_GP(); + return res; +} + +static void +cyg_hal_plf_serial_init(void) +{ + hal_virtual_comm_table_t* comm; + int cur = CYGACC_CALL_IF_SET_CONSOLE_COMM(CYGNUM_CALL_IF_SET_COMM_ID_QUERY_CURRENT); + + // Disable interrupts. + HAL_INTERRUPT_MASK(channels[0].isr_vector); + + // Init channels + cyg_hal_plf_serial_init_channel((void*)&channels[0]); + + // Setup procs in the vector table + + // Set channel 0 + CYGACC_CALL_IF_SET_CONSOLE_COMM(0); + comm = CYGACC_CALL_IF_CONSOLE_PROCS(); + CYGACC_COMM_IF_CH_DATA_SET(*comm, &channels[0]); + CYGACC_COMM_IF_WRITE_SET(*comm, cyg_hal_plf_serial_write); + CYGACC_COMM_IF_READ_SET(*comm, cyg_hal_plf_serial_read); + CYGACC_COMM_IF_PUTC_SET(*comm, cyg_hal_plf_serial_putc); + CYGACC_COMM_IF_GETC_SET(*comm, cyg_hal_plf_serial_getc); + CYGACC_COMM_IF_CONTROL_SET(*comm, cyg_hal_plf_serial_control); + CYGACC_COMM_IF_DBG_ISR_SET(*comm, cyg_hal_plf_serial_isr); + CYGACC_COMM_IF_GETC_TIMEOUT_SET(*comm, cyg_hal_plf_serial_getc_timeout); + + // Restore original console + CYGACC_CALL_IF_SET_CONSOLE_COMM(cur); +} + +void +cyg_hal_plf_comms_init(void) +{ + static int initialized = 0; + + if (initialized) + return; + + initialized = 1; + + cyg_hal_plf_serial_init(); +} + +//----------------------------------------------------------------------------- +// end of ser16c550c.c + diff --git a/packages/hal/mips/mips32/current/ChangeLog b/packages/hal/mips/mips32/current/ChangeLog new file mode 100644 --- /dev/null +++ b/packages/hal/mips/mips32/current/ChangeLog @@ -0,0 +1,87 @@ +2001-03-21 Jesper Skov + + * src/mips_mips32.ld: Added .2ram pattern. + +2001-02-23 Jesper Skov + + * include/var_cache.h: Removed HAL_FLASH_CACHES_WANT_OPTIMAL. It + is now the default. + +2001-02-15 Nick Garnett + + * src/variant.S: Removed ISR tables. + +2001-01-31 Nick Garnett + + * cdl/hal_mips_mips32.cdl: Move compile options here from atlas + package. + +2000-12-21 Mark Salter + + * src/var_misc.c (hal_c_cache_init): Turn on caching in KSEG0. + + * include/var_cache.h (HAL_FLASH_CACHES_WANT_OPTIMAL): Define. + +2000-10-20 Jesper Skov + + * include/var_cache.h: Move volatile keyword before type. + +2000-08-03 Jonathan Larmour + + * src/mips_mips32.ld: Revert below change, it was correct before. + +2000-07-24 Jonathan Larmour + + * src/mips_mips32.ld: Added underscore to _stext and _etext. + Switched to new table definition mechanism. + +2000-07-24 Drew Moseley + + * include/var_cache.h: Do not define + CYGARC_HAL_COMMON_EXPORT_CPU_MACROS. + +2000-07-21 Drew Moseley + + * include/var_arch.h: Move cache definitions into var_cache.h. + * include/var_cache.h: Ditto. + +2000-07-20 Drew Moseley + + * include/variant.inc: Use the real 3-operand mfc0 instruction. + +2000-07-14 Drew Moseley + + * cdl/hal_mips_mips32.cdl: New variant support. + * include/var_arch.h: Ditto. + * include/var_cache.h: Ditto. + * include/var_intr.h: Ditto. + * include/variant.inc: Ditto. + * src/mips_mips32.ld: Ditto. + * src/var_misc.c: Ditto. + * src/variant.S: Ditto. + +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//=========================================================================== diff --git a/packages/hal/mips/mips32/current/cdl/hal_mips_mips32.cdl b/packages/hal/mips/mips32/current/cdl/hal_mips_mips32.cdl new file mode 100644 --- /dev/null +++ b/packages/hal/mips/mips32/current/cdl/hal_mips_mips32.cdl @@ -0,0 +1,141 @@ +# ==================================================================== +# +# hal_mips_mips32.cdl +# +# MIPS 32/64 variant architectural HAL package configuration data +# +# ==================================================================== +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Red Hat eCos Public License +# Version 1.1 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://www.redhat.com/ +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Configurable Operating System, +# released September 30, 1998. +# +# The Initial Developer of the Original Code is Red Hat. +# Portions created by Red Hat are +# Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +# All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +# ==================================================================== +######DESCRIPTIONBEGIN#### +# +# Author(s): dmoseley +# Original data: bartv, nickg +# Contributors: +# Date: 2000-06-07 +# +#####DESCRIPTIONEND#### +# +# ==================================================================== + +cdl_package CYGPKG_HAL_MIPS_MIPS32 { + display "MIPS32 variant" + parent CYGPKG_HAL_MIPS + hardware + include_dir cyg/hal + description " + The MIPS32 architecture HAL package provides generic support + for this processor architecture. It is also necessary to + select a specific target platform HAL package." + + cdl_option CYGHWR_HAL_MIPS_MIPS32_CORE { + display "Mips32 processor core used" + flavor data + default_value {"4Kc"} + legal_values {"4Kc" "4Kp" "4Km"} + description " + The MIPS 32 cores come in (at least) 3 flavors. The main + differences being in the MMU" + } + + implements CYGINT_HAL_MIPS_VARIANT + + cdl_option CYGHWR_HAL_MIPS_FPU { + display "Variant FPU support" + calculated 0 + } + + cdl_option CYGPKG_HAL_MIPS_LSBFIRST { + display "CPU Variant little-endian" + calculated 1 + } + + define_proc { + puts $::cdl_header "#include " + } + + compile var_misc.c variant.S + + make { + /lib/target.ld: /src/mips_mips32.ld + $(CC) -E -P -Wp,-MD,target.tmp -DEXTRAS=1 -xc $(INCLUDE_PATH) $(CFLAGS) -o $@ $< + @echo $@ ": \\" > $(notdir $@).deps + @tail +2 target.tmp >> $(notdir $@).deps + @echo >> $(notdir $@).deps + @rm target.tmp + } + + cdl_option CYGBLD_LINKER_SCRIPT { + display "Linker script" + flavor data + no_define + calculated { "src/mips_mips32.ld" } + } + + + cdl_component CYGBLD_GLOBAL_OPTIONS { + display "Global build options" + flavor none + parent CYGPKG_NONE + description " + Global build options including control over + compiler flags, linker flags and choice of toolchain." + + + cdl_option CYGBLD_GLOBAL_COMMAND_PREFIX { + display "Global command prefix" + flavor data + no_define + default_value { "mipsisa32-elf" } + description " + This option specifies the command prefix used when + invoking the build tools." + } + + cdl_option CYGBLD_GLOBAL_CFLAGS { + display "Global compiler flags" + flavor data + no_define + default_value { "-mips32 -EL -msoft-float -Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef -Woverloaded-virtual -g -O2 -ffunction-sections -fdata-sections -fno-rtti -fno-exceptions -fvtable-gc -finit-priority -G0" } + description " + This option controls the global compiler flags which + are used to compile all packages by + default. Individual packages may define + options which override these global flags." + } + + cdl_option CYGBLD_GLOBAL_LDFLAGS { + display "Global linker flags" + flavor data + no_define + default_value { "-EL -msoft-float -g -nostdlib -Wl,--gc-sections -Wl,-static" } + description " + This option controls the global linker flags. Individual + packages may define options which override these global flags." + } + + } + +} diff --git a/packages/hal/mips/mips32/current/include/var_arch.h b/packages/hal/mips/mips32/current/include/var_arch.h new file mode 100644 --- /dev/null +++ b/packages/hal/mips/mips32/current/include/var_arch.h @@ -0,0 +1,210 @@ +#ifndef CYGONCE_HAL_VAR_ARCH_H +#define CYGONCE_HAL_VAR_ARCH_H + +//========================================================================== +// +// var_arch.h +// +// Architecture specific abstractions +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg +// Contributors: nickg, dmoseley +// Date: 1999-02-17 +// Purpose: Define architecture abstractions +// Description: This file contains any extra or modified definitions for +// this variant of the architecture. +// Usage: #include +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#ifndef __ASSEMBLER__ +#include +#include +#endif + +#ifdef CYGSEM_HAL_USE_ROM_MONITOR_CygMon +externC int +hal_diag_irq_check(int vector); + +#define HAL_DIAG_IRQ_CHECK(_vector_, _ret_) \ +CYG_MACRO_START \ +_ret_ = hal_diag_irq_check((_vector_)); \ +CYG_MACRO_END +#endif + +#ifdef CYGARC_HAL_COMMON_EXPORT_CPU_MACROS +/* System Control Coprocessor (CP0) exception processing registers */ +/* These supplement the definitions in mips-regs.h */ +#define C0_INDEX $0 /* Index into TLB Array - 4Kc core */ +#define C0_RANDOM $1 /* Randomly generated index into TLB Array - 4Kc core */ +#define C0_ENTRYLO0 $2 /* Low-order portion of the TLB entry for even-numbered virtual pages - 4Kc core */ +#define C0_ENTRYLO1 $3 /* Low-order portion of the TLB entry for odd-numbered virtual pages - 4Kc core */ +#define CO_PAGEMASK $5 /* Pointer to page table entry in memory - 4Kc core */ +#define C0_WIRED $6 /* Number of fixed TLB entries - 4Kc core */ +#define C0_ENTRYHI $10 /* High-order portion of the TLB entry - 4Kc core */ +#define C0_PRId $15 /* Processor Identification and Revision */ +#define C0_CONFIG $16 /* Configuration Register */ +#define C0_LLADDR $17 /* Load linked address */ +#define C0_LLADDR $17 /* Load linked address */ +#define C0_DEBUG $23 /* Debug control and exception status */ +#define C0_DEPC $24 /* Program counter at last debug exception */ +#define C0_TAGLO $28 /* Low-order portion of cache tag interface */ +#define C0_TAGHI $29 /* High-order portion of cache tag interface (not implemented in 4K cores */ +#define C0_DESAVE $31 /* Debug handler scratch pad register */ + +/* Coprocessor Register selector field */ +#define C0_SELECTOR_0 0x0 +#define C0_SELECTOR_1 0x1 + +/* Status register fields */ +#define SR_RP 0x08000000 /* Enter reduced-power mode */ +#define SR_NMI 0x00080000 /* Reset vector called through assertion of the NMI signal */ + +/* Cause register fields */ +#define CAUSE_IV 0x00800000 /* Interrupt vector to use -- Bit=0 -> offset=0x180; + Bit=1 -> offset=0x200; */ +#define CAUSE_WP 0x00400000 /* Watch exception deferred due to either Status[EXL] or Status[ERL] */ +#define CAUSE_MIPS32IP7 CAUSE_IP8 /* The MIPS32 architecture refers to these bits using a 0 base, */ +#define CAUSE_MIPS32IP6 CAUSE_IP7 /* but the generic mips-regs.h refers to them with a 1 base */ +#define CAUSE_MIPS32IP5 CAUSE_IP6 +#define CAUSE_MIPS32IP4 CAUSE_IP5 +#define CAUSE_MIPS32IP3 CAUSE_IP4 +#define CAUSE_MIPS32IP2 CAUSE_IP3 +#define CAUSE_MIPS32IP1 CAUSE_IP2 +#define CAUSE_MIPS32IP0 CAUSE_IP1 + +#define CAUSE_MIPS32HW5 CAUSE_MIPS32IP1 +#define CAUSE_MIPS32HW4 CAUSE_MIPS32IP1 +#define CAUSE_MIPS32HW3 CAUSE_MIPS32IP1 +#define CAUSE_MIPS32HW2 CAUSE_MIPS32IP1 +#define CAUSE_MIPS32HW1 CAUSE_MIPS32IP1 +#define CAUSE_MIPS32HW0 CAUSE_MIPS32IP1 +#define CAUSE_MIPS32SW1 CAUSE_MIPS32IP1 +#define CAUSE_MIPS32SW0 CAUSE_MIPS32IP0 + +/* Exception Codes */ +#define EXC_WATCH 23 /* Reference to the Watch address */ +#define EXC_MCHECK 24 /* Machine Check */ + +/* Processor Identification fields */ +#define PRId_COMPANY_ID_MASK 0x00FF0000 /* Which company manufactured this chip */ +#define PRId_COMPANY_MIPS_TECHNOLOGIES 0x00010000 +#define PRId_PROCESSOR_ID_MASK 0x0000FF00 /* Which processor is this */ +#define PRId_PROCESSOR_4Kc 0x00008000 +#define PRId_PROCESSOR_4Kp_4Km 0x00008300 +#define PRId_REVISION 0x000000FF /* Which revision is this */ + +/* Config register fields */ +#define CONFIG_M 0x80000000 /* Hardwired to '1' to indicate presence of Config1 register */ +#define CONFIG_K23 0x70000000 /* Controls cacheability of kseg2 and kseg3 in BAT */ +#define CONFIG_KU 0x0E000000 /* Controls cacheability of ksegu in BAT */ +#define CONFIG_MDU 0x00100000 /* MDU Type: 0 == Fast Multiplier Array; 1 == Iterative */ +#define CONFIG_MM 0x00060000 /* Merge mode */ +#define CONFIG_BM 0x00010000 /* Burst mode: 0 == Sequential; 1 == SubBlock */ +#define CONFIG_BE 0x00008000 /* Endian mode: 0 == Little Endian; 1 == Big Endian */ +#define CONFIG_AT 0x00006000 /* Architecture Type */ +#define CONFIG_AR 0x00001C00 /* Architecture Revision */ +#define CONFIG_MT 0x00000380 /* MMU Type */ +#define CONFIG_K0 0x00000007 /* kseg0 coherency algorithm */ + +/* KSEG cache control codes */ +#define CONFIG_KSEG2_3_CACHEABLE 0x30000000 /* KSeg2 and KSeg3 are cacheable/noncoherent/write-through/no write-allocate */ +#define CONFIG_KSEG2_3_UNCACHEABLE 0x20000000 /* KSeg2 and KSeg3 are cacheable/noncoherent/write-through/no write-allocate */ +#define CONFIG_KSEGU_CACHEABLE 0x06000000 /* KSegu is cacheable/noncoherent/write-through/no write-allocate */ +#define CONFIG_KSEGU_UNCACHEABLE 0x04000000 /* KSegu is cacheable/noncoherent/write-through/no write-allocate */ +#define CONFIG_KSEG0_CACHEABLE 0x00000003 /* KSeg0 is cacheable/noncoherent/write-through/no write-allocate */ +#define CONFIG_KSEG0_UNCACHEABLE 0x00000002 /* KSeg0 is cacheable/noncoherent/write-through/no write-allocate */ + +/* Merge mode control codes */ +#define CONFIG_NO_MERGING 0x00000000 +#define CONFIG_SYSAD_VALID_MERGING 0x00200000 +#define CONFIG_FULL_MERGING 0x00400000 + +/* Architecture Type codes */ +#define CONFIG_AT_MIPS32 0x00000000 + +/* Architecture Revision codes */ +#define CONFIG_AR_REVISION_1 0x00000000 + +/* MMU Type codes */ +#define CONFIG_MMU_TYPE_STANDARD_TLB 0x00000080 +#define CONFIG_MMU_TYPE_FIXED 0x00000180 + +/* Config1 register fields */ +#define CONFIG1_MMU_SIZE_MASK 0x7E000000 /* Number of entries in the TLB minus 1 */ +#define CONFIG1_IS 0x01C00000 /* Number of instruction cache sets per way */ +#define CONFIG1_IL 0x00380000 /* Instruction cache line size */ +#define CONFIG1_IA 0x00030000 /* Level of Instruction cache associativity */ +#define CONFIG1_DS 0x0000E000 /* Number of data cache sets per way */ +#define CONFIG1_DL 0x00001C00 /* Data cache line size */ +#define CONFIG1_DA 0x00000380 /* Level of Data cache associativity */ +#define CONFIG1_PC 0x00000010 /* Performance Counter registers implemented */ +#define CONFIG1_WR 0x00000008 /* Watch registers implemented */ +#define CONFIG1_CA 0x00000004 /* Code compression implemented */ +#define CONFIG1_EP 0x00000002 /* EJTAG implemented */ +#define CONFIG1_FP 0x00000001 /* FPU implemented */ + +/* Instruction cache sets-per-way codes */ +#define CONFIG1_ICACHE_64_SETS_PER_WAY 0x00000000 +#define CONFIG1_ICACHE_128_SETS_PER_WAY 0x00400000 +#define CONFIG1_ICACHE_256_SETS_PER_WAY 0x00800000 + +/* Instruction cache line size codes */ +#define CONFIG1_ICACHE_NOT_PRESET 0x00000000 +#define CONFIG1_ICACHE_LINE_SIZE_16_BYTES 0x00180000 + +/* Instruction cache associativity codes */ +#define CONFIG1_ICACHE_DIRECT_MAPPED 0x00000000 +#define CONFIG1_ICACHE_2_WAY 0x00010000 +#define CONFIG1_ICACHE_3_WAY 0x00020000 +#define CONFIG1_ICACHE_4_WAY 0x00030000 + +/* Data cache sets-per-way codes */ +#define CONFIG1_DCACHE_64_SETS_PER_WAY 0x00000000 +#define CONFIG1_DCACHE_128_SETS_PER_WAY 0x00002000 +#define CONFIG1_DCACHE_256_SETS_PER_WAY 0x00004000 + +/* Data cache line size codes */ +#define CONFIG1_DCACHE_NOT_PRESET 0x00000000 +#define CONFIG1_DCACHE_LINE_SIZE_16_BYTES 0x00000C00 + +/* Data cache associativity codes */ +#define CONFIG1_DCACHE_DIRECT_MAPPED 0x00000000 +#define CONFIG1_DCACHE_2_WAY 0x00000080 +#define CONFIG1_DCACHE_3_WAY 0x00000100 +#define CONFIG1_DCACHE_4_WAY 0x00000180 + +#endif // ifdef CYGARC_HAL_COMMON_EXPORT_CPU_MACROS + +//-------------------------------------------------------------------------- +#endif // CYGONCE_HAL_VAR_ARCH_H +// End of var_arch.h diff --git a/packages/hal/mips/mips32/current/include/var_cache.h b/packages/hal/mips/mips32/current/include/var_cache.h new file mode 100644 --- /dev/null +++ b/packages/hal/mips/mips32/current/include/var_cache.h @@ -0,0 +1,305 @@ +#ifndef CYGONCE_IMP_CACHE_H +#define CYGONCE_IMP_CACHE_H + +//============================================================================= +// +// imp_cache.h +// +// HAL cache control API +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg +// Contributors: nickg, dmoseley +// Date: 1998-02-17 +// Purpose: Cache control API +// Description: The macros defined here provide the HAL APIs for handling +// cache control operations. +// Usage: +// #include +// ... +// +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include +#include + +#include +#include +#include +#include + +#ifdef CYGHWR_HAL_MIPS_MIPS32_CORE_4Kc + +//----------------------------------------------------------------------------- +// Cache dimensions + +// Data cache +#define HAL_DCACHE_SIZE 16384 // Size of data cache in bytes +#define HAL_DCACHE_LINE_SIZE 16 // Size of a data cache line +#define HAL_DCACHE_WAYS 4 // Associativity of the cache + +// Instruction cache +#define HAL_ICACHE_SIZE 16384 // Size of cache in bytes +#define HAL_ICACHE_LINE_SIZE 16 // Size of a cache line +#define HAL_ICACHE_WAYS 4 // Associativity of the cache + +#define HAL_DCACHE_SETS (HAL_DCACHE_SIZE/(HAL_DCACHE_LINE_SIZE*HAL_DCACHE_WAYS)) +#define HAL_ICACHE_SETS (HAL_ICACHE_SIZE/(HAL_ICACHE_LINE_SIZE*HAL_ICACHE_WAYS)) + +#define HAL_DCACHE_WRITETHRU_MODE 1 +#define HAL_DCACHE_WRITEBACK_MODE 0 + +#else + +#error Unknown MIPS32 Variant + +#endif + +//----------------------------------------------------------------------------- +// General cache defines. +#define HAL_CLEAR_TAGLO() asm volatile (" mtc0 $0, $28;" \ + " nop;" \ + " nop;" \ + " nop;") +#define HAL_CLEAR_TAGHI() asm volatile (" mtc0 $0, $29;" \ + " nop;" \ + " nop;" \ + " nop;") + +/* Cache instruction opcodes */ +#define HAL_CACHE_OP(which, op) (which | (op << 2)) + +#define HAL_WHICH_ICACHE 0x0 +#define HAL_WHICH_DCACHE 0x1 + +#define HAL_INDEX_INVALIDATE 0x0 +#define HAL_INDEX_LOAD_TAG 0x1 +#define HAL_INDEX_STORE_TAG 0x2 +#define HAL_HIT_INVALIDATE 0x4 +#define HAL_ICACHE_FILL 0x5 +#define HAL_DCACHE_HIT_INVALIDATE 0x5 +#define HAL_DCACHE_HIT_WRITEBACK 0x6 +#define HAL_FETCH_AND_LOCK 0x7 + +//----------------------------------------------------------------------------- +// Global control of data cache + +// Invalidate the entire cache +#define HAL_DCACHE_INVALIDATE_ALL_DEFINED +#define HAL_DCACHE_INVALIDATE_ALL() \ + CYG_MACRO_START \ + register volatile CYG_BYTE *addr; \ + HAL_CLEAR_TAGLO(); \ + HAL_CLEAR_TAGHI(); \ + for (addr = (CYG_BYTE *)CYGARC_KSEG_CACHED_BASE; \ + addr < (CYG_BYTE *)(CYGARC_KSEG_CACHED_BASE + HAL_DCACHE_SIZE); \ + addr += HAL_DCACHE_LINE_SIZE ) \ + { \ + asm volatile (" cache %0, 0(%1)" \ + : \ + : "I" (HAL_CACHE_OP(HAL_WHICH_DCACHE, HAL_INDEX_STORE_TAG)), \ + "r"(addr)); \ + } \ + CYG_MACRO_END + +// Synchronize the contents of the cache with memory. +extern void hal_dcache_sync(void); +#define HAL_DCACHE_SYNC_DEFINED +#define HAL_DCACHE_SYNC() hal_dcache_sync() + +// Set the data cache refill burst size +//#define HAL_DCACHE_BURST_SIZE(_asize_) + +// Set the data cache write mode +//#define HAL_DCACHE_WRITE_MODE( _mode_ ) + +// Load the contents of the given address range into the data cache +// and then lock the cache so that it stays there. +#define HAL_DCACHE_LOCK_DEFINED +#define HAL_DCACHE_LOCK(_base_, _asize_) \ + CYG_MACRO_START \ + register CYG_ADDRESS _baddr_ = (CYG_ADDRESS)(_base_); \ + register CYG_ADDRESS _addr_ = (CYG_ADDRESS)(_base_); \ + register CYG_WORD _size_ = (_asize_); \ + for( ; _addr_ <= _baddr_+_size_; _addr_ += HAL_DCACHE_LINE_SIZE ) \ + asm volatile (" cache %0, 0(%1)" \ + : \ + : "I" (HAL_CACHE_OP(HAL_WHICH_DCACHE, HAL_FETCH_AND_LOCK)), \ + "r"(_addr_)); \ + CYG_MACRO_END + +// Undo a previous lock operation +#define HAL_DCACHE_UNLOCK_DEFINED +#define HAL_DCACHE_UNLOCK(_base_, _asize_) \ + CYG_MACRO_START \ + register CYG_ADDRESS _baddr_ = (CYG_ADDRESS)(_base_); \ + register CYG_ADDRESS _addr_ = (CYG_ADDRESS)(_base_); \ + register CYG_WORD _size_ = (_asize_); \ + for( ; _addr_ <= _baddr_+_size_; _addr_ += HAL_DCACHE_LINE_SIZE ) \ + asm volatile (" cache %0, 0(%1)" \ + : \ + : "I" (HAL_CACHE_OP(HAL_WHICH_DCACHE, HAL_HIT_INVALIDATE)), \ + "r"(_addr_)); \ + CYG_MACRO_END + +// Unlock entire cache +#define HAL_DCACHE_UNLOCK_ALL_DEFINED +#define HAL_DCACHE_UNLOCK_ALL() HAL_DCACHE_UNLOCK(0,HAL_DCACHE_SIZE) + + +//----------------------------------------------------------------------------- +// Data cache line control + +// Allocate cache lines for the given address range without reading its +// contents from memory. +//#define HAL_DCACHE_ALLOCATE( _base_ , _asize_ ) + +// Write dirty cache lines to memory and invalidate the cache entries +// for the given address range. +#define HAL_DCACHE_FLUSH_DEFINED +#if HAL_DCACHE_WRITETHRU_MODE == 1 +// No need to flush a writethrough cache +#define HAL_DCACHE_FLUSH( _base_ , _asize_ ) +#else +#error HAL_DCACHE_FLUSH undefined for MIPS32 writeback cache +#endif + +// Write dirty cache lines to memory for the given address range. +#define HAL_DCACHE_STORE_DEFINED +#if HAL_DCACHE_WRITETHRU_MODE == 1 +// No need to store a writethrough cache +#define HAL_DCACHE_STORE( _base_ , _asize_ ) +#else +#error HAL_DCACHE_STORE undefined for MIPS32 writeback cache +#endif + +// Invalidate cache lines in the given range without writing to memory. +#define HAL_DCACHE_INVALIDATE_DEFINED +#define HAL_DCACHE_INVALIDATE( _base_ , _asize_ ) \ + CYG_MACRO_START \ + register CYG_ADDRESS _baddr_ = (CYG_ADDRESS)(_base_); \ + register CYG_ADDRESS _addr_ = (CYG_ADDRESS)(_base_); \ + register CYG_WORD _size_ = (_asize_); \ + for( ; _addr_ <= _baddr_+_size_; _addr_ += HAL_DCACHE_LINE_SIZE ) \ + asm volatile (" cache %0, 0(%1)" \ + : \ + : "I" (HAL_CACHE_OP(HAL_WHICH_DCACHE, HAL_HIT_INVALIDATE)), \ + "r"(_addr_)); \ + CYG_MACRO_END + + + + + + +//----------------------------------------------------------------------------- +// Global control of Instruction cache + +// Invalidate the entire cache +#define HAL_ICACHE_INVALIDATE_ALL_DEFINED +#define HAL_ICACHE_INVALIDATE_ALL() \ + CYG_MACRO_START \ + register volatile CYG_BYTE *addr; \ + HAL_CLEAR_TAGLO(); \ + HAL_CLEAR_TAGHI(); \ + for (addr = (CYG_BYTE *)CYGARC_KSEG_CACHED_BASE; \ + addr < (CYG_BYTE *)(CYGARC_KSEG_CACHED_BASE + HAL_ICACHE_SIZE); \ + addr += HAL_ICACHE_LINE_SIZE ) \ + { \ + asm volatile (" cache %0, 0(%1)" \ + : \ + : "I" (HAL_CACHE_OP(HAL_WHICH_ICACHE, HAL_INDEX_STORE_TAG)), \ + "r"(addr)); \ + } \ + CYG_MACRO_END + +// Synchronize the contents of the cache with memory. +extern void hal_icache_sync(void); +#define HAL_ICACHE_SYNC_DEFINED +#define HAL_ICACHE_SYNC() hal_icache_sync() + +// Set the instruction cache refill burst size +//#define HAL_ICACHE_BURST_SIZE(_asize_) + +// Load the contents of the given address range into the data cache +// and then lock the cache so that it stays there. +#define HAL_ICACHE_LOCK_DEFINED +#define HAL_ICACHE_LOCK(_base_, _asize_) \ + CYG_MACRO_START \ + register CYG_ADDRESS _baddr_ = (CYG_ADDRESS)(_base_); \ + register CYG_ADDRESS _addr_ = (CYG_ADDRESS)(_base_); \ + register CYG_WORD _size_ = (_asize_); \ + for( ; _addr_ <= _baddr_+_size_; _addr_ += HAL_ICACHE_LINE_SIZE ) \ + asm volatile (" cache %0, 0(%1)" \ + : \ + : "I" (HAL_CACHE_OP(HAL_WHICH_ICACHE, HAL_FETCH_AND_LOCK)), \ + "r"(_addr_)); \ + CYG_MACRO_END + +// Undo a previous lock operation +#define HAL_ICACHE_UNLOCK_DEFINED +#define HAL_ICACHE_UNLOCK(_base_, _asize_) \ + CYG_MACRO_START \ + register CYG_ADDRESS _baddr_ = (CYG_ADDRESS)(_base_); \ + register CYG_ADDRESS _addr_ = (CYG_ADDRESS)(_base_); \ + register CYG_WORD _size_ = (_asize_); \ + for( ; _addr_ <= _baddr_+_size_; _addr_ += HAL_ICACHE_LINE_SIZE ) \ + asm volatile (" cache %0, 0(%1)" \ + : \ + : "I" (HAL_CACHE_OP(HAL_WHICH_ICACHE, HAL_HIT_INVALIDATE)), \ + "r"(_addr_)); \ + CYG_MACRO_END + +// Unlock entire cache +#define HAL_ICACHE_UNLOCK_ALL_DEFINED +#define HAL_ICACHE_UNLOCK_ALL() HAL_ICACHE_UNLOCK(0,HAL_ICACHE_SIZE) + +//----------------------------------------------------------------------------- +// Instruction cache line control + +// Invalidate cache lines in the given range without writing to memory. +#define HAL_ICACHE_INVALIDATE_DEFINED +#define HAL_ICACHE_INVALIDATE( _base_ , _asize_ ) \ + CYG_MACRO_START \ + register CYG_ADDRESS _baddr_ = (CYG_ADDRESS)(_base_); \ + register CYG_ADDRESS _addr_ = (CYG_ADDRESS)(_base_); \ + register CYG_WORD _size_ = (_asize_); \ + for( ; _addr_ <= _baddr_+_size_; _addr_ += HAL_ICACHE_LINE_SIZE ) \ + asm volatile (" cache %0, 0(%1)" \ + : \ + : "I" (HAL_CACHE_OP(HAL_WHICH_ICACHE, HAL_HIT_INVALIDATE)), \ + "r"(_addr_)); \ + CYG_MACRO_END + +//----------------------------------------------------------------------------- +#endif // ifndef CYGONCE_IMP_CACHE_H +// End of imp_cache.h diff --git a/packages/hal/mips/mips32/current/include/var_intr.h b/packages/hal/mips/mips32/current/include/var_intr.h new file mode 100644 --- /dev/null +++ b/packages/hal/mips/mips32/current/include/var_intr.h @@ -0,0 +1,63 @@ +#ifndef CYGONCE_HAL_IMP_INTR_H +#define CYGONCE_HAL_IMP_INTR_H + +//========================================================================== +// +// imp_intr.h +// +// MIPS32 Interrupt and clock support +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg +// Contributors: nickg, jskov, +// gthomas, jlarmour, dmoseley +// Date: 1999-02-16 +// Purpose: MIPS32 Interrupt support +// Description: The macros defined here provide the HAL APIs for handling +// interrupts and the clock for variants of the MIPS32 +// architecture. +// +// Usage: +// #include +// ... +// +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include + +#include + +#include + +//-------------------------------------------------------------------------- +#endif // ifndef CYGONCE_HAL_IMP_INTR_H +// End of imp_intr.h diff --git a/packages/hal/mips/mips32/current/include/variant.inc b/packages/hal/mips/mips32/current/include/variant.inc new file mode 100644 --- /dev/null +++ b/packages/hal/mips/mips32/current/include/variant.inc @@ -0,0 +1,176 @@ +#ifndef CYGONCE_HAL_VARIANT_INC +#define CYGONCE_HAL_VARIANT_INC +##============================================================================= +## +## variant.inc +## +## MIPS 32/64 family assembler header file +## +##============================================================================= +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Red Hat eCos Public License +# Version 1.1 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://www.redhat.com/ +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Configurable Operating System, +# released September 30, 1998. +# +# The Initial Developer of the Original Code is Red Hat. +# Portions created by Red Hat are +# Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +# All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +##============================================================================= +#######DESCRIPTIONBEGIN#### +## +## Author(s): dmoseley +## Contributors: dmoseley +## Date: 2000-06-07 +## Purpose: MIPS32 family definitions. +## Description: This file contains various definitions and macros that are +## useful for writing assembly code for the MIPS32 CPU family. +## Usage: +## #include +## ... +## +## +######DESCRIPTIONEND#### +## +##============================================================================= + +#include + +#include + +#include + +#define CYGARC_HAL_COMMON_EXPORT_CPU_MACROS +#include +#include + +##----------------------------------------------------------------------------- +## Define CPU variant for architecture HAL. + +#define CYG_HAL_MIPS_MIPS32 + +#------------------------------------------------------------------------------ +# Cache macros. + +#ifndef CYGPKG_HAL_MIPS_CACHE_DEFINED + + .macro hal_cache_init + + # Setup a temporary stack pointer for running C code. + la a0,__interrupt_stack + move sp,a0 + CYGARC_ADDRESS_REG_UNCACHED(sp) + + # Read the CONFIG1 register into a0 + mfc0 a0, C0_CONFIG, 1 + nop + nop + nop + + # Jump to C-code to initialize caches (uncached) + lar k0, hal_c_cache_init + CYGARC_ADDRESS_REG_UNCACHED(k0) + jalr k0 + nop + .endm + +#define CYGPKG_HAL_MIPS_CACHE_DEFINED + +#endif + +#------------------------------------------------------------------------------ +# Monitor initialization. + +#ifndef CYGPKG_HAL_MIPS_MON_DEFINED + +#if defined(CYG_HAL_STARTUP_ROM) || \ + ( defined(CYG_HAL_STARTUP_RAM) && \ + !defined(CYGSEM_HAL_USE_ROM_MONITOR)) + # If we are starting up from ROM, or we are starting in + # RAM and NOT using a ROM monitor, initialize the VSR table. + + .macro hal_mon_init + la a0,__default_interrupt_vsr + la a1,__default_exception_vsr + la a3,hal_vsr_table + + sw a0,0(a3) + sw a1,1*4(a3) + sw a1,2*4(a3) + sw a1,3*4(a3) + sw a1,4*4(a3) + sw a1,5*4(a3) + sw a1,6*4(a3) + sw a1,7*4(a3) + sw a1,8*4(a3) + sw a1,9*4(a3) + sw a1,10*4(a3) + sw a1,11*4(a3) + sw a1,12*4(a3) + sw a1,13*4(a3) + sw a1,14*4(a3) + sw a1,15*4(a3) + + sw a1,32*4(a3) + sw a1,33*4(a3) + .endm + +#elif defined(CYG_HAL_STARTUP_RAM) && defined(CYGSEM_HAL_USE_ROM_MONITOR) + + # Initialize the VSR table entries + # We only take control of the interrupt vector, + # the rest are left to the ROM for now... + + .macro hal_mon_init + la a0,__default_interrupt_vsr + la a3,hal_vsr_table + sw a0,0(a3) + .endm + +#else + + .macro hal_mon_init + .endm + +#endif + + +#define CYGPKG_HAL_MIPS_MON_DEFINED + +#endif + +#------------------------------------------------------------------------------ +# Decide whether the VSR table is defined externally, or is to be defined +# here. + +#if defined(CYGPKG_HAL_MIPS_SIM) || \ + ( defined(CYGPKG_HAL_MIPS_ATLAS) && \ + defined(CYG_HAL_STARTUP_RAM) && \ + !defined(CYGSEM_HAL_USE_ROM_MONITOR) \ + ) + +## VSR table defined in linker script + +#else + +#define CYG_HAL_MIPS_VSR_TABLE_DEFINED + +#endif + +#------------------------------------------------------------------------------ +#endif // ifndef CYGONCE_HAL_VARIANT_INC +# end of variant.inc diff --git a/packages/hal/mips/mips32/current/src/mips_mips32.ld b/packages/hal/mips/mips32/current/src/mips_mips32.ld new file mode 100644 --- /dev/null +++ b/packages/hal/mips/mips32/current/src/mips_mips32.ld @@ -0,0 +1,373 @@ +//=========================================================================== +// +// MLT linker script for MIPS32 +// +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//=========================================================================== + +#include + +OUTPUT_FORMAT("elf32-bigmips", "elf32-bigmips", + "elf32-littlemips") +/* The preprocessor defines mips, but we know we're mips :-) */ +#undef mips +OUTPUT_ARCH(mips:isa32) + +STARTUP(vectors.o) +ENTRY(reset_vector) +#ifdef EXTRAS +INPUT(extras.o) +#endif +GROUP(libtarget.a libgcc.a) + +/* FIXME: The MLT should pass in the required alignment since it must be + * the same as the VMA's alignment. As a result of this bug, all the MIPS32 + * ROM mlt files have alignment 8, when some should have alignment 4 + * (902557-CR) + */ +#define ALIGN_LMA 0x40 +#define FOLLOWING(_section_) AT ((LOADADDR (_section_) + SIZEOF (_section_) + ALIGN_LMA - 1) & ~ (ALIGN_LMA - 1)) +#define LMA_EQ_VMA +#define FORCE_OUTPUT . = . + +#define SECTIONS_BEGIN + +#if defined(CYG_HAL_STARTUP_RAM) + +/* this version for RAM startup */ +#define SECTION_rom_vectors(_region_, _vma_, _lma_) \ + .rom_vectors _vma_ : _lma_ \ + { KEEP (*(.utlb_vector)) \ + . = ALIGN(0x80); KEEP(*(.other_vector)) \ + /* debug and reset vector not used in RAM version */ \ + KEEP(*(.debug_vector)) \ + KEEP (*(.reset_vector)) } \ + > _region_ + +#elif defined(CYG_HAL_STARTUP_ROM) + +/* this version for ROM startup */ +#define SECTION_rom_vectors(_region_, _vma_, _lma_) \ + .rom_vectors _vma_ : _lma_ \ + { KEEP (*(.reset_vector)) \ + . = ALIGN(0x200); KEEP (*(.utlb_vector)) \ + . = . + 0x100; \ + . = ALIGN(0x80); KEEP(*(.other_vector)) \ + . = . + 0x80; \ + . = ALIGN(0x80); KEEP(*(.debug_vector)) } \ + > _region_ + +#endif /* ROM startup version of ROM vectors */ + +#define SECTION_ROMISC(_region_, _vma_, _lma_) \ + .interp _vma_ : _lma_ { *(.interp) } > _region_ \ + .hash : FOLLOWING(.interp) { *(.hash) } > _region_ \ + .dynsym : FOLLOWING(.hash) { *(.dynsym) } > _region_ \ + .dynstr : FOLLOWING(.dynsym) { *(.dynstr) } > _region_ \ + .gnu.version : FOLLOWING(.dynstr) { *(.gnu.version) } > _region_ \ + .gnu.version_d : FOLLOWING(.gnu.version) { *(.gnu.version_d) } > _region_ \ + .gnu.version_r : FOLLOWING(.gnu.version_d) { *(.gnu.version_r) } > _region_ \ + .plt : FOLLOWING(.gnu.version_r) { *(.plt) } > _region_ + +#define SECTION_RELOCS(_region_, _vma_, _lma_) \ + .rel.text : \ + { \ + *(.rel.text) \ + *(.rel.text.*) \ + *(.rel.gnu.linkonce.t*) \ + } > _region_ \ + .rela.text : \ + { \ + *(.rela.text) \ + *(.rela.text.*) \ + *(.rela.gnu.linkonce.t*) \ + } > _region_ \ + .rel.data : \ + { \ + *(.rel.data) \ + *(.rel.data.*) \ + *(.rel.gnu.linkonce.d*) \ + } > _region_ \ + .rela.data : \ + { \ + *(.rela.data) \ + *(.rela.data.*) \ + *(.rela.gnu.linkonce.d*) \ + } > _region_ \ + .rel.rodata : \ + { \ + *(.rel.rodata) \ + *(.rel.rodata.*) \ + *(.rel.gnu.linkonce.r*) \ + } > _region_ \ + .rela.rodata : \ + { \ + *(.rela.rodata) \ + *(.rela.rodata.*) \ + *(.rela.gnu.linkonce.r*) \ + } > _region_ \ + .rel.got : { *(.rel.got) } > _region_ \ + .rela.got : { *(.rela.got) } > _region_ \ + .rel.ctors : { *(.rel.ctors) } > _region_ \ + .rela.ctors : { *(.rela.ctors) } > _region_ \ + .rel.dtors : { *(.rel.dtors) } > _region_ \ + .rela.dtors : { *(.rela.dtors) } > _region_ \ + .rel.init : { *(.rel.init) } > _region_ \ + .rela.init : { *(.rela.init) } > _region_ \ + .rel.fini : { *(.rel.fini) } > _region_ \ + .rela.fini : { *(.rela.fini) } > _region_ \ + .rel.bss : { *(.rel.bss) } > _region_ \ + .rela.bss : { *(.rela.bss) } > _region_ \ + .rel.plt : { *(.rel.plt) } > _region_ \ + .rela.plt : { *(.rela.plt) } > _region_ \ + .rel.dyn : { *(.rel.dyn) } > _region_ + +#define SECTION_init(_region_, _vma_, _lma_) \ + .init _vma_ : _lma_ \ + { \ + FORCE_OUTPUT; KEEP (*(.init)) \ + } > _region_ =0 + +#define SECTION_text(_region_, _vma_, _lma_) \ + .text _vma_ : _lma_ \ + { \ + _stext = .; _ftext = . ; \ + *(.text) \ + *(.text.*) \ + *(.stub) \ + *(.gnu.warning) \ + *(.gnu.linkonce.t*) \ + *(.mips16.fn.*) *(.mips16.call.*) \ + } > _region_ =0 \ + _etext = .; PROVIDE (etext = .); + +#define SECTION_fini(_region_, _vma_, _lma_) \ + .fini _vma_ : _lma_ \ + { \ + FORCE_OUTPUT; KEEP (*(.fini)) \ + } > _region_ =0 + +#define SECTION_rodata(_region_, _vma_, _lma_) \ + .rodata _vma_ : _lma_ \ + { \ + FORCE_OUTPUT; *(.rodata) *(.rodata.*) *(.gnu.linkonce.r*) \ + } > _region_ + +#define SECTION_rodata1(_region_, _vma_, _lma_) \ + .rodata1 _vma_ : _lma_ \ + { \ + FORCE_OUTPUT; *(.rodata1) *(.rodata1.*) \ + } > _region_ + +#define SECTION_vsr_table(_region_, _vma_, _lma_) \ + .vsr_table _vma_ : _lma_ \ + { \ + FORCE_OUTPUT; *(.vsr_table) \ + } > _region_ + +#define SECTION_data(_region_, _vma_, _lma_) \ + .data _vma_ : _lma_ \ + { \ + __ram_data_start = ABSOLUTE (.); _fdata = . ; \ + *(.data) *(.data.*) *(.gnu.linkonce.d*) \ + *( .2ram.*) \ + . = ALIGN (8); \ + SORT(CONSTRUCTORS) \ + } > _region_ \ + __rom_data_start = LOADADDR(.data); + +#define SECTION_data1(_region_, _vma_, _lma_) \ + .data1 _vma_ : _lma_ \ + { \ + FORCE_OUTPUT; *(.data1) *(.data1.*) \ + } > _region_ + +#define SECTION_eh_frame(_region_, _vma_, _lma_) \ + .eh_frame _vma_ : _lma_ \ + { \ + FORCE_OUTPUT; *(.eh_frame) \ + } > _region_ + +#define SECTION_gcc_except_table(_region_, _vma_, _lma_) \ + .gcc_except_table _vma_ : _lma_ \ + { \ + FORCE_OUTPUT; *(.gcc_except_table) \ + } > _region_ + + + /* gcc uses crtbegin.o to find the start of + the constructors, so we make sure it is + first. Because this is a wildcard, it + doesn't matter if the user does not + actually link against crtbegin.o; the + linker won't look for a file to match a + wildcard. The wildcard also means that it + doesn't matter which directory crtbegin.o + is in. */ + + /* We don't want to include the .ctors section from + the crtend.o file until after the sorted ctors. + The .ctor section from the crtend file contains the + end of ctors marker and it must be last */ + +/* FIXME: We shouldn't need to define __CTOR_LIST__/__CTOR_END__ + and __DTOR_LIST__/__DTOR_END__ except by the PROVIDE lines. + However this doesn't work for old (99r1-era) toolchains, so + leave it for now. */ + +#define SECTION_ctors(_region_, _vma_, _lma_) \ + .ctors _vma_ : _lma_ \ + { \ + FORCE_OUTPUT; \ + KEEP (*crtbegin.o(.ctors)) \ + __CTOR_LIST__ = .; \ + PROVIDE (__CTOR_LIST__ = .); \ + KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) \ + KEEP (*(SORT(.ctors.*))) \ + KEEP (*(.ctors)) \ + __CTOR_END__ = .; \ + PROVIDE (__CTOR_END__ = .); \ + } > _region_ + +#define SECTION_dtors(_region_, _vma_, _lma_) \ + .dtors _vma_ : _lma_ \ + { \ + FORCE_OUTPUT; \ + KEEP (*crtbegin.o(.dtors)) \ + __DTOR_LIST__ = .; \ + PROVIDE (__DTOR_LIST__ = .); \ + KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) \ + KEEP (*(SORT(.dtors.*))) \ + KEEP (*(.dtors)) \ + __DTOR_END__ = .; \ + PROVIDE (__DTOR_END__ = .); \ + } > _region_ + +#define SECTION_devtab(_region_, _vma_, _lma_) \ + .devtab _vma_ : _lma_ \ + { \ + FORCE_OUTPUT; \ + KEEP(*( SORT (.ecos.table.*))) ; \ + } > _region_ + +#define SECTION_got(_region_, _vma_, _lma_) \ + _gp = ALIGN(16) + 0x7ff0; \ + .got _vma_ : _lma_ \ + { \ + FORCE_OUTPUT; *(.got.plt) *(.got) \ + } > _region_ + +#define SECTION_dynamic(_region_, _vma_, _lma_) \ + .dynamic _vma_ : _lma_ \ + { \ + FORCE_OUTPUT; *(.dynamic) \ + } > _region_ + + /* We want the small data sections together, so single-instruction offsets + can access them all, and initialized data all before uninitialized, so + we can shorten the on-disk segment size. */ + +#define SECTION_sdata(_region_, _vma_, _lma_) \ + .sdata _vma_ : _lma_ \ + { \ + FORCE_OUTPUT; *(.sdata) *(.sdata.*) *(.gnulinkonce.s*) \ + } > _region_ + +#define SECTION_lit8(_region_, _vma_, _lma_) \ + .lit8 _vma_ : _lma_ \ + { \ + FORCE_OUTPUT; *(.lit8) \ + } > _region_ + +#define SECTION_lit4(_region_, _vma_, _lma_) \ + .lit4 : FOLLOWING(.lit8) \ + { \ + FORCE_OUTPUT; *(.lit4) \ + } > _region_ \ + __ram_data_end = .; _edata = . ; \ + PROVIDE (edata = .); + +#define SECTION_sbss(_region_, _vma_, _lma_) \ + __bss_start = .; _fbss = .; \ + .sbss _vma_ : _lma_ \ + { \ + FORCE_OUTPUT; *(.dynsbss) *(.sbss) *(.sbss.*) *(.scommon) \ + } > _region_ + +#define SECTION_bss(_region_, _vma_, _lma_) \ + .bss _vma_ : _lma_ \ + { \ + *(.dynbss) *(.bss) *(.bss.*) *(COMMON) \ + } > _region_ \ + __bss_end = .; + +/* The /DISCARD/ section ensures that the output will not contain a + * .mdebug section as it confuses GDB. This is a workaround for CR 100804. + */ + +#define SECTIONS_END . = ALIGN(4); _end = .; PROVIDE (end = .); \ + /* Stabs debugging sections. */ \ + .stab 0 : { *(.stab) } \ + .stabstr 0 : { *(.stabstr) } \ + .stab.excl 0 : { *(.stab.excl) } \ + .stab.exclstr 0 : { *(.stab.exclstr) } \ + .stab.index 0 : { *(.stab.index) } \ + .stab.indexstr 0 : { *(.stab.indexstr) } \ + .comment 0 : { *(.comment) } \ + /* DWARF debug sections. \ + Symbols in the DWARF debugging sections are relative to \ + the beginning of the section so we begin them at 0. */ \ + /* DWARF 1 */ \ + .debug 0 : { *(.debug) } \ + .line 0 : { *(.line) } \ + /* GNU DWARF 1 extensions */ \ + .debug_srcinfo 0 : { *(.debug_srcinfo) } \ + .debug_sfnames 0 : { *(.debug_sfnames) } \ + /* DWARF 1.1 and DWARF 2 */ \ + .debug_aranges 0 : { *(.debug_aranges) } \ + .debug_pubnames 0 : { *(.debug_pubnames) } \ + /* DWARF 2 */ \ + .debug_info 0 : { *(.debug_info) } \ + .debug_abbrev 0 : { *(.debug_abbrev) } \ + .debug_line 0 : { *(.debug_line) } \ + .debug_frame 0 : { *(.debug_frame) } \ + .debug_str 0 : { *(.debug_str) } \ + .debug_loc 0 : { *(.debug_loc) } \ + .debug_macinfo 0 : { *(.debug_macinfo) } \ + /* SGI/MIPS DWARF 2 extensions */ \ + .debug_weaknames 0 : { *(.debug_weaknames) } \ + .debug_funcnames 0 : { *(.debug_funcnames) } \ + .debug_typenames 0 : { *(.debug_typenames) } \ + .debug_varnames 0 : { *(.debug_varnames) } \ + /* These must appear regardless of . */ \ + .gptab.sdata : { *(.gptab.data) *(.gptab.sdata) } \ + .gptab.sbss : { *(.gptab.bss) *(.gptab.sbss) } \ + /DISCARD/ 0 : { *(.mdebug) } + +#include CYGHWR_MEMORY_LAYOUT_LDI + +hal_vsr_table = 0x80000200; +hal_virtual_vector_table = 0x80000300; diff --git a/packages/hal/mips/mips32/current/src/var_misc.c b/packages/hal/mips/mips32/current/src/var_misc.c new file mode 100644 --- /dev/null +++ b/packages/hal/mips/mips32/current/src/var_misc.c @@ -0,0 +1,216 @@ +//========================================================================== +// +// var_misc.c +// +// HAL implementation miscellaneous functions +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg +// Contributors: nickg, jlarmour, dmoseley +// Date: 2000-07-14 +// Purpose: HAL miscellaneous functions +// Description: This file contains miscellaneous functions provided by the +// HAL. +// +//####DESCRIPTIONEND#### +// +//========================================================================*/ + +#include + +#include // Base types +#include // tracing macros +#include // assertion macros + +#include + +#define CYGARC_HAL_COMMON_EXPORT_CPU_MACROS +#include +#include +#include +#include + +/*------------------------------------------------------------------------*/ +// Array which stores the configured priority levels for the configured +// interrupts. + +volatile CYG_BYTE hal_interrupt_level[CYGNUM_HAL_ISR_COUNT]; + +/*------------------------------------------------------------------------*/ + +void hal_variant_init(void) +{ +} + +/* + * Uncomment the following to allow for dynamic cache sizing. + * Currently we are going to assume the exact part specified in the ecosconfig stuff. + * Perhaps in the near future this can all be done dynamically. + */ +/* define DYNAMIC_CACHE_SIZING */ + +#if 0 +#ifndef DYNAMIC_CACHE_SIZING +#warning " \n\ +STILL NEED TO IMPLEMENT DYNAMIC_CACHE_SIZING. \n\ +ALSO, the HAL_PLATFORM_CPU/etc defines need to be dynamic. \n\ +ALSO, need to do big endian stuff as well. \n\ +Determine if network debug is necessary. \n\ +Remove MIPS memc_init code" +#endif +#endif + +/*------------------------------------------------------------------------*/ +// Initialize the caches + +int hal_init_icache(unsigned long config1_val) +{ +#ifdef DYNAMIC_CACHE_SIZING + int icache_linesize, icache_assoc, icache_sets, icache_lines, icache_size; + unsigned long cache_addr; + + switch (config1_val & CONFIG1_IL) + { + case CONFIG1_ICACHE_LINE_SIZE_16_BYTES: icache_linesize = 16; break; + case CONFIG1_ICACHE_NOT_PRESET: return -1; break; + default: /* Error */ return -1; break; + } + + switch (config1_val & CONFIG1_IA) + { + case CONFIG1_ICACHE_DIRECT_MAPPED: icache_assoc = 1; break; + case CONFIG1_ICACHE_2_WAY: icache_assoc = 2; break; + case CONFIG1_ICACHE_3_WAY: icache_assoc = 3; break; + case CONFIG1_ICACHE_4_WAY: icache_assoc = 4; break; + default: /* Error */ return -1; break; + } + + switch (config1_val & CONFIG1_IS) + { + case CONFIG1_ICACHE_64_SETS_PER_WAY: icache_sets = 64; break; + case CONFIG1_ICACHE_128_SETS_PER_WAY: icache_sets = 128; break; + case CONFIG1_ICACHE_256_SETS_PER_WAY: icache_sets = 256; break; + default: /* Error */ return -1; break; + } + + icache_lines = icache_sets * icache_assoc; + icache_size = icache_lines * icache_linesize; +#endif /* DYNAMIC_CACHE_SIZING */ + + /* + * Reset does not invalidate the cache so let's do so now. + */ + HAL_ICACHE_INVALIDATE_ALL(); + +#ifdef DYNAMIC_CACHE_SIZING + return icache_size; +#else + return HAL_ICACHE_SIZE; +#endif +} + +int hal_init_dcache(unsigned long config1_val) +{ +#ifdef DYNAMIC_CACHE_SIZING + int dcache_linesize, dcache_assoc, dcache_sets, dcache_lines, dcache_size; + + switch (config1_val & CONFIG1_DL) + { + case CONFIG1_DCACHE_LINE_SIZE_16_BYTES: dcache_linesize = 16; break; + case CONFIG1_DCACHE_NOT_PRESET: return -1; break; + default: /* Error */ return -1; break; + } + + switch (config1_val & CONFIG1_DA) + { + case CONFIG1_DCACHE_DIRECT_MAPPED: dcache_assoc = 1; break; + case CONFIG1_DCACHE_2_WAY: dcache_assoc = 2; break; + case CONFIG1_DCACHE_3_WAY: dcache_assoc = 3; break; + case CONFIG1_DCACHE_4_WAY: dcache_assoc = 4; break; + default: /* Error */ return -1; break; + } + + switch (config1_val & CONFIG1_DS) + { + case CONFIG1_DCACHE_64_SETS_PER_WAY: dcache_sets = 64; break; + case CONFIG1_DCACHE_128_SETS_PER_WAY: dcache_sets = 128; break; + case CONFIG1_DCACHE_256_SETS_PER_WAY: dcache_sets = 256; break; + default: /* Error */ return -1; break; + } + + dcache_lines = dcache_sets * dcache_assoc; + dcache_size = dcache_lines * dcache_linesize; +#endif /* DYNAMIC_CACHE_SIZING */ + + /* + * Reset does not invalidate the cache so let's do so now. + */ + HAL_DCACHE_INVALIDATE_ALL(); + +#ifdef DYNAMIC_CACHE_SIZING + return dcache_size; +#else + return HAL_DCACHE_SIZE; +#endif +} + +void hal_c_cache_init(unsigned long config1_val) +{ + volatile unsigned val; + + if (hal_init_icache(config1_val) == -1) + { + /* Error */ + ; + } + + if (hal_init_dcache(config1_val) == -1) + { + /* Error */ + ; + } + + // enable cached KSEG0 + asm volatile("mfc0 %0,$16;" : "=r"(val)); + val &= ~3; + asm volatile("mtc0 %0,$16;" : : "r"(val)); +} + +void hal_icache_sync(void) +{ + HAL_ICACHE_INVALIDATE_ALL(); +} + +void hal_dcache_sync(void) +{ + HAL_DCACHE_INVALIDATE_ALL(); +} + +/*------------------------------------------------------------------------*/ +/* End of var_misc.c */ diff --git a/packages/hal/mips/mips32/current/src/variant.S b/packages/hal/mips/mips32/current/src/variant.S new file mode 100644 --- /dev/null +++ b/packages/hal/mips/mips32/current/src/variant.S @@ -0,0 +1,68 @@ +##============================================================================= +## +## variant.S +## +## MIPS 32 variant code +## +##============================================================================= +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Red Hat eCos Public License +# Version 1.1 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://www.redhat.com/ +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Configurable Operating System, +# released September 30, 1998. +# +# The Initial Developer of the Original Code is Red Hat. +# Portions created by Red Hat are +# Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +# All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +##============================================================================= +#######DESCRIPTIONBEGIN#### +## +## Author(s): dmoseley +## Contributors: dmoseley +## Date: 2000-06-07 +## Purpose: MIPS 32 variant code +## Description: Variant specific code for MIPS32 architecture. +## +## +## +## +######DESCRIPTIONEND#### +## +##============================================================================= + +#include +#include + +#define CYGARC_HAL_COMMON_EXPORT_CPU_MACROS +#include + +#ifdef CYGPKG_KERNEL +# include +#endif + +#include + +#include +#include + +##----------------------------------------------------------------------------- +# Variant Initialization. +# This code performs variant specific initialization. + +##----------------------------------------------------------------------------- +## end of variant.S + diff --git a/packages/hal/mips/mips64/current/ChangeLog b/packages/hal/mips/mips64/current/ChangeLog new file mode 100644 --- /dev/null +++ b/packages/hal/mips/mips64/current/ChangeLog @@ -0,0 +1,46 @@ +2001-02-23 Jesper Skov + + * include/var_cache.h: Removed HAL_FLASH_CACHES_WANT_OPTIMAL. It + is now the default. + +2001-02-15 Nick Garnett + + * src/variant.S: Removed ISR tables. + +2001-01-30 Nick Garnett + + * cdl/hal_mips_mips64.cdl: New variant support - just a 64 bit + version of the MIPS32 variant. + * include/var_arch.h: Ditto. + * include/var_cache.h: Ditto. + * include/var_intr.h: Ditto. + * include/variant.inc: Ditto. + * src/mips_mips64.ld: Ditto. + * src/var_misc.c: Ditto. + * src/variant.S: Ditto. + +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//=========================================================================== diff --git a/packages/hal/mips/mips64/current/cdl/hal_mips_mips64.cdl b/packages/hal/mips/mips64/current/cdl/hal_mips_mips64.cdl new file mode 100644 --- /dev/null +++ b/packages/hal/mips/mips64/current/cdl/hal_mips_mips64.cdl @@ -0,0 +1,151 @@ +# ==================================================================== +# +# hal_mips_mips64.cdl +# +# MIPS 64 variant architectural HAL package configuration data +# +# ==================================================================== +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Red Hat eCos Public License +# Version 1.1 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://www.redhat.com/ +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Configurable Operating System, +# released September 30, 1998. +# +# The Initial Developer of the Original Code is Red Hat. +# Portions created by Red Hat are +# Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +# All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +# ==================================================================== +######DESCRIPTIONBEGIN#### +# +# Author(s): nickg (after MIPS32 by dmoseley) +# Original data: bartv, nickg +# Contributors: +# Date: 2001-01-30 +# +#####DESCRIPTIONEND#### +# +# ==================================================================== + +cdl_package CYGPKG_HAL_MIPS_MIPS64 { + display "MIPS64 variant" + parent CYGPKG_HAL_MIPS + hardware + include_dir cyg/hal + description " + The MIPS64 architecture HAL package provides generic support + for this processor architecture. It is also necessary to + select a specific target platform HAL package." + + cdl_option CYGHWR_HAL_MIPS_MIPS64_CORE { + display "Mips64 processor core used" + flavor data + default_value {"5K"} + legal_values {"5K" "20K" } + description " + The MIPS64 cores come in (at least) 2 flavors. The main + differences being in the MMU" + } + + implements CYGINT_HAL_MIPS_VARIANT + + cdl_option CYGHWR_HAL_MIPS_64BIT { + display "Variant 64 bit architecture support" + calculated 1 + } + + cdl_option CYGHWR_HAL_MIPS_FPU { + display "Variant FPU support" + calculated 0 + } + + cdl_option CYGHWR_HAL_MIPS_FPU_64BIT { + display "Variant 64 bit FPU support" + calculated 1 + } + + cdl_option CYGPKG_HAL_MIPS_LSBFIRST { + display "CPU Variant little-endian" + calculated 1 + } + + define_proc { + puts $::cdl_header "#include " + } + + compile var_misc.c variant.S + + make { + /lib/target.ld: /src/mips_mips64.ld + $(CC) -E -P -Wp,-MD,target.tmp -DEXTRAS=1 -xc $(INCLUDE_PATH) $(CFLAGS) -o $@ $< + @echo $@ ": \\" > $(notdir $@).deps + @tail +2 target.tmp >> $(notdir $@).deps + @echo >> $(notdir $@).deps + @rm target.tmp + } + + cdl_option CYGBLD_LINKER_SCRIPT { + display "Linker script" + flavor data + no_define + calculated { "src/mips_mips64.ld" } + } + + cdl_component CYGBLD_GLOBAL_OPTIONS { + display "Global build options" + flavor none + parent CYGPKG_NONE + description " + Global build options including control over + compiler flags, linker flags and choice of toolchain." + + + cdl_option CYGBLD_GLOBAL_COMMAND_PREFIX { + display "Global command prefix" + flavor data + no_define + default_value { "mipsisa32-elf" } + description " + This option specifies the command prefix used when + invoking the build tools. Note that both MIPS32 and + MIPS64 targets use the same toolchain." + } + + cdl_option CYGBLD_GLOBAL_CFLAGS { + display "Global compiler flags" + flavor data + no_define + default_value { "-mips64 -EL -msoft-float -Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef -Woverloaded-virtual -g -O2 -ffunction-sections -fdata-sections -fno-rtti -fno-exceptions -fvtable-gc -finit-priority -G0" } + description " + This option controls the global compiler flags which + are used to compile all packages by + default. Individual packages may define + options which override these global flags." + } + + cdl_option CYGBLD_GLOBAL_LDFLAGS { + display "Global linker flags" + flavor data + no_define + default_value { "-EL -msoft-float -g -nostdlib -Wl,--gc-sections -Wl,-static" } + description " + This option controls the global linker flags. Individual + packages may define options which override these global flags." + } + + } + +} diff --git a/packages/hal/mips/mips64/current/include/var_arch.h b/packages/hal/mips/mips64/current/include/var_arch.h new file mode 100644 --- /dev/null +++ b/packages/hal/mips/mips64/current/include/var_arch.h @@ -0,0 +1,219 @@ +#ifndef CYGONCE_HAL_VAR_ARCH_H +#define CYGONCE_HAL_VAR_ARCH_H + +//========================================================================== +// +// var_arch.h +// +// Architecture specific abstractions +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg +// Contributors: nickg, dmoseley +// Date: 2001-01-30 +// Purpose: Define architecture abstractions +// Description: This file contains any extra or modified definitions for +// this variant of the architecture. +// Usage: #include +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#ifndef __ASSEMBLER__ +#include +#include +#endif + +//-------------------------------------------------------------------------- +// Define register size used for GDB + +#define CYG_HAL_GDB_REG CYG_WORD64 + +//-------------------------------------------------------------------------- + +#ifdef CYGSEM_HAL_USE_ROM_MONITOR_CygMon +externC int +hal_diag_irq_check(int vector); + +#define HAL_DIAG_IRQ_CHECK(_vector_, _ret_) \ +CYG_MACRO_START \ +_ret_ = hal_diag_irq_check((_vector_)); \ +CYG_MACRO_END +#endif + +//-------------------------------------------------------------------------- + +#ifdef CYGARC_HAL_COMMON_EXPORT_CPU_MACROS +/* System Control Coprocessor (CP0) exception processing registers */ +/* These supplement the definitions in mips-regs.h */ +#define C0_INDEX $0 /* Index into TLB Array - 4Kc core */ +#define C0_RANDOM $1 /* Randomly generated index into TLB Array - 4Kc core */ +#define C0_ENTRYLO0 $2 /* Low-order portion of the TLB entry for even-numbered virtual pages - 4Kc core */ +#define C0_ENTRYLO1 $3 /* Low-order portion of the TLB entry for odd-numbered virtual pages - 4Kc core */ +#define CO_PAGEMASK $5 /* Pointer to page table entry in memory - 4Kc core */ +#define C0_WIRED $6 /* Number of fixed TLB entries - 4Kc core */ +#define C0_ENTRYHI $10 /* High-order portion of the TLB entry - 4Kc core */ +#define C0_PRId $15 /* Processor Identification and Revision */ +#define C0_CONFIG $16 /* Configuration Register */ +#define C0_LLADDR $17 /* Load linked address */ +#define C0_LLADDR $17 /* Load linked address */ +#define C0_DEBUG $23 /* Debug control and exception status */ +#define C0_DEPC $24 /* Program counter at last debug exception */ +#define C0_TAGLO $28 /* Low-order portion of cache tag interface */ +#define C0_TAGHI $29 /* High-order portion of cache tag interface (not implemented in 4K cores */ +#define C0_DESAVE $31 /* Debug handler scratch pad register */ + +/* Coprocessor Register selector field */ +#define C0_SELECTOR_0 0x0 +#define C0_SELECTOR_1 0x1 + +/* Status register fields */ +#define SR_RP 0x08000000 /* Enter reduced-power mode */ +#define SR_NMI 0x00080000 /* Reset vector called through assertion of the NMI signal */ + +/* Cause register fields */ +#define CAUSE_IV 0x00800000 /* Interrupt vector to use -- Bit=0 -> offset=0x180; + Bit=1 -> offset=0x200; */ +#define CAUSE_WP 0x00400000 /* Watch exception deferred due to either Status[EXL] or Status[ERL] */ +#define CAUSE_MIPS32IP7 CAUSE_IP8 /* The MIPS32 architecture refers to these bits using a 0 base, */ +#define CAUSE_MIPS32IP6 CAUSE_IP7 /* but the generic mips-regs.h refers to them with a 1 base */ +#define CAUSE_MIPS32IP5 CAUSE_IP6 +#define CAUSE_MIPS32IP4 CAUSE_IP5 +#define CAUSE_MIPS32IP3 CAUSE_IP4 +#define CAUSE_MIPS32IP2 CAUSE_IP3 +#define CAUSE_MIPS32IP1 CAUSE_IP2 +#define CAUSE_MIPS32IP0 CAUSE_IP1 + +#define CAUSE_MIPS32HW5 CAUSE_MIPS32IP1 +#define CAUSE_MIPS32HW4 CAUSE_MIPS32IP1 +#define CAUSE_MIPS32HW3 CAUSE_MIPS32IP1 +#define CAUSE_MIPS32HW2 CAUSE_MIPS32IP1 +#define CAUSE_MIPS32HW1 CAUSE_MIPS32IP1 +#define CAUSE_MIPS32HW0 CAUSE_MIPS32IP1 +#define CAUSE_MIPS32SW1 CAUSE_MIPS32IP1 +#define CAUSE_MIPS32SW0 CAUSE_MIPS32IP0 + +/* Exception Codes */ +#define EXC_WATCH 23 /* Reference to the Watch address */ +#define EXC_MCHECK 24 /* Machine Check */ + +/* Processor Identification fields */ +#define PRId_COMPANY_ID_MASK 0x00FF0000 /* Which company manufactured this chip */ +#define PRId_COMPANY_MIPS_TECHNOLOGIES 0x00010000 +#define PRId_PROCESSOR_ID_MASK 0x0000FF00 /* Which processor is this */ +#define PRId_PROCESSOR_4Kc 0x00008000 +#define PRId_PROCESSOR_4Kp_4Km 0x00008300 +#define PRId_REVISION 0x000000FF /* Which revision is this */ + +/* Config register fields */ +#define CONFIG_M 0x80000000 /* Hardwired to '1' to indicate presence of Config1 register */ +#define CONFIG_K23 0x70000000 /* Controls cacheability of kseg2 and kseg3 in BAT */ +#define CONFIG_KU 0x0E000000 /* Controls cacheability of ksegu in BAT */ +#define CONFIG_MDU 0x00100000 /* MDU Type: 0 == Fast Multiplier Array; 1 == Iterative */ +#define CONFIG_MM 0x00060000 /* Merge mode */ +#define CONFIG_BM 0x00010000 /* Burst mode: 0 == Sequential; 1 == SubBlock */ +#define CONFIG_BE 0x00008000 /* Endian mode: 0 == Little Endian; 1 == Big Endian */ +#define CONFIG_AT 0x00006000 /* Architecture Type */ +#define CONFIG_AR 0x00001C00 /* Architecture Revision */ +#define CONFIG_MT 0x00000380 /* MMU Type */ +#define CONFIG_K0 0x00000007 /* kseg0 coherency algorithm */ + +/* KSEG cache control codes */ +#define CONFIG_KSEG2_3_CACHEABLE 0x30000000 /* KSeg2 and KSeg3 are cacheable/noncoherent/write-through/no write-allocate */ +#define CONFIG_KSEG2_3_UNCACHEABLE 0x20000000 /* KSeg2 and KSeg3 are cacheable/noncoherent/write-through/no write-allocate */ +#define CONFIG_KSEGU_CACHEABLE 0x06000000 /* KSegu is cacheable/noncoherent/write-through/no write-allocate */ +#define CONFIG_KSEGU_UNCACHEABLE 0x04000000 /* KSegu is cacheable/noncoherent/write-through/no write-allocate */ +#define CONFIG_KSEG0_CACHEABLE 0x00000003 /* KSeg0 is cacheable/noncoherent/write-through/no write-allocate */ +#define CONFIG_KSEG0_UNCACHEABLE 0x00000002 /* KSeg0 is cacheable/noncoherent/write-through/no write-allocate */ + +/* Merge mode control codes */ +#define CONFIG_NO_MERGING 0x00000000 +#define CONFIG_SYSAD_VALID_MERGING 0x00200000 +#define CONFIG_FULL_MERGING 0x00400000 + +/* Architecture Type codes */ +#define CONFIG_AT_MIPS32 0x00000000 + +/* Architecture Revision codes */ +#define CONFIG_AR_REVISION_1 0x00000000 + +/* MMU Type codes */ +#define CONFIG_MMU_TYPE_STANDARD_TLB 0x00000080 +#define CONFIG_MMU_TYPE_FIXED 0x00000180 + +/* Config1 register fields */ +#define CONFIG1_MMU_SIZE_MASK 0x7E000000 /* Number of entries in the TLB minus 1 */ +#define CONFIG1_IS 0x01C00000 /* Number of instruction cache sets per way */ +#define CONFIG1_IL 0x00380000 /* Instruction cache line size */ +#define CONFIG1_IA 0x00030000 /* Level of Instruction cache associativity */ +#define CONFIG1_DS 0x0000E000 /* Number of data cache sets per way */ +#define CONFIG1_DL 0x00001C00 /* Data cache line size */ +#define CONFIG1_DA 0x00000380 /* Level of Data cache associativity */ +#define CONFIG1_PC 0x00000010 /* Performance Counter registers implemented */ +#define CONFIG1_WR 0x00000008 /* Watch registers implemented */ +#define CONFIG1_CA 0x00000004 /* Code compression implemented */ +#define CONFIG1_EP 0x00000002 /* EJTAG implemented */ +#define CONFIG1_FP 0x00000001 /* FPU implemented */ + +/* Instruction cache sets-per-way codes */ +#define CONFIG1_ICACHE_64_SETS_PER_WAY 0x00000000 +#define CONFIG1_ICACHE_128_SETS_PER_WAY 0x00400000 +#define CONFIG1_ICACHE_256_SETS_PER_WAY 0x00800000 + +/* Instruction cache line size codes */ +#define CONFIG1_ICACHE_NOT_PRESET 0x00000000 +#define CONFIG1_ICACHE_LINE_SIZE_32_BYTES 0x00200000 + +/* Instruction cache associativity codes */ +#define CONFIG1_ICACHE_DIRECT_MAPPED 0x00000000 +#define CONFIG1_ICACHE_2_WAY 0x00010000 +#define CONFIG1_ICACHE_3_WAY 0x00020000 +#define CONFIG1_ICACHE_4_WAY 0x00030000 + +/* Data cache sets-per-way codes */ +#define CONFIG1_DCACHE_64_SETS_PER_WAY 0x00000000 +#define CONFIG1_DCACHE_128_SETS_PER_WAY 0x00002000 +#define CONFIG1_DCACHE_256_SETS_PER_WAY 0x00004000 + +/* Data cache line size codes */ +#define CONFIG1_DCACHE_NOT_PRESET 0x00000000 +#define CONFIG1_DCACHE_LINE_SIZE_32_BYTES 0x00001000 + +/* Data cache associativity codes */ +#define CONFIG1_DCACHE_DIRECT_MAPPED 0x00000000 +#define CONFIG1_DCACHE_2_WAY 0x00000080 +#define CONFIG1_DCACHE_3_WAY 0x00000100 +#define CONFIG1_DCACHE_4_WAY 0x00000180 + +#endif // ifdef CYGARC_HAL_COMMON_EXPORT_CPU_MACROS + +//-------------------------------------------------------------------------- +#endif // CYGONCE_HAL_VAR_ARCH_H +// End of var_arch.h diff --git a/packages/hal/mips/mips64/current/include/var_cache.h b/packages/hal/mips/mips64/current/include/var_cache.h new file mode 100644 --- /dev/null +++ b/packages/hal/mips/mips64/current/include/var_cache.h @@ -0,0 +1,305 @@ +#ifndef CYGONCE_IMP_CACHE_H +#define CYGONCE_IMP_CACHE_H + +//============================================================================= +// +// imp_cache.h +// +// HAL cache control API +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg +// Contributors: nickg, dmoseley +// Date: 1998-02-17 +// Purpose: Cache control API +// Description: The macros defined here provide the HAL APIs for handling +// cache control operations. +// Usage: +// #include +// ... +// +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include +#include + +#include +#include +#include +#include + +#ifdef CYGHWR_HAL_MIPS_MIPS64_CORE_5K + +//----------------------------------------------------------------------------- +// Cache dimensions + +// Data cache +#define HAL_DCACHE_SIZE 8192 // Size of data cache in bytes +#define HAL_DCACHE_LINE_SIZE 32 // Size of a data cache line +#define HAL_DCACHE_WAYS 2 // Associativity of the cache + +// Instruction cache +#define HAL_ICACHE_SIZE 8192 // Size of cache in bytes +#define HAL_ICACHE_LINE_SIZE 32 // Size of a cache line +#define HAL_ICACHE_WAYS 2 // Associativity of the cache + +#define HAL_DCACHE_SETS (HAL_DCACHE_SIZE/(HAL_DCACHE_LINE_SIZE*HAL_DCACHE_WAYS)) +#define HAL_ICACHE_SETS (HAL_ICACHE_SIZE/(HAL_ICACHE_LINE_SIZE*HAL_ICACHE_WAYS)) + +#define HAL_DCACHE_WRITETHRU_MODE 1 +#define HAL_DCACHE_WRITEBACK_MODE 0 + +#else + +#error Unknown MIPS32 Variant + +#endif + +//----------------------------------------------------------------------------- +// General cache defines. +#define HAL_CLEAR_TAGLO() asm volatile (" mtc0 $0, $28;" \ + " nop;" \ + " nop;" \ + " nop;") +#define HAL_CLEAR_TAGHI() asm volatile (" mtc0 $0, $29;" \ + " nop;" \ + " nop;" \ + " nop;") + +/* Cache instruction opcodes */ +#define HAL_CACHE_OP(which, op) (which | (op << 2)) + +#define HAL_WHICH_ICACHE 0x0 +#define HAL_WHICH_DCACHE 0x1 + +#define HAL_INDEX_INVALIDATE 0x0 +#define HAL_INDEX_LOAD_TAG 0x1 +#define HAL_INDEX_STORE_TAG 0x2 +#define HAL_HIT_INVALIDATE 0x4 +#define HAL_ICACHE_FILL 0x5 +#define HAL_DCACHE_HIT_INVALIDATE 0x5 +#define HAL_DCACHE_HIT_WRITEBACK 0x6 +#define HAL_FETCH_AND_LOCK 0x7 + +//----------------------------------------------------------------------------- +// Global control of data cache + +// Invalidate the entire cache +#define HAL_DCACHE_INVALIDATE_ALL_DEFINED +#define HAL_DCACHE_INVALIDATE_ALL() \ + CYG_MACRO_START \ + register volatile CYG_BYTE *addr; \ + HAL_CLEAR_TAGLO(); \ + HAL_CLEAR_TAGHI(); \ + for (addr = (CYG_BYTE *)CYGARC_KSEG_CACHED_BASE; \ + addr < (CYG_BYTE *)(CYGARC_KSEG_CACHED_BASE + HAL_DCACHE_SIZE); \ + addr += HAL_DCACHE_LINE_SIZE ) \ + { \ + asm volatile (" cache %0, 0(%1)" \ + : \ + : "I" (HAL_CACHE_OP(HAL_WHICH_DCACHE, HAL_INDEX_STORE_TAG)), \ + "r"(addr)); \ + } \ + CYG_MACRO_END + +// Synchronize the contents of the cache with memory. +extern void hal_dcache_sync(void); +#define HAL_DCACHE_SYNC_DEFINED +#define HAL_DCACHE_SYNC() hal_dcache_sync() + +// Set the data cache refill burst size +//#define HAL_DCACHE_BURST_SIZE(_asize_) + +// Set the data cache write mode +//#define HAL_DCACHE_WRITE_MODE( _mode_ ) + +// Load the contents of the given address range into the data cache +// and then lock the cache so that it stays there. +#define HAL_DCACHE_LOCK_DEFINED +#define HAL_DCACHE_LOCK(_base_, _asize_) \ + CYG_MACRO_START \ + register CYG_ADDRESS _baddr_ = (CYG_ADDRESS)(_base_); \ + register CYG_ADDRESS _addr_ = (CYG_ADDRESS)(_base_); \ + register CYG_WORD _size_ = (_asize_); \ + for( ; _addr_ <= _baddr_+_size_; _addr_ += HAL_DCACHE_LINE_SIZE ) \ + asm volatile (" cache %0, 0(%1)" \ + : \ + : "I" (HAL_CACHE_OP(HAL_WHICH_DCACHE, HAL_FETCH_AND_LOCK)), \ + "r"(_addr_)); \ + CYG_MACRO_END + +// Undo a previous lock operation +#define HAL_DCACHE_UNLOCK_DEFINED +#define HAL_DCACHE_UNLOCK(_base_, _asize_) \ + CYG_MACRO_START \ + register CYG_ADDRESS _baddr_ = (CYG_ADDRESS)(_base_); \ + register CYG_ADDRESS _addr_ = (CYG_ADDRESS)(_base_); \ + register CYG_WORD _size_ = (_asize_); \ + for( ; _addr_ <= _baddr_+_size_; _addr_ += HAL_DCACHE_LINE_SIZE ) \ + asm volatile (" cache %0, 0(%1)" \ + : \ + : "I" (HAL_CACHE_OP(HAL_WHICH_DCACHE, HAL_HIT_INVALIDATE)), \ + "r"(_addr_)); \ + CYG_MACRO_END + +// Unlock entire cache +#define HAL_DCACHE_UNLOCK_ALL_DEFINED +#define HAL_DCACHE_UNLOCK_ALL() HAL_DCACHE_UNLOCK(0,HAL_DCACHE_SIZE) + + +//----------------------------------------------------------------------------- +// Data cache line control + +// Allocate cache lines for the given address range without reading its +// contents from memory. +//#define HAL_DCACHE_ALLOCATE( _base_ , _asize_ ) + +// Write dirty cache lines to memory and invalidate the cache entries +// for the given address range. +#define HAL_DCACHE_FLUSH_DEFINED +#if HAL_DCACHE_WRITETHRU_MODE == 1 +// No need to flush a writethrough cache +#define HAL_DCACHE_FLUSH( _base_ , _asize_ ) +#else +#error HAL_DCACHE_FLUSH undefined for MIPS32 writeback cache +#endif + +// Write dirty cache lines to memory for the given address range. +#define HAL_DCACHE_STORE_DEFINED +#if HAL_DCACHE_WRITETHRU_MODE == 1 +// No need to store a writethrough cache +#define HAL_DCACHE_STORE( _base_ , _asize_ ) +#else +#error HAL_DCACHE_STORE undefined for MIPS32 writeback cache +#endif + +// Invalidate cache lines in the given range without writing to memory. +#define HAL_DCACHE_INVALIDATE_DEFINED +#define HAL_DCACHE_INVALIDATE( _base_ , _asize_ ) \ + CYG_MACRO_START \ + register CYG_ADDRESS _baddr_ = (CYG_ADDRESS)(_base_); \ + register CYG_ADDRESS _addr_ = (CYG_ADDRESS)(_base_); \ + register CYG_WORD _size_ = (_asize_); \ + for( ; _addr_ <= _baddr_+_size_; _addr_ += HAL_DCACHE_LINE_SIZE ) \ + asm volatile (" cache %0, 0(%1)" \ + : \ + : "I" (HAL_CACHE_OP(HAL_WHICH_DCACHE, HAL_HIT_INVALIDATE)), \ + "r"(_addr_)); \ + CYG_MACRO_END + + + + + + +//----------------------------------------------------------------------------- +// Global control of Instruction cache + +// Invalidate the entire cache +#define HAL_ICACHE_INVALIDATE_ALL_DEFINED +#define HAL_ICACHE_INVALIDATE_ALL() \ + CYG_MACRO_START \ + register volatile CYG_BYTE *addr; \ + HAL_CLEAR_TAGLO(); \ + HAL_CLEAR_TAGHI(); \ + for (addr = (CYG_BYTE *)CYGARC_KSEG_CACHED_BASE; \ + addr < (CYG_BYTE *)(CYGARC_KSEG_CACHED_BASE + HAL_ICACHE_SIZE); \ + addr += HAL_ICACHE_LINE_SIZE ) \ + { \ + asm volatile (" cache %0, 0(%1)" \ + : \ + : "I" (HAL_CACHE_OP(HAL_WHICH_ICACHE, HAL_INDEX_STORE_TAG)), \ + "r"(addr)); \ + } \ + CYG_MACRO_END + +// Synchronize the contents of the cache with memory. +extern void hal_icache_sync(void); +#define HAL_ICACHE_SYNC_DEFINED +#define HAL_ICACHE_SYNC() hal_icache_sync() + +// Set the instruction cache refill burst size +//#define HAL_ICACHE_BURST_SIZE(_asize_) + +// Load the contents of the given address range into the data cache +// and then lock the cache so that it stays there. +#define HAL_ICACHE_LOCK_DEFINED +#define HAL_ICACHE_LOCK(_base_, _asize_) \ + CYG_MACRO_START \ + register CYG_ADDRESS _baddr_ = (CYG_ADDRESS)(_base_); \ + register CYG_ADDRESS _addr_ = (CYG_ADDRESS)(_base_); \ + register CYG_WORD _size_ = (_asize_); \ + for( ; _addr_ <= _baddr_+_size_; _addr_ += HAL_ICACHE_LINE_SIZE ) \ + asm volatile (" cache %0, 0(%1)" \ + : \ + : "I" (HAL_CACHE_OP(HAL_WHICH_ICACHE, HAL_FETCH_AND_LOCK)), \ + "r"(_addr_)); \ + CYG_MACRO_END + +// Undo a previous lock operation +#define HAL_ICACHE_UNLOCK_DEFINED +#define HAL_ICACHE_UNLOCK(_base_, _asize_) \ + CYG_MACRO_START \ + register CYG_ADDRESS _baddr_ = (CYG_ADDRESS)(_base_); \ + register CYG_ADDRESS _addr_ = (CYG_ADDRESS)(_base_); \ + register CYG_WORD _size_ = (_asize_); \ + for( ; _addr_ <= _baddr_+_size_; _addr_ += HAL_ICACHE_LINE_SIZE ) \ + asm volatile (" cache %0, 0(%1)" \ + : \ + : "I" (HAL_CACHE_OP(HAL_WHICH_ICACHE, HAL_HIT_INVALIDATE)), \ + "r"(_addr_)); \ + CYG_MACRO_END + +// Unlock entire cache +#define HAL_ICACHE_UNLOCK_ALL_DEFINED +#define HAL_ICACHE_UNLOCK_ALL() HAL_ICACHE_UNLOCK(0,HAL_ICACHE_SIZE) + +//----------------------------------------------------------------------------- +// Instruction cache line control + +// Invalidate cache lines in the given range without writing to memory. +#define HAL_ICACHE_INVALIDATE_DEFINED +#define HAL_ICACHE_INVALIDATE( _base_ , _asize_ ) \ + CYG_MACRO_START \ + register CYG_ADDRESS _baddr_ = (CYG_ADDRESS)(_base_); \ + register CYG_ADDRESS _addr_ = (CYG_ADDRESS)(_base_); \ + register CYG_WORD _size_ = (_asize_); \ + for( ; _addr_ <= _baddr_+_size_; _addr_ += HAL_ICACHE_LINE_SIZE ) \ + asm volatile (" cache %0, 0(%1)" \ + : \ + : "I" (HAL_CACHE_OP(HAL_WHICH_ICACHE, HAL_HIT_INVALIDATE)), \ + "r"(_addr_)); \ + CYG_MACRO_END + +//----------------------------------------------------------------------------- +#endif // ifndef CYGONCE_IMP_CACHE_H +// End of imp_cache.h diff --git a/packages/hal/mips/mips64/current/include/var_intr.h b/packages/hal/mips/mips64/current/include/var_intr.h new file mode 100644 --- /dev/null +++ b/packages/hal/mips/mips64/current/include/var_intr.h @@ -0,0 +1,63 @@ +#ifndef CYGONCE_HAL_IMP_INTR_H +#define CYGONCE_HAL_IMP_INTR_H + +//========================================================================== +// +// imp_intr.h +// +// MIPS64 Interrupt and clock support +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg +// Contributors: nickg, jskov, +// gthomas, jlarmour, dmoseley +// Date: 1999-02-16 +// Purpose: MIPS64 Interrupt support +// Description: The macros defined here provide the HAL APIs for handling +// interrupts and the clock for variants of the MIPS64 +// architecture. +// +// Usage: +// #include +// ... +// +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include + +#include + +#include + +//-------------------------------------------------------------------------- +#endif // ifndef CYGONCE_HAL_IMP_INTR_H +// End of imp_intr.h diff --git a/packages/hal/mips/mips64/current/include/variant.inc b/packages/hal/mips/mips64/current/include/variant.inc new file mode 100644 --- /dev/null +++ b/packages/hal/mips/mips64/current/include/variant.inc @@ -0,0 +1,180 @@ +#ifndef CYGONCE_HAL_VARIANT_INC +#define CYGONCE_HAL_VARIANT_INC +##============================================================================= +## +## variant.inc +## +## MIPS 32 family assembler header file +## +##============================================================================= +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Red Hat eCos Public License +# Version 1.1 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://www.redhat.com/ +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Configurable Operating System, +# released September 30, 1998. +# +# The Initial Developer of the Original Code is Red Hat. +# Portions created by Red Hat are +# Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +# All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +##============================================================================= +#######DESCRIPTIONBEGIN#### +## +## Author(s): dmoseley +## Contributors: dmoseley +## Date: 2001-01-30 +## Purpose: MIPS64 family definitions. +## Description: This file contains various definitions and macros that are +## useful for writing assembly code for the MIPS64 CPU family. +## Usage: +## #include +## ... +## +## +######DESCRIPTIONEND#### +## +##============================================================================= + +#include + +#include + +#include + +#define CYGARC_HAL_COMMON_EXPORT_CPU_MACROS +#include +#include + +##----------------------------------------------------------------------------- +## Define CPU variant for architecture HAL. + +#define CYG_HAL_MIPS_MIPS64 + +# Set the KX bit to use 64 bit addressing in kernel mode. + +#define INITIAL_SR_VAR 0x00000080 + +#------------------------------------------------------------------------------ +# Cache macros. + +#ifndef CYGPKG_HAL_MIPS_CACHE_DEFINED + + .macro hal_cache_init + + # Setup a temporary stack pointer for running C code. + la a0,__interrupt_stack + move sp,a0 + CYGARC_ADDRESS_REG_UNCACHED(sp) + + # Read the CONFIG1 register into a0 + mfc0 a0, C0_CONFIG, 1 + nop + nop + nop + + # Jump to C-code to initialize caches (uncached) + lar k0, hal_c_cache_init + CYGARC_ADDRESS_REG_UNCACHED(k0) + jalr k0 + nop + .endm + +#define CYGPKG_HAL_MIPS_CACHE_DEFINED + +#endif + +#------------------------------------------------------------------------------ +# Monitor initialization. + +#ifndef CYGPKG_HAL_MIPS_MON_DEFINED + +#if defined(CYG_HAL_STARTUP_ROM) || \ + ( defined(CYG_HAL_STARTUP_RAM) && \ + !defined(CYGSEM_HAL_USE_ROM_MONITOR)) + # If we are starting up from ROM, or we are starting in + # RAM and NOT using a ROM monitor, initialize the VSR table. + + .macro hal_mon_init + la a0,__default_interrupt_vsr + la a1,__default_exception_vsr + la a3,hal_vsr_table + + sw a0,0(a3) + sw a1,1*4(a3) + sw a1,2*4(a3) + sw a1,3*4(a3) + sw a1,4*4(a3) + sw a1,5*4(a3) + sw a1,6*4(a3) + sw a1,7*4(a3) + sw a1,8*4(a3) + sw a1,9*4(a3) + sw a1,10*4(a3) + sw a1,11*4(a3) + sw a1,12*4(a3) + sw a1,13*4(a3) + sw a1,14*4(a3) + sw a1,15*4(a3) + + sw a1,32*4(a3) + sw a1,33*4(a3) + .endm + +#elif defined(CYG_HAL_STARTUP_RAM) && defined(CYGSEM_HAL_USE_ROM_MONITOR) + + # Initialize the VSR table entries + # We only take control of the interrupt vector, + # the rest are left to the ROM for now... + + .macro hal_mon_init + la a0,__default_interrupt_vsr + la a3,hal_vsr_table + sw a0,0(a3) + .endm + +#else + + .macro hal_mon_init + .endm + +#endif + + +#define CYGPKG_HAL_MIPS_MON_DEFINED + +#endif + +#------------------------------------------------------------------------------ +# Decide whether the VSR table is defined externally, or is to be defined +# here. + +#if defined(CYGPKG_HAL_MIPS_SIM) || \ + ( defined(CYGPKG_HAL_MIPS_ATLAS) && \ + defined(CYG_HAL_STARTUP_RAM) && \ + !defined(CYGSEM_HAL_USE_ROM_MONITOR) \ + ) + +## VSR table defined in linker script + +#else + +#define CYG_HAL_MIPS_VSR_TABLE_DEFINED + +#endif + +#------------------------------------------------------------------------------ +#endif // ifndef CYGONCE_HAL_VARIANT_INC +# end of variant.inc diff --git a/packages/hal/mips/mips64/current/src/mips_mips64.ld b/packages/hal/mips/mips64/current/src/mips_mips64.ld new file mode 100644 --- /dev/null +++ b/packages/hal/mips/mips64/current/src/mips_mips64.ld @@ -0,0 +1,372 @@ +//=========================================================================== +// +// MLT linker script for MIPS64 +// +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//=========================================================================== + +#include + +OUTPUT_FORMAT("elf32-bigmips", "elf32-bigmips", + "elf32-littlemips") +/* The preprocessor defines mips, but we know we're mips :-) */ +#undef mips +OUTPUT_ARCH(mips:isa64) + +STARTUP(vectors.o) +ENTRY(reset_vector) +#ifdef EXTRAS +INPUT(extras.o) +#endif +GROUP(libtarget.a libgcc.a) + +/* FIXME: The MLT should pass in the required alignment since it must be + * the same as the VMA's alignment. As a result of this bug, all the MIPS64 + * ROM mlt files have alignment 8, when some should have alignment 4 + * (902557-CR) + */ +#define ALIGN_LMA 0x40 +#define FOLLOWING(_section_) AT ((LOADADDR (_section_) + SIZEOF (_section_) + ALIGN_LMA - 1) & ~ (ALIGN_LMA - 1)) +#define LMA_EQ_VMA +#define FORCE_OUTPUT . = . + +#define SECTIONS_BEGIN + +#if defined(CYG_HAL_STARTUP_RAM) + +/* this version for RAM startup */ +#define SECTION_rom_vectors(_region_, _vma_, _lma_) \ + .rom_vectors _vma_ : _lma_ \ + { KEEP (*(.utlb_vector)) \ + . = ALIGN(0x80); KEEP(*(.other_vector)) \ + /* debug and reset vector not used in RAM version */ \ + KEEP(*(.debug_vector)) \ + KEEP (*(.reset_vector)) } \ + > _region_ + +#elif defined(CYG_HAL_STARTUP_ROM) + +/* this version for ROM startup */ +#define SECTION_rom_vectors(_region_, _vma_, _lma_) \ + .rom_vectors _vma_ : _lma_ \ + { KEEP (*(.reset_vector)) \ + . = ALIGN(0x200); KEEP (*(.utlb_vector)) \ + . = . + 0x100; \ + . = ALIGN(0x80); KEEP(*(.other_vector)) \ + . = . + 0x80; \ + . = ALIGN(0x80); KEEP(*(.debug_vector)) } \ + > _region_ + +#endif /* ROM startup version of ROM vectors */ + +#define SECTION_ROMISC(_region_, _vma_, _lma_) \ + .interp _vma_ : _lma_ { *(.interp) } > _region_ \ + .hash : FOLLOWING(.interp) { *(.hash) } > _region_ \ + .dynsym : FOLLOWING(.hash) { *(.dynsym) } > _region_ \ + .dynstr : FOLLOWING(.dynsym) { *(.dynstr) } > _region_ \ + .gnu.version : FOLLOWING(.dynstr) { *(.gnu.version) } > _region_ \ + .gnu.version_d : FOLLOWING(.gnu.version) { *(.gnu.version_d) } > _region_ \ + .gnu.version_r : FOLLOWING(.gnu.version_d) { *(.gnu.version_r) } > _region_ \ + .plt : FOLLOWING(.gnu.version_r) { *(.plt) } > _region_ + +#define SECTION_RELOCS(_region_, _vma_, _lma_) \ + .rel.text : \ + { \ + *(.rel.text) \ + *(.rel.text.*) \ + *(.rel.gnu.linkonce.t*) \ + } > _region_ \ + .rela.text : \ + { \ + *(.rela.text) \ + *(.rela.text.*) \ + *(.rela.gnu.linkonce.t*) \ + } > _region_ \ + .rel.data : \ + { \ + *(.rel.data) \ + *(.rel.data.*) \ + *(.rel.gnu.linkonce.d*) \ + } > _region_ \ + .rela.data : \ + { \ + *(.rela.data) \ + *(.rela.data.*) \ + *(.rela.gnu.linkonce.d*) \ + } > _region_ \ + .rel.rodata : \ + { \ + *(.rel.rodata) \ + *(.rel.rodata.*) \ + *(.rel.gnu.linkonce.r*) \ + } > _region_ \ + .rela.rodata : \ + { \ + *(.rela.rodata) \ + *(.rela.rodata.*) \ + *(.rela.gnu.linkonce.r*) \ + } > _region_ \ + .rel.got : { *(.rel.got) } > _region_ \ + .rela.got : { *(.rela.got) } > _region_ \ + .rel.ctors : { *(.rel.ctors) } > _region_ \ + .rela.ctors : { *(.rela.ctors) } > _region_ \ + .rel.dtors : { *(.rel.dtors) } > _region_ \ + .rela.dtors : { *(.rela.dtors) } > _region_ \ + .rel.init : { *(.rel.init) } > _region_ \ + .rela.init : { *(.rela.init) } > _region_ \ + .rel.fini : { *(.rel.fini) } > _region_ \ + .rela.fini : { *(.rela.fini) } > _region_ \ + .rel.bss : { *(.rel.bss) } > _region_ \ + .rela.bss : { *(.rela.bss) } > _region_ \ + .rel.plt : { *(.rel.plt) } > _region_ \ + .rela.plt : { *(.rela.plt) } > _region_ \ + .rel.dyn : { *(.rel.dyn) } > _region_ + +#define SECTION_init(_region_, _vma_, _lma_) \ + .init _vma_ : _lma_ \ + { \ + FORCE_OUTPUT; KEEP (*(.init)) \ + } > _region_ =0 + +#define SECTION_text(_region_, _vma_, _lma_) \ + .text _vma_ : _lma_ \ + { \ + _stext = .; _ftext = . ; \ + *(.text) \ + *(.text.*) \ + *(.stub) \ + *(.gnu.warning) \ + *(.gnu.linkonce.t*) \ + *(.mips16.fn.*) *(.mips16.call.*) \ + } > _region_ =0 \ + _etext = .; PROVIDE (etext = .); + +#define SECTION_fini(_region_, _vma_, _lma_) \ + .fini _vma_ : _lma_ \ + { \ + FORCE_OUTPUT; KEEP (*(.fini)) \ + } > _region_ =0 + +#define SECTION_rodata(_region_, _vma_, _lma_) \ + .rodata _vma_ : _lma_ \ + { \ + FORCE_OUTPUT; *(.rodata) *(.rodata.*) *(.gnu.linkonce.r*) \ + } > _region_ + +#define SECTION_rodata1(_region_, _vma_, _lma_) \ + .rodata1 _vma_ : _lma_ \ + { \ + FORCE_OUTPUT; *(.rodata1) *(.rodata1.*) \ + } > _region_ + +#define SECTION_vsr_table(_region_, _vma_, _lma_) \ + .vsr_table _vma_ : _lma_ \ + { \ + FORCE_OUTPUT; *(.vsr_table) \ + } > _region_ + +#define SECTION_data(_region_, _vma_, _lma_) \ + .data _vma_ : _lma_ \ + { \ + __ram_data_start = ABSOLUTE (.); _fdata = . ; \ + *(.data) *(.data.*) *(.gnu.linkonce.d*) \ + . = ALIGN (8); \ + SORT(CONSTRUCTORS) \ + } > _region_ \ + __rom_data_start = LOADADDR(.data); + +#define SECTION_data1(_region_, _vma_, _lma_) \ + .data1 _vma_ : _lma_ \ + { \ + FORCE_OUTPUT; *(.data1) *(.data1.*) \ + } > _region_ + +#define SECTION_eh_frame(_region_, _vma_, _lma_) \ + .eh_frame _vma_ : _lma_ \ + { \ + FORCE_OUTPUT; *(.eh_frame) \ + } > _region_ + +#define SECTION_gcc_except_table(_region_, _vma_, _lma_) \ + .gcc_except_table _vma_ : _lma_ \ + { \ + FORCE_OUTPUT; *(.gcc_except_table) \ + } > _region_ + + + /* gcc uses crtbegin.o to find the start of + the constructors, so we make sure it is + first. Because this is a wildcard, it + doesn't matter if the user does not + actually link against crtbegin.o; the + linker won't look for a file to match a + wildcard. The wildcard also means that it + doesn't matter which directory crtbegin.o + is in. */ + + /* We don't want to include the .ctors section from + the crtend.o file until after the sorted ctors. + The .ctor section from the crtend file contains the + end of ctors marker and it must be last */ + +/* FIXME: We shouldn't need to define __CTOR_LIST__/__CTOR_END__ + and __DTOR_LIST__/__DTOR_END__ except by the PROVIDE lines. + However this doesn't work for old (99r1-era) toolchains, so + leave it for now. */ + +#define SECTION_ctors(_region_, _vma_, _lma_) \ + .ctors _vma_ : _lma_ \ + { \ + FORCE_OUTPUT; \ + KEEP (*crtbegin.o(.ctors)) \ + __CTOR_LIST__ = .; \ + PROVIDE (__CTOR_LIST__ = .); \ + KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) \ + KEEP (*(SORT(.ctors.*))) \ + KEEP (*(.ctors)) \ + __CTOR_END__ = .; \ + PROVIDE (__CTOR_END__ = .); \ + } > _region_ + +#define SECTION_dtors(_region_, _vma_, _lma_) \ + .dtors _vma_ : _lma_ \ + { \ + FORCE_OUTPUT; \ + KEEP (*crtbegin.o(.dtors)) \ + __DTOR_LIST__ = .; \ + PROVIDE (__DTOR_LIST__ = .); \ + KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) \ + KEEP (*(SORT(.dtors.*))) \ + KEEP (*(.dtors)) \ + __DTOR_END__ = .; \ + PROVIDE (__DTOR_END__ = .); \ + } > _region_ + +#define SECTION_devtab(_region_, _vma_, _lma_) \ + .devtab _vma_ : _lma_ \ + { \ + FORCE_OUTPUT; \ + KEEP(*( SORT (.ecos.table.*))) ; \ + } > _region_ + +#define SECTION_got(_region_, _vma_, _lma_) \ + _gp = ALIGN(16) + 0x7ff0; \ + .got _vma_ : _lma_ \ + { \ + FORCE_OUTPUT; *(.got.plt) *(.got) \ + } > _region_ + +#define SECTION_dynamic(_region_, _vma_, _lma_) \ + .dynamic _vma_ : _lma_ \ + { \ + FORCE_OUTPUT; *(.dynamic) \ + } > _region_ + + /* We want the small data sections together, so single-instruction offsets + can access them all, and initialized data all before uninitialized, so + we can shorten the on-disk segment size. */ + +#define SECTION_sdata(_region_, _vma_, _lma_) \ + .sdata _vma_ : _lma_ \ + { \ + FORCE_OUTPUT; *(.sdata) *(.sdata.*) *(.gnulinkonce.s*) \ + } > _region_ + +#define SECTION_lit8(_region_, _vma_, _lma_) \ + .lit8 _vma_ : _lma_ \ + { \ + FORCE_OUTPUT; *(.lit8) \ + } > _region_ + +#define SECTION_lit4(_region_, _vma_, _lma_) \ + .lit4 : FOLLOWING(.lit8) \ + { \ + FORCE_OUTPUT; *(.lit4) \ + } > _region_ \ + __ram_data_end = .; _edata = . ; \ + PROVIDE (edata = .); + +#define SECTION_sbss(_region_, _vma_, _lma_) \ + __bss_start = .; _fbss = .; \ + .sbss _vma_ : _lma_ \ + { \ + FORCE_OUTPUT; *(.dynsbss) *(.sbss) *(.sbss.*) *(.scommon) \ + } > _region_ + +#define SECTION_bss(_region_, _vma_, _lma_) \ + .bss _vma_ : _lma_ \ + { \ + *(.dynbss) *(.bss) *(.bss.*) *(COMMON) \ + } > _region_ \ + __bss_end = .; + +/* The /DISCARD/ section ensures that the output will not contain a + * .mdebug section as it confuses GDB. This is a workaround for CR 100804. + */ + +#define SECTIONS_END . = ALIGN(4); _end = .; PROVIDE (end = .); \ + /* Stabs debugging sections. */ \ + .stab 0 : { *(.stab) } \ + .stabstr 0 : { *(.stabstr) } \ + .stab.excl 0 : { *(.stab.excl) } \ + .stab.exclstr 0 : { *(.stab.exclstr) } \ + .stab.index 0 : { *(.stab.index) } \ + .stab.indexstr 0 : { *(.stab.indexstr) } \ + .comment 0 : { *(.comment) } \ + /* DWARF debug sections. \ + Symbols in the DWARF debugging sections are relative to \ + the beginning of the section so we begin them at 0. */ \ + /* DWARF 1 */ \ + .debug 0 : { *(.debug) } \ + .line 0 : { *(.line) } \ + /* GNU DWARF 1 extensions */ \ + .debug_srcinfo 0 : { *(.debug_srcinfo) } \ + .debug_sfnames 0 : { *(.debug_sfnames) } \ + /* DWARF 1.1 and DWARF 2 */ \ + .debug_aranges 0 : { *(.debug_aranges) } \ + .debug_pubnames 0 : { *(.debug_pubnames) } \ + /* DWARF 2 */ \ + .debug_info 0 : { *(.debug_info) } \ + .debug_abbrev 0 : { *(.debug_abbrev) } \ + .debug_line 0 : { *(.debug_line) } \ + .debug_frame 0 : { *(.debug_frame) } \ + .debug_str 0 : { *(.debug_str) } \ + .debug_loc 0 : { *(.debug_loc) } \ + .debug_macinfo 0 : { *(.debug_macinfo) } \ + /* SGI/MIPS DWARF 2 extensions */ \ + .debug_weaknames 0 : { *(.debug_weaknames) } \ + .debug_funcnames 0 : { *(.debug_funcnames) } \ + .debug_typenames 0 : { *(.debug_typenames) } \ + .debug_varnames 0 : { *(.debug_varnames) } \ + /* These must appear regardless of . */ \ + .gptab.sdata : { *(.gptab.data) *(.gptab.sdata) } \ + .gptab.sbss : { *(.gptab.bss) *(.gptab.sbss) } \ + /DISCARD/ 0 : { *(.mdebug) } + +#include CYGHWR_MEMORY_LAYOUT_LDI + +hal_vsr_table = 0x80000200; +hal_virtual_vector_table = 0x80000300; diff --git a/packages/hal/mips/mips64/current/src/var_misc.c b/packages/hal/mips/mips64/current/src/var_misc.c new file mode 100644 --- /dev/null +++ b/packages/hal/mips/mips64/current/src/var_misc.c @@ -0,0 +1,216 @@ +//========================================================================== +// +// var_misc.c +// +// HAL implementation miscellaneous functions +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg +// Contributors: nickg, jlarmour, dmoseley +// Date: 2000-07-14 +// Purpose: HAL miscellaneous functions +// Description: This file contains miscellaneous functions provided by the +// HAL. +// +//####DESCRIPTIONEND#### +// +//========================================================================*/ + +#include + +#include // Base types +#include // tracing macros +#include // assertion macros + +#include + +#define CYGARC_HAL_COMMON_EXPORT_CPU_MACROS +#include +#include +#include +#include + +/*------------------------------------------------------------------------*/ +// Array which stores the configured priority levels for the configured +// interrupts. + +volatile CYG_BYTE hal_interrupt_level[CYGNUM_HAL_ISR_COUNT]; + +/*------------------------------------------------------------------------*/ + +void hal_variant_init(void) +{ +} + +/* + * Uncomment the following to allow for dynamic cache sizing. + * Currently we are going to assume the exact part specified in the ecosconfig stuff. + * Perhaps in the near future this can all be done dynamically. + */ +/* define DYNAMIC_CACHE_SIZING */ + +#if 0 +#ifndef DYNAMIC_CACHE_SIZING +#warning " \n\ +STILL NEED TO IMPLEMENT DYNAMIC_CACHE_SIZING. \n\ +ALSO, the HAL_PLATFORM_CPU/etc defines need to be dynamic. \n\ +ALSO, need to do big endian stuff as well. \n\ +Determine if network debug is necessary. \n\ +Remove MIPS memc_init code" +#endif +#endif + +/*------------------------------------------------------------------------*/ +// Initialize the caches + +int hal_init_icache(unsigned long config1_val) +{ +#ifdef DYNAMIC_CACHE_SIZING + int icache_linesize, icache_assoc, icache_sets, icache_lines, icache_size; + unsigned long cache_addr; + + switch (config1_val & CONFIG1_IL) + { + case CONFIG1_ICACHE_LINE_SIZE_32_BYTES: icache_linesize = 32; break; + case CONFIG1_ICACHE_NOT_PRESET: return -1; break; + default: /* Error */ return -1; break; + } + + switch (config1_val & CONFIG1_IA) + { + case CONFIG1_ICACHE_DIRECT_MAPPED: icache_assoc = 1; break; + case CONFIG1_ICACHE_2_WAY: icache_assoc = 2; break; + case CONFIG1_ICACHE_3_WAY: icache_assoc = 3; break; + case CONFIG1_ICACHE_4_WAY: icache_assoc = 4; break; + default: /* Error */ return -1; break; + } + + switch (config1_val & CONFIG1_IS) + { + case CONFIG1_ICACHE_64_SETS_PER_WAY: icache_sets = 64; break; + case CONFIG1_ICACHE_128_SETS_PER_WAY: icache_sets = 128; break; + case CONFIG1_ICACHE_256_SETS_PER_WAY: icache_sets = 256; break; + default: /* Error */ return -1; break; + } + + icache_lines = icache_sets * icache_assoc; + icache_size = icache_lines * icache_linesize; +#endif /* DYNAMIC_CACHE_SIZING */ + + /* + * Reset does not invalidate the cache so let's do so now. + */ + HAL_ICACHE_INVALIDATE_ALL(); + +#ifdef DYNAMIC_CACHE_SIZING + return icache_size; +#else + return HAL_ICACHE_SIZE; +#endif +} + +int hal_init_dcache(unsigned long config1_val) +{ +#ifdef DYNAMIC_CACHE_SIZING + int dcache_linesize, dcache_assoc, dcache_sets, dcache_lines, dcache_size; + + switch (config1_val & CONFIG1_DL) + { + case CONFIG1_DCACHE_LINE_SIZE_32_BYTES: dcache_linesize = 32; break; + case CONFIG1_DCACHE_NOT_PRESET: return -1; break; + default: /* Error */ return -1; break; + } + + switch (config1_val & CONFIG1_DA) + { + case CONFIG1_DCACHE_DIRECT_MAPPED: dcache_assoc = 1; break; + case CONFIG1_DCACHE_2_WAY: dcache_assoc = 2; break; + case CONFIG1_DCACHE_3_WAY: dcache_assoc = 3; break; + case CONFIG1_DCACHE_4_WAY: dcache_assoc = 4; break; + default: /* Error */ return -1; break; + } + + switch (config1_val & CONFIG1_DS) + { + case CONFIG1_DCACHE_64_SETS_PER_WAY: dcache_sets = 64; break; + case CONFIG1_DCACHE_128_SETS_PER_WAY: dcache_sets = 128; break; + case CONFIG1_DCACHE_256_SETS_PER_WAY: dcache_sets = 256; break; + default: /* Error */ return -1; break; + } + + dcache_lines = dcache_sets * dcache_assoc; + dcache_size = dcache_lines * dcache_linesize; +#endif /* DYNAMIC_CACHE_SIZING */ + + /* + * Reset does not invalidate the cache so let's do so now. + */ + HAL_DCACHE_INVALIDATE_ALL(); + +#ifdef DYNAMIC_CACHE_SIZING + return dcache_size; +#else + return HAL_DCACHE_SIZE; +#endif +} + +void hal_c_cache_init(unsigned long config1_val) +{ + volatile unsigned val; + + if (hal_init_icache(config1_val) == -1) + { + /* Error */ + ; + } + + if (hal_init_dcache(config1_val) == -1) + { + /* Error */ + ; + } + + // enable cached KSEG0 + asm volatile("mfc0 %0,$16;" : "=r"(val)); + val &= ~3; + asm volatile("mtc0 %0,$16;" : : "r"(val)); +} + +void hal_icache_sync(void) +{ + HAL_ICACHE_INVALIDATE_ALL(); +} + +void hal_dcache_sync(void) +{ + HAL_DCACHE_INVALIDATE_ALL(); +} + +/*------------------------------------------------------------------------*/ +/* End of var_misc.c */ diff --git a/packages/hal/mips/mips64/current/src/variant.S b/packages/hal/mips/mips64/current/src/variant.S new file mode 100644 --- /dev/null +++ b/packages/hal/mips/mips64/current/src/variant.S @@ -0,0 +1,68 @@ +##============================================================================= +## +## variant.S +## +## MIPS 64 variant code +## +##============================================================================= +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Red Hat eCos Public License +# Version 1.1 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://www.redhat.com/ +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Configurable Operating System, +# released September 30, 1998. +# +# The Initial Developer of the Original Code is Red Hat. +# Portions created by Red Hat are +# Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +# All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +##============================================================================= +#######DESCRIPTIONBEGIN#### +## +## Author(s): dmoseley +## Contributors: dmoseley +## Date: 2000-06-07 +## Purpose: MIPS 64 variant code +## Description: Variant specific code for MIPS64 architecture. +## +## +## +## +######DESCRIPTIONEND#### +## +##============================================================================= + +#include +#include + +#define CYGARC_HAL_COMMON_EXPORT_CPU_MACROS +#include + +#ifdef CYGPKG_KERNEL +# include +#endif + +#include + +#include +#include + +##----------------------------------------------------------------------------- +# Variant Initialization. +# This code performs variant specific initialization. + +##----------------------------------------------------------------------------- +## end of variant.S + diff --git a/packages/hal/mips/ref4955/current/ChangeLog b/packages/hal/mips/ref4955/current/ChangeLog --- a/packages/hal/mips/ref4955/current/ChangeLog +++ b/packages/hal/mips/ref4955/current/ChangeLog @@ -1,3 +1,8 @@ +2001-03-08 Jesper Skov + + * cdl/hal_mips_tx49_ref4955.cdl: Does not guarantee virtual vector + support. + 2001-02-08 Jesper Skov * cdl/hal_mips_tx49_ref4955.cdl: Respect channel configuration diff --git a/packages/hal/mips/ref4955/current/cdl/hal_mips_tx49_ref4955.cdl b/packages/hal/mips/ref4955/current/cdl/hal_mips_tx49_ref4955.cdl --- a/packages/hal/mips/ref4955/current/cdl/hal_mips_tx49_ref4955.cdl +++ b/packages/hal/mips/ref4955/current/cdl/hal_mips_tx49_ref4955.cdl @@ -55,6 +55,7 @@ cdl_package CYGPKG_HAL_MIPS_TX49_REF4955 implements CYGINT_HAL_DEBUG_GDB_STUBS implements CYGINT_HAL_DEBUG_GDB_STUBS_BREAK implements CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT + implements CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT_NOT_GUARANTEED define_proc { puts $::cdl_system_header "#define CYGBLD_HAL_TARGET_H " diff --git a/packages/hal/mips/rm7000/ocelot/current/ChangeLog b/packages/hal/mips/rm7000/ocelot/current/ChangeLog new file mode 100644 --- /dev/null +++ b/packages/hal/mips/rm7000/ocelot/current/ChangeLog @@ -0,0 +1,188 @@ +2001-03-08 Jesper Skov + + * cdl/hal_mips_rm7000_ocelot.cdl: Removed + CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT_GUARANTEED which is now the + default. + +2001-02-23 Jesper Skov + + * include/plf_cache.h: Removed HAL_FLASH_CACHES_WANT_OPTIMAL. It + is now the default. + +2001-02-08 Jesper Skov + + * cdl/hal_mips_rm7000_ocelot.cdl: Respect channel configuration + constraints. + + * src/ns16552.c: Replace CYGSEM_HAL_DIAG_MANGLER_None with + CYGDBG_HAL_DIAG_TO_DEBUG_CHAN. + +2001-02-01 Jesper Skov + + * src/platform.S: Handle interrupt chaining. + * include/platform.inc: Same. + * include/plf_intr.h: Same. + * src/plf_mk_defs.c: Same. + +2001-01-31 Jesper Skov + + * src/ns16552.c: Replaced CYGDBG_HAL_DIAG_DISABLE_GDB_PROTOCOL + with CYGSEM_HAL_DIAG_MANGLER_None + +2001-01-26 Jesper Skov + + * src/ns16552.c: Removed CYGSEM_HAL_VIRTUAL_VECTOR_DIAG check. + * include/plf_stub.h: Reset macros moved + * include/plf_intr.h: to this file. + +2001-01-24 Jesper Skov + + * misc/redboot_RAM.ecm: Enable ethernet. + * misc/redboot_ROM.ecm: Same. + + * include/plf_intr.h: PCI interrupt B is wired to i82559. + +2001-01-19 Jesper Skov + + * cdl/hal_mips_rm7000_ocelot.cdl: Updated PCI space options + accordingly. + + * src/platform.S: Add endian handling of memory init code. + + * include/pkgconf/mlt_mips_rm7000_ocelot_rom.h: Update address + space to 256MB. Add space for PCI access. + * include/pkgconf/mlt_mips_rm7000_ocelot_rom.mlt: Same. + * include/pkgconf/mlt_mips_rm7000_ocelot_rom.ldi: Same. + * include/pkgconf/mlt_mips_rm7000_ocelot_ram.h: Same. + * include/pkgconf/mlt_mips_rm7000_ocelot_ram.mlt: Same. + * include/pkgconf/mlt_mips_rm7000_ocelot_ram.ldi: Same. + +2001-01-15 Jesper Skov + + * src/plf_misc.c: Enable PCI access to memory. + * include/plf_io.h: Clean up PCI space mappings. + + * src/plf_misc.c: The Galileo PCI config is in little-endian mode + while all other devices are in big-endian mode. Cruft to deal with + that. + * include/plf_io.h: Same. + +2001-01-12 Jesper Skov + + * include/plf_io.h: Spacious PCI mappings. + * src/plf_misc.c (cyg_hal_plf_pci_init): Removed REMAP settings. + + * include/plf_io.h: PCI memory changes. + * src/plf_misc.c (cyg_hal_plf_pci_init): Same. Doesn't seem to + make much of a difference though. + + * cdl/hal_mips_rm7000_ocelot.cdl: New toolchain again. + +2001-01-10 Jesper Skov + + * src/platform.S: Snuffed some more code from Mark to set the RAM + up properly. Not tested, and may not work with the full 512MB + [there was a mention of an Galileo errata]. We'll see. + + * include/pkgconf/mlt_mips_rm7000_ocelot_ram.h: Hacked to provide + PCI window [no .mlt update since it'll all have to change for + fixed memory init anyway]. + * include/pkgconf/mlt_mips_rm7000_ocelot_ram.ldi: Same. + + * cdl/hal_mips_rm7000_ocelot.cdl: Added PCI memory window + options. Changed tools (again) which required some option hacking + as well. Fixed CPU clock / RTC rate issue. + + * src/platform.S: Removed PCI init code. + + * include/plf_io.h: Replace PCI macros with functions. + Added Galileo definitions. + * src/plf_misc.c: PCI functions. Code written by Mark + Salter. + + * cdl/hal_mips_rm7000_ocelot.cdl: Change tool prefix. + +2000-12-08 Jesper Skov + + * src/platform.S (hal_memc_setup_table): Only do one PCI access + retry. + +2000-12-07 Jesper Skov + + * src/platform.S: Named PCI config registers. + + * include/plf_intr.h: Added bogus PCI vectors. + + * include/plf_io.h: Added, cloned from VRC4373 file. Pretty bogus + though. Probably need timeout support like the vrc4373 as well. + +2000-12-06 Jesper Skov + + * cdl/hal_mips_rm7000_ocelot.cdl: Appears to only run at 150MHz. + Don't relocate RedBoot ELF image. + + * include/pkgconf/mlt_mips_rm7000_ocelot_ram.h: Changed to 16MB + size. Need to look into why the full 256/512MB is not accessible. + * include/pkgconf/mlt_mips_rm7000_ocelot_ram.ldi: Same. + * include/pkgconf/mlt_mips_rm7000_ocelot_ram.mlt: Same. + * include/pkgconf/mlt_mips_rm7000_ocelot_rom.h: Same. + * include/pkgconf/mlt_mips_rm7000_ocelot_rom.ldi: Same. + * include/pkgconf/mlt_mips_rm7000_ocelot_rom.mlt: Same. + + * misc/redboot_RAM.ecm: Added. + * misc/redboot_ROM.ecm: Added. + + * cdl/hal_mips_rm7000_ocelot.cdl: Produce .srec and .img files. + + * include/plf_cache.h (HAL_FLASH_CACHES_WANT_OPTIMAL): Defined. + +2000-12-04 Jesper Skov + + * include/pkgconf/mlt_mips_rm7000_ocelot_ram.h: Proper sizes. + * include/pkgconf/mlt_mips_rm7000_ocelot_ram.ldi: Same. + * include/pkgconf/mlt_mips_rm7000_ocelot_ram.mlt: Same. + * include/pkgconf/mlt_mips_rm7000_ocelot_rom.h: Same. + * include/pkgconf/mlt_mips_rm7000_ocelot_rom.ldi: Same. + * include/pkgconf/mlt_mips_rm7000_ocelot_rom.mlt: Same. + + * src/platform.S (hal_memc_setup_table): Fixed so it sets up SDRAM + correctly (only 256MB, though, I think - only uses banks 0 and 2). + +2000-12-01 Jesper Skov + + * src/platform.S: Initialization code. Still not working. + + * cdl/hal_mips_rm7000_ocelot.cdl: Added CPU clock and RedBoot + options. + +2000-11-30 Jesper Skov + + * src/ns16552.c: Use uncached address space. + + * Cloned from ref4955. Still stuff to clean out and stuff to add. + +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//=========================================================================== diff --git a/packages/hal/mips/rm7000/ocelot/current/cdl/hal_mips_rm7000_ocelot.cdl b/packages/hal/mips/rm7000/ocelot/current/cdl/hal_mips_rm7000_ocelot.cdl new file mode 100644 --- /dev/null +++ b/packages/hal/mips/rm7000/ocelot/current/cdl/hal_mips_rm7000_ocelot.cdl @@ -0,0 +1,390 @@ +# ==================================================================== +# +# hal_mips_rm7000_ocelot.cdl +# +# RM7000/OCELOT board HAL package configuration data +# +# ==================================================================== +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Red Hat eCos Public License +# Version 1.1 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://www.redhat.com/ +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Configurable Operating System, +# released September 30, 1998. +# +# The Initial Developer of the Original Code is Red Hat. +# Portions created by Red Hat are +# Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +# All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +# ==================================================================== +######DESCRIPTIONBEGIN#### +# +# Author(s): jskov +# Original data: bartv +# Contributors: +# Date: 2000-05-15 +# +#####DESCRIPTIONEND#### +# +# ==================================================================== + +cdl_package CYGPKG_HAL_MIPS_RM7000_OCELOT { + display "QED Ocelot board" + parent CYGPKG_HAL_MIPS + requires CYGPKG_HAL_MIPS_RM7000 + define_header hal_mips_rm7000_ocelot.h + include_dir cyg/hal + description " + The Ocelot HAL package should be used when targetting the + actual hardware." + + compile platform.S plf_misc.c plf_stub.c ns16552.c + + implements CYGINT_HAL_DEBUG_GDB_STUBS + implements CYGINT_HAL_DEBUG_GDB_STUBS_BREAK + implements CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT + + define_proc { + puts $::cdl_system_header "#define CYGBLD_HAL_TARGET_H " + puts $::cdl_system_header "#define CYGBLD_HAL_PLATFORM_H " + + puts $::cdl_header "#define CYGHWR_HAL_MIPS_WARMSTART_COLDSTART" + } + + cdl_component CYG_HAL_STARTUP { + display "Startup type" + flavor data + legal_values {"RAM" "ROM"} + default_value {"RAM"} + no_define + define -file system.h CYG_HAL_STARTUP + description " + When targetting the Ocelot board it is possible to build + the system for either RAM bootstrap or ROM bootstrap. RAM + bootstrap generally requires that the board + is equipped with ROMs containing a suitable ROM monitor or + equivalent software that allows GDB to download the eCos + application on to the board. The ROM bootstrap typically + requires that the eCos application be blown into EPROMs or + equivalent technology." + } + + cdl_option CYGHWR_HAL_MIPS_RM7000_OCELOT_ENDIAN { + display "Board endian mode" + flavor data + legal_values {"big" "little"} + default_value {"big"} + no_define + description " + The Ocelot platform can be used in either big or + little endian mode. This option select which. The board + will also need to be reconfigured if this option changes." + } + cdl_option CYGHWR_HAL_MIPS_RM7000_OCELOT_ENDIAN_SET { + display "Communicate endian setting to variant HAL" + active_if {CYGHWR_HAL_MIPS_RM7000_OCELOT_ENDIAN == "big"} + calculated 1 + implements CYGINT_HAL_MIPS_MSBFIRST + } + + cdl_option CYGHWR_HAL_MIPS_RM7000_OCELOT_PCI_MEM_MAP_BASE { + display "Base of memory accessible via PCI space" + flavor data + legal_values { 0xf200000 0xf300000 0xf400000 0xf500000 + 0xf600000 0xf700000 0xf800000 0xf900000 + 0xfa00000 0xfb00000 0xfc00000 0xfd00000 + 0xfe00000 0xff00000 + } + default_value 0x0ff00000 + active_if CYGPKG_IO_PCI + description " + This option determines the base of the Ocelot memory which + can be accessed via the PCI bus. The default is to allow + access to the upper 1MB of a 256MB system. + NB: We advise *against* changing this option. + The value MUST match the base address of the section + 'pci_window' in the Memory Layout Tool else this memory area + will be consumed by the malloc heap. + This error condition can only be detected at runtime in + current versions of the configuration tools. + CLI users can edit include/pkgconf/mlt_mips_rm7000_ocelot_*.h + and include/pkgconf/mlt_mips_rm7000_ocelot_*.ldi to achieve the + same effects as moving that region in the MLT." + } + + cdl_option CYGHWR_HAL_MIPS_RM7000_OCELOT_PCI_MEM_MAP_SIZE { + display "Size of memory accessible via PCI space" + flavor data + legal_values { 0x100000 0x200000 0x300000 0x400000 + 0x500000 0x600000 0x700000 0x800000 + } + default_value 0x00100000 + active_if CYGPKG_IO_PCI + description " + This option determines the size of the Ocelot memory which + can be accessed via the PCI bus. The default is to allow + access to the upper 1MB of a 256MB system. + NB: We advise *against* changing this option. + The value MUST match the size of the section 'pci_window' in the + Memory Layout Tool else this memory area will be consumed by the + malloc heap. + Further caveats in the PCI base option." + } + + cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS { + display "Number of communication channels on the board" + flavor data + calculated 2 + } + + cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL { + display "Debug serial port" + active_if CYGPRI_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL_CONFIGURABLE + flavor data + legal_values 0 to CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS-1 + default_value 0 + description " + The Ocelot board has two separate serial ports. This option + chooses which of these ports will be used to connect to a host + running GDB." + } + + cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL { + display "Diagnostic serial port" + active_if CYGPRI_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_CONFIGURABLE + flavor data + legal_values 0 to CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS-1 + default_value 0 + description " + The Ocelot board has two separate serial ports. This option + chooses which of these ports will be used for diagnostic output." + } + + cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_CHANNELS_DEFAULT_BAUD { + display "Default baud rate used for serial ports" + flavor data + legal_values 9600 19200 38400 115200 + default_value 38400 + description " + This option selects the baud rate used for the serial ports." + } + + # The "-o file" is a workaround for CR100958 - without it the + # output file would end up in the source directory under CygWin. + # n.b. grep does not behave itself under win32 + make -priority 1 { + /include/cyg/hal/plf_defs.inc : /src/plf_mk_defs.c + $(CC) $(CFLAGS) $(INCLUDE_PATH) -Wp,-MD,plf_defs.tmp -o plf_mk_defs.tmp -S $< + fgrep .equ plf_mk_defs.tmp | sed s/#// > $@ + @echo $@ ": \\" > $(notdir $@).deps + @tail +2 plf_defs.tmp >> $(notdir $@).deps + @echo >> $(notdir $@).deps + @rm plf_defs.tmp plf_mk_defs.tmp + } + + cdl_option CYGHWR_HAL_MIPS_RM7000_CPU_CLOCK { + display "CPU clock speed" + flavor data + legal_values { 300000000 400000000 500000000 600000000 } + default_value 300000000 + description " + The CPU clock speed in Hz." + } + + # Real-time clock/counter specifics + cdl_component CYGNUM_HAL_RTC_CONSTANTS { + display "Real-time clock constants." + flavor none + + cdl_option CYGNUM_HAL_RTC_NUMERATOR { + display "Real-time clock numerator" + flavor data + calculated 1000000000 + } + cdl_option CYGNUM_HAL_RTC_DENOMINATOR { + display "Real-time clock denominator" + flavor data + calculated 100 + } + cdl_option CYGNUM_HAL_RTC_PERIOD { + display "Real-time clock period" + flavor data + calculated { (CYGHWR_HAL_MIPS_RM7000_CPU_CLOCK / 2) / CYGNUM_HAL_RTC_DENOMINATOR } + description " + The count and compare registers of the RM7000 are used + to drive the eCos kernel RTC. The count register + increments at half the CPU clock speed." + } + } + + cdl_component CYGBLD_GLOBAL_OPTIONS { + display "Global build options" + flavor none + parent CYGPKG_NONE + description " + Global build options including control over + compiler flags, linker flags and choice of toolchain." + + + cdl_option CYGBLD_GLOBAL_COMMAND_PREFIX { + display "Global command prefix" + flavor data + no_define + default_value { "mipsisa32-elf" } +# default_value { "mips-tx49-elf" } +# default_value { "mips64vr5000-elf" } +# default_value { "mips64vr4300-elf" } + description " + This option specifies the command prefix used when + invoking the build tools." + } + + cdl_option CYGBLD_GLOBAL_CFLAGS { + display "Global compiler flags" + flavor data + no_define +# -mabi=eabi -mips2 + default_value { CYGPKG_HAL_MIPS_MSBFIRST ? "-G0 -mips32 -EB -Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef -Woverloaded-virtual -g -O2 -ffunction-sections -fdata-sections -fno-rtti -fno-exceptions -fvtable-gc -finit-priority" : "-mips2 -EL -mabi=eabi -Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef -Woverloaded-virtual -g -O2 -ffunction-sections -fdata-sections -fno-rtti -fno-exceptions -fvtable-gc -finit-priority" } + description " + This option controls the global compiler flags which + are used to compile all packages by + default. Individual packages may define + options which override these global flags." + } + + cdl_option CYGBLD_GLOBAL_LDFLAGS { + display "Global linker flags" + flavor data + no_define +# -mabi=eabi -mips2 + default_value { CYGPKG_HAL_MIPS_MSBFIRST ? "-G0 -g -mips32 -EB -nostdlib -Wl,--gc-sections -Wl,-static" : "-g -mips2 -EL -mabi=eabi -nostdlib -Wl,--gc-sections -Wl,-static" } + description " + This option controls the global linker flags. Individual + packages may define options which override these global flags." + } + + cdl_option CYGBLD_BUILD_GDB_STUBS { + display "Build GDB stub ROM image" + default_value 0 + requires { CYG_HAL_STARTUP == "ROM" } + requires CYGSEM_HAL_ROM_MONITOR + requires CYGBLD_BUILD_COMMON_GDB_STUBS + requires CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + requires CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT + requires ! CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT + requires CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT + requires ! CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT + requires ! CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM + no_define + description " + This option enables the building of the GDB stubs for the + board. The common HAL controls takes care of most of the + build process, but the final conversion from ELF image to + SREC data is handled by the platform CDL, allowing + relocation of the data if necessary." + + make -priority 320 { + /bin/gdb_module.srec : /bin/gdb_module.img + $(OBJCOPY) --strip-unneeded -O srec $< pre-swap.srec + $(OBJCOPY) --change-address 0xbfc00000 -I binary -O srec be.bin $@ + } + } + } + + cdl_component CYGHWR_MEMORY_LAYOUT { + display "Memory layout" + flavor data + no_define + calculated { CYG_HAL_STARTUP == "RAM" ? "mips_rm7000_ocelot_ram" : \ + "mips_rm7000_ocelot_rom" } + + cdl_option CYGHWR_MEMORY_LAYOUT_LDI { + display "Memory layout linker script fragment" + flavor data + no_define + define -file system.h CYGHWR_MEMORY_LAYOUT_LDI + calculated { CYG_HAL_STARTUP == "RAM" ? "" : \ + "" } + } + + cdl_option CYGHWR_MEMORY_LAYOUT_H { + display "Memory layout header file" + flavor data + no_define + define -file system.h CYGHWR_MEMORY_LAYOUT_H + calculated { CYG_HAL_STARTUP == "RAM" ? "" : \ + "" } + } + } + + cdl_option CYGSEM_HAL_USE_ROM_MONITOR { + display "Work with a ROM monitor" + flavor booldata + legal_values { "GDB_stubs" } + default_value { CYG_HAL_STARTUP == "RAM" ? "GDB_stubs" : 0 } + parent CYGPKG_HAL_ROM_MONITOR + requires { CYG_HAL_STARTUP == "RAM" } + description " + Support can be enabled for GDB stubs. + This support changes various eCos semantics such as the encoding + of diagnostic output, or the overriding of hardware interrupt + vectors. + \"GDB_stubs\" provides support when GDB stubs are + included in the ROM monitor or boot ROM, allowing debugging + via GDB." + } + + cdl_option CYGSEM_HAL_ROM_MONITOR { + display "Behave as a ROM monitor" + flavor bool + default_value 0 + parent CYGPKG_HAL_ROM_MONITOR + requires { CYG_HAL_STARTUP == "ROM" } + description " + Enable this option if this program is to be used as a ROM monitor, + i.e. applications will be loaded into RAM on the board, and this + ROM monitor may process exceptions or interrupts generated from the + application. This enables features such as utilizing a separate + interrupt stack when exceptions are generated." + } + + cdl_component CYGPKG_REDBOOT_HAL_OPTIONS { + display "Redboot HAL options" + flavor none + no_define + parent CYGPKG_REDBOOT + active_if CYGPKG_REDBOOT + description " + This option lists the target's requirements for a valid Redboot + configuration." + + cdl_option CYGBLD_BUILD_REDBOOT_BIN { + display "Build Redboot ROM binary image" + active_if CYGBLD_BUILD_REDBOOT + default_value 1 + no_define + description "This option enables the conversion of the Redboot ELF + image to the various relocated SREC images needed + for flash updating." + + make -priority 325 { + /bin/redboot.bin : /bin/redboot.elf + $(OBJCOPY) --strip-unneeded $< $(@:.bin=.img) + $(OBJCOPY) -O srec $(@:.bin=.img) $(@:.bin=.srec) + $(OBJCOPY) -O binary $(@:.bin=.img) $@ + } + } + } +} diff --git a/packages/hal/mips/rm7000/ocelot/current/include/hal_diag.h b/packages/hal/mips/rm7000/ocelot/current/include/hal_diag.h new file mode 100644 --- /dev/null +++ b/packages/hal/mips/rm7000/ocelot/current/include/hal_diag.h @@ -0,0 +1,83 @@ +#ifndef CYGONCE_HAL_HAL_DIAG_H +#define CYGONCE_HAL_HAL_DIAG_H + +//============================================================================= +// +// hal_diag.h +// +// HAL Support for Kernel Diagnostic Routines +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jskov +// Contributors:jskov, nickg +// Date: 2000-05-15 +// Purpose: HAL Support for Kernel Diagnostic Routines +// Description: Diagnostic routines for use during kernel development. +// Usage: #include +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include + +#include + +#if defined(CYGSEM_HAL_VIRTUAL_VECTOR_DIAG) + +#include + +#define HAL_DIAG_INIT() hal_if_diag_init() +#define HAL_DIAG_WRITE_CHAR(_c_) hal_if_diag_write_char(_c_) +#define HAL_DIAG_READ_CHAR(_c_) hal_if_diag_read_char(&_c_) + +#else // everything by steam + +//----------------------------------------------------------------------------- +// functions implemented in hal_diag.c + +externC void hal_diag_init(void); + +externC void hal_diag_write_char(char c); + +externC void hal_diag_read_char(char *c); + +//----------------------------------------------------------------------------- + +#define HAL_DIAG_INIT() hal_diag_init() + +#define HAL_DIAG_WRITE_CHAR(_c_) hal_diag_write_char(_c_) + +#define HAL_DIAG_READ_CHAR(_c_) hal_diag_read_char(&_c_) + +#endif // CYGSEM_HAL_VIRTUAL_VECTOR_DIAG + +//----------------------------------------------------------------------------- +// end of hal_diag.h +#endif // CYGONCE_HAL_HAL_DIAG_H diff --git a/packages/hal/mips/rm7000/ocelot/current/include/pkgconf/mlt_mips_rm7000_ocelot_ram.h b/packages/hal/mips/rm7000/ocelot/current/include/pkgconf/mlt_mips_rm7000_ocelot_ram.h new file mode 100644 --- /dev/null +++ b/packages/hal/mips/rm7000/ocelot/current/include/pkgconf/mlt_mips_rm7000_ocelot_ram.h @@ -0,0 +1,42 @@ +// eCos memory layout - Fri Jan 19 11:27:35 2001 + +// This is a generated file - do not edit + +#ifndef __ASSEMBLER__ +#include +#include + +#endif +#define CYGMEM_REGION_ram (0x80000000) +#define CYGMEM_REGION_ram_SIZE (0x10000000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__reserved_vectors) []; +#endif +#define CYGMEM_SECTION_reserved_vectors (CYG_LABEL_NAME (__reserved_vectors)) +#define CYGMEM_SECTION_reserved_vectors_SIZE (0x200) +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__reserved_vsr_table) []; +#endif +#define CYGMEM_SECTION_reserved_vsr_table (CYG_LABEL_NAME (__reserved_vsr_table)) +#define CYGMEM_SECTION_reserved_vsr_table_SIZE (0x100) +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__reserved_virtual_table) []; +#endif +#define CYGMEM_SECTION_reserved_virtual_table (CYG_LABEL_NAME (__reserved_virtual_table)) +#define CYGMEM_SECTION_reserved_virtual_table_SIZE (0x100) +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__reserved_for_rom) []; +#endif +#define CYGMEM_SECTION_reserved_for_rom (CYG_LABEL_NAME (__reserved_for_rom)) +#define CYGMEM_SECTION_reserved_for_rom_SIZE (0x1fc00) +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__heap1) []; +#endif +#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1)) +#define CYGMEM_SECTION_heap1_SIZE (0x8ff00000 - (size_t) CYG_LABEL_NAME (__heap1)) +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__pci_window) []; +#endif +#define CYGMEM_SECTION_pci_window (CYG_LABEL_NAME (__pci_window)) +#define CYGMEM_SECTION_pci_window_SIZE (0x100000) diff --git a/packages/hal/mips/rm7000/ocelot/current/include/pkgconf/mlt_mips_rm7000_ocelot_ram.ldi b/packages/hal/mips/rm7000/ocelot/current/include/pkgconf/mlt_mips_rm7000_ocelot_ram.ldi new file mode 100644 --- /dev/null +++ b/packages/hal/mips/rm7000/ocelot/current/include/pkgconf/mlt_mips_rm7000_ocelot_ram.ldi @@ -0,0 +1,44 @@ +// eCos memory layout - Fri Jan 19 11:27:35 2001 + +// This is a generated file - do not edit + +#include + +MEMORY +{ + ram : ORIGIN = 0x80000000, LENGTH = 0x10000000 +} + +SECTIONS +{ + SECTIONS_BEGIN + CYG_LABEL_DEFN(__reserved_vectors) = 0x80000000; . = CYG_LABEL_DEFN(__reserved_vectors) + 0x200; + CYG_LABEL_DEFN(__reserved_vsr_table) = ALIGN (0x10); . = CYG_LABEL_DEFN(__reserved_vsr_table) + 0x100; + CYG_LABEL_DEFN(__reserved_virtual_table) = ALIGN (0x10); . = CYG_LABEL_DEFN(__reserved_virtual_table) + 0x100; + CYG_LABEL_DEFN(__reserved_for_rom) = ALIGN (0x10); . = CYG_LABEL_DEFN(__reserved_for_rom) + 0x1fc00; + SECTION_rom_vectors (ram, ALIGN (0x10), LMA_EQ_VMA) + SECTION_ROMISC (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_RELOCS (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_init (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_text (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fini (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_rodata (ram, ALIGN (0x8), LMA_EQ_VMA) + SECTION_rodata1 (ram, ALIGN (0x8), LMA_EQ_VMA) + SECTION_data (ram, ALIGN (0x8), LMA_EQ_VMA) + SECTION_data1 (ram, ALIGN (0x8), LMA_EQ_VMA) + SECTION_eh_frame (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_gcc_except_table (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_ctors (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_dtors (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_devtab (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_got (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_dynamic (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_sdata (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_lit8 (ram, ALIGN (0x8), LMA_EQ_VMA) + SECTION_lit4 (ram, ALIGN (0x8), LMA_EQ_VMA) + SECTION_sbss (ram, ALIGN (0x8), LMA_EQ_VMA) + SECTION_bss (ram, ALIGN (0x8), LMA_EQ_VMA) + CYG_LABEL_DEFN(__heap1) = ALIGN (0x8); + CYG_LABEL_DEFN(__pci_window) = 0x8ff00000; . = CYG_LABEL_DEFN(__pci_window) + 0x100000; + SECTIONS_END +} diff --git a/packages/hal/mips/rm7000/ocelot/current/include/pkgconf/mlt_mips_rm7000_ocelot_ram.mlt b/packages/hal/mips/rm7000/ocelot/current/include/pkgconf/mlt_mips_rm7000_ocelot_ram.mlt new file mode 100644 --- /dev/null +++ b/packages/hal/mips/rm7000/ocelot/current/include/pkgconf/mlt_mips_rm7000_ocelot_ram.mlt @@ -0,0 +1,30 @@ +version 0 +region ram 80000000 10000000 0 ! +section reserved_vectors 200 1 0 0 1 1 1 1 80000000 80000000 reserved_vsr_table reserved_vsr_table ! +section reserved_vsr_table 100 10 0 0 0 1 0 1 reserved_virtual_table reserved_virtual_table ! +section reserved_virtual_table 100 10 0 0 0 1 0 1 reserved_for_rom reserved_for_rom ! +section reserved_for_rom 1fc00 10 0 0 0 1 0 1 rom_vectors rom_vectors ! +section rom_vectors 0 10 0 1 0 1 0 1 ROMISC ROMISC ! +section ROMISC 0 4 0 1 0 1 0 1 RELOCS RELOCS ! +section RELOCS 0 4 0 1 0 1 0 1 init init ! +section init 0 4 0 1 0 1 0 1 text text ! +section text 0 4 0 1 0 1 0 1 fini fini ! +section fini 0 4 0 1 0 1 0 1 rodata rodata ! +section rodata 0 8 0 1 0 1 0 1 rodata1 rodata1 ! +section rodata1 0 8 0 1 0 1 0 1 data data ! +section data 0 8 0 1 0 1 0 1 data1 data1 ! +section data1 0 8 0 1 0 1 0 1 eh_frame eh_frame ! +section eh_frame 0 4 0 1 0 1 0 1 gcc_except_table gcc_except_table ! +section gcc_except_table 0 4 0 1 0 1 0 1 ctors ctors ! +section ctors 0 4 0 1 0 1 0 1 dtors dtors ! +section dtors 0 4 0 1 0 1 0 1 devtab devtab ! +section devtab 0 4 0 1 0 1 0 1 got got ! +section got 0 4 0 1 0 1 0 1 dynamic dynamic ! +section dynamic 0 4 0 1 0 1 0 1 sdata sdata ! +section sdata 0 4 0 1 0 1 0 1 lit8 lit8 ! +section lit8 0 8 0 1 0 1 0 1 lit4 lit4 ! +section lit4 0 8 0 1 0 1 0 1 sbss sbss ! +section sbss 0 8 0 1 0 1 0 1 bss bss ! +section bss 0 8 0 1 0 1 0 1 heap1 heap1 ! +section heap1 0 8 0 0 0 0 0 0 ! +section pci_window 100000 1 0 0 1 0 1 0 8ff00000 8ff00000 ! diff --git a/packages/hal/mips/rm7000/ocelot/current/include/pkgconf/mlt_mips_rm7000_ocelot_rom.h b/packages/hal/mips/rm7000/ocelot/current/include/pkgconf/mlt_mips_rm7000_ocelot_rom.h new file mode 100644 --- /dev/null +++ b/packages/hal/mips/rm7000/ocelot/current/include/pkgconf/mlt_mips_rm7000_ocelot_rom.h @@ -0,0 +1,40 @@ +// eCos memory layout - Fri Jan 19 11:28:42 2001 + +// This is a generated file - do not edit + +#ifndef __ASSEMBLER__ +#include +#include + +#endif +#define CYGMEM_REGION_ram (0x80000000) +#define CYGMEM_REGION_ram_SIZE (0x10000000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) +#define CYGMEM_REGION_rom (0xbfc00000) +#define CYGMEM_REGION_rom_SIZE (0x80000) +#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R) +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__reserved_vectors) []; +#endif +#define CYGMEM_SECTION_reserved_vectors (CYG_LABEL_NAME (__reserved_vectors)) +#define CYGMEM_SECTION_reserved_vectors_SIZE (0x200) +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__reserved_vsr_table) []; +#endif +#define CYGMEM_SECTION_reserved_vsr_table (CYG_LABEL_NAME (__reserved_vsr_table)) +#define CYGMEM_SECTION_reserved_vsr_table_SIZE (0x100) +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__reserved_virtual_table) []; +#endif +#define CYGMEM_SECTION_reserved_virtual_table (CYG_LABEL_NAME (__reserved_virtual_table)) +#define CYGMEM_SECTION_reserved_virtual_table_SIZE (0x100) +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__heap1) []; +#endif +#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1)) +#define CYGMEM_SECTION_heap1_SIZE (0x8ff00000 - (size_t) CYG_LABEL_NAME (__heap1)) +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__pci_window) []; +#endif +#define CYGMEM_SECTION_pci_window (CYG_LABEL_NAME (__pci_window)) +#define CYGMEM_SECTION_pci_window_SIZE (0x100000) diff --git a/packages/hal/mips/rm7000/ocelot/current/include/pkgconf/mlt_mips_rm7000_ocelot_rom.ldi b/packages/hal/mips/rm7000/ocelot/current/include/pkgconf/mlt_mips_rm7000_ocelot_rom.ldi new file mode 100644 --- /dev/null +++ b/packages/hal/mips/rm7000/ocelot/current/include/pkgconf/mlt_mips_rm7000_ocelot_rom.ldi @@ -0,0 +1,44 @@ +// eCos memory layout - Fri Jan 19 11:28:42 2001 + +// This is a generated file - do not edit + +#include + +MEMORY +{ + ram : ORIGIN = 0x80000000, LENGTH = 0x10000000 + rom : ORIGIN = 0xbfc00000, LENGTH = 0x80000 +} + +SECTIONS +{ + SECTIONS_BEGIN + SECTION_rom_vectors (rom, 0xbfc00000, LMA_EQ_VMA) + SECTION_ROMISC (rom, ALIGN (0x8), LMA_EQ_VMA) + SECTION_RELOCS (rom, ALIGN (0x8), LMA_EQ_VMA) + SECTION_init (rom, ALIGN (0x8), LMA_EQ_VMA) + SECTION_text (rom, ALIGN (0x8), LMA_EQ_VMA) + SECTION_fini (rom, ALIGN (0x8), LMA_EQ_VMA) + SECTION_rodata (rom, ALIGN (0x8), LMA_EQ_VMA) + SECTION_rodata1 (rom, ALIGN (0x8), LMA_EQ_VMA) + CYG_LABEL_DEFN(__reserved_vectors) = 0x80000000; . = CYG_LABEL_DEFN(__reserved_vectors) + 0x200; + CYG_LABEL_DEFN(__reserved_vsr_table) = ALIGN (0x10); . = CYG_LABEL_DEFN(__reserved_vsr_table) + 0x100; + CYG_LABEL_DEFN(__reserved_virtual_table) = ALIGN (0x10); . = CYG_LABEL_DEFN(__reserved_virtual_table) + 0x100; + SECTION_data (ram, ALIGN (0x10), FOLLOWING (.rodata1)) + SECTION_data1 (ram, ALIGN (0x8), FOLLOWING (.data)) + SECTION_eh_frame (ram, ALIGN (0x8), FOLLOWING (.data1)) + SECTION_gcc_except_table (ram, ALIGN (0x8), FOLLOWING (.eh_frame)) + SECTION_ctors (ram, ALIGN (0x8), FOLLOWING (.gcc_except_table)) + SECTION_dtors (ram, ALIGN (0x8), FOLLOWING (.ctors)) + SECTION_devtab (ram, ALIGN (0x8), FOLLOWING (.dtors)) + SECTION_got (ram, ALIGN (0x8), FOLLOWING (.devtab)) + SECTION_dynamic (ram, ALIGN (0x8), FOLLOWING (.got)) + SECTION_sdata (ram, ALIGN (0x8), FOLLOWING (.dynamic)) + SECTION_lit8 (ram, ALIGN (0x8), FOLLOWING (.sdata)) + SECTION_lit4 (ram, ALIGN (0x8), FOLLOWING (.lit8)) + SECTION_sbss (ram, ALIGN (0x8), LMA_EQ_VMA) + SECTION_bss (ram, ALIGN (0x8), LMA_EQ_VMA) + CYG_LABEL_DEFN(__heap1) = ALIGN (0x8); + CYG_LABEL_DEFN(__pci_window) = 0x8ff00000; . = CYG_LABEL_DEFN(__pci_window) + 0x100000; + SECTIONS_END +} diff --git a/packages/hal/mips/rm7000/ocelot/current/include/pkgconf/mlt_mips_rm7000_ocelot_rom.mlt b/packages/hal/mips/rm7000/ocelot/current/include/pkgconf/mlt_mips_rm7000_ocelot_rom.mlt new file mode 100644 --- /dev/null +++ b/packages/hal/mips/rm7000/ocelot/current/include/pkgconf/mlt_mips_rm7000_ocelot_rom.mlt @@ -0,0 +1,30 @@ +version 0 +region ram 80000000 10000000 0 ! +region rom bfc00000 80000 1 ! +section reserved_vectors 200 1 0 0 1 1 1 1 80000000 80000000 reserved_vsr_table reserved_vsr_table ! +section reserved_vsr_table 100 10 0 0 0 1 0 1 reserved_virtual_table reserved_virtual_table ! +section reserved_virtual_table 100 10 0 0 0 1 0 0 data ! +section data 0 10 1 1 0 1 0 1 data1 data1 ! +section data1 0 8 1 1 0 1 0 1 eh_frame eh_frame ! +section eh_frame 0 8 1 1 0 1 0 1 gcc_except_table gcc_except_table ! +section gcc_except_table 0 8 1 1 0 1 0 1 ctors ctors ! +section ctors 0 8 1 1 0 1 0 1 dtors dtors ! +section dtors 0 8 1 1 0 1 0 1 devtab devtab ! +section devtab 0 8 1 1 0 1 0 1 got got ! +section got 0 8 1 1 0 1 0 1 dynamic dynamic ! +section dynamic 0 8 1 1 0 1 0 1 sdata sdata ! +section sdata 0 8 1 1 0 1 0 1 lit8 lit8 ! +section lit8 0 8 1 1 0 1 0 1 lit4 lit4 ! +section lit4 0 8 1 1 0 1 0 0 sbss ! +section sbss 0 8 0 1 0 1 0 1 bss bss ! +section bss 0 8 0 1 0 1 0 1 heap1 heap1 ! +section heap1 0 8 0 0 0 0 0 0 ! +section pci_window 100000 1 0 0 1 0 1 0 8ff00000 8ff00000 ! +section rom_vectors 0 1 0 1 1 1 1 1 bfc00000 bfc00000 ROMISC ROMISC ! +section ROMISC 0 8 0 1 0 1 0 1 RELOCS RELOCS ! +section RELOCS 0 8 0 1 0 1 0 1 init init ! +section init 0 8 0 1 0 1 0 1 text text ! +section text 0 8 0 1 0 1 0 1 fini fini ! +section fini 0 8 0 1 0 1 0 1 rodata rodata ! +section rodata 0 8 0 1 0 1 0 1 rodata1 rodata1 ! +section rodata1 0 8 0 1 0 0 0 1 data ! diff --git a/packages/hal/mips/rm7000/ocelot/current/include/platform.inc b/packages/hal/mips/rm7000/ocelot/current/include/platform.inc new file mode 100644 --- /dev/null +++ b/packages/hal/mips/rm7000/ocelot/current/include/platform.inc @@ -0,0 +1,226 @@ +#ifndef CYGONCE_HAL_PLATFORM_INC +#define CYGONCE_HAL_PLATFORM_INC +##============================================================================= +## +## platform.inc +## +## Ocelot board assembler header file +## +##============================================================================= +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Red Hat eCos Public License +# Version 1.1 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://www.redhat.com/ +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Configurable Operating System, +# released September 30, 1998. +# +# The Initial Developer of the Original Code is Red Hat. +# Portions created by Red Hat are +# Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +# All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +##============================================================================= +#######DESCRIPTIONBEGIN#### +## +## Author(s): nickg +## Contributors:nickg,jskov +## Date: 2000-05-15 +## Purpose: Ocelot board definitions. +## Description: This file contains various definitions and macros that are +## useful for writing assembly code for the Ocelot board. +## Usage: +## #include +## ... +## +## +######DESCRIPTIONEND#### +## +##============================================================================= + +#include +#include + + +#------------------------------------------------------------------------------ +# Macro for copying vectors to RAM if necessary. +#if !defined(CYGSEM_HAL_USE_ROM_MONITOR) + + .macro hal_vectors_init + # If we don~t play nice with a ROM monitor, copy the required + # vectors into the proper location. + la t0,0x80000000 # dest addr + la t1,utlb_vector # source addr + la t3,utlb_vector_end # end dest addr +1: + lw v0,0(t1) # get word + addi t1,t1,4 + sw v0,0(t0) # write word + addi t0,t0,4 + bne t1,t3,1b + nop + + la t0,0x80000180 # dest addr + la t1,other_vector # source addr + la t3,other_vector_end # end dest addr +1: + lw v0,0(t1) # get word + addi t1,t1,4 + sw v0,0(t0) # write word + addi t0,t0,4 + bne t1,t3,1b + nop + + .set mips3 # Set ISA to MIPS 3 to allow cache insns + # Now clear the region in the caches + la t0,0x80000000 # dest addr + ori t1,t0,0x200 # source addr +1: cache 0x01,0x0000(t0) # Flush word from data cache + cache 0x01,0x1000(t0) + cache 0x01,0x2000(t0) + cache 0x01,0x3000(t0) + nop + cache 0x00,0x0000(t0) # Invalidate icache for word + cache 0x00,0x1000(t0) + cache 0x00,0x2000(t0) + cache 0x00,0x3000(t0) + nop + addi t0,t0,0x20 + bne t0,t1,1b + nop + .set mips0 # reset ISA to default + + .endm + +#else + + .macro hal_vectors_init + .endm + +#endif + +#------------------------------------------------------------------------------ +# Monitor initialization. + +#ifndef CYGPKG_HAL_MIPS_MON_DEFINED + +#if defined(CYG_HAL_STARTUP_ROM) || \ + ( defined(CYG_HAL_STARTUP_RAM) && \ + !defined(CYGSEM_HAL_USE_ROM_MONITOR)) + + # If we are starting up from ROM, or we are starting in + # RAM and NOT using a ROM monitor, initialize the VSR table. + + .macro hal_mon_init + hal_vectors_init + # Set default exception VSR for all vectors + ori a0,zero,CYGNUM_HAL_VSR_COUNT + la a1,__default_exception_vsr + la a2,hal_vsr_table +1: sw a1,0(a2) + addi a2,a2,4 + addi a0,a0,-1 + bne a0,zero,1b + nop + + # Now set special VSRs + la a0,hal_vsr_table + # Set interrupt VSR + la a1,__default_interrupt_vsr + sw a1,CYGNUM_HAL_VECTOR_INTERRUPT*4(a0) + # Add special handler on breakpoint vector to allow GDB and + # GCC to both use 'break' without conflicts. + la a1,__break_vsr_springboard + sw a1,CYGNUM_HAL_VECTOR_BREAKPOINT*4(a0) + # Set exception handler on special vectors + # FIXME: Should use proper definitions + la a1,__default_exception_vsr + sw a1,32*4(a0) # debug + sw a1,33*4(a0) # utlb + sw a1,34*4(a0) # nmi + .endm + +#elif defined(CYG_HAL_STARTUP_RAM) && defined(CYGSEM_HAL_USE_ROM_MONITOR) + + # Initialize the VSR table entries + # We only take control of the interrupt vector, + # the rest are left to the ROM for now... + + .macro hal_mon_init + hal_vectors_init + # Set interrupt VSR + la a0,hal_vsr_table + la a1,__default_interrupt_vsr + sw a1,CYGNUM_HAL_VECTOR_INTERRUPT*4(a0) + .endm + +#else + + .macro hal_mon_init + hal_vectors_init + .endm + +#endif + +#define CYGPKG_HAL_MIPS_MON_DEFINED +#endif + +#------------------------------------------------------------------------------ + +#if !defined(CYG_HAL_STARTUP_RAM) + .macro hal_memc_init + // Only initialize the SDRAM controller when running in ROM + .extern hal_memc_setup + lar t0,hal_memc_setup + jalr t0 + nop + + // FIXME: Clear reset status byte + .endm +#define CYGPKG_HAL_MIPS_MEMC_DEFINED +#endif + +#------------------------------------------------------------------------------ +# Decide whether the VSR table is defined externally, or is to be defined +# here. + +## ISR tables are defined in platform.S +#define CYG_HAL_MIPS_ISR_TABLES_DEFINED + +## VSR table is at a fixed RAM address defined by the linker script +#define CYG_HAL_MIPS_VSR_TABLE_DEFINED + +##----------------------------------------------------------------------------- +#ifdef CYG_STARTUP_ROM + +## Initial SR value for use in ROM: +## CP0 usable +## Vectors in RAM +## FP registers are 32 bit +## All hw ints disabled +#define INITIAL_SR 0x30000000 + +#else + +## Initial SR value for use standalone: +## CP0 usable +## Vectors to RAM +## FP registers are 32 bit +## All hw ints disabled +#define INITIAL_SR 0x30000000 + +#endif + +#------------------------------------------------------------------------------ +#endif // ifndef CYGONCE_HAL_PLATFORM_INC +# end of platform.inc diff --git a/packages/hal/mips/rm7000/ocelot/current/include/plf_cache.h b/packages/hal/mips/rm7000/ocelot/current/include/plf_cache.h new file mode 100644 --- /dev/null +++ b/packages/hal/mips/rm7000/ocelot/current/include/plf_cache.h @@ -0,0 +1,55 @@ +#ifndef CYGONCE_PLF_CACHE_H +#define CYGONCE_PLF_CACHE_H + +//============================================================================= +// +// plf_cache.h +// +// HAL cache control API +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg +// Contributors:nickg +// Date: 1998-02-17 +// Purpose: Cache control API +// Description: The macros defined here provide the HAL APIs for handling +// cache control operations. +// Usage: +// #include +// ... +// +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +//----------------------------------------------------------------------------- +#endif // ifndef CYGONCE_PLF_CACHE_H +// End of plf_cache.h + diff --git a/packages/hal/mips/rm7000/ocelot/current/include/plf_intr.h b/packages/hal/mips/rm7000/ocelot/current/include/plf_intr.h new file mode 100644 --- /dev/null +++ b/packages/hal/mips/rm7000/ocelot/current/include/plf_intr.h @@ -0,0 +1,221 @@ +#ifndef CYGONCE_HAL_PLF_INTR_H +#define CYGONCE_HAL_PLF_INTR_H + +//========================================================================== +// +// plf_intr.h +// +// Ocelot Interrupt and clock support +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jskov +// Contributors: jskov, nickg +// Date: 2000-05-09 +// Purpose: Define Interrupt support +// Description: The macros defined here provide the HAL APIs for handling +// interrupts and the clock for the REF4955 board. +// +// Usage: +// #include +// ... +// +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include + +#include + +//-------------------------------------------------------------------------- +// Interrupt vectors. + +#ifndef CYGHWR_HAL_INTERRUPT_VECTORS_DEFINED + +// The first 10 correspond to the interrupt lines in the status/cause regs +#define CYGNUM_HAL_INTERRUPT_ETH0 0 +#define CYGNUM_HAL_INTERRUPT_ETH1 1 +#define CYGNUM_HAL_INTERRUPT_UART1 2 +#define CYGNUM_HAL_INTERRUPT_21555 3 +#define CYGNUM_HAL_INTERRUPT_GALILEO 4 +#define CYGNUM_HAL_INTERRUPT_COMPARE 5 +#define CYGNUM_HAL_INTERRUPT_PMC1 6 +#define CYGNUM_HAL_INTERRUPT_PMC2 7 +#define CYGNUM_HAL_INTERRUPT_CPCI 8 +#define CYGNUM_HAL_INTERRUPT_UART2 9 + +// PCI interrupts are hardwired for the devices connected to the bus +#define CYGNUM_HAL_INTERRUPT_PCI_INTA CYGNUM_HAL_INTERRUPT_GALILEO +#define CYGNUM_HAL_INTERRUPT_PCI_INTB CYGNUM_HAL_INTERRUPT_ETH0 +#define CYGNUM_HAL_INTERRUPT_PCI_INTC CYGNUM_HAL_INTERRUPT_GALILEO +#define CYGNUM_HAL_INTERRUPT_PCI_INTD CYGNUM_HAL_INTERRUPT_GALILEO + +// Min/Max ISR numbers and how many there are +#define CYGNUM_HAL_ISR_MIN CYGNUM_HAL_INTERRUPT_ETH0 +#define CYGNUM_HAL_ISR_MAX CYGNUM_HAL_INTERRUPT_UART2 +#define CYGNUM_HAL_ISR_COUNT (CYGNUM_HAL_ISR_MAX - CYGNUM_HAL_ISR_MIN + 1) + +// The vector used by the Real time clock +#define CYGNUM_HAL_INTERRUPT_RTC CYGNUM_HAL_INTERRUPT_COMPARE + +#define CYGHWR_HAL_INTERRUPT_VECTORS_DEFINED + +#endif + +//-------------------------------------------------------------------------- +// Interrupt controler information + +// V320USC +#define CYGARC_REG_INT_STAT 0xb80000ec + +#define CYGARC_REG_INT_CFG0 0xb80000e0 +#define CYGARC_REG_INT_CFG1 0xb80000e4 +#define CYGARC_REG_INT_CFG2 0xb80000e8 +#define CYGARC_REG_INT_CFG3 0xb8000158 + +#define CYGARC_REG_INT_CFG_INT0 0x00000100 +#define CYGARC_REG_INT_CFG_INT1 0x00000200 +#define CYGARC_REG_INT_CFG_INT2 0x00000400 +#define CYGARC_REG_INT_CFG_INT3 0x00000800 + + +// FPGA +#define CYGARC_REG_PCI_STAT 0xb5300000 +#define CYGARC_REG_PCI_MASK 0xb5300030 + +#define CYGARC_REG_IO_STAT 0xb5300010 +#define CYGARC_REG_IO_MASK 0xb5300040 + + +#define HAL_INTERRUPT_MASK( _vector_ ) \ + CYG_MACRO_START \ + if( (_vector_) <= CYGNUM_HAL_INTERRUPT_COMPARE ) \ + { \ + asm volatile ( \ + "mfc0 $3,$12\n" \ + "la $2,0x00000400\n" \ + "sllv $2,$2,%0\n" \ + "nor $2,$2,$0\n" \ + "and $3,$3,$2\n" \ + "mtc0 $3,$12\n" \ + "nop; nop; nop\n" \ + : \ + : "r"(_vector_) \ + : "$2", "$3" \ + ); \ + } \ + else if ((_vector_) >= CYGNUM_HAL_INTERRUPT_UART2) \ + { \ + /* int 6:9 are masked in the Interrupt Control register */ \ + asm volatile ( \ + "mfc1 $3,$20\n" \ + "la $2,0x00000100\n" \ + "sllv $2,$2,%0\n" \ + "nor $2,$2,$0\n" \ + "and $3,$3,$2\n" \ + "mtc1 $3,$20\n" \ + "nop; nop; nop\n" \ + : \ + : "r"((_vector_) - CYGNUM_HAL_INTERRUPT_PMC1) \ + : "$2", "$3" \ + ); \ + } \ + CYG_MACRO_END + +#define HAL_INTERRUPT_UNMASK( _vector_ ) \ + CYG_MACRO_START \ + if( (_vector_) <= CYGNUM_HAL_INTERRUPT_COMPARE ) \ + { \ + asm volatile ( \ + "mfc0 $3,$12\n" \ + "la $2,0x00000400\n" \ + "sllv $2,$2,%0\n" \ + "or $3,$3,$2\n" \ + "mtc0 $3,$12\n" \ + "nop; nop; nop\n" \ + : \ + : "r"(_vector_) \ + : "$2", "$3" \ + ); \ + } \ + else if ((_vector_) >= CYGNUM_HAL_INTERRUPT_UART2) \ + { \ + /* int 6:9 are masked in the Interrupt Control register */ \ + asm volatile ( \ + "mfc1 $3,$20\n" \ + "la $2,0x00000100\n" \ + "sllv $2,$2,%0\n" \ + "or $3,$3,$2\n" \ + "mtc1 $3,$20\n" \ + "nop; nop; nop\n" \ + : \ + : "r"((_vector_) - CYGNUM_HAL_INTERRUPT_PMC1) \ + : "$2", "$3" \ + ); \ + } \ + CYG_MACRO_END + +#define HAL_INTERRUPT_ACKNOWLEDGE( _vector_ ) \ + CYG_MACRO_START \ + /* All 10 interrupts have pending bits in the cause register */ \ + cyg_uint32 _srvector_ = _vector_; \ + asm volatile ( \ + "mfc0 $3,$13\n" \ + "la $2,0x00000400\n" \ + "sllv $2,$2,%0\n" \ + "nor $2,$2,$0\n" \ + "and $3,$3,$2\n" \ + "mtc0 $3,$13\n" \ + "nop; nop; nop\n" \ + : \ + : "r"(_srvector_) \ + : "$2", "$3" \ + ); \ + CYG_MACRO_END + +#define HAL_INTERRUPT_CONFIGURE( _vector_, _level_, _up_ ) + +#define HAL_INTERRUPT_SET_LEVEL( _vector_, _level_ ) + +#define CYGHWR_HAL_INTERRUPT_CONTROLLER_ACCESS_DEFINED + + +//---------------------------------------------------------------------------- +// Reset. +// Uses Secondary Reset Bit in 21555. Don't know where it is mapped though. +#define CYGARC_REG_BOARD_RESET 0x???????? + +#define HAL_PLATFORM_RESET() /* HAL_WRITE_UINT8(CYGARC_REG_BOARD_RESET,1) */ + +#define HAL_PLATFORM_RESET_ENTRY 0xbfc00000 + +//-------------------------------------------------------------------------- +#endif // ifndef CYGONCE_HAL_PLF_INTR_H +// End of plf_intr.h diff --git a/packages/hal/mips/rm7000/ocelot/current/include/plf_io.h b/packages/hal/mips/rm7000/ocelot/current/include/plf_io.h new file mode 100644 --- /dev/null +++ b/packages/hal/mips/rm7000/ocelot/current/include/plf_io.h @@ -0,0 +1,347 @@ +#ifndef CYGONCE_PLF_IO_H +#define CYGONCE_PLF_IO_H + +//============================================================================= +// +// plf_io.h +// +// Platform specific IO support +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): hmt, jskov, nickg +// Contributors: hmt, jskov, nickg +// Date: 1999-08-09 +// Purpose: Ocelot/Galileo GT-64120A PCI IO support macros +// Description: +// Usage: #include +// +// Note: Based on information in +// "Galileo GT 64120A System Controller For +// RC4650/4700/5000 and RM526X/527X/7000 CPUs" +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include + +#include // address macros +#include // IO macros +#include // Interrupt vectors + +//----------------------------------------------------------------------------- +// PCI access registers + +//#define HAL_PCI_ADDRESS_WINDOW_1 0xAF000014 +//#define HAL_PCI_ADDRESS_WINDOW_2 0xAF000018 +//#define HAL_PCI_IO_WINDOW 0xAF000024 +#define HAL_PCI_CONFIG_SPACE_DATA 0xb4000cfc +#define HAL_PCI_CONFIG_SPACE_ADDR 0xb4000cf8 +//#define HAL_PCI_ENABLE_REG 0xAF000074 + +//----------------------------------------------------------------------------- +// Mappings for PCI memory and IO spaces + +// These are the offsets programmed into the Galileo for setting up the +// CPU->PCI space mapping. These are put high to allow for 256MB RAM in +// kseg0/1 - but we'll probably have to put the RAM in kuseg anyway to get +// it all mapped (512MB). These mappings leave enough space for the +// PCI devices on the Ocelot regardless though. +// +// Note that the CPU addresses are going directly to the PCI bus, so +// the IO/MEM bases are the matching CPU address space locations, not +// zero. + +#define HAL_OCELOT_PCI_IO_BASE 0x10000000 +#define HAL_OCELOT_PCI_IO_SIZE 0x01000000 // 16 MB +#define HAL_OCELOT_PCI_MEM0_BASE 0x12000000 +#define HAL_OCELOT_PCI_MEM0_SIZE 0x01000000 // 16 MB +#define HAL_OCELOT_PCI_MEM1_BASE 0x13000000 +#define HAL_OCELOT_PCI_MEM1_SIZE 0x01000000 // 16 MB + +// This is where the PCI spaces are mapped in the CPU's (virtual) +// address space. These are the uncached addresses. +#define HAL_PCI_PHYSICAL_MEMORY_BASE CYGARC_UNCACHED_ADDRESS(0) +#define HAL_PCI_PHYSICAL_IO_BASE CYGARC_UNCACHED_ADDRESS(0) + +// Map PCI device resources starting from these addresses in PCI space. +#define HAL_PCI_ALLOC_BASE_MEMORY HAL_OCELOT_PCI_MEM0_BASE +#define HAL_PCI_ALLOC_BASE_IO HAL_OCELOT_PCI_IO_BASE + + +// Uncached controller base +#define HAL_GALILEO_CONTROLLER_BASE 0xb4000000 + +//----------------------------------------------------------------------------- + +#define HAL_GALILEO_PUTREG(r,d) \ + HAL_WRITE_UINT32((HAL_GALILEO_CONTROLLER_BASE + (r)), \ + ((((d) & 0xff) << 24) | (((d) & 0xff00) << 8) | (((d) & 0xff0000) >> 8) | (((d) >> 24) & 0xff))) +#define HAL_GALILEO_GETREG(r) \ + ({ cyg_uint32 d; HAL_READ_UINT32((HAL_GALILEO_CONTROLLER_BASE + (r)), d);\ + (((d & 0xff) << 24) | ((d & 0xff00) << 8) | ((d & 0xff0000) >> 8) | ((d >> 24) & 0xff)); }) + +// PCI config reads are special: all devices but the Galileo itself +// are in big-endian mode. Fiddling the endian configs did not seem +// to make a difference. +#define HAL_GALILEO_PUTPCI(bus, devfn, r, data) \ + CYG_MACRO_START \ + if (0 == bus && 0 == devfn) \ + HAL_GALILEO_PUTREG(r, data); \ + else \ + HAL_WRITE_UINT32((HAL_GALILEO_CONTROLLER_BASE + (r)), data); \ + CYG_MACRO_END + +#define HAL_GALILEO_GETPCI(bus, devfn, r, data) \ + CYG_MACRO_START \ + if (0 == bus && 0 == devfn) \ + data = HAL_GALILEO_GETREG(r); \ + else \ + HAL_READ_UINT32((HAL_GALILEO_CONTROLLER_BASE + (r)), data); \ + CYG_MACRO_END + + +extern cyg_uint32 cyg_hal_plf_pci_cfg_read_dword (cyg_uint32 bus, + cyg_uint32 devfn, + cyg_uint32 offset); +extern cyg_uint16 cyg_hal_plf_pci_cfg_read_word (cyg_uint32 bus, + cyg_uint32 devfn, + cyg_uint32 offset); +extern cyg_uint8 cyg_hal_plf_pci_cfg_read_byte (cyg_uint32 bus, + cyg_uint32 devfn, + cyg_uint32 offset); +extern void cyg_hal_plf_pci_cfg_write_dword (cyg_uint32 bus, + cyg_uint32 devfn, + cyg_uint32 offset, + cyg_uint32 val); +extern void cyg_hal_plf_pci_cfg_write_word (cyg_uint32 bus, + cyg_uint32 devfn, + cyg_uint32 offset, + cyg_uint16 val); +extern void cyg_hal_plf_pci_cfg_write_byte (cyg_uint32 bus, + cyg_uint32 devfn, + cyg_uint32 offset, + cyg_uint8 val); + +//----------------------------------------------------------------------------- + +// Initialize the PCI bus. +externC void cyg_hal_plf_pci_init(void); +#define HAL_PCI_INIT() cyg_hal_plf_pci_init() + +// Read a value from the PCI configuration space of the appropriate +// size at an address composed from the bus, devfn and +// offset. +#define HAL_PCI_CFG_READ_UINT8( __bus, __devfn, __offset, __val ) \ + __val = cyg_hal_plf_pci_cfg_read_byte((__bus), (__devfn), (__offset)) + +#define HAL_PCI_CFG_READ_UINT16( __bus, __devfn, __offset, __val ) \ + __val = cyg_hal_plf_pci_cfg_read_word((__bus), (__devfn), (__offset)) + +#define HAL_PCI_CFG_READ_UINT32( __bus, __devfn, __offset, __val ) \ + __val = cyg_hal_plf_pci_cfg_read_dword((__bus), (__devfn), (__offset)) + +// Write a value to the PCI configuration space of the appropriate +// size at an address composed from the bus, devfn and offset. +#define HAL_PCI_CFG_WRITE_UINT8( __bus, __devfn, __offset, __val ) \ + cyg_hal_plf_pci_cfg_write_byte((__bus), (__devfn), (__offset), (__val)) + +#define HAL_PCI_CFG_WRITE_UINT16( __bus, __devfn, __offset, __val ) \ + cyg_hal_plf_pci_cfg_write_word((__bus), (__devfn), (__offset), (__val)) + +#define HAL_PCI_CFG_WRITE_UINT32( __bus, __devfn, __offset, __val ) \ + cyg_hal_plf_pci_cfg_write_dword((__bus), (__devfn), (__offset), (__val)) + + +//----------------------------------------------------------------------------- +// Resources + +// Translate the PCI interrupt requested by the device (INTA#, INTB#, +// INTC# or INTD#) to the associated CPU interrupt (i.e., HAL vector). +// We don't actually know what the mappings are at present for this +// board. The following is therefore just a temporary guess until +// we can find out. + +#define HAL_PCI_TRANSLATE_INTERRUPT( __bus, __devfn, __vec, __valid) \ + CYG_MACRO_START \ + cyg_uint8 __req; \ + HAL_PCI_CFG_READ_UINT8(__bus, __devfn, CYG_PCI_CFG_INT_PIN, __req); \ + if (0 != __req) { \ + CYG_ADDRWORD __translation[4] = { \ + CYGNUM_HAL_INTERRUPT_PCI_INTA, /* INTA# */ \ + CYGNUM_HAL_INTERRUPT_PCI_INTB, /* INTB# */ \ + CYGNUM_HAL_INTERRUPT_PCI_INTC, /* INTC# */ \ + CYGNUM_HAL_INTERRUPT_PCI_INTD };/* INTD# */ \ + \ + __vec = __translation[(((__req-1)+CYG_PCI_DEV_GET_DEV(__devfn))&3)]; \ + \ + __valid = true; \ + } else { \ + /* Device will not generate interrupt requests. */ \ + __valid = false; \ + } \ + CYG_MACRO_END + +// Galileo GT64120 on MIPS Ocelot requires special processing. +// First, it will hang when accessing device 31 on the local bus. +// Second, we need to ignore the GT64120 so we can set it up +// outside the generic PCI library. +#define HAL_PCI_IGNORE_DEVICE(__bus, __dev, __fn) \ + ((__bus) == 0 && ((__dev) == 0 || (__dev) == 31)) + + +//----------------------------------------------------------------------------- +// PCI / Galileo register definitions +#define HAL_GALILEO_PCI0_CONFIG_ADDR_ConfigEn BIT31 +#define HAL_GALILEO_PCI0_STATUS_COMMAND_REGNUM 0x04 +#define HAL_GALILEO_PCI0_BIST_REGNUM 0x0C +#define HAL_GALILEO_PCI0_SCS32_BASE_REGNUM 0x14 +#define HAL_GALILEO_PCI0_CONFIG_MEMEn 0x2 +#define HAL_GALILEO_PCI0_CONFIG_MasEn 0x4 +#define HAL_GALILEO_PCI0_CONFIG_SErrEn 0x100 +#define HAL_GALILEO_PCI0_LAT_TIMER_VAL 0x800 +#define HAL_GALILEO_PCI0_TIMEOUT_RETRY_VALUE 0x00ffffff + +#define HAL_GALILEO_PCI_INTERNAL_COMMAND_OFFSET 0xC00 +#define HAL_GALILEO_PCI0_TIMEOUT_RETRY_OFFSET 0xc04 +#define HAL_GALILEO_PCI0_SCS10_SIZE_OFFSET 0xc08 +#define HAL_GALILEO_PCI0_SCS32_SIZE_OFFSET 0xc0c +#define HAL_GALILEO_PCI0_SCS20_SIZE_OFFSET 0xc10 +#define HAL_GALILEO_PCI0_CS3_SIZE_OFFSET 0xc14 +#define HAL_GALILEO_BAR_ENA_OFFSET 0xc3c +# define HAL_GALILEO_BAR_ENA_SWCS3 (1 << 0) +# define HAL_GALILEO_BAR_ENA_SWCS32 (1 << 1) +# define HAL_GALILEO_BAR_ENA_SWCS10 (1 << 2) +# define HAL_GALILEO_BAR_ENA_IO (1 << 3) +# define HAL_GALILEO_BAR_ENA_MEM (1 << 4) +# define HAL_GALILEO_BAR_ENA_CS3 (1 << 5) +# define HAL_GALILEO_BAR_ENA_CS20 (1 << 6) +# define HAL_GALILEO_BAR_ENA_SCS32 (1 << 7) +# define HAL_GALILEO_BAR_ENA_SCS10 (1 << 8) +#define HAL_GALILEO_PCI0_CONFIG_ADDR_OFFSET 0xcf8 +# define HAL_GALILEO_PCI0_CONFIG_ADDR_ENABLE (1 << 31) +#define HAL_GALILEO_PCI0_CONFIG_DATA_OFFSET 0xcfc + +#define HAL_OCELOT_NULL_DEVNUM 0x0 + +// GALILEO Interrupts +#define HAL_GALILEO_IRQ_CAUSE_OFFSET 0xc18 +# define HAL_GALILEO_IRQCAUSE_INTSUM (1 << 0) +# define HAL_GALILEO_IRQCAUSE_MEMOUT (1 << 1) +# define HAL_GALILEO_IRQCAUSE_DMAOUT (1 << 2) +# define HAL_GALILEO_IRQCAUSE_CPUOUT (1 << 3) +# define HAL_GALILEO_IRQCAUSE_DMA0 (1 << 4) +# define HAL_GALILEO_IRQCAUSE_DMA1 (1 << 5) +# define HAL_GALILEO_IRQCAUSE_DMA2 (1 << 6) +# define HAL_GALILEO_IRQCAUSE_DMA3 (1 << 7) +# define HAL_GALILEO_IRQCAUSE_T0 (1 << 8) +# define HAL_GALILEO_IRQCAUSE_T1 (1 << 9) +# define HAL_GALILEO_IRQCAUSE_T2 (1 << 10) +# define HAL_GALILEO_IRQCAUSE_T3 (1 << 11) +# define HAL_GALILEO_IRQCAUSE_MASRD (1 << 12) +# define HAL_GALILEO_IRQCAUSE_SLVWR (1 << 13) +# define HAL_GALILEO_IRQCAUSE_MASWR (1 << 14) +# define HAL_GALILEO_IRQCAUSE_SLVRD (1 << 15) +# define HAL_GALILEO_IRQCAUSE_AERR (1 << 16) +# define HAL_GALILEO_IRQCAUSE_MERR (1 << 17) +# define HAL_GALILEO_IRQCAUSE_MASABT (1 << 18) +# define HAL_GALILEO_IRQCAUSE_TARABT (1 << 19) +# define HAL_GALILEO_IRQCAUSE_RETRY (1 << 20) +# define HAL_GALILEO_IRQCAUSE_CPUSUM (1 << 30) +# define HAL_GALILEO_IRQCAUSE_PCISUM (1 << 31) +#define HAL_GALILEO_HIRQ_CAUSE_OFFSET 0xc98 +#define HAL_GALILEO_CPUIRQ_MASK_OFFSET 0xc1c +#define HAL_GALILEO_CPUHIRQ_MASK_OFFSET 0xc9c + +/* Galileo Memory Controller registers */ +#define HAL_GALILEO_SDRAM_DUPLICATE_BANK_ADDR BIT20 +#define HAL_GALILEO_SDRAM_BANK_INTERLEAVE_DIS BIT14 +#define HAL_GALILEO_CPU_DECODE_SHIFT 21 +#define HAL_GALILEO_DEV_DECODE_SHIFT 20 +#define HAL_GALILEO_SDRAM_SRAS_TO_SCAS_DELAY_3C BIT10 +#define HAL_GALILEO_SDRAM_WIDTH_64BIT BIT6 +#define HAL_GALILEO_SDRAM_SRAS_PRECHARGE_3C BIT3 +#define HAL_GALILEO_SDRAM_BANK0_CASLAT_2 BIT0 +#define HAL_GALILEO_SDRAM_BANK0_SZ_64M BIT11 +#define HAL_GALILEO_SDRAM_NUM_BANKS_4 BIT5 +#define HAL_GALILEO_SDRAM_BANK0_PARITY BIT8 +#define HAL_GALILEO_SDRAM_CFG_RAM_WIDTH BIT15 +#define HAL_GALILEO_PCI0_CONFIG_ADDR_ConfigEn BIT31 +#define HAL_GALILEO_PCI0_STATUS_COMMAND_REGNUM 0x04 +#define HAL_GALILEO_PCI0_BIST_REGNUM 0x0C +#define HAL_GALILEO_PCI0_SCS32_BASE_REGNUM 0x14 +#define HAL_GALILEO_PCI0_CONFIG_MEMEn 0x2 +#define HAL_GALILEO_PCI0_CONFIG_MasEn 0x4 +#define HAL_GALILEO_PCI0_CONFIG_SErrEn 0x100 +#define HAL_GALILEO_PCI0_LAT_TIMER_VAL 0x800 +#define HAL_GALILEO_PCI0_TIMEOUT_RETRY_VALUE 0x00ffffff + +#define HAL_GALILEO_SDRAM_BANK0_OFFSET 0x44c +#define HAL_GALILEO_SDRAM_BANK2_OFFSET 0x454 +#define HAL_GALILEO_SDRAM_CONFIG_OFFSET 0x448 + +#define HAL_GALILEO_SCS10_LD_OFFSET 0x008 +#define HAL_GALILEO_SCS10_HD_OFFSET 0x010 +#define HAL_GALILEO_SCS32_LD_OFFSET 0x018 +#define HAL_GALILEO_SCS32_HD_OFFSET 0x020 +#define HAL_GALILEO_CS20_LD_OFFSET 0x028 +#define HAL_GALILEO_CS20_HD_OFFSET 0x030 +#define HAL_GALILEO_PCIIO_LD_OFFSET 0x048 +#define HAL_GALILEO_PCIIO_HD_OFFSET 0x050 +#define HAL_GALILEO_PCIMEM0_LD_OFFSET 0x058 +#define HAL_GALILEO_PCIMEM0_HD_OFFSET 0x060 +#define HAL_GALILEO_PCIMEM1_LD_OFFSET 0x080 +#define HAL_GALILEO_PCIMEM1_HD_OFFSET 0x088 +#define HAL_GALILEO_PCI1IO_LD_OFFSET 0x090 +#define HAL_GALILEO_PCI1IO_HD_OFFSET 0x098 +#define HAL_GALILEO_PCI1MEM0_LD_OFFSET 0x0a0 +#define HAL_GALILEO_PCI1MEM0_HD_OFFSET 0x0a8 +#define HAL_GALILEO_PCI1MEM1_LD_OFFSET 0x0b0 +#define HAL_GALILEO_PCI1MEM1_HD_OFFSET 0x0b8 +#define HAL_GALILEO_PCIIO_REMAP_OFFSET 0x0f0 +#define HAL_GALILEO_PCIMEM0_REMAP_OFFSET 0x0f8 +#define HAL_GALILEO_PCIMEM1_REMAP_OFFSET 0x100 +#define HAL_GALILEO_SCS0_LD_OFFSET 0x400 +#define HAL_GALILEO_SCS0_HD_OFFSET 0x404 +#define HAL_GALILEO_SCS1_LD_OFFSET 0x408 +#define HAL_GALILEO_SCS1_HD_OFFSET 0x40c +#define HAL_GALILEO_SCS2_LD_OFFSET 0x410 +#define HAL_GALILEO_SCS2_HD_OFFSET 0x414 +#define HAL_GALILEO_SCS3_LD_OFFSET 0x418 +#define HAL_GALILEO_SCS3_HD_OFFSET 0x41c +#define HAL_GALILEO_CS0_LD_OFFSET 0x420 +#define HAL_GALILEO_CS0_HD_OFFSET 0x424 +#define HAL_GALILEO_CS1_LD_OFFSET 0x428 +#define HAL_GALILEO_CS1_HD_OFFSET 0x42c +#define HAL_GALILEO_CS2_LD_OFFSET 0x430 +#define HAL_GALILEO_CS2_HD_OFFSET 0x434 +#define HAL_GALILEO_CPU_DECODE_SHIFT 21 + +//----------------------------------------------------------------------------- +// end of plf_io.h +#endif // CYGONCE_PLF_IO_H diff --git a/packages/hal/mips/rm7000/ocelot/current/include/plf_stub.h b/packages/hal/mips/rm7000/ocelot/current/include/plf_stub.h new file mode 100644 --- /dev/null +++ b/packages/hal/mips/rm7000/ocelot/current/include/plf_stub.h @@ -0,0 +1,76 @@ +#ifndef CYGONCE_HAL_PLF_STUB_H +#define CYGONCE_HAL_PLF_STUB_H + +//============================================================================= +// +// plf_stub.h +// +// Platform header for GDB stub support. +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jskov +// Contributors:jskov +// Date: 2000-05-15 +// Purpose: Platform HAL stub support for Ocelot board. +// Usage: #include +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include + +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + +#include // CYG_UNUSED_PARAM + +#include // architecture stub support + +//---------------------------------------------------------------------------- +// Define some platform specific communication details. This is mostly +// handled by hal_if now, but we need to make sure the comms tables are +// properly initialized. + +externC void cyg_hal_plf_comms_init(void); + +#define HAL_STUB_PLATFORM_INIT_SERIAL() cyg_hal_plf_comms_init() + +#define HAL_STUB_PLATFORM_SET_BAUD_RATE(baud) CYG_UNUSED_PARAM(int, (baud)) +#define HAL_STUB_PLATFORM_INTERRUPTIBLE 0 +#define HAL_STUB_PLATFORM_INIT_BREAK_IRQ() CYG_EMPTY_STATEMENT + +//---------------------------------------------------------------------------- +// Stub initializer. +extern void hal_plf_stub_init( void ); +#define HAL_STUB_PLATFORM_INIT() hal_plf_stub_init(); + +#endif // ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS +//----------------------------------------------------------------------------- +#endif // CYGONCE_HAL_PLF_STUB_H +// End of plf_stub.h diff --git a/packages/hal/mips/rm7000/ocelot/current/misc/redboot_RAM.ecm b/packages/hal/mips/rm7000/ocelot/current/misc/redboot_RAM.ecm new file mode 100644 --- /dev/null +++ b/packages/hal/mips/rm7000/ocelot/current/misc/redboot_RAM.ecm @@ -0,0 +1,61 @@ +cdl_savefile_version 1; +cdl_savefile_command cdl_savefile_version {}; +cdl_savefile_command cdl_savefile_command {}; +cdl_savefile_command cdl_configuration { description hardware template package }; +cdl_savefile_command cdl_package { value_source user_value wizard_value inferred_value }; +cdl_savefile_command cdl_component { value_source user_value wizard_value inferred_value }; +cdl_savefile_command cdl_option { value_source user_value wizard_value inferred_value }; +cdl_savefile_command cdl_interface { value_source user_value wizard_value inferred_value }; + +cdl_configuration eCos { + description "" ; + hardware ocelot ; + template redboot ; + package -hardware CYGPKG_HAL_MIPS current ; + package -hardware CYGPKG_HAL_MIPS_RM7000 current ; + package -hardware CYGPKG_HAL_MIPS_RM7000_OCELOT current ; + package -hardware CYGPKG_IO_PCI current ; + package -hardware CYGPKG_DEVS_FLASH_MIPS_QED_OCELOT current ; + package -hardware CYGPKG_DEVS_FLASH_AMD_AM29F040B current ; + package -hardware CYGPKG_IO_SERIAL_GENERIC_16X5X current ; + package -hardware CYGPKG_DEVS_ETH_INTEL_I82559 current ; + package -template CYGPKG_HAL current ; + package -template CYGPKG_INFRA current ; + package -template CYGPKG_REDBOOT current ; + package CYGPKG_IO_ETH_DRIVERS current ; + package CYGPKG_IO_FLASH current ; +}; + +cdl_option CYGBLD_BUILD_GDB_STUBS { + user_value 0 +}; + +cdl_option CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT { + user_value 0 +}; + +cdl_option CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM { + inferred_value 0 +}; + +cdl_option CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS { + inferred_value 1 +}; + +cdl_option CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT { + inferred_value 1 +}; + +cdl_option CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT { + inferred_value 0 +}; + +cdl_option CYGSEM_HAL_USE_ROM_MONITOR { + inferred_value 0 0 +}; + +cdl_component CYGBLD_BUILD_REDBOOT { + user_value 1 +}; + + diff --git a/packages/hal/mips/rm7000/ocelot/current/misc/redboot_ROM.ecm b/packages/hal/mips/rm7000/ocelot/current/misc/redboot_ROM.ecm new file mode 100644 --- /dev/null +++ b/packages/hal/mips/rm7000/ocelot/current/misc/redboot_ROM.ecm @@ -0,0 +1,69 @@ +cdl_savefile_version 1; +cdl_savefile_command cdl_savefile_version {}; +cdl_savefile_command cdl_savefile_command {}; +cdl_savefile_command cdl_configuration { description hardware template package }; +cdl_savefile_command cdl_package { value_source user_value wizard_value inferred_value }; +cdl_savefile_command cdl_component { value_source user_value wizard_value inferred_value }; +cdl_savefile_command cdl_option { value_source user_value wizard_value inferred_value }; +cdl_savefile_command cdl_interface { value_source user_value wizard_value inferred_value }; + +cdl_configuration eCos { + description "" ; + hardware ocelot ; + template redboot ; + package -hardware CYGPKG_HAL_MIPS current ; + package -hardware CYGPKG_HAL_MIPS_RM7000 current ; + package -hardware CYGPKG_HAL_MIPS_RM7000_OCELOT current ; + package -hardware CYGPKG_IO_PCI current ; + package -hardware CYGPKG_DEVS_FLASH_MIPS_QED_OCELOT current ; + package -hardware CYGPKG_DEVS_FLASH_AMD_AM29F040B current ; + package -hardware CYGPKG_IO_SERIAL_GENERIC_16X5X current ; + package -hardware CYGPKG_DEVS_ETH_INTEL_I82559 current ; + package -template CYGPKG_HAL current ; + package -template CYGPKG_INFRA current ; + package -template CYGPKG_REDBOOT current ; + package CYGPKG_IO_ETH_DRIVERS current ; + package CYGPKG_IO_FLASH current ; +}; + +cdl_option CYGBLD_BUILD_GDB_STUBS { + user_value 0 +}; + +cdl_option CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT { + user_value 0 +}; + +cdl_option CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM { + inferred_value 0 +}; + +cdl_option CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS { + inferred_value 1 +}; + +cdl_option CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT { + inferred_value 1 +}; + +cdl_option CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT { + inferred_value 0 +}; + +cdl_option CYGSEM_HAL_USE_ROM_MONITOR { + inferred_value 0 0 +}; + +cdl_option CYGSEM_HAL_ROM_MONITOR { + inferred_value 1 +}; + +cdl_component CYG_HAL_STARTUP { + user_value ROM +}; + +cdl_component CYGBLD_BUILD_REDBOOT { + user_value 1 +}; + + diff --git a/packages/hal/mips/rm7000/ocelot/current/src/ns16552.c b/packages/hal/mips/rm7000/ocelot/current/src/ns16552.c new file mode 100644 --- /dev/null +++ b/packages/hal/mips/rm7000/ocelot/current/src/ns16552.c @@ -0,0 +1,586 @@ +//============================================================================= +// +// ns16552.c +// +// Simple driver for the NS16652 serial controller +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg, gthomas +// Contributors:nickg, gthomas, jskov +// Date: 1998-03-02 +// Description: Simple HAL driver for the NS16552 serial controller +// Note: To drop into a new HAL, you should only have to change the +// few parameters here at the top. +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include +#include // base types + +#include // tracing macros +#include // assertion macros + +#include // basic machine info +#include // interrupt macros +#include // IO macros +#include +#include +#include // interface API +#include // Helper functions + +//----------------------------------------------------------------------------- +// Make changes here +#include // board specifics + +#define NS_SERIAL_A_BASE 0xbd000020 +#define NS_SERIAL_A_IRQ CYGNUM_HAL_INTERRUPT_UART1 +#define NS_SERIAL_B_BASE 0xbd000000 +#define NS_SERIAL_B_IRQ CYGNUM_HAL_INTERRUPT_UART2 + +#define NS_CLOCK 20000000 + +// Fill in extra code as required +#define NS_EXTRA_INIT() \ + CYG_MACRO_START \ + CYG_MACRO_END + +//----------------------------------------------------------------------------- + + +#define CYG_DEVICE_SERIAL_BAUD_MSB (((NS_CLOCK / (16*(CYGNUM_HAL_VIRTUAL_VECTOR_CHANNELS_DEFAULT_BAUD))) >> 8) & 0xff) +#define CYG_DEVICE_SERIAL_BAUD_LSB ((NS_CLOCK / (16*(CYGNUM_HAL_VIRTUAL_VECTOR_CHANNELS_DEFAULT_BAUD))) & 0xff) + +// Define the serial registers. +#define CYG_DEV_RBR 0x00 // receiver buffer register, read, dlab = 0 +#define CYG_DEV_THR 0x00 // transmitter holding register, write, dlab = 0 +#define CYG_DEV_DLL 0x00 // divisor latch (LS), read/write, dlab = 1 +#define CYG_DEV_IER 0x04 // interrupt enable register, read/write, dlab = 0 +#define CYG_DEV_DLM 0x04 // divisor latch (MS), read/write, dlab = 1 +#define CYG_DEV_IIR 0x08 // interrupt identification register, read, dlab = 0 +#define CYG_DEV_FCR 0x08 // fifo control register, write, dlab = 0 +#define CYG_DEV_LCR 0x0C // line control register, read/write +#define CYG_DEV_MCR 0x10 // modem control register, read/write +#define CYG_DEV_LSR 0x14 // line status register, read +#define CYG_DEV_MSR 0x18 // modem status register, read + +// Interrupt Enable Register +#define SIO_IER_RCV 0x01 +#define SIO_IER_XMT 0x02 +#define SIO_IER_LS 0x04 +#define SIO_IER_MS 0x08 + +// The line status register bits. +#define SIO_LSR_DR 0x01 // data ready +#define SIO_LSR_OE 0x02 // overrun error +#define SIO_LSR_PE 0x04 // parity error +#define SIO_LSR_FE 0x08 // framing error +#define SIO_LSR_BI 0x10 // break interrupt +#define SIO_LSR_THRE 0x20 // transmitter holding register empty +#define SIO_LSR_TEMT 0x40 // transmitter register empty +#define SIO_LSR_ERR 0x80 // any error condition + +// The modem status register bits. +#define SIO_MSR_DCTS 0x01 // delta clear to send +#define SIO_MSR_DDSR 0x02 // delta data set ready +#define SIO_MSR_TERI 0x04 // trailing edge ring indicator +#define SIO_MSR_DDCD 0x08 // delta data carrier detect +#define SIO_MSR_CTS 0x10 // clear to send +#define SIO_MSR_DSR 0x20 // data set ready +#define SIO_MSR_RI 0x40 // ring indicator +#define SIO_MSR_DCD 0x80 // data carrier detect + +// The line control register bits. +#define SIO_LCR_WLS0 0x01 // word length select bit 0 +#define SIO_LCR_WLS1 0x02 // word length select bit 1 +#define SIO_LCR_STB 0x04 // number of stop bits +#define SIO_LCR_PEN 0x08 // parity enable +#define SIO_LCR_EPS 0x10 // even parity select +#define SIO_LCR_SP 0x20 // stick parity +#define SIO_LCR_SB 0x40 // set break +#define SIO_LCR_DLAB 0x80 // divisor latch access bit + +// Modem Control Register +#define SIO_MCR_DTR 0x01 +#define SIO_MCR_RTS 0x02 +#define SIO_MCR_INT 0x08 // Enable interrupts + +//----------------------------------------------------------------------------- +typedef struct { + cyg_uint8* base; + cyg_int32 msec_timeout; + int isr_vector; +} channel_data_t; + +//----------------------------------------------------------------------------- + +static void +cyg_hal_plf_serial_init_channel(void* __ch_data) +{ + cyg_uint8* base = ((channel_data_t*)__ch_data)->base; + cyg_uint8 lcr; + + // 8-1-no parity. + HAL_WRITE_UINT8(base+CYG_DEV_LCR, SIO_LCR_WLS0 | SIO_LCR_WLS1); + + HAL_READ_UINT8(base+CYG_DEV_LCR, lcr); + lcr |= SIO_LCR_DLAB; + HAL_WRITE_UINT8(base+CYG_DEV_LCR, lcr); + HAL_WRITE_UINT8(base+CYG_DEV_DLL, CYG_DEVICE_SERIAL_BAUD_LSB); + HAL_WRITE_UINT8(base+CYG_DEV_DLM, CYG_DEVICE_SERIAL_BAUD_MSB); + lcr &= ~SIO_LCR_DLAB; + HAL_WRITE_UINT8(base+CYG_DEV_LCR, lcr); + HAL_WRITE_UINT8(base+CYG_DEV_FCR, 0x07); // Enable & clear FIFO + + NS_EXTRA_INIT(); +} + +void +cyg_hal_plf_serial_putc(void *__ch_data, char c) +{ + cyg_uint8* base = ((channel_data_t*)__ch_data)->base; + cyg_uint8 lsr; + CYGARC_HAL_SAVE_GP(); + + do { + HAL_READ_UINT8(base+CYG_DEV_LSR, lsr); + } while ((lsr & SIO_LSR_THRE) == 0); + + HAL_WRITE_UINT8(base+CYG_DEV_THR, c); + + CYGARC_HAL_RESTORE_GP(); +} + +static cyg_bool +cyg_hal_plf_serial_getc_nonblock(void* __ch_data, cyg_uint8* ch) +{ + cyg_uint8* base = ((channel_data_t*)__ch_data)->base; + cyg_uint8 lsr; + + HAL_READ_UINT8(base+CYG_DEV_LSR, lsr); + if ((lsr & SIO_LSR_DR) == 0) + return false; + + HAL_READ_UINT8(base+CYG_DEV_RBR, *ch); + + return true; +} + +cyg_uint8 +cyg_hal_plf_serial_getc(void* __ch_data) +{ + cyg_uint8 ch; + CYGARC_HAL_SAVE_GP(); + + while(!cyg_hal_plf_serial_getc_nonblock(__ch_data, &ch)); + + CYGARC_HAL_RESTORE_GP(); + return ch; +} + +static channel_data_t ns_ser_channels[2] = { + { (cyg_uint8*)NS_SERIAL_A_BASE, 1000, NS_SERIAL_A_IRQ }, + { (cyg_uint8*)NS_SERIAL_B_BASE, 1000, NS_SERIAL_B_IRQ } +}; + +static void +cyg_hal_plf_serial_write(void* __ch_data, const cyg_uint8* __buf, + cyg_uint32 __len) +{ + CYGARC_HAL_SAVE_GP(); + + while(__len-- > 0) + cyg_hal_plf_serial_putc(__ch_data, *__buf++); + + CYGARC_HAL_RESTORE_GP(); +} + +static void +cyg_hal_plf_serial_read(void* __ch_data, cyg_uint8* __buf, cyg_uint32 __len) +{ + CYGARC_HAL_SAVE_GP(); + + while(__len-- > 0) + *__buf++ = cyg_hal_plf_serial_getc(__ch_data); + + CYGARC_HAL_RESTORE_GP(); +} + +cyg_bool +cyg_hal_plf_serial_getc_timeout(void* __ch_data, cyg_uint8* ch) +{ + int delay_count; + channel_data_t* chan = (channel_data_t*)__ch_data; + cyg_bool res; + CYGARC_HAL_SAVE_GP(); + + delay_count = chan->msec_timeout * 10; // delay in .1 ms steps + + for(;;) { + res = cyg_hal_plf_serial_getc_nonblock(__ch_data, ch); + if (res || 0 == delay_count--) + break; + + CYGACC_CALL_IF_DELAY_US(100); + } + + CYGARC_HAL_RESTORE_GP(); + return res; +} + +static int +cyg_hal_plf_serial_control(void *__ch_data, __comm_control_cmd_t __func, ...) +{ + static int irq_state = 0; + channel_data_t* chan = (channel_data_t*)__ch_data; + int ret = 0; + CYGARC_HAL_SAVE_GP(); + + switch (__func) { + case __COMMCTL_IRQ_ENABLE: + irq_state = 1; + + HAL_WRITE_UINT8(chan->base+CYG_DEV_IER, SIO_IER_RCV); + HAL_WRITE_UINT8(chan->base+CYG_DEV_MCR, SIO_MCR_INT|SIO_MCR_DTR|SIO_MCR_RTS); + + HAL_INTERRUPT_UNMASK(chan->isr_vector); + break; + case __COMMCTL_IRQ_DISABLE: + ret = irq_state; + irq_state = 0; + + HAL_WRITE_UINT8(chan->base+CYG_DEV_IER, 0); + + HAL_INTERRUPT_MASK(chan->isr_vector); + break; + case __COMMCTL_DBG_ISR_VECTOR: + ret = chan->isr_vector; + break; + case __COMMCTL_SET_TIMEOUT: + { + va_list ap; + + va_start(ap, __func); + + ret = chan->msec_timeout; + chan->msec_timeout = va_arg(ap, cyg_uint32); + + va_end(ap); + } + default: + break; + } + CYGARC_HAL_RESTORE_GP(); + return ret; +} + +static int +cyg_hal_plf_serial_isr(void *__ch_data, int* __ctrlc, + CYG_ADDRWORD __vector, CYG_ADDRWORD __data) +{ + int res = 0; + channel_data_t* chan = (channel_data_t*)__ch_data; + char c; + cyg_uint8 lsr; + CYGARC_HAL_SAVE_GP(); + + cyg_drv_interrupt_acknowledge(chan->isr_vector); + + *__ctrlc = 0; + HAL_READ_UINT8(chan->base+CYG_DEV_LSR, lsr); + if ( (lsr & SIO_LSR_DR) != 0 ) { + + HAL_READ_UINT8(chan->base+CYG_DEV_RBR, c); + if( cyg_hal_is_break( &c , 1 ) ) + *__ctrlc = 1; + + res = CYG_ISR_HANDLED; + } + + CYGARC_HAL_RESTORE_GP(); + return res; +} + +static void +cyg_hal_plf_serial_init(void) +{ + hal_virtual_comm_table_t* comm; + int cur = CYGACC_CALL_IF_SET_CONSOLE_COMM(CYGNUM_CALL_IF_SET_COMM_ID_QUERY_CURRENT); + + // Disable interrupts. + HAL_INTERRUPT_MASK(ns_ser_channels[0].isr_vector); + HAL_INTERRUPT_MASK(ns_ser_channels[1].isr_vector); + + // Init channels + cyg_hal_plf_serial_init_channel(&ns_ser_channels[0]); + cyg_hal_plf_serial_init_channel(&ns_ser_channels[1]); + + // Setup procs in the vector table + + // Set channel 0 + CYGACC_CALL_IF_SET_CONSOLE_COMM(0); + comm = CYGACC_CALL_IF_CONSOLE_PROCS(); + CYGACC_COMM_IF_CH_DATA_SET(*comm, &ns_ser_channels[0]); + CYGACC_COMM_IF_WRITE_SET(*comm, cyg_hal_plf_serial_write); + CYGACC_COMM_IF_READ_SET(*comm, cyg_hal_plf_serial_read); + CYGACC_COMM_IF_PUTC_SET(*comm, cyg_hal_plf_serial_putc); + CYGACC_COMM_IF_GETC_SET(*comm, cyg_hal_plf_serial_getc); + CYGACC_COMM_IF_CONTROL_SET(*comm, cyg_hal_plf_serial_control); + CYGACC_COMM_IF_DBG_ISR_SET(*comm, cyg_hal_plf_serial_isr); + CYGACC_COMM_IF_GETC_TIMEOUT_SET(*comm, cyg_hal_plf_serial_getc_timeout); + + // Set channel 1 + CYGACC_CALL_IF_SET_CONSOLE_COMM(1); + comm = CYGACC_CALL_IF_CONSOLE_PROCS(); + CYGACC_COMM_IF_CH_DATA_SET(*comm, &ns_ser_channels[1]); + CYGACC_COMM_IF_WRITE_SET(*comm, cyg_hal_plf_serial_write); + CYGACC_COMM_IF_READ_SET(*comm, cyg_hal_plf_serial_read); + CYGACC_COMM_IF_PUTC_SET(*comm, cyg_hal_plf_serial_putc); + CYGACC_COMM_IF_GETC_SET(*comm, cyg_hal_plf_serial_getc); + CYGACC_COMM_IF_CONTROL_SET(*comm, cyg_hal_plf_serial_control); + CYGACC_COMM_IF_DBG_ISR_SET(*comm, cyg_hal_plf_serial_isr); + CYGACC_COMM_IF_GETC_TIMEOUT_SET(*comm, cyg_hal_plf_serial_getc_timeout); + + // Restore original console + CYGACC_CALL_IF_SET_CONSOLE_COMM(cur); +} + +void +cyg_hal_plf_comms_init(void) +{ + static int initialized = 0; + + if (initialized) + return; + + initialized = 1; + + cyg_hal_plf_serial_init(); +} + +//----------------------------------------------------------------------------- + +//============================================================================= +// Compatibility with older stubs +//============================================================================= + +#ifndef CYGSEM_HAL_VIRTUAL_VECTOR_DIAG + +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS +#include // cyg_hal_gdb_interrupt +#endif + +#if CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL==0 +// This is the base address of the A-channel +#define CYG_DEV_SERIAL_BASE 0x1d000020 +#define CYG_DEVICE_SERIAL_INT CYGNUM_HAL_INTERRUPT_SERIALA +#else +// This is the base address of the B-channel +#define CYG_DEV_SERIAL_BASE 0x1d000000 +#define CYG_DEVICE_SERIAL_INT CYGNUM_HAL_INTERRUPT_SERIALB +#endif + +static channel_data_t ns_ser_channel = { + (cyg_uint8*)CYG_DEV_SERIAL_BASE, 0, 0 +}; + +// Assumption: all diagnostic output must be GDB packetized unless this is a ROM (i.e. +// totally stand-alone) system. + +#if defined(CYG_HAL_STARTUP_ROM) || !defined(CYGDBG_HAL_DIAG_TO_DEBUG_CHAN) +#define HAL_DIAG_USES_HARDWARE +#endif + +#ifndef HAL_DIAG_USES_HARDWARE +#if (CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL != CYGNUM_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL) +#define HAL_DIAG_USES_HARDWARE +#endif +#endif + +#ifdef HAL_DIAG_USES_HARDWARE + +void hal_diag_init(void) +{ + static int init = 0; + char *msg = "\n\rARM eCos\n\r"; + + if (init++) return; + + cyg_hal_plf_serial_init_channel(&ns_ser_channel); + + while (*msg) cyg_hal_plf_serial_putc(&ns_ser_channel, *msg++); +} + +#ifdef DEBUG_DIAG +#if defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS) +#define DIAG_BUFSIZE 32 +#else +#define DIAG_BUFSIZE 2048 +#endif +static char diag_buffer[DIAG_BUFSIZE]; +static int diag_bp = 0; +#endif + +void hal_diag_write_char(char c) +{ + hal_diag_init(); + + cyg_hal_plf_serial_putc(&ns_ser_channel, c); + +#ifdef DEBUG_DIAG + diag_buffer[diag_bp++] = c; + if (diag_bp == DIAG_BUFSIZE) diag_bp = 0; +#endif +} + +void hal_diag_read_char(char *c) +{ + *c = cyg_hal_plf_serial_getc(&ns_ser_channel); +} + +#else // HAL_DIAG relies on GDB + +// Initialize diag port - assume GDB channel is already set up +void hal_diag_init(void) +{ + if (0) cyg_hal_plf_serial_init_channel(&ns_ser_channel); // avoid warning +} + +// Actually send character down the wire +static void +hal_diag_write_char_serial(char c) +{ + hal_diag_init(); + + cyg_hal_plf_serial_putc(&ns_ser_channel, c); +} + +static bool +hal_diag_read_serial(char *c) +{ + long timeout = 1000000000; // A long time... + while (!cyg_hal_plf_serial_getc_nonblock(&ns_ser_channel, c)) + if (0 == --timeout) return false; + + return true; +} + +void +hal_diag_read_char(char *c) +{ + while (!hal_diag_read_serial(c)) ; +} + +void +hal_diag_write_char(char c) +{ + static char line[100]; + static int pos = 0; + + // No need to send CRs + if( c == '\r' ) return; + + line[pos++] = c; + + if( c == '\n' || pos == sizeof(line) ) + { + CYG_INTERRUPT_STATE old; + + // Disable interrupts. This prevents GDB trying to interrupt us + // while we are in the middle of sending a packet. The serial + // receive interrupt will be seen when we re-enable interrupts + // later. + +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + CYG_HAL_GDB_ENTER_CRITICAL_IO_REGION(old); +#else + HAL_DISABLE_INTERRUPTS(old); +#endif + + while(1) + { + static char hex[] = "0123456789ABCDEF"; + cyg_uint8 csum = 0; + int i; + char c1; + + hal_diag_write_char_serial('$'); + hal_diag_write_char_serial('O'); + csum += 'O'; + for( i = 0; i < pos; i++ ) + { + char ch = line[i]; + char h = hex[(ch>>4)&0xF]; + char l = hex[ch&0xF]; + hal_diag_write_char_serial(h); + hal_diag_write_char_serial(l); + csum += h; + csum += l; + } + hal_diag_write_char_serial('#'); + hal_diag_write_char_serial(hex[(csum>>4)&0xF]); + hal_diag_write_char_serial(hex[csum&0xF]); + + // Wait for the ACK character '+' from GDB here and handle + // receiving a ^C instead. This is the reason for this clause + // being a loop. + if (!hal_diag_read_serial(&c1)) + continue; // No response - try sending packet again + + if( c1 == '+' ) + break; // a good acknowledge + +#ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT + cyg_drv_interrupt_acknowledge(CYG_DEVICE_SERIAL_INT); + if( c1 == 3 ) { + // Ctrl-C: breakpoint. + cyg_hal_gdb_interrupt ((target_register_t)__builtin_return_address(0)); + break; + } +#endif + // otherwise, loop round again + } + + pos = 0; + + // And re-enable interrupts +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + CYG_HAL_GDB_LEAVE_CRITICAL_IO_REGION(old); +#else + HAL_RESTORE_INTERRUPTS(old); +#endif + + } +} +#endif + +#endif // CYGSEM_HAL_VIRTUAL_VECTOR_DIAG + +//----------------------------------------------------------------------------- +// End of ns16552.c diff --git a/packages/hal/mips/rm7000/ocelot/current/src/platform.S b/packages/hal/mips/rm7000/ocelot/current/src/platform.S new file mode 100644 --- /dev/null +++ b/packages/hal/mips/rm7000/ocelot/current/src/platform.S @@ -0,0 +1,399 @@ +##============================================================================= +## +## platform.S +## +## MIPS Ocelot platform code +## +##============================================================================= +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Red Hat eCos Public License +# Version 1.1 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://www.redhat.com/ +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Configurable Operating System, +# released September 30, 1998. +# +# The Initial Developer of the Original Code is Red Hat. +# Portions created by Red Hat are +# Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +# All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +##============================================================================= +#######DESCRIPTIONBEGIN#### +## +## Author(s): nickg +## Contributors:nickg, jskov +## Date: 2000-05-09 +## Purpose: MIPS Ocelot platform code +## Description: Platform specific code for Ocelot board. +## +######DESCRIPTIONEND#### +## +##============================================================================= + + .set noreorder + +#include +#include + +#ifdef CYGPKG_KERNEL +# include +#endif + +#include +#include +#include + +##----------------------------------------------------------------------------- +## MEMC initialization. + +## This code is table driven, which is somewhat more compact that coding it +## all. +## Table entries consist of an address and a value to store in that address. +## A zero address terminates the table. Two special address values modify the +## behaviour: +## DELAY_LOOP loops for the number of iterations in the value field. +## WRITE16 treats the next 2 words as an address and value to be written +## with a 16 bit write cycle. + +#define HAL_GALILEO_CONTROLLER_BASE 0xb4000000 +#define GL_CPU_CFG 0xb4000000 +#define GL_CPU_CFG_WRITERATE 0x00010000 + +#define GL_DEV_PAR_BANK0 0xb400045c +#define GL_DEV_PAR_BANK1 0xb4000460 +#define GL_DEV_PAR_BANK2 0xb4000464 +#define GL_DEV_PAR_BANK3 0xb4000468 +#define GL_DEV_PAR_BOOT 0xb400046c + +#define GL_SDRAM_CFG 0xb4000448 +#define GL_SDRAM_CFG_REF_INT_CNT_default 0x00000200 +#define GL_SDRAM_CFG_CPU_TO_DRAM_ERR 0x00020000 +#define GL_SDRAM_CFG_ECC_INT 0x00040000 +#define GL_SDRAM_CFG_DUP_BA 0x00100000 +#define GL_SDRAM_CFG_REG_SDRAM 0x00800000 +#define GL_SDRAM_CFG_DADR_12_SEL 0x01000000 +#define GL_SDRAM_CFG_init (GL_SDRAM_CFG_REF_INT_CNT_default| \ + GL_SDRAM_CFG_CPU_TO_DRAM_ERR| \ + GL_SDRAM_CFG_ECC_INT| \ + GL_SDRAM_CFG_DUP_BA| \ + GL_SDRAM_CFG_REG_SDRAM| \ + GL_SDRAM_CFG_DADR_12_SEL) + +#define GL_SDRAM_PAR_BANK0 0xb400044c +#define GL_SDRAM_PAR_BANK2 0xb4000454 +#define GL_CPU_SCS10_LO 0xb4000008 +#define GL_CPU_SCS10_HI 0xb4000010 +#define GL_CPU_SCS32_LO 0xb4000018 +#define GL_CPU_SCS32_HI 0xb4000020 + +#define GL_SDRAM_SCS0_LO 0xb4000400 +#define GL_SDRAM_SCS0_HI 0xb4000404 +#define GL_SDRAM_SCS1_LO 0xb4000408 +#define GL_SDRAM_SCS1_HI 0xb400040c +#define GL_SDRAM_SCS2_LO 0xb4000410 +#define GL_SDRAM_SCS2_HI 0xb4000414 +#define GL_SDRAM_SCS3_LO 0xb4000418 +#define GL_SDRAM_SCS3_HI 0xb400041c + +#define GL_SDRAM_MODE 0xb4000474 +#define GL_SDRAM_MODE_NORMAL 0x00000000 +#define GL_SDRAM_MODE_ENABLE 0x00000003 + +#define PLD_BOARD_STAT 0xbc000004 +#define PLD_INT_SET 0xbc00000c +#define PLD_INT_CLEAR 0xbc00000d +#define PLD_INT_SET_USER_LED 0x40 + +#define CPU_TO_LE(x) (((x & 0xff) << 24) | ((x & 0xff00) << 8) | ((x & 0xff0000) >> 8) | ((x >> 24) & 0xff)) + +#define HAL_OCELOT_RAM_BASE 0x00000000 + +#define HAL_GALILEO_CPU_DECODE_SHIFT 21 +#define HAL_GALILEO_DEV_DECODE_SHIFT 20 + +#define HAL_GALILEO_SCS10_LD_OFFSET 0x008 +#define HAL_GALILEO_SCS10_HD_OFFSET 0x010 +#define HAL_GALILEO_SCS32_LD_OFFSET 0x018 +#define HAL_GALILEO_SCS32_HD_OFFSET 0x020 + +#define HAL_GALILEO_SCS0_LD_OFFSET 0x400 +#define HAL_GALILEO_SCS0_HD_OFFSET 0x404 +#define HAL_GALILEO_SCS1_LD_OFFSET 0x408 +#define HAL_GALILEO_SCS1_HD_OFFSET 0x40c +#define HAL_GALILEO_SCS2_LD_OFFSET 0x410 +#define HAL_GALILEO_SCS2_HD_OFFSET 0x414 +#define HAL_GALILEO_SCS3_LD_OFFSET 0x418 +#define HAL_GALILEO_SCS3_HD_OFFSET 0x41c + +#if !defined(CYG_HAL_STARTUP_RAM) + +#define DELAY_LOOP 1 +#define WRITE16 2 + + +#define swap(v, t1, t2, t3) \ + lui t1,0xff; \ + andi t2,v,0xff00; \ + and t3,v,t1; \ + sll t1,v,0x18; \ + srl v,v,0x18; \ + or v,v,t1; \ + srl t3,t3,0x08; \ + sll t2,t2,0x08; \ + or v,v,t3; \ + or v,v,t2; + + +FUNC_START(hal_memc_setup) + lar t0,hal_memc_setup_table + la t1,0xbfc00000 + la t2,DELAY_LOOP + la t3,WRITE16 +1: + lw a0,0(t0) # next table entry + lw a1,4(t0) # value to write + addiu t0,8 # go to next entry + beq a0,t2,2f # Check for delay + nop + beq a0,t3,3f # Check for 16 bit write + nop + beqz a0,9f # zero terminates loop + nop + sw a1,0(a0) # write it + lw zero,0(t1) # uncached read to flush write buffer + b 1b + nop +2: + lw zero,0(t1) # uncached read to flush write buffer + bnez a1,2b # count down by value in a1 + addiu a1,-1 # decrement in delay slot + b 1b # go back to loop + nop +3: + lw a3,0(t0) # get next word + addiu t0,4 # skip it + sh a3,0(a1) # store halfword + lw zero,0(t1) # uncached read to flush write buffer + b 1b + nop +9: + + // Complete the SDRAM setup. + la t0,GL_SDRAM_MODE + la t1,CPU_TO_LE(GL_SDRAM_MODE_ENABLE) + sw t1,0(t0) + // Wait 100us after writing mode + la a1,(CYGHWR_HAL_MIPS_RM7000_CPU_CLOCK * 100 / 1000000) + + lui a0,0xa000 // uncached bank0 device + sw zero,0(a0) + + mtc0 zero,$9 +1: mfc0 a0,$9 + nop + blt a0, a1, 1b + nop + + lui a0,0xa080 // uncached bank2 device + sw zero,0(a0) + + mtc0 zero,$9 +1: mfc0 a0,$9 + nop + blt a0, a1, 1b + nop + + la t0,GL_SDRAM_MODE + la t1,CPU_TO_LE(GL_SDRAM_MODE_NORMAL) + sw t1,0(t0) + + // Set CPU cfg word + la a0,GL_CPU_CFG + lw a1,0(a0) + la t0,CPU_TO_LE(0x20000) + or a1,a1,t0 // disable retries + + // CPU WriteRate - set GT to match CPU + mfc0 t0,$16 + la t1, 0x0f000000 + and t0, t0, t1 + beqz t0,1f // defaults to zero + nop + la t0, CPU_TO_LE(GL_CPU_CFG_WRITERATE) + or a1, a1, t0 +1: + sw a1,0(a0) + + # FIXME: Hardwired for 256MB - need kuseg magic to map full 512MB. + # + # Setup SDRAM Bank 0 Address Decoding + # + la s7, HAL_GALILEO_CONTROLLER_BASE + la a0, HAL_OCELOT_RAM_BASE # Phys bottom of Bank 0 + la a1, (HAL_OCELOT_RAM_BASE+128*1024*1024) + subu a1, 1 # Phys top of Bank0 + + srl t0, a0, HAL_GALILEO_CPU_DECODE_SHIFT # Setup SCS[1:0] + swap(t0,t1,t2,t3) # 1st level decoding + sw t0, HAL_GALILEO_SCS10_LD_OFFSET(s7) # (CPU Decode Region) + srl t0, a1, HAL_GALILEO_CPU_DECODE_SHIFT # + swap(t0,t1,t2,t3) + sw t0, HAL_GALILEO_SCS10_HD_OFFSET(s7) # + + srl t0, a0, HAL_GALILEO_DEV_DECODE_SHIFT # Setup SCS0 + swap(t0,t1,t2,t3) # 2nd level decoding + sw t0, HAL_GALILEO_SCS0_LD_OFFSET(s7) # (Device Sub-decode Region) + srl t0, a1, HAL_GALILEO_DEV_DECODE_SHIFT # + swap(t0,t1,t2,t3) + sw t0, HAL_GALILEO_SCS0_HD_OFFSET(s7) # + + # + # Setup SDRAM Bank 1 Address Decoding + # + la a0, (HAL_OCELOT_RAM_BASE+128*1024*1024) # Phys bottom of Bank 1 + la a1, (HAL_OCELOT_RAM_BASE+256*1024*1024) + subu a1, 1 # Phys top of Bank1 + + srl t0, a0, HAL_GALILEO_CPU_DECODE_SHIFT # Setup SCS[3:2] + swap(t0,t1,t2,t3) # 1st level decoding + sw t0, HAL_GALILEO_SCS32_LD_OFFSET(s7) # (CPU Decode Region) + srl t0, a1, HAL_GALILEO_CPU_DECODE_SHIFT # + swap(t0,t1,t2,t3) + sw t0, HAL_GALILEO_SCS32_HD_OFFSET(s7) # + + srl t0, a0, HAL_GALILEO_DEV_DECODE_SHIFT # Setup SCS2 + swap(t0,t1,t2,t3) # 2nd level decoding + sw t0, HAL_GALILEO_SCS2_LD_OFFSET(s7) # (Device Sub-decode Region) + srl t0, a1, HAL_GALILEO_DEV_DECODE_SHIFT # + swap(t0,t1,t2,t3) + sw t0, HAL_GALILEO_SCS2_HD_OFFSET(s7) # + + jr ra + nop + +FUNC_END(hal_memc_setup) + +##----------------------------------------------------------------------------- +## The initialization table + +hal_memc_setup_table: + + .long DELAY_LOOP, 10000 # Wait for HW to settle + + .long GL_DEV_PAR_BANK0, CPU_TO_LE(0x000b6b33) // PLD + .long GL_DEV_PAR_BANK1, CPU_TO_LE(0x000bad53) // NVRAM + .long GL_DEV_PAR_BANK2, CPU_TO_LE(0x000bad54) // UART + .long GL_DEV_PAR_BANK3, CPU_TO_LE(0x001fef73) // flash disk + .long GL_DEV_PAR_BOOT, CPU_TO_LE(0x144bee63) // boot flash + + .long GL_SDRAM_CFG, CPU_TO_LE(GL_SDRAM_CFG_init) + .long GL_SDRAM_PAR_BANK0, CPU_TO_LE(0x00000c69 | 0x4000) + .long GL_SDRAM_PAR_BANK2, CPU_TO_LE(0x00000c69 | 0x4000) + + .long GL_CPU_SCS10_LO, CPU_TO_LE(0x00000000) + .long GL_CPU_SCS10_HI, CPU_TO_LE(0x00000003) + .long GL_CPU_SCS32_LO, CPU_TO_LE(0x00000004) + .long GL_CPU_SCS32_HI, CPU_TO_LE(0x00000007) + + .long GL_SDRAM_SCS0_LO, CPU_TO_LE(0x00000000) + .long GL_SDRAM_SCS0_HI, CPU_TO_LE(0x00000007) + .long GL_SDRAM_SCS1_LO, CPU_TO_LE(0x000000ff) + .long GL_SDRAM_SCS1_HI, CPU_TO_LE(0x00000000) + .long GL_SDRAM_SCS2_LO, CPU_TO_LE(0x00000008) + .long GL_SDRAM_SCS2_HI, CPU_TO_LE(0x0000000f) + .long GL_SDRAM_SCS3_LO, CPU_TO_LE(0x000000ff) + .long GL_SDRAM_SCS3_HI, CPU_TO_LE(0x00000000) + + .long 0, 0 + +#endif // !CYG_HAL_STARTUP_RAM + +##----------------------------------------------------------------------------- +## ISR tables. + + .extern hal_default_isr + + .data + +#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_CHAIN + .globl hal_interrupt_handlers +hal_interrupt_handlers: + .long hal_default_isr # chaining vector + + .globl hal_interrupt_data +hal_interrupt_data: + .long 0 # chaining vector data + + .globl hal_interrupt_objects +hal_interrupt_objects: + .long 0 # chaining vector object + + .globl cyg_hal_interrupt_level +cyg_hal_interrupt_level: + .rept CYGNUM_HAL_ISR_COUNT + .byte 0 + .endr + +#else // CYGIMP_HAL_COMMON_INTERRUPTS_CHAIN + + .globl hal_interrupt_handlers +hal_interrupt_handlers: + .long hal_default_isr + .long hal_default_isr + .long hal_default_isr + .long hal_default_isr + .long hal_default_isr + .long hal_default_isr + .long hal_default_isr + .long hal_default_isr + .long hal_default_isr + .long hal_default_isr + + .rept CYGNUM_HAL_ISR_COUNT-10 + .long hal_default_isr + .endr + + .globl hal_interrupt_data +hal_interrupt_data: + .long 0 + .long 0 + .long 0 + .long 0 + .long 0 + .long 0 + .long 0 + .long 0 + .long 0 + .long 0 + + .rept CYGNUM_HAL_ISR_COUNT-10 + .long 0 + .endr + + .globl hal_interrupt_objects +hal_interrupt_objects: + .rept CYGNUM_HAL_ISR_COUNT + .long 0 + .endr + + .globl cyg_hal_interrupt_level +cyg_hal_interrupt_level: + .rept CYGNUM_HAL_ISR_COUNT + .byte 0 + .endr + +#endif // CYGIMP_HAL_COMMON_INTERRUPTS_CHAIN + +##----------------------------------------------------------------------------- +## end of platform.S diff --git a/packages/hal/mips/rm7000/ocelot/current/src/plf_misc.c b/packages/hal/mips/rm7000/ocelot/current/src/plf_misc.c new file mode 100644 --- /dev/null +++ b/packages/hal/mips/rm7000/ocelot/current/src/plf_misc.c @@ -0,0 +1,330 @@ +//========================================================================== +// +// plf_misc.c +// +// HAL platform miscellaneous functions +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jskov +// Contributors: jskov +// Date: 2000-11-30 +// Purpose: HAL miscellaneous functions +// Description: This file contains miscellaneous functions provided by the +// HAL. +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include + +#include // Base types + +#include // architectural definitions +#include // Interrupt handling + +#include // Calling interface definitions + +#if defined(CYGPKG_IO_PCI) +#include +#include +#endif + +//-------------------------------------------------------------------------- + +void hal_platform_init(void) +{ + hal_if_init(); + + // FIXME: Set up Galileo interrupt controller? + + // Unmask vectors which are entry points for interrupt controllers +// HAL_INTERRUPT_UNMASK(CYGNUM_HAL_INTERRUPT_21555); +// HAL_INTERRUPT_UNMASK(CYGNUM_HAL_INTERRUPT_GALILEO); +} + +//-------------------------------------------------------------------------- +// PCI support +#if defined(CYGPKG_IO_PCI) + +static int __check_bar(cyg_uint32 addr, cyg_uint32 size) +{ + int n; + + for (n = 0; n <= 31; n++) + if (size == (1 << n)) { + /* Check that address is naturally aligned */ + if (addr != (addr & ~(size-1))) + return 0; + return size - 1; + } + return 0; +} + + +// One-time PCI initialization. + +void cyg_hal_plf_pci_init(void) +{ + cyg_uint32 bar_ena, start10, start32, end, size; + cyg_uint8 next_bus; + + // Program PCI window in CPU address space and CPU->PCI remap + HAL_GALILEO_PUTREG(HAL_GALILEO_PCIMEM0_LD_OFFSET, + HAL_OCELOT_PCI_MEM0_BASE >> HAL_GALILEO_CPU_DECODE_SHIFT); + HAL_GALILEO_PUTREG(HAL_GALILEO_PCIMEM0_HD_OFFSET, + (HAL_OCELOT_PCI_MEM0_BASE+HAL_OCELOT_PCI_MEM0_SIZE-1) >> HAL_GALILEO_CPU_DECODE_SHIFT); + + HAL_GALILEO_PUTREG(HAL_GALILEO_PCIMEM1_LD_OFFSET, + HAL_OCELOT_PCI_MEM1_BASE >> HAL_GALILEO_CPU_DECODE_SHIFT); + HAL_GALILEO_PUTREG(HAL_GALILEO_PCIMEM1_HD_OFFSET, + (HAL_OCELOT_PCI_MEM1_BASE+HAL_OCELOT_PCI_MEM1_SIZE-1) >> HAL_GALILEO_CPU_DECODE_SHIFT); + + HAL_GALILEO_PUTREG(HAL_GALILEO_PCIIO_LD_OFFSET, + HAL_OCELOT_PCI_IO_BASE >> HAL_GALILEO_CPU_DECODE_SHIFT); + HAL_GALILEO_PUTREG(HAL_GALILEO_PCIIO_HD_OFFSET, + (HAL_OCELOT_PCI_IO_BASE+HAL_OCELOT_PCI_IO_SIZE-1) >> HAL_GALILEO_CPU_DECODE_SHIFT); + + // Setup for bus mastering + cyg_hal_plf_pci_cfg_write_dword(0, CYG_PCI_DEV_MAKE_DEVFN(0,0), + CYG_PCI_CFG_COMMAND, + CYG_PCI_CFG_COMMAND_IO | + CYG_PCI_CFG_COMMAND_MEMORY | + CYG_PCI_CFG_COMMAND_MASTER | + CYG_PCI_CFG_COMMAND_PARITY | + CYG_PCI_CFG_COMMAND_SERR); + + // Setup latency timer field + cyg_hal_plf_pci_cfg_write_byte(0, CYG_PCI_DEV_MAKE_DEVFN(0,0), + CYG_PCI_CFG_LATENCY_TIMER, 6); + + // Disable all BARs + bar_ena = 0x1ff; + + // Allow PCI bus to access local memory + // Check for active SCS10 + start10 = HAL_GALILEO_GETREG(HAL_GALILEO_SCS10_LD_OFFSET) << HAL_GALILEO_CPU_DECODE_SHIFT; + end = ((HAL_GALILEO_GETREG(HAL_GALILEO_SCS10_HD_OFFSET) & 0x7f) + 1) << HAL_GALILEO_CPU_DECODE_SHIFT; + if (end > start10) { + if ((size = __check_bar(start10, end - start10)) != 0) { + // Enable BAR + HAL_GALILEO_PUTREG(HAL_GALILEO_PCI0_SCS10_SIZE_OFFSET, size); + bar_ena &= ~HAL_GALILEO_BAR_ENA_SCS10; + } + } + + // Check for active SCS32 + start32 = HAL_GALILEO_GETREG(HAL_GALILEO_SCS32_LD_OFFSET) << HAL_GALILEO_CPU_DECODE_SHIFT; + end = ((HAL_GALILEO_GETREG(HAL_GALILEO_SCS32_HD_OFFSET) & 0x7f) + 1) << HAL_GALILEO_CPU_DECODE_SHIFT; + if (end > start32) { + if ((size = __check_bar(start32, end - start32)) != 0) { + // Enable BAR + HAL_GALILEO_PUTREG(HAL_GALILEO_PCI0_SCS32_SIZE_OFFSET, size); + bar_ena &= ~HAL_GALILEO_BAR_ENA_SCS32; + } + } + + bar_ena &= ~HAL_GALILEO_BAR_ENA_SCS10; + + HAL_GALILEO_PUTREG(HAL_GALILEO_BAR_ENA_OFFSET, bar_ena); + + cyg_hal_plf_pci_cfg_write_dword(0, CYG_PCI_DEV_MAKE_DEVFN(0,0), + CYG_PCI_CFG_BAR_0, 0xffffffff); + + end = cyg_hal_plf_pci_cfg_read_dword(0, CYG_PCI_DEV_MAKE_DEVFN(0,0), + CYG_PCI_CFG_BAR_0); + + cyg_hal_plf_pci_cfg_write_dword(0, CYG_PCI_DEV_MAKE_DEVFN(0,0), + CYG_PCI_CFG_BAR_0, start10); + + + cyg_hal_plf_pci_cfg_write_dword(0, CYG_PCI_DEV_MAKE_DEVFN(0,0), + CYG_PCI_CFG_BAR_1, 0xffffffff); + + end = cyg_hal_plf_pci_cfg_read_dword(0, CYG_PCI_DEV_MAKE_DEVFN(0,0), + CYG_PCI_CFG_BAR_1); + + cyg_hal_plf_pci_cfg_write_dword(0, CYG_PCI_DEV_MAKE_DEVFN(0,0), + CYG_PCI_CFG_BAR_1, start32); + + // Configure PCI bus. + next_bus = 1; + cyg_pci_configure_bus(0, &next_bus); +} + + +// Check for configuration error. +static int pci_config_errcheck(void) +{ + cyg_uint32 irq; + + // Check for master or target abort + irq = HAL_GALILEO_GETREG(HAL_GALILEO_IRQ_CAUSE_OFFSET); + + if (irq & (HAL_GALILEO_IRQCAUSE_MASABT | HAL_GALILEO_IRQCAUSE_TARABT)) { + // Error. Clear bits. + HAL_GALILEO_PUTREG(HAL_GALILEO_IRQ_CAUSE_OFFSET, + ~(HAL_GALILEO_IRQCAUSE_MASABT | HAL_GALILEO_IRQCAUSE_TARABT)); + return 1; + } + return 0; +} + +cyg_uint32 cyg_hal_plf_pci_cfg_read_dword (cyg_uint32 bus, + cyg_uint32 devfn, + cyg_uint32 offset) +{ + cyg_uint32 config_dword; + + HAL_GALILEO_PUTREG(HAL_GALILEO_PCI0_CONFIG_ADDR_OFFSET, + HAL_GALILEO_PCI0_CONFIG_ADDR_ENABLE | + (bus << 16) | (devfn << 8) | offset); + + HAL_GALILEO_GETPCI(bus, devfn, + HAL_GALILEO_PCI0_CONFIG_DATA_OFFSET, config_dword); + + if (pci_config_errcheck()) + return 0xffffffff; + return config_dword; +} + +cyg_uint16 cyg_hal_plf_pci_cfg_read_word (cyg_uint32 bus, + cyg_uint32 devfn, + cyg_uint32 offset) +{ + cyg_uint32 config_dword; + cyg_uint16 config_word; + + HAL_GALILEO_PUTREG(HAL_GALILEO_PCI0_CONFIG_ADDR_OFFSET, + HAL_GALILEO_PCI0_CONFIG_ADDR_ENABLE | + (bus << 16) | (devfn << 8) | (offset & ~3)); + + HAL_GALILEO_GETPCI(bus, devfn, + HAL_GALILEO_PCI0_CONFIG_DATA_OFFSET, config_dword); + config_word = (cyg_uint16)((config_dword >> ((offset & 3) * 8)) & 0xffff); + + if (pci_config_errcheck()) + return 0xffff; + + return config_word; +} + +cyg_uint8 cyg_hal_plf_pci_cfg_read_byte (cyg_uint32 bus, + cyg_uint32 devfn, + cyg_uint32 offset) +{ + cyg_uint32 config_dword; + cyg_uint8 config_byte; + + HAL_GALILEO_PUTREG(HAL_GALILEO_PCI0_CONFIG_ADDR_OFFSET, + HAL_GALILEO_PCI0_CONFIG_ADDR_ENABLE | + (bus << 16) | (devfn << 8) | (offset & ~3)); + + HAL_GALILEO_GETPCI(bus, devfn, + HAL_GALILEO_PCI0_CONFIG_DATA_OFFSET, config_dword); + config_byte = (cyg_uint8)((config_dword >> ((offset & 3) * 8)) & 0xff); + + if (pci_config_errcheck()) + return 0xff; + + return config_byte; +} + +void cyg_hal_plf_pci_cfg_write_dword (cyg_uint32 bus, + cyg_uint32 devfn, + cyg_uint32 offset, + cyg_uint32 data) +{ + HAL_GALILEO_PUTREG(HAL_GALILEO_PCI0_CONFIG_ADDR_OFFSET, + HAL_GALILEO_PCI0_CONFIG_ADDR_ENABLE | + (bus << 16) | (devfn << 8) | offset); + + HAL_GALILEO_PUTPCI(bus, devfn, + HAL_GALILEO_PCI0_CONFIG_DATA_OFFSET, data); + + (void)pci_config_errcheck(); +} + +void cyg_hal_plf_pci_cfg_write_word (cyg_uint32 bus, + cyg_uint32 devfn, + cyg_uint32 offset, + cyg_uint16 data) +{ + cyg_uint32 config_dword, shift; + + HAL_GALILEO_PUTREG(HAL_GALILEO_PCI0_CONFIG_ADDR_OFFSET, + HAL_GALILEO_PCI0_CONFIG_ADDR_ENABLE | + (bus << 16) | (devfn << 8) | (offset & ~3)); + + + HAL_GALILEO_GETPCI(bus, devfn, + HAL_GALILEO_PCI0_CONFIG_DATA_OFFSET, config_dword); + if (pci_config_errcheck()) + return; + + shift = (offset & 3) * 8; + config_dword &= ~(0xffff << shift); + config_dword |= (data << shift); + + HAL_GALILEO_PUTPCI(bus, devfn, + HAL_GALILEO_PCI0_CONFIG_DATA_OFFSET, config_dword); + + (void)pci_config_errcheck(); +} + +void cyg_hal_plf_pci_cfg_write_byte (cyg_uint32 bus, + cyg_uint32 devfn, + cyg_uint32 offset, + cyg_uint8 data) +{ + cyg_uint32 config_dword, shift; + + HAL_GALILEO_PUTREG(HAL_GALILEO_PCI0_CONFIG_ADDR_OFFSET, + HAL_GALILEO_PCI0_CONFIG_ADDR_ENABLE | + (bus << 16) | (devfn << 8) | (offset & ~3)); + + HAL_GALILEO_GETPCI(bus, devfn, + HAL_GALILEO_PCI0_CONFIG_DATA_OFFSET, config_dword); + if (pci_config_errcheck()) + return; + + shift = (offset & 3) * 8; + config_dword &= ~(0xff << shift); + config_dword |= (data << shift); + + HAL_GALILEO_PUTPCI(bus, devfn, + HAL_GALILEO_PCI0_CONFIG_DATA_OFFSET, config_dword); + + (void)pci_config_errcheck(); +} + +#endif // CYGPKG_IO_PCI + +//-------------------------------------------------------------------------- +// End of plf_misc.c diff --git a/packages/hal/mips/rm7000/ocelot/current/src/plf_mk_defs.c b/packages/hal/mips/rm7000/ocelot/current/src/plf_mk_defs.c new file mode 100644 --- /dev/null +++ b/packages/hal/mips/rm7000/ocelot/current/src/plf_mk_defs.c @@ -0,0 +1,82 @@ +//========================================================================== +// +// plf_mk_defs.c +// +// HAL (platform) "make defs" program +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas, jskov +// Date: 2000-11-30 +// Purpose: Platform dependent definition generator +// Description: This file contains code that can be compiled by the target +// compiler and used to generate machine specific definitions +// suitable for use in assembly code. +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include + +#include // HAL header +#include // HAL header +#include // HAL header +#ifdef CYGPKG_KERNEL +# include +# include +#endif + +/* + * This program is used to generate definitions needed by + * assembly language modules. + * + * This technique was first used in the OSF Mach kernel code: + * generate asm statements containing #defines, + * compile this file to assembler, and then extract the + * #defines from the assembly-language output. + */ + +#define DEFINE(sym, val) \ + asm volatile("\n\t.equ\t" #sym ",%0" : : "i" (val)) + +int +main(void) +{ + // Some other exception related definitions + DEFINE(CYGNUM_HAL_ISR_COUNT, CYGNUM_HAL_ISR_COUNT); + DEFINE(CYGNUM_HAL_VSR_COUNT, CYGNUM_HAL_VSR_COUNT); + DEFINE(CYGNUM_HAL_VECTOR_INTERRUPT, CYGNUM_HAL_VECTOR_INTERRUPT); + DEFINE(CYGNUM_HAL_VECTOR_BREAKPOINT, CYGNUM_HAL_VECTOR_BREAKPOINT); + + return 0; +} + +//-------------------------------------------------------------------------- +// EOF plf_mk_defs.c diff --git a/packages/hal/mips/rm7000/ocelot/current/src/plf_stub.c b/packages/hal/mips/rm7000/ocelot/current/src/plf_stub.c new file mode 100644 --- /dev/null +++ b/packages/hal/mips/rm7000/ocelot/current/src/plf_stub.c @@ -0,0 +1,61 @@ +//============================================================================= +// +// plf_stub.c +// +// Platform specific code for GDB stub support. +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jskov +// Contributors:jskov +// Date: 2000-05-15 +// Purpose: Platform specific code for GDB stub support. +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include + +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + +#include + +#include // HAL IO macros + +//----------------------------------------------------------------------------- +// Stub init + +void +hal_plf_stub_init(void) +{ +} + +#endif // ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS +//----------------------------------------------------------------------------- +// End of plf_stub.c diff --git a/packages/hal/mips/rm7000/var/current/ChangeLog b/packages/hal/mips/rm7000/var/current/ChangeLog new file mode 100644 --- /dev/null +++ b/packages/hal/mips/rm7000/var/current/ChangeLog @@ -0,0 +1,62 @@ +2001-01-26 Jesper Skov + + * include/variant.inc: Remove hal_intc_decode macro since it's a + change needed in arch. + +2001-01-25 Jesper Skov + + * include/variant.inc: Added hal_intc_decode macro which masks the + cause register with the status register. Works around what would + appear to be a HW bug. + +2001-01-19 Jesper Skov + + * src/var_misc.c (hal_variant_init): Enable caches. + + * include/variant.inc: Fixed typos in icache clear code. + +2001-01-10 Jesper Skov + + * cdl/hal_mips_rm7000.cdl: Fix typo. + +2000-12-07 Jesper Skov + + * src/var_misc.c (hal_variant_init): Disable caches until flash + stuff is working. + +2000-12-06 Jesper Skov + + * src/mips_rm7000.ld: Include extras.o regardless of CYGPKG_IO + presence. + + * src/var_misc.c: Enable caches. + +2000-11-30 Jesper Skov + + * Cloned from hal/mips/tx49 + +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//=========================================================================== diff --git a/packages/hal/mips/rm7000/var/current/cdl/hal_mips_rm7000.cdl b/packages/hal/mips/rm7000/var/current/cdl/hal_mips_rm7000.cdl new file mode 100644 --- /dev/null +++ b/packages/hal/mips/rm7000/var/current/cdl/hal_mips_rm7000.cdl @@ -0,0 +1,141 @@ +# ==================================================================== +# +# hal_mips_rm7000.cdl +# +# MIPS/RM7000 variant architectural HAL package configuration data +# +# ==================================================================== +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Red Hat eCos Public License +# Version 1.1 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://www.redhat.com/ +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Configurable Operating System, +# released September 30, 1998. +# +# The Initial Developer of the Original Code is Red Hat. +# Portions created by Red Hat are +# Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +# All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +# ==================================================================== +######DESCRIPTIONBEGIN#### +# +# Author(s): jskov +# Original data: bartv, nickg +# Contributors: +# Date: 2000-05-15 +# +#####DESCRIPTIONEND#### +# +# ==================================================================== + +cdl_package CYGPKG_HAL_MIPS_RM7000 { + display "RM7000 variant" + parent CYGPKG_HAL_MIPS + hardware + include_dir cyg/hal + define_header hal_mips_rm7000.h + description " + The RM7000 architecture HAL package provides generic support + for this processor architecture. It is also necessary to + select a specific target platform HAL package." + + cdl_component CYGPKG_HAL_MIPS_RM7000A { + display "RM7000A microprocessor" + default_value 1 + implements CYGINT_HAL_MIPS_VARIANT + description " + The RM7000A microprocessor. This is chip which in addition to + the RM7000 processor core has built in second level cache + of 256kB." + + define_proc { + # Sizes are configurable (on the core). Should be configurable. + puts $::cdl_header "#define CYGHWR_HAL_DCACHE_SIZE 16384" + puts $::cdl_header "#define CYGHWR_HAL_ICACHE_SIZE 16384" + } + + cdl_option CYGHWR_HAL_MIPS_64BIT { + display "Variant 64 bit architecture support" + description " + While the RM7000 is a 64bit CPU, only its 32bit mode is + currently supported in eCos." + calculated 0 + } + + # This is optional (on the core). Should be configurable. + cdl_option CYGHWR_HAL_MIPS_FPU { + display "Variant FPU support" + calculated 1 + } + + cdl_interface CYGINT_HAL_MIPS_FPU_64BIT { + display "Variant 64 bit FPU support interface" + } + + cdl_option CYGHWR_HAL_MIPS_FPU_64BIT { + display "Variant 64 bit FPU support" + calculated { CYGINT_HAL_MIPS_FPU_64BIT == 1 ? 1 : 0 } + } + + cdl_option CYGHWR_HAL_MIPS_FPU_32BIT { + display "Variant 32 bit FPU support" + calculated { CYGINT_HAL_MIPS_FPU_64BIT == 0 ? 1 : 0 } + } + + # FGRn+1 is most significant part of the FGRn&FGRn+1 pair of FPRn/2 + # This is true for BE mips2 mode at least. Not sure about fp64 mode + cdl_option CYGPKG_HAL_MIPS_DOUBLE_LSBFIRST { + active_if CYGHWR_HAL_MIPS_FPU_32BIT + calculated 1 + } + + cdl_interface CYGINT_HAL_MIPS_MSBFIRST { + no_define + display "CPU Variant big-endian interface" + } + + cdl_option CYGPKG_HAL_MIPS_MSBFIRST { + display "CPU Variant big-endian" + calculated { CYGINT_HAL_MIPS_MSBFIRST == 0 ? 0 : 1 } + } + + cdl_option CYGPKG_HAL_MIPS_LSBFIRST { + display "CPU Variant little-endian" + calculated { CYGINT_HAL_MIPS_MSBFIRST != 0 ? 0 : 1 } + } + } + + define_proc { + puts $::cdl_header "#include " + } + + compile var_misc.c variant.S + + make { + /lib/target.ld: /src/mips_rm7000.ld + $(CC) -E -P -Wp,-MD,target.tmp -DEXTRAS=1 -xc $(INCLUDE_PATH) $(CFLAGS) -o $@ $< + @echo $@ ": \\" > $(notdir $@).deps + @tail +2 target.tmp >> $(notdir $@).deps + @echo >> $(notdir $@).deps + @rm target.tmp + } + + cdl_option CYGBLD_LINKER_SCRIPT { + display "Linker script" + flavor data + no_define + calculated { "src/mips_rm7000.ld" } + } +} diff --git a/packages/hal/mips/rm7000/var/current/include/var_arch.h b/packages/hal/mips/rm7000/var/current/include/var_arch.h new file mode 100644 --- /dev/null +++ b/packages/hal/mips/rm7000/var/current/include/var_arch.h @@ -0,0 +1,62 @@ +#ifndef CYGONCE_HAL_VAR_ARCH_H +#define CYGONCE_HAL_VAR_ARCH_H + +//========================================================================== +// +// var_arch.h +// +// Architecture specific abstractions +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg +// Contributors: nickg, jskov +// Date: 2000-05-15 +// Purpose: Define architecture abstractions +// Description: This file contains any extra or modified definitions for +// this variant of the architecture. +// Usage: #include +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include +#include + +// ------------------------------------------------------------------------- +// Although the RM7000 is really a 64 bit CPU, we have defined +// target_register_t elsewhere to be 32-bits because we only support +// 32-bit mode. Registers will still be sent to GDB as 64-bit, but that's +// not relevant for CYG_HAL_GDB_REG. + +#define CYG_HAL_GDB_REG CYG_WORD32 + +//-------------------------------------------------------------------------- +#endif // CYGONCE_HAL_VAR_ARCH_H +// End of var_arch.h diff --git a/packages/hal/mips/rm7000/var/current/include/var_cache.h b/packages/hal/mips/rm7000/var/current/include/var_cache.h new file mode 100644 --- /dev/null +++ b/packages/hal/mips/rm7000/var/current/include/var_cache.h @@ -0,0 +1,179 @@ +#ifndef CYGONCE_VAR_CACHE_H +#define CYGONCE_VAR_CACHE_H + +//============================================================================= +// +// var_cache.h +// +// HAL cache control API +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg +// Contributors:nickg, jskov +// Date: 2000-05-09 +// Purpose: Cache control API +// Description: The macros defined here provide the HAL APIs for handling +// cache control operations. +// Usage: +// #include +// ... +// +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include +#include + +#include + +#include + +//============================================================================= +// QED RM7000A + +#ifdef CYGPKG_HAL_MIPS_RM7000A + +//----------------------------------------------------------------------------- +// Cache dimensions + +// Data cache +#define HAL_DCACHE_SIZE CYGHWR_HAL_DCACHE_SIZE // size in bytes +#define HAL_DCACHE_LINE_SIZE 32 // Size of a data cache line +#define HAL_DCACHE_WAYS 4 // Associativity of the cache + +// Instruction cache +#define HAL_ICACHE_SIZE CYGHWR_HAL_ICACHE_SIZE // size in bytes +#define HAL_ICACHE_LINE_SIZE 32 // Size of a cache line +#define HAL_ICACHE_WAYS 4 // Associativity of the cache + +#define HAL_DCACHE_SETS (HAL_DCACHE_SIZE/(HAL_DCACHE_LINE_SIZE*HAL_DCACHE_WAYS)) +#define HAL_ICACHE_SETS (HAL_ICACHE_SIZE/(HAL_ICACHE_LINE_SIZE*HAL_ICACHE_WAYS)) + +//----------------------------------------------------------------------------- +// Global control of data cache + +//----------------------------------------------------------------------------- +//The RM7000 mostly uses the default MIPS cache controls defined in +//hal_cache.h Here we define the cache enable and disable macros. The +//only control we appear to have is the kseg0 cache state in +//config0. So all these macros at present manipulate this. + +#ifndef HAL_DCACHE_ENABLE_DEFINED +#define HAL_DCACHE_ENABLE() \ +CYG_MACRO_START \ + asm volatile ( "mfc0 $2,$16\n" \ + "nop; nop; nop\n" \ + "la $3,0xFFFFFFF8\n" \ + "and $2,$2,$3\n" \ + "ori $2,$2,3\n" \ + "mtc0 $2,$16\n" \ + "nop; nop; nop;\n" \ + : \ + : \ + : "$2", "$3" \ + ); \ +CYG_MACRO_END +#define HAL_DCACHE_ENABLE_DEFINED +#endif + +// Disable the data cache +#ifndef HAL_DCACHE_DISABLE_DEFINED +#define HAL_DCACHE_DISABLE() \ +CYG_MACRO_START \ + asm volatile ( "mfc0 $2,$16\n" \ + "nop; nop; nop\n" \ + "la $3,0xFFFFFFF8\n" \ + "and $2,$2,$3\n" \ + "ori $2,$2,2\n" \ + "mtc0 $2,$16\n" \ + "nop; nop; nop;\n" \ + : \ + : \ + : "$2", "$3" \ + ); \ +CYG_MACRO_END +#define HAL_DCACHE_DISABLE_DEFINED +#endif + +#ifndef HAL_DCACHE_IS_ENABLED_DEFINED +#define HAL_DCACHE_IS_ENABLED(_state_) \ +CYG_MACRO_START \ + CYG_WORD32 _cstate_; \ + asm volatile ( "mfc0 %0,$16\n" \ + : "=r"(_cstate_) \ + ); \ + if( (_cstate_ & 7) == 2 ) _state_ = 0; \ + else _state_ = 1; \ +CYG_MACRO_END +#define HAL_DCACHE_IS_ENABLED_DEFINED +#endif + +#ifndef HAL_ICACHE_ENABLE_DEFINED +#define HAL_ICACHE_ENABLE() HAL_DCACHE_ENABLE() +#define HAL_ICACHE_ENABLE_DEFINED +#endif + +// Disable the instruction cache +#ifndef HAL_ICACHE_DISABLE_DEFINED +#define HAL_ICACHE_DISABLE() HAL_DCACHE_DISABLE() +#define HAL_ICACHE_DISABLE_DEFINED +#endif + +#ifndef HAL_ICACHE_IS_ENABLED_DEFINED +#define HAL_ICACHE_IS_ENABLED(_state_) HAL_DCACHE_IS_ENABLED(_state_) +#define HAL_ICACHE_IS_ENABLED_DEFINED +#endif + +#if 0 // FIXME: Need this for RM7000A also? +// TX49 cache instruction must not affect the line it executes out of, +// so disable instruction cache before invalidating it. +#define HAL_ICACHE_INVALIDATE_ALL_DEFINED +#define HAL_ICACHE_INVALIDATE_ALL() \ + CYG_MACRO_START \ + register CYG_ADDRESS _baddr_ = 0x80000000; \ + register CYG_ADDRESS _addr_ = 0x80000000; \ + register CYG_WORD _state_; \ + _HAL_ASM_SET_MIPS_ISA(3); \ + HAL_ICACHE_IS_ENABLED( _state_ ); \ + HAL_ICACHE_DISABLE(); \ + for( ; _addr_ < _baddr_+HAL_ICACHE_SIZE; _addr_ += HAL_ICACHE_LINE_SIZE ) \ + { _HAL_ASM_ICACHE_ALL_WAYS(0x00, _addr_); } \ + if( _state_ ) HAL_ICACHE_ENABLE(); \ + _HAL_ASM_SET_MIPS_ISA(0); \ + CYG_MACRO_END +#endif + +#endif // CYGPKG_HAL_MIPS_RM7000A + + +//----------------------------------------------------------------------------- +#endif // ifndef CYGONCE_VAR_CACHE_H +// End of var_cache.h diff --git a/packages/hal/mips/rm7000/var/current/include/var_intr.h b/packages/hal/mips/rm7000/var/current/include/var_intr.h new file mode 100644 --- /dev/null +++ b/packages/hal/mips/rm7000/var/current/include/var_intr.h @@ -0,0 +1,72 @@ +#ifndef CYGONCE_HAL_VAR_INTR_H +#define CYGONCE_HAL_VAR_INTR_H + +//========================================================================== +// +// imp_intr.h +// +// RM7000 Interrupt and clock support +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jskov +// Contributors: jskov +// Date: 2000-05-09 +// Purpose: RM7000 Interrupt support +// Description: The macros defined here provide the HAL APIs for handling +// interrupts and the clock for variants of the RM7000 MIPS +// architecture. +// +// Usage: +// #include +// ... +// +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include + +#include + + +//-------------------------------------------------------------------------- +// Interrupt vectors. + +// Vectors and handling of these are defined in platform HALs since the +// CPU itself does not have a builtin interrupt controller. + +//-------------------------------------------------------------------------- +// Clock control + +// This is handled by the default code + +//-------------------------------------------------------------------------- +#endif // ifndef CYGONCE_HAL_VAR_INTR_H +// End of var_intr.h diff --git a/packages/hal/mips/rm7000/var/current/include/variant.inc b/packages/hal/mips/rm7000/var/current/include/variant.inc new file mode 100644 --- /dev/null +++ b/packages/hal/mips/rm7000/var/current/include/variant.inc @@ -0,0 +1,147 @@ +#ifndef CYGONCE_HAL_VARIANT_INC +#define CYGONCE_HAL_VARIANT_INC +##============================================================================= +## +## variant.inc +## +## RM7000 family assembler header file +## +##============================================================================= +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Red Hat eCos Public License +# Version 1.1 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://www.redhat.com/ +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Configurable Operating System, +# released September 30, 1998. +# +# The Initial Developer of the Original Code is Red Hat. +# Portions created by Red Hat are +# Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +# All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +##============================================================================= +#######DESCRIPTIONBEGIN#### +## +## Author(s): nickg +## Contributors:nickg, jskov +## Date: 2000-05-10 +## Purpose: RM7000 family definitions. +## Description: This file contains various definitions and macros that are +## useful for writing assembly code for the RM7000 CPU family. +## Usage: +## #include +## ... +## +## +######DESCRIPTIONEND#### +## +##============================================================================= + +#include + +#include + +##----------------------------------------------------------------------------- +## Define CPU variant for architecture HAL. + +#define CYG_HAL_MIPS_RM7000 + +#------------------------------------------------------------------------------ +# Set up initial value for config register. Sets endian mode and +# disables the cache on kseg0. + +#if defined(CYGPKG_HAL_MIPS_MSBFIRST) +# define INITIAL_CONFIG0 0x00008002 +#elif defined(CYGPKG_HAL_MIPS_LSBFIRST) +# define INITIAL_CONFIG0 0x00000002 +#else +# error MIPS endianness not set by configuration +#endif + +#------------------------------------------------------------------------------ +# Set up initial value for FPU FCR31 register. We set the FS bit to flush +# denormalized results to zero and enable div-by-zero exceptions. + +#ifndef CYG_HAL_MIPS_FCSR_INIT +#define CYG_HAL_MIPS_FCSR_INIT 0x01000400 +#endif + +#------------------------------------------------------------------------------ +# Cache macros. + +#ifndef CYGPKG_HAL_MIPS_CACHE_DEFINED + + .macro hal_cache_init + + mfc0 v0,config0 # disable Kseg0 caching in config0 register + nop + nop + la v1,0xfffffff8 + and v0,v0,v1 + ori v0,v0,2 + mtc0 v0,config0 + nop + nop + nop + + .set mips3 # Set ISA to MIPS 3 to allow cache insns + + # Now ensure the caches are invalidated. The caches are NOT cleared or + # invalidated on non-power-up resets and may come up in a random state + # on power-up. Hence they may contain stale or randomly bogus data. + # Here we use the index-store-tag cache operation to clear all the + # cache tags and states to zero. This will render them all invalid on + # the RM7000. + + # D-cache: + la t0,0x80000000 + ori t1,t0,0x4000 +1: + mtc0 zero,$28 + mtc0 zero,$29 + cache 0x09,0x0000(t0) + cache 0x09,0x1000(t0) + cache 0x09,0x2000(t0) + cache 0x09,0x3000(t0) + addi t0,t0,0x20 + sub v0,t1,t0 + bgez v0,1b + nop # delay slot + + # I-cache: + la a0,0x80000000 + ori a1,a0,0x4000 +1: + mtc0 zero,$28 + mtc0 zero,$29 + cache 0x08,0x0000(a0) + cache 0x08,0x1000(a0) + cache 0x08,0x2000(a0) + cache 0x08,0x3000(a0) + addi a0,a0,0x20 + sub v0,a1,a0 + bgez v0,1b + nop # delay slot + + .set mips0 # reset ISA to default + + .endm + +#define CYGPKG_HAL_MIPS_CACHE_DEFINED + +#endif + +#------------------------------------------------------------------------------ +#endif // ifndef CYGONCE_HAL_VARIANT_INC +# end of variant.inc diff --git a/packages/hal/mips/rm7000/var/current/src/mips_rm7000.ld b/packages/hal/mips/rm7000/var/current/src/mips_rm7000.ld new file mode 100644 --- /dev/null +++ b/packages/hal/mips/rm7000/var/current/src/mips_rm7000.ld @@ -0,0 +1,359 @@ +//=========================================================================== +// +// MLT linker script for MIPS RM7000 +// +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//=========================================================================== + +#include + +OUTPUT_FORMAT("elf32-bigmips", "elf32-bigmips", + "elf32-littlemips") +/* The preprocessor defines mips, but we know we're mips :-) */ +#undef mips +OUTPUT_ARCH(mips:5000) + +STARTUP(vectors.o) +ENTRY(reset_vector) +#if defined(EXTRAS) +INPUT(extras.o) +#endif +GROUP(libtarget.a libgcc.a) + +/* FIXME: The MLT should pass in the required alignment since it must be + * the same as the VMA's alignment. As a result of this bug, all the + * ROM mlt files have alignment 8, when some should have alignment 4 + * (902557-CR) + */ +#define ALIGN_LMA 8 +#define FOLLOWING(_section_) AT ((LOADADDR (_section_) + SIZEOF (_section_) + ALIGN_LMA - 1) & ~ (ALIGN_LMA - 1)) +#define LMA_EQ_VMA +#define FORCE_OUTPUT . = . + +#define SECTIONS_BEGIN + +#if defined(CYG_HAL_STARTUP_RAM) + +/* this version for RAM startup */ +#define SECTION_rom_vectors(_region_, _vma_, _lma_) \ + .rom_vectors _vma_ : _lma_ \ + { KEEP (*(.utlb_vector)) \ + . = ALIGN(0x80); KEEP(*(.other_vector)) \ + /* debug and reset vector not used in RAM version */ \ + KEEP(*(.debug_vector)) \ + KEEP (*(.reset_vector)) } \ + > _region_ + +#elif defined(CYG_HAL_STARTUP_ROM) + +/* this version for ROM startup */ +#define SECTION_rom_vectors(_region_, _vma_, _lma_) \ + .rom_vectors _vma_ : _lma_ \ + { KEEP (*(.reset_vector)) \ + . = ALIGN(0x100); KEEP (*(.utlb_vector)) \ + . = ALIGN(0x80); KEEP(*(.other_vector)) \ + . = ALIGN(0x100); KEEP(*(.debug_vector)) } \ + > _region_ + +#endif /* ROM startup version of ROM vectors */ + +#define SECTION_ROMISC(_region_, _vma_, _lma_) \ + .interp _vma_ : _lma_ { *(.interp) } > _region_ \ + .hash : FOLLOWING(.interp) { *(.hash) } > _region_ \ + .dynsym : FOLLOWING(.hash) { *(.dynsym) } > _region_ \ + .dynstr : FOLLOWING(.dynsym) { *(.dynstr) } > _region_ \ + .gnu.version : FOLLOWING(.dynstr) { *(.gnu.version) } > _region_ \ + .gnu.version_d : FOLLOWING(.gnu.version) { *(.gnu.version_d) } > _region_ \ + .gnu.version_r : FOLLOWING(.gnu.version_d) { *(.gnu.version_r) } > _region_ \ + .plt : FOLLOWING(.gnu.version_r) { *(.plt) } > _region_ + +#define SECTION_RELOCS(_region_, _vma_, _lma_) \ + .rel.text : \ + { \ + *(.rel.text) \ + *(.rel.text.*) \ + *(.rel.gnu.linkonce.t*) \ + } > _region_ \ + .rela.text : \ + { \ + *(.rela.text) \ + *(.rela.text.*) \ + *(.rela.gnu.linkonce.t*) \ + } > _region_ \ + .rel.data : \ + { \ + *(.rel.data) \ + *(.rel.data.*) \ + *(.rel.gnu.linkonce.d*) \ + } > _region_ \ + .rela.data : \ + { \ + *(.rela.data) \ + *(.rela.data.*) \ + *(.rela.gnu.linkonce.d*) \ + } > _region_ \ + .rel.rodata : \ + { \ + *(.rel.rodata) \ + *(.rel.rodata.*) \ + *(.rel.gnu.linkonce.r*) \ + } > _region_ \ + .rela.rodata : \ + { \ + *(.rela.rodata) \ + *(.rela.rodata.*) \ + *(.rela.gnu.linkonce.r*) \ + } > _region_ \ + .rel.got : { *(.rel.got) } > _region_ \ + .rela.got : { *(.rela.got) } > _region_ \ + .rel.ctors : { *(.rel.ctors) } > _region_ \ + .rela.ctors : { *(.rela.ctors) } > _region_ \ + .rel.dtors : { *(.rel.dtors) } > _region_ \ + .rela.dtors : { *(.rela.dtors) } > _region_ \ + .rel.init : { *(.rel.init) } > _region_ \ + .rela.init : { *(.rela.init) } > _region_ \ + .rel.fini : { *(.rel.fini) } > _region_ \ + .rela.fini : { *(.rela.fini) } > _region_ \ + .rel.bss : { *(.rel.bss) } > _region_ \ + .rela.bss : { *(.rela.bss) } > _region_ \ + .rel.plt : { *(.rel.plt) } > _region_ \ + .rela.plt : { *(.rela.plt) } > _region_ \ + .rel.dyn : { *(.rel.dyn) } > _region_ + +#define SECTION_init(_region_, _vma_, _lma_) \ + .init _vma_ : _lma_ \ + { \ + FORCE_OUTPUT; KEEP (*(.init)) \ + } > _region_ =0 + +#define SECTION_text(_region_, _vma_, _lma_) \ + .text _vma_ : _lma_ \ + { \ + _stext = .; _ftext = . ; \ + *(.text) \ + *(.text.*) \ + *(.stub) \ + *(.gnu.warning) \ + *(.gnu.linkonce.t*) \ + *(.mips16.fn.*) *(.mips16.call.*) \ + } > _region_ =0 \ + _etext = .; PROVIDE (etext = .); + +#define SECTION_fini(_region_, _vma_, _lma_) \ + .fini _vma_ : _lma_ \ + { \ + FORCE_OUTPUT; KEEP (*(.fini)) \ + } > _region_ =0 + +#define SECTION_rodata(_region_, _vma_, _lma_) \ + .rodata _vma_ : _lma_ \ + { \ + FORCE_OUTPUT; *(.rodata) *(.rodata.*) *(.gnu.linkonce.r*) \ + } > _region_ + +#define SECTION_rodata1(_region_, _vma_, _lma_) \ + .rodata1 _vma_ : _lma_ \ + { \ + FORCE_OUTPUT; *(.rodata1) *(.rodata1.*) \ + } > _region_ + +#define SECTION_vsr_table(_region_, _vma_, _lma_) \ + .vsr_table _vma_ : _lma_ \ + { \ + FORCE_OUTPUT; *(.vsr_table) \ + } > _region_ + +#define SECTION_data(_region_, _vma_, _lma_) \ + .data _vma_ : _lma_ \ + { \ + __ram_data_start = ABSOLUTE (.); _fdata = . ; \ + *(.data) *(.data.*) *(.gnu.linkonce.d*) \ + . = ALIGN (8); \ + SORT(CONSTRUCTORS) \ + } > _region_ \ + __rom_data_start = LOADADDR(.data); + +#define SECTION_data1(_region_, _vma_, _lma_) \ + .data1 _vma_ : _lma_ \ + { \ + FORCE_OUTPUT; *(.data1) *(.data1.*) \ + } > _region_ + +#define SECTION_eh_frame(_region_, _vma_, _lma_) \ + .eh_frame _vma_ : _lma_ \ + { \ + FORCE_OUTPUT; *(.eh_frame) \ + } > _region_ + +#define SECTION_gcc_except_table(_region_, _vma_, _lma_) \ + .gcc_except_table _vma_ : _lma_ \ + { \ + FORCE_OUTPUT; *(.gcc_except_table) \ + } > _region_ + + +/* FIXME: We shouldn't need to define __CTOR_LIST__/__CTOR_END__ + and __DTOR_LIST__/__DTOR_END__ except by the PROVIDE lines. + However this doesn't work for old (99r1-era) toolchains, so + leave it for now. */ + +/* The KEEP(*_ctors.o(.ctors)) rule is included to prevent + constructors from libgcc.a from turning up in the image. + They are NULL anyway. */ + +#define SECTION_ctors(_region_, _vma_, _lma_) \ + .ctors _vma_ : _lma_ \ + { \ + FORCE_OUTPUT; \ + KEEP (*crtbegin.o(.ctors)) \ + KEEP (*_ctors.o(.ctors)) \ + __CTOR_LIST__ = .; \ + PROVIDE (__CTOR_LIST__ = .); \ + KEEP (*(.ctors)); \ + KEEP (*(SORT(.ctors.*))) \ + __CTOR_END__ = .; \ + PROVIDE (__CTOR_END__ = .); \ + } > _region_ + +#define SECTION_dtors(_region_, _vma_, _lma_) \ + .dtors _vma_ : _lma_ \ + { \ + FORCE_OUTPUT; \ + KEEP (*crtbegin.o(.dtors)) \ + __DTOR_LIST__ = .; \ + PROVIDE (__DTOR_LIST__ = .); \ + KEEP (*(SORT(.dtors.*))) \ + __DTOR_END__ = .; \ + KEEP (*(.dtors)); \ + PROVIDE (__DTOR_END__ = .); \ + } > _region_ + +#define SECTION_devtab(_region_, _vma_, _lma_) \ + .devtab _vma_ : _lma_ \ + { \ + FORCE_OUTPUT; \ + KEEP(*( SORT (.ecos.table.*))) ; \ + } > _region_ + +#define SECTION_got(_region_, _vma_, _lma_) \ + _gp = ALIGN(16) + 0x7ff0; \ + .got _vma_ : _lma_ \ + { \ + FORCE_OUTPUT; *(.got.plt) *(.got) \ + } > _region_ + +#define SECTION_dynamic(_region_, _vma_, _lma_) \ + .dynamic _vma_ : _lma_ \ + { \ + FORCE_OUTPUT; *(.dynamic) \ + } > _region_ + + /* We want the small data sections together, so single-instruction offsets + can access them all, and initialized data all before uninitialized, so + we can shorten the on-disk segment size. */ + +#define SECTION_sdata(_region_, _vma_, _lma_) \ + .sdata _vma_ : _lma_ \ + { \ + FORCE_OUTPUT; *(.sdata) *(.sdata.*) *(.gnulinkonce.s*) \ + } > _region_ + +#define SECTION_lit8(_region_, _vma_, _lma_) \ + .lit8 _vma_ : _lma_ \ + { \ + FORCE_OUTPUT; *(.lit8) \ + } > _region_ + +#define SECTION_lit4(_region_, _vma_, _lma_) \ + .lit4 : FOLLOWING(.lit8) \ + { \ + FORCE_OUTPUT; *(.lit4) \ + } > _region_ \ + __ram_data_end = .; _edata = . ; \ + PROVIDE (edata = .); + +#define SECTION_sbss(_region_, _vma_, _lma_) \ + __bss_start = .; _fbss = .; \ + .sbss _vma_ : _lma_ \ + { \ + FORCE_OUTPUT; *(.dynsbss) *(.sbss) *(.sbss.*) *(.scommon) \ + } > _region_ + +#define SECTION_bss(_region_, _vma_, _lma_) \ + .bss _vma_ : _lma_ \ + { \ + *(.dynbss) *(.bss) *(.bss.*) *(COMMON) \ + } > _region_ \ + __bss_end = .; + +/* The /DISCARD/ section ensures that the output will not contain a + * .mdebug section as it confuses GDB. This is a workaround for CR 100804. + */ + +#define SECTIONS_END . = ALIGN(4); _end = .; PROVIDE (end = .); \ + /* Stabs debugging sections. */ \ + .stab 0 : { *(.stab) } \ + .stabstr 0 : { *(.stabstr) } \ + .stab.excl 0 : { *(.stab.excl) } \ + .stab.exclstr 0 : { *(.stab.exclstr) } \ + .stab.index 0 : { *(.stab.index) } \ + .stab.indexstr 0 : { *(.stab.indexstr) } \ + .comment 0 : { *(.comment) } \ + /* DWARF debug sections. \ + Symbols in the DWARF debugging sections are relative to \ + the beginning of the section so we begin them at 0. */ \ + /* DWARF 1 */ \ + .debug 0 : { *(.debug) } \ + .line 0 : { *(.line) } \ + /* GNU DWARF 1 extensions */ \ + .debug_srcinfo 0 : { *(.debug_srcinfo) } \ + .debug_sfnames 0 : { *(.debug_sfnames) } \ + /* DWARF 1.1 and DWARF 2 */ \ + .debug_aranges 0 : { *(.debug_aranges) } \ + .debug_pubnames 0 : { *(.debug_pubnames) } \ + /* DWARF 2 */ \ + .debug_info 0 : { *(.debug_info) } \ + .debug_abbrev 0 : { *(.debug_abbrev) } \ + .debug_line 0 : { *(.debug_line) } \ + .debug_frame 0 : { *(.debug_frame) } \ + .debug_str 0 : { *(.debug_str) } \ + .debug_loc 0 : { *(.debug_loc) } \ + .debug_macinfo 0 : { *(.debug_macinfo) } \ + /* SGI/MIPS DWARF 2 extensions */ \ + .debug_weaknames 0 : { *(.debug_weaknames) } \ + .debug_funcnames 0 : { *(.debug_funcnames) } \ + .debug_typenames 0 : { *(.debug_typenames) } \ + .debug_varnames 0 : { *(.debug_varnames) } \ + /* These must appear regardless of . */ \ + .gptab.sdata : { *(.gptab.data) *(.gptab.sdata) } \ + .gptab.sbss : { *(.gptab.bss) *(.gptab.sbss) } \ + /DISCARD/ 0 : { *(.mdebug) } + +#include CYGHWR_MEMORY_LAYOUT_LDI + +// 0-0x200 reserved for vectors +hal_vsr_table = 0x80000200; +hal_virtual_vector_table = 0x80000300; diff --git a/packages/hal/mips/rm7000/var/current/src/var_misc.c b/packages/hal/mips/rm7000/var/current/src/var_misc.c new file mode 100644 --- /dev/null +++ b/packages/hal/mips/rm7000/var/current/src/var_misc.c @@ -0,0 +1,71 @@ +//========================================================================== +// +// var_misc.c +// +// HAL implementation miscellaneous functions +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg +// Contributors: nickg, jlarmour +// Date: 1999-01-21 +// Purpose: HAL miscellaneous functions +// Description: This file contains miscellaneous functions provided by the +// HAL. +// +//####DESCRIPTIONEND#### +// +//========================================================================*/ + +#include + +#include // Base types +#include // tracing macros +#include // assertion macros + +#include +#include + +/*------------------------------------------------------------------------*/ +// Array which stores the configured priority levels for the configured +// interrupts. + +volatile CYG_BYTE hal_interrupt_level[CYGNUM_HAL_ISR_COUNT]; + +/*------------------------------------------------------------------------*/ + +void hal_variant_init(void) +{ + // The RM7000 only has an enable that works on both caches. So we + // only need to enable one of them for both to work. + //HAL_DCACHE_ENABLE(); + HAL_ICACHE_ENABLE(); +} + +/*------------------------------------------------------------------------*/ +/* End of var_misc.c */ diff --git a/packages/hal/mips/rm7000/var/current/src/variant.S b/packages/hal/mips/rm7000/var/current/src/variant.S new file mode 100644 --- /dev/null +++ b/packages/hal/mips/rm7000/var/current/src/variant.S @@ -0,0 +1,48 @@ +##============================================================================= +## +## variant.S +## +## MIPS RM7000 variant code +## +##============================================================================= +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Red Hat eCos Public License +# Version 1.1 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://www.redhat.com/ +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Configurable Operating System, +# released September 30, 1998. +# +# The Initial Developer of the Original Code is Red Hat. +# Portions created by Red Hat are +# Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +# All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +##============================================================================= +#######DESCRIPTIONBEGIN#### +## +## Author(s): nickg +## Contributors:nickg +## Date: 2000-05-15 +## Purpose: MIPS RM7000 variant code +## Description: Variant specific code for RM7000 CPU. +## +######DESCRIPTIONEND#### +## +##============================================================================= + +# Nothing at the moment. + +##----------------------------------------------------------------------------- +## end of variant.S + diff --git a/packages/hal/powerpc/cogent/current/ChangeLog b/packages/hal/powerpc/cogent/current/ChangeLog --- a/packages/hal/powerpc/cogent/current/ChangeLog +++ b/packages/hal/powerpc/cogent/current/ChangeLog @@ -1,3 +1,8 @@ +2001-03-08 Jesper Skov + + * cdl/hal_powerpc_cogent.cdl: Does not guarantee virtual vector + support. + 2001-01-26 Jesper Skov * src/hal_diag.c: Removed CYGSEM_HAL_VIRTUAL_VECTOR_DIAG check. diff --git a/packages/hal/powerpc/cogent/current/cdl/hal_powerpc_cogent.cdl b/packages/hal/powerpc/cogent/current/cdl/hal_powerpc_cogent.cdl --- a/packages/hal/powerpc/cogent/current/cdl/hal_powerpc_cogent.cdl +++ b/packages/hal/powerpc/cogent/current/cdl/hal_powerpc_cogent.cdl @@ -55,6 +55,7 @@ cdl_package CYGPKG_HAL_POWERPC_COGENT { implements CYGINT_HAL_DEBUG_GDB_STUBS implements CYGINT_HAL_DEBUG_GDB_STUBS_BREAK implements CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT + implements CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT_NOT_GUARANTEED define_proc { puts $::cdl_system_header "#define CYGBLD_HAL_TARGET_H " diff --git a/packages/hal/powerpc/mbx/current/ChangeLog b/packages/hal/powerpc/mbx/current/ChangeLog --- a/packages/hal/powerpc/mbx/current/ChangeLog +++ b/packages/hal/powerpc/mbx/current/ChangeLog @@ -1,3 +1,8 @@ +2001-03-08 Jesper Skov + + * cdl/hal_powerpc_mbx.cdl: Does not guarantee virtual vector + support. + 2001-02-23 Gary Thomas * misc/redboot_RAM.ecm: Renamed from redboot_RAM.cfg diff --git a/packages/hal/powerpc/mbx/current/cdl/hal_powerpc_mbx.cdl b/packages/hal/powerpc/mbx/current/cdl/hal_powerpc_mbx.cdl --- a/packages/hal/powerpc/mbx/current/cdl/hal_powerpc_mbx.cdl +++ b/packages/hal/powerpc/mbx/current/cdl/hal_powerpc_mbx.cdl @@ -55,6 +55,7 @@ cdl_package CYGPKG_HAL_POWERPC_MBX { implements CYGINT_HAL_DEBUG_GDB_STUBS implements CYGINT_HAL_DEBUG_GDB_STUBS_BREAK implements CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT + implements CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT_NOT_GUARANTEED define_proc { puts $::cdl_system_header "#define CYGBLD_HAL_TARGET_H " diff --git a/packages/hal/sh/cq7708/current/ChangeLog b/packages/hal/sh/cq7708/current/ChangeLog --- a/packages/hal/sh/cq7708/current/ChangeLog +++ b/packages/hal/sh/cq7708/current/ChangeLog @@ -1,3 +1,12 @@ +2001-03-08 Jesper Skov + + * cdl/hal_sh_sh7708_cq7708.cdl: Does not guarantee virtual vector + support. + +2001-02-27 Jesper Skov + + * include/platform.inc: Init correct vector with interrupt VSR. + 2001-01-31 Jesper Skov * src/hal_diag.c: Included private parts of serial driver. diff --git a/packages/hal/sh/cq7708/current/cdl/hal_sh_sh7708_cq7708.cdl b/packages/hal/sh/cq7708/current/cdl/hal_sh_sh7708_cq7708.cdl --- a/packages/hal/sh/cq7708/current/cdl/hal_sh_sh7708_cq7708.cdl +++ b/packages/hal/sh/cq7708/current/cdl/hal_sh_sh7708_cq7708.cdl @@ -55,6 +55,7 @@ cdl_package CYGPKG_HAL_SH_SH7708_CQ7708 implements CYGINT_HAL_DEBUG_GDB_STUBS implements CYGINT_HAL_DEBUG_GDB_STUBS_BREAK implements CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT + implements CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT_NOT_GUARANTEED define_proc { puts $::cdl_system_header "#define CYGBLD_HAL_TARGET_H " diff --git a/packages/hal/sh/cq7708/current/include/platform.inc b/packages/hal/sh/cq7708/current/include/platform.inc --- a/packages/hal/sh/cq7708/current/include/platform.inc +++ b/packages/hal/sh/cq7708/current/include/platform.inc @@ -127,6 +127,8 @@ 1: mov.l r4,@r3 bf 1b # Write interrupt vector mov.l $cyg_hal_default_interrupt_vsr,r4 + mov.l $hal_vsr_table,r3 + add #CYGNUM_HAL_VECTOR_INTERRUPT*4,r3 mov.l r4,@r3 bra 2f nop diff --git a/packages/hal/sh/cq7750/current/ChangeLog b/packages/hal/sh/cq7750/current/ChangeLog --- a/packages/hal/sh/cq7750/current/ChangeLog +++ b/packages/hal/sh/cq7750/current/ChangeLog @@ -1,3 +1,13 @@ +2001-03-08 Jesper Skov + + * cdl/hal_sh_sh7750_cq7750.cdl: Removed + CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT_GUARANTEED which is now the + default. + +2001-02-27 Jesper Skov + + * include/platform.inc: Init correct vector with interrupt VSR. + 2001-01-31 Jesper Skov * src/hal_diag.c: Included private parts of serial driver. diff --git a/packages/hal/sh/cq7750/current/cdl/hal_sh_sh7750_cq7750.cdl b/packages/hal/sh/cq7750/current/cdl/hal_sh_sh7750_cq7750.cdl --- a/packages/hal/sh/cq7750/current/cdl/hal_sh_sh7750_cq7750.cdl +++ b/packages/hal/sh/cq7750/current/cdl/hal_sh_sh7750_cq7750.cdl @@ -55,7 +55,6 @@ cdl_package CYGPKG_HAL_SH_SH7750_CQ7750 implements CYGINT_HAL_DEBUG_GDB_STUBS implements CYGINT_HAL_DEBUG_GDB_STUBS_BREAK implements CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT - implements CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT_GUARANTEED define_proc { puts $::cdl_system_header "#define CYGBLD_HAL_TARGET_H " diff --git a/packages/hal/sh/cq7750/current/include/platform.inc b/packages/hal/sh/cq7750/current/include/platform.inc --- a/packages/hal/sh/cq7750/current/include/platform.inc +++ b/packages/hal/sh/cq7750/current/include/platform.inc @@ -176,6 +176,8 @@ 1: mov.l r4,@r3 bf 1b # Write interrupt vector mov.l $cyg_hal_default_interrupt_vsr,r4 + mov.l $hal_vsr_table,r3 + add #CYGNUM_HAL_VECTOR_INTERRUPT*4,r3 mov.l r4,@r3 bra 2f nop diff --git a/packages/hal/sh/edk7708/current/ChangeLog b/packages/hal/sh/edk7708/current/ChangeLog --- a/packages/hal/sh/edk7708/current/ChangeLog +++ b/packages/hal/sh/edk7708/current/ChangeLog @@ -1,3 +1,12 @@ +2001-03-08 Jesper Skov + + * cdl/hal_sh_edk7708.cdl: Does not guarantee virtual vector + support. + +2001-02-27 Jesper Skov + + * include/platform.inc: Init correct vector with interrupt VSR. + 2001-01-31 Jesper Skov * src/hal_diag.c: Included private parts of serial driver. diff --git a/packages/hal/sh/edk7708/current/cdl/hal_sh_edk7708.cdl b/packages/hal/sh/edk7708/current/cdl/hal_sh_edk7708.cdl --- a/packages/hal/sh/edk7708/current/cdl/hal_sh_edk7708.cdl +++ b/packages/hal/sh/edk7708/current/cdl/hal_sh_edk7708.cdl @@ -55,6 +55,7 @@ cdl_package CYGPKG_HAL_SH_EDK7708 { implements CYGINT_HAL_DEBUG_GDB_STUBS implements CYGINT_HAL_DEBUG_GDB_STUBS_BREAK implements CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT + implements CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT_NOT_GUARANTEED define_proc { puts $::cdl_system_header "#define CYGBLD_HAL_TARGET_H " diff --git a/packages/hal/sh/edk7708/current/include/platform.inc b/packages/hal/sh/edk7708/current/include/platform.inc --- a/packages/hal/sh/edk7708/current/include/platform.inc +++ b/packages/hal/sh/edk7708/current/include/platform.inc @@ -139,6 +139,8 @@ 1: mov.l r4,@r3 bf 1b # Write interrupt vector mov.l $cyg_hal_default_interrupt_vsr,r4 + mov.l $hal_vsr_table,r3 + add #CYGNUM_HAL_VECTOR_INTERRUPT*4,r3 mov.l r4,@r3 bra 2f nop diff --git a/packages/hal/sh/sh3/current/ChangeLog b/packages/hal/sh/sh3/current/ChangeLog --- a/packages/hal/sh/sh3/current/ChangeLog +++ b/packages/hal/sh/sh3/current/ChangeLog @@ -1,3 +1,9 @@ +2001-02-28 Jesper Skov + + * src/variant.S (cyg_hal_cache_enable): Write ORed value, not just + the enable bit. + Problem noticed by Ryouzaburou Suzuki + 2001-02-26 Jesper Skov * include/mod_regs_ser.h: Add a couple of zeroes to diff --git a/packages/hal/sh/sh3/current/src/variant.S b/packages/hal/sh/sh3/current/src/variant.S --- a/packages/hal/sh/sh3/current/src/variant.S +++ b/packages/hal/sh/sh3/current/src/variant.S @@ -73,7 +73,8 @@ FUNC_START(cyg_hal_cache_enable) mov #CYGARC_REG_CCR,r1 mov.l @r1,r0 mov #CYGARC_REG_CCR_CE,r2 - mov.l r2,@r1 + or r2,r0 + mov.l r0,@r1 nop rts nop diff --git a/packages/hal/sh/sh4/current/ChangeLog b/packages/hal/sh/sh4/current/ChangeLog --- a/packages/hal/sh/sh4/current/ChangeLog +++ b/packages/hal/sh/sh4/current/ChangeLog @@ -1,3 +1,15 @@ +2001-03-12 Jonathan Larmour + + * src/var_misc.c: Ensure case ranges have spaces around identifiers + to allow correct parsing by compiler. + +2001-02-28 Jesper Skov + + * src/variant.S (cyg_hal_dcache_enable, cyg_hal_icache_enable): + Write ORed value, not just the enable bit. + * include/var_cache.h: Fix various macro typos. + Fixes from Ryouzaburou Suzuki + 2001-02-26 Jesper Skov * include/mod_regs_ser.h: Add a couple of zeroes to SCIF clear diff --git a/packages/hal/sh/sh4/current/include/var_cache.h b/packages/hal/sh/sh4/current/include/var_cache.h --- a/packages/hal/sh/sh4/current/include/var_cache.h +++ b/packages/hal/sh/sh4/current/include/var_cache.h @@ -125,14 +125,14 @@ externC void cyg_hal_dcache_write_mode(i //#define HAL_ICACHE_BURST_SIZE(_size_) // Set the cache write mode -#define HAL_ICACHE_WRITE_MODE( _mode_ ) \ +#define HAL_DCACHE_WRITE_MODE( _mode_ ) \ CYG_MACRO_START \ cyg_uint32 _m_; \ if (HAL_DCACHE_WRITETHRU_MODE == _mode_) \ _m_ = CYGARC_REG_CCR_WT; \ else \ _m_ = CYGARC_REG_CCR_CB; \ - cyg_hal_cache_write_mode(_m_); \ + cyg_hal_dcache_write_mode(_m_); \ CYG_MACRO_END #define HAL_DCACHE_WRITETHRU_MODE 0 @@ -191,10 +191,10 @@ externC void cyg_hal_icache_disable(void externC void cyg_hal_icache_invalidate_all(void); // Enable the cache -#define HAL_ICACHE_ENABLE() cyg_hal_dcache_enable() +#define HAL_ICACHE_ENABLE() cyg_hal_icache_enable() // Disable the cache -#define HAL_ICACHE_DISABLE() cyg_hal_dcache_disable() +#define HAL_ICACHE_DISABLE() cyg_hal_icache_disable() // Invalidate the entire cache #define HAL_ICACHE_INVALIDATE_ALL() cyg_hal_icache_invalidate_all() diff --git a/packages/hal/sh/sh4/current/src/var_misc.c b/packages/hal/sh/sh4/current/src/var_misc.c --- a/packages/hal/sh/sh4/current/src/var_misc.c +++ b/packages/hal/sh/sh4/current/src/var_misc.c @@ -107,7 +107,7 @@ hal_interrupt_update_level(int vector) switch( (vector) ) { case CYGNUM_HAL_INTERRUPT_NMI: /* fall through */ - case CYGNUM_HAL_INTERRUPT_LVL0...CYGNUM_HAL_INTERRUPT_LVL14: + case CYGNUM_HAL_INTERRUPT_LVL0 ... CYGNUM_HAL_INTERRUPT_LVL14: /* Cannot change levels */ break; @@ -224,10 +224,10 @@ hal_interrupt_mask(int vector) switch( vector ) { case CYGNUM_HAL_INTERRUPT_NMI: /* fall through */ - case CYGNUM_HAL_INTERRUPT_LVL0...CYGNUM_HAL_INTERRUPT_LVL14: + case CYGNUM_HAL_INTERRUPT_LVL0 ... CYGNUM_HAL_INTERRUPT_LVL14: /* Can only be masked by fiddling Imask in SR. */ break; - case CYGNUM_HAL_INTERRUPT_TMU0_TUNI0...CYGNUM_HAL_ISR_MAX: + case CYGNUM_HAL_INTERRUPT_TMU0_TUNI0 ... CYGNUM_HAL_ISR_MAX: cyg_hal_IMASK_table[vector] = 0; hal_interrupt_update_level(vector); break; @@ -247,10 +247,10 @@ hal_interrupt_unmask(int vector) switch( (vector) ) { case CYGNUM_HAL_INTERRUPT_NMI: /* fall through */ - case CYGNUM_HAL_INTERRUPT_LVL0...CYGNUM_HAL_INTERRUPT_LVL14: + case CYGNUM_HAL_INTERRUPT_LVL0 ... CYGNUM_HAL_INTERRUPT_LVL14: /* Can only be unmasked by fiddling Imask in SR. */ break; - case CYGNUM_HAL_INTERRUPT_TMU0_TUNI0...CYGNUM_HAL_ISR_MAX: + case CYGNUM_HAL_INTERRUPT_TMU0_TUNI0 ... CYGNUM_HAL_ISR_MAX: cyg_hal_IMASK_table[vector] = 1; hal_interrupt_update_level(vector); break; diff --git a/packages/hal/sh/sh4/current/src/variant.S b/packages/hal/sh/sh4/current/src/variant.S --- a/packages/hal/sh/sh4/current/src/variant.S +++ b/packages/hal/sh/sh4/current/src/variant.S @@ -73,7 +73,8 @@ FUNC_START(cyg_hal_dcache_enable) mov.l $nCYGARC_REG_CCR,r1 mov.l @r1,r0 mov #CYGARC_REG_CCR_OCE,r2 - mov.l r2,@r1 + or r2,r0 + mov.l r0,@r1 nop rts nop @@ -164,7 +165,8 @@ FUNC_START(cyg_hal_icache_enable) mov.l $nCYGARC_REG_CCR,r1 mov.l @r1,r0 mov.l $nCYGARC_REG_CCR_ICE,r2 - mov.l r2,@r1 + or r2,r0 + mov.l r0,@r1 nop rts nop diff --git a/packages/hal/v85x/arch/current/ChangeLog b/packages/hal/v85x/arch/current/ChangeLog --- a/packages/hal/v85x/arch/current/ChangeLog +++ b/packages/hal/v85x/arch/current/ChangeLog @@ -1,3 +1,37 @@ +2001-03-28 Jonathan Larmour + + * src/vectors.S: Overhaul... + Make interrupt processing path faster, especially by implementing + CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT + Add ROMRAM startup support + Pass in correct argument to exception_handler + Call DSRs with parameter flushback area + Add __allow_nmi as a somewhat kludgy means of determining + whether NMIs should be ignored - important if the board resets + and the vector tables are temporarily inconsistent. + Initialize __vsr_table statically. + Add some generic elements of ICE debugging support + + * src/v85x.ld: Remove - redundant. + + * src/hal_mk_defs.c (main): Update to reflect new vector names + (to match official NEC docs) + + * src/hal_misc.c (exception_handler): Remove cygmon cruft. + (hal_arch_default_isr): Report spurious interrupts. + (hal_idle_thread_action): use halt instruction + + * include/hal_arch.h: Remove obsolete comment reference to arch.inc. + + * include/basetype.h: No need to include + * include/hal_io.h: Ditto. + * include/nec-stub.h: Similarly for + + * cdl/hal_v85x.cdl: Move CYGHWR_HAL_V85X_CPU_FREQ into platforms + (and make Hz, not MHz). + Add generic ICE debugging interface. + Description tidies. + 2001-01-26 Jonathan Larmour * include/hal_intr.h: Move HAL_STUB_PLATFORM_RESET and @@ -191,7 +225,7 @@ 2000-03-21 Gary Thomas , do not use directly +// Author(s): nickg +// Contributors: nickg, gthomas, jlarmour +// Date: 2001-03-21 +// Purpose: Define architecture base types. +// Usage: Included by , do not use directly // //####DESCRIPTIONEND#### // -#include - //----------------------------------------------------------------------------- // Characterize the architecture diff --git a/packages/hal/v85x/arch/current/include/hal_arch.h b/packages/hal/v85x/arch/current/include/hal_arch.h --- a/packages/hal/v85x/arch/current/include/hal_arch.h +++ b/packages/hal/v85x/arch/current/include/hal_arch.h @@ -26,7 +26,7 @@ // // The Initial Developer of the Original Code is Red Hat. // Portions created by Red Hat are -// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. // All Rights Reserved. // ------------------------------------------- // @@ -34,9 +34,9 @@ //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg -// Date: 1999-02-17 +// Author(s): nickg,gthomas +// Contributors: nickg,jlarmour +// Date: 2001-03-21 // Purpose: Define architecture abstractions // Usage: #include // @@ -51,8 +51,6 @@ //-------------------------------------------------------------------------- // Processor saved states: -// The layout of this structure is also defined in "arch.inc", for assembly -// code. Do not change this without changing that (or vice versa). #define CYG_HAL_NEC_REG CYG_WORD32 #define CYG_HAL_NEC_REG_SIZE 4 diff --git a/packages/hal/v85x/arch/current/include/hal_io.h b/packages/hal/v85x/arch/current/include/hal_io.h --- a/packages/hal/v85x/arch/current/include/hal_io.h +++ b/packages/hal/v85x/arch/current/include/hal_io.h @@ -26,7 +26,7 @@ // // The Initial Developer of the Original Code is Red Hat. // Portions created by Red Hat are -// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. // All Rights Reserved. // ------------------------------------------- // @@ -34,24 +34,22 @@ //============================================================================= //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg -// Date: 1998-02-17 -// Purpose: Define IO register support -// Description: The macros defined here provide the HAL APIs for handling -// device IO control registers. +// Author(s): nickg +// Contributors: nickg +// Date: 1998-02-17 +// Purpose: Define IO register support +// Description: The macros defined here provide the HAL APIs for handling +// device IO control registers. // // Usage: -// #include -// ... +// #include +// ... // // //####DESCRIPTIONEND#### // //============================================================================= -#include - #include #include diff --git a/packages/hal/v85x/arch/current/include/nec-stub.h b/packages/hal/v85x/arch/current/include/nec-stub.h --- a/packages/hal/v85x/arch/current/include/nec-stub.h +++ b/packages/hal/v85x/arch/current/include/nec-stub.h @@ -25,7 +25,7 @@ // // The Initial Developer of the Original Code is Red Hat. // Portions created by Red Hat are -// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. // All Rights Reserved. // ------------------------------------------- // @@ -45,8 +45,6 @@ //======================================================================== -#include - #ifdef __cplusplus extern "C" { #endif diff --git a/packages/hal/v85x/arch/current/src/hal_misc.c b/packages/hal/v85x/arch/current/src/hal_misc.c --- a/packages/hal/v85x/arch/current/src/hal_misc.c +++ b/packages/hal/v85x/arch/current/src/hal_misc.c @@ -23,7 +23,7 @@ // // The Initial Developer of the Original Code is Red Hat. // Portions created by Red Hat are -// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. // All Rights Reserved. // ------------------------------------------- // @@ -32,8 +32,8 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): nickg, gthomas -// Contributors: nickg, gthomas -// Date: 1999-02-20 +// Contributors: nickg, gthomas, jlarmour +// Date: 2001-03-21 // Purpose: HAL miscellaneous functions // Description: This file contains miscellaneous functions provided by the // HAL. @@ -47,9 +47,6 @@ #ifdef CYGPKG_KERNEL #include #endif -#ifdef CYGPKG_CYGMON -#include -#endif #include #include // tracing macros @@ -70,7 +67,7 @@ externC void* volatile __mem_fault_handl void exception_handler(HAL_SavedRegisters *regs) { -#if defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS) && !defined(CYGPKG_CYGMON) +#if defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS) // diag_printf("Exception! Frame: %x\n", regs); // show_regs(regs); static int gdb_active; @@ -141,6 +138,11 @@ cyg_hal_invoke_constructors (void) externC cyg_uint32 hal_arch_default_isr(CYG_ADDRWORD vector, CYG_ADDRWORD data) { + CYG_TRACE1(true, "Interrupt: %d", vector); + + diag_printf("Spurious Interrupt!!! - vector: %d, data: %x\n", vector, + data); + CYG_FAIL("Spurious Interrupt!!!"); return 0; } #else @@ -173,6 +175,8 @@ hal_default_isr(CYG_ADDRWORD vector, CYG void hal_idle_thread_action( cyg_uint32 count ) { + // power saving instruction + asm("halt"); } /*-------------------------------------------------------------------------*/ diff --git a/packages/hal/v85x/arch/current/src/hal_mk_defs.c b/packages/hal/v85x/arch/current/src/hal_mk_defs.c --- a/packages/hal/v85x/arch/current/src/hal_mk_defs.c +++ b/packages/hal/v85x/arch/current/src/hal_mk_defs.c @@ -23,7 +23,7 @@ // // The Initial Developer of the Original Code is Red Hat. // Portions created by Red Hat are -// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. // All Rights Reserved. // ------------------------------------------- // @@ -32,9 +32,9 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): gthomas -// Contributors: gthomas, jskov +// Contributors: gthomas, jskov, jlarmour // Date: 2000-02-21 -// Purpose: SH architecture dependent definition generator +// Purpose: V850 architecture dependent definition generator // Description: This file contains code that can be compiled by the target // compiler and used to generate machine specific definitions // suitable for use in assembly code. @@ -142,10 +142,10 @@ main(void) DEFINE(CYGNUM_HAL_VSR_MAX, CYGNUM_HAL_VSR_MAX); DEFINE(CYGNUM_HAL_VSR_COUNT, CYGNUM_HAL_VSR_COUNT); DEFINE(CYGNUM_HAL_EXCEPTION_COUNT, CYGNUM_HAL_EXCEPTION_COUNT); - DEFINE(CYGNUM_HAL_VECTOR_WATCHDOG_TIMER, CYGNUM_HAL_VECTOR_WATCHDOG_TIMER); - DEFINE(CYGNUM_HAL_VECTOR_TRAP0, CYGNUM_HAL_VECTOR_TRAP0); - DEFINE(CYGNUM_HAL_VECTOR_TRAP1, CYGNUM_HAL_VECTOR_TRAP1); - DEFINE(CYGNUM_HAL_VECTOR_ILLEGAL_OPCODE, CYGNUM_HAL_VECTOR_ILLEGAL_OPCODE); + DEFINE(CYGNUM_HAL_VECTOR_INTWDT, CYGNUM_HAL_VECTOR_INTWDT); + DEFINE(CYGNUM_HAL_VECTOR_TRAP00, CYGNUM_HAL_VECTOR_TRAP00); + DEFINE(CYGNUM_HAL_VECTOR_TRAP10, CYGNUM_HAL_VECTOR_TRAP10); + DEFINE(CYGNUM_HAL_VECTOR_ILGOP, CYGNUM_HAL_VECTOR_ILGOP); DEFINE(CYGARC_PSW_ID, CYGARC_PSW_ID); DEFINE(CYGARC_PSW_EP, CYGARC_PSW_EP); diff --git a/packages/hal/v85x/arch/current/src/v85x.ld b/packages/hal/v85x/arch/current/src/v85x.ld deleted file mode 100644 --- a/packages/hal/v85x/arch/current/src/v85x.ld +++ /dev/null @@ -1,122 +0,0 @@ -//============================================================================= -// -// MLT linker script for NEC -// adapted from packages/hal/arm/pid/v1_1/src/pid.ld -// -//============================================================================= -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Red Hat eCos Public License -// Version 1.1 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://www.redhat.com/ -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Configurable Operating System, -// released September 30, 1998. -// -// The Initial Developer of the Original Code is Red Hat. -// Portions created by Red Hat are -// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. -// All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//============================================================================= - -#include - -STARTUP(vectors.o) -ENTRY(reset_vector) -#ifdef EXTRAS -INPUT(extras.o) -#endif -GROUP(libtarget.a libgcc.a) - -#define ALIGN_LMA 4 -#define FOLLOWING(_section_) AT ((LOADADDR (_section_) + SIZEOF (_section_) + ALIGN_LMA - 1) & ~ (ALIGN_LMA - 1)) -#define LMA_EQ_VMA -#define FORCE_OUTPUT . = . - -#define SECTIONS_BEGIN \ - /* Debug information */ \ - .debug_aranges 0 : { *(.debug_aranges) } \ - .debug_pubnames 0 : { *(.debug_pubnames) } \ - .debug_info 0 : { *(.debug_info) } \ - .debug_abbrev 0 : { *(.debug_abbrev) } \ - .debug_line 0 : { *(.debug_line) } \ - .debug_frame 0 : { *(.debug_frame) } \ - .debug_str 0 : { *(.debug_str) } \ - .debug_loc 0 : { *(.debug_loc) } \ - .debug_macinfo 0 : { *(.debug_macinfo) } - -#define SECTION_rom_vectors(_region_, _vma_, _lma_) \ - .rom_vectors _vma_ : _lma_ \ - { FORCE_OUTPUT; KEEP (*(.vectors)) } \ - > _region_ - -#define SECTION_text(_region_, _vma_, _lma_) \ - .text _vma_ : _lma_ \ - { stext = ABSOLUTE(.); \ - PROVIDE (__stext = ABSOLUTE(.)); \ - *(.text*) *(.gnu.warning) *(.gnu.linkonce*) *(.init) \ - *(.glue_7) *(.glue_7t) \ - } > _region_ \ - etext = .; PROVIDE (__etext = .); - -#define SECTION_fini(_region_, _vma_, _lma_) \ - .fini _vma_ : _lma_ \ - { FORCE_OUTPUT; *(.fini) } \ - > _region_ - -#define SECTION_rodata(_region_, _vma_, _lma_) \ - .rodata _vma_ : _lma_ \ - { FORCE_OUTPUT; *(.rodata*) } \ - > _region_ - -#define SECTION_rodata1(_region_, _vma_, _lma_) \ - .rodata1 _vma_ : _lma_ \ - { FORCE_OUTPUT; *(.rodata1) } \ - > _region_ - -#define SECTION_fixup(_region_, _vma_, _lma_) \ - .fixup _vma_ : _lma_ \ - { FORCE_OUTPUT; *(.fixup) } \ - > _region_ - -#define SECTION_gcc_except_table(_region_, _vma_, _lma_) \ - .gcc_except_table _vma_ : _lma_ \ - { FORCE_OUTPUT; *(.gcc_except_table) } \ - > _region_ - -#define SECTION_data(_region_, _vma_, _lma_) \ - .data _vma_ : _lma_ \ - { __ram_data_start = ABSOLUTE (.); *(.data*) *(.data1) MERGE_IN_RODATA \ - _GOT1_START_ = ABSOLUTE (.); *(.got1) _GOT1_END_ = ABSOLUTE (.); \ - _GOT2_START_ = ABSOLUTE (.); *(.got2) _GOT2_END_ = ABSOLUTE (.); \ - . = ALIGN (4); \ - KEEP(*( SORT (.ecos.table.*))) ; \ - __CTOR_LIST__ = ABSOLUTE (.); KEEP (*(SORT (.ctors*))) __CTOR_END__ = ABSOLUTE (.); \ - __DTOR_LIST__ = ABSOLUTE (.); KEEP (*(SORT (.dtors*))) __DTOR_END__ = ABSOLUTE (.); \ - *(.dynamic) *(.sdata*) *(.sbss*) } \ - > _region_ \ - __rom_data_start = LOADADDR (.data); \ - __ram_data_end = .; PROVIDE (__ram_data_end = .); _edata = .; PROVIDE (edata = .); \ - PROVIDE (__rom_data_end = LOADADDR (.data) + SIZEOF(.data)); - -#define SECTION_bss(_region_, _vma_, _lma_) \ - .bss _vma_ : _lma_ \ - { __bss_start = ABSOLUTE (.); \ - *(.scommon) *(.dynbss) *(.bss*) *(COMMON) \ - __bss_end = ABSOLUTE (.); } \ - > _region_ - -#define SECTIONS_END . = ALIGN(4); _end = .; PROVIDE (end = .); \ - -#include -#include CYGHWR_MEMORY_LAYOUT_LDI diff --git a/packages/hal/v85x/arch/current/src/vectors.S b/packages/hal/v85x/arch/current/src/vectors.S --- a/packages/hal/v85x/arch/current/src/vectors.S +++ b/packages/hal/v85x/arch/current/src/vectors.S @@ -23,7 +23,7 @@ // // The Initial Developer of the Original Code is Red Hat. // Portions created by Red Hat are -// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. // All Rights Reserved. // ------------------------------------------- // @@ -31,9 +31,9 @@ // #======================================================================== // ######DESCRIPTIONBEGIN#### // # -// # Author(s): gthomas -// # Contributors: gthomas -// # Date: 2000-03-10 +// # Author(s): gthomas, jlarmour +// # Contributors: gthomas, jlarmour +// # Date: 2001-03-21 // # Purpose: NEC/V85x exception vectors // # Description: This file defines the code placed into the exception // # vectors. It also contains the first level default VSRs @@ -44,15 +44,17 @@ // # // #======================================================================== +#include #include #include -#ifdef CYGPKG_KERNEL // no CDL yet +#ifdef CYGPKG_KERNEL #include #else # undef CYGFUN_HAL_COMMON_KERNEL_SUPPORT # undef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK #endif #include +#include CYGHWR_MEMORY_LAYOUT_H #include @@ -61,49 +63,69 @@ .macro EXCEPTION .org reset_vector+(0x0010*VECTOR) addi -CYGARC_EXCEPTION_FRAME_SIZE,sp,sp - st.w r1,CYGARC_REG_R1[sp] - movea VECTOR,r0,r1 + st.w r8,CYGARC_REG_R8[sp] + movea VECTOR,r0,r8 + jr exception .set VECTOR, VECTOR+1 - jr exception .endm .macro INTERRUPT .org reset_vector+(0x0010*VECTOR) addi -CYGARC_EXCEPTION_FRAME_SIZE,sp,sp - st.w r1,CYGARC_REG_R1[sp] - movea VECTOR,r0,r1 + st.w r8,CYGARC_REG_R8[sp] + movea VECTOR,r0,r8 jr exception .set VECTOR, VECTOR+1 .endm - .text +#if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_ROMRAM) + .section ".vectors","ax" .globl reset_vector reset_vector: -#ifdef CYG_HAL_STARTUP_ROM // // These are the hardware exception vectors. // __ROM_vsr: - // 0x000 + // start of ROM + // This jump works even for ROMRAM because it is PC relative jr start .set VECTOR, 1 .rept CYGNUM_HAL_EXCEPTION_COUNT-1 EXCEPTION .endr - .set VECTOR, 8 + .set VECTOR, CYGNUM_HAL_ISR_MIN .rept CYGNUM_HAL_ISR_COUNT INTERRUPT .endr -#endif // CYG_HAL_STARTUP_ROM - +#endif + + .text .globl start start: // Perform hardware initialization PLATFORM_SETUP1 + + // Copy everything to the proper VMA base and jump to it. +#if defined(CYG_HAL_STARTUP_ROMRAM) + lea CYGMEM_REGION_rom,r6 + lea CYGMEM_REGION_ram,r7 + lea ___rom_data_end,r8 // Assume end of .data == end of ROM +1: ld.w 0[r6],r1 + st.w r1,0[r7] + addi 4,r6,r6 + addi 4,r7,r7 + cmp r6,r8 + bne 1b -#ifdef CYG_HAL_STARTUP_ROM + // now jump to RAM + lea ___romram_jump_vector,r1 + jmp [r1] + +___romram_jump_vector: + +#elif defined( CYG_HAL_STARTUP_ROM ) // Relocate [copy] data from ROM to RAM lea ___rom_data_start,r6 lea ___ram_data_start,r7 @@ -114,7 +136,19 @@ 1: ld.w 0[r6],r1 addi 4,r7,r7 cmp r7,r8 bne 1b + + // Initialize RAM vectors + lea ___ram_vectors_loadaddr,r6 + lea ___ram_vectors_start,r7 + lea ___ram_vectors_end,r8 +1: ld.w 0[r6],r1 + st.w r1,0[r7] + addi 4,r6,r6 + addi 4,r7,r7 + cmp r7,r8 + bne 1b #endif + // Initialize stack lea __startup_stack-16,r1 mov r1,sp @@ -127,28 +161,9 @@ 1: st.w r0,0[r6] cmp r6,r7 bne 1b -#ifdef CYG_HAL_STARTUP_ROM - // Built initial trap VSR tables - lea __vsr_table,r6 - lea __vsr_table_end,r9 -#if 0 - lea __ROM_vsr,r7 - mov r6,r8 - sub r7,r8 - lea 0x003FFFFF,r7 - and r7,r8 - lea 0x07800000,r7 - or r7,r8 -#else - lea 0x00000794,r8 // jr 0x0100xx0 -#endif -10: st.w r8,0[r6] - addi 16,r6,r6 - cmp r6,r9 - bne 10b -#else +#if defined(CYG_HAL_STARTUP_RAM) // Set up VSR pointers into this application/image - lea _hal_vsr_table+(CYGNUM_HAL_EXCEPTION_COUNT*4),r6 + lea _hal_vsr_table+(CYGNUM_HAL_ISR_MIN*4),r6 movea CYGNUM_HAL_ISR_COUNT,r0,r7 lea do_interrupt,r8 10: st.w r8,0[r6] @@ -161,7 +176,7 @@ 10: st.w r8,0[r6] jarl _cyg_hal_hardware_init,r31 #ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS -#ifndef CYG_HAL_STARTUP_ROM +# ifdef CYG_HAL_STARTUP_RAM // Need to handle exceptions as well lea _hal_vsr_table,r6 movea CYGNUM_HAL_EXCEPTION_COUNT,r0,r7 @@ -170,25 +185,36 @@ 10: st.w r8,0[r6] addi 4,r6,r6 addi -1,r7,r7 bne 10b -#endif +# endif jarl _initialize_stub,r31 #else // CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS // All programs need to provide for NMI handlers lea _hal_vsr_table+4,r6 lea do_exception,r8 - st.w r8,0[r6] + st.w r8,0[r6] // NMI pin #endif // CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS - -#ifdef CYGSEM_HAL_VIRTUAL_VECTOR_SUPPORT // this _check_ should go away + +#if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_ROMRAM) + // we can process NMIs now + lea __allow_nmi,r1 + addi 1,r0,r2 + st.w r2,0[r1] +#endif + #if defined(CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT) \ || defined(CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT) .extern hal_ctrlc_isr_init jarl _hal_ctrlc_isr_init,r31 #endif -#endif + // Run through static constructors jarl _cyg_hal_invoke_constructors,r31 +#if CYGINT_HAL_V85x_ICE_DEBUG + // Initialize ICE debugging info + jarl _hal_v85x_init_ice_syscall_info,r31 +#endif + // Ready to start the eCos kernel jarl _cyg_start,r31 @@ -196,21 +222,22 @@ 10: st.w r8,0[r6] _start_hang: br _start_hang -#ifdef CYG_HAL_STARTUP_ROM +#if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_ROMRAM) // Handle exception exception: // save exception context st.w ep,CYGARC_REG_EP[sp] mov sp,ep - st.w r1,CYGARC_REG_VECTOR[ep] + sst.w r8,CYGARC_REG_VECTOR[ep] + sst.w r1,CYGARC_REG_R1[ep] addi CYGARC_EXCEPTION_FRAME_SIZE,ep,r1 - sst.w r2,CYGARC_REG_R2[ep] - sst.w r1,CYGARC_REG_SP[ep] + sst.w r2,CYGARC_REG_R2[ep] + sst.w r1,CYGARC_REG_SP[ep] sst.w r4,CYGARC_REG_R4[ep] sst.w r5,CYGARC_REG_R5[ep] sst.w r6,CYGARC_REG_R6[ep] sst.w r7,CYGARC_REG_R7[ep] - sst.w r8,CYGARC_REG_R8[ep] +// sst.w r8,CYGARC_REG_R8[ep] sst.w r9,CYGARC_REG_R9[ep] sst.w r10,CYGARC_REG_R10[ep] sst.w r11,CYGARC_REG_R11[ep] @@ -222,6 +249,7 @@ exception: sst.w r17,CYGARC_REG_R17[ep] sst.w r18,CYGARC_REG_R18[ep] sst.w r19,CYGARC_REG_R19[ep] +#ifndef CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT sst.w r20,CYGARC_REG_R20[ep] sst.w r21,CYGARC_REG_R21[ep] sst.w r22,CYGARC_REG_R22[ep] @@ -231,23 +259,35 @@ exception: sst.w r26,CYGARC_REG_R26[ep] sst.w r27,CYGARC_REG_R27[ep] sst.w r28,CYGARC_REG_R28[ep] - sst.w r29,CYGARC_REG_R29[ep] - ld.w CYGARC_REG_VECTOR[ep],r8 +#endif + sst.w r29,CYGARC_REG_R29[ep] // NB frame pointer sst.w lp,CYGARC_REG_LP[ep] - cmp CYGNUM_HAL_VECTOR_TRAP0,r8 // NMI? + cmp CYGNUM_HAL_VECTOR_TRAP00,r8 // NMI? bge 05f stsr FEPC,r6 // saved state differs stsr FEPSW,r7 - br 20f + lea __allow_nmi,r1 // is the system ready for NMIs? + tst1 0, 0[r1] + bne 10f + // if not processing NMIs, allow restore + sst.w r6,CYGARC_REG_PC[ep] + sst.w r7,CYGARC_REG_PSW[ep] + // Reenable exception processing + stsr PSW,r6 + andi ~(CYGARC_PSW_EP|CYGARC_PSW_NP),r6,r6 + ldsr r6,PSW + lea return_from_exception_or_interrupt,r1 + jmp [r1] + 05: stsr EIPC,r6 - cmp CYGNUM_HAL_VECTOR_ILLEGAL_OPCODE,r8 // Illegal opcode? + stsr EIPSW,r7 + cmp CYGNUM_HAL_VECTOR_ILGOP,r8 // Illegal opcode? bne 10f addi -4,r6,r6 // yes, adjust PC -10: stsr EIPSW,r7 -20: st.w r6,CYGARC_REG_PC[ep] - st.w r7,CYGARC_REG_PSW[ep] +10: sst.w r6,CYGARC_REG_PC[ep] + sst.w r7,CYGARC_REG_PSW[ep] stsr ECR,r6 - st.w r6,CYGARC_REG_CAUSE[ep] + sst.w r6,CYGARC_REG_CAUSE[ep] // Reenable exception processing stsr PSW,r6 andi ~(CYGARC_PSW_EP|CYGARC_PSW_NP),r6,r6 @@ -260,11 +300,13 @@ 20: st.w r6,CYGARC_REG_PC[ep] #endif do_exception: + // pass in saved registers + mov sp,r6 + // leave space for the parameter flush back area (as per calling // conventions) addi -16,sp,sp - mov sp,r6 jarl _exception_handler,r31 return_from_exception_or_interrupt: @@ -272,14 +314,14 @@ return_from_exception_or_interrupt: // (as per calling conventions) at the same time addi 16,sp,ep - ld.w CYGARC_REG_PSW[ep],r7 + sld.w CYGARC_REG_PSW[ep],r7 sld.w CYGARC_REG_R1[ep],r1 - ld.w CYGARC_REG_PC[ep],r6 + sld.w CYGARC_REG_PC[ep],r6 sld.w CYGARC_REG_R2[ep],r2 // disable interrupts while restoring context ld.w CYGARC_REG_VECTOR[ep],r4 stsr PSW,r8 - cmp CYGNUM_HAL_VECTOR_TRAP0,r4 + cmp CYGNUM_HAL_VECTOR_TRAP00,r4 bge 10f ori CYGARC_PSW_NP,r8,r8 // returning from NMI ori CYGARC_PSW_ID,r8,r8 // disable interrupt @@ -292,7 +334,7 @@ 10: cmp CYGNUM_HAL_ISR_MIN,r4 ori CYGARC_PSW_EP,r8,r8 // returning from exception 20: ori CYGARC_PSW_ID,r8,r8 // disable interrupt ldsr r8,PSW - ldsr r7,EIPSW // Avoid pipline bubbles + ldsr r7,EIPSW // Avoid pipeline bubbles ldsr r6,EIPC 30: sld.w CYGARC_REG_R4[ep],r4 sld.w CYGARC_REG_R5[ep],r5 @@ -310,6 +352,7 @@ 30: sld.w CYGARC_REG_R4[ep],r4 sld.w CYGARC_REG_R17[ep],r17 sld.w CYGARC_REG_R18[ep],r18 sld.w CYGARC_REG_R19[ep],r19 +#ifndef CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT sld.w CYGARC_REG_R20[ep],r20 sld.w CYGARC_REG_R21[ep],r21 sld.w CYGARC_REG_R22[ep],r22 @@ -319,7 +362,8 @@ 30: sld.w CYGARC_REG_R4[ep],r4 sld.w CYGARC_REG_R26[ep],r26 sld.w CYGARC_REG_R27[ep],r27 sld.w CYGARC_REG_R28[ep],r28 - sld.w CYGARC_REG_R29[ep],r29 +#endif + sld.w CYGARC_REG_R29[ep],r29 // NB frame pointer sld.w CYGARC_REG_LP[ep],lp sld.w CYGARC_REG_SP[ep],sp sld.w CYGARC_REG_EP[ep],ep @@ -366,7 +410,6 @@ 10: jarl _cyg_instrument,r31 #endif -#ifdef CYGSEM_HAL_VIRTUAL_VECTOR_SUPPORT // this _check_ should go away #if defined(CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT) \ || defined(CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT) // If we are supporting Ctrl-C interrupts from GDB, we must squirrel @@ -377,7 +420,6 @@ 10: lea _hal_saved_interrupt_state,r8 st.w ep,0[r8] #endif -#endif #ifdef CYGIMP_KERNEL_INTERRUPTS_CHAIN mov r0,r8 // vector # (overloaded by kernel) @@ -440,17 +482,19 @@ 10: mov 1,r7 // note: this can never be non-zero at this point st.w r7,0[r6] mov sp,r1 // save old stack pointer - lea __interrupt_stack-(4*4),r8 + lea __interrupt_stack-32,r8 // 32 for 16-byte parameter flush back + // plus 12 bytes for following reg saves + // plus 4 bytes to preserve alignment mov r8,sp - st.w r1,0[sp] - st.w r9,4[sp] - st.w lp,8[sp] + st.w r1,16[sp] + st.w r9,20[sp] + st.w lp,24[sp] ei jarl _cyg_interrupt_call_pending_DSRs,lp di - ld.w 8[sp],lp // restore state - ld.w 4[sp],r6 - ld.w 0[sp],sp + ld.w 24[sp],lp // restore state + ld.w 20[sp],r6 + ld.w 16[sp],sp lea irq_level,r7 st.w r0,0[r7] ldsr r6,PSW @@ -469,6 +513,9 @@ call_via_r1: .globl _hal_reset_board _hal_reset_board: di // Turn off interrupts + // Don't process NMIs + lea __allow_nmi,r1 + st.w r0,0[r1] jmp [r0] // Restart machine #if !defined(CYGSEM_HAL_NEC_INLINE_INTERRUPT_FUNCTIONS) @@ -491,15 +538,18 @@ call_via_r1: #endif // ------------------------------------------------------------------------- - .data -#ifdef CYG_HAL_STARTUP_ROM + .section ".ram_vectors","awx",@progbits + +#if defined(CYG_HAL_STARTUP_ROM) // Trap jump table - used by builtin ROM __vsr_table: .rept CYGNUM_HAL_VSR_COUNT - .word 0,0,0,0 + .word 0x00000794,0,0,0 // jr 0x0100xx0, nop, nop, nop .endr __vsr_table_end: +#endif +#if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_ROMRAM) _hal_vsr_table: .rept CYGNUM_HAL_EXCEPTION_COUNT .word do_exception @@ -508,15 +558,21 @@ call_via_r1: .word do_interrupt .endr -#if defined(CYGSEM_HAL_VIRTUAL_VECTOR_SUPPORT) +// Flag to indicate whether NMIs are allowed +// Without this, if we do a soft reset (using hal_plf_reset_board above) +// we may process NMIs like the watchdog timeout before the system can +// accept them +__allow_nmi: + .word 0 + .balign 64 _hal_virtual_vector_table: .rept CYGNUM_CALL_IF_TABLE_SIZE .word 0 .endr -#endif -#endif - +#endif // if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_ROMRAM) + + .data // Initial stack .rept 1024 .byte 0 @@ -540,7 +596,8 @@ call_via_r1: __interrupt_stack: irq_level: .long 0 -#endif // CYG_HAL_STARTUP == ROM +#endif + // Interrupt vector tables. // These tables contain the isr, data and object pointers used to deliver @@ -565,3 +622,14 @@ irq_level: .rept CYGNUM_HAL_ISR_COUNT .long 0 .endr + +#if CYGINT_HAL_V85x_ICE_DEBUG + .globl _hal_v85x_ice_syscall_info +_hal_v85x_ice_syscall_info: + .rept 32 + .long 0 + .endr +#endif + +// ------------------------------------------------------------------------- +// EOF vectors.S diff --git a/packages/hal/v85x/ceb_v850/current/ChangeLog b/packages/hal/v85x/ceb_v850/current/ChangeLog --- a/packages/hal/v85x/ceb_v850/current/ChangeLog +++ b/packages/hal/v85x/ceb_v850/current/ChangeLog @@ -1,3 +1,63 @@ +2001-03-21 Jonathan Larmour + + * cdl/hal_v85x_ceb_v850.cdl: Support choice between V850/SA1 and + V850/SB1, and adjust descriptions accordingly. + Support ROMRAM startup. + Support booting from FLASH. + Use generic V850 diag driver. + Allow setting of CPU frequency. + Add extra baud rates. + Build SREC GDB stub images as well as binary images. + + * include/hal_diag.h: We only support virtual vectors now. + + * include/hal_platform_setup.h: Comment better. + Support different wait states for different CPU speeds. + + * include/plf_cache.h: Just empty now - defaults are in variant HAL. + * include/plf_intr.h: Ditto. + * include/plf_io.h: Ditto. + + * include/plf_sections.h: Support V850/SB1 differences, and + add __allow_nmi as per recent arch HAL vectors.S change. + + * src/plf_misc.c: Update register names with new versions defined + in variant HAL. + + * src/plf_stub.c: Remove unnecessary includes. Add some comments. + * include/v850_regs.h: Remove. Content moved to v850 HAL. + + * src/hal_diag.c: Remove. Consolidated into v850 HAL. + + * src/v850flash.S: Sample image to program into flash for EPROM + startup. + + * include/pkgconf/mlt_v85x_v850_ceb_flash.h: + * include/pkgconf/mlt_v85x_v850_ceb_flash.ldi: + * include/pkgconf/mlt_v85x_v850_ceb_flash.mlt: + * include/pkgconf/mlt_v85x_v850_ceb_flashromram.h: + * include/pkgconf/mlt_v85x_v850_ceb_flashromram.ldi: + * include/pkgconf/mlt_v85x_v850_ceb_flashromram.mlt: + * include/pkgconf/mlt_v85x_v850_ceb_romram.h: + * include/pkgconf/mlt_v85x_v850_ceb_romram.ldi: + * include/pkgconf/mlt_v85x_v850_ceb_romram.mlt: + Create. + + * include/pkgconf/mlt_v85x_v850_ceb_ram.h: + * include/pkgconf/mlt_v85x_v850_ceb_ram.ldi: + * include/pkgconf/mlt_v85x_v850_ceb_ram.mlt: + * include/pkgconf/mlt_v85x_v850_ceb_rom.h: + * include/pkgconf/mlt_v85x_v850_ceb_rom.ldi: + * include/pkgconf/mlt_v85x_v850_ceb_rom.mlt: + Support new ram_vectors section, and fix ram region size (don't + allow the use of I/O space). + +2001-03-08 Jesper Skov + + * cdl/hal_v85x_ceb_v850.cdl: Removed + CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT_GUARANTEED which is now the + default. + 2001-02-08 Jesper Skov * src/hal_diag.c: Replace CYGSEM_HAL_DIAG_MANGLER_None with @@ -140,7 +200,7 @@ 2000-03-21 Gary Thomas " @@ -66,27 +66,86 @@ cdl_package CYGPKG_HAL_V85X_V850_CEB { puts $::cdl_header "#define CYGNUM_HAL_VIRTUAL_VECTOR_ROM_DEBUG_CHANNEL 0" } - cdl_component CYG_HAL_STARTUP { + cdl_option CYG_HAL_STARTUP { display "Startup type" flavor data - legal_values {"RAM" "ROM"} + legal_values {"RAM" "ROM" "ROMRAM" } default_value {"RAM"} - no_define - define -file system.h CYG_HAL_STARTUP + no_define + define -file system.h CYG_HAL_STARTUP description " When targetting the CEB board it is possible to build - the system for either RAM bootstrap or ROM bootstrap." + the system for either RAM bootstrap, ROM bootstrap, or ROMRAM + bootstrap. RAM bootstrap generally requires that the board + is equipped with ROMs containing a suitable ROM monitor or + equivalent software that allows GDB to download the eCos + application on to the board. The ROM bootstrap typically + requires that the eCos application be blown into EPROMs or + equivalent technology. ROMRAM bootstrap is similar to ROM + bootstrap, but everything is copied to RAM before execution + starts thus improving performance, but at the cost of an + increased RAM footprint." + } + + cdl_option CYG_HAL_V85X_STARTUP_FLASH { + display "Build for on-chip FLASH" + active_if {CYG_HAL_STARTUP == "ROM"} || \ + {CYG_HAL_STARTUP == "ROMRAM"} + default_value 0 + description " + When building for ROM or ROMRAM startup, you can specify + that you actually wish to target the internal FLASH rather + than the external EPROM." } - cdl_option CYGHWR_HAL_V85X_V850_CEB_DIAG_BAUD { + cdl_component CYGHWR_HAL_V85X_V850_VARIANT { + display "V850 variant" + flavor none + no_define + description " + This component allows you to choose the V850 variant + you have on your board." + + cdl_option CYGHWR_HAL_V85X_V850_VARIANT_SA1 { + display "SA1" + default_value 1 + requires { 0 == CYGHWR_HAL_V85X_V850_VARIANT_SB1 } + implements CYGINT_HAL_V850_VARIANT_SA1 + description " + Choose this if you have the V850/SA1." + } + + cdl_option CYGHWR_HAL_V85X_V850_VARIANT_SB1 { + display "SB1" + default_value 0 + requires { 0 == CYGHWR_HAL_V85X_V850_VARIANT_SA1 } + implements CYGINT_HAL_V850_VARIANT_SB1 + description " + Choose this if you have the V850/SB1." + } + } + + cdl_option CYGHWR_HAL_V85X_CPU_FREQ { + display "CPU frequency in Hz" + flavor data + legal_values { 4194304 5000000 8000000 10000000 12580000 16000000 \ + 17000000 20000000 } + default_value { CYGHWR_HAL_V85X_V850_VARIANT_SA1 ? 17000000 : 16000000 } + description " + This option contains the frequency of the board oscillator + connected to the CPU, in Hertz. + Choose the frequency to match the oscillator on your board. + This may affect thing like serial device, interval clock and + memory access speed settings." + } + + cdl_option CYGHWR_HAL_V85X_V850_DIAG_BAUD { display "Diagnostic serial port baud rate" flavor data - legal_values 9600 19200 38400 + legal_values 1200 2400 4800 9600 19200 38400 default_value 38400 description " - This option selects the baud rate used for the diagnostic port. - Note: this should match the value chosen for the GDB port if the - diagnostic and GDB port are the same." + This option selects the baud rate used for the diagnostic port." } # Real-time clock/counter specifics @@ -107,7 +166,7 @@ cdl_package CYGPKG_HAL_V85X_V850_CEB { cdl_option CYGNUM_HAL_RTC_PERIOD { display "Real-time clock period" flavor data - calculated 42500 + calculated { CYGHWR_HAL_V85X_CPU_FREQ / 400 } } } @@ -115,6 +174,7 @@ cdl_package CYGPKG_HAL_V85X_V850_CEB { display "Global build options" flavor none parent CYGPKG_NONE + no_define description " Global build options including control over compiler flags, linker flags and choice of toolchain." @@ -176,6 +236,10 @@ cdl_package CYGPKG_HAL_V85X_V850_CEB { /bin/gdb_module.bin : /bin/gdb_module.img $(OBJCOPY) -O binary $< $@ } + make -priority 320 { + /bin/gdb_module.sre : /bin/gdb_module.img + $(OBJCOPY) -O srec $< $@ + } } } @@ -184,8 +248,9 @@ cdl_package CYGPKG_HAL_V85X_V850_CEB { flavor data no_define calculated { CYG_HAL_STARTUP == "RAM" ? "v85x_v850_ceb_ram" : \ - CYG_HAL_STARTUP == "ROM" ? "v85x_v850_ceb_rom" : \ - "v85x_v850_ceb_romram" } + CYG_HAL_STARTUP == "ROM" ? \ + CYG_HAL_V85X_STARTUP_FLASH == 0 ? "v85x_v850_ceb_rom" : "v85x_v850_ceb_flash" : \ + CYG_HAL_V85X_STARTUP_FLASH == 0 ? "v85x_v850_ceb_romram" : "v85x_v850_ceb_flashromram" } cdl_option CYGHWR_MEMORY_LAYOUT_LDI { display "Memory layout linker script fragment" @@ -193,8 +258,9 @@ cdl_package CYGPKG_HAL_V85X_V850_CEB { no_define define -file system.h CYGHWR_MEMORY_LAYOUT_LDI calculated { CYG_HAL_STARTUP == "RAM" ? "" : \ - CYG_HAL_STARTUP == "ROM" ? "" : \ - "" } + CYG_HAL_STARTUP == "ROM" ? \ + CYG_HAL_V85X_STARTUP_FLASH == 0 ? "" : "" : \ + CYG_HAL_V85X_STARTUP_FLASH == 0 ? "" : "" } } cdl_option CYGHWR_MEMORY_LAYOUT_H { @@ -203,8 +269,9 @@ cdl_package CYGPKG_HAL_V85X_V850_CEB { no_define define -file system.h CYGHWR_MEMORY_LAYOUT_H calculated { CYG_HAL_STARTUP == "RAM" ? "" : \ - CYG_HAL_STARTUP == "ROM" ? "" : \ - "" } + CYG_HAL_STARTUP == "ROM" ? \ + CYG_HAL_V85X_STARTUP_FLASH == 0 ? "" : "" : \ + CYG_HAL_V85X_STARTUP_FLASH == 0 ? "" : "" } } } diff --git a/packages/hal/v85x/ceb_v850/current/images/v850flash.hex b/packages/hal/v85x/ceb_v850/current/images/v850flash.hex new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/ceb_v850/current/images/v850flash.hex @@ -0,0 +1,51 @@ +S010000076383530666C6173682E6865785B +S1180000070A400F4CF0010A400F64F08F07F4FF90070000007D +S11800150000000000000000000000BC0700000000000000000F +S118002A000000000000BC0700000000000000000000000000FA +S118003F00BC070000000000000000000000000000BC07000022 +S1180054000000000000000000000000BC0700000000000000D0 +S118006900000000000000BC07000000000000000000000000BB +S118007E0000BC070000000000000000000000000000BC0700E3 +S118009300000000000000000000000000BC0700000000000091 +S11800A80000000000000000BC0700000000000000000000007C +S11800BD000000BC070000000000000000000000000000BC07A4 +S11800D20000000000000000000000000000BC07000000000052 +S11800E7000000000000000000BC07000000000000000000003D +S11800FC00000000BC070000000000000000000000000000BC6C +S1180111070000000000000000000000000000BC07000000000B +S118012600000000000000000000BC07000000000000000000FD +S118013B0000000000BC070000000000000000000000000000E8 +S1180150BC070000000000000000000000000000BC0700000010 +S11801650000000000000000000000BC070000000000000000BE +S118017A000000000000BC0700000000000000000000000000A9 +S118018F00BC070000000000000000000000000000BC070000D1 +S11801A4000000000000000000000000BC07000000000000007F +S11801B900000000000000BC070000000000000000000000006A +S11801CE0000BC070000000000000000000000000000BC070092 +S11801E300000000000000000000000000BC0700000000000040 +S11801F80000000000000000BC0700000000000000000000002B +S118020D000000BC070000000000000000000000000000BC0752 +S11802220000000000000000000000000000BC07000000000000 +S1180237000000000000000000BC0700000000000000000000EB +S118024C00000000BC070000000000000000000000000000BC1A +S1180261070000000000000000000000000000BC0700000000BA +S118027600000000000000000000BC07000000000000000000AC +S118028B0000000000BC07000000000000000000000000000097 +S11802A0BC070000000000000000000000000000BC07000000BF +S11802B50000000000000000000000BC0700000000000000006D +S11802CA000000000000BC070000000000000000000000000058 +S11802DF00BC070000000000000000000000000000BC07000080 +S11802F4000000000000000000000000BC07000000000000002E +S118030900000000000000BC0700000000000000000000000018 +S118031E0000BC070000000000000000000000000000BC070040 +S118033300000000000000000000000000BC07000000000000EE +S11803480000000000000000BC070000000000000000000000D9 +S118035D000000BC070000000000000000000000000000BC0701 +S11803720000000000000000000000000000BC070000000000AF +S1180387000000000000000000BC07000000000000000000009A +S118039C00000000BC070000000000000000000000000000BCC9 +S11803B1070000000000000000000000000000BC070000000069 +S11803C600000000000000000000BC070000000000000000005B +S11803DB0000000000BC07000000000000000000000000000046 +S11303F0BC07000000000000000000000000000036 +S9030000FC diff --git a/packages/hal/v85x/ceb_v850/current/images/v850flash.img b/packages/hal/v85x/ceb_v850/current/images/v850flash.img new file mode 100644 index 0000000000000000000000000000000000000000..45b4b9efb5cd209420773d9c762cfe166c46d43f GIT binary patch literal 6393 zc%1E+&q~8U5XL8M+O)McRf-56tQYZO4U394C=TBoc{4B9TZW5{dLDWK|CB_Q()#cl2g`kB63?{~#tN{ZiFju?56 zjCX3ry&i{F*YSNO*!P(0a7POy4jJZ8K`0;@coGcd&eudoW-a}?>h$p&lEUG|s zzi3YL>aKE2&hsGi4ZV)??WOC@@f~NZcP8h?0^dbO-(^PMbw;0;(H9*_2^Rm}=X5=2 z{_0y%wUmVKWri;rbE){}8o;{<*2LVFTZxXmjOq>60s1rQ%~M{vOvO3GdBi5-0^%ZK z3vmf?8F5AKtSNa3?YD|}8F6iTt`PlC6tgk;mM_8qT7RT*0nQO$ zrS@MJ`@cc!Z_)RC^gUoK@Eo6s-oQj_2)GD@De&SJGfAcC7ult#@p#Gb2i?)o3j;qeVt+;0+4VDz!ta2%NXpJ_*FuPUp>g zzjyz*gTIrr_daW_z4qE`uf5hf`zUhr6(s0SnXpo-ieQNl&JdCNv2v)cfO>6ET?zHl zpn3?@X9d++sAmV&RZvd~s&i0}3#zN3t_iA#LcLcpRM$Y=7gX0my(Op~26azRorn6N zpn5pe_XX7>puRJx9trhrLG@uc{-FAB9Dh)K1dczb9);r%s_St4LG_V1{-Am^jz6d# zgX0gX$Kv>zp?VySKd2s$;}5Fqar{Ab1CBqao`B;Is*l3)2h{}}e^7lijz6eA2FD*% zH{$q%>SJ;ILG?r&KVwNJgwYg5Ea(=(2R2kk%!m8lr0R&uZUU`Gy75^9v?Y_Gh%s=N z;64uS*Wj+8FjMGn6tuNMTgaD6sD*zigr9&Kf%^=&Pxyj^*4f=1(=6ntMI!0EPauf3 z@{6K~Roz#xHuz^rk0j&LSGp{DePnzd39%IQkqJe&wBsTeQUjMNJ%n(1A>>MaZ;v0g z*bhr&SQ2ti*zi6wI=q`>Vl3%>fOShNW9>?;=48mrS%>;XNf9PWVFnrcmV%6ANJTWP zHEI16QHs=x(s^bxTlMu5MA^MQ;u(?F>E{k0lzs#_D zRNd&!#%B_DjQ{z>J(J!{IdI<}QjgvLaoV|z)~t@HpXbeZhD_^UP;l7Lo?#*X3uF`M z_2@^0Y%{FS*htn-+e|v(>GAYw(q)j71=hjn@XC-1;)T{Wz^N`c#H!N!qyY3^pnZMD z*1ND83S`Rj6-Vq8^ehbXi zmLh@9*OgHMxg0H!bNr$)huJMfmZ2vR@PreHI#H7nmKL5HIeqw?sN#`jF$?3C=~pMz z37f|}Gj_+gpHJA6^k(vb$$u~%Gk-kgTzYF}NA~A={VGFFkC(GB%5LOHp23$B7k$l; zyo_gvs_2#!;J#aZB6Rc(#xJF{Seq885vV0tMn~XGsYu5TkPkPX3COboW_Uj7a9U{V z1}YoxPqBp3*+4{R!ULkTU{XiF=!|;6;$TRUV^O^?tA+KZ?q@|QJX_?{4~WiN1(rO9 zFy`@ji|Xs8^ODHjED)VZ1*+z$&e6nc^Q296ro#O>!%w&e$xpaBaM?)w^+IAWiPG@N z@##6lkSR(DlV!NK*az&p?LTp5k*UrK#M8xJf0Wd5iEvFMhRXuc171stAw7oZ0q=4O z1JJngJ^7-u#iDM^zQT}kAL$5pBD0<$G1tcuLpoRr>5UYmkO{qz{lJ$&Z*{kOZ6B@H zpO>WAO8{w#okmE8lOZ4FNdO;03VUmTgNB~?6MAc$*K4c){9KtR=~KLIKP}F6vLx5d z6HPTku2$@0NoB5c7`bZOmd3QyeU=Dxc%T@dlIu(aO8a%W&J=>2U$oUhNtDbfUfUtI z?z4#mpZuP-<~k<=Z2QOAz=?kU?`=PZJ93UPIHpTb8@d%`q}bgayMmBYwps9-U#cuq zE>suid-Cm}#Z33+19$f>N^6s48SGCUX%)FYO%t8n)41kwS9F9lsZZ!Z!Z{x?emOmv zjJ@T6^vNNwt=EtR{WDFz_fHmQ!kG1gRDa-vo?Eiq42iSmH(j;;tmnY=Cq5nGRexwl zt|(ofg!sPq-%msNfV>Sj0#Y1OcFLv!3P>fSSXGv9XNyCC_xzTtC=o7{Abft4+g=Cv z%{r#N?n)w+ohbE9qEfpu(J!l(W3-R6UwkY|&rXs@abi+5jC9;I#*Vt2J&ky{JZWIu zXF4J{B1!z^v1BUnin`^?`cD?LmN}YjfhS4j%hji{#sgQ{Oixw~8AIMCYnVPVlWD%^ zzj87WBp^6O5TEOhhN&R;1hu-GDV_>kE8$m1Son=4T=CQl1HeU*&@`rdu@iljP0U2N zudx4_6&yZTIjb1t4WH!#okeg5Jz#S)hLJ@XEIGg~;#im$d=d&zZn8P_33?5g%pwl& zCI+9QbVP0}qoNygfe zv}1KHrPZ`7u{6$VJ{J`gxn3bSzD7-;}1mE>JtsJyDcinJ9DlQ&vgbJ%Q`KuhyQ3jr$gD~ z!YFcUbmVp0HQRZEEaT@4C{ciji-xhTn01>eWD9MXCRGg2;`` z9p}~&#?DqQ0V+#sSlB7XWq`c}`4M~dv{1TpJU>;L@Oz1Cj<#2E!_dNb$9O%?RyLxu(bmj3V67L4@y*i4VS|foaseQbczW}>@18)Rb@U_jZhrqUBIlr_DezA0_ zV)l>ZHlaGt-+s;Y8JknXkZWB#b&QXULjM*)!=+5L#t5ED6VFCbZ7-@ zN>5Qs*25>SU`aAaU0u2eeiuP)F+4v2e#04{(U>hdk7Nha*a$Rs>Lxx6u(KK{jbr?T zhgmXV21AzO^)O4ZJ%IgOHtLv|jXGB^eI+q=ky{TGmuGXPX7fQa*szJ%Rts&V+4JI* z=@9owyCy1~BZvoPq7X(l7oO#13yzHpcr-lv%$7X#o9*`Tc@DcM?K2Vk0l!rq1F-wD zEZ6(cDuo3Ys_O6^=7$A^jB^B}L1ENoA@{#Px%JG!;Lu6KBiHy16w zf91~e^>uCS7dZ>SAIwr&Ig9MIFScvIqnQkSi`*Mo4Q83bSdAwY*O)i;CaZ#dX`91B zir~J1d>4erQUARV8~hN$@)?A}R2OQ5@&uAhcb)w#`W1zh?$T}jDDB}{^-?qV#u)Jq z2d;MlpN$g)zjY3$zxeFAOu4_8p+DHm#;af@xa}5qRQI8N!C_i$;i9_T_7h)qTLlLM>QYc2wz7_d+esd_ug)y_k7CT_P&SFQtX{Q>@DI znzR9GjnZQKzws(Zy}$J&w2p#ZUzu=Ps*+O41K@{OWyFH6ydrr3UzvyNHj-4>dwY}# z7(-ezMd#WKuG8R*B${ULgXfgi~Vy~etVqtBK784FG<7$&kpqn z=@4y8d9m@PC(Re={ECt(_Rlcuf!df@7~cSDqEJ2wM&{bZDRIKw`PTLA~_*0leqZ(KNB3Q+&O&cOVD)Mm@#5$Ta}< zn^We+k*04+dskSb*HsTbq=v!XC;4ThJpz`Y&hi#W=q$AB;!Z+K=&LQ2OnCwlCQWAMG`GSVj9DmT4zo{eF>Vxzq>J2D+dN`4GYFF~}M(^rgEO zYd^Gm&P&AW@=VVhgjqWX(|2bIz{J^Pn0;vmtFpx7(t>Y2>(f3dALze(PUh@69_Kp? zq^F1Z?o2qxB8Rg+B_y57#-q!C@nT!_{NKBN1m%miCvb*bU$dG1QA2z|XTx{D==|~h zgR>AkE8jC4JHIg-=h%AbsR4Nwa)9b@?-!+OaY&J|FLBP%irib!df7}`IPW^l#B`qH z(R<2o`LI;B1?#W|Rs(z$Sl76o(6YqbIoMb4@$ZDS8GJVi-*{Xf^7zSMOcYyZN52m z%~AU+rKgrhkTZ)<0TGoxIW?GlJas0DLWtieza$2Vfqu$3q<%OR{D@R} z9aL!1C&qgKMsDAT9I{KejYdU#5A0SiBxy_--)OuL0Vm^r3h*glv6Jg12kfISBrBnp zdGYw09FJ?k+t$F#K88&@6k~%O=@+HF$y1$Wv}e2z#V5@sh)+z)go~1@leFNPL{Bx# zx!TCIqwdF>;xYr!8gB=SvBQ=T=q-BN_VaNjLuN<;nN=^nd`Ht6U(G<2EjZS~Ue1-O z^3()dP;2td?$QmVhx)nBux7!LPka}?{#coSxzoP;L}#Sw(Kr>@wJL~lNvUwTfN+hd zkAlMrJ7i0W5@HAR$?GLkKW1}`0H*;x5vp@RgAwbR%f}ias?c6$$T^**Jd$XgP4>9V zN##v;z{u4C4>PEB#ZrE@*Vfz9k)rLiT#6)pUC$cOuQ$T}j{CYip3*+!v|-dId1E;C zm+zZNd+O_Y_4ByQc;|Wh)bjH{dq00K+B3jH&PE>*MrXcHnP8E?Lgw|68QdU}Y%ZAmb?FzYE>EvY37xDcjNrD7Lw_^(Kjt&&R% zxNxQ1at&Zq>|B3)m@@Eu=${&%zfG`oi^wf80R5;!E_;a?=!??W38-=1N|chwEmi5$(Wm&6TI9C*%Of=)4b{~2UAlUy8a&*`ReI`A9x{NQ zbMoAR^eKIu0h*`y4*Fq~W>v-7!L zTG9*GW=sce8&#T2Z`LN>2z?l5JV;P?5_*l!2O+|o zLp(N*s|xM`DuB<*lsf)E+vwh~({S%m&1LUBs&rO{zu6Bp+mAAvoF`814DnV7EXT`TmuaOh=p#E2||1VKM<`Kftsn8Z&aq)a$!+hD_s( zEW*HecYRH*6L%s+=Bw3ifR)$!H&=(q?F_m1C`v-^Jqk+*(l(GiE+uw6@SS{jTX-}iafpIM{^ zkz9u|9q^~667(Nm9N7=iV1ioNJ+dsO_z$k=vQ}Fxc=zCw9Fw{DF6}TW?=7boWndO$ z_*OqW`40F_1@dB?kwWLP@@vc)-Mh!bihEOdRdMegpZyN_HGcRuKYW`XzWh7jixhe) z$%zClXBC%7G$n%L0fGPdOe5~1kx}^T9bwE!1YfAZAn(gA^agmm5ACRjSmeS;^IMzv zP|zRD3>GRx?ldDxM|jK~3XUo=5BLrEWE-`5x~KgR_OvF-w=cC9JO$9;uMtL$dbb#t zIP0LNS!0iZcT+EsuaT!UBk;FqgeYwa!`NyO^s+Wg_Be_M`NE9FTzJwn417Wc*9xwB zp(q*JHi3nm@Qt=9&=$qWYsvsp)PrPVKr)^l7;&1>X}D`O8DKSSO9|LQ%tPZ0z`hIn zrYL$`Y_I&uSl`*2nDCs}_9Gqis^`n4ew z>ZRF#6{R0X$kBHR?0S7b?b>*Zpae$=i~xKE>nnELbE#)ge$;--hB=Q@smbNLbPvG} zjQa7h$$HBPKI86ZSDT` z13d$lukBqPSMd_4H`tTQ-!_1E196Go8mOhXwmD^|Ic{tV2v;zBc0K>OzR ze{X^ZzuE{kEO=#3gq7)8CPU%M&;V4!LL;me^kGL8fEEr=nLxw~-iqs{F0k(OCVAD# zYo=&u&6sh`6v3L=JRMh_P=prq))!@;?b7K@p41|kxdUlN;7zEWP4`h%IYX`iozGZj zqO`F@dpZ&1Cr$-M_^ClyO z>*TzO?0V^pv<`YVIM74h4o}w7Cu(@|TmKWxd#*8J=2^~6-eFbguSqo!m*cy~!MtSp zNvWep&Q|`8)tEN-5c+1)3iJ%fiLYKdEE%Bxxkh|n!<9T)O7l+DUEsTalovrgmecfo zlRUPfX+z`MHU`!hjEiejLR7Sw&-WQ2%KNY#?T@An>BocDTrT0ez8_x!uBoOk9V0r0 zF{W`U=|XrENY9pCiX(Jvi5`>^_idVu02&Q5v>hYT*Zx^4TLM@0McDbF|+f{8~oYx!qLhEuf%mK zfggy_JChV29pM6Yxlr07Wbdw{hH1)4$rw^t~w0HrU!aQ zBvq#Jx``k}j)a~QX0`Y7ni68i>XY_)v zg*kB05d-p+)YoB<;no6NSby%cCyeM*)Jxd|Sl*DmpY>+7u<{$R9Xvzt=jeD&-_dxD z^zCMq{oiu~@p|cm;CQ`~s7V~LlW%%-=MrVFVEb5uNw!s6p#S-Iux}x+fW`vVVVI+$ zhZMnX#ef5mkcNq-_c7t+;K84JwGNslV4i~UoDInGq;Q513BFS?)g9&Z&7HG$NORsX8o&+q->0W^PG?Lup zjr8Qve(>Q!0IKwkaoT8rs+XPu34QRH43X%EKuewp5Q!9G0YIQc1mJvzZMV)SpT(ix z;BbJNNTKrX$SZU0?ZC>!H_4BK9Lxq>>8fVs^+?R4dDX!EFYXvj@tG*i^%{8%3kKOs ztJ5}^kK2-*Xjy_=YNyFo{bd=>L6k|bnv-DF9EXu6IeG9Ehq8d1px?*uhRnc|48sQB zH=++Da-{$_>mG1AqRt+oHU*%@-UX$yV9z8QA%pwX0Azt)Ucno|-=r%uBh;9CNo~Yz zv?!VIl!OtqM^|?x)R=>|$ovy$2-tzm>^djD11eQvY?Pz|yQUYNZ|G$y0JTNn!}znf zp~j?YwejlWUcQzKH6{bT(!7jf>nZj%ma*?)@tx^fKR)*9qi;7wXNi6&8r-aPgU7iU ze7*XV;1Mq2Hfsa2UFy=HkRa)O6)!q3$AAA^oB_Bs@$=$PbC+df z{QNQ_zkS)NwJh%=Da&6OV|f+dv1qLy`_F1Dg=e+d7&R{dD=OzZ27CG}mI!Y>j9zB5 zCX)IM@AlfKLf?2INyr;J*gv-EPGGBUFgKjx+^Qu_zO&EfQq1GM_9>26#lj&p60mZ03{M*nXaRI`}mBWX%QegTDKzOz&=4KLAmH{C@GK4t;(GW=jnku#;E1 zNBDOnPe(m>et^odoG39WnNEJhZPhAZjsNvL?t#~1MW-VcV;J;BRLyAX^}s>ADZgE| zKIQ@0OKHJu7eG(A3mUvlpmn()a|-$GG9+e4MgruSSlJVND;Dz!)_&wev&HfhaIa@#O z{0vtUF}XKtmpd88>)Oq)gtaQ9TY%&BchHtS-6z*p(%SkyitF5H6uBheEiRV!?%r&q z(xLnyA1O}c1J3{zmKN3q_?Qg+*8(q--9Ll-R=6_^W3F{?1o~_HM6NjoM=I~G_~!rj z_bqX{v_ti`OiP@_LG|;KmpChe>a_r0Mk8HMw7fQ-fthTXgERJwR+Q$Bq;C~36J?Gw zjf@(6k7F?BxYLNHbLfPa&L5SpnVg{3bSul`+AEV;f9ZHK=P&&tIn-Y|Gg({4bg%dA z=Dl5;c*)t*X*-W`e3C7sBnM~lw$(L?qiAJ5aVL-yi$^k$ZhXXK-C_#T7n z6daGzT~OtH1+?Mfr7}DP3NzDm2~QJjdPH!nBL4!vi^!Ak`#9MQzYEDz@LNHC`Uu*F zEsqH2v&q&!GTpO$qEs8ADLGh*`|^uF(3HGg`V#!^E#3Kpe}4q_=kyp7cn9=io2FB^ zG?kQnhI?@c^gaKQe_y_Ap&VHK^|DU`o@&nRDv%`I&j;TnS=;c9t0t4sS^-d%DWYzN z`za`(thkFBwp_o3)P^Xj{J3Qhuj2cd!#eQi%&+Tw8As&VtBx_BP92Bdo9R?)HPOI7 zHC(7;--ImqPDr%2jD49?e)}!!*)8)@=g+jVh7B|FE5p`m7vcK`?fhh@SK0ql_mM+M zw&{-JSpy!=)78)j6`>2w^FSMi8TTY2Yz2j7C@e!^3BVFkkevcg3(V!v^DyHvUKPl+ zn-MEN+ihQpJ(nOwJm0#UTdZBd{fz4VS5a!Z*VbJbW>i@@8Y|>Txd8dHP2{dcLA)IV zQ7;LD&l;m}#DPn6J{cvCQHSq66Sd%h-aI??hR&Gl){&pM;eI6+{GB=u&(2&si*K6g zNyQn%sQ>2Ie2RUjL*!=pslAkl`{hfC*u$78nCbsU% zONsT|Um!YEM`1LEvxgBBM$d8`f2*glbUzoORGpx$5@SdGF~C(}?**DuB)Po5AEH%y zCQKDIgpHVUqhNe3B4>|csD{WsS8YbD5uci((6g8Qhgf4xhQWw_+4wv?jt;zw4puR= zwz+VS^1uigA0W&1#wEaC0DH-dP?99S_X5lwR%zB|4&gS95Sr1L@|HS?1+%b${u7<;k)kvqLO!8L zl)12DjS4zdv5C)xT`g!2;~FBtFNwt57Nu5Al*t$cbfW)r?|7txPyWtWB^S7v1ilrX z-&n#;r#-#Eh}=BrWoBf+|3Z1GI#CxV-NS#zRS&*NB#tI3Qa&k0_f|JXD!7ME0!`*- zYD|bNXGLU8JPEAn^tx`+tV2@9&l5!{hLJO2EfJ#gc!Zp9>rJD1aG)uaTS#pU<|^E! zo_=DdGFU&sNcWWGy=nOE$1(dSHm9=Tc4vIs183;|{JY zmTU7BY_YuCc+*DvOV`pu{iTMqM1N@@E!JQ9Fg@O1O3xVPFJ)##6f@lkuzULY@ONK7 z_JPs&c-9CJxcpsLjE|iCtTIp>^tbI^?6txMzy}5M%(=&XNIQ<;c~{*o4T9N_n~fLmR4@r z1~B0OQyD&w`coLk3q_L%nI%epq1miQ;b|XFqx43uSvV{Zqw_JM-fR5LY7!cWV-*gY zWIy0t?IXk^RF5Lc)Egv2;|3byc5|1n2gRK}V;gi`kcJ1UfjoN0U(b94ISHEGSPS99nST7%AjRm_X ze;xC+Z6B*W5raKP6R;<4&t^WxB%h#kd+Me01KyL*_RDs47B4z$`I0!5m6RH5Qb^Uq z!-#rjRgI2t^ED=IW|#$hDhV?-R-UnYQ_yz1(9{RZG_D|hqDDmU?AC7-x3=Xu@rYiP}{#r<2x@9jXnDb+&%UhYJ_v`doD z70gx2dZd4(UMd#0{QwCx?4VU#qNXK^+>H+jIz-t^R^!0UJ@qf!W1>nL4 zL@rV(YlYxQ1YK&U8JP3^_=PQL66Q{VxC(REq!wpH)d>*qfqx+9+jT;DqZDWTz}{l> zoNYZTL!LSddSpFi!zgjF{oi24E(N+CUVe%ce5_n%YE_+huEyZ_v;V};B1IsB_;OBg z2C+~v_aFQhr^sRUlD`EpiwTr^?*aFJhVNZ`QID-3#>_m7&)^Lp3UmVua#m!(pXafu&yZ2+P?uO{|unXJ%CogN}@;lh(wf(Xm?abyuyW_Yc z+nom1-Lj#jr6<}NchGD5C`HD~yc2D8A404HiCOsV(Ah(*a9$vB*Ck1B?RV}X9*7Er z^vPs5`v6c=-*Nkn^$6*Sc*eDNGcT8J_Tt#C^~$=4UtiX9xB74$hp9#9_E7Y^FusfJ zS2`e4TbShTmqHg7+LLPfC2bkpq0am35&rtHg(LhW^!sp^)RjfUPEs%B^~u&GIaGA& zLm}E6ANc08UTXMSnhFr{HJ6w544d?sv(563+0>Hs}=3k z!sCfw)*i?(0~GAvXsh!$Ri>Q#d8$j~a)76oRVr@|=$PJm95l4GT;zUQx}p^A-6{s( zzRMQx+5BLOClEao_&0g*UnY_7W5B->%IA}ZY*%eN>sr%C;pv_(T^)jJXxyUsww$Z>8WytXcq0R{dhUt=l{C$GbM^f5@|XEF}^@1lL;i5FuuzOM>R&Gv-sHmvK+JVFr*8w)g72&EVrFDaMG2VN0|FH%FiPQZRDX>DjjEagX_l(5NayJ*9+exlRNqNgIy(wQqlxtFVQgY|@&sd5h|_?7{) zb~6X$tlh6@4ntA8)V<7zd5t9c9h&^+aG86Nu@=e&UvGRZZkaIe8565?p( z-^v45OGA0!On?@Y-_8TSD19>z91f7j74iz*qeahD)A@nV)8*-+Z4j64;B%Z0!d|gp z&>EmmSuahH(0;gm8+_Y(@P7vpo$G;CuY&mIWmjeYYg*u|=ECX0Up4EAnwUu@(2ED2 z51kC0BYI8SBU_UjuW9jFE%%xhJnxgoc;R|H*+IXl!MAIZZtT%60Z#F}!Y`oDZHjqu zC|As|bDc~!X5H&J^yOau62FgR=(h@TZ)>kJc9dl`;3X-BV$tA?EkbI%5F4DpyrHlE z?zl8}Fn_zg5c9VT8_3|kQ5eYJDhdM`+>*jT1~*~4)?a#VI`1!?FN`Q-x{$Ukey;7{TO-a5`*_4L-5;V4#J(B7$I#Do*UB*6>d!SDVXfikB0nB} zEb0#<55&9~w?_|teGXx|19VQ`i_YJo0r*pb@EgC4PqFWT3z#N~iFnO-res-#$gG>uR&~kzw!du7vIsVus%Pq@8K;D z!r(K(5ksyXeVr|_`(}uKjbHl6seJVeJU=Fou#yu+67l5kbv5u;KRQCL)*m6SSLm$Q zoFdV@fAv3(keKG}EmO`&Qpw3^uoj}UUajerOFNaC#yC?fl%7{N`gA4ROSN6Tu9tXs zQ*+m?uCuJK>wOl>`??GizEG|4%BA^AO{alkmZ}@urvRT1y{2pPwQc3yzUH=DZAV#O z+iPHv;!ZSr3@7nSvo{~sj~Tzd8LQMBx#!4X&3sVlAGrfYUL6CiF!IV6I-0?;Q{P=! zE)c#1ZSrZ`K9`3*_&&4$STR5U^$L_ibn~^(L@JBBB+_5&p}{myF$|( zPsg*3YxG4ANuni45-qYM5I&njNnpvL2uQ-p`6cmwG)Uqlza#*+4RE0x|90bk!#nze z``-WNj9gO%W<;$B%!q>fduC+6Dlj8wm;fIqRDaKmY+=4``+y}Lkz2;GV@9 zx_EZq*?1})yiz6SR5pWF&HR zstfr!34R>@4-1C*+bca4BTLF$jiu36ht1>atvJPc*dEufS+|GmulfY+)O%pRocMnm z=*Y~tdhV;+OeL{j&bpwpEGMEj>jmA>?4y-X=e-q8Jon<9mp1kHuvb#wVSkevX4_b~ zG22_Qvws8FnHO)PjRZ^cHl7FPPADB?Nfn-hc?WII1jX&6f6V=dZO)^9n^P_j?Owml zd5wO@!1Ta;_Iz@L9B|>8b7PHxT*VnZ*;8|bRMp`B=oQ8U)_=V;R{DQ=0}fbZxI!Hu_@yns%GT6$q=S>os<0{h5{W z`U9W9k26c@UwtQIVf6vl;M!|$)1TOPa;Vo>N}(IM^5H7Od~QS#XLY?t<1eeY|lx?&*msi;FVdxgF9xJ7~|`A8+^2t_VWar>Pw`Kk=i z%1?&0vdWnVP!r*~SrIgI@Azl#oqNvQJ2-PAzjx+Z62Cf$U)C7NE!$Zh@9&;O&JIGf zh;&~+Sw(dU_^v>{-)0a7xx;gP0S-lOJ9F3UzlYW)tW4GdssZxszY|`36?EcmO&E#$ z!eL2rysxLSoX4Oh;5TM#`!rs?DH_@yXNGhEEJyqKuCD@C2g-qcVGN^bmcLHR>qD!9 zn3+sti(exy_%5K;Ie+1+3xIn8tf4rQ(e_%;V!z~zlidu7vf?{9v_u})?ZsEw z7AkF@>)&{-^`PzD#eR7&)|AN7-kpdN4PO|4;?0xc#jjWRD$q{sI~j{|tw9+cAz`-A z;+{`LqWzfZ4$K8&Z&uIgdmfFel0r$;2p?byR%PLk0 zKV0?r;^j5KjF3(8G$d#F>ZMEbNY309tAvWdho-e8j{vVF0GDVomk;gKW>uA=ZE`MnX^N1lXB9o9#NL!I%rtN(uv?h8p$z!d_Q z3NAHV8o0vX3WqBauHkS+!8H=D7`Wo#(!-SimjKroxW>XY4z3AsCBc;p*JQX%aGBwn z0#`a*nQ&#pC7SNy!ahy)gNLh^)o~kYpf(e(AFazOf8w!!a8L|c_`r%E3Ns1|Af8%X z`9p{eD_1XGx=JWoSSbjpg4twB748#K&Dm3?WScVlShIvkvR=4bza diff --git a/packages/hal/v85x/ceb_v850/current/images/v850sa1/gdb_module.img b/packages/hal/v85x/ceb_v850/current/images/v850sa1/gdb_module.img new file mode 100644 index 0000000000000000000000000000000000000000..649017fd6542160faca4791bfbcb1d5eff8b8f51 GIT binary patch literal 178269 zc%1CL3wRVo);C_=otX(UnIu34a+^3X34{bKl-|zk2 z=lPc5>CCUIPgR{db?Vfq(^bQwp`(Tgf7nG3fzXS8e(7;cYoix_HbfAjRm;8ox&68Qx&68Q zx&68Qx&68Qx&68Qx&68Qx&68Q`9Jw_>n4c&y%aM`t_aZ(ORxaX9+TL;2=`Uoy#)6q z+eBzGSO_j>NW6Wm`B*}Wd_z1+P4?i;xKAh@sP?u~H2 zjk^zq`;FXv2;8sc?nB{z1$W;W+t1y1!S-|aU9tV#eHgZ%yEkF`x%+O|e(t_Iwx7EX z$M$pg5!il#-A7{kx%((=KX)IE?dR^z*naLl2HVfw-+}Gt?k(7U?!E`MpS$mg?dR^T z*naLl7TeF=$6@=0yfi`t{jiXUEtcSGiz-7V!1soP%8>FF0;xM%@L3I{C6ZwwJ>gr1 z?_ThI4!%W7Gl2dLgS6w27Vv`vcfmhcg7?53f$!n)9sj)!Qb)C%8k9$#9OfoXcUlPM zn)Us#kl8I~@J{{YrG=7SX|sy+a@$DnToRBstc}DEyJYAUB9O^&Y10CTE;oRj$-mO- zqaEv`B?>JG=#VzJjr0g^(Fx&sX>E|}l0nI}CazMaP@c}**6x zy2DtL7Y=aCp$4~nL|CS&`1w&HwJZ#IhQtJ~BpQ>>*eTA?&zKsL(|Ksu(WbH8$45+x znqi)E$ATWqtk1-~(EE>l*7tq8-5Iw2LCeS~c)B}nkbD~Cln3LWM{s#S8Sy~sNyt+)+YO@ zzlHRL=}%pkt7foL@&s{bemuyfj7UjROpEN6!}QWmp(GdbiN;(gA;6T|`x$a-cpjP9 z^MG+V^wsiV7TRBD?y!*4-7Vy>aZ1nan&rdt*pm==qO*{|IDNmM)Zm=Zp3D4j*b?Ti`XmM8W-)$VqN4aqAMNJ8P1YHwzP#*@5R95eeqZ#5@>v-ImNd`L0FrO*v{QYEsE)K3f#C+O9 zq9I>HKXY0*iH3Zq`w2jeBfmD^?QF;ktjjthkY1meh;C0twLrqp#}acISPJ>Aepo^V z)Iv4`U*>3=tI=csY)l`7z%rZs9$v@O!(u~&b0 zc)VMV?&mrA6KHM` z$CI(H#)t>Zl{ZH`t;eZUDdH)Og5 z5^2jnbk_b{>z1L9e#Ll=-u6O{TRz_x^Lsz|AQj~U@-|}&$k>4K`|Nrs0ZR!Os~w;3 z(2NZL-t!yIqC|9^2-4>tayb^j_cD{vxZq42m7QB|>r16}rjJin4ZCO^2fzQ^EkD~= zX~mwt-Jzwu1_=(-<*Y%ZR+lSZ>-CL^SPDZ))ah6<5O_u1@@D=`16nKW%*ul&38gaw z_ht45t_&HqnUhIRvWd(U+Q{8PeTV-_Ngt4arLZgU7XQOM5ab>c7}z3=9SB@Y@Yh5% z@Hc|!#tuw316>&Dlq$4Lb)v7bMCb$G4?4cqSPH!`a%Kz28$Qc{a;CsH=z%6Dy)&7T zt|41AQ*;{W7kttQo?O&q(!ZMipf(OXgFW(9PR=0gp-v?dR-A%!-UxnNg~Wtg`#8 zH(~puZm=mAHH@Z9AGhw)Y`1e_j&?#&+WpX?&Lq)QMtM7HzXm)7wIq(mc7oj)gm$Cf z_{6bE;}!0v>xyZPd`Bhx?d2=I5=z(7(%*}B>$>Iia+!$W(3DSuQl?GTz)aCA9qcX0 zk2op^b)qxJ^8=-rk7QkacSnV;Gg=r=uP;m_8^%dybtfWt&mMegsI)tbM7h9wuM8vm z=E`76svf>#JPNaXjnN9SFjmzUj|AI>IKQL<{vz5}HtIJ@nx!(=mwvAJ8%_3Pft+hz zZR(yR<%SVy7HJW*#8Lg8d zY?7-x*!B_7t{jj}e&g|P0!Z!HeT6cqax}($p_$@XVq8CThU22iQo0EGq&BCt(Q|UU zhBUq~^!Qf+q%lWwRM1{d&CPX0=DFp-yLP4SFBHjY_$!bajovZD*_|NmA=7b?)@GyV z%P}B#FwJo!WtmaovU>*J?@l?k7x^NNVwWrEO6ebkb*8WSJXkVKGr zV96BtI|c5h!t*WQHynU6>ayI<9a(%Ci=m9wrat!q?T8v$#x7(0y&4ifTp-i&x>rMU z*Fx@9S*T;~EY!Jb`6pR$xOEGm#F<&Tr23StDPY6;U|JQVm1K>Jl+s|`Bd_TrIlGct z=!pVo*%)}1n`J3nEPzL2M4ve?7yV|3qjzqh!!2)2B91LStK1W4H)iIYZ$qmbggS*b z%ovnc*hZ?-ms#C%qi%uD806MH5ArI?#Po#oKN{$FVT-}r{H{^&$w7JevMcw_EpCW=)DxLae?v8ON9>`JzS(^U{jKJTeTv7m-_0 z)D~9%BE=#fg=OY<M@s^p?^Xl1OKr%^LJ83d&t2E80=oT{5fXdhm^L#oGnAUJZQK z#an#VIhg*%XR9)l`d)$hU@q&eg^}QL)|X=T%N24m83KNIMS2A2$~w6g@=LimZbM0#<4UU(gKNmV z47YP$x~|FW3?=${&(SMJOJOYWCU1m!3GMjG`*a#XbB9Ah-zv4NVPl-7(2CEEI18W` z2=-J*i0EiF=S()jEKdTxWoyU#J)PZlVeJ0mk25p}~l)sh0c8pMpMV zh~yX#^%KVnLn|6;bChRYkH+80{o{Tx>Nscz@9spBH)*wRfk zP+f4nX4cmS?eP?!nUi z?=s=3;BB}6L$mL*b>@v4(JR47>pN(@*$g)C@0MjWA95~uhk*14I;Vo(Z5&Ff+NZvg zDm?*qVQ!nErweyFqLv$Nb+n!RU2m9cD`gU7Tk80Nri?^yxFi|!&xB_l`--^zg&~AJ z8#sBY!2rEK(+N+@R-5vnh8K@#LEDgn$O#`8KL+@?eLmcIisfg}O1(0`?F>xCc1#=e zhFP&U>y_`}uPNX6zHK&mJol_Jp?z8a63YP&s^yQa;dc&g%^?lwl(Aaga4j3^Mm@!E zx2^_Czc^rABsp}GwATcMdWx&ThtvyLdtaZ73_HLwEXaEYBys@yVQbi?RN4!TCZ!jC zYs`d_u?Mzk0vdN2d!qCk+w4DRj()bmT&ocq*K34E0@m-<)VvdIAZ;iYbRi#BaO=&A z##`FbTvH97I%mR*s~i7OuatKUU|Z@V>xI6RrF!I~ve zYd;L=MX-#4r8VuFfru)dGOkPmKSA`_iQK$oGHu3qEAY66V6U{6Qg^Zrfl#E zv!g7iNINe-C3)^n$GVbzGegLMsryUeZ}DJ<5p0M7to*(3Jq*6{Q$q7R`L)N?o(z6OvN8_J4CoW%x1UByUyK}Trs)=2#l}{ctzJyfC*k@=?|~I?BF?8k z-w!NyVzpcd^XQ9-64Wv-3jZcX;aKpTtT8G+hTXu{*kDK6-SURSfzI)?X8dOBllmlB zpCm~!$7F32X}~dwo@%CZj#X$x-H%F&%IU+OqmL76IjvNE#Z=q1`>!k38U7W6~GFNQE()R~bqYD|b5f7uUjkwBJ6ka*b(}PNHKL zt=lNDB%_@8rewDkb=lyIHXu#k(rAMcM_8&w*^FXRDn}`~bO%?X|@f@a-=J@@tfmPJK+%=-jZ{+;OYMXgY3H znns~N>Z3pEqmQ`-y;c*QG%y$C`C=QaMKp>`@=sBP-#4-nX^Zn= zWHt0dnhc=X3^a{#*7O`Q@cbH+Im0?UlL*k>H9u49q}vmq@O9i_hLLytpN%gj@(gwYoO8k7*JGMG7 zj*v<&*f-J^2iq~-Ky6wov>@O6UGvu(EDct2r=&E zt?6;#3)PsFdAS(90V9618FiZmxvxHp7Km=$e!(s8FkfCT>e*ANH(P+3 zejQQ15T|fy0xrYoEL|C+MNgz0t1?h_9AM{pgk-3sF|zMKJ5NL22iD;|j`B zSOhHqU%|G{fpaeP3`%!8_SrG!u`fBXbd6~w%)mH*prDBVzWlLcf;yw8vCMB+- zRp{k*ZjT!msjb&}0-KaFA2sAX3;wR% z8;6`fYJfGu6U3cYx-+2f!uOSWUwt|TS0wtP`jWsZ{e+rw{ak?6lidxoA%b#`|9KV#Fk&xyIYjoO1zJP<@+S zjf)yL8!;*vl_3mv%bP+o>B_9}l-Y*syk2o`XH{HLWJP)(qWXQ%SG`ZKG3lE06X@6} zTQNxsZN1mwE#5X>3;vV7{@hXTSglL)MPOEpEl9x<(7yTn-;3bE&#{6H<40y67@4&* z6e=7UdZ4PAWQEa!KI|QXK?|=@nZSw{yp`gMCjYpLPEtmlGG>OcF_VI0W*Cf_WkYe~ zS%#s-y!8F}Z`PQilWLQPLCvnz_i*Z0p;Vg_y8GU;Ud{lpt zUbrEpJOuoKSZ!&ba5nj6V{ho=O1KKL3R2D{Ki9qp${Ffgm-yGUh*BuRl?YPYtEP|S z(%sHgR?x&I(&%a4Y>dLFLPNFu&RP9Qmv^(~)5g};XjnBbu~NDwokz^7mJi7Dp>}g2 zddMr`$vpZb5T3l}dxCM#xmJukE0M{o8g1Ge@?=<- zMR{!Hg>zo)SU0(qbBscU)(B;kbltkSnbxELyzi4MbN8^c_l%HN zlIy2y`XsZ><@MO#H(}H@8fhCbJ^&+6V<}DWMIFpVKvVpuRxR+>)Whwp>!EAXo`w}- z@&`sUzU%TT{QL#VYfJu~((ULWIdGi73fHm70V`bFR)->6oo$nfHc&Kd5K5Xj3R0x1 zJr2}o;{;dLzEYVO>@ecWF0?Kpx)L2wx=Luyto)QkzUX;D4=KhY>zX9s2iNw`8!<*< zDYTRENa;n3qM&G)174NQNqXq5wbyoOaQ^Aiu5TKz!+mZTs}6#;MMHTzWNn6YK8YYj zwv3(=MzuE>^+m*i(G^_xf{k@zzC6fx$>Mf?WI-*_c@#^tzugO?0B2Gd12XzkSo`j_ zUG)2vHjEUamaK-HODq^=(0R~W+(F;E!PqLD3^T`)oNqMaO5odcc(kQ-7No2mt(4!Z zU7w^_zE|3}3{@-u_|V1MjA%Iv9O!>2^V$MytA@rta_3vCufk zGxC(scFL^K%>%li_MAbFTG6Mdmb0!QUX-<2B$C~w4GFbeehFm2ENt9p->zTK>F z{AZ4Tyqo>6kD|%>Ys2G>$c<$rfY%9AdFGb_FPzC zz#8XYMen3qo_$r3=m_9o9PLMpofO>Rb|%IYMS?Y|K`8~+SIa+M)h8*ka|6OyclP$@ zdv?#jh(^?b)AI4Xyv~gFA@ingNhFK5u*qD9Hn9ZKBf;`x&P#3jrs%C(jQKU@q-eNr zg8L|n?r*=`{IVHk;@x?|gfmY1iRXJpWzdM-=~sGU#5CGap)=t+=9Hx{nU>ovsh*Cb z(yOSGXyKnQyPf4R^o?&5u7yH0oi$xGCXLXdwB^7RXw~Tf1nXRNH5zaj-MQ1I2Z@ch z6h5T3Xck2@b_3kQ+7zUKxds5wpL`KYR+-F6Xp@&iI(|1?kp@K*zoprK1*pCXB^QlW zy7Oo=_;3M0RdUrjs0UD0%TIuWKKVwWi1SgPCC>ngI7%@QC{Q96;C#4!t;wqF#i8C{ z7oh4xsdBF>BXizm|H#BQ$q$1ZQp`Bgwe`~ZP>iE_0)hKiubPvhGEkZe^~xBwm=!N= zfuSa4w>`m$mW5BL8l+hDR}{KJA|=3RPJmIf8(Ny+G=i_lqJT@F-iNQJOvjxJoz?e^ z=mWWRB|tZ#13D84%wnYt0IJyQsI+-lGs!|qzFs|04vtnv@M7>c>Bvm)WX(AdXvJu> zTTa4V5?0V2(}FXdtl4ObQXY2(fE`$-neW7RKqXpS8zpGLu0^|@Z$&FofYPRb595pC zcCsc^23pTfy<)7=b+RTxeko-J%^gj1pVJ7A^%{I-5sMn{H=OG+PZWGq}Lx zTn4^gbw9p^({#%WepzT#S-ha;%BQ)?94ky6NiTqt-cM0(=jo_l?u!FJH#cfrBx>%A zEL=aoA}DWPo-*XkY$N?NouTien(ujXRPoxv^^fm}c68sU|fxobG(eKn{5iKAS^x?!Mv}P`IvV1ATXu ze+YBvi(aH;djaY@>Odi>+>50`L|Y zL2Gv{vr_3$evprTPUHjk02P!JRQdVn5A|08Fa2H5!S_?}EeJwNm1{ASKd;TLs}IMP zDzhuT`Tyw7Y0hE;yMHHXnsY37f2993XBl^21@z zhVeqnLho9mr+JAHYcQ+Ua3CG+$%MT-a?2-7Ze3b;xARDMW)JdlKb?lzi{0IqX=r=8 z-5-hXF?3Cq!u#ngsP(J^Z8&yfJnjO8o;h>^cM~kR&r&#>{1*OBAxq)!!(vrC95C!&--A0P75dg zcR(+l)Hhj93?$>f!MQj9>Yi}IH!q*gqa4_L_v63vd#c%&D?pNTK3Cr**-qjcSA7Pd zcY~o+r9{;2U|$I$VDY-rFy;IuERB_<_2nH8>s5Rov)u&#T*{j!Z~6|U_bS6v_9yp3 z?=5LxawXBjzd*Q9$8Mw?d`n8Swt{1ZQ+fNX=-H)|>CWd2iiUNz8fOK~Gfctv4TcGc za9`p0o9VMciL5Z~#=Qnc+)p=|u27M>AY~kAV`uC7IHWD3v;w6SC@le6LI!8`gQtU2 zN}=Y?)?G%eKhmCpx$?7Ij_Fu)5tfMiTW9K~8XnX=M|JRu_gX_Fr!2(lDisCVcN1X8;fM;=zFzOx7Hii9GIt?=unL z?<~;a-kEa;@l7+`sW`kd_1}D&PjhcO<<^bxmG*KR&X+I8VGTXQkPjS{LSqi3l{qjb zwOn4HdpSH ztITl)${Zjocyl|fR_UHFZ5YdqImd)S`x@LjN0>l0MDe+*(j%<+G${-{d&PfX+5l%>(uX~3U9_q5@iNP_a-3v#w+N|qqbC* zJ2_kqkNteR)@DfZ*yUF2i*;S9<-#wB18R4^1h_>;?{0M$MQaaq);1A`&_K!;dTUHy zXcl;D%!kd3yxSCi&Gmx8a6*=4~$(-&tB7p$9Mp6m+cktYs6fV+VM($I9`xNAUmC2vFD@Elk zS|t z|I_h$cW)@&Y^ullXZ9NlQ6du6;X2HPGEhLr}!d`IwYk3G0rWA3rZxcA;j(6 z9iqhBuB6g9IFxBA%_CKlF;?L!sck0?DuadbRywE5ypoD%KXy63u9Q8QMVZ9J(xeCS+iCm*Uwjq{;vsS!T(X%%0vh{JXIo>%i4_Z;cgJ;L5qKY^hrAc2&u-qVEFdGa$jHU{B^+ zqbo~m`;7Ye6^<3{f;uzw4AI(@_bpFn;``x*^u>gEG0$*&sE|e*#Fw5 z>sO54<`qUI266W_eUYblqwnt8mrBfPt;PUjBQeG$vSyn0k`e8uPuVn;4~4QdR&>Fwm3-kE8w+uH!Ak`Vun2Eq_a+S@*-!HX~i7 z*Ximl+bzWEe24^Yu)aQrbPC0`TDB)Ce!$-i_mNsl!)B9*cq8dr-+Z@Qp4laQ!qKvBMYYBGwU~-)C44f9u3ejq z`Z_~BmeFwP@@uba!uHU$NariYa9ae}MdftN&-RTP!=7-gxjO-S;;LO{3{O&aP`YZX zP?9O>i6jORLg5*WnaMN$(*U)R6cuh%3hLi!< zBAU#nqlqOA-%$i!LmvaY#%l%Mw&pXwvy20PF6f$D7b+=QVJVCQU23Eem?Q0Y!j>Ge zjOh#ODvVu|D(n$$6HvSl{(%y2H(5&SO1QF)3bcr^+Zs6WhVz#h>{4r7Y|3z*M8CXu4s-39P$ zL_3~ViU3LDod}fOgv<*9Aq}L4Y=e5CC#Wu*Prq-y8T);3J9x#uH^RA~ALp)Os=iI3 zvcWnif_M+UuZcWzMkbrhbk&XXTYiJt_O)HvxwEm|bFfBp<>>30$a>GaHJZpBAMV_u ziQM|(2jMnXP4^=(3)}x-R5WwuRZR2P|J06lW|?Yt3a=`5r$*yySk%za+T9kp)nosx zpOP!%YImD!8|K;)mx*VG4sO#}j#xDe}zEmnXG z4pS6UGSa>PzRl+?q^)`NcX+b%j|R7{MF;H+?B(=(skItQVVeAc$&-Ik6R-NMFBtt4 zY<8*y2^IQsYJM@NhRc}ING&|>_|-W45oVx* z`5SF@u1=ew#D1P=cI&c%r&qLEPd4aSv~4$N=T4H!g zU-VkZzEXkcr>w2|d?tKP_;dMw@UqCm$DbhX<7pwJb|J`Tag7FMD>?M32UGrY^v;yL zxuK;06TJr4CHMLbA)!eJV2y7f{YgAYB)McENh4Wg7%3!U$o*tCDJ4_LEK*k02(;__ zh0I#kFQlxj9PhTo^()?@=~o<5TvkHw&7P_F-D>*lT=4WvA!VL2dT-RvTKDh)NLz3G zt{78J(Oe#iJrC7rI@=D~Pnn|&MY79$yl?`slnx?i?Vo6(3j@d&li4=Xp6wDzo#Qyz z37Ai1gB@*1Ug-`%F-vUrV|Lu@=XR!O&{I)*>A)FFsYh4g0_zDqQ{n1D@GS#I?e4y& zMD1RqF$}R}x@(3N;~EL{9GddxaE5D&wF>ZHumg|^wfCDj#X4iMNUB`uQP&61NZ)T} zSVP>NhgK=8k;$(aNC`zid%pO9u^-)KFdZWpRd+gPSO=GTi%+-C(#^2?R~StJ3b&Rs zzNlH!S$iY(*&71DFAK2HeT&sHIfI-(+pfIp3^?P~6$V&Jj}xIB-vH-1$q#w1fFJTE z2mfFx91i!rzR%OeexK)z{~k42gq4CUW8^h&koE^lrJE3VGK$XS+cd6{)$MqXXG@eE z1oC_Af2ZStI0JvcSPOCW`d)DCD+L-r^nHso4!jrXd{-KUs+RYo57W+{8+%rQb+q)) z;=q+Mivwo>wMDu)4*ZgQV;ndbD0hp>2wiVL&s5*^iMO`7wwb2Ey7UEOw(}mCD<-Pe z0Da18IbKHl;qor>u4u(y2XQ+WLRnWt;vJV&k@dS&|EcDJq5P@lXc9)%K8hM`rlCKui?;Ik^-8wT*a_wF)U&PS0K=$RUPyVm!@dc!o}6!$B<3U#g!$3>!C zF~Y8E60$JrzCee*+$%re`AC7DRZwc1cV2LyEGr>jg2>jQe8d(h^&VIo?7_I9xBdEc zX^tAdU08teTS4QG;J#JhkKl?0{s?YSfj@#9Gt}TitA-kV=tx1xc%cQ$kLKQO{Y8Lv zhN#SGZyP*zuLh;_HppTO%y^-q&XMO_0-CuJ^lRx4;6+bxmj&5$N$zA%nHR>Fw&<;5 z&@=+`a?Gc))Y9oY!zttOki(rn@4CzMarZ3|Z%3^+w+k&*3QbGkcluL7$Ab@te%@tQ z*vH+rguflRJ{tV`Y$CMy%h}&iIsdE-$UlI~Uw3nUn!AI%kTZ$q#C-MF=j$jB(8sIv z$9VdV_-n^E;EXR1qrb6iy0Sq^Ddt9VEPdWy632vRt&cJ6H?1yf9GTq@dN3zAiE;0?_k;bzW1^$`V7fxA|qG z>rj33rRIYgZ}SHl#2cH z#(VM&ut<@6>T1n7!scCLjT7E1Ln(BxKlhEB%Hldn)U7s8IAv!lv^{;)CuWiI;tnfV?LmFW{(6b(_ua zMsMBt!Hqp~PV4WHK+)eLqVCu9$Y!m-M-B*nKK5vTO^+-Wem?n$hSa)s^98OqPWpP| zWQV17kgucvF(EoHJ9Fa?yvymM+>x9&Vc-tzBqa79*W+xvUb4VWqI7YN^cy} zU=JZWPq2r&0cz4*-$Tcm+teO9MkRyvFKP633VM&AWH9GDnz}>29y;hfh&^=dVB0~+ zdk}l**ujklqo{O{gNUZW<_PGga8Kb$j8VDeSsHWF%9`*D{Z_X;QKRgj0sYrRB|(}8 zcSa&t`sBxFLsbE#kl9(I@wIlVvp`^oxFooOvYdI3KIO|zgmu!Z!!MC z2mPdk)3{RK_%8{!VR_0ars?&j`sk`u0Y^=!0D9*sDJoy=UWIR%-+;p#|(m1T7)RS3;m z_n+0fP4w4$q+Q8%NUUo_$z$E4iVZi_z42tl88cCKMQx+eE3Bo}I2VHM6T!F_4VAl9roP2*mK=}vF94%e%gyCYs}=5{h$%Q z|GpPF+X|~iEcea56;!8y?=s|jlYlhH9q#M%bLiHs6t3(2_tDw}jaRgQYJk%F?*@-O z3p#PVCUnDjVY@6Beh^J%IZi-Lz%yp^+Vr02r0$URu)uTyEJx#!=AZml2e5x$=qc#y zmD6dtZD@5cXNFMM;M0hs-lJ%BjvW2zDC9kgR_DmkjYp$xbq=#VYLC9@IIOwDJ;zSN zU*HMtj(+RPZEpETdge{P#w~jZ&J}2RJfu6Of#o?u!fv)aQ&v{hPW4HCY@$mbVK#gR zhnA?e`0~`Vng%LuZ}IPq2HRHq->3TIJyl<%NPBG@N;G&<)SkEZ29JHS%v*+bV&mQj zl?Ka$5(yFCuqNoHX~&DP_|qPA!|P+{~W+ zD7^`^1QMhEdV;t|^u&i|iJ zLiXUYiI&O-AD&S*+w#clho{b*49r-vNUok_&zv)TdM?Qx^Wbbtnffqk9?2!ZYZ1`J zC8ZP*3(ynGd=ghd=IaR&L{WlIfbXNZ;iLV9kM6(u3H)FF{JXbbmj7pd!}a#(_UHEJ z_UHEJ_UHEJ_UHEJ_UG4rp4Z*JzkUBdcV83``cE(K|I&5)bNh4qbNln}{#ltB`oD7h zyL}?Hp`<_;O0MOFl7ReB(mybiq`+m)VxcbAD1Xl`N1K>)7D+8`9xZFwCap4%G zec;~884GlaCd1v`aQ$X}X6d63{fmtf$fO|;K4KYOFxc|Q>^bF+So&GY=S-bG+cIoY zxy6!fNl8jdw%ln+PRSZDAS)@|murM2lq|GduivuFBEPE>*t6x6v2d+~K3@pBvJ$Q~{6DmP#SV2SUh&@yn@3=INVcY_-+nA%;A?f{4s~W;_yWdcaaz# z$>EtCUd7=LIs66SCGfqbCn4Pf6pWt|4zB^c)`wr?($C+5hR11|U#5AIqxr&zd&0vA zElYR$@Xui&e=YJqm!@B)cq7HZ_{)++QK49h!-aoVZ>Fwe-WJomzo+>36n{+dn-p)S zxQ5~#6gN=3lj83w{)FOAfrvk)*h2AciZdwwjN*GK-b-;M#dQ?BDLzQ?%M|~E;`b>2 zlHvmtAECIJ;;$%{Iw3wvaSX)`O1%`Hq}V}mBgNAxK118HO0*o|BYfV#rr8f zOYtd+zoS^D`20=sjMOV~j&u`Ju1A_Qn!ZHO^sp)jaluV_dAu}8DaSMicnIpa@4}3% zoJ~g77upaebDn-c2&2E7;-M5j5Tca-UVlPf4`FPd?b|7e?ak_H|gOK zNRK5+q!MfsrWcSTwVVQytm0Ur*eb++8^znMrqF+1+r`Tywll-yI{$mgWOZkT-{tTw z4qxT)%r1&<|2|N$^EJNo?i_xN!{<4S_S}#Cwz}nyimmpi`)&0nFmC?Zh1u%eU6`$I z=+d!$Mw_hG+lAR)ZC7S{&0U%8P3_8T@2IY9yie@PZ13Y;*_i!(S2kuhc4fAAM^|Qh z8@e*v`$Jb|dxOK6?Trs(ws%Mvv%TZPnC+bx#%%AZFlKw-3S+i+cNnw1$HSQI{V|N$ zUZaWG-d-kVdk2}A?JYKSY?lioXCH4_4|D__W{lMw_2UX2HDBEuH|%BQTsuq7Unce~w`NQULR5 zn2OUmoI%1>oUP&=9RG;JI=~+6|6AZ_!saH#x$%gzsh{nyi*!&I=IzGi^<%%S{?B-Z z{}KQ1WyAS-ty`at$7xZY>;3bZ4ru(g{hdz#nmtGC_q}<0ju?G!-aeykLF~6JYF&N) zx!u?XL)dRO^4Eh6?8EHFw|$u1APLNFm=l=Y$Vgyz!=AwGMpXi{8!Hl+-FPd3*^QG4 zY;30VWitPX;@2oPC9?DzZHT{(OMQ03?~D4=3lo_gSk{k~Q_;U;JMd(GMGnal*dia! zdsHA@@9bCy#^1^5WHPhc+mkunOF=wNkyQ#yKS=Q;ihtzNAH56l42oZ)cn-yV2Oxg& zCLZ3Q>B@*aL2(YnfvK#_0*V!1x`InzL-9z8t0`7Sxh)OxyA%&jXY|^Pj{9O~h9aMl z(4YFuj%9UkX2*GVarA~PhVSv=Owi|l_;3LDNTma@9L-JTJWkV3-IRVSyb9KpwzPnJLn2lDUnEAw-;$mx zK1C8$e44Jt6nvHpQ}H=6M#bL~hl($fLKO!IB`P)w6IC26%v5m%ha-jA-E6*Ob+|=;@mM0E@L+0o&v@hduC%fJp`0bk`LotIn;-lOnRz5X94LYFnPub zdKLE;m~7*OP!;zP*xZ^Zu(`FLU{Ud%Lad4tgm^AJLB+{Je-)<-xhl>Qic~z1lWn$8 zuHqa{&bh)A6%P`ot2j@X#ih^Y(&wo-Us$N(!NL4ILxGlXyzKPW`2c$N^W;)jF;z(rK|VyT`?qBu?f z7nVFiaW4UVr$rR^79!9-P#iD7bV6RGxQ~G2;!TPZ1pgTKj~)NGND$b#K>R)(7xM&+ zy({D5H&oB}`7n-)uY5Q{mBT!4T+HY2W84^7z>Sf4lurdOs0)A~Jm&Dl#1#E;gxnq{wXYDDjetM~lq%ju8V?e6PrC zuT2b6v0Y@g*C9r#_&zZ~#rKQ-RXkQqQ*p7Fq2dxTPsI<2BUC(29HZj#Vxfvl#c?Wj zi4#>^CQeatxj0wF72`vqKXLZtPt>0L&WD*jS;N_r*Ek!p zmc#2f{D#QvTeQUH);pwV)mE>g^(yUpL$yDAyO94I<1;T&{^KNk-@ZwamBiK;aT4R9 zm&EMbFp2YrrC=_d*|*^mvu}4xF|IZ;eH6EkET-{IPAkL?l*($ubEtbJ;(Le46cu! z+m%zYeolK>Sj=IGrdkV|LwdgUh`M)E# z8te>i;pxQmcVl{7({#<$rm!6^GcL95haoY{wQ?nuo;nzdA(_tW%0Q{5O(@jAkMGuB5p>IOgeA)b|o_!GJZP|=MV z!r~P*l+VR^3TA!x38xRcIDI(4>FRDy2R`RwqzAZizTo<|j_copP@f+kg3FKpLATi{ z_%LDdha+5E^e`#m(wX1#6=89_2EyWRUsKzp;A3Q|ijNZ(mpj4f!#DIzf`U&%@A>h6 z5w_Ml!}WU;Xs92bqyC11zawnjcb@i>f-evjqiZ27F84iQ>%NPGt@~ODi^cs+nz(eY zihm;KIhuVUyE+NC8dHAz7VE=*qr7zy+$wLK1-54COnIx#Q*fXgHc>O(9FdEW4IV#yb!D6K3uFXo{Nq5;o^P?0$V#I3d~>aFR*cX zCyfm%vI?W|Nks=twCze?ce|ww{bM}VhYwR3-X(mh$}okKVG5PuxjY3k8K!VDyo-}t z7Kc+g8D?=ZOygvj&B-vAli?svhWVTf2MYsKT)@d~7$>*k^j(7@pHxmhX`FnrZYdxC zdx}^ezLbai7Dmy%xR^fCN6-87-SThy^Z5CH)t`UT=fnHoUw7os|9AZMl6>}lcC8Pe z`AQ&7KD>M+A?brr=89%j3}*6wj>D**{&mFgAxhq6n802h!e}ZA7#=$eapg^UpQP!^ z`|iIDWAv+sBUaW3+bLH3?aLIeq&Vts#DAc848^Zf?522~QYOX99=TH#EAPZ3??L;ia(-w6vbYO9TfK-g}8{~krcZqo=x#2iZ@U^gW?8?AECJO zXvB~H(|z4zM&tT!AU!8iL2&^+4={f;TkAbH8ts^qh{67M?uFdi&8e1IK)rcp_e7Kr z%{z{sHBi=x4{&+Mae2pcxQxT)+?u6A^-*_lZSjzs*L^!_y;JC!7$rtDnbv#Qhgpnh z3Rl-u4p*tZF_wvb!eLtGgY=AzQszvqEe~>eXL0x;4nNHK+mBG6%1irb7U_D6cHJ1C z{DJZ?kDl>Sc$iDrJUf@RD|n28ajsO}>HmhXd3GMh&!ZfEoRjl>Zhg0q#Bw~K?_nK- zbJ-Ajrih=*?i$1JgJb@E=Q4h7;^(jbiFxYXG0f)k^9AntL5zET`0>8$SI#L|CZ2n^ zItJTy^M0ON&2c^MRq_r5<(ulmA;9ln@9lWsQR}^Ij^NY7Y>a-Kt>e5rUT4E{#@>{^ z+lG2OlspXM#bd*)qidzeh=Jp7U;r0lX5scfn+HhRlLxOzc zVh6{khY;eA?c+GYn2FAgJS+S36785ii@XvX+JOyO$YD2!7jyfU+-ms+uqwtA5;i-1 z2YuasA)cQkjvvJ3l!vFue&AuDU5QztfBTFNGvE7Zj)(u?(pO!#XBF+$YFef;FMmMG z*~H2JU9OzXD)!GEyJ=o!9zRa=ZsqcRz~%jr!yj=pA968`?OYtAn)236%iMO$*vpN! z_o7{iy)b@ixVo;7u`s-w1aRq0ul8_ywU_pz!q2C-Jc6J9>3M{oFZg)`?Kxt>D--M;AfWg9;5KE)R; z(6^Dt??c@fL7Ko8y?7t$(mk9GUvH}!9>ZZ9H`eT2OxwZvHuq8eUq{OydCT~`e~iTX z@FvPz3DJl6c`N34E8%!}fWxI6p1|=|#_?9p@m9g{_Q0>^?Q_ao6-iWio67N4#qltW z!!tQNi{tGfj<<(7-X7t2oA#@DyFhvS4H*;SpW}YR)yw;(k8${Mj-UA)KMOc}{uuXe z!cFT_?9V*`(q$=pe?5|f!u zu@aM6MX?f-`H*5ICUb#eB_`9O6tNPMDWdr1m<+!zd!ZEV$q=$cwLe4Dek`ETcD8o+z?{)q#t~HL*^6%%$zmK!S z_jBc6A1`8Ss3Ll*?`$cS$JTB;d~)#H=K);3h<`3sVoLbI{|^)AM^-N%Q!3@^b#d=K zOSw3Vi}Qyka6Wk%S7y07N8r57-gi$__v_xsa~j7p;wTrk@gedN_%?YiPQIsT7v{q;3BKc3*$iQjPYKf(F`C#nBmLiuU9TTuf{h6!x z8doo&?}lEX_5MTxer3Jy(t7oD{2p*A?-^P7dhWedD2F?9@36XX@36XZ@2$ePvj8UU z9acAi>0x(u|No7A^05WP$0(nQZB+cgNXqArE(J4LMR9yas~F2c-oy!rtsD)HV>ukh z;a<0VFQ(_pM;uPeSL}1f1mrD|lV?A!%>Eqa-xUr}&sN-6R}fbh;vuxIbgnMtUEU-g zW->|V%Fp0%E{6yG>UtlZfU$I~ns=g)p8su%|CsRa>mMGP!2PC;q|Af<-`M$A{l+K% z8$Kld1`A^R4VGK^iuju+i19a1_<20ItmAdAtqgU*MDc<$9HY;ZQHD0MlBT~x(>GD9 z?Bm);vEpAfQ~W22wdIJ{P#i(=YZTvEj%BVVI~}3qzH-#Px5#doU&_l-x8LM!;9Dwh z1>|iNqpqUOnMTWeU*VIM^C3B=`XSfH*%;o=t$9DZixNm zc*yl<>izVwKD>(ZSxef0&(~;sYq|FBQSmY+9(m_7HX!)^O?T zxOBE>tSfgO&BUESixAkJu_&QN#b)mO<{cb13rDzgc9zq^o#pH)uzg}yp@mDo!lk!y z>FnH4tia9<#c{X~w`VLtU}uQ>3SETjbuXOil9~D>aTLc0{9astTTnm!bXb872XehUbYM8+Eb~vZ2BZP@69!bv;52muZi=GoyWH^BGd0&OHzvxzRa{pP3 zSRXE}K%1wmLm#3t{6aX<*>9h};N(`v;UgUWij!eICzGQB8>hzvHa3rQZEO@ATsnIf z;NiyOx55M!pW?>j8Sb3*Y3^+G8R0P%H*@E#&vEChzY|_%_J=!9{T+8E^t{0KZC((z zbLll)I@_!Hy-=&-i`+TT@40iJ7rAqw=LBxACU;i)CxPwH{8{*kqq)S$^_62tsbFy2Bp0=Y324EQ+J2aR~HODMTO%hAv?P**9|(z92( ziHLRd{8Sjlf!x`vP9oD2J%s8$O!H%>fK^6 zM-#@;uyd&+>ABS0i8vN|ifk-cMfR@NO3x}PHZ!)vvx-zVxN(sL_z9{HMdD*&p}w(D zM8}0PMvA#{QNoRj2e@%Dj?(6S#3v&W($S+_;#;jf*LqUR819VwyTG ze(hNB)5rSoOSJ6|igjWBvG5?r|11taB=YYvaBkg1^FA(~hP*XYCXZ41AMs(<#>csG z=5zRQ?hN=MZhSq?$!#%r9{fpe+%4zi`6PEXdL z*&Ozt4~q5S!b!L;{!p9_Ywd?9{z#mG>u!px#aV#gqy4o<+yMP`h}QL)$YMczxW1_6 z@Bywb_Hcc1fYafFoDLrnEh_$!vjay&=5u}}GM}?SWNW2kVu6Z}i#8R1!_7PYCE^~8 z6O{kjTk7f*PCod19nG}uXT-2>e*18SYhyEqy~36uF^Za>me?o8P-!eqXju-~QGE-}1= zI}5*%!#nAjcN>-YeD&MxN&!o8+V83S$m8dFNN>M?tZ&r;@0C`xZeje zaqH7?x(>zIJLU}t_vifw_ZtX@B{ole#o>DH_Yj(-U%2!QT>3j4 z|G6p;UAW&hG70Z-ZQ07Df5f$goi~i4>sf!hCaPs#kTBgi8T)oO9oONL>3m1^st3h; zs9yE;;TvsED$To3;&mJQYcQohM1Ol>ln?Xz>F5BXzRkM@MmdkCb=6CJ{BtQsvsA73 zJgv9NhxvLpcYrZ({V!nDe~h`!o{abhsS0HHG%f!kH^2PA>G_WwzRcOxAGqI_xWeiG zHHpP8WQp}J31EFH1RUUKSpSLv^&I^%j^4wif6Jw_*o73peqSgcfW;3@6#MnCG=hyI zw(je~#WYM@Trr%UC-v*w6KdXW0qi&5q5~`{HV4G3xJSVM$KIEKNmX2J-`msEs8NHs z#Lq2=gdiDU`t~-{xUmWe0uD&rVmnI@vu3x4t8z1j)Zc}gL1uL(niD9XHh&n-{1t` zRQPOz>%)r;-Y5Kw!TW`+AEDu4>n~_z_^$?!4qJagW5SV;#$y4G3tPWH6T{XQ(4_EA z1|Jw65VG}f_D*)5p>SPB8}5(4cqdzLgF?36hJK6p}gBwS(*z?+K%v!RXWbB@Ge!B{vx2?x60D* zUuEgnR9X6Cf&Q%~Z9Y8K#3_Ww8$1W_yzm5rj|DtGJk{Wn!nYcHN_dsQr-j!TyeRyF z!Ka5mggD`_#%G4NGx+TA0E5p7*Fg9X2=@#=H=H#1yzpKIFAk3i+j_fo7h7**!?xbW zhi$!03EO(>4BL8p$)sHz?lf^O2p56=I-uVT^ydNn6M_B`pufegI_-twB___r;bjJ2 z5?%#)_1)F>$yGqdhWq39-_`QA8hBd+ygdxOtpl3lf#y0B=d$n{Kz|C*e;eq(2lPJ$ z`hBV`{dp$s6=4dO_{#7O)t3H=K!2xdOMka&OMgJMr9T4b-(b=%4UaH!t_qJa_y)ks z!xId?Dck_zQw_c~+-C4?;iC;+5kAA<+rx_uz9YQE;QPYY7<_;DCW9XeuQ2$r@S_Gl z9)7{#C&FtDelq-;!B2(XHu&lAdj`J{{?OnT!=D@cQkWDR62B7O(%^OBz6QS$9$@fa z!%2hR3a1TzC%l)zAB9I4{Bd}!!JmXD82pcLgTem{A8hbffSu~Y4R)*B3=UW44X&=9 zZSZE*M;p9(^&*46Q+<}fTUK9gaPR7+2KNEHZS{2qZ(seC!8=sHWbpT@*BSgj)$bU* zQ}xFY+gF>uZ~N*$Y+mk{mcASAW&7$by+FP)X?L#P#l+dIdbeJd{uw~OUoT64Krc&w z2+$t`^p~5oeXGZqIJ;MmHTVaBe+YPB^(2D_RUZlbJpO$<7aa+C*>HdS-vR$E!2fjM zzZ3XB6=;5H(*CIW3=?Na^;rfFt-jdc+UlhSN2`|^JR9&a)wdcvuX?q?$5uZm@Fl!2 z__!))kC1wsuc}ZNr)7SU(?2l#m+iw_n*Gc6VcfrbPzF<4EmtF^ICT(C^01^|3-oJ! z^vAoUn9|M*;2U@^77x>Ye6_-29ICx!B0L^w&Nun)7w!e&F9A)GU1gjDfwu#FybTDI zVoKW(z>>~npflM=XKJVvQ`&_az!d*v2q&3P>U>(lq?>wln#6Uc9m4)enovpEa_YVbT0AHSrsnD zly+SJOFEYUoy&Z5-UydsN~`4)jU}BcfzFjaIy+RCVoE!r0wy^`w$Tk?(r?RlyfNHY z;7>UGrf`3tKL*m$8Y<)WuHMnKb)Ra~^U!)HdETko^1M?u^89h66cc^D9%(G;>;`mp z^U>L@S1IN)R=~8@kP>~qSc7^S{(o4F`lzuc-$9V?AYZ;m_A13h|I`Y28Q=#M?yvB+ z(+MxA9@4kBv*&cmYksx04K3hHI1(=ed_r~bzDA1aoKgK_L+5m$a|Wb68}K>R*7k8; zwbd^zuC{ur^Q)~+^@3_^6S=6`+C(m`rtv1YcKd^^?tx7*$z%&K5t_lE@wV(t)}(*dWC6z zzEfdqlf4aiz60=`!2fO4);_Yj+UmpasG=CquaP+51rSVxV(5#90F2%OLz}NP7dsvF9Eit+qPM z$EvN4`tj-l zjUqX|dk+2ZNoc#L06$x8&msIC+VnYS$LFDcK3Clz;tz!IK@e_jVJ|{kzYKkKZS@F) z|5#1>@ZLEp?^Ddf5a$0Wu9Gz5r+sr5)`Qli_g8pij_^7z;~|{(FV)uew+_nwD%8*G z(C6QPdU(?}N0GfR%kx z{~N|WKXIgRC}M4bVZhZ9>r*rmISRttAiNW3o(kcMAl#k@-YjCr%jOY#7Hf-$we@@_ zV#m&w5j$SCida4W))BHnT%MylM}M#Gz2%q6{_-KWksJ#jRR{MGYq)N|szzHR)z6dM zXF?GiBf1`_Z=gM8F<@;6>96qf+@^gZ^e(mJvrojf-F603d^!;DHpkzQ!^1}rZ{Lg9 zzO*Bx{U2Z2F!l4J2!9{qAnxmnPkm!gjz2gu-|#jV;tv5Fi`YJ#h~OO@>Yu}z&M=NI z??j}5=V3r+FCP!oZx80Q!y^}&b$LHXI~>xE06a2c$I+-rKZs-JjnNS}dmO2S_;CoY zgK)dXjfw0Bd{Vo297ShZCPj+h`O-Ood7ctkXX$$r}$TZ0DRKAg@NKw<983L%6N0=7^mKS|fIC%|+~) zrM8HjKiebryj*9*o`;zgX*IYIvF9y|k@*mQqQP@u9_WtPweskQy$f&*kNu~(jG0I! z8A;C%{S{uzb#*+~gRHCLBIKv{GlgwE9}ji45c=~85xY*E1a);vgyvhVGqHW_`>w@( zT|1ZdV_%?JPh$JhsnD+$MaCF>Cd{j|9V?%7!x@aZ;JpV;62RytFGSob|@2a?nFnn8FmxAjk%{&_H77DFF6AMj%61Lwooxe&(eFCupR zy*M%e@+CQB+6u84Gt`JtP6xF&Lw7{4bm57%&8oWuB99?O?9z7BZ19{9Nd__;Y^ z_ZqhXz76KRmC(mlLBCoVu`=!LkwYQvkp|xhWBD$?cf55wC1P{h6g^azaQ z`(W+8xh)H=sC*S!|H)4T+c-|+#f%@ht&fwH8lIc9gyu^ z+eSO`n_rsdAd~jZh&}86cEsNM_*=xDdw(Zl?_0eeS!eJEk=G3V2=FI>Ka0TKkcd5B z@oD4(hy%X6Blc|k7ZG~~{$CM$UgE2WeW%IkWzR^sz0w9(_1eqeNUyO5_cB=b)z`Vd zy~Jy))b+j0>&PeESJ(RHKx%h655K|d^-&6Af4;m7roQ@M8BB2=hj7GHhv7Dsd%3S} z&G=(qUavv?v2H1*aY1iU?b=3ot6s}RyGNPMmc6XJu~jcSF1`zRn_hOE{a!D-w(i)g zufaR@vh&z3z3iTD*IqsK|FCx($@~YnOSbyb$uXYbF4_J|X943!-6gwz=`3dan7d5i zs};UR;5!&U?%p8q@7n18*8?PmJ0CEf!{?6r&Sd}6k>w)JIK~G=oZY^3e#Ur0BrI?j zsRG~3`0~gZyZQZj;{EjJXMTI{r*FzVboBYNvG>sFF1f~dFCOo<_w=qh z&Doa>7VA*EE!V}2A7;FU@gt0>4=h!2UTtUD)phD*@T;gAl((jU=yPJ0UQa4PUn{@oU$L$b;tOh@d5`}cO* zIqi9H_jxg-Jsc`f^RT%oX)&8`EQ*Mnc68-e~!;Q!=ixZk}T?!4aues6Atd*8Rg{$d5+ z^?rnTxZbIBEHFG0V05z77&l>KD~bqk~exusM3 z*y-~F-RC#s`>>BQKbylnarC!??|^IpZ$o?+-rn5?eC%us?^E}I`{UaJ{q0=K^Y(Bz zd-g;V*X5{P`We!z;(dmTskSk%saTeuK-~*Bvj)`>#&9pQSOr#Vm{b&JB*KDV*A%&$5gYxr|a@eIU2d8O(D- zMW0A|&)#3*^SSIfxBmcL_UT-%>t;!8>pur&p9y7ehd$o{{kfCdUG~YNxDHn`o>8$+ z2G^18>Izo)112764udedYw<`9x^1lh_Z#Yn<0Hro5VG zbq1rNf32+n2mO2hoy&EqJ5Q8r^E}H@P@ks)|EB>y%MBTPwrl77bD)2o%YHVtXPT!m zZ<7B-OkeVRdPP45K_6@V@`TTKFBW{(GtI?JXNsIrFKFkTvWPYw<`jVd|z|T_P=PKagTEN#q9bOOZegn_F^O?>vrgNskw%&fp z^>#^K;-31jy*5wl`*P;tUgrOHnCn)-ym~wEc^CADd!VmA0CVYsuC+%zK$ivnUY=#1dlhJ1e!{KfLn%1+ zw<{2S(Oo`3uf@-Cok)59d9JtG0^t{6?tKyX`4h}buRtCC1=@Wb_?&qae9OEBZ*{%S z?{i7~raQ@$<)w;cnFM7aybqVNEIeh2#MyTJ3`f#(lFF8b8%3*nakkHJ^W zXWSnoZ|`yV;f&v}$Y&k!Nq8Fb`K4R;LtW?pggXD6=NVb&UqGFI3H<*H@RtzBfp_Oa za4$X#z5*iPD`0cDm%RntYyJ-3Yd(p2_!swq^SF#(RV*W(li~K|GWHMUO&NC&*)sME z*)r|{J^|1_$&a8c1K_^-kKm5^5a4+z+#jzE*>UQHY`==Z9sdOQElI(h{rb>}1`iKe zyV!`3)%T7B-y`Ef_Dsl+L#qrPAF^jcCV@|qhR}TmPX(VOKMPsi=@B7&*Q_xVGPoJu zxNn7b?Wcu2gQvq=_U$37JMDmX?PrBX7+i!m?z{M1`!(FwKj3sH!Os9KMVT9&!G=2gg)?dxSM}A^oMi6KgMG4GjKlK z)4u?GLHq*zKU@qxNiGT5Gf0=h{r$_p|G*OP|F9hVKimR-Z*B#j54VLD8oV@Q?KM}0 ztZsi<$ex|}Wytz>x*Gb`3cxF&FWnv@J@Y4Aw$m$WJiW;K_t3d}>OSyW=mSqcANU=# z^^?#C{s8U%9JKZG;P>MNX!k$CT=!@2JMotgtUEA2ybgX*-T;3fZ-OtHzrtMc7R(iY zgLZ!h{2ILrZT)`8o~!vg%o`tumKgkT$l7r}1^-2#h3+@_pCNl6_KVOugTD+}`^#4$ z>yIl`Wo<6uD(kbTx{CZ1ox*MX6xXL*zniwU^>%LL zKGTc+2HeSbGrlkU5aZ3OKt}=hg|~wH!drkZi>=`9@Ydjm;k#9X4A0-Gsx%j&UWM?J zMY0#j_bJ|FY~QD7QE5@LmZ06*Kc;kQ>1Z^}Ce z`n`kCp0V#v=EOp>%WSG!*@MQ;w)H$4F!Dg}BM?n`A7MjpU($OAKbS*w zx(Um74Gw24Z3GuGmhT$e#aO;;@E&8StM5CP@G{1e8A~1eNsQ&Y2CEs%cMaZWEZ;R4 zbTnc4uE7C}<+}#68OwJKE@Ld;HF$!teAnO;#?mkMz+(u@cMT3?EZ;RagR%6Fy^68a zkF8}a-!%x&BP`!F7|2+@YcQFyeAi$;W9d)w9>(%rgI5{LcMY~Ymau%+UEgTFRIbmN|83k|YINV;2Kcn^wo`oSW3<+aeY#sC;@8fXwhXkh*tGcG!4Cls1pULF zpqm;5wuvEt2SM3~LfMm`3re|mk5=c}vslAidk%9iz*UkxtxP1*il=Xg+w}y)P(%>9;3G}WGUU)lz^8*DKJ@L|;rZF;oZV(@W*j|acX^WAw6Zhg%yaIFsK1n{f80Q{Ms z41SeQ0Kdv7f}it~zz@}l;D_oY_dcL=KZHLF;g3W3QxI-_p`QZ&&rfw(KMF!x>$YtT)w2HkANDdkJ+ zW;^G*%3WsiUCH^Lu|Q&*?@Gvb736y-y```i${#ytb^p9TCp%vUdfE%`qab_?gu^|uP(y%+81ohiSw2IdN_^G;4&Kol#e8lZx?Aws#B{a-U$R>R zpS=yHwBnD`$!T{8-Dk?U1H|7E@Xnwo+!b_yyBQk+(ImUTsZ4W7C{(Ly4goqt0Y?GH zfPND6jl;k{^FCmY7zVy=_W|AGz9HKW_k(sB9c_CF2nX7Fbr^2fNB zXuJ8!@A_D7$J4kSr*Qb95}Q{mho2YPF%aItX_r;(tL5gYQV4`XBHSy%X!zuV$K|s-Ef-ZexD>R`vHZKi>y_`T`HT z1KtDp*%SCl0Y7!X&+a|u=aCa=4j9FGy~eyvsG1;n`<&?|H-F-ZRk{E52Ac&zxfl+_uQ(!vEC}LbC^z4 zVVmzckng#W?|G2#V#xRWDwJI*Z8PU}Y1LjLuLVs15>9)j!j#u96t=SQr6w<;BmOwQ zVmen;?Pus*4s0D7l=V_+1v}%;0b0yHZ66jnBbe5LT`GDzM!{J+>MDc&c zzLBMWgI__tT?6%Y9nieKYD);;8p3Vc-2lF?Z>;J|eTMV8wyM$@#lFBN;XO~Hzmqu5 zM8*>tw=e_YjjkIMIb9ysaSYx_fc-~Yz@<7iv# zi9PX{9V8z9%m1CX%ju!50nWaRcR88*nCvryPo_RO3GSH4aJ4RgKKx*~V=@)=^9RFy znL|w<9_1Vc?*kqI?*lgS{%$1a+hFM5r})%kA$Wdl3iI6JjE!kow*~mj0-gqTgdFfW z6L1IIU+9GU3$sA?UWEG#d3g7*2<4g$<(dO;9UkKZ_m!<&-W=C+f$>qkJ2jfOR{}V= zubj{Iun@|N_ymI~KFv|raQt&Pd=2M&CfE5BjL%{l*-MPi1{=*eK=We2mqS}GDbcUK z&v`ux@ew};_zA#IL%zRvQ168OA$VVGvr`D;JDZ4K0lW^{{WWOo*TLrUrfGMgPk0Ze z|DJQP>2L1=&A$Ww$an9C@Lrtu3+FnM_6vyr6<`N+MiFdg}Jv!pW^=-`{qQNS^y zry@FpuV6aE+;xVZG|(9aY4-y>%Eu4US@i4c^&S) zV|YFc=o}988v!?$)Zr&gX9n4-*cP~8UKOXvFbE=UY+W;_i0j(N^jWh zD)18L1+J4pj9=t4-oqKc4E3`Xc=$8uv0nk()?eU!_&S)EUIjX@!MyZ3)cLzGFTKz6 z(uC9GS$evoaTwzlIbXRZzU=F76#uBx2!FE4+qz*cW)%2YA@Gf}Zdw;9o|) zSDnDatg<@8QO?n!V10hYbQS=e`9NoZPw!{(X(e>Nzldd$P*RK+N#|^!a}K1n@8#*V zqdDy|;9&`;%`M`6AHV4~hw)W#&UP8lyxB*Sek^2~D}m+;rnz*H#CHB%33To)p|hOn zJi_76aN38N&Yu;wbRGdZkCo7QXA$k`hI9M&I-O*zkrPu zaQ^IcYU@{=5u*Qholbq@&#=#Wh2yJv*kI}#v_>!Fv~M_LOxo8W?HiEx&62d2aoTqv z4&rxx@u?r)%kfdxMf_n&{6BO2Pi2A6Al^O!-adu2pOx@dsc-Lb#((=Z{oB~Sy(vCP z@LcZ9GpLPzEbEQibR4v)443#P22-0-8(w^d+_V2!^i`R*8Pc{u+H6VMRh%}*;eX(? z(;;mR(zXLGn7yQ4FaE-Gx}7P4htHVK9H7$;Y3Bky2==6NL7#9C?0@Hi&xeEH?B7p0 zZ;20vGkZq^KE|BiyHC|Q;$CMGpHnKHbsSOw2lsb<&Ln(-bFwJ=K&E*-m%X0xeBS#{ zV7w5@Yjp^tq}MKmPpVK4Cqvl}0{zcVK~HipoJ%|f@TtaEz}KmVN^dC!{SP#8J)G&> zFY2M2X`asYa2n$?;GFQ8P~NkA{lS*~=M~%C>WB`8Gnr=tKF9Yip|XQx|ZwV zPK9kf_%Lzj`o@2Lr z=et42cn{RWy-*MLF&`<;_l}BX=?^^9fBP}dk2x14v@Q|#sE-5w4dCBGyF39p?cZ@* z93p7W7ilZqDXRe<2sfWadyu`H9mO8xM8^9#yR2tFa_(8*UYTuE?v$bZ2<=K6E5B9R zgH*B^EmgAOW-q!vxp8CfXB|4+#-Tew8`@{#zDfJ9`-fOWpFGRf=Y*dVewc9!<3|`% z-&?BUpk1tz{p;wTOF8y_F^*3E`TFEo|D7W{-sb@BhVeDe*b(kidC4=hvwdS+r+vk- zZ$=Xi`bD{j`JC^(V#fP?;O9iZrPJD=dIHv$@;=sR-m@~;(~do(_za(ol=xY5FJ_eU9QeV0!Lj$FUk0DpYaM&Oz5?pqRn#G_>U zvq^_~x3l;=Upj-h{_kNQjA_PexKAF)_+Iugc(}rq>>Uq7`w~9tY}U;>4<>c{ehTeq z_w{to$YKZV3n9=gSApI*H%J)7E(@7l=v|A%vtsDD|{|KvJ9T;WRf9K1WT zkn4F*H<{|~T*zq$vJQNi!geh0S=PQrbVw(&g6SmOIzuN8bmBlK0d)2*q4OBiIlxV) z^gM6?#GeTGFtGa^;r0VMGzQl(ovhm~=(y()4=teE&jOuRpfer%Ob+Z0Gr)gc8{E6; zgtnUn?Uje~?FF~V;3E4yljEhe;(el4C=1~&&XIPv-;1&gJV)Bv>|BSowz+`2!ESX7 z*j$bSJInD<#`(~<7jStcpK~kn8Po%K%;(SDNS$uGp94S3O4|AWj(?52nTX%S<@y!3 z#Vmz4H)*c{I_L}Q8YtIw&~`U~{pcE>ozB{fZiG94H^3dh8=-w~f-!zGjOFF-1XDlP zvc2gz=2_k)IaA>I0#}lICqO+A{sq^=3NDwdhufIvSqfWUE-RqycxU8x=))_)*0uub z;Vx+F6;Ka%xqS`38}65_fwJEVcLwi+dt|?M?b+u0UF*B!LAV?EkV|JTZ{f1YJ1_S# zUd8=N*46D5>q?*7?62_CTvt!JQ%xU3|6P^us#yF2)XDSEH(oMxh**E2KdgnazYO#I zOE8D8gL(T682fKRoxJVZGv0rLJ9O{3_Kf%Yu3eWuaP2wLkHAO$$8c}%3)lKK`4aBO z{oA#^j~qDr?S}0AxJby}kJ~ZydxQIeFO+`9|A}rFDRVx{eg4pl#Fgd;v=wSP{S|)w z9NORA?hF+ByRFY9JJji>jan2P-0Mv^_rH5R`nR!rJ=~*h?EVh-bl=q8ZBxz`;$E*O zXCu!%SDrr{Ti@Hc`doSbkYs>c6}B=7o<(c`JlP2we2~wVBh962nEs(olc4`1(>w&u zE*=VW&>oS6`}nP(&zTNq1!wX8;ytE$WW}?KLx3N`Uob!OoU;W#ea@q_$MBwLcZKa- zHxGC_3wZlE@G}qe&p(IrZ0Eq9=pxt?{Q~wompOLrSW0t{!k5F@#ig+Kxr*nCA_{GU(w0mj$=f^d1A z579}h`HJw?f%)oXPP=zW+Dh}-=N$i_lK80C(!P&+KWBX(9kax7cDb0+D&I$pcnzK?Famaz1F^d@8J z`)G^n2uu6UUW}#hqjtv27+=X)>inN&EPWqsc0FO~`)F^*()ZCE#?trE#f+uzqx%_4 z-$#FCEPWsCcmrYS`)EJL()Uq;vGjd(DP!qp<9Wu?_mO)eVd?v50AuO<=m5sj_t7lI z()ZDgjHU0Rml;c+5tonwq{@IFOf&!0g(;g6O}+peWq-fkPD;{YAn z>+Q{S7CB!Do`1TWcwPiNF9MpUS6uJ<15NtxD5iNX$63HM&xN(@T%hTHgTt0H)0FRMtW|h> zf!|V?>hn{9mk3OHq3|sd+x-RlT)GYPoXf$cb{oh8D?sOYJFMxeVZFY`vHGhu@J`=- zfPd}S{m%Ws&#%q*Mh^T%!{I*1SDRdROZ+uLSV96|nY6(qG}+ zEqpH5*=d;WS8KUntyOqS(+Ac%q#K!ki^Z}JtcA8)3w_{^fY-vD@JE;v*21{>BiJ3* zf*klq`R2|omY;HcJ9vlmEH2mU&L~l?8*d4oC3_us!*gYCaX**%Z@}}rVC(!l+@1Lc z+>!Yg*nGbN`O^U%PKfN8k^EAhK*H?DU&nwV32u}g5bte54 zeu?X3GxuUqC+{=O%~%)lg~I=1_}mP17n{Sm^esS-w{4kY!5n(9o-`h-U;w7ZmYq&f$yNcfOiMq9sNNE($BSHe*j$}GjSF{xb-zO z5cDL2!0*tH!0*r?@HO-!(3uQz?fg&+euO;N>Ph0@J1FM90O8h;P@TKh;Ck?-vlrmK z0q^VHWbknJ4ueOyj~YDEeaYZafJeKp7(B*(+u*V8KMX#={nFqGfG4>$kR)yZJjvY> z!ncF)9U*)tgD1QF44wk`AYb?p2=^d74&h0If9j?UKHS~M;GY3L!X0IB#vN;Li#y)n zEZ|mmlEKs528c7&;GBD~!AH5R2DiDL2G4Zo8QktJG`PcEWN@c@fx%twMF!7tmm56S zU2X8u?t=!;b00PMIQKP!k9XfTc!5h^2P8hh-O1on-CYbm4e;r1UxUwd2O4~qTVwFq z?ihm?13urKVDLrmB!hq99>%?vVyx4){v9t*ZQ-i5TC~Ju-mhyt!HUl@l0cO6vr9mi}Mo1 zdAkDs67mXSneQb3dm|{4Uhzdr*fTKwW(Zb@CC|SU(1tc>!RQW`-7kCr{szBv?=$#cAP;;6eg*&S+P8gO@R?HuzT(5+Kc_nMslk!Z zR|fauw@g1nJQ?;B)641~2=^|7 ziO=mSVDwu;_)xB&>CXIpdz-u}l^y+%XxyUW^xwwf6K?x<>59?zw8NfOC)wUd;+r<# z#QRViX@@FqFY(PH-Cf%QP36mC^|5}x7GrkV@EJwaGjGvDoipL^W{$Il`={+`F+ zUc8@uMPV8j?V}QO6grC-WT@WBVcbk63&&427AgF(8=r%XUTpH=f{5HSR4I* zpr1Ja@B~NO?y3JbiT~Ucgb#7fHDl)x;1lgxhXei@@ZSiwp(fzD8P318ivMg{yT{DI zdA6gNx9wNZ8K*;?OTY7_({BaU=V4AIpEkj=B)BZ{jO9-_ZISg|hbU~%RNy&GyqnVn z<(dn&xuZc>HV?{pEVRpU&=$wT`Mrg3e(yvm@2PNp?=;Yroe8?Kvv^GE@P!b5GVp27 z5}X5ivvXN**0F-d^=zJ3yA`InbRpNt9M*4~#o^s%UJcgs5~ydwSFDg{K|dCKX2lA7 z7WDoV_AKag3fr+z>0IdLuwE>MI=>3emj4oTK3ALi5Aqp&7xgXX^CoA=ewxo4na_VI zOnh#(Qew;JO~BhNfNuppR{@{51D|&SpR0S!=XNUzui-e7&wH59K`SM;eBQ%+CKa}4 zrPctSzXp6i@cc0F{0Q*ue@D2dJP&7{p8=kqhPr(kczzmqej0dw2Kf8~;OBtnmw@M& zf#*L0&wuJM&r?^*`>oSWe~>!Kwv`eS&vO;F{lTxFwD@h{^IhQcJ;P^^pMJm(;geU& zJFSZhKk82FN{M@!`uv3X*-VAoI>dXgcqaC9;O#5m?cY#`E}VT0xjn7J>zU^*+y@QM zo4c0h%~_@$q_E|Ab2!)Me{dvkmUpu?D zukH+I>UII%cJ-ZOq_lrxn!5wdzOL>6eSv0Qpt(EH>{mkbQ>OVt_bXGkKL9>|05k`< zc1#U`y7j*!5TyUzRfGq-;o+M8kAUYN0sR`FUjy_91N|W-^nb|oV^AmZEoM2sJlBpd z59-AKF0;jWW;h8r1-P#48?3?p@O8sqQRTui?#E@^8_GBg`u{N3j@iAS|L+BLxHs^> z58!(~SbX%VZ|}ac(!TFM{Z`sSg{h5}D!eH^H#X&bqdr$jZ=Bu3<7kYt zg_xgzzlz4lXt0@%F+7iAtGpQ_AglZY^eq#>hC3e4@*M~=z!Z?9rowwb(zn2y%)|aA zXY+KQ51vK*C-eU^r*633Oa2V_Jknr_PkN_5w-au4#)$a4-_E*dIG@=HX{Y(d7wyq% zZl`@>!C4~qiTg2~W1NEpok>jRXgKF^4A7Ye^?5AVm*>HGiQ_?bS^#_Mg}ld<_yoWw z!uf|w9D4@-N^_2#_A)0L{7c8$G_N*q5YT;Xd-nSp$J#fSavzm=nMh&dSl`0eI@SmH z^^SeJ#rDOem-{aVKOx8FNgYPr%SJGaikHHT(+Zp_z zWBr6b#*&o8j|*u?*Trg*n$T{w1G(Si$&e9t&$2|H|l!DPMe#iRw`1^`4JUT|X4(EWr8=m;MSr zdAq#p_x1=qSK$4=e*nh4%om_5`wDb2F4$Z`U}vcUdrBDY=taPOQ3W=XFr0s=hC442 z_fUv`1jK2AIQA?=FTM-&I@gc9qxb3Uv<}L$?0g4>e^F7drR%xB!b9#Lyrp~aNL^Q3 zR@g&*7jSRz|B3slZNRqG$F=pjt=k{M2SWHD2(N|kIE34C;M;@kW(T-O^F4kq=Eq$2 zt=LX|AlbCd3!#c#hxKz1YO>TX8Q&@h{={ zgWO9^{6P@^N51%UmhUc(A9q)q_?7oEwp~(SbF4FM5iEOO$cymr?jUlVr<{v{_X0vGBj)b31r$obaaJ)9I-%1;XS@0q^FZE#_AZ zHvB`t2j9v2MCT(E`h#%sn32* zd#;6??^VtXCf}u;@6y#0+kBTozUX`EYRLC0$oFc<_gB7rNgi0fn%1Hln9hT%_%hdOO(T?hyZJyaw>SJiC0x{M^Fz zu*F@3E5AFe<-`68?{F942b|qT>oVTY@7VJ*&pTF*eHrjt*xSDBv_iPu=l&V?xvv3! zozMU8e;1932c2ug-uzEls-K6-%DRMgzEtP9ztHyx`YU`e*ZlDIdbz^%3;XPrxSrIh;}dg3qYm zco)qr@A&2x?0Z3u@|8^c9t!2x91OJuYP!7X6D;Mtmhuyvgqc4;#LC)U_&Zm7B z_E1~H9_qVr4y`xrp|*j2Qy=$8gSUly@!P?@`0e3L_>OQd{(tx`{2#a-9oN32=bHQb z!FtpBll}_7%JsIZ+d4+q+pbVQy8*_%z#d?S`T^{l25^1K_x^TsZwS2ir+L7)By^p( zs5mH-hwlEbOius)6Z+nAviipAcq_@YWACQ6PC6%=K9=NgiR%Cl1H3oLuKQHOYG`zLx_2w)Ley-EH;xe+67~PkB8*;-ewXqkx}KxU1H6c3fk_k65!|npdx} zyzOwW#m51D6!5!%_qvbpF=4_7-)F;j{Y!5hZfF-Z8^I0p56_*cL*1~on!@S}jAP*{&O9exC0>bHb-zcusoLl$5Dke%oM zZ}p!MkCY!5Cp|(k!?kYP-Xg$$#I*{-*gceQZi^=V|U^PlTv%yvqIRx7^3xRT%r&GU#J>9N60_6uX-89W#eC zJ43VGogMk&(9VwH&}?(_;EtxFhR&`_)DCUVHWeD9gDK|F>5Xken>%LC>}Vg_+?CH~ z+lxb;q0>8NW``ct)|j8!(Us@4&28Dnc0%P66!OhORklNI_S2f1y^M(2nQP0o3~_Sp z#dL9CZB2B~z4QEMSZ%FWYyOE}(Ukc&%xRw9nCJMOjPHr~!=j$}($>*Ft*@pQ>lwAK z_Cju2d$z@-i$l6vU%D8kNW>B%ri@`)ELy8LsueV&UY%?Q$c2uaSpHJ@RW(Jg5?C1 zl)<({wLU7%9bKCHXcV)>4_;{!Rf1@&B#r(OFHNM%5lxgN(qEFLiBxH#DJ-S$OC1)p zvDh&)*DOEOn`Rn$$o`q(QzjlTZlr9#THlwSPHY$@!>J0W{yBKWAyY=nV2^`68(S69 zi}8oJ{h$is#gPzwP|SJ>{!ph_8a1k6^yJC%OA?dN7t2;kf7+xD-kxn9tfr)5V}4q; zn8|0S<;0w>Mwh3$dty&Vd}wc+nJuKJP_QU|wxKp%ThkCtM{6ceN_#a8v2?7aA)b!c zG$hiAnucULS<{e8r)nDN(seZr_33&Mxi%f8G$K({{PEI)R6{hDj*67gcseT5Mic3% zNG+-}D$++&>8PL(txHD*jc9#3DyVq1X-`n`qG?Z1@w~JrsCcooC#ZPwv?r)|iL@uE zc*(RUsCcQgC#ZOJX-`n`>eHT}601$e1eI7c9gEhC9ye)ZT1W`u@8qARW3iesqbVRx ze<>hQGkRo0I+m>AU#XhOqIj`7@h6pz)r&uM>3FU9Q=g8D+Mr^_J^C9>$7A%@OUL8% zHhdK<3vjoHcrGuY2!pq6gNTSM0pcLPZT&o^hAjhL{AhsLG(nK6GTrG zIzjYAsS`v`6gxrmM7a}0PZT^!^hC*%L{AhwN%Tb7ld&36(4;8nq;xV-Gt9KJ?f}%E zxxqJGXlcwhPv6uDH^pr zJuDU-CI@5SZ8xujw$|0Vq#}ujtvrZD}tIEy9!wwSXW1Zv$M^`j=TwtdbLu> zq~abmvoq7wrIxf9&-mgGiK(e%p)<|HS4yeV^e-u+7WL00^OBFMpY_Z~-cvt?5YE5j z`gf9vssK-xE$?Z9UP4jSBt2QGyy#e(AxYEInZy!`sLmx;r-&w1Ks>65 zrgT7D5v|h!bxgEX7c&uMnpyKZ&LrE+?^Lp+R%M+gWu2z5b)$8|+x-J=;8^&^0s7oX95co|!8)+c4Si zLhdYzt#=_!X$6CWc#EvML0h(cT5-CHFS~-^shCa6NYoqZL>*-^lg5mr5+>x(O;E=h zM1MukYn4kW#hEJOBxRhGic_cJ2*IQ;6@h4EM-Cr3c64UK#EFx{gfD-Lo-lmG_|anO zmp@01o6NsG^?S_tgC>s^%YoP?HHy+_s9^byHaQgJNFa%gR%cO$d@(&nZ;ZZ%lA@(+ z=FGW0)r{miHcl~88lSSvb>!M}#Uahz-C8h|+q?Y=qE!Y*ld$Vkf`#}as@)2%wJcfm zM9Y!M%q}*yWrTptGQUhqlUrRT(~@l~Hl|r(q`53PEF+}7mTb2Q5+jkrI$PVhm&8<; zs?{A%QSelJ5h&sh+l1{&hxlJWny)V-%-4e~uch|-8lU8-MeCGK?ia07TH+3h)+t3M zAX=xC#2pl^Q#C%((+2zHPAx;HYJ5Vc4faW#s!ybpz+EC)r?ku+l&n))iH-Gxtqad5lcjU#i z(UL7}suF@p2_hp!ZI909Cv?yR8uf2Na~+xKjqNRMYM-n=idxyEaom!fU2NQBokvT4 zcBZj2C&+MrX=%yN>BzT8M&mWIsXf)3un=(`-W-L$b>?#&`CM_X{%V?>K1v}>e~RNL z8j1RYufJ34=nt~R6&K?sH|X$`WP#U2LvfV-UawfJm5ZjQrXniy%&ua#+Z2<;fM{Ds z^Nh3{DPpd!6LW84A)V&$qO5zUh&B9I6mNhpK(65skkB!b8>F44Uztp7NT#-7B>n#| zZ}^a5;;)L43g#XU{7s0zT)biFAQ}E%w>|>Cgq-s*2;2Z;mGbkEGnFnzjO|+Wv_j5l z%oVX-xLMMgH@ybxx}q6r50#h;Ky%RmUx26EK?mrTqPga47m#|XXRAQ`Bem-(~l@#+>SEmq)<0A65r%vm*(j} zZ=h_0#YBJDgR3*<>2^l0!@)@)`9*#w+dBzZrw^rS{wF|ywuR2IJcDfnc#LeKa=Wf%Fpq}H=$XDQ}LRLOvrJ9cO5os=saYA)p_u5(0Rz;R_7sqOPz=9FC;|lp=y&`GwSJ%tpj4ZYwG~h^%MVXfN!D! z>qjf!6u3Y{ssjiAj98N>m%SxSZU~1VyserK5{_?TT*W8=x=>c#b)-D zVxu5-AiOeYRVS;x>gI@*JeyXk*g;AQ+bXv&vJ2+3jZ!@uR}m66g6x$|mPk^?N!d8E zt2P-jbt+1|jiMA~*)}m9bDU_cibMmdmG|hnQ0?T2yhX>rvL z<1&U94OBo~;BS4Pn*$Y2@2w}jFI}bKQHiZe+4;!n?k@UzCfi=j&t-Ww#+!gb%p}&<_l?E1ld}oS(GsosymPnue7qN`Pw=0FfnCK@nS{?LiLtuZfh(Qs99>|jx4ImRx7tsdk|oekH0fVsgm?odiPOf zDk)8+PPOrRsZfM^o5B<;1F_SSB^f6}y6|GInL~4pZMmbxua5SN=q92L3dMX^Gykql zYi&cuM$KkA)04Dz-)y6F$o}Iejt~<2ka0ue^|iINLo%fD&S;f)M(hPLtny|g_>wB` zj8b`L3V90ED)0KK-GvEFhKZi4-3!@#juiMkRl5h`liFQr;^mhfYy2yy)>u)!i4-!5 zmFZ;^aZsF+AJ4j_>kNNo(4_ZD$y+g8`-XR&(J4mr?kgN=!-XW=1>|{{yP%qUAC3*)bNDWfV zl+im-6XD-{xRA8Q_EaBGR(wlH13DWZLFiy};vi*DY*mXe3Ly!# zwPu^5jt~$^0)|Ez$1kKLYU))K*{5WjfYg%U{v>00vTIfnV-k8_l;D1(36_&<61pcP zxT~0`*c|@lpQEO5^-riiQFis`kEN@BLidVVe1Mr9JUa`*(pQwcJ6mxf29wdq*d53zVAk&c)BBr-{q`{32qrjzA9#KebG zxerP4p{{HmM615+m%3U$msKwRIDINx{ut#HEn5X~CRnx-Qp82HY$en)!Lrp5jWZu* zYeIBj`c}3wVs)IZY<-9gK7A`+BhdsA^~%>ttd^*X9wP^h?30nPadqWITwl@V#}T@7Ie;WnRCqKoG8h8((s0H zQx3^Ym^fi{I#^2eZS>U96G~W9-zJV4Rl=P5binY2pOg#$^=d=bv(ZR3 zg4LwtJz;oHmGDls+RXUT6ZW4nHj^kBH~2MKGI;Q7s$>M=S30%mDFz+NP=beC&bxiWh|&%Qqe{+-{f$rIfkpW*H<1itI|tzGQ}8962+$00I*lzpOB_vcK*$f=o$Kam}ne~dY3{CFkp z&`)(PX%tI4`R3U|RGKCJ>ugiqtyXroTGQQXb$81ge83b-ntqHvVA7OB6m9zLquo8T zSW3H2(iXi#7g#JsO^wYn3OYu;jKSR_>Y4sSOTSmEWE`(n$v9F0piYk!GkoJlMN_Rr zCA7gYojPt)%VrauM62gLd2@#Ul6V}ilM<{~tHfR{a8uvxD*Eoy2sumrHYe27Z`l#r zo77L$H`_YqWafwoGOvTBI3fjmrR5}XBpDwjHwa3kCyj9(N6WQOOG^<*DUBPOgb1L5 zl-js6+uow$rHtyhq)$#!ov{#&dEB+Q#C595VyeWZ!Q|(9^|@ZxfRL9mAYaL9(DEb? zf2s;mP9@Jt)};cxqf4|QDOyz<$RgFnMO1%yGUajjFyASy2!X_W5 zVPg6)3e7A^SCcuK?v05mW!-g_r%=AylqqHl#q{844F$D#v}eVHz_)Kiql>0U%MY`< za-zF>^2_v&d`H)`>0$|_pJMNq&kEr`zA5HcSqCk-#%Y^y})kBlnYn0-u>;3(lm0dceypXnvk#&Vfp84&|Cx znmnFY@@gXF!BGFrT#m>XvphlvUN~5A%+9cNJrm0_aHD!RP!@<`Go4nWaIRR5GKH?@=4_$R+SR55RrD-4#0Zso6hmaO?PIh^IFVqpoXb^lr5l5PKT1>)HmrzQYDP~6G9!>gekdOrdo=w-G(LL#10nZQmuZ%$F-MpCh7+Y0DME73QmHBEbFM@!Z>$`sjQzP`)dpva_2 zZ%Kc7)gur$7sr|kooacOrbbU*?(yoSmD8)QiJ7>pPpPLKk&`IJ0DF`!cEH^jYnrF7?nn}o-iSNnB zs%Gc%v`Wj^*4*aROBGbT{}N+rn38N2`CO|I9W$hw(W&b6{=~*$VMBkfmsI6(CjwDx zp|wePNa~jKRFarZ5{DauIt3{kObS)RXi}$0mCJ;*4<<>SN>ZBF<$9B zhDsGPZWL^kTyrts=5Os-6dF!N%XT*hB6+2esCZ!Ir&uw`XDqI(ALGx+iNApay1g)- zsOv(9$htG%(OfVwRi})l6zQao6<+TB3F=G&h}hcJRS?})UINuIRnLs;o*DP|OkdKR zFKOH}NwEN(UA~bKkCj$lQ%7UI#UCqP8cR%ucK0KqB=p>dafHAs%P&W=imK`>uInpa zhn)@5>gx8Tt~aRzvC+1qr0OQE$QGCdyO_&i^`E+)VxuQEch6W^^P} ztt9lIPo&DVpDw34zrY(rL!_>Bu(V`_$d>6cT`Hk!C8;|~vTR3D;##JOvM{4Dsk%y1 zPi9H01$UJ6FBPeirNY+)Dh+Y1{1CMtavimHqiJGGOEO87=^%OBi0Uxb)ds>?JFAqj zw4;(hf8Brz!t5h6?H%0WygQ2a&{oeb73vb*L&>MYM)-;=O+%Y2TIXiw3eB6Ok+2?) z@{P^qlymCPlsq4$OTX#cFR|i$Bip!5I-8*VL@^b*WHWA}kazYUH+jnF2CI@uvS_f$ zel)&`A~Um+4j(a^AQ){pXwsC7kl*-5Z?s;qELIS)&Sg9K45Jbv&Aopi02e^}8RZMW zJd%QlWzyoS6UonQYP79W&VXfIK_dA;fE)Uni(Dr6NZ=C=t_8 zYhzbikwgg*o%vQL#wMwX=TWAAa87(?PwsCT`H-f`NXq(?Bpr&|R%pr<)h&HRp0?LI zN>1xkc`TL2Ells2li}JbS9KdX=;fD<8}z<3H0aqq+NO?rMZQ*@Jl$k3F+_?gMi8YYQc+bMt$s0)Ya}w=Kt8(Jfpp1PFuER zTGqtiQ^Y1pAsy`6(}grMr!k+EOU#&!nFCEjiond*=>R3^s1wjMp!z_mM#PK%f2R@g z;-wl9FJ7V%@#0b=;>9+s5%J=n5%JX{5ihnrjffWyYD9q0hBP8xT%CmQ9bu@T8}Z`mbW6FMHcdC;$&2~?SGH@fR`WciI`M+46YpEAI`O3H#M_YS#FMHMuS9i{T%YR1ljm||tCUrq zcv5-dY2}HxLFI|3lqa56o_HHlo_I=m;%ViHw?XBJr<5n2R-SlDd6Ha@^2Afh6HhBo zydEe|Jf%GGwDQF3sq(~A$`em3PdueONv=f7D4tTF zcv^wtZ9swIDFsR(UKs_7rxYljR-kwrP@s59f#PjYf#N9zil-GQUXK+ho>HKA>s6q5 zQh`!ZeL)q9CsimV@q9`YPbpEn4J%PRr9|wy}@Q)(1Xt5Lj-P@{NCjpAuFisw_K zXlb;wt+CkJk)K&XEaffB^lW$B%FT^!EHo$V$EcN##b#$J$rJi(9c_YyJYZtb6)KTl zHH46y`S5c^VV)u}ArTWcfJ$mVN^iKv3?Db%e4a`4nT6KI93NmQh)tblYxwxl4O1*T zZFG(-5QXZcndA+)qGvM~9kQc^w|ps#${nO!tfW6yV~gGnvQrKzMz(c`|5L_QL!;Os zH>&=qg*myRSQCShTk{<=O?2J3GEc?J{`4{a_1yINTqQPtEfPEhl^z}IQCelW?VM4h zP2v8dMzAmLf?kM3(Sp4vp5U#Z+>OZ=Y|+ZK3{T$KLLp;y8e*v+{UBW+^L-b+*L+Ii zCp~GDPe_jS8-pKtW9X;GCGYC=g^DpmCymsYi2CmCCsnC3nPSIuRxH%Y(;#X z$c%K1*rB~=`l-fE8mshF_ab@YkRQlPa!!K`30g>rPh=@4oO!Kioo-+zGc!9g!)hO0 zW)AX10mbChCVIaq%WV0;00~iDadQ5jQ6c(l1fSALEA0~azfn_>K0wiyZPzo8$xARR zYe@VywIy}E5^HS|Cz~mzdC9Z6_$z35RFn!lCpOG;a(z6T3=E@oAur||JFQZRV@~N9 z*Df1?8n7r8C7!-a$pfo6wXv-$D?eE82Tps}%#qxGwK6Q*EhCy56G^9Zj8*;5kS`%? z$c>;CLeQhUuz)~eBV)SQDz)4%%wJk)%c&SofOsA4R%?v{)`baOIYp2^Fsz%5=ff;Nw8@u&kLE@TqF8YTm zZ|Ni>O52jw>yl`1L7ZlgjBFayFH9zyQmSlcr4Ew!^^mw)6nGh%T+BoHY`-!&Qvt;X zx_cAn;4uIMMz@{KdCNSmKlU|FMxB2Q~Ro7GV> z6a~o88V;YxRLONJu#qfejd^lt+VPm-OT>gYUo);G^H8g-0{@hgY%5QEr6$$ zqfaD>yGhWrtVI~7opMk^<(p%kC=4^LmoOpYkRI9i?h12Vy@85 zE#%R3r(R4+e@m;Y;)Yyv5OGT?uO^1BCQ7F(&`69h572kruk+cNLLeU3K0=CNRJ54S zpOaS`*K>}HJF%r7u{$z;kA8&igu%#~^{)806Pchw0NIHc6gzibropN=90 zn05}%wVRcYb~-v;YcAW?qN>pfdLW{yXw|ky^UVNg)_1Y!;)DK7ab*cq4{9~^XXBQLJG&)X z+Sy|;V#sS&fmarpTeDe6ZQf$zAUcqifAY=d$OO~0zf^-NHl~OUq1Y($O^v`1g73K& z-6xc(ZmMigj?6bljE$7ph?$5GkH`h$DUE}WLv>5*qZw^ns`MvDz9`#Az?kO>`OBZaO^1&w0XP}8a{;f5!%hwRN z0@iC{myaXJ6DGdyRJT48dt92>la)>E^6><9EM$;A;;}vxdt8~=2}w_P8>!>*oQycn?hMab;qUYZH6CrzZBeGO=ra_+DI@ z*z4A3VvqOC#2!~B_T>6a>~Upc4@L``*yGB?9@i%JxIh0A6MI~l*aPv(nAqdW#2(is z_V@-&>~Upck8jY#9#JTA@jK^A@H^SH9p$F-e4UcpXZ&U_x1_IdiNYb6POGB;Ty;RBb`9oXV( zBjzBvZFlfRPqNu4-5c$0_-RLnw4D$^GN%13$S8WxBok{LYCww!qm9&6Jl332jiX#_ z!bo#ALk=wM8Q;!kQ)L*{dh;|wK4z4i z*)iKk$^V@{h&3cru+|7eF(*!l6EP~q$jiuWcD>4nX1`p`%z*B~5Ie+Mud^bT(tHo3bvn_ibM6b*1IAV!Kk18nCz?btW0F zbiVj-(7;@Q+21aJEge#4Nj3m8l9kRTR%=yAElQ^otCbZhWMraSXlyk($ta4lq+zm= za(FO>HFv6~prxTg8$G2xA))NC2G4Blp4bH^5CSw{q7pGX))UijW2Jst!5C+acIvE$ zt#$cKHLQhxV|FqzOedP&*cMneji>r@bFQBC8{3M(WKq>!GfmcD;>jZ%+FBC*+PZ%I zd|tCd8wYJPVXY2lMMs}$=9K=WTg`aXXD#$w7o_PHvnt=zl4c_+C7T%wpk`N}rDoh7 zt+9_?>Wegd6+-&iBWKb$Kj=8(s|^**=hF6EUVM^z)FTj+-SKzKtw2X*!S9&_y`ksluIKA|xyxroZz*I; zzOu)3AL|r?C#CoW6My`Y0zeXfO!m$gWS76-`Vr)(Dc{j3wp4{;Y0KGOB!&$Ldgd|} zKWE~=8wUJxjJ|azM<`v+o21@Qaj5Tisz)@mAGFSa+D5?7rN}8J{L!p3=;(=eyEr zmXE=sp}nX@NIkJ@Kc8wl`E}M8@EE0i8a2z?hbmZa#LEoRs4{1n$R%;%0-aCkthY8z zosv#mDW(H<9NK&4>0XzNB~}hHzC@*W0{?wLdrn7RfzxMBjM0Ow50VVO$e?o4Vg8$h znqEm#<#sSij)0utJwu&JEXcuh=8~JS1gmpesv3h=6O9~)R}=kQWq^EPPGe`x(_(SA zK3$*JVo~5uWzN(v-|9=6ob)wEb=*M-5VFRL+_sbHr}y>kF}c>@kp-{x$O7yCf=3o) zVDQL76dtWJKC9rK<7fK&wgru%Qwz;m{4M zGn?jSAe3i^{H#p7xh9;+D3K>x$1UI9(Mbxm*|}z8oAm4MEFq~BZn2c4%e^c&XmC4E zN5)eqk@TVnz>NE!dP6s%-q2-xu6puk0Q@wsg6daz0dQkSIMhVN<~TR=|BI2M_zh#{-$?UO*IyEvt zCXlar2I+Aflw_j)nMfKba~P*G4RwY@C&2eWE1XEuhe`rRlHzh9+PEW0=3L4K91qKQ z<bQs5Gu`<5GVXDPrcr~QzY=^{L%aS;*sI{i_gB<7{j!ba=|1iy6gPVIGXZs~u}nZc z#@Lv~N^G#U5~{Hhk~^}a?-5|e|F?c4>aK^`bH>s2W!&QoO=AT-tR>ijjegIdy*A`x zjTI6lqb{cVboH%Sj>$1$aF z#o{Y79M_b>l|~n?SkBl@tSy=|no_u8rIJ}^G^KFa;3C+2K}!mkEiQt|EJF%cT3fg$ zHl%Q+&4nveJvXcIqL{Dg1;j+a!fMQfG;Cw_K%O#&W-@tUS&^F9ij#yG>u0@pEs7h^;?-oz0 z)Qx=pTjkWNcZDzI;&7YwY2A_l{}A)RXMmnDkg708d>kS^p}@~n*aW=2cn0vNP{NmFbo??9DZ zSq+n^fk;X(#523eGgv{suQfR~nU%Hmb8YgTkhJd_!1Fr#+sNoakc-MsOvL&W-R!%t ziLiqh-QUyVeAk#?-Poi);4K{12oRHB$m3RfqyCtP@&*up%Yon?Gpo&6LKy+}Ic?71D%23`Qj`!OXBvfGD z%vDA_m0Lli?**~{#*;*P(6Trp%OX;;!)ccHdSNwJ@FhROJ8~Es+^d;z=%9)^L76G$mHHgd)oQrond(@_9g88ALBorDeCik+V}OC$}j95jULm6k}-L+S3kSz zmk*%FDM~!2W^-Bgo~XR%D}PQAc6}6^F{|*a6JzIdGo_o+CNk=mu52RXrcI<##7tI^ zV0E&X_8+u`*XYKX+o_Uulr>WxzO}sA@H!+@mX|oA*`=7obP|^jO757k?=!`MapG1S z^|Y>9qv*heP@ZR92{kfvuUi(H%1AO|+1(1)E}#?xm;0RBH2(H)Q1gbda#FH75B9F^bK6?B@?YJk+2mth^VL?bq%6ob`;gp?78bq;M+k4vwTDuuW!<1VDW8v%Yu`T9+CA7(UxB3Zwsv>54z@G|N~V|Ztu1lYJlOh;@@)aU7Z_LHhQzX?fhxgYQP@$J0{KeiqWZ0#I`dS~l!;nh3I z%hTm)qNrwE*@bM0_Kwz}ZtBi5QnGy~u~VJ};|Zq9;s^Q!#Vx078Ke#^iyjo|8!DB= zq<96U1fj83ioX=qrPBol-S$u_4Fm60Ad(+qWa2I+#8=JqBqdmo9OF7e+z^eiVhdSj_$tJ zBsyJyeoVl!j+{mK$XB-e#iV91Q+%CI3F?9h=7Tq-uT2_rVnvBYhzFzRW7|E@pL z#hx=T*8JYP*ff#btDNnK^=>?~d))B8BUZpf*Ho4sAxrY*w|qrC)x>92n&gq*33U|* zLo)2krgx8K*btK508RPtg5L8kHHT+t{1Z13k4)S^pYGTzcC^C1q2ft;3eSq88JC%; z=QrIP8udd+g_&Tcn(}GWe#ogSUO$Nn@mnhJ@3;z)-xPihDLQp@ve~H{!;YQ^wAicP zC`Ip^$~$#vjkLq&&yPrvGK%0#!^I+1##N?8j;#olHmnY6n8j+aI>;Q{~mm@NAi`cGz*cXP1|EnNePTXy)?T zPcmKiNv6BjG5h5h5*tk6Z?pW}W3M?S;ogy$_sS-ri}0 z2l}IQk6tv(S!AT6@QtcY`FG_0Se zD`s)M5DjO3puAOgRXMF|%FC<#7ZU%UEmM&kG3J^{4j9i4VD23nFUB#o8oU1(2?NLG z@DikO>m0Gv__!ZI&xKD{P0{`{vMxe z%fqvC?e@MHp!1rpX22|`YM#ySeBe80D|(f4Ix#=*n8fp)b--^|DLl`)1o#dk{iVRe z)f!(rkJd+>eiC@6LB9d`H3R=4a8r%OpA(&@^M5f=-k*!jh{jLp&KB+YTLY8+{igu_ zSpdI2kJnS)TP<*o0_VZcD#1;avmQ(Ct-xnU9IWrd^X>8u0I!@AayHH4^tS^i=7yZt zWd1J#*UbwF86f-+a13~L731#!_b<@({|NYA)W1*Sp8-#R{;^<-qqK{}Gx0JmCICs9*AbA@Ia$A)zw~HvsPkPDtDi`~>jtNjwDn z5tO$~Vvp(r4oSQR_!#VE~eda>sBE#NBPsu}uo{z99-<-m)K@`CAW1L-5ci3P{R zcoIK7z`aXCVoj-3-?f4K8Q{l|f0xW3OkWJ7zZtlDq2h18a~trsH6gJEQGNFUe`Jkr z??b@f!TxorNMG$d3j6~2TO;Y;1Kt?Y{rep7i%Ub!Vks{_2fpWA-5+lN-)G=sz=sXI z2!il{fzJfqc6!K(DER}P@aN}z=W^gl0}lb`jrNUDc`HI<4Wj%v053m7&yUXm-?QSF zP|{T2eZa$OLr$-(@9V%v)`gt7O#f}*v(67WcS`*Cz;$c1yuD22oueafvt7uDZ;7!0s&>#I0Hv!*b&^H6m1KuxjKkz=I{0{&>biURP!@##9 zJte3lpE=`^faGOA@GEHlN}2zUfQM@}z8CmL13v_OXRYq9zW{!wR_jZWr++i#=?TzZ z20fzs6S#YQNbGrp{7`$>>+*g9{4L-yiT?|@c0)+)xd<=7BTV-OUEV6-8-Z6#TnBvX z+GAo(ruJV-k31KI#GZ@jUBGu3^lN|*893NqdyGdW>aS_wdFyog1HcE2@%U5Va5&@? zWPL|~zYx~^e-HRR)Hf>gKL>n^k^cqYqelO|0{kTMACdC<-@wy#A@Tl#@CrQm-Uqx% z;xO$`iG*!^=Dc)5}O z5#UZ&*B8wHok0HQ0{B(nvyAe72fS+C%u~|AWAX6I%Yi0{no%&o_Wq zw}-?t2+{um`1W?K5B>xAY2ZT=&p}5WK2H13T4wVXq^}FmF9!Zz-X5iSBp>Oi0Dfn)&aeKaW&O{C zzE94FrN;ZcIg-S@I1Fb(su$M zFxoc`eD?;;?>^w227g+Xxqm(b`fFQ4PBzegD<%E&%WZji5O`Oo?l1NCtW5t`pg*&f zpRb7iGy=agSf0pL|(J-&|vFYgIC_f^aJ2>d+O>&`&^i;Vi|uRnm*`2Pa= zThQJOD*u_-udLVdcMkBYn{h0zKh&SnzfGWDcUH)GV(#(vnHukHNMFG7#15(7 zQ@~$E`(v{FDd58xpO|d#e&8d9JbnuJ+t4>#WcovAGKK#?%lQiMFJ*cf|8D^2uh#wj zec&H8>iS+jQ-7Z#`m1MFUN2S|?KxtM@2`>mU?=CN@~W_q-9pbdv+Vg?<=Fk9@}GwE zcN_C%E$~m;w7zTvZmCiHRXLr&%eR(~$3|KH)u1F0Io^+5ft zmGp&Y+v9T%@JojN4FkV*MY+D{mib#iFD%yb-2=SxQjLHAY+lb*e`n6t@Cn{56&>Y!T!Aj>8lc2{)6(Pu$r%(NdNMhkmL{j1AL%U%ft9edwxy)V%s--(s$PsQ(Ff_}H5f1aWGI?C5OrQd!UsQ)$KWC-#zYli+f2lJ^`&#$GxcVqku zvl*WU+-=OaM&M(v-p_6Wz7^}kixQ`R3ulC!yCt3iE*b5;4fxIme*Y)r1GozEbvV!- zwSFG~{jv)C4KDAEcfSStAyb}!R~hTs3&1xT^Y2yQ+L-Ro-vIASX#Kwgf_1}ke*PuA z5_mkYe8XFtH`e#dB)tXnWf$rG?xgZJmyf?{Ur=5Z-XQT+$o~rX z?U4CLR?+)%&F?+@d&_gC0o*2?_PgI;IM z-+u;v!6@&yz{z?&|K^?x`Q4!RU#oy$U99^j0z9ut@At0&-d3;YUlRCeeMt6ql`{rh zSfc04P3QV73Z3y8;J?`za-Np-FQ2RD54GoOz#lit3--_B=i2)BDd1yEw0u8zuDxIS zN8osUNalz90pEUMNUS%67enyxf_~X1>8pX`4Z8k|SM&3+(mzeWZyM{-mB71<`Ktbc z`wzwc2+}WT)$_Rod}uMh4<-Cr;ADmIRq}3rPowsI3F+^vkUqHHtNOpb+T3qcIo|+Y z+fu%sZwTa9-qftJYVe=h^!EL%^HSA3u@wj|1P1^=(+<&jEKf zhonBLa=rxIZ#*A80{pD8K7JSY^=14$gXlj5u5K-VpRi1}@2BV4@+$)Jkc!wJg8uS$ zz5fi3&zqnh>MUQc)OfxN`lul<3&ChdtKRRN4m>WuHxhj#aKg|(CuwSwDvXTVCZBwg zux{|wZnn&(N2Gapu@1ENR#<+|ZZb}}WOAZJ_E7tTQItp4QH9*(sb0R#MpUWNSgtTh zCbLudQ@$5ma3>7N-_6H)i1|yQeh=FJ@A{LCO4@NYUWr>uK*Fwg!lEq0k5a4 zHy9-hn9Rr>l&*DWFsdw_uCKfZ!5CSnT$QLqNDj32M+zEfvuoxDy-Wb^?=xb?n1?>}xuil&{$8Ev}VKk=`63_{Sx2Ne$$}2?4;@Zz)gz1t= zS)g>cryQV(l$%<&3~q8rchjOj;s`e|Wb~gS%V&8*i{V%WNEkt8Mm+yY+mvWQN?n;K zFM*99srDOF-yDfV>O9&td1}|>VHx2|eMN}9zmOkxxnuIMWAZd3%{%rLdxssi5+|1# zrj@>98r=JUJ$yKZDZO;vVWcRF;$}*)Z?Ys@-01R0ra7WiqJHx5!;V2XD4C%kb3!4- z28B%?m}XQldczq+?oMYh0wWhIhbhL5%8q|gt}z`kQL?$xcqU72L_Ef<=!ik_FI;!1TlkJO zlIzLzWDF^hdLo}Lh+IALhFS#%3#fTAb-lcwm<;t4DNz)K0L19pU{%OyW>j2us@?8$ zoVvZyXf`JiiO0|Y5l|jWb!NT*wF04#p2Ym=n=0`|@48dOCB+&RxwWa$QHt7422QDh z5dW;cC0Z5Nl~tvYUnU#26ZWm;L5erR=y!leWiY5Cg)<#`I%ti_$ zZcP42Eyaz!m{}`|xlhg+#6{4C98F~@g-7P%KFHAEWr`RUKPsCU7D`e88gMIvaE3t8 zo9T-83KUjB#-s;}jV^V9aU;0nsVk)&eJ!-7ZbWrF|2k)q(PNdvb-~+*F@(1eY!?{8z9G( zUmndR=;c+qo-RriDU=m&M?K+>#?bIV*JTrrz7Cw}wRAdF zm`GB z7Z+0Ep@rrsy(3MP%u&Z&ElSzYvpAdD6O^6_C;_^G+ms7*0tuYl^p#B$@@6)M2kVXJ;s!sqkpPZ-g_J>oGdi)zR9ra{RPZ+QjF>^8vh zw)Q2XLQKr@W;MconYoL^Txj2cCwPB0(A#ZGUMk*}i$`M8*>WV5WU29_mRQ48=K4=Q z)YxwG967s%5Rmt6Q$%D3`Q2e}6FoTr=+UB>8beHKq7;0F;-yFwp*wJL3N7L3m{x6) z+bmnHk%$zgvRT>~C_PekpS#JiuSfkEC?r-VXtd^%Tx0Z>PA*lJmdH*`lAAoLPtET( zbM>j%bq2@@m!9z1<8;W8X;Z5$I&u}cd}YF zz354i{jcQgS!+IGnLe7OVz2OoYmL<2RK_n!+^=oVso*1k_H#O-Q_6;x-QCU;qEn8K zRzvm@7`LI)(iR&+umgLMfTA>>`{jECem{VIOl%PiEUL>9#BRV)kCuB~Sxz$7l`UBX z`BO#g6#R>DM99-yV?Euq#tbYAQuUX;FVU(%dKM0r$Z}!#v#Gp|NLx%~wBVT08-Y&2o+fRgbCK zu$mr59jVrAcl2C)I$JhTwT^7iO59&1j8#F;o(8?2v@ex+D(>KD4K$aPpc7-c#w*=d z!A-s|uUab1E7#3NxIS?oFZ`@0A@$5No=)Y((l9wSVQvtiGMZ_3ygR2~4D;iz Py&shCgv%zNRG|L@q^|VV diff --git a/packages/hal/v85x/ceb_v850/current/images/v850sa1/gdb_module.sre b/packages/hal/v85x/ceb_v850/current/images/v850sa1/gdb_module.sre new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/ceb_v850/current/images/v850sa1/gdb_module.sre @@ -0,0 +1,1192 @@ +S02B00002F6578706F72742F706F742F6563632D6F626A2F763835302F6365627361312D737475622F696E73BB +S21910000080076002000000000000000000000000031E70FF63FA +S2191000150F0500200E010080077A03031E70FF630F0500200E45 +S21910002A020080076A03031E70FF630F0500200E030080075A9D +S21910003F03031E70FF630F0500200E040080074A03031E70FFF7 +S219100054630F0500200E050080073A03031E70FF630F050020ED +S2191000690E060080072A03031E70FF630F0500200E07008007E2 +S21910007E1A03031E70FF630F0500200E080080070A03031E70D9 +S219100093FF630F0500200E09008007FA02031E70FF630F05000C +S2191000A8200E0A008007EA02031E70FF630F0500200E0B0080C3 +S2191000BD07DA02031E70FF630F0500200E0C008007CA02031E81 +S2191000D270FF630F0500200E0D008007BA02031E70FF630F0599 +S2191000E700200E0E008007AA02031E70FF630F0500200E0F003C +S2191000FC80079A02031E70FF630F0500200E100080078A02035C +S2191001111E70FF630F0500200E110080077A02031E70FF630F7C +S2191001260500200E120080076A02031E70FF630F0500200E132F +S21910013B0080075A02031E70FF630F0500200E140080074A029B +S219100150031E70FF630F0500200E150080073A02031E70FF6385 +S2191001650F0500200E160080072A02031E70FF630F0500200E30 +S21910017A170080071A02031E70FF630F0500200E180080070AC3 +S21910018F02031E70FF630F0500200E19008007FA01031E70FFE4 +S2191001A4630F0500200E1A008007EA01031E70FF630F050020D9 +S2191001B90E1B008007DA01031E70FF630F0500200E1C008007B9 +S2191001CECA01031E70FF630F0500200E1D008007BA01031E7017 +S2191001E3FF630F0500200E1E008007AA01031E70FF630F0500F7 +S2191001F8200E1F0080079A01031E70FF630F0500200E20008099 +S21910020D078A01031E70FF630F0500200E210080077A01031EBC +S21910022270FF630F0500200E220080076A01031E70FF630F0583 +S21910023700200E230080075A01031E70FF630F0500200E240011 +S21810024C80074A01031E70FF630F0500200E250080073A019B +S21910026040360000010A460F64F0200EFE7F660F60F0200EA804 +S2191002752A660F62F0000A460FC0F0010A460FC2F0200E2C00F3 +S21910028A460F22F0200EFF00460F26F0200EEC00460F02F000EA +S21910029F0A460F34F0000A460F14F0200EDD00460F04F3030AEB +S2191002B4460F0EF3200EC800460F00F3200E4700460F28F107A2 +S2191002C90A460F4CF0E53F400087468000E82F2000000A460F29 +S2191002DE70F1460F74F0E72F2000000000000000000000004066 +S2191002F336100026367059403EFC00273E00044046FC002846A3 +S219100308F80B260F0100670F010006360400073E0400E741FA70 +S21910031DF54036100026367055403EFC00273E00004046FC00B9 +S21910033228460004260F0100670F010006360400073E0400E712 +S21910034741FAF5400EFC00210EF00701184036FC002636F80B02 +S21910035C403EFC00273EA0256607010006360400E639BAFD80CF +S219100371FF020C80FF0C1D400EFC00210EF802001601006117AB +S219100386010080FF7E3480FF100B80FFD601850563F7790003CB +S21910039BF07E0F8D001E0E90000515070D09250B2D0D350F3D50 +S2191003B01145134D1555175D19651B6D1D751F7D2185238D25E0 +S2191003C595279D29A52BAD2DB52FBD31C533CD35D537DD39E50F +S2191003DA3BED3E478D003FFD6442BE1DE2374000E33F40004007 +S2191003EF0EFC00210EF802C1C700008A1D7E3781007E3F85000A +S219100404E5374000C6363FFFE62F2000400E1000210E620461AF +S21910041900E0374000E13F40006642BA050636FCFF7E3781002E +S21910042E7E3F8500E43740007E378900E5374000C6363FFFE64D +S2191004432F2000C242400EFC00210E6002C141280F01006100C6 +S2191004580330031EF0FF80FF140A03F610003E3F8500020D3E42 +S21910046D37810004153E278D00E54740006422CE0D8846800087 +S21910048288462000E82F2000E71F2000E6172000D50D6822BEBE +S219100497058846400088462000E82F2000E70F2000E6072000E0 +S2191004AC08250A2D0C350E3D1045124D1455165D18651A6D1C86 +S2191004C1751E7D2085228D2495269D28A52AAD2CB52EBD30C5CC +S2191004D632CD34D536DD38E53AED3EFD061D3CF5E007400103E3 +S2191004EBF0031EF0FF4046FC0028469C2568F701003E378D00D4 +S2191005000646F8FFC242400EFC00210EF008C80921EF010040F7 +S2191005150EFC00210E7808C809213F0100400EFC00210E000850 +S21910052AC8091E40210F010080FF0600E5956100E0076001405F +S21910053F0EFC00210EF802610701006000E5574000E0076001D2 +S2191005547F00E5374000E08760017F00E62F20007F0080571EB2 +S2191005694380FF642BE5FD80571443405601002A5668BFEA39A6 +S21910057EDA05E031B20580FF0E3A800708438057F842403E0183 +S219100593000132273E68BFBFFFD6FF8007F24280572A4206D810 +S2191005A83B572100E051CA353B573100E051921D7B0749007B5D +S2191005BD074D007B0751001BEE44001D3080FF122E1B363C0007 +S2191005D21D3880FF1E2E3B573100E051AE054352A2527B5739A4 +S2191005E7003B576100E05192151BEE54007D0725007D0729006C +S2191005FC1DE620001C3080FFDA2D1D3618001C3880FFE62D018E +S219100611527B5721008007CA418057DA4008D03AE7010026C710 +S219100626150007C838BF010018EE24001D36200080FFAC2D7D5C +S21910063B0729003857310000B2E051CA1D1C505FE2E051C775C1 +S2191006501CD6FFFF19DE01001830193F000037570100C73EFF65 +S2191006650080FF040044FA6A00E051C2F51BC81C501AE0E051DE +S21910067ABFEDD55D80FF1C2DE0E187553D5705003D5F0D000AC7 +S21910068F660100EB61AA0500623D571100EB518A3501DA7DDFA6 +S2191006A4250037570D00183080FF040044FA6A003D572500E060 +S2191006B951B2153D572D001D361800DC517D572D0080FF322DC7 +S2191006CEE051BA057DDF29003D572D00BC517D572D003D572901 +S2191006E300E051E2CD3A5701001CB2BC517A5701007D07290021 +S2191006F87D072500C5151E081DF0025D00555FE2196F0000CBDA +S21910070D514A6F0000415A035D0365085541CA4152095501F00B +S21910072285B537570D00183080FF040044FA6A0080FF782C1D25 +S21910073736200080FFB22C16508007D43F8057F03F07D826E7F3 +S21910074C150000D208C81CEE54003CC701001D36200080FF84F4 +S2191007612C7D0729003C57610000BAE051FA1D3957010001D23B +S219100776EAB9C955385705001C3080FF040044FA6A005B5700DB +S21910078B0041DA395F01001A5041D2EB5191F5B54579D7010006 +S2191007A07D0729007D0725001CBA953D80FFEE2B39570100EA1E +S2191007B5B9B9353D571100E051C71D1E081DF00055045DCB51B4 +S2191007CA0A5700005B5700000455065D41520555045501F041BE +S2191007DFDAEB51BA057D0709003D57110041D25F527D57110040 +S2191007F4851501E27DE725001D36180080FFFC2BE051BA057D57 +S219100809E729003D572900E051DAC539570100EAD1F1CD80FF9F +S21910081E8E2B1D36200080FFC82B17508007263F01527F00806D +S219100833573A3F00CA073EFFFE26DF1500205610001BE62400FA +S2191008483BD701001BEE5400EA39B3058007F201C13A40561020 +S21910085D002A5E6E08CB39275700000B38CA3967002200B00072 +S2191008727601FC004801D801D801D801D801D801D801D801D8D9 +S21910088701D801D801D8015E00295F010020561300EA59D31D18 +S21910089C3B570D001E0808F001553B57110003553B5715000578 +S2191008B1553B57190007553B371D0020561400093501F06957B9 +S2191008C6010080078201295701006F52DB052056EAFF80077481 +S2191008DB0120561000695701003D570D0068570100E051E20532 +S2191008F03D37110068370500B505680705003C570D006857091F +S21910090500E051F2053C37110068370D008007380168070D0034 +S21910091A800730013C570D00E051BA05800724011C36200080CD +S21910092FFFB42A80FF682AB50D01527C5725001C36180080FFBA +S219100944BA2AE051AA051CCA3C572D00E051BAF53C571100E0BB +S21910095951FFED80FF4E2A1C36200080FF882A95753D570D00F2 +S21910096EE051D26D1DE620001C3080FF6A2A80FF1E2A3D5725ED +S21910098300E051A20D01527D5729001D36180080FF982A7D07EA +S21910099825001E081DF00905085503550255055501F080FF00F9 +S2191009AD2A1C3080FF3C2AB54D3D570D00E051820D01527D573B +S2191009C229001D36180080FF622A3C570D00E051C23D01527CCD +S2191009D75729001C36180080FF4C2AC5353C570D00E051823595 +S2191009EC1CEE20001D3080FFF02980FFA4293C571100E051872A +S219100A01151E081CF0090508551B30035502553A5F110005551B +S219100A1601F080FF040044FA6B003C572500E051A20D01527C32 +S219100A2B5729001C36180080FFF8297C07250080FF70291D300A +S219100A4080FFAC29B50520CEEAFF19508007383D8057343E26D3 +S219100A55371500265701002A57090080FF040044FA6A00800771 +S219100A6A283E8057603D06D81BEE24003D5711003BE70100E0D5 +S219100A7F51D73D3D3F01003D5709001B30CA39073F00003C57A7 +S219100A940100C73EFF0080FF040044FA6A00E051F2151E081D8D +S219100AA9F00455065D41520555045501F0EB51BA057D070900B8 +S219100ABE3D5711005F527D5711003D571100E051AFDDD5153D4A +S219100AD3570D003D5F11003D671500AB51EC51D61D3D5725004A +S219100AE8E051921D7D0725001D36180080FF3C29A5153C5711AE +S219100AFD001B3080FF040044FA6A003D572500E051F2057D07F4 +S219100B1225001D36180080FF12298007C43C8057643D06600CFE +S219100B27365400265711002C5F6100C73EFF00EB51FE151E0827 +S219100B3C0CF02C5D26570100CB514A3F0000415A2D5D2C553011 +S219100B515D01F0EB51BA056C0759002657110041526657110076 +S219100B6626572500E051F205660725000636180080FFB42880DA +S219100B7B07163D265F1500015205626B5701006B6705007F0089 +S219100B9026370100263715000052663F09007F008057943B0343 +S219100BA51EBCFF07D817526307110000D208E026CF15003C5F2B +S219100BBA010039BF090001EAEBD1894503C614001B5F00000340 +S219100BCF661400CB76FF0041DA6A72FA0DD9C70000C20D235F53 +S219100BE411000D6AD8594B6F0000235F1100415A635F11002350 +S219100BF95F1100CB614C770000235F110020663E00415A635FBF +S219100C0E1100EC59DF053C670100ECE99A151730033E140003BB +S219100C2346100080FFCE33E051CA0D235F11003C670100CBD1F6 +S219100C38630711001D5841EAEC59C1C57CD70100031E44008073 +S219100C4D07043B80575C3A581A07C808C026EF15003857010007 +S219100C623DDF090000E2EAE1B97D01B203BE170003D6100040AC +S219100C77AE100040A6100063B711001B30033E17000346100078 +S219100C8C80FFA233E051C20578E70100F5651950035F1700DC7A +S219100CA1514A5F00003D67050041E2DDDF0400CA55CB56FF0064 +S219100CB66A52E225CF056852820DA5456D52F215205E7F00EB9C +S219100CCB51CA3D5EE2E0E1BE0500E29545DDD70400E23D0352FB +S219100CE0635711001B30353E3E521A4080FF0833C535CC56029F +S219100CF5009A35CC560100C2050A5243571700DDD70400D21570 +S219100D0ADDC70000B20D0252635711001B30343E42521A408012 +S219100D1FFFD632850D63B711001B3017381A4080FFC632DCC9D6 +S219100D34035F17000052595FFFFF78E70100A515DDD7040082C0 +S219100D490D63B711001B3017381A4080FFA03238570100EAE1A8 +S219100D5E819578E701000052481A800768398057183B2657155D +S219100D73002A37090080FFF0328007143B8057043B26671500BD +S219100D8800522C370900205E0102EB39CA15295F0100675ACBEA +S219100D9D052056EAFFF50D2C6F05002C670100085A6867010060 +S219100DB2686F0500695F0100B50580FFCE328007D03A8057C011 +S219100DC73A2667150000522C370900205E8102EB399A15294F1C +S219100DDC0100684AC2052056EAFFC50D284F0500284701006CEA +S219100DF14701006C4F0500B50580FFCA328007923A7F008057F2 +S219100E06803A26371500BFFFF6FF015280077E3A80576E3A07CB +S219100E1B30D832B83280FF4E29015280076A3A80575A3A5C1A34 +S219100E300336130080FFA02903571300CA56FF00441A80074E45 +S219100E453A80573E3A20568101EA39DA0D40361000403E1000E4 +S219100E5A26365252273E565280FFAA300052B5052056EAFF801D +S219100E6F07223A8057AA3940EEFC003D570D0CE051CA0D01520A +S219100E847D570D0C4056FC006A37852380FFE2077D070D0C80F7 +S219100E99079439805758394056FC002AEEF40B4056FC002A5638 +S219100EAEF00BEAE9B10D0AE03D57010080FF040044FA6A005C88 +S219100EC3EAFCE989FD800740398057B8390650074040361000C5 +S219100ED8263669520A3880FF2E3000528007AC39C2324056FC76 +S219100EED002A56240ACA3126370100E031F205065700008A568F +S219100F024000465700007F00C2324056FC002A56240ACA312614 +S219100F17370100E031F20506570000CA56BF00465700007F0018 +S219100F2CC2324056FC002A56240ACA3126370100E031F2050600 +S219100F41570000CA567F00465700007F00206E47004056FC000D +S219100F562A66440A205E1E002C570100E051B2054A6F0000448E +S219100F6B625F5A8AFD7F0080571239BFFFD8FF80FF0800800776 +S219100F80123980579A3880FFD02820EE20001D3080FF0E001DB7 +S219100F953080FF0800800792384056FC002A569C0ACA31205601 +S219100FAA1027065F00005F52405F14F0BAFD2056307540071400 +S219100FBFF05F52DAFD7F00C6360F00405610002A56C152CA31D2 +S219100FD40637000006507F008057A8384066FC002C57650BE0B5 +S219100FE951D7051F5A6C5F650BB50580FF1E1B80079838C63638 +S219100FFEFF0006569FFF6552CB050656A9FF7F000656D0FF6932 +S21910101352930D0656BFFF6552CB050656C9FF7F001F527F008D +S219101028031ECCFF63FF31004307200063371900BFFFA4FFCAD7 +S21910103D36FF00033E100080FF10006152FAF5031E200080070A +S21910105240388057783707E81D5710000AD8E0D9FA0D205624C7 +S21910106700EA31AA3D01521E081DF09053070501051F52035519 +S21910107C01F0853561DAAA2520562300EA31AA0D3D5709003D50 +S2191010915F0D00CB514A0700000252F51D3D670D0020560008C7 +S2191010A6EA61A25D1E081DF00055045DC6510155CC594B3700D9 +S2191010BB000C560100075501F0D50D62DADA0DC636FF00BFFF9D +S2191010D02EFFC4527D57050003525D5710000052954563DACA8E +S2191010E53DC636FF00BFFF12FF3D5F05000A593D5701007D5F65 +S2191010FA0500CA56FF00EB51E20520362D0080FFE019852D20B8 +S21910110F362B0080FFD6193D370900065F020020563A00EA5910 +S219101124AA1D063700003DE70D0080FFBA193D3709000637015F +S2191011390080FFAE191B58FC59BB0D3D570900CB510A6700008C +S21910114E415A4A67FDFFFC59F3F50152C5055D0710001F528070 +S219101163077E368057063606D0405610002ACEC1522036240093 +S21910117880FF701900DA1A37000000E2C6EEFF00F20D1D3080B9 +S21910118DFF5C19DBE941E21A50DC510A570000DDDEFF00CAEE73 +S2191011A2FF00BAF52036230080FF3E191B308432D931063700DE +S2191011B70080FF3019DB360F00D9310637000080FF2219BFFF67 +S2191011CC12FECA567F00205E2B00EB51EACD8007AA3580578EE3 +S2191011E1355C1A4056FC006A07690B4066FC002C5FA11D0AD8F5 +S2191011F60CC8E059E77540E6FC000CD04056FC002A57AD1DE0AB +S21910120B5192252C57A11D6352A30D3C57A51D405EFC00CA56FC +S2191012200300DA0504EAC50D405EFC003957A11D01EAFD51D30E +S21910123505CBC7A41DAA0502EA033610002B3FA51D1D4080FF4B +S21910124AB620850D3C57A51D0A57000001EA435710003B5769CC +S21910125F0BE051AA45006AFD69AE35038610004076FC004056A6 +S21910127410002A7EC1521B880D50D0510A5700002E5FA91DCAE6 +S21910128966FF000C508452CF510A5700004B570000415A31575E +S21910129E690B6E5FA91DE0518A25CC560F00CF510A5700004B42 +S2191012B35700003B67690B0B5601006E57A91DE0619A15416A1C +S2191012C8FD6996DD3A5FA11D3C57A51D1A60BD597A5FA11DDD73 +S2191012DD517C57A51DE059FF8D441A80079C3480570835405ED5 +S2191012F2FC006B3FA91D4056FC006A37A51D4056FC006A47A18D +S2191013071D4056FC006A4FAD1D0BE0E049921540EEFC007D0721 +S21910131C690B3D57690BBFFFBCFE3D57690B3D57690BE051D2A0 +S219101331050052950DBFFFA8FE3C57A91D4A0700003C57A91D32 +S2191013468007C2348057F2345C1A00D24056FC006A07690B4004 +S21910135B66FC002C5FA11D0AA00C10E059BF0580070A01405ECA +S219101370FC002B57A51D0A5700000BC0E051B27D40AEFC00405D +S219101385CEFC000CB814B03557AD1DE051E2152C57A11D635278 +S21910139A830D3957A91DCA560300BA0504E2C50D2257A11D0171 +S2191013AFE2FC51F305D9C7A81DCA0502E2A50501E200EAFCE979 +S2191013C49E3540DEFC003B57A51D0A37000041527B57A51DC690 +S2191013D936FF00BFFF20FC365F690BC452CAD6FF00E059CA45D5 +S2191013EE3857A51D0A37000041527857A51DC636FF00BFFFFC6A +S219101403FB345F690B1A51CAD6FF00E059AA351D500358CA59B0 +S2191014180B5614004AD7FCFF41EAFCE9B6D53557AD1DE0519265 +S21910142D0D03361000393FA91D1C4080FFE81ED5053957A91DF0 +S2191014424AD700003657690BE051CA15375FA11D3957A91D178D +S21910145760BC59775FA11DDC517957A91DE059F7053857A51D19 +S21910146C0A570000E051DA8D441A8007EA3380577A334056FC45 +S219101481006A37A51D405EFC006B3FA91D4056FC006A47A11DD3 +S2191014964056FC006A4FAD1D0BE0E049921540EEFC007D076945 +S2191014AB0B3D57690BBFFF9AFE3D57690B3D57690BE051D20596 +S2191014C00052D505BFFF86FE3C57A91D80073C338057B4338007 +S2191014D5FFEC1A405EFC0001526B574D0B8007AE338057E6328A +S2191014EA00DA07E07C07010006E8D50D3C5F010041DAC45A0AE4 +S2191014FF593D5701007C5F010041527D5701003D3701000637DF +S2191015140000E031F205C636FF00BFFFDEFAE0519EED1B50806D +S21910152907B8320052E0399A0D205630004657000046570100B4 +S21910153E02527F00085E0700E059BE05085E0E000B40A342A201 +S2191015532D2096FF00408E1000086EFFFF0D58C35A0760EB67FF +S21910156880000D80BA0561428A1D52610C58067841323176C1D3 +S21910157D52A45ACB6E0F00CE69CC5E0F00CE5942520D6700000D +S2191015920B5F00004F670000465F000041321040E041CADD7F60 +S2191015A7008057743200524046FC0028477D230638E041B72D77 +S2191015BC40EEFC003D5F710BE059E205013280FF040044FA6B44 +S2191015D1006152EA05405EFC004B576C0B951D3D5F710BE05998 +S2191015E6B2057F52BA154056FC002A577123E051D20D0132801A +S2191015FBFF040044FA6A00E051E205405EFC0001524B576D0BFC +S21910161080071C328057083240EEFC001D576C0BE051B215407D +S21910162556FC002A5F710BE059D20D00324056FC002A477D2357 +S21910163A003A80FF040044FA6B005D076C0B40EEFC001D576D3A +S21910164F0BE051E20D4056FC002A577123E051820D003280FF2E +S219101664040044FA6A005D076D0B8007BE3180575A31405EFC62 +S219101679002B57610BE051F2052B57610B80FF040044FA6A0018 +S21910168E405EFC002B578123E051D2056B07812302E2F50580F6 +S2191016A3FF962A0A3080FF622A0AE080FFEE2CE051B20580FF2F +S2191016B8042D80FFE02CBFFF56FF80FF962C033280FF5C1B03CA +S2191016CD3280FF2C1B40DEFC00E0E1C20D40EEFC003D57510B37 +S2191016E21C3080FF040044FA6A00E0518AFD80FFA82C3B575D6D +S2191016F70BE051F2053B575D0B80FF040044FA6A008007D830E2 +S21910170C80576030031EDCFF06E800DA40CEFC0003D61000395C +S21910172157752301E2E051920D1B301A3880FF040044FA6A0034 +S2191017360AE0E5051B3080FF881363571100E0E1B20D1A301D9E +S21910174B380442004ABFFF9CFB0AE81B6601008515205678005B +S2191017601D30075A063E08001B6601004657000041325F5A7F9B +S2191017755ABAFD07E80CD820564100EAD9F7CD031E240080075C +S21910178AFC2F80571030541A0656010063571900005A20E642B3 +S21910179F0007D00637000020565000EA31DA2D03361800033E92 +S2191017B41400BFFF30FDE0519215235719000A5F000020663D75 +S2191017C900415263571900EC59EA05235F15000BE60100D515E9 +S2191017DE405E10000B57D2521A382B5ED252E051923D0B57004C +S2191017F30047570000415A0B570000413AE051FAF5E52D0BE891 +S21910180840DE1000FCE98E1D6307110023371900033E100004B5 +S21910181D42004ABFFF5AFC233F11001D3080FFAC122357190071 +S21910183241EA485263571900FCE9A6ED1A381B57D6523B5ED621 +S21910184752E051B20D0B57000047570000415A0B570000413ABD +S21910185CE051FAF5470700004C1A80074E2F8057322F031E40F1 +S219101871FF00D2403EFC004707A01506E01C570000205E3400F4 +S21910188607D80A56C1FFEB51B30580077E07C152405E10002B4D +S21910189B66AA18CC512A5F00000C50CB516A006A006407040199 +S2191018B06206060564076407640746023A06640764076407642D +S2191018C5070E03640764074602EC00640706054E066407640737 +S2191018DA64070C036407640764076407640764076407640764AE +S2191018EF0708070605B00064076407F8006407640764071806D1 +S21910190464075402640764076407E0003206060580FF24280ABF +S2191019193080FFF027205E53005B5FA0150A58A45ACB5E0F0006 +S21910192E406610002C66C152CC59CA560F00CC513B66A0154C21 +S2191019430703000B5F00000A5700004C5F01004C5702008007CD +S219101958C606405EFC000B571C0B3B66A0152B5E1C0BE051BA85 +S21910196D05800784060B5700004C570000415A0B570000416295 +S219101982E051FAF580076C061C36010080FFD40880078A061C41 +S21910199736010080FF160A80077E063B36A015BFFF66FD800777 +S2191019AC72061C570100E051BA1D80FF2C07405E10000B57D685 +S2191019C1523B66A0152B5ED652E051BA05800724060B570000A0 +S2191019D64C570000415A0B5700004162E051FAF580070C061CCF +S2191019EB36010063374D0003EE4C0003D6480020E62C001D30D7 +S219101A001A38BFFFE4FAE051E23D23574D000A5F000041526358 +S219101A15574D00FC59DA351D30033E4400BFFFC4FAE051E22D11 +S219101A2A23574D000A5F0000415263574D00FC59DA25233F49C9 +S219101A3F00E039F2152337450080FFD0060A38E039820D233725 +S219101A544D0023474900004ABFFF1EFA23574900235F4D00CAEC +S219101A6951CA59635F4D0023574D000A5F0000FC59DA054152D9 +S219101A7E63574D00E5BD23574D000A570000E0519A1D405E10D7 +S219101A93000B57D6523B66A0152B5ED652E051BA0580074E05CE +S219101AA80B5700004C570000415A0B5700004162E051FAF580CF +S219101ABD073605405E10000B57D9523B66A0152B5ED952E05147 +S219101AD2BA0580071E050B5700004C570000415A0B570000413E +S219101AE762E051FAF5800706051C303B3EA015BFFF96FC800770 +S219101AFC22051C3601006337410003EE40001D30033E3C00BFB1 +S219101B11FFD6F9E051823D235741000A5F000020662C00415283 +S219101B2663574100EC59DA2D1D30033E3800BFFFB2F9E051E20C +S219101B3B2523373D003BEEA0151D3823473900014ABFFFA0F74E +S219101B50E051B2058007C804405E10000B57DD521D382B5EDD36 +S219101B6552E051B20D0B57000047570000415A0B570000413A9C +S219101B7AE051FAF54707000080079A04405E10000B57D9523B38 +S219101B8F66A0152B5ED952E051BA05800758040B5700004C5785 +S219101BA40000415A0B5700004162E051FAF58007400401D21C9D +S219101BB93601006337350003EE34001D30033E3000BFFF1CF946 +S219101BCEE051BA058007AE01235735000A5F000020662C0041BC +S219101BE35263573500EC59B205800794011D30033E2C00BFFF07 +S219101BF8F0F8E051BA05800782012337350006570000205E3A3D +S219101C0D00413263373500EB51B20580076801E0D1827D23575E +S219101C222D00E051C24523572D0000EAEAE9F925207E7D002076 +S219101C37762000206E7F0003665000235F35000B5700004C576B +S219101C4C0000D852B852415A635F3500EF51AA0D0B5700000E41 +S219101C61514C5700000B56010063573500416241EAEDE9DB0590 +S219101C7623572D00EAE9B1E503365000233F31001D4080FF98A4 +S219101C8B16FD51CA0D1E0803F0165D1855BD59175DDD511955D5 +S219101CA001F0E059AAC523572D00E0519A1D405E10000B57D60C +S219101CB5523B66A0152B5ED652E051BA05800730030B570000A0 +S219101CCA4C570000415A0B5700004162E051FAF58007180340AB +S219101CDF5E10000B57DD523B66A0152B5EDD52E051BA05800757 +S219101CF400030B5700004C570000415A0B5700004162E051FAF3 +S219101D09F58007E802233F310023472D00014ABFFF62F7E0518D +S219101D1E921D405E10000B57D6523B66A0152B5ED652E051BAC2 +S219101D33058007BE020B5700004C570000415A0B570000416295 +S219101D48E051FAF58007A602405E10000B57DD523B66A0152B62 +S219101D5D5EDD52E051BA0580078E020B5700004C570000415A28 +S219101D720B5700004162E051FAF580077602405E10000B57E132 +S219101D87523B66A0152B5EE152E051BA0580075E020B57000095 +S219101D9C4C570000415A0B5700004162E051FAF5800746021CCF +S219101DB1560100635729001C570000630725000A5820564300B1 +S219101DC6EA59F2052056530003362800EA59DA1503EE28001D27 +S219101DDB30033E2400BFFF06F7235F29001D300B6700002056AE +S219101DF03B00EA61DA050B56010063572900033E2000BFFFE41C +S219101E05F6E051D2052337210080FF3823033280FF1014033253 +S219101E1A80FFE01323372500E031C21D405EFC002B57590BE05D +S219101E2F51B20D2B57590B80FF040044FA6A00E051BA0563070E +S219101E44250023572500E051820D09326337250080FF440280B1 +S219101E5907CC0180FFC00DE051A20D205663005C570000405E35 +S219101E6EFC0001526B57810B1C37000020567300EA31D205205F +S219101E83565300EA31FA0D0032BFFF1CF7405EFC004056FC003B +S219101E982A5688236B577D0B80FF4A24C5050132BFFF00F70309 +S219101EAD3280FF7613033280FF461380FF820C1F528007680156 +S219101EC280FF780C4056FC002A57550B80FF040044FA6A000154 +S219101ED75280074E0180FFD21180073C011C3601003B3EA01512 +S219101EEC20462C0180FF8208800728011C3601003B3EA01520DF +S219101F01462C0180FF3408800714011C36010063371D000336A9 +S219101F161C00033E1800BFFFCAF5E051B23523571D000A5F0097 +S219101F2B0020662C00415263571D00EC598A2D0A5F0000415278 +S219101F4063571D0020564300EA59EA052337190080FFF614D5E4 +S219101F55052337190080FFE814405E10000B57D6523B66A015E1 +S219101F6A2B5ED652E05192450B5700004C570000415A0B570092 +S219101F7F004162E051FAF5E535405E10000B57D9523B66A015CA +S219101F942B5ED952E051C22D0B5700004C570000415A0B57004D +S219101FA9004162E051FAF595251C360100633715000336140042 +S219101FBE033E1000BFFF24F5E0518A1D405E10000B57E5523B77 +S219101FD366A0152B5EE552E051B20D0B5700004C570000415A79 +S219101FE80B5700004162E051FAF54C070000B5154036100026E1 +S219101FFD36D652BFFF66F12337110080FF580B850D1C303B3EA3 +S219102012A01520462C0180FF2C133B36A015BFFF46F10052032E +S2191020271EC00080078A278057EE27403EFC0027EEA0151D38F4 +S21910203C80FF96101D30BFFF24F18007E6278057D2274056FC3F +S219102051002A57650BE051BE05BFFFD4FF4036FC0026EEA00DBC +S2191020661D30BFFFC0EF1D30BFFFFCF7E05192FD2A509F5280ED +S21910207B07B2277F0080570428BFFF4CF480FF7A0F20362B0052 +S21910209080FF580A8007FC278057EC274066FC00205658004CF5 +S2191020A557A0150650A452CA560F00405E10002B5EC152CB5124 +S2191020BAC6360F00CB312C5EA0154B0703000A570000063700C3 +S2191020CF004B5701004B3702000B30BFFF8CF08007B227405E4D +S2191020E4FC001F526B57051E4056FC006A07011E4056FC006A62 +S2191020F907B11D405EFC004056FC002A56081E6B57891E405E0F +S21910210EFC0001526B57750B7F008057DC2607E84056FC002A13 +S21910212357750B06E0E051BA05BFFFB6FF20561200EAE18F157B +S2191021384066FC002C57891E405EFC002B5E081E0C68AB51DD1B +S21910214D51205E8000EB51B3050052952D4076FC002E57051EB7 +S219102162EAE1E21D405EFC002B57011E4066FC00EAE1B60D1C02 +S2191021775601006B57011EC2522C5EB01DCB516A0701001C50A1 +S21910218CC2522C5EB01DCB512D5F891E6EE7051E6A5F01002D00 +S2191021A157891ECAE96DEF891E80075E268057BE255C1A06D847 +S2191021B607E008E8405EFC002B57790B408EFC00E051EA25017D +S2191021CB526B57790B005240860080405EC1042B7EB71D405E3C +S2191021E0FC002B9E8C1E2096FF000A58D85A086A0A60C2620A13 +S2191021F57601000B50C1525059A2052F510A585F6A9AFDD36115 +S21910220A6C5701000E50F251C3ED7107690B11C84056FC002A14 +S21910221FD68C1EF50D1D58C85A0357130098EACA56FF002AE95B +S219102234C2EADAE93DEF010041DA2BE95FE27FE2B20D03361308 +S219102249001B38014280FFB0103957690BE051E2E51D50441ACF +S21910225E8007262580576A25581A63372900403EFC004707A081 +S219102273150657000027E6A01507E80A6020564300EA618A65C1 +S219102288065F01004F52EA59BA5D065702000AD8ECD9EA550680 +S21910229D5F030020563A00EA598A554432633729000336280049 +S2191022B2033E1400BFFF30F2E051F275235729000A5F00002009 +S2191022C7662C00415263572900EC59CA6D03362800033E1000B7 +S2191022DCBFFF0AF2E051C26523371500233F11001F42BFFFC005 +S2191022F1FE405EFC002B5F690B0A38E059F215405E10000B579B +S219102306D9521C302B5ED952E051B20D0B570000465700004152 +S21910231B5A0B5700004132E051FAF54607000085451C360100DF +S21910233020462000BFFFF8F15DDFA0151C30CA3146070100B51B +S219102345352337290020664C0006570000065E0100EC51B20D26 +S21910235ADF055762EC51F215E51D20665000EC51A20D951D0BF7 +S21910236F303D3EA01520462C0180FF5005F5150B303D3EA01508 +S21910238420462C0180FF0A06F50D0B303D3EA0152046000880B2 +S219102399FF1803F5053D3EA01520462C0180FF960F481A800736 +S2191023AE34248057D424065F000020567000EA59AA0D403EFC1F +S2191023C300273EA01520462C0180FFA603950D403EFC00273E9A +S2191023D8A01520462C0180FF620F8007AE24065E0801EB319928 +S2191023ED0D2757010066570100443A4432EB3191FD7F002056E9 +S219102402450046570000413220563000465700004132205632FD +S2191024170046570000065601007F0020564F004657000041324D +S21910242C20564B0046570000065601007F008057922306D807DB +S219102441E800E2E0E9B20D1B37000041DABFFFAEEB0AE15FEA27 +S219102456B205C4E2F5F51C50800782238057922306E807E0021A +S21910246B3ABFFFCEFF7C5701001D56020080079023805778238D +S21910248006E807E0083ABFFFB4FF7C5701001D5608008007765E +S21910249523D832B83206569FFF6552FB050636A9FF67370100D2 +S2191024AA01527F000656BFFF6552CB050636C9FFE5F50656D08B +S2191024BFFF6952BB050A3085F500527F008057502306E81D3768 +S2191024D4000041EABFFFBEFF1D5080074E23C73EFF00075884EC +S2191024E95A405610002A66E952CC59C73E0F000B570000CC395E +S2191024FE073F0000465700004132463F0000065601007F00807D +S219102513578A225C1A06E800E207D003DE1000850D41EA235756 +S2191025281100C4E2CA560F000AE11D3700001B38BFFF5EFFE016 +S21910253D51BAF57AE701001D50441A80076C228057202206D83B +S2191025521BCE100007D0F9D9C9151BE01C370000BFFF9AEA0A45 +S219102567E842DA1C370100C4EA42E2BFFF8AEA0AE95AEF0000B2 +S21910257C41D2F9D9F1ED1B50800700228057942207E8983ABF51 +S219102591FF52FF1D38B03A0A30C73EFF00BFFF44FF1D38A83A1B +S2191025A60A30C73EFF00BFFF36FF0A30DD3EFF00BFFF2CFF801D +S2191025BB0772228057362207E000EA1C5700001C660100E05134 +S2191025D0F2050C5F000041EA4162E059BAFD2056C800EAE9A709 +S2191025E5050AE8DD3EFF00BFFFF6FE0A301D505FEAE051B7151C +S2191025FA205623001C5F000041E2E059B205EA59BA05205E2AE6 +S21910260F00465F000041321D585FEAE0599FF506508007E82118 +S2191026248057D02107E806E61000FC31B90D1D3F000041EAC798 +S2191026393EFF00BFFFA6FE0A30FC31F1F506508007C021035278 +S21910264E4607000041325F527F52BAFD0750B85246570000412A +S219102663320750B0524657000041320750A85246570000463F3F +S21910267801007F0000524432036AC852065F00000D605F6ACB03 +S21910268D5EFF000B514132E061EFF57F00075A075700005F5ADB +S2191026A246570000413A41327F5A8AFD7F0080574421031EE067 +S2191026B7FF07E803E610001C3080FF940DE051B21520565100E7 +S2191026CC5D57000041EA205643005D57000041EA1C30BFFF9EC5 +S2191026E1FF1D300A38BFFFA2FEC5051D30BFFF12FD0AE85D07A9 +S2191026F60000031E200080070C2180571C21031EC0FF06380390 +S21910270BEE30001D30BFFF3CFF1D30033E100080FFA80D0A580C +S2191027200052E059E20523571900E051EA570000031E40008037 +S21910273507F8208057BC205C1A06E807E0033E1000BFFFCCFD85 +S21910274AEAE9B20D23371100BFFFAEFFE051D2051C30BFFFC625 +S21910275FFCC5051C30BFFF9CFC4A070000441A80079A20805721 +S2191027748220031EDCFF07E0065700001F5A635F11004132207A +S2191027895E6700EB51823DDF055C5AEB518215D54D205E7000E9 +S21910279EEB519A4D033E1000BFFF26FD0A30033E1400BFFF9CD3 +S2191027B3FDB545065F000020562D00EA59BA0D065F01004452F7 +S2191027C8EA59EA054056FC006A077D23F50540EEFC003D3E7CF7 +S2191027DD23BFFF34FD4036FC0026377D23E031D205BFFF12FF9A +S2191027F2E051F21D1C30BFFF2AFCE51D40EEFC003D3E7823BF4C +S219102807FF0CFD3D3F792303361400BFFF3AFE3D3F79237F3A73 +S21910281CB205E039DA05025263571100950D015263571100D52F +S219102831051C30BFFFCCFB0AE023571100415263529B3DC152FF +S219102846405E10002B665A28CC512A5F00000C50CB516A0062BD +S21910285B0008001A005200405EFC004056FC002A5688236B57C6 +S2191028707D0BD5254036FC0026EE90241D30403EFC00273E88CE +S21910288523BFFF60FB03361400203E42001D4080FF660CE05181 +S21910289AD20D4056FC006AEF7D0B1C30BFFF7CFB850D1C30BFA4 +S2191028AFFF74FBC5051C30BFFF4AFB0AE05C070000031E2400E6 +S2191028C48007441F80572C1E581A07E800C2033E140008D8BFC8 +S2191028D9FFF4FB0A30033E1000BFFF80FB0A3040E6FC003CBECD +S2191028EE94221738BFFF5AFC1BCEE6FFDDC9205651005D5700B8 +S2191029030041EA20564D005D57000041EA1DB01630003ABFFFD2 +S219102918CCFB0AE81DD0205630005A5700001A3601001738BF39 +S21910292DFFF8FC0AE81CB8B50D41C21D301C38BFFFE8FC0AE8CD +S2191029421B301C38BFFF54FDF9E9991D23571100EAC1DE1523D9 +S21910295737150037DE94221B384046FC0028E69C221C4080FFC3 +S21910296C1C0B63071500E0519AE5205631005A5700001630D875 +S2191029813EFF00BFFF5EFB5D070000481A8007861D8057621E91 +S219102996031EBCFF07E81E0803F00F0511051305150501F003E3 +S2191029AB3E1000BFFFCEFA0A3003E634001C38BFFF92FB1C30EC +S2191029C003E614001C3880FFFC0AE051D25D205671005D57001C +S2191029D50041EA205670005D570000233F11001D360100BFFF8E +S2191029EAA0FB0A301C38BFFF34FC0AE8C3CF100092151D300222 +S2191029FF3ABFFF88FB0A30023ABFFFDAFA033F1C000A30C73E8E +S219102A14FF00BFFFCCFA0AE8C3D71000F20D23572100E051B2FC +S219102A290D1D30043ABFFF5AFB233F21000A30BFFF86FB0AE8EA +S219102A3EC3DF1000F20D23572500E051B20D1D30083ABFFF38A9 +S219102A53FB233F25000A30BFFF64FB0AE823571100203E100095 +S219102A684751A21523572900E051E20D1D30BFFF12FB233F298F +S219102A7D000A30BFFF3EFBC5051D30BFFF78F90AE85D07000062 +S219102A92031E44008007721D8057321D031EE0FF06D803EE109A +S219102AA7001D3007E00838BFFF9EFB1D301B381C4080FF7E0A37 +S219102ABC031E20008007201D4056FC002A577D0BC232C6512A1B +S219102AD15701007F004056FC002A577D0BC232C6516A3F0100B4 +S219102AE67F0080579C1D4056FC002A5600032A5719002A5F017E +S219102AFB00C63EFF002A570D000B3080FF040044FA6A00800733 +S219102B10821D8057721D4056FC002A5600032A5719002A370185 +S219102B25002A57110080FF040044FA6A00CA56FF0080075A1DAC +S219102B3A80574A1D4056FC002A5600032A5719002A3701002AF8 +S219102B4F571500083A80FF040044FA6A008007341D8057241D93 +S219102B644056FC002A5600032A57190006402A5F0100003A2A64 +S219102B795715000B3080FF040044FA6A0080070A1D8057421C7D +S219102B8E4056FC006A07810B06E040EEFC003D3709233DDE08BB +S219102BA323E031F20580FF30003D570923E0519A157DE70923FE +S219102BB83C57000003327B570400205685057C57000080FF5AA9 +S219102BCD06033280FF2A0680070C1C8057AC1C4056FC002A5793 +S219102BE2810B0668E051FA154056FC002A5F09232A660823EBA2 +S219102BF769FA0D6A0709232C57040003326D57000080FF1C0686 +S219102C0C033280FFEC050152A50500528007781C4056FC002AD3 +S219102C21570923E051EA5700007F008057581CE031C21D405E3C +S219102C36FC002B57850B5F526B57850BE051BF2D4056FC002A8A +S219102C4B5600032A5719006B07850B2A3701002A571500053A33 +S219102C6080FF040044FA6A00951D405EFC002B57850B41526BC3 +S219102C7557850B61528A154056FC002A5600032A5719002A37EC +S219102C8A01002A571500043A80FF040044FA6A008007F61B8008 +S219102C9F57E61B4056FC002A5600032A5719002A3701002A5721 +S219102CB4110080FF040044FA6A00CA56FF008007CE1B805776DE +S219102CC91B5C1AC73EFF006D3ABA0580079C014066FC002C5F95 +S219102CDE890B406EFC002D6EA42240A6FC000CB80B50CD514AC4 +S219102CF33F0000415A6C5F890B6A3AF20520566400EA59B2050F +S219102D08800768014056FC002A5600032ADF190020AE4F00BF9E +S219102D1DFF30D80A10405610002AB6FA523B3701003B570D0087 +S219102D32203E240080FF040044FA6A003B37010015C83B570DDB +S219102D4700153880FF040044FA6A003757890B00D2EAD18E3D70 +S219102D5C405610002AC6FA523456A422DA510A57000041D23B41 +S219102D713701000A588452CA560F00D851CB5E0F000A3F0000EF +S219102D86D859C7EEFF000B5700001D383B5F0D000AE080FF0473 +S219102D9B0044FA6B00DCE6FF001C38D9E93B370100DDCEFF0071 +S219102DB03B570D00D9E180FF040044FA6A003757890BDCCEFFAA +S219102DC500EAD1E6CD3B3701003B570D00203E230080FF040060 +S219102DDA44FA6A001938843A3B370100D639073F00003B570DB1 +S219102DEF00C73EFF0080FF040044FA6A00D93E0F003B370100F2 +S219102E04D639073F00003B570D00C73EFF0080FF040044FA6A81 +S219102E19003B3701003B57110080FF040044FA6A00CA56FF002F +S219102E2E43571300205E2B00EB51F21503361300013A80FF08D3 +S219102E430BE0519A0D035F130020562D00EA59CAE5BF07D6FEDE +S219102E584056FC002A5E000301526B5745007707890B0230BFD6 +S219102E6DFFF4D6441A8007EE198057561907E008E81D505FEAB3 +S219102E8206D8E051D20D1C3F00001B3041E2C73EFF00BFFF327B +S219102E97FE1D505FEAE051DAF5800740198057281907E008E88E +S219102EAC1D505FEA06D8E051B20D1B30BFFFE6FD5C5700004198 +S219102EC1E21D505FEAE051FAF5800716198057CE1900527F00EA +S219102ED68057AE190032BFFF50FD4056FC000A884086FC002AE7 +S219102EEB7688230E68407EFC002F578523206620002A5F01000E +S219102F005F626D5F0100446A4452E0618AFD2F5785232A5F85D1 +S219102F1500316688236E5F95002A6F8900405EFC006B677D0BD8 +S219102F2A6E6F91002A578100305F810B6E570101E059A20D70D3 +S219102F3F07810B20364000BFFF7EFB0A30BFFF8CFC20364000F2 +S219102F54BFFF70FB0A30BFFF7EFC405EFC006B57812380072A07 +S219102F691980571A19407EFC002F5F85234056FC002A7688234E +S219102F7E0E68206620002D5701005F626B570100445A446AE0D8 +S219102F93618AFD2F5785232E5F95006A5F85002E5F91006A5FA7 +S219102FA889002E5F010101326A5F8100BFFF78FC8007D81800C1 +S219102FBD527F00405EFC00405610002A56BC2F6B57590B405EAA +S219102FD2FC00405610002A56AE306B57550B405EFC0040561073 +S219102FE7002A56D62E6B57610B405EFC00405610002A566A2FB5 +S219102FFC6B575D0B7F008057CA17405EFC002B578D0BE051DA8B +S2191030114D01526B578D0B80FF4E1640DEFC003BE600033C57E7 +S21910302635001F3280FF040044FA6A001D323C5F35000AE8803E +S21910303BFF040044FA6B003C571500405E10002B5E762E1E0816 +S2191030500AF0035D405E10002B5EA42E055D405E10002B5EC694 +S2191030652C075D405E10002B5E9E2C095D405E10002B5ECE2E17 +S21910307A0B5D01F07EEAA20DE0E9820D3C5735001D3080FF04CC +S21910308F0044FA6A003B5600032A573100003280FF040044FA36 +S2191030A46A0080FFDE15800736178057D6174056FC002A56007C +S2191030B9032A574100E051D20580FF040044FA6A008007C61791 +S2191030CE85057F008057CA16541A6307110007E8205654005D19 +S2191030E357000006E0A432BFFFDCDE5D5701001C30BFFFD2DEC9 +S2191030F81E081DF0825320567400835320566800845320567249 +S21910310D008553205665008653205661008753205664008853A6 +S21910312220D63A0089D301F04AEA80FF6A040A58B85A1E080348 +S219103137F0985B0A58B05A995B0A58A85A9A5B9B5301F00336BA +S21910314C18001D380442004ABFFF98E10AE820DE3B005DDF00BE +S2191031610041EA0432BFFF60DE5D57000041EA20E640001C3076 +S219103176BFFF50DE5D57000041EA5DD7000041EA1C30BFFF3CBF +S21910318BF96357150003E614001C301D380442004ABFFF50E135 +S2191031A0033610000A380042004ABFFF42E10AE85DDF0000419E +S2191031B5EA0032BFFF0EDE5D57000041EA0232BFFF02DE5D57C5 +S2191031CA000041EA5DD7000041EA0232BFFFEEF8635715001C8E +S2191031DF301D380442004ABFFF06E10AE85DDF00005D07010079 +S2191031F44C1A8007BE1501526332AB15EA37C000405E10002B8F +S219103209661832CC31265F00000C30CB3166000A000A000800AF +S21910321E0A0000527F0001526332AB15EA37C000405E10002B49 +S219103233664232CC31265F00000C30CB3166000A000A0008005B +S2191032480A0000527F00406EFC0001526D57690B4066FC00406A +S21910325D5610002A56F8326C57910B405EFC002B5711230D700B +S2191032720C780B68E051E23D0B602C5711236352B315C756032C +S219103287008A15C6560300DA0D2657010067570100443A2B573B +S21910329C112344325C526B571123A5252C5711236152B315C7F7 +S2191032B15601008A15C6560100DA0D2657000067570000423A42 +S2191032C62D57112342325E526D571123C50D065700004757003D +S2191032DB0041322C571123413A5F526C5711230D582B57112361 +S2191032F0E051DAC56E07690B6F07910B7F008057F61408E04061 +S219103305EEFC007DE71123065007300A38BFFF3CFF3D5711238C +S21910331A9C518007EC148057D41408E040EEFC007DE71123BFED +S21910332FFF20FF3D5711239C518007D01400527F0000527F0094 +S21910334400527F0080578414405EFC002B571523E05182250BE8 +S219103359D8BFFFF2D13BEF15233D5F15007B5F15233DE719008F +S21910336E0A307D071900BFFFECD13D3701003D570D003D471138 +S219103383001C3880FF040044FA6A003B571523E051BAE5800780 +S2191033984A14405EFC002B57992541526B5799257F0080572248 +S2191033AD1440EEFC0040DEFC0001E23D5799256152BA05BFFF39 +S2191033C288FF7D0799253B571523E051D2057DE79925BF07E47A +S2191033D7FF80070814460700007F0001524657000001527F009C +S2191033EC460700007F0046070000663F05007F00805720140664 +S219103401E8BFFF98FF01525D5700001D5700006152FA05BFFF79 +S21910341634FF1D5700006152B2FDBFFF8AFF0152800706144602 +S21910342B0700007F00460700007F0080574E14BFFFF2DA8007DB +S219103440521401527F0001527F004056FC006A3719237F0080EA +S219103455573014403EFC004056FC002A57192367371D232A578A +S21910346A0100273E1C23E051BA050052E505023280FF0400446C +S21910347FFA6A0080070E148057FE134056FC006A371D232A5E33 +S2191034941C236B3F05004056FC002A5719236B4709002A570194 +S2191034A900E051BA050052F50503320B3880FF040044FA6A001A +S2191034BE8007D2138057C2134056FC006A371D232A5E1C234052 +S2191034D356FC002A5719236B3F05002A570100E051BA0500524D +S2191034E8F50504320B3880FF040044FA6A0080079A1380578A87 +S2191034FD134056FC006A371D232A5E1C236B3F05004056FC0017 +S2191035122A5719236B4709002A570100E051BA050052F5050554 +S219103527320B3880FF040044FA6A0080075E1380574E13405614 +S21910353CFC006A371D232A5E1C236B3F05004056FC002A5719E6 +S219103551236B4709002A570100E051BA050052F50507320B3838 +S21910356680FF040044FA6A0080072213065098520658905A20AC +S21910357B66FF004C59C85A0B510658885A4C59D05A0B514C31B6 +S219103590D83206517F00031ECCFF63FF310003361000BFFFB2F9 +S2191035A5FEE051820D23371500BFFFC4FFCA56FFFFA505005234 +S2191035BA031E20008007D21206505F32E051B70D065EFFFF09F4 +S2191035CF525F52E051EEFD06500B30E051FFF57F008057A412F1 +S2191035E4BFFF56CF00526A0080579812BFFFF0FF005280079A7D +S2191035F91200527F008057CE1106E8005201DA00627EEAC21553 +S21910360ECF057DEAC21DD51D7FEABA1D405EFC002B5F950B0B77 +S219103623DEFFFFE059DF150BD8E0D9AA151DDA8515405EFC00EE +S2191036382B5E00036B071900405EFC006BEF950BD50500EAD524 +S21910364D0541EA0162E061D235405EFC002BE600033C5F190016 +S219103662E059A20D2B3701002B571500043A80FF040044FA6AF3 +S21910367700405EFC006BEF950BC5EA405EFC002B5E2823CBE9C4 +S21910368C7CEF19003C5F1900E051B20D2B3701002B57150005ED +S2191036A13A80FF040044FA6A00A50D2B3701002B571500043AB0 +S2191036B680FF040044FA6A001B5080072011015200627E32C275 +S2191036CB15CF057D32C21DD51D7F32BA1D4056FC002A5F990B25 +S2191036E00B56FFFFE059DF150B50E051AA151D528515405EFC46 +S2191036F5002B5E00036B071500405EFC006B37990BD5050032AC +S21910370AD50541320162E0619215405EFC006B37990BC53240E6 +S21910371F5EFC002B5E2823CB31405EFC002B5E00036B37150079 +S2191037347F007F007F008057E21080FF280F4056FC002AEE00C5 +S219103749033D5731001F3280FF040044FA6A00E051820D3D57BE +S21910375E3500003280FF040044FA6A008007C2108057AE10D8E9 +S21910377332B832405EFC002B6600032C5715000BE8E051D20D47 +S2191037882A5F0100C63EFF002A570D000B3080FF040044FA6A96 +S21910379D00E50D2C5719002A5F0100C63EFF002A570D000B301E +S2191037B280FF040044FA6A003D5E00032B574500E051E2056BDA +S2191037C7074500003280FF960180075C10805748104056FC0090 +S2191037DC2A5E00032B57150006E8E051BA052B5719002A3701C6 +S2191037F1002A57110080FF040044FA6A005D57000080072A107C +S2191038067F00805714105C1A4056FC002A5600032A5F190006EB +S21910381B40630711002B57010007480A302B571900033E1000D0 +S21910383080FF040044FA6A00235F11000AE8E059F2054056FCFC +S219103845002A379D2580FF18011D50441A8007DA0F8057C60FB7 +S21910385A405610002A66FA354076FC002E560003205E40006A7E +S21910386F67010044525F5ACAFD0052405EFC002B7E2823405E33 +S21910388410002B6EFA350A660100C552CF51075A6A6F0100441B +S219103899525F5AE059BEFD0C506152B7F5205613006E570103F9 +S2191038AE2EEE00034056FC002A5600081E081DF003554056FC9A +S2191038C3002A5660020555405610002A56E03521554056100048 +S2191038D82A56EC350955405610002A56C2352555405610002A60 +S2191038ED56FE351955405610002A56C4361B55405610002A5604 +S21910390236371155405610002A5638370F5501F01E32BFFFEAE6 +S219103917FC1E32BFFFAAFD1E081DF0130515052705230501F02B +S21910392C4036FC0026363C03BFFF16FB405610002A568A2B7D3D +S219103941578D008007E80EE039A20D5F3A0650C7510A570000CB +S21910395663528AFD01527F0000527F008057220F065040361084 +S21910396B0026368C39E051B2052A3781004056FC002A56000332 +S2191039802A578D0080FF040044FA6A008007040F8057640E07FA +S219103995E04056FC002A5600032A571900063A2A5F010006E8C1 +S2191039AA2A5715000B3080FF040044FA6A00EAE98A0D1D301C24 +S2191039BF38BFFF48FE0A58E059AA0D1D301C38BFFFFED40A58BD +S2191039D40052E059A2050B5080072C0E80573C0E06E8D8EAB8F2 +S2191039E9EA6AEACA050D32BFFF7EFD1D30BFFF78FD8007320EE8 +S2191039FE80571E0E06E81D370000E031A20D41EAD832B832BFBC +S219103A13FFCEFF1D370000E0318AFD80070E0E8057620E5C1A71 +S219103A2863071100203E100020462B00004A80FFE400441A806F +S219103A3D07540E8057FC0D031EE0FF06D007D820BE20002357E9 +S219103A52710008A823A775000910E051B20520BE300040561035 +S219103A67002AB60B5300CA20661F0003C6100018580B50D951BA +S219103A7C4ABF000041CAECC9A7FD00CA1A501B518A25205630BE +S219103A91005857000001CAD51D15E000EA1A301B381C401D4862 +S219103AA680FF6E121860D9611658CA5941CA1A301B380B5700AA +S219103ABB001C401D484C57000080FFE80D0AD00BD81A501B5176 +S219103AD0DAE5F9A1A70514C820562D00EA11FA0D1850195EFF68 +S219103AE5FFCB510A570000F751AA050BC81850D9514A1700007E +S219103AFAA50D5FCA850D1830D931063700005FCABFFFD6FEE00B +S219103B0FC98EFD031E200080074A0D80576A0D581A0650005AA9 +S219103B2423672D00634F110008486367150007600A300B380CDE +S219103B3940BFFF06FF481A8007500D0152E031BA0500527F0025 +S219103B4E06680D5F0000E059922520860001207EE0FF20765E6B +S219103B63000B60D862B8620D58A659F059A70500526A62A20D53 +S219103B786D62820D0C58CF59CB5EFF00EE59A3050052416AE045 +S219103B8D51D2050D5F0000E059FAE57F0080575A0B581A06E04F +S219103BA207C8BFFFA0FFE051B20580074E034036100026361C0F +S219103BB753BFFF46FE1C30BFFF64FE4036100026363153BFFFFF +S219103BCC34FE19E81DE61C0020362000BFFF08FE3D370100BF0F +S219103BE1FF42FE44EAFCE9E7F54036100026363453BFFF0CFE5B +S219103BF68007100306E8D8EAB8EA20562500EAE9E2051D30BF58 +S219103C0BFFD6FD8007EA0200D2204E2B0041E21C370000006AFF +S219103C202056300006E8EAE9E2B700001D56D0FF6952BB15208D +S219103C355ED0FF1A50C352DA51CAD1DDD141E21C370000CBD133 +S219103C4A06E81D50CB51CA56FF00695293F520566C00EAE9CAF8 +S219103C5F0D41E21C37000006E8EAE9EA0541E21C370000016A27 +S219103C7406E8205E53001D56DBFFEB51B30580076802C15240E2 +S219103C895E10002B669C3CCC512A5F00000C50CB516A0044026C +S219103C9E4E024E024E024E024E024E024E024E024E024E024E8E +S219103CB3024E024E024E024E024E024E024E024E024E024E02C5 +S219103CC84E024E024E024E024E024E024E021A023C01A8004E53 +S219103CDD024E024E024E024E024E024E024E024E024E024E029B +S219103CF24E024E024E024A014E024E024E024E02FA004E024E95 +S219103D07024E024E024E024E024E024E024E021A023C01A8005F +S219103D1C4E024E024E024E024E024E024E024E024E024E024E0F +S219103D31024E024E024E024A014E024E024E024E02FA00E069A8 +S219103D46F21539370100393F050048CAE039FE0580FF3E090A60 +S219103D5B300B38204E2D0063B7110063D715000A42BFFFD4FCDC +S219103D70800788013937010044CAE031CE058031204E2D006307 +S219103D85D711000A3A09401648BFFF8CFD80076601E069A2150C +S219103D9A63B7110063D715002046100039370100393F05002001 +S219103DAF4E2B0048CABFFF8CFC8007400163D71100203E100098 +S219103DC420462B0039370100164844CABFFF4AFD80072401199D +S219103DD937000044CABFFF02FC8007160139EF010000DA00C25C +S219103DEE00BA44CAE0E9EA054036100026EE3753A51D1D30BF39 +S219103E03FF42FDE051DA154036100026363E53BFFFECFB1D30D2 +S219103E18BFFF0AFC4036100026EE505320561900EAD1B7051A5F +S219103E2DD6E7FF00B21D57000041E2E051820D41DA1D50DB51F2 +S219103E420A570000E051AAFDE0D1C205FAD9A7051AD8E0B1C2E1 +S219103E57051AC0BBC1B5051AB8BBB918505FC217D6FFFFE05141 +S219103E6C970D20362000BFFF6EFB18505FC2E0519FFD1D370041 +S219103E8100850D41EAD832B832BFFF56FB1D370000E031C2052B +S219103E965FDA7FDADAF517501AB8E051C72D20362000BFFF38D7 +S219103EABFB17505FBAE0519FFDB52539E70100E0D1BA0520D644 +S219103EC020001AEEFFFF1C50FD57A000CA56010020362E00A20B +S219103ED5054332BFFF08FB5FEAC5F520362500BFFFFCFA850DC4 +S219103EEA20362500BFFFF2FA1D30BFFFECFA41E21C370000E042 +S219103EFF31B205BF07F8FC481A80070C0880579009031ECCFF9E +S219103F141E0803F019FD035640001C652A5FFDFF096544522A87 +S219103F2967FDFF0B5D44522A5FFDFF0D6544522A67FDFF0F5D87 +S219103F3E44522A5FFDFF1165135D44522A5FFDFF2A57010003B8 +S219103F533E1000155D175501F0BFFF3EFC031E200080072C0932 +S219103F6880571C0920567427EA39DA05E031B205BFFFC2F78061 +S219103F7D071409805704090132203E7427BFFFDEFF80070209B9 +S219103F9280573A08405EFC002B579D0B0BD8E051FA254036FC83 +S219103FA70026EEB00B4056FC002A56F00BEAE9A21D0AE03D5704 +S219103FBC0D001D3080FF040044FA6A00E051E2053D5719008A07 +S219103FD1560100D5053D5719001E5A4B517D5719001DEE2000BC +S219103FE6FCE99AED01527B579D0B8007F0078057900826570905 +S219103FFB002A570100E051CA05205636FF9515E041F20528572E +S2191040100100E051BA050052950D265709002A57010080FF0416 +S2191040250044FA6A008007660880575608265709002A57050093 +S21910403AE051CA05205636FF9515E041F20528570100E051BA84 +S21910404F050052950D265709002A57050080FF040044FA6A0017 +S21910406480072C0880571C08265709002A571100E051CA052044 +S2191040795636FFD50580FF040044FA6A0080070A088057FA071C +S21910408E265709002A571500E051CA05205636FF9515E049F27C +S2191040A30529570100E051BA050052950D265709002A5715006D +S2191040B880FF040044FA6A008007D0078057C007265709002A07 +S2191040CD571900E051CA05205636FF9515E049F2052957010063 +S2191040E2E051BA050052950D265709002A57190080FF040044E9 +S2191040F7FA6A0080079607205636FF7F00205636FF7F00613230 +S21910410CA2156232AA154056FC002A5785232A5F81002B670028 +S219104121000552205E8505EB61E20500527F0002527F000552E7 +S2191041367F004056FC002A5785232A578D007F0080573E070676 +S21910414B3820364000BFFF86E980073C0780579C0606E03C37B3 +S21910416000001C50C6EEFFFFDD5E8007875A6F5AB305800774F8 +S219104175010B50C152405E10002B668E41CC512A5F00000C50A1 +S21910418ACB516A0020001C011C011C011C011C012E012E012E48 +S21910419F012E012E0138002E012E012E0122011D50205E600064 +S2191041B44B51EB519A7DDD361F00BFFF06E980072401203625EC +S2191041C900BFFFFAE8DD8E00F8888ADD5E7000845A0B890A5838 +S2191041DEA15ACB5E01000A68A26ACD6E01000A60A362CC660136 +S2191041F3000072DD860080DD360F00CA7E0100E081C205208614 +S21910420800FF10896F329B4DC132407610002E862642D031266F +S21910421D7700001030CE31660020002E0028002C003E007E00FD +S21910423236003A00460056004E00540074005E006800700061A9 +S2191042476AE2770000A52D0F70852D0F616162E2770000B52521 +S21910425C2D59B5052D590F59615AE2770000B51DE069E2770082 +S21910427100F515AF760100C5150F61E061E2770000F50D0A7093 +S219104286A472CE760100A50DED59E2770000E5052D590F59E0AA +S21910429B59E2770000E071C2051150D151E51D1C560200C51D54 +S2191042B0DD566000205E3F00EB51C3051C560400B5151D504B98 +S2191042C5513C5F0200D052DD362000CB5EFFFF0B51E031C20531 +S2191042DA405EC0FF0B511E825051DC51800722058057320503D4 +S2191042EF1EE0FF20364000BFFFCEE7205EE007635F1000205EEA +S2191043048007635F120003EE10000A30BFFF48FE405EFC006BF0 +S21910431957A10B4066FC00025A6C5F6D23406EFC002A5F0000EB +S21910432E3D670000031E20006D5F68236A67000042522A670033 +S219104343003D5F02002D6E68236D6702006A5F00008007D8048A +S219104358407EFC002F776D230F80E071921D4056FC002A67A1F8 +S21910436D0B005A4056FC002A6E6823EE59CE0D2D570000415ACB +S2191043826C570000426A2F576D234262EA59E6F570076D237F44 +S219104397007F007F008057E80420364000BFFF20E7405E100032 +S2191043AC2B5ECE30EB51E25700008007DA048057620420EE40FB +S2191043C1001D30BFFF00E70A30BFFF8EFD1D300A38BFFF04E725 +S2191043D680075604205EDD0001622056C800405700F3405F04B3 +S2191043EBF340670EF320564700405726F1400724F1405728F196 +S2191044007F00405602002A5EFFFFC73EFF00403F06F320668073 +S21910441500005728F14C51CA56FF00BA055F5A9AFD005728F1D2 +S21910442ACA567F00405728F17F00005726F1E051B60500527F6F +S21910443F00005708F347570000005F26F10152CB5E7F00405F53 +S21910445426F17F0080579C035C1A06E003EE13001C301D38BF72 +S219104469FFCCFFE051B2FD03571300CA56FF00441A80078E037D +S21910447E80574E0307E008E81D505FEA06D8E051D20D1C3F0016 +S219104493001B3041E2C73EFF00BFFF66FF1D505FEAE051DAF5B4 +S2191044A8800738038057200307E008E81D505FEA06D8E051B2E0 +S2191044BD0D1B30BFFF98FF5C57000041E21D505FEAE051FAF57C +S2191044D280070E038057C6024056FC002A57A50B06D007D80A07 +S2191044E7E8C3EACAE9CAE94056FC002AE60003950D3C5749008D +S2191044FC2036640080FF040044FA6A001A301B38BFFF28FFE04F +S21910451151CA055FEA7FEA8AF580079A0280577E038057FA02E1 +S21910452600EA5C3A633A8B35C13A405610002A5E4445CB3927B1 +S21910453B5700000B38CA3967001C0008003200380020361B0053 +S219104550BFFFBAC9405EFC0001526B57A90BF5154056FC002AD7 +S219104565EFA90B20361B006A07A90BBFFF78C9C50D20EE1B00F9 +S21910457A950D405EFC00235721002BEFA50B6B57A50B1D508017 +S21910458F079E0280578A025C1A005708F30336130007E8013ABA +S2191045A4435713007D070100BFFF9CF3E051C20501527D57014E +S2191045B90020361B00BFFF78EE0152441A8007660280572A02A0 +S2191045CE4056FC002AEE00033D5735001F3280FF040044FA6AD1 +S2191045E30020361B000AE0BFFFFEC80032BFFFEAFD3D5735002F +S2191045F8003280FF040044FA6A003D571500405E10002B5E7EDE +S21910460D441E080AF00105035D405E10002B5EAC44055D405E92 +S21910462210002B5E0244075D405E10002B5E5844095D405E1044 +S219104637002B5E1E450B5D405E10002B5E92450D5D405E1000DF +S21910464C2B5ED6440F5D01F03D5735001C3080FF040044FA6A04 +S219104661008007A60180571E02405EFC002B57AD0BE051EA0516 +S21910467601526B57AD0BBFFF4EFF800710020752405782F32024 +S21910468B569000405784F37F00066080610C5007308031E061C6 +S2191046A0EA6700000658AC597F0000001E08031EC4FF03F009B7 +S2191046B5ED0BE50DDD0FD511CD13C515BD17B519AD1BA51DFD3C +S2191046CA01F06A0000001E0803F008ED0AE50CDD0ED510CD12B3 +S2191046DFC514BD16B518AD1AA51CFD031E3C0001F07F000000E6 +S2191046F41E08031ECCFF03F009ED0BE50DDD0FD511CD13C51518 +S219104709BD17B519FD01F06A0000001E0803F008ED0AE50CDDA6 +S21910471E0ED510CD12C514BD16B518FD031E340001F07F000064 +S219104733001E08031ED0FF03F009ED0BE50DDD0FD511CD13C5E9 +S21910474815BD17FD01F06A001E0803F008ED0AE50CDD0ED5102D +S21910475DCD12C514BD16FD031E300001F07F001E08031ED8FFCB +S21910477203F009ED0BE50DDD0FD511CD13FD01F06A001E080304 +S219104787F008ED0AE50CDD0ED510CD12FD031E280001F07F00C3 +S21910479C1E08031EDCFF03F009ED0BE50DDD0FD511FD01F06AC1 +S2191047B10000001E0803F008ED0AE50CDD0ED510FD031E2400C3 +S2191047C601F07F0000001E08031EE0FF03F009ED0BE50DDD0F61 +S2191047DBFD01F06A001E0803F008ED0AE50CDD0EFD031E20002A +S2191047F001F07F00031EE4FF63EF110063E7150063FF19006A84 +S21910480500000023EF110023E7150023FF1900031E1C007F0050 +S21910481A0000031EE8FF63EF110063FF15006A00000023EF1105 +S21910482F0023FF1500031E18007F0000001E08031EC0FF03F077 +S21910484409ED0BE50DDD0FD511CD13C515BD17B519AD1BA51D9F +S219104859151FFD01F06A001E0803F008ED0AE50CDD0ED510CD03 +S21910486E12C514BD16B518AD1AA51C151EFD031E400001F07F0C +S21910488300031EECFF63FF11006A00000023FF1100031E1400BA +S2191048987F0000001E0803F00135033D0545074D01F06A00BF30 +S2191048AD5700FE581A08C009E006A807B8E0E1B2058007860275 +S2191048C2F7C1F375405601002A5EFFFF0AA0EBC18B0D2056FF2C +S2191048D700EAC1EB570000C352A50D405600012A5EFFFF205670 +S2191048EC1800EBC1AB055852EA478000405E10002B5E6C53CB12 +S2191049014108470000206620000C58C846FF00CA41A859C20D0A +S219104916EBC7C000EBBFC000AB611550EC5780000AB9EBAFC04A +S21910492B0018D890DA34CEFFFF58C917301B3880FF7E080AE856 +S21910494017301B3880FF9A030AD01A30193880FF9408D0EA1538 +S21910495558905A0BE9EAE9990D5FD2D8E9F8E9D105EAE9B9054F +S21910496A5FD2D8E9AAE91D301B3880FF44080AE01D301B388029 +S21910497FFF60030AE81D30193880FF5A08D0E2345EFFFF4BA905 +S21910499415E1EAE1890D5FEAD8E1F8E1C105EAE1A9055FEA1A25 +S2191049A9C8D0CA1DC980071803E041EA050132003A80FF2403D7 +S2191049BE0AC0405601002A5EFFFF0AA0EBC18B0D2056FF00EA9B +S2191049D3C1EB670000C362A50D405600012A56FFFF206618001D +S2191049E8EAC1AB0558621850EC578000405E10002B5E6C53CBA4 +S2191049FD510A570000206E20000D58CA56FF00CC51AA59CA05BD +S219104A12B8B901B2C5550D60AB61EBC7C00017D8ECDF8000EB2C +S219104A27BFC0001550EC5780000AB9EBAFC00018D090D234CE55 +S219104A3CFFFF58C91B301A3880FF74070AE81B301A3880FF90FC +S219104A51020AD81B30193880FF8A07D0EA1758905A0BE9EAE9D1 +S219104A66990D5FDAD8E9F8E9D105EAE9B9055FDAD8E9AAE91D94 +S219104A7B301A3880FF3A070AE01D301A3880FF56020AE81D3030 +S219104A90193880FF5007D0E2345EFFFF4BB917E1EAE1990D5FC7 +S219104AA5EAD8E1F8E1D105EAE1B9055FEAD8E11BB0D0B21DB1EF +S219104ABA1CB8AAB918D890DA34CEFFFF58C917301B3880FFEC1B +S219104ACF060AE817301B3880FF08020AD01A30193880FF0207A5 +S219104AE4D0EA1558905A0BE9EAE9990D5FD2D8E9F8E9D105EA97 +S219104AF9E9B9055FD2D8E9AAE91D301B3880FFB2060AE01D3059 +S219104B0E1B3880FFCE010AE81D30193880FFC806D0E2345EFFBC +S219104B23FF4BA915E1EAE1890D5FEAD8E1F8E1C105EAE1A90504 +S219104B385FEA1AC8D0CA1DC980078801F7E1C30500CA80077C2B +S219104B4D01405601002A5EFFFF0AA0EBE18B0D2056FF00EAE1D2 +S219104B62EB670000C362A50D405600012A56FFFF20661800EA63 +S219104B77E1AB0558621C50EC578000405E10002B5E6C53CB5188 +S219104B8C0A570000206E20000D58CA56FF00CC51AA598A0DFCB9 +S219104BA1B9BB05F8A991D501CA80071C010D60AB61EBE7C000F0 +S219104BB61850EC5780000AE1EBC7C00017D8ECDF8000EBBFC0A9 +S219104BCB001550EC5780000AB9EBAFC0001CC890CA34B6FFFF55 +S219104BE05CB11B30193880FFD2050AE81B30193880FFEE000AA7 +S219104BF5D81B30163880FFE805D0EA1758905A0BE9EAE9990D39 +S219104C0A5FDADCE9FCE9D105EAE9B9055FDADCE9AAE91D30193F +S219104C1F3880FF98050AD01D30193880FFB4000AE81D301638DF +S219104C3480FFAE05D0D2345EFFFF4BB917D1EAD1990D5FEADC80 +S219104C49D1FCD1D105EAD1B9055FEADCD1AAD11BC8D0CA1DC980 +S219104C5E34B6FFFF19E856E919D890DA18E056E11D301C388059 +S219104C73FF70051D3090C218380AB880FF64050AE81B301C3879 +S219104C8880FF5A051B3018380AE080FF50051758905ACBE9DCE2 +S219104C9DE9FCE9C905405E0100CB511D609062CA6116585D59D8 +S219104CB2D05A17505651CA59FA61CB05CA05F559A3055FCA0064 +S219104CC7B263CF110063B7150023571100235F1500481ABF0755 +S219104CDCF6F901620052E639D915406E0080E0399615C13AC14F +S219104CF162E639D90DE061D20D07984D9982FDF505E731B10546 +S219104D06A7310C518162813AE0619AFD7F00BF5798F9031EE4AD +S219104D1BFF08C009B063371D0007C80356240063572100E0B17F +S219104D30B20580072802F9C1D33D405601002A5EFFFF0AA0EB75 +S219104D45C18B0D2056FF00EAC1EB570000C352A50D405600012B +S219104D5A2A5EFFFF20561800EBC1AB055852EA478000405E10B6 +S219104D6F002B5E6C54CB4108470000205E20000BA8C846FF0018 +S219104D84CA41A8A9BA0580073001F5C7C000F5CFC000B5592301 +S219104D99571D0023671D00EB5780000AC9F567C00063671D003D +S219104DAE80070C01E041EA050132003ABFFF24FF0AC040560188 +S219104DC3002A5EFFFF0AA0EBC18B0D2056FF00EAC1EB5F0000E8 +S219104DD8C35AA50D405600012A56FFFF205E1800EAC1AB055884 +S219104DED5A1850EB578000406610002C666C54CC510A57000092 +S219104E02206620000CA8CA56FF00CB51AAA9BA05B8C9B5551E36 +S219104E170803F00D650C50B5510D55F5C7C00019E0EAE780007A +S219104E2CF5CFC0000E550C5D0E65EB5780000AC9F567C0000FD9 +S219104E416501F018D890DA34D6FFFF58D11C301B3880FF6603DF +S219104E560AE81C301B38BFFF82FE0A301A3880FF7E03D0EA1904 +S219104E6B58905A0BE9EAE9F905D8E9F8E9C105EAE9A905D8E96C +S219104E80AAE91D301B3880FF32030AE01D301B38BFFF4EFE0A83 +S219104E95301A3880FF4A03D0E2345EFFFF4BC919E1EAE1F9058C +S219104EAAD8E1F8E1C105EAE1A905D8E11CC8AAC918D890DA346F +S219104EBFD6FFFF58D119301B3880FFF0020AE819301B38BFFF73 +S219104ED40CFE0A301A3880FF0803235F1D00D0EA905A0BE9EA73 +S219104EE9E9F905D8E9F8E9C105EAE9A905D8E9AAE91D301B38DB +S219104EFE80FFBA020AE01D301B38BFFFD6FD0A301A3880FFD257 +S219104F1302D0E223671D00345EFFFF4C590BE1EAE1F905D8E176 +S219104F28F8E1C105EAE1A905D8E1AAE163E71D0023572100E021 +S219104F3D51BA0580076802235F1D00F55F8000635F11000062A1 +S219104F526367150080073E02F9B1F30D6337110063CF150023D0 +S219104F67571100235F150063572500635F290080073202405606 +S219104F7C01002A5EFFFF0AA0EBB18B0D2056FF00EAB1EB5F004C +S219104F9100C35AA50D405600012A56FFFF205E1800EAB1AB0531 +S219104FA6585A1650EB578000406610002C666C54CC510A570081 +S219104FBB00206620000CA8CA56FF00CB51AAA9DA25F6C9DB0546 +S219104FD023571D00F851D10D23571D00B6C9235F1D00B851EB50 +S219104FE551EB5F0000ABC963571D0023672100E061BA0580078A +S219104FFAB00123571D0063CF15006357110023571100235F1511 +S21910500F00800790011E0803F00D650C50B5510D55F5B7C000A4 +S21910502418500C5DF5C7C00019E0F5CFC0000E65EB5780000A59 +S219105039B10E55EBE78000EB5780000AC9F567C0000F6501F0D1 +S21910504E16D090D234BEFFFF56B91C301A3880FF5C010AE81C69 +S219105063301A38BFFF78FC0AE01C30173880FF7201D0EA1958CD +S219105078905A0BE9EAE9990D5FE2D6E9F6E9D105EAE9B9055F12 +S21910508DE2D6E9AAE91D301A3880FF22010AD81D301A38BFFF45 +S2191050A23EFC0AE81D30173880FF3801D0DA345EFFFF4BC919FD +S2191050B7D9EAD9990D5FEAD6D9F6D9D105EAD9B9055FEAD6D977 +S2191050CCAAD91C50D0521D511BC80AE8DDEEFFFF18E0DCE6FFE4 +S2191050E1FF18D090D21D301C380AB890BA80FFF4001D301A389D +S2191050F60AA080FFEA000AE817301C3880FFE00017301A380AEE +S21910510BE080FFD6001458905ACBE9DCE9FCE9C905405E010024 +S219105120CB511D68906ACA69406610002C666C552C5F010014EE +S21910513550CA56FFFF5D59D05ACA59F969EB05DA0D23571D000F +S21910514AEA59930D0B50B851B669EB51EB5F0000AB690A5823B6 +S21910515F672100E061A2251E0803F00E651BC8ADC90E55AB6142 +S219105174EA61EB570000AAC919500C5DF5678000EB57C0000C55 +S219105189510955F5CF80000BCD01F023571100235F1500236794 +S21910519E21006C5701006C5F050023572500235F2900031E1CAB +S2191051B300BF071CF5541A63FF0900633F050063370100BFFF22 +S2191051C818FB233F05000A3080FF120023370100865123FF091B +S2191051DD004C1A7F0006682086FF0F5069077850790D50EF5004 +S2191051F28C32067050710E58EF588C3A076050618C3A5039EDD7 +S219105207388C32EC685031CD59CC5ACB510E58EC58EF30CB397D +S20C10521CC639D83AC7517F00CD +S2191052242F6465762F68616C64696167002F6465762F747479FB +S2191052396469616700082008000D0A002F6465762F68616C6439 +S21910524E6961670025730A0068616C646961675F7365745F632C +S2191052636F6E6669670053707572696F757320496E7465727210 +S219105278757074212121202D20766563746F723A2025642C2021 +S21910528D646174613A2025780A00526567730A00522532643A7A +S2191052A2200030782530387820000A005043203D2025782C20F2 +S2191052B7505357203D2025780A00303132333435363738396141 +S2191052CC626364656600503031004F4B0045303100453033002B +S2191052E145303200423031003031323334353637383961626326 +S2191052F6646566003031323334353637383941424344454600BD +S21910530B30313233343536373839414243444546003C42616493 +S21910532020666F726D617420737472696E673A2000203A003E11 +S2191053350A003C6E756C6C3E003C4E6F74206120737472696ED1 +S21910534A673A203078003E00253038583A200025303258002054 +S21910535F20002000207C002563007C0A00000102020303030329 +S219105374040404040404040405050505050505050505050505AE +S2191053890505050606060606060606060606060606060606067F +S21910539E06060606060606060606060606060707070707070760 +S2191053B30707070707070707070707070707070707070707073D +S2191053C807070707070707070707070707070707070707070728 +S2191053DD0707070707070707070707070707070808080808080D +S2191053F2080808080808080808080808080808080808080808E9 +S219105407080808080808080808080808080808080808080808D3 +S21910541C080808080808080808080808080808080808080808BE +S219105431080808080808080808080808080808080808080808A9 +S21910544608080808080808080808080808080808080808080894 +S21910545B0808080808080808080808080808080808000102029A +S219105470030303030404040404040404050505050505050505B9 +S21910548505050505050505060606060606060606060606060686 +S21910549A06060606060606060606060606060606060607070767 +S2191054AF07070707070707070707070707070707070707070740 +S2191054C40707070707070707070707070707070707070707072B +S2191054D907070707070707070707070707070707070707080814 +S2191054EE080808080808080808080808080808080808080808EC +S219105503080808080808080808080808080808080808080808D6 +S219105518080808080808080808080808080808080808080808C1 +S21910552D080808080808080808080808080808080808080808AC +S21910554208080808080808080808080808080808080808080897 +S21910555708080808080808080808080808080808080808080882 +S20810556CFFFF000028 +S219105570940700000000000000000000000000009407000000DB +S21910558500000000000000000000009407000000000000000061 +S21910559A0000000000009407000000000000000000000000004C +S2191055AF0094070000000000000000000000000000940700009C +S2191055C400000000000000000000000094070000000000000022 +S2191055D90000000000000094070000000000000000000000000D +S2191055EE0000940700000000000000000000000000009407005D +S219105603000000000000000000000000009407000000000000E2 +S219105618000000000000000094070000000000000000000000CD +S21910562D0000009407000000000000000000000000000094071D +S219105642000000000000000000000000000094070000000000A3 +S2191056570000000000000000009407000000000000000000008E +S21910566C000000009407000000000000000000000000000094E5 +S2191056810700000000000000000000000000009407000000005D +S2191056960000000000000000000094070000000000000000004F +S2191056AB0000000000940700000000000000000000000000003A +S2191056C09407000000000000000000000000000094070000008A +S2191056D500000000000000000000009407000000000000000010 +S2191056EA000000000000940700000000000000000000000000FB +S2191056FF0094070000000000000000000000000000940700004B +S219105714000000000000000000000000940700000000000000D0 +S219105729000000000000009407000000000000000000000000BB +S21910573E0000940700000000000000000000000000009407000B +S21910575300000000000000000000000000940700000000000091 +S2191057680000000000000000940700000000000000000000007C +S21910577D000000940700000000000000000000000000009407CC +S21910579200000000000000000000000000009407000000000052 +S2191057A70000000000000000009407000000000000000000003D +S2191057BC000000009407000000000000000000000000000058D0 +S2191057D10410005804100058041000580410005804100058048E +S2191057E610005804100058041000EA041000EA041000EA0410B7 +S2191057FB00EA041000EA041000EA041000EA041000EA0410008E +S219105810EA041000EA041000EA041000EA041000EA041000EA8E +S219105825041000EA041000EA041000EA041000EA041000EA045F +S21910583A1000EA041000EA041000EA041000EA041000EA04103E +S21910584F00EA041000EA041000EA041000EA041000EA04100039 +S219105864EA04100000000000000000000000000000000000001C +S21910587900000000000000000000000000000000000000000005 +S21910588E000000000000000000000000000000000000000000F0 +S2191058A3000000000000000000000000000000000000000000DB +S2191058B8000000000000000000000000000000000000000000C6 +S2191058CD000000000000000000000000000000000000000000B1 +S2191058E20000000000000000000000000000000000000000009C +S2191058F700000000000000000000000000000000000000000087 +S21910590C00000000000000000000000000000000000000000071 +S2191059210000000000000000000000000000000000000000005C +S21910593600000000000000000000000000000000000000000047 +S21910594B00000000000000000000000000000000000000000032 +S2141059600000000000000000000000000000000022 +S2191059700000000000000000000000000000000000000000000D +S219105985000000000000000000000000000000000000000000F8 +S21910599A000000000000000000000000000000000000000000E3 +S2191059AF000000000000000000000000000000000000000000CE +S2191059C4000000000000000000000000000000000000000000B9 +S2191059D9000000000000000000000000000000000000000000A4 +S2191059EE0000000000000000000000000000000000000000008F +S219105A0300000000000000000000000000000000000000000079 +S219105A1800000000000000000000000000000000000000000064 +S219105A2D0000000000000000000000000000000000000000004F +S219105A420000000000000000000000000000000000000000003A +S219105A5700000000000000000000000000000000000000000025 +S219105A6C00000000000000000000000000000000000000000010 +S219105A81000000000000000000000000000000000000000000FB +S219105A96000000000000000000000000000000000000000000E6 +S219105AAB000000000000000000000000000000000000000000D1 +S219105AC0000000000000000000000000000000000000000000BC +S219105AD5000000000000000000000000000000000000000000A7 +S219105AEA00000000000000000000000000000000000000000092 +S219105AFF0000000000000000000000000000000000000000007D +S219105B1400000000000000000000000000000000000000000067 +S219105B2900000000000000000000000000000000000000000052 +S219105B3E0000000000000000000000000000000000000000003D +S219105B5300000000000000000000000000000000000000000028 +S219105B6800000000000000000000000000000000000000000013 +S219105B7D000000000000000000000000000000000000000000FE +S219105B92000000000000000000000000000000000000000000E9 +S219105BA7000000000000000000000000000000000000000000D4 +S219105BBC000000000000000000000000000000000000000000BF +S219105BD1000000000000000000000000000000000000000000AA +S219105BE600000000000000000000000000000000000000000095 +S219105BFB00000000000000000000000000000000000000000080 +S219105C100000000000000000000000000000000000000000006A +S219105C2500000000000000000000000000000000000000000055 +S219105C3A00000000000000000000000000000000000000000040 +S219105C4F0000000000000000000000000000000000000000002B +S219105C6400000000000000000000000000000000000000000016 +S219105C7900000000000000000000000000000000000000000001 +S219105C8E000000000000000000000000000000000000000000EC +S219105CA3000000000000000000000000000000000000000000D7 +S219105CB8000000000000000000000000000000000000000000C2 +S219105CCD000000000000000000000000000000000000000000AD +S219105CE200000000000000000000000000000000000000000098 +S219105CF700000000000000000000000000000000000000000083 +S219105D0C0000000000000000000000000000000000000000006D +S219105D2100000000000000000000000000000000000000000058 +S219105D3600000000000000000000000000000000000000000043 +S219105D4B0000000000000000000000000000000000000000002E +S219105D60000000000000000000000000000000009039100090B0 +S219105D753910009039100090391000903910009039100090398E +S219105D8A100090391000903910009039100090391000903910A2 +S219105D9F0090391000903910009039100090391000903910009D +S219105DB4903910009039100090391000903910009039100090F8 +S219105DC93910009039100090391000903910009039100090393A +S219105DDE100090391000903910000000000000000000000000D9 +S219105DF300000000000000000000000000000000000000000086 +S219105E0800000000000000000000000000000000000000000070 +S219105E1D0000000000000000000000000000000000000000005B +S219105E3200000000000000000000000000000000000000000046 +S219105E4700000000000000000000000000000000000000000031 +S219105E5C0000000000000000000000000000000000000000001C +S219105E7100000000000000000000000000000000000000000007 +S219105E86000000000000000000000000000000000000000000F2 +S219105E9B000000000000000000000000000000000000000000DD +S219105EB0000000000000000000000000000000000000000000C8 +S219105EC5000000000000000000000000000000000000001A0693 +S219105EDA100044071000FE401000044110002E08100032081000 +S219105EEF00500A1000A20510006C0A1000200B1000A00B1000EC +S219105F04500C1000FE401000044110006C0D1000800D1000C47A +S219105F190D1000160E10002A0E1000460E100000000000000061 +S219105F2E0000AC09FC008409FC00080CFC0012000000010000EC +S219105F430000000000080000000000000000000000000000002C +S219105F580000000000000000000000000000000000000000001F +S219105F6D0000000000000000000000000000000000000000000A +S219105F82000000000000000000000000000000000000000000F5 +S219105F97000000000000000000000000000000000000000000E0 +S219105FAC000000000000000000F1FFFF02F1FFFF04F1FFFF06F2 +S219105FC1F1FFFF08F1FFFF0AF1FFFF0CF1FFFF0EF1FFFF10F1DE +S219105FD6FFFF12F1FFFF14F1FFFF16F1FFFF18F1FFFF1AF1FF89 +S219105FEBFF1CF1FFFF1EF1FFFF20F1FFFF22F1FFFF24F1FFFF42 +S21910600026F1FFFF28F1FFFF2AF1FFFF2CF1FFFF2EF1FFFF30C9 +S219106015F1FFFF32F1FFFF34F1FFFF36F1FFFF38F1FFFF3AF1B7 +S21910602AFFFF803000000000000000000000000000523F065BAC +S21910603F4F666D7D077F6700000048000000777C395E797100EF +S21910605400000000000000000000000000000000000000000022 +S2191060690000000000000000000000000000000000000000000D +S21910607E000000000000000000000000010065436F73204744C2 +S21910609342207374756273202D206275696C7420466562202056 +S2191060A8312032303031202F2031323A34343A303700000000A5 +S2191060BD0000004A2010007E2010000000000000000000000091 +S2191060D20000FFFFFFFF00000000000000009A2A1000000000D4 +S2191060E700000000008823FC00000000000000000000000000E8 +S2191060FC0000000000000000FEFFFFFFFEFFFFFF000000000084 +S219106111000000E8030000000000000000000031521000245270 +S21910612610009009FC007E0B1000900B1000FC0BFC0000100053 +S21910613B000000000045521000000000006809FC00040E100004 +S21910615000000000C009FC0000100000000000008C051000802F +S2071061653F1000D3 +S80410026089 diff --git a/packages/hal/v85x/ceb_v850/current/images/v850sb1/16mhz/gdb_module.bin b/packages/hal/v85x/ceb_v850/current/images/v850sb1/16mhz/gdb_module.bin new file mode 100644 index 0000000000000000000000000000000000000000..665a8a7831df8f64b3a53bf3af680b7c1f3b754a GIT binary patch literal 25708 zc%1Eh4OmlGw&*^DlM@05P>K8{coc(zpdppN2pFiMwQ7?n31Nf?C@B86qmJ$PbLy>* z_0~S8xAs|Y+uJ&|W9>|D>m98!Z9ytl<4@7478$jXR~4dFv_pRoJa4Ui5{Rvx&b#k> z?|t`s4d2e$YoE3DUVH7e*IsL#6BRkLf&_dN2}`A_2$l%p3=z4~;C?s=;3)yH0$@`B z91L(u0L%g$7XT{(RtLZwz}<>|SOu^*01g4TH2_uv><)lK0j>*x!vNkL0P_HE4}ik~ z-V^{w0Q^J%90_o306YNa9{>-;`3Jy*aQ*>s6wW^Y*5LdD;K4Zm05}@wAJh-W;QRyN zSe$^ur@@{sC|@&OZQ7!TATkqj3HKa4OC}08YdC2f(9o{sHh9 zoPPjp!1)Kj={WxY*ogBFfFHp5Gv-V}7K&JQXNs*Nuaf%6Yn*4 zB6md*!{92xH3_cQ;TlA7#?tR7XuAMy!Cxr=3jaz7KLQYe>m<02y~RQ6)XvM}&Ez*l zB55BZ5Tsgqt0-bw=T(IIKIY6wl9c)UFUy-Q$Qv+m&@@eP zbXn}&_(i(qLsk!6pSW4Sb;QfbJ4gL7ZSR;5(wiPQk#Q#LLeAxJU*=EROvd-lDg02^ zmSraY17zbL_29>ZY|^dCdXlUezn)x%yN5H!OIJWnX4vOL!wcC8;(^vnKvP{<$0{>> zBtP~S(7q3gUe3+0~8ih~6sK`s?UVNfJ=N}?2{R(u^v@_{ah&xam@HTfeplgpFL zWX`aY{6<)-jYR@oud71@awS?IXZU%;K4do*nfvcVz#UE?D!n=_EF(NGa^k>gQN@GH zV&=vz(k@R}Evz55dHB|(mq+eQ`D5zd(H|I^j3>sP$-Iz#+4N<8uTq!W<>AbXq7yli zSMdE2^S)t7e%5B9Ec#aRbN{OPNXXEej896PApni{LuP;y%tIq^rIh6IR*(-joAJxD z0#^c0%&8NwJx$Q+>z{hhQ!<$PIQ@I38g=zVGr3b3fTjE z>9iJCo5%X`a_w13ioFP!hS>3hWH}h}alQoj!DK>rEpX7-6@Nr)iSu}@^Xk^#5vgb6s&?s?z(1YD7GltGgwL8a>qDkH_Nw%8?v z9J5Y=?}AcAnPRT0xWHXt3n^wg*YCY|bWvKFD$8I`>R^k=wTu@Xe;d!WBwf`Ia$0pn z3lh%#nDNQ!sZ<;-7o<<>Jl1Yq4vf#7_8vG|oDFl<_VxM;2aMdB<6=mhrQq~6>u5e4SCf6RYHgxpoVs;Fl%5?W&*I3aXqairc*cgh zoIjqpxqRtv(&ri?*ds~&mEmL@@QS+S&G`>j- zI_Epk7hA_9!*z-6udHDA!p>R7Aa8gt5Bix0SI`4CFKYmqm&KC3>^zQzb-_C!aOXCg zOYfjpl+DcJ@M>W2K1xUAhBI0!i9e-?(!7+tJY!o0TBxNGtV{7&ce7e|F6bLzcjeNx zk-ikA=_xYR#+0qg^JrhE7x{NxE%cO-BJ1)F=x;ShUtW=IDY)XevLURhSWz5Q%)(lV z5=lY2+?2i3zt3-zR{?*bv@{ue`$O_xRygUEVnIW4^F&8>eo~f(B!RqB zK(c+ihD*&C9dq)OE%9JOP#ecx#TEH1FK;}qPzZ@PxN|tL8M!~O8Mo;^4b-10)ZqN%zh_f!v;8;&lSS@GuIQMT zr<@&@ITL0yfTX%AC~w!ScY&v{&eSrTC)kbgXgAWzQi}~`GIt9(C#5K`Rl|3ZulH)` zT}gZY(@60C@{(K{!r0i#1<=ca8Wv89q%5$vAU|TO9v?zaj&0)<3GYi>OSG+u8-NzZ zlk|y(CvS z)(c9j;2UelDyIHQZWF5WeeKtspR>6&47uL1T@!6kyYP81aTg!6OQhD; zrvHSUXIsbboVdt#TO*XOg*9>KmA82=eaMowtrIVN7EIdm6t*h5${G2?X2h9AN%cTe z#<P*$&?fX=K&52OZG_aZhV5fVB4TK|YGH`AL-GtZ_Xra~YkD@L}WmqsSMrIbD*3 zobJ>h{knUwUNz#(y_cTciWtN;IZosj=7qBBPTIrA(ls2O6>;f7fh&QPnl5X>ZPwG#s-!YdVI{p8Cs0{jbOu) zv28K5m78Y8DKa6hlU_|$I0g|nti%MEnGNn0ngsik40tp=`po8h^qVthjL0|55T)G) zV%zJp%1MCxc8>W*51!HCs8eXe(!$O59#WgNQ!h$w+-fc@T;#Tayk_NKd&-R{dOyV; z8Sd?Pmsfl8(Bk`c?ksOl$J4zcHv#b9&rw=9v+T7`o1q4eW;Bc~a_{6c8s#3s!rbY& z$2{q`StXoHo9t#%1lP6X$1vRX`k%yD>%$NhPa+hjIyFovPbI1J)Y-$LUooN5Rl2Dc zr9C*OUTOi~7$f?@!1XJ@XY)wGXPv|8H{N?8TORLy7!S^}5lYwzE}PjE)mhgo*bU3g zTvVsa)(U+d&Ws@RytVI~;Z9d(5u&uv^!W?2yuhuJt^wd_ug)y_9`8 zQzAy1Nt!7$Z-}79FdyxOSZ*lBioe=el{pKAd>dcf+}ac6`eWj%C;(HU;`t z85OO&^@2SS@AG&Hpce@Clp`d_)}_m<;o+1gDsRP(GQX#D*vb?icRmbr41+z)K`&?c z%GOpMXHzeYmJWeFu|#1jgYk)N>%^*7cbnR;_&UhaL>5p?f z4SKhGBB|}2|8|CA1K5QXJ+hvz**PPABX4P@^BnCuI>cQqkub|swohow!{`l{rUU(A zxaYBM(jT`+kp6q)YM$mpVf7a~;BLisO#zJX!UYq|4LOLL{eklds9&(I0?6Z(Hlvk# zb*$(J%fNXo7=Lt#Y;T(6>!gG7^^p@pLOq^`p3|UxS`8A*0}kq?_wV90kIv>a3pxdD zyYA+~*r=y?6}iLE``2S<#gWrLkoK!#ksfC~_>gJ_M<3;rQD_5LhSlb`K_Vw%9rj1P zlR;OZO(Uhj0K!HtBkWdLuXNxxSgTkTTl6{ zM=F5+_nnbBdydET&H?FZVZGZE&alYgl+Ossq_S~qvS7a07CrlY=dYlC-ugJMkna8QTKKB3|V7 zK&#hCS~<@u%*3>x;n904XgyRa+k#aHfz<$C1@<-WC$#LcbS`##tgn0-55DdDMq=~i zYzJ#*pw_+!@PoiIs>(T#+lQ>GJe-7@e^((Ea4UqD;F z62_<5i%Bo*mD!$x_tNMo>iRA3akjCH(eJTW*t{&x{$a;6{8pWOe-FFXR;Q77`fv3h zH{Oq5OQRxLS`RxmgR}%A>=PsQt%Dvg&Zcy1 z2l)PR$~f%3F&+Gfba@{<$)it7X0!En?kKd{BxEDN^8hP2rc$DvtvB8e?iqfvsagNn=WW4srC+7_i zpBNMg=Otx3X~jK>o@$O`tDb2?-H$iKW&5$!p35x84jTudx9GXFhmSMpvV#lBlzQo< zJL>lMY6hZg!M+mCa;{XFuOirjT2o+jm98zV>*dxPlWRw z&vkh|r9Fw`2T-5n4+C+$0`FuxQcuSlU&dv}JL+bPE3bpT_we`YdlFd4spun)5gnOh z6bWVtEM$HUnZz|jD?M7k6UxUDu0?G>C|$E+?qCgf(1v`Es@@cP+?oQj3$q-v){ zhYMyZl}dIFhkr#uCZ$}P!-Xs4mg|6{WT*Su!xaAe{eLRB{|>?0w?uA<0qmJUa@|9W z(7z}RABh^*IYKC(L4M(Ch*p=tPK7;cu8t(B)jMY#ce>#`I&K|T-4H#MQ_ww&)@>?S zlBo`S5_DLJx*Y1rC8c`h&K5uQ?_Y^L^0sS>3G(ScH%i9W@rDv{gds}EL#G?e2q z8=~u_YVdF$Q);O{S*HU%=j62o>C^sk1!$h)NBR$=eO6^nBZ?bSL9-_l;Yup3YFu`` z^aa?sw!B2gG^$IeN7G1;vo%8pk=X>$wL^G6?FaYuiQ^w4o}Am7#H@+HZL?CH?a5ik zC&CzslO7_dI|<#1j)x$^oJQPMx3dba{$7Bdm3zAU0d1pa!*<>MXEmL@|Ew}u8UF(x z{s%t%gdf3IvRcEqe3a)4Jt8-Zm1R-@GBFdJZ7$6A>~~sBYyoL1vRyb`as<2${uW;GF32oUQ)R8Vb!)y*J&K3i=2ZJ0;MAUCbM z>5Rjz*d9u4S_aIZ!24y#Us>!8BDu?oOrRg1PSAhcHn8*q7Jmma~e}6LpDTe-L7n+Yn#RAd1Y9P;b>JZj7W_ zF&tJ}`AwoL8KBS_JV(Y6Z$&E`>gz?3F960DU*mb3m^Bo3adsk}qLESf?HQDqr3YWA zQ750vkE1uh%uU$ng^q- z43j;M<$Zi%#$r0$IXyt+av9t!xa)FcO7zFK?K54GpHiT7LC%Nakk0F7z)!`!Nu zxzqrcQS_9qmxcqEn|zvj)Yrq&KAZFX9;SlL*{hLrBy}_3WVw}?H2}CR30=?2)=`#8 z>LB^#DY`{$ii8HRQ_qeN9k)l&r<&C2f#(&eGr;(_M9vHM&W@1R0kaJsf>-{jM4yD- zXox_phMV}^gS)CX#qw{kLiXDJ6qjLmCP=dV#W&pl| z<#ijLxzsZ#-#O!$6>}cP(o@SDq92A67|##%lpcl?^5Lu?5(;BI(}`oCMhyY2(+hHB zHq>`LHKbqHMhXiYZwh|>+{zSx6%TR4xZUGDQm-ux{1yH>9rIe(Fd7-0hu z&E*G!N3D5J9`}_$2pEy5OIk`*wd&c8mFg7?3AG%wS)4oAF;;bnt9Eq?H4V!m&i7c(X)9gW`Bj=Y-~L5=EgwXJR2!(&!3KAR~N zrFSB8Xk^xQS!cmGFGVjp7VAsms-HR4J`G}o@4P4`a4rnyR(>mxR=v#v}D z{*$`p`Z;g0(xvcaU^W#`Fk%mA-+cb>ZSdfiCxQ(N+?mO+Gu?}1EZiAtz-pYE2)hM+ z*dc|Wg?Fh;AmRmY#d%xf-*;MryzAsWQ`Em_jJRitV9%_dh&xXxLW}wBt+LM>qO}Hh zdJ(ML-i$=xO{ktq&rxMLL#{(VpR(<+v%Q^v0$?ISTx9UO-d42oK!ggr_VYRZ0 z_rpXbN->Hqw*T%65tu{H9xggshGQO3urI~T6z_Y-z=!pQV(a%>DkC8N9j+`_G1t;x z@e74FfXoI0a4LwDrVa7{IR=`hhTe3-H&{$wOXZQq?cs)_gDIae=j_o~|qTeUEU zL*Bx+dTEna-BEfIMm_!Axmz^15Dc{2hH>rNKoT}dm;H`OZ9u;3r3nD->Vq;Rwc!G- zrApvE0F`MN1T9|l2DH@-eZ~}q=aLs}y%V#9;7} zp`i*J?h}Y`ZEI~1;ac|FWZ80-clv6(Xsu{GN}AXv7!|cgY^cxtY*+2Ea*2dmVaHY6 z>{?5>QVuX(rIgZCU|j3Vo=+aCNbpEpy8`&Z*#3E%qY&&?Qihmbv?y{-3unM9lFp!p z)!K2liN*70V6VEpjKlZ%FjpN3a}%Jy21%K%xM3iOkt?C+gjwxfyt;(gFuQ_rFW6WI z(wTv-M-Uwi0%{58kuA;fUN7tdJV{{>Na#=D=!bin==G%@%oL)QyaJRP1k5sU9<&xi z=u1 z5BXesS>MId+(-UP`g&<>FFk{^UedZ7>P4~`V12NGV zw(FYFCYC~b99Vv&{I*BkuHC=QHL_|9=xc*6DRB9pN7Y0 z(~RAf_lIM~R2y2wX)untEZEa&zk>}ebRU)9L7hYkzey)LsuSoF-*$|JBG>`!AXdXN zo$_2xcEhZ$j3qecb9b~*kD_nx^r%5%WrF?Dz8Nj0HJZBt?jbe>DInEY;Q6CZBFS?a zodIp~Mrg-tYqw&&miR5r@ovESERx*j6X}~rdw8887_dt3B#s{nSoP8dkkCh;%NTke z23qoLz|d2SIe>u@5rFea)*YHe`CS~I?nA&zrdauR74w*XK>B<(x zjY!O+c~rptD|d8;_-vHs8nwKKhwEf7?Pb2vc-WfaK+6)?QafI@>aWUpc5`qF?B*2M zHHTrQDGnZd#r`bd1{in6y_i|}Cc}Wf=Z)wCL4*c))9-_)Au3aUZ`pt~@*XUu8Am22 z#0(ra959Qt@(z9t{7t$uvy%0B7f0$b8!bu(d_PAI+M`*0HCdmFw#fKvM=;od_3SDK zJ_9OMVr-P61iPjc9q(vmDL`-Yz=!c=ag+5a)g$%S=6Cb8T(UkD=oQ9Alv+!vud|G8 zCyUQaSNZ61OfP-9DLQ6p`=h~~ybCfZNIYWx@8zVrw5&0i~+2ZPMIN zdcgtG>y8&4-uRzhi_?JjMEtBc)Z9fTjGtd(bLdgi-Sxu%dFlqi>|oV~OzgBj{zes3WQ0us z-_GJ0cso{fl*VEVgT9Ee1#P_+IEXhCw8_@TcvtpPTDwGU0$``!gALv$^mU~da|#7* zGA3q6;sEn>tn3NyiN$<^r5E{7Z!~WJZdUBlhtD&w=^WMPgi{M|B_*W<8i(pel~r9V|f6)Z_EP6lL7D) zz+X)x-ILMs-uxr%<<@DqVt?dC$u^iiRlH&j&UIvvA$`wrbjDm)22r>7zaggaMdkJ} z2`Y7`qD+RK8pHZ(Z=`X)+M2WwU+wKNp=C_x8t)F?)3J`n5p;dla2(z3>7@VJktnrk zM9vf~I$ERq?Lh&)PsjG#3wQK-mdQ}F#5Sr6ZH$p-kYAitS`wqfH8;jD=~{THTlidU3sgViPbOYvOZ z_6v2%JEbqe_pZ|IzxdY~a6V_o5dSlvZI{&T!o_i<>~lPegJJC17k%gQ6*J|);)BaR z^Lwhf-&KJm>3QDwEXi^SpSY^C355!wSGh;j?QmZYK~N96r#Ec5@h$e&-;>fuTL$qe zK96bCfInw^OXJOIkXNtzTjTNcB=p`4$I`2b8vayJP{+QHIqZQS!$fP#*cLhDr{A)k zwLGxU@h&fGSh}8H8n!ZY9zJgfot+ABmF+(?AKMjVljbnKYry0CbTu?WMeGU2S)h&S z`ki{jt)RFJ#bqci0bD`~O=)nq&{z&5r|X+|r9abdM5+Rl%eD|lF2Nr0{no|Y)BFa zygWcNWl2%U2kuIyEf3l%Y?zbUD6QrWjF2f$v#YNj7*WrC0nuSt6h>pXdKf`r^en^p zT|J(q=lSp`WjkoA#Mn@ObWkd6-O%S)Nv`kdg=m$&6Q+*pr$$O!6wI$xCD^HJp*@*mHoE>-8`KcF7 z3Lz=-b1$ImVim^F?0(v_gG9&SL4mY=bkIj2UGP10uK?Y%gZ|Mm*?VX!f!6j9({lIF zCJj=TS|p$iA;4KDGjwMOE#8Hbv8q7YI=)NY3+a83U`0KwC677))VO)dWR%9 zhb8pTWbgOvK&8cHgm|7;mP=BI&1LggZ}ciHp$3mt>cX|yHLzZ?e?n|9y5l9NcS`8p zy)sbN+S3D+?Zn2klFBvSM$ISeYHy?NjBc&BPWIPad->3dlH_rIt_f}NoZGF@wXWC5 zIZt!&0?=i8!rk1036V@Z@ko+zjXBDA4v%_jq@Hx+bsO+hqN* zj#W2f38lcN3_gl}4|3;ydcoYu@BxesxHnSnjg)(1o$PbF4)CFNANLlI6}Yzra<7rO z$U1=B8-aTxa{rvh-`ZsC<1M|93RYn){SzHmB1I`RLViQh91M0L;FQD_%Y#!b;0)sq zM}l7xiMcJ>TeUej6{CQ5^ndOjk6h+ce>7If18zovZ-wt~EZ`>6kzQa#ZZ?cEHPY{Y zp}dsssEecS<3HoB2j3(TXA=`CzbQt~Ru@Jpc!rJwP39)64M;6#MPy2R6Ik8uao(m` zhm@=jMu<`jBWJ=cMu-k~gq&|{&7^s7=u;>+liC{0Rk%vsy~IXkux7HJo+*o4Gx4_{ zO}0<0TxsnR8O!7Rus6(7VSBF&e-W_QQ4l;DkU7*>JDwTh ztL@0t`)U_6V|}&Pv*LZV!Px_RwV3RPVx}_zPET(Se(&zZF);cb!6rfkF8{7;RdBsD z_>N3bo4VSu86^6|cbSxykEx$uW!u!t^qmYz5lV~vyk(&YpAV;GJxTh#n9Tw2 z$g4nd^TIjLJrSb`*I(IwZ^Y>B*u={@h{<==B_8K)A9VLqIcK$l4TZg72p1jZaAkXo zcfYsR>t=bF)tX)!ZTE^?CfpqsE@w{Y2}tpfHM$qs>5ede+uJxp=cB# zQ$*CIe=@S#8w9gh;#uEgIjCn1qISK&j0><8?-IfJ-`>LEmNIFiJa zgj&v7r_{q4?Y@5W_r1g&XNk9N(qq1*1WzmX8J)&Mym2(v*G(3s#|FmCK36fg#O*9_ zV=Kl=cxNh&U9a=%=Fk@GqxJH4ul=5lIznTS0o{CzB^KRY-aL|&6AF{el1bXnZEln>P>kljPK!&)Jv~Q@_Pl-6|x?Yne|f9UGy5~ z+?882&@%RJY`gA?mI#^nj6!u6eGKp#?@sXcbX@iQmN5qK!tRP(q(asT!LA2gYNHvL zv%UBWTXI^MJ__P0%w3aOToGkEV7v$Zft+vG2<6REoaG~1tJQt#!YLW^*eTE>%P}iP ziSup$0y}mg^y}v3yV!%5mFrBcvK`;6(b@m%d*f$bkUxXCDlagDI3Z~IfATLbD3{qq z{vO5@#$W5c58nS8y=VSyO%BL92fTpEZcol#h)D`VP)mgAY4kS^Ri9~yy0BjQ6ymmx z4B}33d(uy`Vmih63~Z?>#5{O1M3Ars)r@EU4vn8qD2gQh-f?9nyD`obIWvQF{ym8p zgC|dbdsBMx*GjP z*YM|qd)c`Ce?AanaWzJtg;Uu2-+5Ux7vI4)kM-Yr(ax;zvpe=XvfXK9U9D?dTf3qy zar-^ikJDtT>^spGR~=IA)#u=EhfdY8!dZdD-H;@$rPuK)aYIxfWR4~~*ax9E)g70& zsY}Sz<2$b1>v_3$yBp_ry<65r{Pkr$_iYdE<4Be0cs>L@FO2VEdlhzw)aItRdZm!L z6Kp9py;5iyTmj~NaD)#YFn5rzhJGKOlA5w;I7#ZI{2tkw7(zsc5CYNW2>)+B>!rqT zL@ox}RUwQ~$X_<1Ub+ZgyAoRRRkH8@0S`WxwcD33Z|3`d1F=Jgzk%QbVrKf=HaIOd zfeg;jT0-f=*41#;-4IAm$M!Grmz^K*BKJ2A=BY|@_`Os&E7&uotr}0kZFXdz-@29e zWAvX+wIHEVA0_*flxzT{0Vo9@<$ylQGXb%CIAGl6WDHGU-w)kplYh{+CZO+6VLpd^ zl(9ca85=;kokL7~!inD%#vPhU<8I$uvX}>Yl8mY$gtZCf>)C4+ZPdc!8^5g0pJ4_p zIKRK1 zW&D4m`~I?td>sbHW2YbW(0As0r@=H$iitQMLxa6_^;Cr8qF&r z$>;&#D@rM>^UTLl3-v;<1JDYir!C&7UsMxBYF+42pAV*)zF%$DM~I$B zpOd4Jnu9zkr8U64;XKKw(YFj1Vg{pjjAOIDu+rQ27_M~EYSBB>m_m(Ie)fSe%2X$75`-tIHd_wiBEvd4)T@R75tUCCj2WiCwwK? zCqbL>mYFl$GCRiJLTwI$XhD)N`)VGq{7R@634uFP>3Lqqx=OeAB8VKE$ zDBmSpl$%F+yjRN|00ikyB`hUkL<%gABcZH z{(A8#ct2mBe*EwEO`{vcR3v;MRow&+^QwkaNwEa`OawR);6#8G30izZ1Fr2do}}r= zfx03ghWN*8__6iS4EZs6$m^j==*9ObWPYwoRnh=?47e&1qWt}LG8u|Ib|NJ=4 zyCrd|h7gZ(7q{PY38SJ7LEjwwYB~K^HNb|cU%htlpLqf7i}&C)*qb zPO;vO11#2ecjzeo1eMw&*Jdl!?K(yF}k&7K0-KSulo&Txgg;l4A6J@ZkeZ{~KGd36l5!ptjU=xqAtPW^Xbu|W6| zw8_VqPzx%-V zSLC|Vzapw2|B3{0|Hz8$QTkWpB;)7fi1HsNTjW+T0jqJzw;Gr3yBe2p zHMBpu8k_i@1Ak_}ee<_x80cTi&{eq#@|V}*(vPo@_Q)3Z*nN^T>s@&@PP4c|Si3=R zg$6^doxOL3&Uf_mt_(D_q6r-1epuF&~Y zyHCYa=^zKO?e>mXSf?0|{SxM>L}@9jGi+&$$yV8*hL%5566VTpjB` zevX1KhyTigZuXW+cg5h6GG}vXw8d_9JG(26v2M1@`8(F-CVQ$r0Xy{`*e?hE`vw{^ zIj)}j`a7nQ*skQ9)0h_%(UbFn=Ah|dCBVF=;xx}~oA%ZO+J`?+*SY?>}vGihVYxTp*#ld^YDz z`dbF33)ZvilLoTaiSL~!*67GJT+yRlH4UVy2LIKvFvh?C>!sn+kL-W&Lq94F(71Bn z{x6NOV1M#2nJmS}WsO7Iw+l7ym~}VsvH$4aVzj*c+%U^tD_@K}#d^F~Mao%taadXS z+zE%m3?-Br`Qy++aOjrD2TcP#Ee*hL+0vig$>Z2louNM%d-tWPt2!dT8C6F!SU5_TOC@0J7XIsP#-M@w)FQa<(5L zM(p>kqg7O=fbRxkUM<0&(ERAZDH<6?|ma`bt1pJ-Z${w{xYlw!n$C!Ry0L#&Kw&QER)q%SITo}fvTjXD;<@cb~ zLCS2Vxz(o;=e+08>YP3I^*NwDhgRq8x!vcqmS&sI8h=FHegWd{7|;1D@C`hn-BIt~ zQYT7(qrZDozbZ;zf@cL<9uJAeHn2QrNz@N5&%7ux!;9al@K&Im*nKn>Y#?FQ zkm9aSL=t*}>GZD!QsbNX3tcSzl@0!u2Ys`8PTMszu1X3aRpVJwMKirIcM_qFzg!$h z5}{>-H4*Mljl;aOutAEj%;#2G9_KALEzcO0OD&Ivm)tCQ#>CCGR6Jv{$j&-;1FC zrJDHau3yew=BiqFWAm3R|E2KI;$?Fmdu;jAWkZJ!71D$ibE}pudCVl} z=cEdADwb71ZKayn=GH(rHob9*WXZ3_~3+zML%rFEv%R$R4;jKQN=Rh zm&+cTzqkgN5lkdsO>!46U$`)zp;gMuEl-Hqr4MiOhNs=P^*X#Mv9ab620wiJpM fbcXo4O`aiFEO7seaJjxKwEzA>(9zlENb)}c5EdLX diff --git a/packages/hal/v85x/ceb_v850/current/images/v850sb1/16mhz/gdb_module.img b/packages/hal/v85x/ceb_v850/current/images/v850sb1/16mhz/gdb_module.img new file mode 100644 index 0000000000000000000000000000000000000000..dc056dec8c887613eaee4d14a9408da6b00413f9 GIT binary patch literal 178639 zc%1CL33yb+wl7|Lce*?2q>}(?GInT4IzUJ;iI9mTbV3NoWV(TL5+R)d0)#x5|4p+INz)=DS2w^awV2BJ&u0UuI0vZQM*l(@c-McCf^!(3#_r34^ z51Vgi|EhKkt5&UAwQB9EX7SKb1%e-Kf~x_#Zg{&!wZtwqI$RnfDhsvtEn1q$%4)Q5#d2#?^xDhOwCVIK&` zb73`vBe<{z!a6Rjh457s3;ROY&4v9S+{lG>5U%6G{t({Gg##eGjtlD{{4y5~gzyS3 z90cKqxo|LqYq)S1Y(E$7itXpZ-LU;!I0W0zg$>w#F5Dg4&xJ#={UQs8Vf(poIJTb) zM_~K8a3r>$3rAu5xv&x2&xND0{am;Qwx0`|u>D-PC$^sp_rmsb;TUW`7mmgDb73>K zp9{xf`?+v$Y`?(5eX#vpxG%P!3&&&oxo|&hKNn8G_H*GxY(E$7kL~BecVPRua1yqk z3nydyxo`@$p9|lK?H4Smgb2EVph+#J!0U^vgUaE#HoiKjvV}nG))suXy#=W&2A@EAc!85N-(ez{ zYxd=WpgApPF{E6U)L;^q`ushXoHo)s$D+0rw2?jqVS#Z$0+|B0Ce?>%b9~6z+^el} z+Hpm4TF6V&TGXAU4QwMl1C#uOFiUD1ozf9unY!wihlr|WQP5K)I`A2yHfZ&JX8%O}z@Y3dL%WSOj1Qd{ zJ~?uxac+-=J(tBiWnS6))xK-`y`Q+@j?a^K-noC^;k4r!rw9FzGwdlcxP4OI7GqPI zh5Q%r##`&QF9}&;T$J`GSu}VVISp@jr4E+P0G}){&U*&tsVj&JVoyPy>b%WrO=_Fu zP5nK@FG_o&L$2+4a>*9ew%k6zmkOdvQbo5&PANpE`Z<{7Kt55Q110zva(X{SP7kw? zNxcr}mqTAIFEG*mI@`lU&V-uCVg1xzThz-7EbL7XywRG7uUVHEFfcGXcxczrA>+GG z44WJ=Giq-1LesKdPsOf`d$rG+`1cbw^#43*XUhHohf|NIpU(Utr(I*rYISKXf~o~6 zl6&y8-cx@ONKV>QL{spqw3wYF9|B004`=Q-{D^E3^E>^+IgS~qZzJsFOUbsIp``VO zY%8ywW0&+?zi7xAA^}>^V3BLJ^#%A05LfWSNnLtU@`p>Kn!xJe-9_%zk`x;xs ziDbN^Dg0hS_F6~4-`rBwMAc;9@ws)mHox&g%d!m}Yj;ZX6J#E&Pv~Cg)HV!u+J73X zZHPN-Amotm?kM1J)|Y~ZPfHW9wk+U2+3d1jHD*Bl!XfvjJ>%1%%~49J_t>H4#ter* zA_{X4owq*Qx?$);-!fXGHm}TfN*DWKe)pzL1Cc+#ZzHyVjQ5$i*Q$dOuoR#1nu)nK z^>`nkJ-6{ZazyJ#Fn#VJhixG|ml=eng=fu_cTTCTALZKFz8+pR?xb}byu9BjJ>5@k z#qNHg(9-z9f(>OkXE3SL=1AA$P8x`*D40Z^i6w)8R+KGw#(%1v+AG4gObfh;FB{{x zH={RD<)2=cF@^LZACh@O8yPM%bo#H1^aT!>in(o(oSs-tax;2aTjr4<48WS()S{}c0ZZ<9J&`j^BtAUcD<7HW11?4RS?#n&$ zVm$UZ_N<@Ucf4x6I9?5X>6A!3=F5uTFj_8aNrzmO@iMjBvyryG9@<95?;I${FBuqh z(M0t`OJAq7y01*-<1hxIXg!fhSW~8>3z2I>xttCh^3uo3{I%}_pwB7I?u(_p*LQ>3 zbigfzgM?&dJMHN?acKq;2mFo)&MKoun~>wQPs-LbM1l@MX&iJGd*s{f?7`SWek3xf zE<+1CBkLxeafOakUaonmmStKV5C3ueumO3K4XwzYVj%BYFIbNlWgb6gM6Sxb%Idqu zfbEaGL8n|%vou}%I<>pAoc5{Nn(~0uanPbJB*9TZX*+Md4m1U{BuvD1g5DU6dLwaS z!uX_#GIcYwB{WB_ts4Huc}lN_(lxa7kNbf2mmTLY5W%LdoDQW-pQ47DA}$T|E%1-n zst5bgnd8Mls_4%oZ9}N7O4|iBj4SRd1IdDMl2PkN1o!!aPYhM<3L%jWSe;adkiGLH z&?GhYU)3LlS$?}d26&;bX($;9x(#t|X%+lMw6|i^gL0gyI>!@#q2#1GYl=WFoO{_2 znxx7JA*uqf{G|hTf|jRc;oH3jkrrcduKPmCww()L?5m>lp^tqBIql_{#Sz-wzFXri z8DM^ZzCGzjNR#{2riH?K)s|4AIucAQAHe-qFsb?!`#_Zw>ZxTF)UsVYA0(r7a(JQ2 z5em9}1hgv~c$3?7{G<=58^5igWSCVhqpWCq@Mt7+~! z$o)bl%GlCOl(|~zXGySuCWR93&(tP0q-;z99o84)W`Ulqu9< ziGh})Hd2$e#_W`uv?W4!)z@q67bvv~mW^7N9O9%+4OU5zgO1`4jz`V4g$U+L>xtQE4 zMO{(tAEsFBNnx5bjL2!o%L$8EAlHHr7PNz+ubv2r3SE#aYf%9sD2IT ztnXv;Xy-us7vH^*F4y-N)CY4}Zw-tDht1*$Y1!OvDoUDb(T21*Y>iOnuGAnx=i8z+ zW9yPNX@qDBv8MOZE!Ay6#WFo;T6K@o8IEOo?D^ndeC)I?W;(z6f{%I|rw2~4SIJ-Wh|C7M!U)hrze&xUcN zafncNCRiftjL6aKvwEEC<#%Z)e;K}z6Scv> zI~Y%?PP;BuQ%`&7z?!k9)L5K7!%1TVluMd+U6jZbJ@)#9@bAv$HboR3qt@K<6B4O| zcbi*HsWFfvCpU!|wC_4fqN%JOw938Tsr_J})BfDR2@!N` zX`j$jS#WIYp=$`(?J7At*K($f1k_U*v+wT#Go(4ezO6@xPn= z_GupsR6PcIVP2aor;FB%ja;rTtf%el@7U9$u391ig-dN;(U_5F4VNZE{#o$OWnE$3 zR}@6pyFpW)(ECI0&$7eYikA(!P{RwyGofurK}7lIB@Y8WZe0K&SBdl#YNLKF4tYp8Bjkh1de3`1+~&=*YTN6TXRSaG6ivKuV+Es zD5v;zYIi~DKM$A?K@Q!-?Kc8~T_v?(L+S*qy`P6i{#!vaEVO(89612}urcJrfwUKz z40130NuL2FV-IXr`!wy;_d@PBwOM~uAN_K7k2s75zv0G4YZtS18zgPAPc#$ zg4@|cmUvTJs^ba$4qM$3iMUGYhNdfN<|}F1t_^@R5mq_Px`D<*RdHR3KiJkIzHO6o zq5Mw{%alE*$NtU$?nOa=H%A{rNq!TGs;f#55n)qxF>AxT93o1q(0)S_5nq7}q$SP_xV2IdRoxeeH)xux&p}AvRaW z%b?AYsJ1VF^de|R-!d)mZHwBsERgtH{+72Y(e#2uEKdg$-&vBRFaDxbTYi3uljxnB z)fIUwjJAq^V$J;Al;nA9#;z{iJ1dABn6|GB{+8s~^q@ohLCfC_&jNVnrUYADxpl`; zm(Pd#srO>ot7c8QEBDhxI*U4<)w@cX)Iy5aVz02d)!6!x_9yi#jq>~T>czIr26?1E zYX-jQz3FS{sz~P6Nc&U3EmI1NlN2o52qoY;o93hC9MThc4g?xVrnkn4+9&mL`lld$ zlb+SH1k!u!nW)9mw(q9=Y-8M~XKQTGBkfLUZNeb?LRvFE z+4|&I60A>>RME#IO*3i4F^QIHhJB@3XhPYKOo~YNrq;Pmt8wkHyc=4Ju2bvv5lO~$ zpFA?6R(j={t~s(=fK|4sXgEhDO?b_ym22)WkaUcC~qC%J<8xvKqc0ilFR!V9|Z%z!P(}A3rsw>kz^75--ga@b%g3nu>dPsT>1_bdBkEab@c2O5S^?TRQj(`CKddOFd+*>WP7 zw4Hm}h<1Gp%- z>aC%pv?@AgQM-)-O)|=kUxIdNP?r7eS$a&hqml;YAU|Jdb8363WuD{$Pb>smn+2^s@*C(a z;6|=zWF^oR=fcQpOvE(lkY+ukX)?#8Ws^Y{w}u+iV}@lA0owbRK*n#?iKt0m+yntyF zAZ^R9a@r+A43wgw<1iDn6P9_NwqdH^I=EzE4E1SkABs=ncAxvrY+AICnC6*atplrq z>O$zYPtuDsL~y>9={(lUt;37Lk^i zVTrUaD}O=B(11iLTgG zGz8WtS73cTmZ(zu0B$s>F7}~P5eq%7`6b5D7efA1a2^>%+!c*#e@`i@922DY{%4$T zW72xUC{B;TSu{8V|GK)xq?y4M+HRER<%iH3(BqTMsGHSDMGWRmXh}fNA z-PB6t7o=%kH~d@B%_%Jjz_ry>sAYbDY;nw0=t7Uh7340Wsb7KjkK<8{Q z$Uc(IV_{~w9Fx`ss4ezirkAy&%#(y}^2}3knb=g(TR~4f-P>uu(wlzOq*@OwuV7;m z)PLEjb;G+Oz2$yDZ^IU_%D<85m(Yt_gD}fa2qUq#N-udI(LVCuWp<5p9dlb{s?Ys5rc>-L9Q-KUy7;|FSn zT<%k!=y4QJhwye=LRozeux?;o5>@C8B|6?Q%{pr~)qpjT2zAt*n|bLSlT%w6=d^D( zPl(VoXkEU|a+xpbEl-2JYjvBE@|X0mMtF=kEoIw$`YrlYuJ^U~Ot>P^6*rXn*67N& zSL)^o#J_Nxt*~U3`VOnE*irLx`_~mSfOCO`SFB(Ba38F-y6mQHKk}ZbRc|cbU5fs` z7v1PFi9fg9-FPnh60V^7opUrTZd$KLuV7@lkmr;>49=h{v!>I=LR{y?o1OMq=HiH| zw7x{K`=GCSpV=C!ZPu03u~V^PvIg3Ex6NI$d7=jFCtbsZqwet%RqqWGU#AqNYE`qhF9e|vIX%{C zZ-_-dps8p!dZzTAJqDgsZ>d(^5K|ch>)%*SnXhm@`6YdC=;La*^E2~P&L=RFd~*R_aJD8iKprnp;)AIZf#?JvZDBsP;K*SYojNc1W+)=D3o*PU{>*Q<9lwYEmV zs`;@Pnyy*v5;JS11JVMh-B^Sc^7HU!0e#~OZ$9?CLBHq2G3a@gJ(Jhen$&lsDX=cb zZ;y&!GIfu1x>fd8{#~t0TGmSFm&tKZo)IZ=*GgL?Bh+t;!S6NN;-#h3?^L}XZ1*p7 zf~du^kA82G+g31`wd?6#Fvg%=+IkhNik9hf-7&Dr+tGyjM|TR#j|8i^Ou}z{51$39 zsie>D<+R84(lkUK2!>VLZ%6kSB3(Go)k-hBb1PQDM$d%a(7ATZMCjh&h_(kU6QfT;dWU+HK5lu3ez^Be*i|F+Ef1LQkjto1WTc%^6rBCU4Rk@mrT$rspjvuPym9O}C?`%7)_vR=BpsHdx^n zZnVj~)fRrJptTeg3`R~9TYieFX15LHSzqp`*;^(Ne=Cf*ic77FiMCV=DIKLWXJ&57 zVvqNHcu!TdOVT#0fF4}iKTmxWrXnkuh$-EuQDhVabHHnoF-Zr#wd(p#HO@a>+jY$o zwYZNDebvFxHWQS$RnnxZE+!F7ktLz!gkJ5ndR;NGp?3w>y`W?5n9l+|D21ot@Mu%nY>0Vzv|N5%yDmxAe6O@`7%FQ3u%Syf>rr#&+tB`y=e1YOt!nD~ z$a%$FD-CF;b8y9;WTtcTMMtpaoTJ*Ot-eoNF>iM*syAXg{LwWOxs!Jt?|40<_U~ z&Bl7viKP%9 z0h%9k{@SK%j@r0EpS#_d6b0dC2uD&huKl-jFBy?1?rkRwIOC+9_&7E)oqFufd=`ry z(6!-B#bETK zxqN~8*RC0pBGZwZi*)iBjy1|w+N=8QDZ8xkcGN6FO6CHTHWh3bj~BPEIlj7&`TVr2`WkIta{}a7rOc$cqiF66YQeTf zjo(Zcc=BVNZu)i8X`c|qR)cHw4zM`afcC9TpJZ<*Cb5@+p*wY-JjSo{n3d-iI~ zfOj>SxN4pRT2%ITC^el7C#DbXMk}*H7fkJjPfm;-1a;$%BvVeTQa{ESc4MqT@eQZh z-_esp?t@Qf)113bj2%$4Bes!#yUIO;IdsKK=~|}2iatdh(9=-zEK&_XU$QtgKqs+ zF0Ui6hrlX8{=Rs{fHuDXz2)lwj&+7<(9{Qnt5x@fm1Du+Q=RDHD*(_iRu7H1(Bv-FB&vL9J@%KJK=dbBgUe(XK_gRp=M@f?7P5mspAh=3a>1V@OHKkgB z;zid`mp$1ghi22zqBfe>{-)Wf?GLm?htt{}Ys{28lpdrb(T;TB9-#cv{2DJE{h|IE zprya#S$IAHPeBk;Y8;P3`SaVH+GAnZQh9d8FaNJ3O}9U!XW^%lr`zXp;ZN?EZhw>u zkAU}qbvTf^dq z2_TKh<~3$aTS3zbG_63>5=cu(US=Y^%}XhRnv=~t^%}3IJq2^+W;$#$u;yYc5%;&w z(mtWTSNjo_{i`9qbgo@^HrcEx)Y7#=mXr-CU$Hv1Eg`Vp=2Fy3Cgt5XA=qN??X)is zk=r;Bzk8bf!2-QJFT7HVV;=F^{&-^539p~5L}I6 z@8JpxSI=@7|5guH)A>9$MAHn?DhW1}A0ylqwyRL)07=H{+hMgz_k`&}SZ>T|3xW1E zI<-Y10+kTi=Bi1{Fyq?+A!yml_CtnwN?NuV?XuoES=c(TE>5dOHnz20fy-iuoF7t_ zWtpb~ecs&Dhxw6s`MVe7Y*njL{L@+9Bi)?#UETP+N2CjMo$3yG zDkP)mWd_;jY4Mp3vP@^VOB?iu)x>>Ro$D4VT@{DuE}MQhb2wn#4D)0^koJBZ ztUGVMoo>0b;pV;P7F-G^GzWfV@Z?|?usDD^3uWt-cvN$+3e zp}x>%1?p`)^#+-Wv`t8T3Q(Vd)IVqN#_mi}XiHXdK`$((|D5(S!A>b5NZz4n@d3TS z&63z-*)XedbC`BlFxVx*=-Z;DRa<-#a23#u_D|>Qk<Dr;R zrWXXKwj63173{UYkYAc+l*N9X*v~lX!8QrT)`SJiJH_bS>cEu>&Y}H4lC{HiNtj#q zipV)}C$O&BRdR)T9pckI@9mVr1lbdIBFJg43zGe9jj7ZR4rQ9kETm=%`YIfyb?wAP zd9Y}>na(M*8dLG?$4=Wcp7$(Htj!V24`t#~3}mOa;}Kk(T@qaV)Ts_~wX zN?zm!fpIf1qeGtR1>xx|^>pY?B-^f0z zRce128%cpqyCqQ5+~D5mu5s6?_0XzC?R2%>?$oBj+g^dP$JCX)N}uaS*+eg`9J2z_ zbcHn4ffJ}bh3j}zK|ex9IHm8YH>()ll0dpjuh%x1wwOqa{XXKmHsX6-ZEz;$xKCCbt z^rCz^<`?Tawg2ugtT~i`K5^77(}yL=J18A>wbGI6u02n;%X)Q;-f5quFOJX@lG2zd ziKOc8F2r|u)f5BKmg|!I(*rDEQ%UHt8K)O)u4L5pi-~5c9_%7l$#Z7YV?;15a!ICn zWyHU{p>kuTzWA+@mXfz2T}|aG{mjZG`heoEO3>$dvE*+Mn_GkPx19g#X_T8Xf2iN3 z-CZlaA<6p+#;9aDBI9bMg6n8CPP#6~7$9cA_3&onnJ8jP#cve8*U`oRtMPiiyY1Xr z&soMWNEdM3sSQ@iQei4GgDf>s56qEvJYh=?na1>kbrt%qNe%XhrWsOv3ig5QZ#S6A z>ZORnFKmt0x`W3L$|?6A1UV|)YsFRKG}~Wb#Lj?n>-6$lEWxdou~4IF#(g!$qVGIA zex{0E58{Gs-h-Ggj`=75MTl9#TJn1-MhISXwUc!J-}1YrT`^<;uQR|37+&YfxDIQQ zJU^5Y)0jkh#-Zw41JUKxO5eb`ZMlGH^Xpv62h`4Fn&Ml~rI~(~?!#dP34Ks4xTdW# zc=MSGf{C|u?3v+pxXyHHEdu8Aj!8_>eRw{+8_|xZmBNA37!o06cOm1FKu9CmPBufm z&=XV^E=G=9W5j;XYX_^?^F_E9$j60i7^`cOQwuUpr!ibG7>z9dguJmi6g^tabYlArh&kh~jtTr7n zk%)_u6jj)6e}mM)s=$=mpR7_3fzo`hIovy2O{r$w<9cB7fqz?+{-`U$dC48!<=d^XAinM;LE=2in{MjWgED%zk&Ab@Z=2t!<^w<&X={A62EZb--?t~hRT$6 zo?Wu&2YQtBn?i`%W-42zK3~y9H9YS4RolECW=I9|H|pvt=idYsy6 zPgSF(BKOjPv!*haw#ot86MCk~(Uss=2K3quzb`$5VD%~Y#T4!sYGJ97T7kp%DO=mq`v*h#ECTg>v@BzEb$3*un)=K0o zQvP(i{H@dHEdDYH%+f@t#4o@WJNeP#@cGd)CGba!*7T#PXc)w$T()SFE?evaE~7My zuv(BL^uAgKYko9UI|+d|qv(9TS?wr&xgEoJzC_MJAivA{2^|x}?)xM9TZkj&vS8a= z25A5x{jaDdfCZzv*o}IkYNdT>$F%cj$DUR>?PFBG=L@cum@haTQkzsa`+{GTZuA8Q zLdspDJW6-!(K^*Nf8nk>S9gxa!P<1CKFfX=%omdsjevG#t<*qNeG2%K%~8acq>ywduP4y_$sX@sqCNUnS)*LqqsMnO+CBPO zY0jRVdeg<8WF_^B;TN`kmv-u>1EsiU;Wempg*YJs`HEh4ZL^Sxp7(`XwC7&@5zj~p z^t^&x+nkGn4S87&`Qk;k9_78Zm{R8g9kCmIhiBS5u1&KQA8zGP^x+C>uNU{3p`Op0p8@$=`XgA<<<5$LLT!>W*;V0&F{UYguLLBGz}y_YLsGT){osFEe>~`L zm;K##8a@x*5dMDT8e_ZAQX{8n@%=$}I^cNV;o$vUcZPi4eM8v$5o@Brw$CC$i?^J8 zot5)@WkCJ`T>ko-^V8g&$u*?_;$3Qp+!m8*f+@S%_W;vZ?U}*rWqQi){zOA?F4?~Yz z@k8zpLv%atr;zEnAXQ0S}1p39j?L3UnFKlbTav}o0GZlrA^V{B47u(#!oF0iU z9Je>ucNp#=Gm(Je-31b<%UxTtU4Q<|t>k>|R`PCzq40v;Npzde|HoDm*6>W@fCG|L zyeAa2g;QGOt813g%PL)cL{d1Q=Y8wlhT>;R{m;42y`*;>YB=}nxr1u=xlL-s>&_Wz z`g~uVOGf1?U9*wqEcLB#8US>Te8+Iged-Cl!`*P|*Hhcn?o;o8MvB;7UuWEd`Eph@;k?7?_q1MBRO`*Vvmpq(+yr&>9;K&c_*Bd{I+PH4hjXiQfkz5V+nr<>`%6o%Y5l?2V{D?2Q%rwoQLm z|N73ehXp7IQrwNfSPjd*hHAdkE1*f<4q7P_w#Y4;?$# zru5J;${9@mqFPrkqmK!426KL(u0Q1Ip@Z&&*h9w-wjG4L2eF5a9b9)Xl5z(r2yZSr z7Y_Xt<|;acek!LlTWw5wW_wt=ZlhD0q?UKlfc&c?lOWE8yCadRz2}ggJz&e>uPhkL zpQ)^?=w3Xrq`ow?u*h0haAFX^e(^c_u`(n^D zFaCx)5;V<+xF=k@TU8WGs&FsNN2qi9h`(+7I{Tm2IpaM#r_4nB*Lrl$JM=7r&rCW@DutUEn8?5^ANK?4Webz}S3mhLXF>o@YDrmCM zLPsI2@{12f(GgS)IxULYQ%kPv=-6JQs&|KbB<(jfjzAbi=iX7X@t2~K#~;`Po;)K| zp3%1_97Z4HQpR4xsi@uS_OM#RX$dW$Kf-AV0iF_kRWS}DsdxWgy_-dEy+_*RT!+N^ zCgeQUJ*ve2rn=Xisyb^V^3JHu)Pse!v^tywck_`-^b1F8IqNoAGY z45{$f+fqcX=RWfE+((`E+(+1R-T$!X8qGiN!P7NH@~icr9-p7=LCQA5iV@3wcTW|S zDWJOo>Hbi_G)Nup?ekLT)IKA0=>1Po+XPIMrGQF+-1{E|jz14F(NPk*&SNr2UFeCt=PJ-uPqVgTdG#jYdxgag6ez}KPMMTxB1!YjN$K-VL`MpTn6lx0f~jzlcfy@Q@&MnIjz#3=4apx`aC1afUd1F+^}YActe9hZ zV9x#1W=#QNOqnD{N3v$koiQVaWR1CZj;TUt|AL` zgb1Rjg3HHqsc*P6e{gC4o0sqZ-Kf~x_#ZgZeO>r|4rBP z+S}pV;oISVHk_^w{@uIo|FQe_b^E$~-M(&L|JXGtPnCUHTmzn=GRBQxOc z6WB(&63_p!4VUl#$;MrlBoS^OxHWM5!mWcl0PeucH+z1=AT9##D7d5HHo@Hs?pV0v z;O+x=JlqLz_lG+P?i9EOz?}+rI^3CXXThBVw*~GzxbxvIfO|OHBj6qd_ZYYf;kLm& z4(=kjok<BUJJCjW*NlD43J4{JwnJFomDaoE(@jZh{SCf1S(I%>55;hOxoK7w-8WD`g;Kv*C`y|6|=#Y~QgmD1`Ul2g-P@KYKp|WVGDk zrQvE=@s|Y8zLH6v7z>9VgFDNESHkV|;2j)3!Qrj~!y`ESIETOHa1W8;p&Y)K!z($w znZw_3_!5VMR16R2@N^FU8;3V?cpu;;@O+~eAzgfAjF*+e&jViNrHzX}d5bhWj#dA0 zn)|slpL%dFczKg}&>;QuX#95+ucNqyVp)VV_$!?xO!&QeBek8=R!;N& zMW&77&naF(@fM2Tqz zatw0`SrgEC-?_PR9@DeFI2Oow&ZpM}vGmat50&{7B$xkjf6!k+jL!BT){m(2IxDjv zn5BP`;yZ4V!*?J)mL!n^&`lVhPm+{!@=3CSV~MP*5PNkLue<&p{I9FKc%J;i@gbqh zzZOqwx-k4GhgWiVFNbrw%Ce2R1oixOPka{+ujKGa4x>KzVy~`lc~#cc-gvLB{sP9z zg04(g|D`L_)o*w0TtA~u_LlSau1xoS-IeKHcUPu+#coXZhIeD*J-Hjxy~De)FP{v?#6WQ)^1Gqe%FoZ-qvnR_XdYB-5Vdmbnnm*rh6SBO!qz%!gTLn zLYVGd7s7P!wh*R!8$+1x{V{~;-T(vBy>W)lb#Jag?u-9`{#j<|TxWhs^WJ?^{7D*b zxhcNgQ_e$zKn8dBlsQ-+f9j6ur_eNSQaqL7&nccJw}s*wnTHflr#LVa@eGQ4Q#^~} zVHC^u>@`Jk8oD)^_haQj{ssdBiJkW1`qxFg2RVlDSvs zdY;GQX&NiV`DRAjCvk|MzbSnqjUPbqQ@si416nE!Y}!@5QRiDoA9b@hTQ^35jHm=Zlg43Q9IjP7wM!f z%-fyI>&0GOUDAi)r~CYC>2Q8tJJ_f5aT?sWqkX=;lQdr4{(;{=r_T|4ZEs$mBSzbs z*UzY15PNltH@>Lv@9T}tFoeB&BX5**CF0EmV5Mu*B150`zJ6xkeSHJ z3G3gv9?0r1^C4L!kVPJBc}O7J`*$t_es{1k^OKq0u1RL`TPU7D@%LQ(!W6`lDSjh` z#hdR$Jd@(l6wjsjTZ&(}iH6bv7%z{=6%=Pv{P6%*W(&o#EgdwF#gC$RB*oJymPdIT z#UD|8F_ooXpVoO_%uJX0GZOmnKhrzsRcm_Zd8cQv^dE5eoCjxsJU@^rV;``Qu4iI7 z>YK`m9E9g@)loP4k=GzxAc zfeJpM=+b<0l0+!@zeu!#zbCyEe3~RE_zYc*$@n}eQ1AsZM!}bfO~F@4k%9w+QU&XU zNeT`WW+^zF!x6$9(s5q+D{b!uV&vkz^}3KZ9QNkLxnn-u?^C|@63{=notD#6K>pNw zFwT{yJ(%&Nmtu3~lQ@C#Ggi{9Rq;edi2!XYmH8wF1k8Wmh7 zoKSGN(4^oh;d=#F3m3Tfiwd43v?+M9aGgtoj%RPYsNkuBM!_=#oq}fyVG6!ih*I!u zAy&cn3Gsk`rLq@GUo^jj7e#I9ewxQ1H9L(_H+ET>L8veot7f;P-{K zTs#{)A8=#m6JfoAw{YXAR@kB7FNNI-t{3VRd{Agm@G;?-f{$}!JZ9_ajAl9#3vOzU3`ws zFXGDzo+YkgbB(x`%`f7I3Z5&jSMWS>vw|NKcPMzixLd&wiS-J8SZv_p8@c!sTznH3 z|Gk12h!+*SQ2bfJi^MhsFBW}7FMd??RqzrqK*4_!yDInvF+{;HieU71M78D$X8O1#L*2RdBJ2*}eCu zn7%Dnv3a~gwOYZIDmIT#QQ_Pz&yR5`CVRbA-oCi8kGyj|_R+_1Po#Y`Q-%8|>=TvMC`iqLKL7rD-Dfo4c|L>~U8t^@?FWy(N zwaEvnGNtW|o*Ua+#aALgJRW;Bi8nS=8A2;F0HIEUKCoWJD}g&vsuIP9c0r)Q4i(mRPS7ti$h z62klmf1>-I+_bI*#GiCNcD!Rb)`KNV=M!`vOxMAf_c2;;9L0~*Zv?3nFXw1@f}?o_ zhyTps7r6BQMs!>})Bk^^^yky^|4eQ*-h(-s5nBf%ewFSKljqP^Xx^&9GDe!`dvKIe z*Q*?Dt2w-eqwQ^ux9@PgeU&gB_&WDZWF7ZSX+N>!8msuqG?u9eqN^Wf1|Q-mEzTe z*=DSdZj=pv?nA7%ApU~x9h7BbJ7NBc?Uc@Fi;P*{eZk4YPEH;UaI(6KlY#x5kMsan z&R1Oj)^q)P5bE>dLvVZX*L0hmj1Lp$e>lSVMGuowE}q#f-xB7>Yb4D7_8rwtGCoF@ zD)=~Iez_BzJe;Io5@dV|de4jhi?FrcS+3ukK|;Ow0<||}`~zX@zKgV^t=HEV>%rMn zZnXmLbCu;*!}%^WobN)z`7X4a@4}bEejL_w=>w_HS#Fn~aH}!p)o-yLTu5o_DwHd< zbrIN_r3~mt5|~j-=Qy z0&!1@b13dj@k10RQv5fHWu5jV#TgX;K=ELTyNpC!K=EjbM^XF;#WspJQd~^&F^U}& zt4GoO2^42gJd@(-6hA=mDvBTa-F@9BN8$Qz5ItY=6UF)TJb->QTkG{2je5*ZngYGw z+>5xin_Ve0pIY-w?}^ACns)*{Yap)^@8R-J;POu7a0Q1exiw3bVxw;5+TtQNulsDY z-l_B~jqD?uLhGID!OTZAm8)wShiequ7|TREp_-O?FFl(hmpO}T%e`FQ*&M!)!}oLc z_5;+WdSo>A(QMM~7VWyxKe?3BFrS_cl4+Pn*gQLrw(IrLGRC=5{-*yRVe{;Kj-H1& z{0PVA1>E{>5sBq!K-=Tv(Kwe4p=Xi!xopR1hTBK~>&|8T+{Djc{}c1n;4w_+^Yg__ z55_$|{CMZ*m*1OHuuK~W&0}La-_LWaIqp3VJ%d2_E_-kg&^zGn&i5TXcsH9P`1lvN z^xxegFON-ySkCyH;`0hoZif;ZjF$<8I2Q7`F*{UApHEk(UObZXjf~>f!lSu8LSwi+ zLKOu4_V*RyxVVcXc*ez6j!qXL#OvF~afCjTKT(?HeR^vtowLb;px{n)$RZ9qIs7QM zf61wopAV~IJRz}+5f8*kx z>#%1P^;LH(VtHO3NXz+<UIg zKSnL3Z89x$^DTWZH|pM5R@wK$=-JNI)zQbo@Gj2hxs#Kt-JD$Qq5UY+v*VWZL~!&V zUPkHJPt*LB=H18bh1<{3@D)dAJ;#%SoD3f#Y(L32oNwo_vX(*r%s8$b=BqhM*glX( zDxq>)4%|}qoLpPH*gIdWwlaL&dV3zh>wkJ4;pYo}9zlJM*sISGd-b_D%?lj9G! z)7w*Rf2_klu*tS)LO>h2XhYc;L3V>K@*9h?bQdSX9d$LsV>n#MjWsLh)3$N8%~&e` zp|t#wxAf0@$4IOP$Bac>O56%i{KK?aC~Y+) zAlOUWG>*0!j)v(Rp2gwW9Bub;wB66q_5erQ^naMPN=n;25A%8H z^y;e@$1;3)>}@@U*Z&E7*o$vv5C5L+`rpxYUObhnSu8( zpG?_3%qR2GJl2ty=GX-0lMyE}pG?1r z%qQcR$b2%-PGmlr-4i?a$?)qkbs6fDA*52#KSPv$%%|RVwtiu@cR>dq2|tDM+(pYD$CW>p)5GJq@;myA*cz&sp6a`& z49jC{x2+yNc=huDu3p4b%4DAsUJJ|Q`H|Jj`;^MKdL7(%&oa&rQG(7IZ;l3P>zvXu^9alc$<+S`{ns+UwEs5i2 zGFN5_htoKmuAHs7v918FF2w&y>l(z>l}YP5?7@sDgShguIGo4fA^&i_O%C*>>y*5c zJn8x0rjQ)}y7pmSIa?dzZ|vYa=>3hIf7Wii|G!~F;%~4Z#@}GMm92=sd4d>!^Ms$r z7nOIu&fQv$GGL(ihjJXF&yyMYHiDlzOmsIAJSmp<{GkQY%uwv0%h+#@)pc5hbmCE-{o}RdkSs&E?| z8jf>(J4MUSuEa5NREg*L-zXy#~kb2MDw z`sfF4?SGNu$tBJ%y3F|xf8x%}{;c?!^I?u=`v8CA&d*-u_KCG~`@{t9oSMj;O%sGN zF1}L1KHT|Pt-$uT`w89L)b-lgNt9y#j`zQ-MI5;2JQ@6 zxWM*|MGD&$Y~;>w_TaElIKsuVvz#XGEN3r)?GuX;TDbVDTznfB&(00S3hdmFnZtd# zJ!A0#J44h@=qhxSz2#JvjMOGsSt;8R{9asdTTni|O6TJdW!P! zD`87luYUfD<6Aw4k8t=~j)x5#PmT&~oE{U{*gVd)u}QFT@$6fGiyM#M3*`zv&5g&i z+&Swr+}Y~0!ovza$DOmjz@4-HL3oYnAMQN$58Rp1ivruXc}dv9#c${0*aOXfT2;5#x?yU6B0^6VYi|{j-=2tGwbuJAXcfZncca`e-uj$$OyegE3 zZ>T)TKFn_f{Vim}mm5>K@)%u(SS{}B7EBzp95p=yHJxG&J$v;a#aeoPYAMCO+}SHX zk;#dU!~P+e03F>EEzbE!$r%{#dwlm9&KjB38f_8u3AYtfH(lV>>;oNM(Z?7fFDBrt(lMmKuURW1*Oi3wex`aO0ws8yEL* z<6;6QClfhb#*GUHH!jM#aZ$;Qi%HzLn9PlfshnKZaN}aSGA{nnvEWS~>%qR0=$<9< zLxXoL+{@8Fo5S~s{I?98TTL|YBjPT|n=*->@uB=L@L<-)N4RnpaQG4K4ESPhd_BVP z?NRPL_~YETTh8(GaqevR3hr$9$_BBd!d(!76m`W;iqZ8 zIA|Le(DSqRQoQh%XGp#M80*1{Dc}Ao26PW5&(gdvP(Hls!6p;9&Sk6<%egd_T$*Yw zzJ`lu^Zt9BetVzOZ~q~(dH+Lkfx`0_Z{qXkG=8jF3SFL82pnHy_YxH0vUI7-34aC7~yii{yW*p`PV zJ)+7M>ZM2I&hV-@+=atkRgAV66{9Uy#q@w##q9hz?mTZF6{G(S?riS>72~-@#m2=D z6>CeriuJ`v6|;v&ac6!jRBY^2sn|Z5X)0#xPFF2a@C+4Olg?Dpxt{i^>XzrDz4kz? z2d|<$d_;92)T@6URH16dosBmTD{)Bgaw{s0G7WBH%cel&S7zwSn! zB+z(vuGSmxEoa6pF#o$@PEM8(TdEQ7RLuwrCS|nz9rWD#Ob=%Au#=OkT^!!c{T{+j zPOj>>v-W#cZ0_FA;jg%HSI>>RgWR|~M9ZKwru3$KjYfM&KpM3^{lsD`AV6WR2aXo8vAw^9oNfgKYmH&>RF0+Q@Q$g557_7 ztf6`Ls(9JP{#sAdAELj#@Rm{8F3nP<-ix%}Mi1ue zUEc}DybXVVQU1~A_C1yVA5|lOhi$a{E8P6@BPZuSarie*ul~sWzQk2d{;#W;??O`j zFZR9!Ose8)``(`JMvV(GYK$6#hy-zf>D${(!Q~#detKVOoZnvAYKbMMd0q zFt{&4#JI)<6%{w)f=e_mS=^0rP28hKO(f>8b836O%YbI1i8DDo73ePo`iB7h!-0M) z(4PEX)^o)Lb|;EwP|z<>P?wmv@s z-fXx({_Z>2@_q{C{Q}Cn8p^v>jiouwr0ooETchI~72cu7(mxXD_p7n=2h>>lwKbOh zIG}%?Nm~eyGjWRH2?oywJU2Yi;9~*L3r{upgr!QeB)pF*5) zSmU$9TN%6{Jka2U;aUhE3gMo?=Y>-S|2(|A!HdG9!?xbe`=PD3aba6;6T-IMri5+1 zb%kxctuSd9g}Y3g3&JI!{~*xs0s3=+{z*W8G0=a{q`fe_*u=Rcywu=J!^7aLegf#f2lPJz`dzneclCKO6qY;1|N58vJ7Tp9a4aCIyGYuZK4^_>FKsgWm}cH25#!l)--uXAJ%z zyt~1lg-06vd3c<`e-BSI_^WWE!T$&!WbikDoycJZyODN-!;yl)k;p8AH;No>@Wzod z4E|2!9D_HFTw!qE$P$CM1pK|o^#*SpdB)&vA}<;I{m2^z{~+>#!P`YXkJ`REvY+j% zU)j9e)t0^+?qmDv4t+qrGHJJu>|o;T7}>FprQZ(p`}eW*2llb_hXVbvK!1Tr+b=TK z#Mvn_&fr}D{}}L~$RvXYM~(n~uJ32(q9Y(L8}5&P6Y$>x{I>!BUBLfoK=Y3#?QW5? zOq`*Sa||99xy0bQ$P$BNk);OD0(?wlnZa`-D-1q1^02_)nNItH&uhx;5v&vVrUrF! zTIMG?{S&i)**d(b*}rTZ#{J7D6)>gMay4R#QxD-J4@>%WK)=pMe}Y?%Dec?<-eEfJ z#S&rKj}KN@j6=1TOok@_&3Pu@y~BMV{3W1Cva5`90PuEzkGFxLa!hF(16b0T40I;@ z=u8cjV@f-JEtuk;0^uYRN}W$jm~>P1($G3i^R4eq$G&;PvP zZ4vOc$j2MWS3yiXbOo@aa{^YvK@aF?niCJ?R8Ul0MH)` zX=x3W@%u)$HEq3R1ob?$-btRfi&&nwiy+URN6RtM*XxnSlFp7mXGb5M9s87HE@Kr; zYfX{MxC_5lF8Tj)1octlOumC5-@(3okLXj5iT-I-@KV4JD?C8q6Q>hCA+q^SeVvPW zEtnUHI(m&bfiK}mJRk6hk>GueYnaYik->(}nLy_(NV@>=!icqf{5)dyON$~_Pj!C8 z>Qpa?SewX25o;5L((r4E{}o zeD9~)Xw2TueN~?ExFcfEJKYf>o6BU5vpiDGFN*fzKS1F_+xRRTx6v$a$KOIfd>Y#B z8Nk1b*mDTKhc^8qwBz&8KmQmR0PzPw_+SXPwy+nWtzU+|`buP^!LLS0A3l%E`wa7N z1@r$5*U9yapY_dMSPxp4K0x8yxE|i%GCs~}{~WQlzc--lZ$kaN4SoI{sE2oba}?S8 z{=oD{vNUV@UJ4)9`tp@>c&^Y-1QCA^S@#2J5gJQp{TV9 zh5<*S)~9GRdL)FmLwFa^JPpFnfN*;rc%!HtFB?bgS*%T>*4Fc#s2w|-M(udnENb=q zn@7n8v3Z{E9Q`d)xA|&ifBBT#NREZiBEfyc&^+%WB4~@G`q?W_eI^veF{0~%`Ucul z76I0FkO2zslV|^jQF@nJ^0{Tyw%t|+Q+zrQa0tiWmcvWT+xMfkFKr8Hf8a|Srhd+8 ze*|$5_w&W4zHu?f9}+#n@HPbE4+R{L+CH3&;vF37pSLod;T&JyiO2xY!-3B3J|3vw zKE`QBM0?D-yf>sB0cl499u>9YXmqqc#If_nm?)e*j@Ci^1ccW^xLxDMM)w9jsonpS zr!y^+qKh_L?R>^OPl-Ng>TL?}b|B!XQ9Cw&8nxr`ps1Y#4~`Coyy%R|7Dp03Jo=TO zzw41yCqIjlypdGc&N+ueUQJMMhetPua9dZ+Q9BQ`M(x^~kJ>X!?NK{_c0}!Yxvr=^ z4|7zs)!<^(p0_MT=Rx>M2G53hpeJhA%A=$9F2FH7_V?y8W~0?)Bt1V2Pp zvaXJclAqq`3fp=<9_ng7^yd?!cAYvI>gv=e&9_=-V*A*ST#Ng`8Snn=3smb#Y+pJJ z`qdfHu?C+F^Xe?e$|pT=24fER@0|;0EzW`Y_GG{dxGm(oH!m7IUm@l8(|mPHWh`-B zomv)t9EbnN-60UJ+hX?sK9%F2&2;2BinF7rqu}y#oLTHUVlm@x-+fq|W2>F1K&<;7 zwFAj%H*$Yi#BKd3)Bib)mqpMA&Ih~*`oQ@xb}oc5dvVmRzn4S@LcS!2Jbxt355I_B zB<6>|Fb~&8&*|US`8)G)Ew_a`gYb1cmN#X5J@9q|@N*;Zb92=0HI@Os4d%T&ppPww zesxFG%CvVz4}r8t7<@O3<$D0%3+wwMQ7Z$lg0=gRsC@(IQ5efBVeS5Pbg97)MXh}M z7~sdFTE5kNRo;KOnfucBXGlzE_4_ftCF;}9Kz|_qcb!3N_x--Ldltkw53tU6fWq+^ zEbB%`?%dZIFYsdLx3H!>4Q=!c%hrCrJ){0kl=c^Tj(UA(s|TiVJr~(24czZbRlKHiVobMGHS?R~3{qi-1eN%Sp)KLh-Cz+Xn;Zb;OgulOSR3B&>4-BEis z{_Chc1OKn6JumT1)V|Z?^s#3o+&&qDYx?YNaJ0`jgZmh)`|5$*-(KRiRqFa)=5-{; zef1UJ97ydh=izsFy?#ky?9W$Jz|>bCu7D}d6A+G=>afH-e8zqCIL4p*@_Gy6k8{g0 zjSG5<>TDhtoAp^B+WktVvuPhIZ*11bj*Be-f42|Z$M0j;)@}RrGkCi`b{^ZIkKNP# zuupIOKm2M2$^84dE4NtfyvTT>yYl<1oxd@D%w74T)lRsb@Z;{o0&k=6V*(Fi{Dk|Y zzg?b%v3$PtB*w>q&yC|vS~{0&@riKf`Xs(v zy@1ostNMmZ(9hu&%!BktbT6kp6?ixec&Pkt3(+B2<#DF7$a!6qz!sEZg8rd zOAq>r8N+3{(-|qsauBCo&ipqkZ1cSn%5oQ!-_=EG*#QoIt`HlEK zY=-&S819K%pDO-$KsJH5A+~_GcfSihcD@JiQ*R0P$G->kw{k7dTf^P(ZCon@e4p=z zkME-S^E-TpSB{HK-D=|^1LY+=mCM`DtsU6cnb{@xvoyw!R@l~mKPYeiD(`U*gz^r8 z^6m=v;s=9%U{}x&42FC0yFnRi;V%3T)*+n5yveu1FJauD-$$1F`kkxZXWt#lPWT!w zd)#dssQb2jH{{MPiS7J`?}H?u>`5qZ3fe9W?<3c{!7=qP=R1aJ%054uX}+wmt@AOE z?>>OXL7y4Vbt~oAv2L|>E$C19ugt?l_lkjf+)V%;_Jj7C2>BiWWuFXv{vhb92SYm^ z0&krh2EGe^26y}qhkN~5cn|sr_XvZV_}yn&#{IdBQeS-lx6x|mxv{EGB)w-Jpm5|U z!g)9RV_o((F4uNPNo?ys4`rVTW$%DK-wFM>i`!lH$s@TAcVU_{s`km?IyIbmJKC)k zyh(oMK%blgyd4d^9S?XO_*ggr@OsIYM#{@jH>>%HU}K^ z@7=`ZI?X*ylxq&tKNafpG~oYqz~{IjgBQ4V&R+=q^E~#maWd09oq3b|pTYDc&u3Qk zV-WPQb{_M2zI(Lb^E#%pi0Ld>*w+8~z~`laFJs>zGT#fhuRh3WFXXgOD;%s_%@6u8 zC;Te&a~0E<{4553mHoE259#idG7s$=`3YB|5Di2+tple-ziAkTOYPR zDA4+T3-d6nz;YMNb<1I1y%YGn2l~T(&{rRVx%6Sz+9MuuM;iPX%qNe#q%WFSpz(B< zd*gu0{_rON&x8+SKA!}B5I+Uj@8<+`S>W&Gcg*wb0WvCQl5XF>uoW&#S1X^z6kuh2J_PEP=|kpc7FqW&b$e}W!{3fy58pZxg>tqon*@L zQq{6dg0c|4iOce#`?@I0gUs^>&{sbMp8p0se+qKZ7j8cYxBPz&zGA-Q{vdh#h{K;` z{Bc!2>w!421jUyTKjvp}_MnxIbPOvg6c)yX0}W`-w-;<;1MBf7aJL}`rc9C zdt`jbo(b7EwA|ncA$uld68I!(46QVHD)=P%S;*>64-eV9W=)}x!Oif-eJi|cKRx6b z+y-yicZ96&v=iR7KPoiR;1axX-_7sZ59PMrh3h%ZcwnenyH5q3B;m2#?(;*}?yB4U zcxd-|Av>R(5VCJK%!hVA2l~Ug&>Ix(x2`Uk?5U7K8tXTfqOrt>E`&8Tfp-Ei~WYB_V6CxhiCJ`%6Ri?8Ma} z>)+{@(64R>dzdYY4^a38?gLMU3WIeYcoO=+Q_u%~3vK;0^npJ>yZ;f| z`g!pC@dC8_YcSXS3H(m{IRxtt%nxsaUzB&iAIQ7li{>vdSNs*`iua-2KLEc*A3|Gy z9J1$X{s!~Lr=i6Le;%@SoG-wC(U+kI4gN>S-iQ4<^oGH!L)QNCP00G=3e{MfOSs1R zEQ-{SpQ10ht)Jogl% zeV?L5rA3{8q4Zy!KmA)*oqsi5{r|Qf+FMK3_w1K|_vl{x+bf7S@-N zVj(%Po9b5fpqsmGJ--SVd7$?Zh$g*{u(r1^>Ai!qW)U6vuEAZiEX`lcCM@4Ic!;sI z5q!f~zH89Ghp>Ft;6TPwSAQzwrHofFmOAzi7|VAJcA7(2zH2a*v3%EHA!GTj!R?IY zy9Tc^mhT#bk0vbNHApa)?;0G&SiWm;E@Szw!Cj1{|LxBh%XbZacno2w9~;G3zH2ap zv3%FyT*mTUgB6VBy9Vzvmi{CM%q1+}HQ1N2eAl4JSiWm;K4bZ=!J~}jy9VDdE`Qfx z__3Ayp6(mL@Oj6we@n)f9!qmqx3g5ttG66W^JfWk+TAAYXg)b%=Q^4*@8z_oILk%a zXF2W3oc2!&+kMa}KfUkzUZs0wv%xh_{efSUIyl!!}tJQhk0`!*wz76uagLU{auVq#9 z!ZS#O$8uixID3n{4(GHhz!ro4rO{q<59E74*cu*&y1lR0b$jG-yza|>$XNPh{=;$9 z_vAYZe`h}5WW4q9ME?zF_cwvJw|squ^q>8XC;V6ENKr#jC^`@6uWeYc(BQy)8y;}38*9U|f%FKroUXR&E_0qlPh!S?4}K{quRY!gEP z4~DW2gR-YU7nFAG9kEe0Di@S6)|6b++ zF8dIlzESi1y23Kfa9Ll<(b+Wq>=sXDFt04Rd2!95`tuORb!TIOAWrtz24woG9EaO`tK3$!vj`3W9QLWZgQ^;jO7F7N&8pGjEi;` z&s|gB`x&P_+I?+uUuW(-X?tRO?mU*CT{@>K?Gba$+(l_y0OL78#JY@xudje<43ec{ z;XJ}OxKoGeF?b#GdCNSBX$^gZ@%3Q8xB*jNu?{fDf zlkXjz?0n@qkddCuA81c~jO^J~cK zA>W!s`6igobMEqCdX0My;{Oit^Dtk%0Jh-g!Pf8stS`@lkN3aA{PVnf1ccl9=RMc@ zw|w8VXa4^NKHk4}^<5<0KMy=X+E%EpIux#EM@GMhn$7@)=WsnZp?&LgJvg943jq#; z4m6spE&E#TlCy=$4z%|n+7K36fF&A^xJ=D=rPgDI`} z!ZNu@MzF2?+g0I31G9>KV;AR9|(4e z!$Y**x$|k>8y31TFlTNxpV}qEde{DphllX|fG#_=FP_!cYbez%=`)ASC)^x5C#LJR z8R{?xxE1PiI_Pp|aNF&{JmjkS_3a1w5^m&tXNPVw`Ob#Cddm7$j^iH(aS$Kxi%)&^ z7><8xXjx3(i91F51fDOkohMHPI%fbr6?EEXfj{t5q3mZvzd8r{@cE#}z93}xI~PK~ zy2xkOu>Hz!*RV44FG0V34cIlV4cR#j{aRmN#jo{EA$yPPVd#60gsiN!3TzpVhU~rR z7r`#}GU&Qr4cYf!{scbxUk4l6pTQ^p8(<^*4E*qa4*vGP2<>R_mm%`UxOhIT_0sS9 zjogl>b35L};b)ZDyq@6jpNF;$g#V7yF0I;EE8#W883b|y;n%tExiv3&eVwm4FQ>-N zpDyUt(RXyXCS>p?HFnSS1Mm^O9qZLMIg#h~n%?RYzJDU0->V77H9tQBe)<6qI|1Gq z_}LZsNdrIiz|T&-=4ZDPX$~08d5vS(&{YIYELz0LG5<+OiOn9njPY-QuiOkR53`OZm%e^JxV z(76KWT)}jHe3HbL&M(U7B$>{VngNE+l|bi8pmQbASyD!43e&lk!wVe$8upDW{To~Z z^>!`P+x0;6hMG+wd~*o5ZFeL1zW!BBKk74_*L5}3&M5W+J_($7G*bcrx|LNpQzRhO2b}^x+4=9h0e`pFarh%N%0*@Mz~y zcpva^cptEd_jlKDzKw?dO2wxh3&HbacQMZ`&Y*;rbz6YX9N_6-N5})8GXZzP{e>>L zzi<@j-b-+Qp#bk5mY`g-pj@-zt;1uS;J)$+E^nUe`FX}i`tH0{krG`+EoVPS_uU_r=;dFMMYc@#}!!fOdZi+WKv2Ki|Kq9V7~L2*1sAhH@N9X9&<43Tg4J=eW^R5go!c zrxG6SK4|#K03CdoB{gMvrIoHnuMQanismS2%aU)3qbFBA<(%T z^7;knHm?NR&~X;vljqf`ZcC?0Ju1Cncfx7p zBjN?FlXDoq$Y;E-X8bbL&nv*gpFofOI@q@U4Clk&fO+Xnpz{{YOK(G+e+cu^$2>1B zJ58RYr#l)CFn*Eqm22Y5zWzq>f6MjoCG+_)$NvKA^Go3WpMY1p!LjL{PMEjgicSc0 zur)qCr^WTGFOs~4O?;dOf^)*83V49R{h5cofQLPShrO!k36BIG_TFF~MllaZg>1j- z0v?X4s52bx932YQ=QO5s0??TUbWZT;{VYDcjLwNnXJKd?F9p5z z+NHq5Vov+i>AdgbH{D)ld=;FtT?#aB_R*vt?=a0ffadK?lN`knw)5v5K<9xnI$NE= z^8kmZIPEH?GfH7g=TV^Zcp05ZXV9K*1h?;uGf1`?rQ{s|6k<3@h8}4z0UE~JZv!a4O*k$;k55K15MhuA?-Vm_T93y?wN!?fH;Uh z^u?!sxHHE`Sr_rAW${OG{4Y4X+jKm%sSH;HdCBKll(r4h z<{@nd;G)?}>h)p_)9G;%f`>zy&TOF518L^~J`nb#b3mVPAnbqVfX{~m;q2c}rLCIr zL2zd8Xu!vq^Lr~*og<#Xd`_u))^TVR9Ngc{;#;w;X}q}!8zfxp}gn#`hzX|xmDZU>WB`4GnoqjFZ8_&xvu3+RKY=A*+03w7dkJA z@@{!H(Oksk-G%Y_T;3$(3!vREgz{bl_~I( zG1SAAP!CI>>{kI^TBRPYUdMX)CE#oRBlYkzu7~TLZBl)m0+;tXt_OLK={l~5T@|+V z;P*9T@r_mL;aBTe4>tq8{h% zNHv?$?n+kN=tb8jH?HgbtS|Srap+Fa+V)wvZ_@tjz7mUQ{2W`K%NVa>{21d$8B^a| zqT--kteXAnwR5B#yF`qmkIz|?9P7VxWXJn#z&$X&<{CS~N|l#9Lp#ei#&z1)9s6c9 z;huz!`;Y*w+McN;oOFUf6WgMokm2=Rhb2;F}KANPb z-HT~n?Yw08xf_-Y9>= zv1eW0G-s#D_GHhPz2n$(jPG*4m-s!$o+W$Vv1eC4Fz>&U9m<|7`;_~Z#GmmfnR71b zQ15ka-)yyW4%h#E?1S+N#`kldyo2!r>|=1H!qw~@tDt=e|CZbLOJ`|Xx9=Cwj&@&9 z_lzudz`hUy-Es}+jYDofgZqHqJ`A?42-vnZf_p>X0Xx^Ga93zE@Lkgv&OdJncQLkh ztv`fqT-yh>gEP|G!@Zjyg72)ITzfXPKi{>H_5YP~m#BYP&;Q^$U#W1ldJf*5d57zH zS9hEGzRuU2b`a~pH(DUE9m~5`w675z(#dSQfN;{?*3d}+odnQH0-Zg|=nP>x`?=fI z>v>>5h`&GJL&5HIxZ5A-@LOX{C+AKSbaKo?3+VQ9K&KVxv_YTAgWX{U_^)e+dpBLs zc1J;b72te((Vb>+iT$3*@zPrLK2a-_g>c6LX?MF_l;x}i($;3@I<&RT0o((2t7E|C zava!Mj)yYNgT8$Nmsj#Rrz)R8J-`Lb=eh1XrtQuJewLQC^{pKLTK6v^{wgllHQW|| zP4xC8hrXy2P)jNc4n`4)Ggsh{iE z-t-3ZEbo&1Z2`#-*H`uDGZE^6@V~eoZs&5zdbo{w{)58Sm&@%?cDyrkC-mVvz}9v< z)Wbc{*0)1F+~f8$_+GeQc0ZK;0k|``67G@x+O=n!A9Stnj)&oH;3F=bz1(^sl||lp z*_rWj?pLy|?yOo@`rPIKg_8>jKkcR(bRR?iUDfZZSo{Li$@9=RUNUotSbw2EyaHu^ z8Rq$yU=Du+=IwW2?7s_j@}6tYc)t&K=ss}m8Sjr>yDop?+H<6zfsgvn;ojWWuJvuQ z8t%va+qJ%r960;!hV1>gXvp4=+cxxjgZqIml>Wy5iEbAubN-I|{1b;uTy1_pTcM^i zK;iKVX@7U8GfwR93Jb{&b*5>f7DWg5ddn96cdtkP)^)Fkd$e`k-{GF_e`@cxA!iG5 zuh*Nik$+n#&mRuT^mR5lPo6&{8DJZQtxSSv5gP$d2A#}-K3|SBm-au8@FC7fL4OaX zc`%$^JOt>VJt7D9@moQk(*|b+kK+ABBhx&h>e7x&)O$nRQw0^suj{|4}e*aR!-ls>t<@|^R~ z7XCSB2FxLAnonpin-+7(_kT`2^Yeh*)>>CX^B%<+m~nmcSd!z9X1xFTgdbwO>BZG` zK13&@<}1RR2lZN(mH%Znw&s|D!JPyC?GQxW@UVaVX*0QvJxyF`jt7{2M-$$EYM_Bqk8pl}r zKAOQ;+IKEzEPWq6&3Gwea>A#5A0-$|-$!}I()ZC7jHU0R7Z^+5M_)6RzK?dkfw1&_ zG@h~aeKd!$^nG+CW9j?o_l%|Qqkl1$em3fFBrJU&O=B#5ADzlr`aZgevGjfP9AoMG zX!BnYmcEa6XDoe6%wa5jA6>y%`gwSivD|xp%~<+A8gdh1>HDaKak=lKD>+=+zDqar zIV)#nM(=Hp0^Qe9rXA@Fxm}ND!@6^f(G9Lt^!5B1)Dxa{v$XA6nw9OgK{^i5p}pP} zOy>;eHNo>;Hxtii0MBOt%`>a6cLRVX{r4NDc^=1kgK3@zYuR}~)BgsCUE?m|HTQi^ z`*Wik4CWg=fBqHc`wJ&DysxvxE!N&AY5L#es8&D0dfxUH!nZj61kD7~l<#Qlq43rM z@2fD?=TC2;^Om0PbQkY^ox@AWyZ z_oAvd8Ve^VO#T1dTjcyhb@D3?U*?dXiWQ7+H}V*^9pSNn52=7(58(5vVC|D+fWl93 zA9%(2r|DO(aKG9^;Z02+c*P;z$e#hrKJW^(-7C-sUIqLL%n7f;obU>ai&w$!@CwL* zuX3L}0r;uZw}W>`Kjw11?F`txue15B!Lwv<18;b)?62IS8<0O8(BXvGAH{ae&pS+i5aV~9O1|X@Qyh=ueCR8?=I3?j8-%9-);f~`3J<@P z@J8;@qE03;&5c+WahSqCFnn$Vx{HnBT>2)U$J-R}W}wH|9P~L`fKKDPpxfCJbQ<3S zoyJz6)7Tnx8r!-@7`z?e9o$xfcLd)-{Q&O-zB>kh4y3 zCWA+~cNsj=eazrd?n?%b20X@n-QcnAdj^klzcP3~ceTM20Z(#iAW7T^c#^v*gl`4m z+d}wu22XbT8$1Q@fxhse5bi;E0>V=U|J2PGe3-kZ!9N3hxI5b5tUJ!&7I%WdIl!&% zB!j2BjSy$5!Fl%}gO7Au4Q_Y444&!EHMql_Z*Zr3hQVF#1qOG!7a2U;y~W@;?h1pC zb{{r)uKSq5$GLAAe7yUf!6&%nbwJ`1-R%rM&E3J^(*d99_A~fwcaXv7xU~i^aK{?F z2=MvtM1wDKCmDRPdyv7GxJMX#1>h^)_L|CbCSrU`_lN+N^XhiKcU6uEV7ZR}i08Va zIDS9YX&=vcC$<-y$+*AoeUKi&uK?C#vl709>Fniu*F%qA;+e+m)f{KEFV0I4=e;U; zHRKh?(iJr>8vw< zP2ulDz7v2B^+UAaS`&-e^qo9ezw@y7x_Vgs=5djkY62>dy(t=G99?4{S%>%jJh z_9L{R+ySQ4+t1*;V9mV~*4(?nj(iu`n^u55@osnnWd*Fu_khpF zdtr@U2{Oz*uwLH_w#b!ipW0{{$+tJKZDp%vR1d$Zs;k%Q`v8S^Tt@g^uAhB5?YrC` z4po@iH@A#r&UeAC{Vvq!U%?Lb9@rv3fO`HA>hmM0!%v{DK7~5@3~a2QgG};;YkkFk z1v17zjDIk?!)5miUxUBF)$U4z{{`~EH{e(B->!Yz*9D(BHQ*~g4E}Q>p)U-MhQ2Yl z55GMjZ76@?aZy+%vDQTg+eQ1^8KCen+%B7uXzVQHw9?<#p$c1_wu~dO^#c~9AG|Ml z=`z~mwsD*#Kc?_4L*w@D>-_%5M1M=p>pg{SURy$5`@tUb0Kk)BPtjIU|3J8J1x$Qy zRRyEp62kXz{j@np?A_PoRjuskheYER73a&o7QeOZ+odZ;+tagytWI*zEhWBb;|Gv^Lz8*{N71W-qYax-szw#I~#Om=kS=+;qxK<6yVdIC0Gc0 zv-4PQ_RMWGu4nPQ`l7-#m%hn$GMn`qA9Hw*nOB4Lycp`4uyeaS3;KJ}XSTlGo(0|c zc6$~yt*{*n)y{=p0qeyQsPn7fZ28ro^ZBKz{~({icTx9cK5ue1AEEjD74vzx!o+7@ zVaw-Dz}u~WmjR#4fzLaE&%1%o6}{%OoB6z-<48X5V?NJR*z$QF^Le4d_N>(Xz~`?4 zKL|Xp0-hfQp8f9#_m<}+%=2@=^RrO5&jQcS0?*F^&(8s$e*pYP;Q1xs`DNhwRp9xx zUh{nC?ec!>IMW}bPVy;*iRYITw*A4cpS1Wr;PXS^^CQD&ke~j*58-!jmv>r^H2lar zt?nHX_c8VPcjhOru&qP9_ljp?{|UT(1HAnk>d=L=uOYX$b-3vrgg0@Q8lE?HEzcXX zOnasZw>)nQ=lc9_E?c}g>=(8K-RAdTkFYiHyiKop9>_fJ;M%^ry=%wU_O9)#+ryc< z9e}qV`pz*@+P#?OPC&DtYx{pcpxF;-?gTXZm(lzw)BLgfnyK4efX`ik=0Mkusew?p z{&xg|^t+h;5ce%Ze>dQHH=th&^lO3s5THM_jQ(j%KMr*w-(r4BVLQG&s1yIY%ogLB z;S}IB;QEShum=0X`i8%*%7taTlFPUUlyNxp|KYA3v%5q8-yQ0358!`KzOW(h_r(01Tux(T z4A@M^8lFe9Ro;vdkX3#H`j&}c!<_(U`3?XXU<$}lQ{g=z>04kN^RQ3Z**x9ngJ%&B zVg7&SY&%l#C4UBd9$_%WC%sdVWT>IUECY=0bfQ3-;x?a9-kgkeyC|J@tIvV@iA?;FI9|!=;Wr1AnDC z$4+~hlMKGvu{O8T`J}V(X{+napaQO`I=ls6O zz1(l-vaaKa8yCA~di-S=Ks_yvxCDaU`4@s-YZ1^$@v67KW=V0;yi<{*CDd>3Xc*P*Y!z zI?K1iU4#?vB_@9Ly^L*_G}s*LO4HWSp}? zjFCUwC1p!1kD*LE9&ok0Ifp>nL*Y#0VW7i59CTktfDGIOGVnBzft&d(rF^%&k=M#M zna{~p&pihHnS6Sev_-xn%DCm-e0GBQ+(lt4-?l-yW&myjdAV(o9Ufko4ZT=r}6!OAK;nhAm-;*u7??ntG_|4 zWyJvs&*m~dKWpZl`Y3gLFo`zP4*z6JPgz6)^e3K|m+ zJCBKd`otX7&m$G(Ucx$Gs&m|H=sN`i6uz75|2=1xssF!l{Xf4#Vxs>MJP`uwNR4?ltR)RyiM27eFk$ZrLAwOjvRk*v(b>=|$1NW_+W}o{lZ?gga3Gl8D zSUeH%<&2LB6TTb5=dQH)Ux2IePz@&@l>8Tj*g5;b%4NCtK}&zPhb!lG@57bT{#%99 zSnKX>O=hGO=^J&*JK9unTjOAIiKQKO= z@%xOkjOoDdJhlJ&!75v>NsQ$l;j~pW)|T=(x_Fh;ouUmwuLU&L&Jl6+7+f&kjzPlT z#xbbp!|{O62K+K$8fzL4RalQT9sU4d>bHb-zt!Q?4>kVx!*-tkztw-PT2*;myt9gA zhU?r(Q~ElaK1zM*r4aR#9UrAW_9CCP9;7h(OZ39Fzdg90?QdW0XZsuB|MoZe@7vhl zG(V<~9oX0LxQ{&*qP{Vj`_+@&$0jO_eQYW8vCA6!I>l1=v_j|1q0P>)Tu)bLp){UEqYx?YX87LX{E}3(dn+p2KY3)0>;Utccl_Z_l+1b@CmhOleSEZEV*)3jAky zU7c5F{)u0)wD~vOX>MyOaC}e3_eA{RF;9GH@9db~Pg9Hcj#_s|F+aT{*J9EoAYGj= zT^!SKUS)}s>yX&TZOSH$)m8d8ye?hoAJQu0CS8r2SQT2uHqj+a@_L!Pe%Ikc;$Avc zKb-#G#45|JK}K(&=13)z@uY|;W0)3;)hUkZ1kIRNFPqI!vhj3RAl8R_NkOW$y|YPm z6VDVYA-*~-o!!&gbMljI^m_Wl)q>v>{_oTW+jBjp2r>^-7g5XdPcKGrzN1)bYHt^R zo7=lva>JVEOy@x={>xH?p>69yq-)0X=FW~*BC-x765y^M77MciUOLMw%>qVwmYH7)}Qd0lKPxE?9ZdPZJ z)90IWLmC?DQnB=qX@#ba=C)zey7TQVhT6Cx`BZ&sNLTZa_IyWo&yeXI-NV}R(}sz4 zUW5N`;nuYipKddAo zMTf>YG%iBLc-Mgm9d-R1YFbkhBi$)pM|9ET+Ouu;fh4iY9t2 z#UCVh4JNt@PI7R)jUM+nJf#bxqO0I^keO71!|ORbZKA7SImM)8uq{!Yk4kfAx8^<; z!))<`SDr+bAQmr6qrW7|6RC2Skj|FWib#oVpNm8bf8 za#u%u=xCamD`uupuqb=3u`W|r+ZfBlY9~+1c(sl3OuV)+kxA4xCNs&}##AO%+nCOz zYa8n`^|g%+nFbNLE)%0PB2i5I@iKx`V=SJDiIlNKCMMFxl9`xDE$T8R(#O)7n4l1= z&%^|cSVJZzsCac5Pf+n<8Bb90yo@KPc=3!UsCbEtC#ZPIj3=mgsf;J6cmjM)o~q?v z>DtMnc=3AiC!L8mh(Gn2M4kB4kV%NzpkgLG`Wwq6;`Guc)OI{Y_>P zL`xJlLBvF96GTlEH%a6~d6Ps>6gWxrM2V9`PZT*x^hBAHL{AhtN%TailSEGxJ4y6J zxsyas6g)-rM9EV`PZT{x^hDWH@mf*Plql$=Oe$GB+_baq0Mwbe!8cGQX(}|gZP1cA zOHB5P$hZ*`vXh%;a% z)tr$-iGPy(*HxTtgG8;0pysCTV$KHE*HhrETyv?jU_xVFos=G_tVho5%1-N6%UGNz zdhv(k&vdHTmEln<#n0*bmlQrr`e%xHDa6#z2IiySsh>i+=HChZJH^BbN&UOQlkw|R zfG5jV@H9a$sVHiao-9>CbSce{r0MBQ;z>nR=Mt}1L{lmt5mQ9dIv}Bl*6VbocWz#lI`YqI#pJyvQAU7PSe=BvHIb1LNu#ptk%rkHb~Cf=?&@7({mlULf*`s z(_5xxyPBG3?hIS%A7AQ6pLWKo7fDKl1Ych*Do(9%6~=A2$BJMx|Drt2t= zPx<9L^Bwup(B_^VEeXmU+ulXdBtv2;*vKhKLi`bRZpG9(7A1P4xX5N_m8P|4g*eRO zy-Z8fT75R#l4~zDWmrU{Su8a?E5y5&T#pJ8W01qTT06Ll#8rQ))4fem@Kk&eDB=%a z-)%^z_+LP9Z>S)*H-Ol#1@wkmpPZ-#>9kJn7o^i#z77h~X+T_#7TwS*m%qtjZzE|;UzTEs4sqtjZ#E|;UzTEs4s zqtjZ#E|;UzTEs4sqtjZ#4$9GKEnt_)(dnRstpwJz92HdkC`YHIcukG&m!s2Cz^2yq z%h72mU>ib4j!sJfn_4U&N2jHPZIXZ-ot7dte_FpGkSi2A3u3}($rU$9!N7C`g;AoO z#}o<^J89C4`8S*S&TLy#M@zff46Bc#KGuKuik*I`X~UEmErnUxrmno8!F{Bqr7*j* z&>~q()XL`dR1ZS-6Fj6j3V-V=JW$0zhQFuQM8KD@ zTH91(tXh6Pa(ZPHGgx<*5P{{;PLmK^ueV7&W~B_Qhj~VhaaCjaqKxI$tJ+U%3Ajan zX;5Dpv>@ElM3N9sE_zSYk?SdCb&7bMO2Jz+xk(b=`z}_trYd zx3|`T{=KydReNjQL@8Prc9y)<(w_u3llhtCMmIlG>TBB1_+JH9*~L7p04o{UiM zFGkY$ClwgFK!H9tR88wkRBgOh;ipPgK4Rq>jufwsO1D94sMT%oFRR<&pH{cQKdo+q ze}Zm9{5i=f;<{_=0Mqr8|80Q(i3YGEB+i2%u0}{)#YhF4 zC?5D5l!kx|e^0N8fG=USp<9iyYWexd1r=#2xsRj24MA0!*+hyhg4lTQ%Ai%6tl_Gk zEtc_IMyXr}D{X75+_lIqSjaU=HEcpfNZJUpS5C7;QYuc`#*tlhnjurKqBPhjN+*_U z7t=AviPfn{G@x2}Q?5HTSvY93m7gwSYPMs*x9ac3KvZ3T7?dC&JH&PWh|6g?&dog# ze{25r?*{dqq|!izmQ`S-3ad~-6)U8A1ynC@#p2n1nBbn4Q2j6=V|cMZ1=I)rHUzpk zP~r668q)jHRU01F*s7MDkDTuAqOWIj9i_q?7G~qT11QElGK@%i38STzLS?Qiiyu`} z$<1z|n9)U$twnl788fN614-~o0jrv?y|Z&hcbANn*0JiL>&f;Mvh*ya<}(dhYASUX zGi#GrIRf!ogdJL_R49AQ^8lSw2vGoiSS5^}* zZd4ysZ`tPdrecwrrA}_gVybL)av!xb0T%iAJ9CsSOK(MYA62H3)>P_M8?TWHMQE@o zOtG>MJ2P35ak8ZLF6Em!G~d*oKU)0i?8u64BI=-6Ds(sV@4AduHDqnnT(&DSNh|Wr z9!iJoGhzRcLSi2}erTehuC8uqmK5Ast>DgzjX;(a+>8WYQo)^73hr#NK%rW}eZZ7l zS5J#!qE{OBVy=)UMSX8I?1A{CVOL6b`K5Q7{VKXN)=6(j@~mQ_t%BN3syv_daqP9y%%qPM2d7k@0F5zuawk# z8H%Ir_XfpcoizHsQAZAob#XA>jH8f-8etSpADYVAeYBdK=OY&Fyo0il#CM)R+8MGWGqj1&1%w1Qg4Tn+>bQDO5#jX_oO6u6%!Sk!@uft)HE*o zN!2GRF8chje9=$pUXirbp%(unH#mRtVyd8JYkyMfB9knE7`}1sPt7i6ut{kx zk>y-}^MRQsH;}@5&e)2EZ0YQb+#FI}kqO&l;|PtHi3jeNojj&-yjUGajyQ01Hd!Y} zO)xy2Bs+F_cq~?ziC6p(Ph^vsM8!`clVqh2UR_-#Rp~=qd`MUNkP;v2E9OD88Y+IN zuj6x8mGV!}r;6o|Q%`G zhuF^3x5_mVOA=A9a-GEMh^pu@a;(S>nVr_u-I6UdmE`Q{$#Wyzt#k*AmvykoQ}&;f zjg|E;8JsQeVEn<8Cnjvp#Zsr(pyx|PopVCw95*>9%W|GHqH+9`gR>L&pExEHET#H3 zX6l%UWvr=h`;Q)7#+>@J--yPalnns&ZStfMqsE9K;A6k5$p|xo)s*BtX?RbU@lK}L z?1V8B_n9&-n=BhQ_%&5Fc<^hwYy{y~I)&)tlZ7>TyhbxyFPT-+l8Tq_XzkPy8dM+P z?Rp(`k&NsbwQ2(H?8?X%Q>%fjjEt-awFE%M8JVk^_*>hXrWZ3Tj_FC>-zB?SecZ6@ zMSofLN)>u22A#Q3@`hZ+dwep8(gg;iO3q6DxDD#`mCC+ZENvY*I_TiZv)LY>#_lNw zzU%m{-5o_4IW8k7ATocHeWFhH=WOGssoDL1B0Dhu7<=G^2};PJpX$KTXclq`&9j7r zbd>n7t6g=sI@#UoOn0l(-7S02ep4)I`Y~p|NmCA1wCT5xcF)XGIqiB$Tl5ZHV6hZU zYigcR)G-=l4DKE=&-5Q!@x3}F+IV$Jw2|9=bu6rujIeMmk%Z|`7P5o4Tv%Pb6cD9%x z3p!XzAyS@KI!%&7QiR>} zc8fM7wW?|ZS)}@ei0Thdr9BQG?i(jl)Bq9FifET+jx9w*uMS1TI@MAthNol1Ri`km zi4w3^r&Ly+RFn86bUurhrK5?a|LKE=;HH|(?wQ_?3+XiiZ&ne5SY z!An#o>!@=)dGckXY$;bPWroCRDX62fBPXT;zCI(GTQovOemJT-FFL9xzqEB0I=iR0 ziN%k8ip^djC#3zvdfQlK>09zm)7SUDPE%p}|0DNx{vY9FR?`r5JuI6Q>6^2&nzHTr zBF}{NMo;5Fs61ZCAGK~r4MW~AXZDf1wZJz!aqJ@}3I-W}kYVzarm*N-e ze+(N5nNm~>DKIjHL1k<@g&Yx)Oes!z7q1yrta04}N0^6Br?&PwV4c}blHEsUAO_^L?&*49$CdnZK}EzeFjy#-zHCK6G@qvq;`71jJz7%J7&B7oAcSheJIMl_4Z-$j~^1a{uSh z1c!>jr5k#>3{P@+u`E0#!<*Z3E#2+8f(%RxLDUjA1?m!mNfk+SnC_S-3ZMchj5~(y zEEL3ZS={cDhO5nzEuc+K=Zq56G3iH2C5-tKLLJzIX}Kk)tp+VL=z~GX?IrGPF}w7T zXrgM(d{Ik@NYs!T&XsA&*GuOPnlI(tfmf$^Oj;hef9sV^_GzkMOG9njWwt&-BA(KV zz;?M{4o2c`QL$&+3h2kG(Klu@O?zf%OU^gM6xrdvzRTU9#H2|%Nq>2zBakrHzNQts z)RHXCh@QNl<26VNrq@s#H*r~M(m*{Tm(7maf4}`kO_`9LJZ1_hO2v4vVf(1C7=(?V zIC%SvN{k5mt#QnL`%fKXKE*Lv;{oO-St1awE}SJHSdqw19W!dm{*7X2_!!Mj z8Nc6{{STZXMu!dOdudq_I!SyWEnt@I-{yW=^UM}qGf7!9iCy`m)U14gR%RL7n$o-m zsb^~N-#<(bSE8&UpKleiVwUtTI#s>ikk}Y3VCe4+lBztxL?C9ZuQmw}N!^m3N)p#e z5^ryz}jNui1uOX(EpN|}&~!6d0yNg7lVuTJVCd?mr#eiTP{GTqC(cm>X=JLik0 zW3o+({w8&zRE0#6xBSc;iL*LoTBWSlDI1LakdpFT-Xh-cBAxQF!fU-hLA^-;5nJ24i=x}gE1Wu}>X`}MGZX%v=}VgTB~5rHDHfos+cz>2 z@$$->*4b2O@yAM(#}bpF-SLPhNjjz<+C@pAzph2+VD^sL zj!tfI-Vw!mV~1x~2=&RHVdM*89h|q7r=i^xEpjvS#pd1e|@wPo6TS(du1NEDLOy!;1|rDYGew@JXSG zg2l!ICr!x;QH?L)#u^l}VzCfQTCR&vAS!v$T+kP?ZV@z_F}|-$ZV#H8OZi#3%v9NZ zyOcyK^);xViTjU{$yS`zIfI=9$diwqLXy_`b%Cl<>S?qO5i#SmHg&g`NNNz#nQwLQ zYm%yR9#HxR=fp?v2vl(>7X1$!mQnkDT(j#kS7b zS+1>0RktqVTL!P&`1Ylt@y*W4HfVq=+I8y0=!Us)Av#naf{I;YwA^U-Q%XGqqV*8I zTPBr&W~PN@iknE+xakg3v0Z968exB;?haov|Hr2086BOo+jA|`b0!8K{WVdFnP87@ z6Y|RJrb13GB4c|!*O~ScA=&k5_p)@<_B8ZW)0Zneyu|-^3J)()uJG^@WeN{3Ar&58 zeC-MkF98YRhg$GltsPK?qswzCZ1SmXYTu^v;390b#;%icPc!{9G z0|>26;o&9JX$Idhges~JFQHDTRLW_?R3DzaN6&v{t0vS99VMp*je^Sj$LyDDMx?(p z&r_NaFQ^&uzO|YWPijWIwP{8?sTuLgG$W}sX+}JGwnnx}Mcs%ebt9hEjd*L-jd)5o z;%VK8w>I5~r*tEp){S^;)s1*cH{xmCh^KTTsWs?EJf$1)v~I-fg>J-Cx)D$7M!eqY zMm(h(@w9HlQ@WAVnsg&x?{p)c)Q#AttE?UIq;{k%T2MdYDgB72^&{R|^dp|qj|AdX z(2saZKjLZqh_@E~h^O=;-dgn|p3;waT0i3TT0i0`{fM_l{fH;^BW2YW)R1^mLsAyc zrz7!{j>KELj>JM+$ymir$cuGg&^+reHDIJNYbtGPIbR?eCkyPwgJ}rqSwIp(# zsH`RNl$ONPS`u$Pv?N|Hv?QL=l6YE6;;n<0#8X-lPisj$pO!?6qFwDxrPj{E%qlV| zZ&TWGJqar`H?_0GoU|WfRx}nHoT(&F=&$v(@e%TXi9xrYM0(W_LTu&(%vB|Mio}FO zOxW}(k^M-$$r?Li`~>rPCeddWTAT8GAf+faa+<9X6UH=7vFx&q{#Z>ddJD*IG^7~W-YNc18BPt2Qm5RU`lA+S=SyNu3`TA( zbj~!qrB6)*eH$He;i(DV5*Y+f%CJOz~>1?yE>Wti=nQKB8;KBGsnPwb*zh(ytX zy(f|6eW2Wm$rfzUy0a`#-nn8iYxNjnsUY6*Zri6+sj}HpXB#UM>f`|rH6Xe>rgy5-N&CnUs<_cKTaPlQ zk#^-5Aarut`L>zENkS@64l4CTF|E6`HAh316?2aIs%|A_={93lIxg(gt}Xpk6DEz- zX{sxYym2TD;w3q+L6!t9q{Jtzl!wfM)}yu=n9a`2&CIf@N0*s{JW)U~Ikk)4Z^|-D z`t&Cusyjjc_OmKPpL^hgHyNc-0*^InD$<7|+H)Ox<}rB*W@QbD-=?;tDpz8yLE>aH z#WXK@Hdl284UdXah3Dkjc}}f~XOn?p)Gp+uLQ|JjL~+b1o#Q)X15g8&q?W|f_aJ#- zm8Leecjx2>>#xA+=$<)>`>$4j<$7d9Q)43Ol+JOg{~7XSWDU8Iv_hzQnx)Bz?QfQ+ zH?xhD<6C`d$ro9w1TBpI%n3MYYlj?U4RVJXuQPH4f7Uau$w0TsjC@CnW~h)eMZ}*yc$F8&a>C~(RJ3h0tDmRrt+Xafk4m}n`VadJe=qBEQ$7AJwmOQoQs_LYT zy~ruwV)9}T2c5e*45}JSeUDp>8gtj()j~(L%DKyTWU)PIcY(hNE7)ULC}@;3hzi-M zndU>LoJQ7l+_+Vs;nAJb@yu74iv5$4nTk|zD+=+Wqp2`QXWLYm&S%~vJ@Ko9eemj& zani%CIlM-hC4CdLmsWMI8dOIX;%lL)WEd^x=#q0bFx9Fws$-QcQg-&{+nct9h!`(b z>Wk@A@~4?$=#U=i;`1GJqeImQ`4cdMZDv!CKL1Btv(82TP~|P3WJGCOGJ0JS?JbDY z43d>iWBP^3L{myv?5xy53cenaP>TXDW0Ok-D4*?DCTA+3_&_&7#_IYin7rkeEEZC5 zLskje!vQ-D4VoWrBbf1B{oq$_^R(yNA^Wkge&5zZY?%{@5J2;2gAdL{ZqlDL}$P0Lz@@!E|B zHB_NF?uo)M(|QRbqR{#xjxN@bS^{Y{piP@=^;kTrJ16D}-P}SR&2;I-l=Qc>x+-qS znFbNJqzYJoa+k#YC$F8L$V z3cO!#<|vjwCYwcB1WgtUPF5MokkQ4G2{AHCmQ}5$E0r&;*|yHk8B&0y!Aea=R$jY2 z=m>R6@lj{>9$W>wb!Txd3Eu(Mm>7wsu5`p^%?_!^eVuo58BrSlOg3J5suoeYIEs?f zsM|=LluYIm1?e3s*`yn?k>NR|NUxyzJi@cm+3ykFGsXaL3GZ1gxb+F2vM$@qO2rX- z;S63n&5os&i-&YADnOMpcw!TAoe64Fjbr)$mU z+FMjLT0sv)G?ko$?@X&q1KG~9lCidam?V^AYlUb+7@=*1s&=(|@~pzevm`q5)2MeU zD*g?lS8>D0$!JkVhUGjXd8c5#2~@evYAT2t$hIk?HNWjr)LRz55+T{}mCl%^R37;b zsFr*ST(jUkU{iaEY*PjKUH1gZUDe7`a$L61G+QtAt-59T*Ce12h~T4M#;oCw7*jH` zxxx|S-3hJQ_Sn4{0L}Vt72RdfpDC^^f$Bl6hW;$v5^-m@M9VvS97YWJxhnF?B6Djt z3#rXpY#c-f((+HC*&LH#n)a7!P{qa+(IFHYCBA$S7((zp-=h13GSy9$?a7h(GKjH} zG8=Id5#kZKKs=>!5OSz)X?+}{osN&Fip-ncmo#MZvSUd4QW%9?At!IYU`N*Sq2@(w z&jjy&Zt|Mtd`qr1-;rwxrZUEAHXZuTi)5uR%UQN`cI5E4yi98?zG9Cc+Du*oszddN zS?2sTZSBCmy7zI!wPVzxbcO+V4{V-QXF-vlm;Fh;DkqVQ)+}0fR7D%D3x%_y&?qbQ zr}bGX&HIEKdUJ=3C>#8u(1uf?V-}hU-rMn{za=l(`+GZHa((XYc**j6JDmAC-`io| zP;0obBfnR?u%kZd3p-_&b?G$CQ(n{Lu?)1VC%(0ob@^riSHK!A>+%T$d9cLSo$A+Q zSx-pIdaAl*T|RN3PJ;~ACp*?;Sx+d-dO};)6Kk`qCzNG9p)Ko)wOZB_%Cer&mi2_P ztkvYt?ub?wC8OZ39Bo=}$cgtn|FdTUuvD9gI`TJI&4Wxak)mi0vMEb9qnSx>Fm zvYt?u^j`aHPx$jMv#ckSWjzqDf@M9SEb9qvSx>CRvYt?u^~72&>j`C9 zPiV_}qSu!7gtDwB)@WHzD9d`V`hu4AgtDv$31wLi-cYDuSx-pII(yw)t06tX z=J$$`%k1b0w$SrmJ#Lb9Yqg^%*y>)n7y0by3AV~}#Ad_tS&6IIOfm8|9oX_lwIx>i!)*>b}q5k6$u=D@aA8!iXSt-6CRYm%Kt>Dy>W z!%r+aq~U}Jk}K^iK}OO0B$-(2O#_-k7;2=V;(_LrYZ>KABgc%?uL2EfNaOs>O7GFp>@lO<%+6UpO8)QsK`bEIqP0L6 zig~$(x2k$0YiCilR_rd4XQNz;K0BYyDz5=*TEquD?O^(XJ->9WVa=6BZC_B~Vsk>4 zE@@Wt)TUJJopV`h(Uf(eePr`WuPd#P6ML1S)OscKs58lUne)Ym!v*H5%RYAXYw47F zO49qAk*xGI@j9zEYEgQec%7_JAs`doVpFThNk&nWB@L5}6vBfktcg=S$t;Z%+R!O& z2uWpwHF#!I&;H$T>L5S^CMprLa}6>5c2(-9RSa;}P^Zp!*jks*MZ;R?H(;ld!*!yz zruM+HY5d7onsfE6-_%|TCX1==nw@5iB%VCBp)Dk__15p}7w(!J+BIlH32SmVD?08> zGpBS1-D<|8K3}0kraD9{GO8 z`9a4KUu~#hzQAU3Pd$li_=9UoF{{qk&buigYmjiY)F0&Wh_X*D)zY+7Pa{2x`%WrK zZ{U;E(;I=9>@>e~P8B*T3x0JZ=)AlzXANK1$Xy{PdP^}^_LUu+`&g$CJRQaFjQHc1 z6#$a>W3pGpAiMkp*N-4S(+ZtUVn0a)i<) zyh-Y%6NmbKmwM_#`!eeqr0oLysEO=zU8>Ku@Cgxrg2JFW^X7w}Pq7`ym2%}>Tr%KQ zO43v+HED%;#j>~L))K*YL#+IB;0jp<4k}zDtIz~|Rk$10^7h=UT)QlpXz%VW1IrW3 zs1*{%?F=gFE8ahf^gwzwe_Rp#I zlIyd+fCnh;rl?t7H&nrT7hYkQ#*_)mL@tX9m*#vLXT7zV)+OmAlvX-myP>^jf$nn2 zSYqWMgG)?09Pr-(v}belwKsjv#27l*;vmWJ0}3i99p=A1sOgm@RjvbL#sVSrK&M_9nr{fcpcHtRTjt>XE$}lJuMdZ=o9q?EfxjtQRYnz^G&{# z$w^;rR7V_?03mC<#BDp7etPR~gUPoBk12TN#}ruk7d)mQ1IwPSho|L?Z|g+w&MA0l z{UVCIC?ZcLc=Ba$dfbHig;E9?A*s8VYcBFmG0lcQIB3JV%xQD75X!Sd;iznfxfh(x zDv>8v&n@54*+ts4S@~vTkMt|gspIwEl4)oAtC6+XxfN;9gMn)UGoj3;N7U^MO# z@{UBQ(B90lVp&$^lL)Q%-Q};xyZrKpmS44boziCPMn%%%-pkbZsd!%_P=8k$z%_o> z8T#ZlveQV9B9*SN#D?o5{bb7|)m1jwy89SGT1tOC#c?8T;62s#9=qyRw{fIUG^#3o zXkPES<#iphJnK_&DuEa}g@B$c;NT&xY)V~p9wDurrv!X2qUt-l$yJwMg$Cl=8*pC6&EH_VhUA4oRdfQi_?CpSfkzt$r;wV8H!PJ#(8>&)l*l zS3S=&5Pq5$ZRF3C`kMAL{-5A-jZb_h)ibxiH~tAebL)EsJgJ_!t(4Z6XdRv$Pnu_L z%d+x6I9~S5ZSud*+-~?Qt4aOLZBjjfn$*wSLV$VKNe7s&|KDeB|3?~NjSs&k^)sfv z7V-ZLK6C4PAwH>}xvfILmv9|kq)*ysZp-uYzepc=<~FIGxs?xcRe0vM+=)|6x{v2s zubS(mw2G44)qnB_54-g0sDk(eqquNa#klA@>bzWqkOducJ4ASE|D9c1UFp)IU z<`_coCNIDxXTy-%^39jKy@ZbPi}ik>V#atZ%?w4-=1_} zOt4I}vy5Czf8@w8Kjk?A^D_-!ebdbWVs5X-Aw7KGIBIP%)HLNuuIl|#{%FE#4H?Q52pr?}zy-;+!FKwm&YwT%f#VvKcZp7>fT z2_H-M^z!Cs#{W0D4%ODn?3r$QO&Rw(Lu{uCuBYT;w^rX%Nq8$L;CxDclG8FYs_tU^ z7`G>1upHbRHLGu_0RGVXPTrcr~g zzLI=WL;Lzl+PmMz*;mYX`Ld1W=|1iy6*qeJGXeFgu}nY%##ooeO0KoGlB%(ik~=b@ z?;K#p|F>Zs>aLgBbH=eXW!&owO=AUIswLTcjgHQsz1HSajTI7Qqb{!db=;Gj#uIuO z(*a4n%;|s>##onzOs%yhQ>r0Tio0}>yJX<+x~xFG%%17iuPNhRXNaS&+;3fyPoGw4 z&b2$P12IMS_jrTkk`A#B^aXgj5p_TuW2{Rfrq^1FY1N2n#a$xEofr5UUxzyFW%f)r zxu%T&Pj^=z9anMPpJd5j7<+BN*v5cO{1vk{yZcrv$(Y6~X=Tai%la_Jr9AYpvKC9b z%kD}xloHZ94M~9GQbGx#DJO9_ip6QfNLq1?ubdjz$acI3Ux z=)nDdZ*FliQwo<&F5GaUY=0h~){?@d{eygKT+xuiWm5~+cfJ{wCyd$rwcL)vl^3|W zV!g~sDp@ONI|^59A{gGwT76zc6lEISI9ucN2ms7w@#oyv~F z6>Bi@s~oJx>Q2j!!WGLE@msG_HZYIY$!^Px!W9b^KlAC#C|qT25wpDG2dpSuHns@H z3K~(k(%8b4j#FapDU2vwF=)J+&1sD&TrpG0q|+KvxNK?>Y`vfjh0C@U!DyBVg)8kW+*6xSxYF9f6{?=ARe##f z30-L?AyS{psKS+=3|*nbxpShYG^%jfR-%$nSvD1}bYdvfePx>pSGq5Bg%JcZkf_v! zC$q9}g~3D_&z6;iD-9)FWhmkLh7xu`m8>jW;m1(?DutGCb>e0^xe;)(XL50} z&HAqHhj2{e6fIHm#ha{?#W5@LNP5_hnH67F6MRTqd{&LxIs3lj{K$0{UHBOz*GG0F zx|)!VH1^0GMfM8hM{i0Oa+~t3jQ3_nN@D^Tw1P=fY$zYk)45vN-xASyU7(; zLB6jwIX0Pzw;z5v$$}vpD`VQUb`>ctuM;P7SQ{r&fs9)UZ zgg)IZJk$sflb^>ER(+#>pNRZKJLmGMMCD&1p&woSDBTyxy0b^3dU4n_Ur6icT(RVX zjCfLg8{k{;%Bve^(7(o2#DskF2hF{i(wLVU9VG>WW*ZnD$n-}xsezhTE_Fmzsc!s9 zKOyBL&s5od!OV4kX~zZ?##V0VdOll0ORlXQ-A&03Z)5w$Xe1hmYz&So#o4JYjI3~A zB9nu%m8T^#bg+LSPev2MND~7fN+%_Rv8j`d>F2zCbejWZ7S>@AM)J^4$++k@8fP~S zoJQVEs%*d1t)p@C=&L>|9OKM5FNm^wk}jJ3EIf9*W^u$Yk_=&8Rhn^(YP2i z&c-bXKPPztFlr=?SvUUb>J8bY8s!Lsq8=;XAuD75qGfUUs5-Z!Y~LD;!+v}SNX9pA zCRI7{J;7#4#qvl(6zLvXZ`kJ9Ae8aP;X~6UD6bHQ`*jKuDll)RDkGlB?H|(Ff>?iJ zCz0;6%#Fybh?MM5n&mw%Oy&x{S7~8QUprSk(l^^yG35(;N z`C+YQw67p=oyoFdZls8NH4_dUR8hw#GsV18pToZP=~EB8)I;|U_0)W|ucN4+=o)gv z!yaah@if~L`W8#Vh{Pz~JZLNjw{;XuaBRfU4v+Y(aiv0x?A0v5Ny-l}n-1NAhnG#7 zIt0dNmg!A`KISdzx+jwtR-3-@PSHQRraWl{oD9jj*%3W)piEs?_1wN6aFgq3N6886x{-4Se_2E73?0QtC7e}_tkc+(n0M*ZBCL1e--h%~a8&Lk47P88GrMq9XvuAjc1 zDq3qy)ia|`raQT$vj%nLIQ!E(AZN)iH>*_QL4&3_WdDgv8 z!_&9AWuB=lBqNs5t#IlBN-=Pi&zarEBUQ1_4!P?&S^nZ2V|prA6q-CUoZisb7)eCy zH?ShROc-5Wwi{*twke4w5{_qv@Dl@9C7yH2U3s5&Ub_dg#SHc<<7be^#*My-{riv` zSBWRaeG?n#m%Q{$yiZxm{LV0|;#47i=DCav?Msi-J>;qIS?O1jXziD$xyJE<7B|w*|t=_lk6vIIz`+Y`3PmQoYFz zhS4yk7LT!TM|&qddd(flzP?nS$Z2?zT}t)~k6l+3<5}O=w)U&NLXZ>)zeRxh=EAlcEkDPDo3(k46FlYN`&0y)#m_vEI8s-CQZF9VH!4f?%-t}DB`uj=ya z(67(a`Rw9;5G_XP~$IEJo6!4uMQI%^qp{#Z9Y_o$mG) z5fBOYY;PA&(Xf1og?rlg$qmbgc(|vJpX$Q$ArbCr;ivkrd}s*w^Fw2}Tjm)FZ*S$N zXt+&2#lrn6&<*#=r+BzUKGlVH%BMuQUq01`w>R@sL%2;oHHQ263G0g%`4kQBlusx` zKDps$Rk3)uSym`k7jBjni6z3#vI4RCaI>sJtN|S?9~;9>9anOLM8eISts4z@CU;`6 zBFCaq?E<^!1pRd(jbK|l;mYYu{45E1msJFk<6$( zydRS`A5pf5QGxt^9-H31eAxwu@>dF%-tc8hDlo314s351Dy}5A0qgiwZ=VtBmo;F9 z`h~R^fm{}5fdMm=3&Vo6uT=-uajsa@wiuxa4kd1Lg%M8^{CE8=?d&!Kea-K^iw)zs zy~@*$nD53iyT=UIJ7NZGX`jr}7P2H?e#=+XlMQ@Ur9mF)9and6FeIzKY@ zYtpAp`A^Qq;*Aq15Wl4Y|Bk6Aa+<>XkfO7ZPBuFmN3o(O0!{YnH%h_#CiBil)J7U% z^XEsz7&NlrL_@_Q6~;vl4xupTxA?mN|ElnBmOvr#-*64(L>Iba~$Vb zw~kjMe>ci_^lx@w$XRlWU7pG>E}v(}c(aEcr^6^$<+s_$uYbq%`K3-XUdL(1yVfz= z<%HwpQSVwEZ;SlhW7K0y?Fnbgq~p9WTgOw6H^^s-w`BeaQSL)a%j-L3@IZeQ@93pf z&O9R?J>M+zQh&$4Smo^eMtMCJ2I9qUsCGVDp}zE6ZG>+wRXh3Bj#QO0M8HL1y(!MIB))@DS(6Y+fPA%DS$Ur*?6+* zi2tjqlhfO)ZTzRzC#MI~2g`q<`sDNrOrZk~&(LFr@D(%kSR>pu!!dg8&EI%4l=Lyq z1D|W)j{q+*@Lj;m4SW!Ig@GRhUS;58GgwC|{33AJz^?;G4E*j4)`1F#P?-h;UsA)m zPvLlt);WYzz%2&e0o-Qb-8HQ16uzm(Zm-*F?Do2+#%`~J0sKgf-F{Ej*zNbN8oT|D z*Vyg%YK`4~Z`auEH?!7mzw>JC_FGkJx1U>Uw_j7O-G19^?e@E_)^5LCt=)dN)Y|QL zN3Gp{_XGDB_+j9F1Ai5Gr-A+EnnZCY4_(F zz^;L3%(DA)$t*j)JIkD(-uz9+EL)z_z_kXxWtJmn1;+QxvgPmKEL$EPnPu1a$pHOD zF{P*xQ02T5;P*A)sTxJEc78$W=bVsuj#G=uglZI??JNW?8SyU!ZmQLI%WRq-b^LDN z27`VL@G}O^056%T@uX-xo&F<%{QiWn!Oz3SnuY4~mj)L4JAl6)z~7q9^C_>b<~qlL zd%(|f!A-R@3sdem@M4LB<^A3qJHJujcMyMl6~`|DubLflUX|%T0z7|CNXP);1Hg-b zFREtzdEm%dy8K6h{}B1@llbev9iShP_<1USUP!F_D)INj0DrFm?>p;+$iE8x`xfx6 zNPk$SufmcdayH7B{GSEfF+U`9CgJmeuLEw8crEZj;NOwB9{5`1w@Bh7a2_}$aVPL{ zwD&yO-a&px=Gy#bf$s*t=SqHW27b%n=M%tl7wGo77kCYDSmHy#48}Jnj`Y{b^uhQ8f%qf9<7X@W<~TP1uU{DwI)KXC4}9%PUEc%1U%>ixp@?7O+z0$P z_*)_AUj&}LP`B?9;3pP^ocU5-o(6vMV%;9!20m)wmw=x&@Xvsc8TfyQzjH%QM9Cin z<@U4H_?+Wh419-y>wym#^-BTYwm2l_AWDA?@P9AX<6{!|$@5PLB~9i1F>uodLQa<~ z?^BfDs*sbA@jnOrHrnSNiT@gS{z@%xM=8GrI=|Dw;Njml9wUi zr&0f9GW}lQrqvqn2foI@2Y{zm>-PFHDsQ#cmn2W$H00?)(4PW5qS_NUye1^pJVJhe z$JXflo&)|Y@TkQ93S6@`B-UJnU#IkIb$;&>f4~<>9Ksgo(5e$+PNw=_2>b)k8zlWw z;3EcoGw|aE4z^dPv1Ow6+6laFwT?due9-8RKLVb&A>GLIB;fo}$NBkFKJU%IY2k`Y!qFsUXF&Tdt^aqUgm;&CmH6-(^cJ2i3O|U*7 zd=KyoZMr^R0N%G%^Y@i=XuG7_;~C(a&sO=*alQk5e?-^+XTYtCc>hKCSHQP~c>X3_ zi;c*gQC=Sto)3J`XwT)q>isSC*JZ%1*w4+C^i34ssNXi=o7QT6cLDD+_|vk??UM)n zndXp_4Yc1fN&oPcwnxUZ}s4yi^#ri$|L2f?8S-Bv)4vS-_*yN0zXm>bscw(6 z&WC<5^oROW`ga-V+m?o$qq9z~&s2Yh5x;jG)>~4)Hv@kH^^eK?uL3@R{)x%@4go)R zwr>9k;0K^@nq>T2&Swh$zsmU}a7fB8_5Wvp@BUrg-d_Sf(xA&b3aq|Q5&fC-E6*3p zjrtrm`uDqtUux&{l;11B57GXn${x?vj@=$A{eL3Q!Gm#ov{rI#kwxYi#*c^Luy@EXl;5%{{5dOqHdho|CN|K7Vqf3G9{ zKMQ=Tp>Mwg{D6VK0lcP8%eVSd`b}XqK8_>)>&ASf{w|U9pDwZc=hwhT4gEWRspCAq zrCeWh$n?uW?_Hqf`!e8nF4y=&OL;z5?S17^El*V5F5m|A&lVX!2RzqU-|PpzxkdNS zXMyi+Gv-tAEx2615|Y28pkHt3yYB)Ig$(__l*hvg*}gSs$k#s<65k+BrVmv6E=2qv zwP^Vd%8$Zoysk(5r&fj}e`p`zv34yF+m_km^D5w17ij%B0erxi-);kb$t~BPir-Iz zev_epzD(t9EuZg{e*0RW{AYpV3n4#MmGgfY^ku8{dgQ;TJna7pGZ0a*?+w6H2|b?o1HTOYbtq6DHGkg)`ictc4bJb) z-#h^Nt)@KD!46|Sdjj}=WBfe>T;uBYd;xfKO6&hOfp?w9`(MH*fNu+|pGfwC<5kJW z91u4nKDEzEV}9Q(>B~X?`K7wO*8{gD%llu|FDS1HuaUSB>7NF_tulQI_^`q6F5t)3 zmanHa1@a5ZyONJ0(mxy5i!OAWA2;ar{z~BWb$a|IfM2W&$@Z>x+JJjQdc1fS`YZ~akq3V0 zgCXY`Nx$tvJ$|S@cLR?a`32kO;DxsSeHi$7NXz$;3+?sN-vTeL3(545Kj6apkeF`> zzX7}t`emCc4+CLwLYKebBHkY>{j&`CpN;uw1Mn7OysE$8`a|)bLi|^gdOYs{zIg$^ z4<%d#E>-AXCGY0lj?FrN=eJPEvRQ%LHgYUg9XabtgUFYp`2{P+dn zXV2m98ALw}{7QxQ35#U?zIL%Kzv4k2QW5Jz(4X$r>(5~SJP-Pd$`%eZL_u zKLuXXq}MyY0Pd0B8;L#_6}a(iELI-^XAHx^525}xL(w8^@nAq*S&~RuNO`tp`NrI`kg}p;LA z)0-+59NB#SwQPKiW&v{={SNN|h9b=E^|BKghe_o7Z?{vxyjRG2qhx@fFP_a6wBskf zTyu)Nvk60kk(`c5Kt~iVou)E_ULi_m)qV=&nXZwP8A_je%FCIExjxy{x85P$O_Teu zBYeG(Wq*#$o8>huhW8X8VdNNi(K2mkr4{oO;${U1tI=feGjzCu05-ABj;0|*9iF_ zH&vqfOVsq_mfX(B0K*oV5^3|Lf)z?eQml>Ig_sQ&hTWL_ky?r?yMb9Nim^`~7{pc2 zh8#_1DTYTj;XcSv=VglM7C$JP84^lT0P1inf%2v<=_0*&Vqawv=vczgFz5N#h&cL@ z!bN)7S)P|@^uZwA>&eaMlN%ZwPkVHyfJVNmOv=1@PcrpkrCaG~>@^w#E+gt%@lJY_ zPNut_7f+yCxgtH)3wfreh6<@zsZ_omzCt*w!0B#wcf9E?aj!sO6=V#0uvqU>BN%sn zJD$2U+R+z3d+N?p$MY|2cFL|Wt$dNEMouDHX|@$X^uoiIA=^wIIGD-6+{`f@@s zck25Ffw1BXILLH7>khjLN$Q+3znG5Y|I@J?i8}f^wQ2nBS@U#7CvJ}N#OAT8h8#PV zhbqHo6brC;sNjAm80Z+zguGLE@~IdjAbJ7+I*#Z2tf6rcsTk20$I9+(Du-7P$9Tjs ze8p)0EFEcKU&;Z|jeXRq(iE0gX7nP+yrEB*sPFsZu=4AnIR`zxO8?SDsUn54;^n9( zoX!{;KIk8fyoF(iiis9^@@SxhEwqU4Xz%OyJXzeRS`5n7Y#|o$3fQTTg77u6>43{m zXRIf*YOqbI|NY22Cb!$&}_!s z;sr`)&Mb#$evgr-4bSW&S#Q}4^$hLG=Z3BaXL>H38Z3;bv!0kfMO)Kg(V`)jZqCK6*I zwF5hNe>BirY)f7$-iM1VG3jjC6H2mFe^O1X?ke-|CpR^=Z#+kiZXpEZV%roE*+71C z*vmvu4glI(6bDBUGB{oe?xA=p5?Sa5oR~yScsQn2o#ZmhR%;|8g~@D|76wX>l-<~F za_s9-e*_AN)e-8gu_Wghy`+;@shq<~WhxFd!%+dj|_?W7nRM`*Y85@LO?&@lx9JMhoe*wH@-u46z0|k4aZb zK@~Qcr7H);3b<@9>5b)btSv}}w9p9Y3T{WsyxPfP)$pR7B0E{h*`wCnVwsMZrDCtJ z!?k*9?_kEyN!*}qkE!4mKsz%X)-h#8%Wh}q0nsM=N2?)w3QX8gX=#fMA=rVnNI+2< z`+oTzf!`0H9b1}21&iti1hE=0)T8A?SLV~7YtNRfjQpV@Rto-YH{!|DOJhCUwZ;rg z3sUu$y)V(KK)MeO=E!nkx3j6djX+yWSxBuL!=-YxuUz5G%^M4Kdk4lD1rHX{0T|VT znQ?;+KRNIBeC6+%(>K%7yab@6VzTyEVpQj8R)gi`@KV6zU7sAqa@VK_7|&ZpHP!k9 zz<;eqb3!Rsu*XWk@2_r+Om-@_CoOh>VzHcKLDhY#7ObWlQAesZ+vhx&p3asHRIMZH zv=aAc31e2!qo+=}-8 vO~1P!VD3K%G&wbmw462b^Epn&*W$2!i8Kd0X6 zSnss2(>wM#-nP^0jGflb^tQaQRi`aVtJU~ZWGV$lZQxaf_=mQ%{($GLwNC=EwbOa` ze&2iVey`!%Is0d=z1LoQ?X}lhXGcZOtRz7nW#S5{Dv~8a1Vcp57BW~?K)Eoetc0>D zs2l?2Q9)%E%0q+7Dkv+0${dt$CxL!sOpRMtSbF{m5{<@%s&(e^A+g^A9SI!TAT3$Kw2%!SXnqe^7Zm&OfM}jPnmFPr&&Hl~Zv3LFH7O ze^7ZM&OfL;3FjYFHsbt)%4sybMnTg_%shqoM9B)P;PZgi^#8Lc|d$5qM6A=j7`g z)XwTTKh;crQ7n?KNdiHv71xU+SM^-P(!j@@5kQsUam6zt#zZot z29hcxgmC#GMA@@G z@@bM7@hoAr93N^3OXbre^M*_t_K3D5raW$8!czU?Bi4=Fl=QS=+t?S!@0#$Z)IF2l zOFQ(yiS*N%XS2^wxspHqX)?8cLE-!Q&P+4;pTLvAs0TkHWUGFC<`ZQ7)J^0(v>wiw zDqR5nm|=g9jL2c##0#|@fKy$#pH*e_Ndf53p?-blQ}?qLl~R%O+kijZd?vt8H%P&Ja^7L4wHqjJyuZL4a%Te(9itu;r3Dkt z_lu6$2hDbdB-?8neA(@+H?5u(rHCAn3x7~_^c9-(8N!&x=GQhfNG+1ceN`wrCKjq% zr#MCuuho-2#gPWj=k!149wI;I9)V;f30I4V-Y7~#CnjX%5`C5^B~Fy#-e4cJ?X>;e zkxiyJ+=!=5xH^}t;|!3-6a58&=m4)hRi6<{bbxmul>unfXeSFq$2qgQDd!?X#(bnD z+>xvXhQwYSP4pR{0i{2tVh>p`3aJOW^g4^H(`)_cab1ff#hn94W873iG93*0C|?5j z5K?rz4k&2sO*o>n#CyHghAXGbMM;?EVDb;J;&#wDyJi(TCX>FckJivCI$N@@p z_3v7L22Z3Md2mRZsMhx=%1McvER%+QitQ5el(4XtqC}DrFE@G5BXVCG@4>1}mZ@#bL)ymsX`7XNC|$1K zn6A4jP(9HzUX*@6UZ(OFum^N>oCG6|l;avg?BP)MQrk0EWekTKG2X+mYk}o0-PPvFH@@Zb)R9vA@ zl3?^?bD%SFzoj#7(0v*#*TGUP%e1^7{{8G}E%GK0W|3E;C9hjATU+!pkDt>cS7l!1 zj^Cxl`6qlsr`%u%VTO(uxg)uvqc%@9KRjbD%xDNnak(jNm#lYzrtqGWa-1jVjj5A) zS^`Z{xAHdM2B&-@p9H+%>sp-;gKoooL0J`iWA2!H)=%U*p*r7Rf7$sNn_I(>%iTM) zF-B#6G*K3V#V?(F0JJ>q3tNw!LR$2t1-{G9gNN3_-d83T!5XWlh>rO=rSaSm^?@Fs!*C7s)* zo&7X~bml2-Rdkip^W*2ln?*_ez@hZxb_Ll1-wbJFHMR#GF$7_owP%4_^}NE5F*!ex zVzihx@iLV$Sy(=7I&&21A~vT>l919}TEyRY57f&hoVl;#iERi$Y%}6TZb`Q2&`lWw zIxIO8_eGCMM3JtaJ^HYR;XYUm$E%t)Pgl-$EYUj8lqKW94qbxjQI=wR0Q>nIl(8ps zQ05w>uO!9>niP6mnZp@dO?yqC!^UIXGN`M_nHR6j0Dn$;dA!mwjCf!rieP3oXe-PS z>`yRY(eP+joAc4Oo;YW0zG;pq?KTqI9=}!|1F&yoo3Hl4jw_EqnL-^_9$~ikk-E$_ zgD7=!>$vg=k=qXZnwO3B$ybYLd$Qde;p={j*Ld?#t1O&Z zw(O_P(SSuW5ylp|H?tc}au2!To;2KJ-n1L63eKgib~7o4=LYg!5FUHO_d;y&LkP>J z6ADv3FI=cdAu06Ksb|ryD5`XoZS6;H56^CpTER9(PkuO1{SwgGG*0kq=Lq_ZZO>=P z<6VaF;4B-ff}P;9nO)I6`}+mE@o_U3-Q%*gL!XB;A_+Zj?Jv&pq^U9qQCV=LKW3S$ z`+$l)JZM^WMA;J89v)XdF+t>B$U2-M5taS7(n8xYR%L%p+5n{{X_4(;c$K}uUwag4 zN5HACOgt`CNonLku*0h|<3Lt^FL?l8nUDK6inwjJdzFdk8y97Xjkm9&LqRRF=KG)GZ!d%e@98!{YHpF*`$5J-5GQNK6U)f_HeK}$`tMDmd zr%jmJJ3fd#Y4&&--E#YDUN+0ce|&Ny8cCPq$@XrURd2H%jxLmXz+VP!Uh7uFaeE{gY@1TEj}L>@U*>>T_YQ3VjPU%~ z9GDwY5I_Gt=g%O2*18r-UZ?alYN?kei;nPgoX6s+w?@eNrdNJWzb-!??H>{5^*;2R z7WLCQ;8-3|&>+2g7oT}_Hq9)^6x6+XHy6f6ImM^Q9fsb&nmjL_G=GcRFNa5Yoef|^ zY8V`Sf}clW2S78dGrs{GISK2qH~P(Vx(c0Ic@_SN&xW3H1@^Ncorm~Q$olbX> zM>j`!SViY9mgyv*{a#8ppX&o|L%$#k1>nK;j*ul@=*w{J<3F@{S|s9idZuL!z^oa7 z>AN!-VB)PZ%(a8C#8-IaKnMG9wrN=OFf zjYpda^ToQD`R_V^0{Ju6pW+HRzh<-ivj+cyuEx~|M92CE238?>Rla96c6?(sPO}Zt z=DYGLn4#Cb4~Wv`c6qwRhzc}ajWyh99l9P*$SHQQk z(8hxf2?H(vC_IbdSzwAXdkZ{gQJ1fQ@oDs8`YD4d%UkeHDm_JA2YIivlVwZ+i`{MW zu{isO9q;nn^m2PWyTP_!EAR9}2H+bXfUl!ok<6`!9q$3R1QYBN6ZWl#9?;LGc(k8p zp2%k)&_HqmBbIaT@-qB;0N=?EjMDRpR6&Wf1~k&2b_ZEDZr~M}gpQ40O<|W{FN&@Z$Z$~39+Zg}G z5Bk`kNBTwS)s!iYKhcr#Iq099F@k?$R3@I0R9&PU_as`X*^Z+IrW0j9!5E(vfYx}= zv*4iI*u7qj^ylla~2F`M>OqH)DSc6hiU~-jhDBIu9 zb%nPI_5$K-`}%}35o5vx#*a46jaPwQs{$XFlnECK3D<=3DA+ABlT;4~m7LUkTUFk)SH`q(7!D#9)>>iKpdn|WjW|hkWK2>fnkCSX`F&(M*At`i>Htotm`u1$%?Uq z_1r-l(mkPiW886TGR!XAa?Dys>c|2vgsD`i*aaN^6)SR7a&7?^p_FSb1B{BD?XM44 z2HFSz)X@GW!Q4$E*Te$!T!ozX5)v1@Kw9 zr}OX8I(jzj(BFSnv)TL4Dub2b_xR!W_~8@3175}Ij8pQFpU?M++$dJ&NdfT0OmMcj zFx!?}ptpb<1^%6tLT6k6JF7hvVX^?G9$-2RNttoyw%3MngmiMvx|_~8!ix1_RHvoG3<`W#y8p&vZ{W$DS7reI)HH(j zd!k8%V2>p4W3F%I(WTIJPoR4PWpN~^w3a*c;lSPh;dQ;5&q&W8DWQRWK(@%dMH z-X>*^gk7AKgr{g!G=6)BC1o1G7HZVX=kjZ44ewU)pW36hMN%Mi|-aJ!4qxH~}Ng9DN9^ zn+Az|jWn$uhTp}*L}_C<`c}0t%9?Q5;@CAn7e*{*Lre1zk;`Rpui&m1ic_F&BWT!h z->91mbOp@G2M2V{H+z@`I%kho zj*-;Qfs^HWQsxk#wlr)LFKb7cCn>|^lc)GPu_+S|fS!70tmwEgmcIFz6$^21?Wjkh&5<_ROsQCnF5XTB)$u(Iy1s^AL}8dB<>FeoK~Dc~R0E zq_-u(K9u-6{+m{gtH?MLDoTa$+SjdTtwM!J(24;cF%^B?i7=|Kqtm~CU}V7Zb-c~v zE?x}fMq5e+5x}|uzeHyVlu})7!m^7cLLFEWsW678d+D_{LF6jOh>k|Xym(bB=T&#f zeIDh_&w#ya^%;=zqdfQsn~7+yI2bZv{X6owFP#z4Bhi$$mZ|GB^BXHQs~HkzIcT#u zce0bLno?KYj{d*8mjLG?EH|tlTzL$9tszI~+*{5Fy}Z8kNEycaw)-$*lHA?sYwymx zh91;}Zdd1q&UzlBf(cnnp(wo>l}$af&hvT;`gzF)(Xq@>8ef$;o($N1uvTL)^u%yo zn)!6^xVJ7;!CW7;`JDU9RbW49S}(WxN>nbTKLWG0q{xIlpnmh)zc;{we>@3vSn$pq z4?EMdREENxp#iAIg-Nhm(1smR2vT^L@&r6yuvVNmw1Iu6Gs?S8-ZRC6d&Y!&rWp3j zrfInIgksc~H?Nm}))S*MdeVwv<@Tf}0c}F{EP9TrDj0GZ`uU7?R9?2;(4N-|a7tbV zJ-AIDX3QJdUlz7k8(h|?dig+^s6{DO*~<>LJ|BrOr{QBINRQrfTjH$Xqr{C-Kmuf?2+=Fk&Ch(`zN z9}cP)9nU9$BzBQbZ+AVPfKi3^2I-AUnhuw*p8c@1w^s*V^X4Q9*Ts1iIStZDX)TPd zx1)vpYiLjScOEwtgz$U*LpV)u8adnR~g03DKKsDN6%-BR3>^Qu1g8@pl|G zR#J|TKGZ03P6ubeOOoEGfz{f1_YjNc&(MBNS2>6G_b^r+1#=UizXOsgOL^5u5F%GX z%L${}ukxBwV#DYP`n{lI9f)TJygos691u`SIIpZ}j`#au7vM<>dq6^a3P(TOcZfb; z=)*`MO36!rxmmy{1Ls9;F@nBzgS}Nz11HDEywBKqW$@IVenhBP0W~`wk^3LhuQAG+ z?}h$7(_{?*Hnej;kD9Z{hW3YiuAMUUvNZOQ-(+ZzCd;>yGEW)2U~6Fv9Ard~G$r?) z*UNCn0WQ2hZ|VsH+7t~^&RxuJ$f;+&+3l?SMr<3;(C2A7pW}Bl-X!{Vv�bc>#aj zG(Om0uOw;`Pi*9y7TsxsY!!SyMsJjL)fpIn{v8}!$SB^XNKa>}19W(P2z1jR$Sih+I;)Hb`II(HLdkiIBrsckcV2kB-U0h(^N6 z3)0!6!7}rRKc|0lxRK=08FuNLP$!l_eLQG>#Jt(3>C)}p!xuE_jXEfIK{W53 z0QKOT0v8Z#GSK|N$5G@tt=@<_c?;Czv;DSms*VIS&GFj+^=TBj!6(t1NA-;+y>`l5eGo6OKbEO81MvIb>>LSz69U-6xHnD3R_ztK{g}za;3iO&zbiApPxd6S@f(_%3;yMk<)uo0@i*ECE zoYRm3_)61KimjvAms!TPi^X@QYyJ2*rjNee6dm()gWlk2-USxtY0$n6slhW`%$?=~ zykG}-v26gWfMU6ATebJ&UPuu4ZYPKiU&8mVMKi$tEMZ2sV~!N#h9W7 z=xKF+bXB4@i9Txz-h=Z7V(VuvNU*=#x)JZ}Nr_U>))73`8L0K0x^QBUzN7*A;0oQ{&6+l_gTA{}?(be+KL}oc{C@F<7Hxh8R!bcQGRZ4l!~7?b=X?X#a+mV5 z!W@EL$u#m4u8mi~9{;ih&%hgTqN6MheHgSwRIRA%bwELav7l4dKBl{}mD1iTazy~0 zat}0Eo6y&VevBy;bjpwz9f=3X<~Z3BtdGNZf~6nn&}=bp25MHHF+|jw*Y}Z0jy8i( zEl?fcs$7caXI+ua>)zUrEy=D;B(3_4VVP?iNnZXGJ--&$oZy!&{}ssI6U68`#V>O( zjMur7Ujchn$S?!N>+hg0`(>Y8T0u+e`zWsCv_a%10&R(LbaYpnfpUk^gLI@ikPf^9 zR8&?}7ocMzj9&+|OmzJUo=?G(VHi`L>j~(8O`ph}iN%@9rz^hs|Fvi5jY*3gZv~YL0sc?a(>)m@@6EHYm)jq~6+6p|l5IGBt9Zd2lIut(BL?2%=uNq< zbfW1RydkFbd*!nyC8{+&%5u51b`tB)y_CxNbE{KB{kc~rg_Scs>wP!#FFY}uSUR8KbK~(n2G=Fn=h9P9<^4TK z!LH*A?BwB(Sd{>t>s z^odekh^BOJ8J^4Af21jWv+OtU{c72cAN}hbIG;0ON#GsO_6|*#aBd1I{|wLK5Ey&@ zIsdtQ!AvQz_{-&=1}xRwTUEeGdY%uwOR{v}8&^#hp`}9TRqhdGJHp?C0`iJ`dc&Hl zH?gYF^a`0F2eN3Yk>^alxT3_Y?dG)G$Ovls4p!H@vmR3zP@TZ1^GWJc#_y@iV z616R3Tk4SCe#>&!^uQ8F2QN#Q+rX~~UlUe~?;FDAr$D*N_CK^A*_C9g_AuTx;PF0P z4fRkFy2vySq|t5IWk6Urg=Hu#LtzQP5>l9x3ay2v3K-dKIK-<0k#-Ye738>VOK{{; z>=Ey`F5~v`%ef9J`?sUj^sHTX(QQy!IO;3pN_hbJf>q>tqQTz|f@qM0fwoVgamIlp zI<`d1b6kY)Jq=-Cf!;VZ<=P@co=Z!9?ty;@+o}NOm8YqA42UnzvNTw z{pUq)w!gP4WAVJaLL+5kqLB{Vl}u+I)VXaKliDJ!fA=ncIOB{+vAw9sVhw`Hix;xd6h&#NjVDb(h&d97FbRhBTL*DCemTD&^6L9%~L zY%sdx1<3bEXx+UuRF>N2A*wE7W7L^PEG)6pKyVx=$|{I~hHMu>tiaO1+6vZ`v>0+^%ju%d1}&x2Df=nUfyM}b`ug|RK#TeUeP1-*bSw14jJkDTXIzSCF918OFKZH4zY7IV|+ zNY67OHy=is6&0|*kYB1Ul*I}6v7d3*gKZLpvx$w8Z;H{g)rFo4o}m*!lDQcgBVx-@ z5g8M20&BXw&Kor9keqpatSH4YawP0rr0DQO%JH`53>pWAK7|T1sjI(?6SnX;@o1AqH*$o8?7E2~>BLwTL=_lH~Dws(5*7Xiy01tAlG&wd(1@dQ_v_)AK* zL_TfyW{mXbKFkR9=XPWm{JEBlIDhVi%mjZfB5R007nK!R!t^A<>FMjk@7?`4272FP z*(C75<==O$4QY^u-;psYQ`R}21`b}1@MiDiT{$YtN7T-*vTf~W22O@Ckt&P)zGXoU zz8_A`e1Z&GF;55GkyiufY9l!BJsx8YuD`15UXRh&y_J_^5Hs#-O1;kA{?gq~Two$uoitKY?(!U*UP-7DXbOyXg`1J-~PZxAECa;klTE$B@XnW{Og#n zt-INUG#=AwnzV3^?GF%kEh2Isq zD5WeFg53bJ)JY>SEwJ7`1!)#$PXNCPW7nh(S47nX5buC}AjjLaLPe7lZ~4I1ZuOix zdrF2pb_(Rka?FZe;v(C>z>Zx4{d#!06?^cpa-OMEb>Y1lz5Q?g8$Y#*Km>7BUT_4l zNHP0A_!qCpWnLwJ4`L=0$lbmV-2WcFchL=PHt;$dtbiFFZ}wgANeV+zN`%>|^fwMw zpK6JwutE9+{I)F&!WMbFX(w4RjY511x-=)$JbVUtkgx{TjCavaZ2(Uwjv|5Hab;$B z(9aY(GlO`6J&6#*XB0u(%zpf}QXFs^OA3G-&SYO>2x%vcWIv1xD?w%9>ae-H^tkSY z{a_XQ-w4Npd|bYRwVFN|DrK%&7Ix--cyb2 z?Y2L#@vYvs8rk>*e>u2^jouj+coCyaFL( zBH7742)(KAxO|6tg$x7UalO5Xmvc96OamSqutec8a>?8AK=r4}8(4n@lg{kyn+ zr5!xAg~_gdDRg0xExD#&3M+>vlzD$S(qA63aF{=bb|0RS+VU7UNgAa5K3SU>Lq&%W z3f|_}z;8Yqq{gpBE*9$5p^Qn$Up2NtItNy}3TpDze%qf1o6CCJA1^0Czk%4P$KOEk zK|VA6Z5x~xTY(3sX)dwsVe2}0>aPl ztqtn?6PVA3e$2S<#f%HW+`%CvzTw1gw`r%g(zM%uOBUlmPml>Ugs?WDViSAG-AOe( z-uPv0fe14|!TF84x{y<4$+4f!-LN--rk7PJZ!XA~&T<$e^lXL5{i1An8S1-L48DDr zHC}aLu*MUJjtTrt9Qey3@^ci}S3<>n^04)ib;r8186)s^PdDy%S+;L?oqdMf+_Lp- z#R~FdS=dvW(tj&ER>2TW?asOr%iuZxca_J%$|5VzZYJW{j7Z{H5Bzzek%iMrih63f z>0ci?Xfm&kA`>^?Eo@2~^Akd%j3>dz7sy01j--%$vYup+98yf|WHy;gR*?!)OI8qf zT_?cqN{w8xDK*mVuEf$FL#lHRo9c{oy31%;?_Gq?UhTiH21`#H>Gry5nb)lN{mPS2 zw~N2x#G3OI%S-d##~RromQ&XAdYxTC4(ZR@=M$k~D!F9+fYsSU$R4fU@~}16r65hV zv!Ey7Je9(%s6)&Z2OyWY(PBLV-uf6;bY!q-smQBz@}f}T<*HnuJz-_4Ttf-IWx%N2 zjJtBw?mCTOD9V<&4jM47kxYMwCcimc>U!5u2l+zK15gX2r!ITfu(U=&>Rf11p9!In zzMmX4M2gO9G((pv^gFoIDx$#Kw7Sm|?K=v~1bGz2`1%ONtg z!bN}7EbWrDliKX(LclHy5$L_e28mom%Ae_%-*tvu6uC06w`&PgiEn_-4)TTB74n6- zCgKY-Cww8;r$e3Tx|uUxH#;U@M`>1ow;)LveKk*2eIZnfgh0zIdY~7XzhuXW=CnbE{%r zJn|Kz>|7U4Io5_akPnVvcsrbm56b3XiR#ObIL zLk~s2H+)a*pW=7vz_!mNOi!SnhOjJ zJiBB#NjnGwd1YcO35<8(yVgTH;=A}EuZK3VAMaDh^jwyzq#^Pc@Kh#72m0?}(v^Aa zH0}}XtHD9;md2|OgnCu4a(lfU=oM{Ne0}hX$LYVS0Xj_c@}-0S%nP7jdCqU_7NWFXt?80;JCvHHcw-#oeywiuX-l6i3+wiE z|Au!pw|3v`KE?XF_pzAY-L0qaMQV*#&dpb9y7UyYOx@Hu8R&fYHEoBl<0;~xPP7McqFv?$!sl?v3C!6Q0Zv#rKPUFZ04ILq=LFz(050Sc-fXJZ zzopx|d*3%#1t?0(2Zv{Ua-~h55SU1D1G1ZY>kE8Xf-C z=(z7{bl_^}zIQdY@_qaM!rpxCSEm{1U&qi@xd{B1*P`RQS4el{SRwaVk+-!Rn3AHpXUY_KMO1R=!08^3Nt1q0Wo9 zBay0O-AK<-u;uVySSNGT?|}Yt z;Jh>d)>`ExBZddZ0zr4FQ&c4{vj>g z`b6auIbQdU{tcjKw%37Y0jyc5nHQQAk7D!dEx7V4aFidzT&n)e^pIVFCbQz4MB zSN%HYHTqiyrWe+;_u~U(j}z~mC)Mc5C0x;?y)_3&RSo`YW#LR<|2IgZrSI7PV26HC z79?>M{{3GTYr+2HUoy=oIW9{a>b_S|;*ME&108#h?kPdd%P$PK?6LACNK>5GcTuF2 zMU;e>M=TtqDsmyyLw6x~`K70HbO%*~PSa6)YU5oE-P`MxO};q4q}^h12f{AuevKX6 zeY|>=H>38`2o{dg>k9TlZbLw{Yc#fA7k*8@@VlWpD-CqT?4&(#p!YD@5D*r+) zzYnzzVrDT-?S6@9^R=PYX=(ea4RG5~>$J4(Zqr$sY;%&jSPR6)oB2yzEd7-Y{+0)Avj$GrJ2$>c3MExjSyDwKy|H(aAdkOX z97>X)X0tU3+GoXMTw2&HMOqedYb-zIE!Ql+G^tit9*ZcwR{F~vZob9+%N$Ggm8@Ty zF4tPpPB@R39kWK1UM{_6JeGYpyEW${>jpAu!NS#(YTZi~EOOV#g;lG5N(*X1O?b_{ z0EQoHh(GW8@xoQEs^!b77uAqCD;{6DX!+wm79Lu*YT?S2kFQuYa^y%MRam{SYSr?U zIf7w9im<@F$_=?S8e&^m1KrpRrUf|yF|IKfv(^YiLo5#pdC;CBSmrorPD6}orUxdc zXJlq&yDO^}EUYFLV;Xt%VKNOK(~J*5GLb^ae+zD~qM-1>qG`q7uE;HPFA%DiuUzV0 zCH#2R%0!k_pmeNEwi_Amu>Hg_IA; z45<)O5u{>BGa$``Gz-#fNES#oNOK|CA&JI&$gxdT{piu^rR%s2HBg!X=_hNmD}MUe ze~=jrS@_`c9}Clq3c){ryz<9Fs!;j(q9v<@neJtR$t0MJ#x!A)kd~D*`GK4VGW=Mh zMn)0)$b0v#Bn|Rz<%GeuGlstVj(iv3?*`#?1^w?K{2aiC^eV`T9b~K)(kze};_r6k Y962LG`8i>#Wii%5&F~%e=9Y+)6 zBzc+4n92CEIx&k$e2H&N)Ja5%8pS1QqCw))@}fe!p$Ul#c>m|r?Y>ngCi9>7f4}8F zUO%_*x9Zk%>eQ)Ir_Qay#luGD3xYtrmq?s1%AsH~5Ppw6EYi?GVj?QimjsajBFL{j zKfz>lA)&X{6Gh+8#-BEb4<;i53B5Jk`w@#Uu8rP!eHhN(-@Wc$cdxtG-Rtgk_qu!C zz3yIjue;aX>+W^;`v3NFYAq^0tcsp3RR*bvDNulSHXjxiA)L#FRS-_*!afl0#f8-n z?#hKV5Ei+x7Q$ClEbI&6MlS3J;X_<{7fTsQ#2tGTcq!Y^^*KnO44!a)$8 z!-az(T)~CAVEegnS8P8Q?uPB>!XemxE^NT|bK&mTel8q}?H5@%4BO9z!?FEbI0D3TsR8b&xMWHel8r1?dQThu>D-vgze|TJ+b{JF*nYv1LWrQt51Q0s3Tz)z6*Li^@5NOGRkRR@-P(fhYFm)H{GeX&l;GJL zp6B5y(li6*4Fxn^I^ z51QL@7DLKqNeL#sQ$`nBvfD_XYzXJKk-qsO0(%DuWD4Ax6d$6^_916;uD4nO+epvA zL_Zae(F=Dl~bNc-`p<0gObL!k$z(>DoZ|r691&F8jfj#$(j2$w>u>< zz$pb7F7+np&xq%*)D3yklcff?#@;)2*y zkf$nlvs#nVCV5l;0P%}bpY4#VHdij$qS}_z7kF1rREetS7Rf1v=u|%klWfQ*>a(E) zA47JZ=gH~e7BZ>Ve*JRjqviP~+D~VDn8=w>6FID(+G~q?dA^0c34%9T6Y(|c5&{MV zW(5!HIwoX%_tLP*5i_G6jb3P4*6aD$mAzlfLK!oHz*;8w3q$843`*W_-J|I_9KiJ-rxU6-92HTV1 z`I7NT?S14)?HIVNB=TY&F(x{tt^*=dGKn$GDMb&E)2&kvwXL>2X-_AE?d6!y5P9(d zvQTS=yB{&0F_9?9*N|XL2_sRE?@WRKsZpct&vDvMSbPs;oE1p#uM9-HE3HN#VHabG zF$FZB^kD*)kOsAo^+1;~s=(3cvVQew)DcMvKLIHd!-o)(Y8S{?*%GApA$ixUfr8rB z$X!td5iXat=EC7prxcaoI`z!>EW4UyIrKzVC6IIFYt^J8%ie{Yv#uB_l9{-Nf8nt<4mQ%XeAM?96Z5o990e%~?1!TNW=^m>N zO2ATl#%oG*Z0hkoKzmNZIpm1ek6`+oLk`Bi%Yt&I!V}~` zot4^!Oifjj4eF^{HS`O<@q;&4)S2`RT0?2VR4qOe1$>X(acX0QD9VYy#W|&^aU1l4 zZ2?GO6y@ONIG1&;I;t)ciox`y+4BDOc1iP1k--?XFCxeQK6wVnE6R(4sCR-ce3zJ7>KKGzGN8mts3X zZwx`bkx&{xKCx7$Zicp)=E$*C!EbL*=~Ym=hL--fzD{jKR&R%a2sU-abSP!|6gA8g zy;DKo0{@7uYKR}5IbIp8ivC>E)`!|EwOvrdxO#tWAek^u(rf&P;68Wo*VaLDoA&proTP5w~LD>=GA}mhH_ud_Y_7;j{75oaMR;{xQwTBW+d&qDc zxV2s{dU6cRj;1+|Brns;REDNucxUpl-AEU)6+0veDP3d0{7X8ddNUbY?mqR@N=!j) zBO;vI8R<@Y)ZpHr!{SnLT(l%RwPC<7-@(17V1LI$tf@>8&!yKHPzz2e*+Vs1t3LiA zHHinV`<6_F->DFq2Jbh3-LN0Z_%_37-=4vj@f4J?%FyqANISBYma#+M_kK0$3wG!X zyzf`j+;x!qj+594M*Tv^712vrKK=cG6L zsqEcI9rQ#Vw9E$Yax+YYPYGbr=+UmWWTS08U|gT<+zPVFneuLTv71sP_ip8E3rdh)YO;a@?z*H7b;_0ljUX6A|UWKD%MLTl4dwPvj54JI` zBBTjRU1&TK@XZ%-J@iNV}l-hK04B=eKl=oibOPpZ%C7E zd(@i3_oc-UIv`E6{ZX$etntL|hS(l3>#L&oN|jO)847lIWokIc%G**MK--~+E#s>2BGjD$mdIKoay09#9_M=bT`J1oy70)Nw&K52y21XMf^)#gDeY2Q@sF*7 zZHKy48w|XI@s#4U>rylaXb>jpXP zFAbUyLC2PMlb*_g<8lvOeZVeP@!3Z$XWB@>0V-qm_8u@pn&a)4dsN!~s?W5y_OO(- z0f$tiLG9z-p~p}rq_u|;bl#_?Wi%gBF1UvR_XpcI zf!wVfMylJVtsA6z8uY@vHd#&=y*4g#xxU~4ZRY^TwH|d<5(y|+YWteTj6!R;Bnk4* zf_E8FHY8myc&a+mM2YiC+{y0r&Cr^7H=o9{w)ZeJ>eMKP?1~WdQ{>(&snvnMGT3NDVRt zaqr#Cgt}2q@#)m=gwlT=I3a=@x{cd!1_Zl`Yruxo30Ql750Ct}f@WA~SqB{15B;z) zS~WVwb-~uEi@9)ey9Vj%|8ZaidyD_FC-aHn$pEKg#~Oex*@^05fn<1VEY*Il zm(za%=^OQ|o+XgpTTiJLORr4=J0eLQ2cPKCCdQ{XjU0a%DO69_9yW`OtuR}?9H&df z^^ML2E8uvXPa%B*XzchJsSxJTm*Z7X%Y;b$jgQ2!;5t>Smu-x<^lXg{dZgVcy%#^& z{t>MipKN_{ED_cxiK^&hlBS6?;Fv^9HQm13EHt9*MvDTa+G2)up*G2fU9r9#_Xt{3Tk|^?BGMx5>&Fc)TMuQg z*LPO-aL|yW(MG(-X-~OF6>X6~LuR*;;o6o^jVlV$naTzdZN08=n{>{KzJo>DZ8oI4 zf7O!kz1BErT|mJeYc;7Rle9iUg+`;Eq{V;vVunUWleB>#zSG9zW)~e{3MeQ~kG|6Z?egWF4L0R^<&(LF<{$(@tvL9io26;1@aj62i1gis0 zR0`S@-}*YWD?GTn4!EHioYE3nBUOQgJ4X{m?a9qXkaMlvx4?Z`KK20hQ{18a09s~c z>KLNBI2t5-1Tme7hhB|HtC4;H9oLu@V;@6h3FT-EX)A6RWQ3Jj9?05ue4lXJdvnZ? z`-m(3iXkR-7*Kmaqf2w8FVV+99Wlf2BPcu3*JJGW!3uK>sk7Dsmn+dHw zat-tra3jYvvf^orb6{jOBw(5}NV6W&G@4^lv&i6!EuqG=nBnO}fcC!m3)N2AT|P2h zo5mSoXEKL z379q>(zaZc(=HKWpcD-qhZ&%qu*`F`4O0cz!6gf0s86eQ7(R*H-F(e#TC|Xu=9yrv z1FM3n0_fdA#7k$rZKDnS2!qHa>ss34Kr6=kQ=K*lT9D(u(EPm`OM{i%X;lj3ACg4S zete~SJFEtyeN`>pOT)&0Q5;%&+!_wnJ=i2WWGe0?9f_*W`4pz|_JW*#lP5j7L;5BW zX^9!0K>M=d7xWo*UgH+A^Ag?>JFoGDJEWiIN&kf>{TH6}Wp_xQFGf*L_9Lh{E45~# zD>4-hg*D0*SYMALs+7Kf8w{$8eW_H$LQiXciE;FUkpC2%M+Osjd4t;DQ;I6v1Sx*_ z8Ry%W)SfVk(_(NI4GzIySGSl{GuT44MtNR-AFTmBKG}@AS&dZ0Q2*8vy&uRAdIs}E zr*^O4l(y>8cW5fCBolyMuT6GPA4TW1M_^7nMCo=XT?b16B={FhBd>aonWx+LK}{oL zcYt+MBavT_rg`1)H@}-xS`vV3tEo`S`~cbFSfkK|9*eQ?=1>=>HdDZ{f}`G)9}jU$ zK*RREC2k zV`x5tV;k3C88Wi6qjUjr6HxD(p(!r~b_#`&HyT{mY6>0aHJ)9=DpxoCK{HSR*FjT6X}{>OR%z89z`n zGcO%AIkgqNo%UMu zga}Q&*5%tIm$_SSc>(NQtJ{o}@7BW_;c4Qulx_3rzvwf$-q(+ra7CgksxR@a)=jLf z(9IKwf5A3eLGfz!Jyulqay_1#6}FiorYXq7vm% zCy$wYHfEA>%;dwESvCwuo+%$S=GDukCtE_J66=!kq31RXiUHb8Rio)Vswor5c_`>o9Z3a%3ES8f?)j{t10sp&L#at-v|1*3hum&yySC9e`sF}Vx^ucy4)=QX_QuxMC|ET= z9YfPKXj83Q^nyi;8?Aw;DuI4u z3cz{E4Z6Mjbr->~uSyjEuhVrbR=&0UPCJ}!tjJWbkt&54aL<=b$B{XM7PV!=p z_k2W8RkTaeHmQIfT-*PN`Y23=R#J*7-KbGy6a{m@>yj~12felW<_fQ;1UXI^=xXgkA=%3$;ZL`qd4_R@oGoIhJId zR8J^@r{VAzQ`u~YSv5v3zjwPXQPzB~wr?0FYXGpJi#O|0bLQF5{*dRjgXUH>^?hU? zFxN-}hH8(H%C+R>2Rwjft|ZItKMm zyn%I_vUBNLpeg`;RJ1*p_UW<41vi$_=iD1IM@Iq$6KFr8?_@*|r#&&cC<3%mEpo}X zzDD}#hAvU&of8oHx-+-@5F46?9*xNTXQbo1d6^mGLB@}}Cz1@>!Y1PZ)QKe!9|4*l zb6#!JHAQXQpwFo_CPqQH3Br*SJHOrsvVGv{N`V;bdO zsWsp_=Cr9WiI&?vv7U~jvKuIqsNq)_o%X6|`o*^i*Fr(+F6wS-gIZ{j+p_;UwCc=2 zf_1)hBMNW`-MQ1I1CEuN3LjQlG@Byoy8-H9Z3Kuw+oDaE(W6?&E*T! zzkb7*7@3CLT%?o7aI8_b()Q_VlXqIzFbXcQSNQzBi%`1S>R1H@1^>2I8B+N=t)OeLJMmSg>Z2fhqZV10iL8 zlxGBky-7!AYOy)%M3EW2(M~CmWZ8?&AU%eKXN%35sEd-HwEKV_Sf*ZJ$8SI-8eAL2 zX+W<DNuCeL@sl4Ib7zz~Vd%+P5ZwZ{c+9VZE0ZYK0dom0USASGjG4p)>CJaNN5d z>9o5ef4eUZLAoa*Cq$s+&dk8|^Q(gV_2sDEGOLXw%=#(T@(zAu@h{lt*{d-F-c@Jd zs(BJc$;OrtDayevC8h!dQdi8&0(!)ssW+ zgD+&!oI8(<8(8>LYy2;7Hz_a6EIzm@8Acw{9@UF5#(z43bKsS5 zr@bT`*Dz>{XzEedM*#(qi8+n3_DQ}eTPY2#PHi5fj_;5ftW7BEOgs7%avJ57=pBiG zl!wA)OK^QS`V$J;kq+H*%hN#3ykq9Tsg^};+*)+7Mjpnr3~>Ab zp3lNl5QOAv$5T-L{5GfdSQxfco?Y?F|DO`4+uzr-@Y6}t?Q6L3x_hSEKjFf;kp3gO z(%l~_kImySmK(-kj~&-LC0lp;Rq>3)C(}NN^iaOz7?U#{gNUw)?GQ6~R^?;wiT2gC zs7mF~f_u~+^m>BUgXSgpdC)ue_?HSTi`=XAuI43rtih;g!@+d4ClU7T$SE}%oZ5^~ zr@bMR>4O~HPp4-3qAqlqnzpC=0}=QgL)&C3e1Oh^8rRz(4aZKD;x16=nL{UVH^Gu| zroy@8cknxvEQQ}WWEuQUCQrj}IeBIr>W1axOh+=vv)>3UBi&A^+DBKku>|MkS02&4(8{SFyj3N^vWq+lj+1@QhE~SVjrk`;t9{Ze8xg4DDZ?!zw=tE znb#_TlXN~;z9ki$!Y{76G(tnUP^w%a%66cq1QD>zo6lm#MAydkNl&@Ny+LjPlZ*wVXB$M*)+YoHA_jcNshsbT5hTlES z{$PP#IXL*zG;@~2K%R8K^K3ZSI}5eAcjo*-{L)N!Dh}^L?Kh9))7+a+JGEmyrCsQQ z^W_EVDeE1Abl|8I8nYm-+=f1><A)bJ$$gi|v{M|3sHnYQ?^IuWOA|_%*RX?e*!j8 zv0<4(_IX--rh_cg8Sc_){b4n6A6DnMg$h^sA-c<^Kh7KuSU1Bw*&n36e+TQ%n{S6( zE^UE%PxFFH;e_VEuMD0X%z|9gNh#<%iR~iTfcj)geKMs!d9!SDJDTXU)`WTgHjgEw|ZvO-&uk_&oaG5zPXp9ywK@j>zqMT<`s%ve3RT@_38 zSum?{bC`B#FxVx*=-Z;DRat!EaTU;n_D|>Qk<Dpnmrk4e$ zb|Ta=I@oJ}A-^z6_In| zPGDV=tN04_I>e=3?&Flg1lbdIBFJg43zGe9hf=5?9LhA6SxEI1^i?=Y>e`8o@?g;d zGo4dr9ZJEoA3JPcTeT(C56P)q#ar3~3d(Jtwc?3@S@s;C0l;Sujea#-Mm6C`yfW#)D^jk*Lp%Xzm!DSP+UaV$-KkB1x4i;okEttZwLZsR-KRMms1b_SEMBL9M;){!+ZN7tR-{cby{iztY+t}vs&r3h!My2D0;i?}1`THiRr zDb48`Ht}eA_oBMuoH~rfwGzG=P1mmH^|}N8^;ky3>1%Jjs}9*k*CJi6>%$7dK`+Xu zV}7x&Rr~J>!Dv85yR28o>Yesk`l1L;0V#=@l0Yi& z??QY>R8BDv?L=Loe_DVAY$^#oHV^0pn=1)*{bHh-st3EsRs53K^fVDni(HavUK#P9 zSYNTRLSOVwaZB;LkgmF7wSH#B5`93?*Tv}byjc8Kh|Q_S`CHC^{WQu=nLpI;((bB} z-jw8h1!GmR99@LfDl~&EHBt}E5$JEXNDi6C_J?&9`mRYe_K2nlQhWyXf$VQLn92@F z5d~k`8mx5(j~|p%?l}l@RIta2tHf!xKf;Ke0p-@|<+oUZTP7dv^Rx z6}=wBxmmmiF;5)(PyUM#Glloauca6%c+vGv(*3{7@0xbSkPf^~2PtL<=`q6jQ5%sQ5YSj^2|GsU5I%4DBH-!~AYD15}ENuO=UY5*RH!#j+ zeWM-q%rZsq6yA{aPOaL}u(+Y2HMAgNqs#hLf}AVuMreU!Gv?Z0PRFxD2RExtM@%H* zq9jEXwAvgKK&&?683;YMW~OJ`V76ERJUC2Ibjc{|LUL0l@?Rt7f$>wPhM@PNM7sNC5wKb zr%3-Pgs5$%vSsRX<&9LsG$KEHfqi8vn@C1k&skS3Jf6}6 zclR{oXqRRCdeiY2$kpX5j+f0QOH2Hp)fK%}vZqWSx~Z$H_sxRm#J^VT1uKipIsP

M}@vq^b%BcxrE5Hx#PLQr{m1%@`56N)#e6N-b1%S&k3=$eMl zR>ObH153{kRPHLLVZCnl+jI6q+#3CbVvIRWbGayXJzT5qQgG0E+89+Rk{!n5g%gRX zYzR4L{ZbuO=tDLbj0K~tnGTU0upI|I0rRQkZ$%wqDccGtdP#xx7_8QNtDW`~HCifi zFYP~TDsyQo9iTm-XDS_C34Ucjuic27ve)i1^l5fMgBj?- zsJ_R(&751|E@pt{-M3gHk+Vqo3+?i^ zPM@<*Z3)=hQ;AT4Uw|!k@}tG!^P^=-;Exuq=|@xHaEMF3Y|$oOw%7+=MrjsdwIE68 zeYFhH{Aj9j5&~~V)A@X}+EKEq9m9COM9x7Vzsve59TUXv`y={Wh$H#3VB1p$X#gSp zuc{`11*5vyje4SLq`hdzwDV`jUQjvhV^zQA3$BuwFE|ZSn^d>^f?ttt^#un)%AKM- zN?Y}4o$8vtbk{Z4HPbj)o37Mn+V6w;Vv?c}(5|eJ`bwxn9PY*L6;RG9(P>`%|>7 z%>y(2j7(V{%Bwd-A0w;H+A4!jr(vtF>MwOQ;- zKr&wh`C9rTSke=nP-F6th z2;C6=QREt9yU0?hiwB zJMO2D={YY|N?qhS;HioZ@s{5r3{qvOhiS)PSv7WYvnaxMtDj5ro_3?_6t0S%7Ju3H zMiYJd*Yy?Jii@AW3oFYayUV0?aQTcfuW5&_?t3d6{`Z6BzMZ0_MskHn97U{8+k zaNI*?A^}Ca@+DH2^ImbS{@hnv$+?=X6rY`z5JpcPMBJ zr?kjd*CeA=D&2vI#Be}=@;%@-6unsD-|TMwi{5dlzWHkNLAASilN#~bW+P3X=c{wc zXrfBjWTZJud=E4Z1Ug5(Z#d;X^{n3Eu0M74)Hb#I)cc^3B6c09Gw#NH&8{36KgoCk zCsw7~+G)#S%zRnlX?Y>EyebT0q2(1}v^7fGsr_!6Wg_|_)X96TYm4jD8#f8-cZ}Ch z{Gc4U5L$o!q?7WZ11Ao=cu3}id@^RP7WYCRdQsHXN7DAJ&>nDyGEOvboM@0af$1}} z$O%M+qL&i|S`Q~Sg#su3;^743Jq39IM}B-@z44Q%jcYgE+9T&R-X8H4y*(mo|B)V9 zukrTCe!)w}F3msEBg=(fPJO8+bx!R9f$NP^p58dsX>Xju-iZ3m-dLe;+w^z!)%X8! zSb*}Q1llWSf&X$}oVs%lMeTaAZs4bqG~pAuHx8+>hY(#P*hAd`HK{xH(6Qz=rH77D z&S3gi)Vc#Q`Wr#cV9s^w1BX04bkKbed+6A~wu6xOAokF)gKG~)QtluH;Z23j;m}WE zuEJC3r*cZO)yBjZYs1oX8=cZ5wY-Z4gDr=DWx+V{#frM} z?nR}=2TDQ<3axd;*UR^)>(s5qe^oo`$ok5!K~H@K`pb@g-@rgdMAT@1z9v)<+nMyE z2Fonsbfv#+*p{)a0>XM%`60dbl`(%=(%z~*oAinL-J}5PQx#8TxXM?xF9tpH$~DxH zplLqFJ>lA2s=`=OiF;u_L7mfAyteI|tbbbPjQ8lAG86HC&!cnRr)L?2R_M>xueXv7 z#klW0W{Q!V!yet;I%O-VoPvL?EI{y%{~9S)y2JPfJM_yEPU6Zuf?Xj)}IyUa!Fdj9pesVy;2CIHN(iHA;pLJ5o0>=lG22N&F1x*%O=qQ9$ ze$l}wI)bV|r$teFYROF<9ovgk2i)NvNxP=T5eTEG`F%ATf5|F&{DDp2$um;r8GXCM zVe~;RW$e|TirTeyH>)+Ame2zFBb=5H;3>gZ72`0H1MXj|ceCiN_ei^(>yUV$5jl@_ zk1qDVt?sp_D$g2;yfbPu^6+BbNKY?n)|CKzBLP z{jq>)kUHGk=cUl8eNpJp`=6n<2`H7NfJ%Ve`=11kKL;|=Q4+f2ys$-*3O7YjUQQ5D z67Zba{5G8{Dlrt|<_Js{Kyx%6Y5v)(bpU(kg*VXk9m;1_5@y`$Us;%2Ax6Fv8)d($bo z3C_5KAL zt)EWw@OzrBNaprxGjcR=a^$X$b_b6Cpxj-KdSdPFaOCS0*mQB<(BSTe8O* zSaiPVQsSQUo$2)%Us)HEdnQeuchA)F8Iz`!Pmu$2=RQsYz9wIy*L6%_endw+*zw5Z zxsJ+*W>rm_LdMO0bk4Mg9(}}g->kWl=gfI@_S~L5dzunV^Cnl$eP~XG$vi3EG^u=U zIiUGEVw*e#im{oKCuNvO;(T*r+I$nyk%FP7EO;MpDi~*{NJkQrlJ6ZjC?z#5y}Y7w z(&Q>qkeEd7A4P`2V_4$7a3_;oz_+Di5jnX-^M>W$9+8<_KFL(|(43j&b4`!ToilCL z6d=ZwL9%rubJn9XW@MAhu@B8Pl`Ah3=aXy#v=%`+b7FE4F+qA_T0qQ|WPy$lK@?SR z`FJk%EtlpuF71Ew^8Md@{j0ZMlKyA@KJDG>?sfONd)>Y6UU#p%*WK&xb@#e^{hx9r zs)K*^uKmC4zI)xh?p}AVyVpN3MSD(tbe!rw~<%jE(&ZTU5V%ab3tFMIsqf07vjnLPBNM@+->a!rrSeYD~cQ-Z1D(P=a0nnsq- zG9@RQk`oh?O!t_Q(lQ3#n{jW7Cs(hY!KAQf$8jr3jCXVTvv<{|WGFFKt}>$vdRsajg2c)6C)0eCENu;N?v& zK3yZ@UqT4^QiJr*qw(KUyq4k?ie(Yf;9vJ7VZyJ~8>#J_wuvMjgF#o?74 z-oxSSuCi>SExu8e;guXd$zjyzUhLJ?Ew9PC+8giH)nCF`SOXd6y87L& zo$F`R$=-7Q-j(UzZ@Mzw>+Z^Quh@<0-tca0yeD;Ix_3l3HfASwV`KKQZcO(+-;L?s zce^p&yR{qBz2A3Zy0^6()4jnVO!vlxFx@*Wgy~*K2-CffhcMmy#}KA_*M>0NyDfz2 z-i8pSdw&dJx;MbUbZ>7%=ejq?Aos<8K>sW=bgnbMqIvJXE&e2px7-%r?kVSSK_ElA zd&(Rlkl%I3^iyb>w z?bF_f|8!gW1{yz*;^+Gi(igPU2(W2a_d%U+AtPX3__hz)rWOLjiMTyjOT2Rg>z6#3 zPeT-(%HcE;rr=BkZ{_Gm9MTDP!87a*IEt{j32_^xIg{Gi-nvL9bz$D_TwX8s>gwXY z48PF#UrUGc^V-3_osZMtejV-e+D_7Vb^AKMe@>qx_S)XOK1YnUH?N;jw;=ZF7H@oE zzhBoIn_&oh^+wJbLZ0l$^u}NMF}<;&AJZF$`Z2w6p&!#5nmDF6dc-lkF(i)Zjq*6A zH(rioWAkhr_^gu=eD<^C~=XxM>fXs&^ zl|UAGu;p=q)DGxe2K??}W#%O@y)< z;_oPa`8FC#24cKCB3DqHMe*MTvNBsJmTl>vK`eeW#iJ;mPO&`7+bI5o;)^LP{rc3- z`(kFA%%4%vhyR(@Ij>sNI?p>jouyyL;bsp`2YG%ZL&iQ}Bi+ova@4n#6FC^;Pu~`Q zC!7rFO=K{|V=10Z@vOn959_HfZOLHN^WTw3;?>*rN;!F8S7;R6KmrwfLeZspm{InvX++9Q$YS4@L-%PPkS)qNiW6b z%p<)8#?M$mr{F#Uc;R&YOo&8_hQn_CkElY;LNVig=G^yT8?6r3asP;jb{t>6ry zNWp_S-ew9F3eMvAoGnaM@DO2!f-S;qE`BZ-KVQK)!XgFd3QsF|xbU2UM+vJGJYHC> z;6mXYE`BW+|FMGY!bSxb37;#tMA)g|3BrB_JA^}A{I?1&6&e&=CY(_4M4?f^mBJ4S zt`g33@fQ_5NoZ5>WZ@>41|84dcu~Pq1&xAd2s#DN6v7nzkPxNd*+Q&>9~R;OU!}4a zOXWnJiP$WF2}`xbgC&&{e_D z2uv?67nm+uAuwIESm@2gv+?qrz;x8}0@G2i3wa8DQy8h>w*;n_c5~yXPMDzJJ;Fo< z@8!nPKA}p%tGO}tS8hzb&5fhA!U6?#?Cr!?0hP$ zSMU~Y9MuTh75tU3OTh<(0}4JU)GPRya7@9+xiNA=z}2KIpHEOZl;!hDDyzSvc!3b9 z$m&9>KV_L*#L47hD$lpdBw}xWxo*L3!ekZkzfoB|E#NmLSyq3b^0p>Z#we@nJ=j;F z|1>9`29a=O!h_V%GJA+RrA(uUWgg9xF_!s*2m2~xAzJiP%IqPs@?$vMS7c+Mr>NuN znf%9!O#XX|O#aPc1eczTg*dTH!3kouf(M8zxcC>i_!kv?kNC2J2Z~Hr58`l&$nDl&N+CNdctE;cE6l*n}QXz{9o$B0b# zjum|re80$aZ-E$~V5`VZ|pBNG6uNI19 zMbu+L7M*8BqoUJ#E934~9pxP(sF!}=aJ0zu3F0nUh~E zbjGUK`ogSYH1t+6{g$ud>|s?P7ti$Da23;UBUI5`yorlv^ZR|O3ioV(@uvA2rJULTdWFK+E4?_7_4^f$OmX&=p0T~+#M29<$FJ(&6ZW^(;C zi|emHaQ!ut>!Uw#ee{xw%|U-uu{Fq_RGA8XgX8}PDz*mvkn4+&RBUasPF1F~ozZh^ zd&{`?dhsMr8s6`>IO|{A@8|U+p|8)2d0!v;_YnW@^zXHMu-A`=82xzvh<~gmOZKZI zgQ1E3E{ym3yS!;gHuEo`obY}dZyNOZc=0+ezS)DlJ{-j8!+9W^@%eSYy~$9zpXB3g z^uvsy@jJ3nKA)s}Ob%yL+nDpWJgLwFb03GD)aLZeaa?*Q@#W%~K3_tZKjC+D-;+MbPGxQrl3dPGg8lL57UcuqtbNFR0{l5_% z7ti$npDF!$wEW+bJB{~Xj%LKxA&6h2d&J~9^i`U-a)^wP=J_5RrPTErN88&RUc=G$ zF2~#VIo`fTm=1h{`zErM`zG=xSJzsQ14Zu<=BxRT4B+CEx%e~%uOn>!`k1h_=Xz4b z#aDCj%s=xt!q$=-2($S&5jF>HCNFXEFLUv1z4{}%PjZT4WCI}Xt_t0_M()A+wq*|<*e+l1L>tdDM$4Sw!J zthXTklI|UpWuulbe?={&Guk3!)^}fW^00%Ghy9$a?&M@(ALk?8&z18v*S`n2{yhlw zdGR5*z4#lt%}&OL3G+W3;ryb9NeLIv?3V8c^W!xT=70O1>LwWB`a5ox>r54;RnqG;qGbNX{Q<VW5KZIKJg`d>c-`HOTxK z#PKJE<4?vN`Q!ag5$nM#Ex2!CG~J7f@sm91d3*jpEqCpCy#D`c&u4n(I{QK|sxpLlSn84zOvNS(&_{=cG zRk!60%V*!a^YU5x{=*T=YlQnLmhJ5o6u(IEhZO&r;*%7=PH~qJh~JjWq*&e~H*W;{ zCjJ4%n<#csTtji>eTdsB&ZbyJ^~_|7q#X%Hrrr1DnBgK&v8%84TNpUvCeJFmM z;slESO0lfdzM?pt;tLcHp}5N^#Q7ADp?EaKPf~27cq7F{6d$A5L9u!?-Jd{lI>j?7 zo=)*26tAZE@n7B7eR4Fe?*`NJB|lM|N6!Q3$FQ|tuQ8~{?4%*k`^~+OTf5nnGV`c4 z&-9*%{GoX#(6a{eI`Kg+?*uMyDTm8BT*0kbDis@bE7ukmxqaPdqxDXuXK7>~(G*(m zqaMtBL{quCrg6Ahv5m1zv=gdmnGeykIdYk^xVAjR<(-UDJi_MLd9+<`jFB0}a;;WS3M{oFZg)`^*Lg%K1b};=iW3gbNG7>n`}&PPqqEF4qs=J zZP5tV4si)-RA?*aXe;4pc#y+o9G=M0R?g8@!O>R9(e~g!Oq+$$R!w|@y|hi^XshOE zn9ku@9G=b5_Ap1=9FDd}INGNF!?aaU+8!glgS~UyV_dzwUHSxvpXBISz|pgi)8|ic z-zJ>2K3V_Fr{9TWIv>BIUXA7G#QO@ty49U$b5RJG#z`r*hcqhw(is`(ZF1{V-m?%Jc@H{{hCU(;Plk*tuWj zx9s+TKz}!T=XQIto!Q%Ec1});m``R}5%bBsUBrAcyNZ}k=0*|o$s`mrpUlK!=977; znE7PBDrP>JwqoX!NiAVMnUWIbllff<^U16&VLq9L66TW;A7nn6K@T#YOxc6XC-avF znNQ}+2boW%`9bEB=`w-&WCl%OKADFnFrUmD6PQot*aYU25lfj*rhh5($v8@xPv#G$ z%qO#}v~!;fzb;dkp*|T(N)-JwRO!b&>TPH17iN3sckqFrK8&a3$n#@%8S221iapkG z-W<)%5o0(%z*tV--rvC<# z{XCGX7x9!b*{6ip!ZLY&WcBhsr82Hw2lw5xjPt`dID2>^XOow6WmYJ21kTIsd-o(| zzwWIxr*JeQ{ylBu!z4i8Mn0zWA0zXif45Qkzvt*Y#?gPA!zVfH;^;rg(eL8=>m)Zn zHs0Z!OJj#~E@=PPQF>0?ajxvkwF~h#v@P=4TNlmS#QD~mIhxOLZTyj=zm?MCF2nNN zca(u>u3p49X}#CDdarWzUgPS$!PP5r--&$ax1j(B)_Yx9qy1LBJspSxW#6v@>(z66 z{sTLF`(xN}hwp%)96e#&S%7fv8&-tCl;yl(;VXi8@fN`q_%MpHT`Ib_Uu z)q|tcq+l!uX`4gK>BFVrabFJi<8a&^zl-U(@)0km@O^Z?GW7zrk`RTM_@}31a-4C;U9VXkzE<+^rK) z1`HHmn22NaPvljY3-D8iiS9;%C<UuE7+`_Ej;(Z%{ms;x{RNmg2W4exn@ATti+P z7fik^N7?(3ybklrp>mY%4>%q8p+Z|8`AESitEh9nr)7R7(@D$uJNcVphjjF_F}#Ia zqt$SDD>t8R>#!e*;qA)0ax2F-#NKjTq~n=-Z~9md7Ap|fk#B*{E*03`I7#Z(cb21}iKE%g(QuyYqYK>H|02he zOPpPFne!k1#GRS_S@ARH!5q!@0bb+I&tB*DiM4b4#02h~n#i3^6NEA@zCyu1-1%9p z!1lNM3G)=J6P7C2UtoI(1G%$l!2;Vu*hP4gi+`JoXM4uFap%zt+!?fRf$bTK6lxW0 za?f&JD#1?A(x%p&A$n$=7SMS(K;?5oObA1|T4`gum z(qPU;%I3}&XL9yZHn;!BA~0Fa;m#N5a{H-GbD&qa zbD-x1Zm%YHR{Cdw?a%y0_?b&{l}mGzOT)(9RXXmjQ$7C;Jv*OUiSqC*l?T~}`K_S8 zgKYS6V+vOuV=57=#qHgKiG!A-re~n0Q>>w9uO6dVOV3X&rP!A{d*vrGIni<0Uu5%C zfXLREdXbH_Ad$&Z7msapuTn%dPo;@Y1*daoSJSxjs_EjJ3LY%JtziC)>R|4SYNohd!P(q-)fADnd?9^b*-vh!NSh z+8BCPQP!EUot{;svcZjuM8H2&c_|qn83+NDTm9r zapB;`#YApgRB+>B5;ra;bK_zvCs)dquABuNev&%_zL*w|Luv{GZEV@A;ru58gQm*TsJqKZmvUDT+TA zzrc0(WW+V%R=}~7G5s#l3H_Bj8SDB=WWJzXTwm02ct6({ySTpC&&lvXPKFPOCIx@X z>4766vpK&Lna$ZCvbEANF;BtA#R3JNS5qE7srn(* ztACzQv9paO%3eE7zqCUi@qa5a?KiONH*jDTmj4CqN0SHh>u%&pJdJ1PYQ6E^ za%S8C^M5zY$;lF8OBLcBs!3tNq>Proot|5t>A_4Mc5rgFlf%2XzlX4cldC%JtoVZ@d(qo5Q?%!@#Y_yK;XY%)qTr!{|B`eeam}n3DG! z?r$I*Rb*$oZSY{e-u0be%v=8( z808;*Za+}@|523-JZz)oU*YDLA2~VyiNn`8z4{~f_a&}#^8f#^_a$Ib6<6E$_H;LD z)DWY_s4)mg5C@pPz0EXktb#$r0f}2|hM69wWtbVedsq||aYNhcu6?WfMEI`wsp)m{9%#Rfj|1}7I6T+?Tq9$zp3x&g0f4CiE-49bc+Hqv}ecOOeV>{3* z?!fm+b$>h3q}@JjeZK7+?ql!|!UGN7HC$_O-*Cd<0b%Qd=tqDDhOIxM-NT~{9t?PB zc)Y=N;fby-*M(57$*wKeA+9agR4CUxDA)ZaZ7ghk7A3;-4Nd}1htD;*A-ve&y~EEM zyl>e05gH!0{(?q^|7!5)u=N)-CL9fEJQnb{u=NXcVA%Qsni$^E;Df>gLbe{-cCzyf zh3hifaDV*voou}g3fX!a60-G{3fX#V1e%M1W}}HSDLe(}Uk>yS1Nuh-{Z^pA0O&tt z(oP94FmVnKpK9<=0UsGY*Whe;vB52XbAYFZFE@Bb_*sKH!XE(tbvxVo`~Y~f;r{rE zoo#tPf%1M1$nM)(tm6Ao*9R(M;3 z&kYYS_`Gl}gb#sm&*1aJDT99&-qYa4;Zb2*Z;O6l>uqe<*4y~7t+&ZxTW?)qTW`xv z+Qs266X(Kk3Fxl^`g4H(JfMFv&|d=dUpHwl3NJBnE)6d;__FXy$m`1=*gm-u=-6<7 z{I$T_D&XyY;O!CM?RB8pe-}&hbra``@LNE?b{9+k9iaaK(El9hZxgZfC!4fag(+O( ztHawzEd3*Z{*Dn#f0u}*KOkc1j{y27o3u;ABTSrY!eb1+8Sri42?pO1ZiMhD1}_h{ z8+?2C7=u@Y&oubX@M44S3NJBub@+ON9}M4O@WbI120tEt%-|=&FBtq}c#XkNh2J#z z>F_%SKNJ4I;1|N582n=Rp9a4aCIyGYuZ6cX`1NofgWn1dF!-|MuWGDJZ=r1&B`$Wc=IJ-v1 z8oV3e9|0a1nP~8!$W-8GX&*ZmO@+K{xIg}Nz<&$y-v<150sjku=I>0}JtAkCI71?5 z8$2{}slj!Tr3S|$%M6|c_}IvDgXcw78GKyiA%VX&o%RKv)s)#ISSRpx4eH{w%ujOq zM`r)BU3g2gf7vdK`Pf;mh|g@ew~m0c()u=+Ia!I^K{yaCBn2H zAEdAthiWgG437tz^G&|{hI>KyOF)xkR~hFZ;O!tEZv#T*n9?=|u%t5y=uGm_nG!0; zly<>-FvUL=!bv8SI-iy>>89$ZOI&a2As5~k@?C6r>j>NZX@`%u4?^Xb^4hk>k0qU> zp^QiS=I#ZT;;aXFcy~hTpg#uE(i$q` z_m1pf+IpJ^>Un6rlRWPju{`e>L7qR0mSdu?*CUN3on3&=EZ8V*dXKJ*U&iw=$r{@&joy5#M(Z77P0!J#SyEgx*%e8suxDA zP2}Q;wTWCFq4B<&^F1q4&3+WTi}5?=c?t9LH%@yM@Vo^0yc+OQ;Q1Qh?P}m{8Su6= zQU~!95MB@A)?RRJWMANuYzJR3pSLp)TelIP%OkX2@1!uz&$}yZZL+rm&vya78~DFH zV(lZVB32)MPh^0>_eQL}@4kq=TYbObbCmNy#Ok+KN34GPSCPpOJ_W+X9;`um1jKeh}iQ^cSOkMGKu4?j8yZBqJ8-HSNQNYJ`2ZfG>hBuchC=?g0_1a@b4q` z9Ks);DebCLcKe;|Ypf^cgKdlB0DW$3GGA|nibB|`e}`CQ(onTIQx|EIZ5 zZe;w7Z|=f+(7N>g3g6E4@H&_AaZdZ^h_(H_4rPA>>gO-e=ih>Qc-uEek-hJaO#efs z^AXekfcyVig{@8JL&)pz5vvdXGGgsPUq!5Ld@amfUqe0r8^*p9wRISZTAN@Pa3pGd zibkVHL3lfacLB|X5WWb)?RntMqISG&9<^t&wuo9=&$ps>>}(me<7KO;)$?y1B^$)n zdAf7-ab)V&YnA=w6K*3p7Cwyx_Yp(#ypM>WEt2YIpFH)MP!z|At_SKHXir%TSldDR zE4*Kx{U1i@U24haHc{Jl+Zs&q=|I3?9DfH6FEMZ5i`u@l1El@FFKw9mIj8+0#6jH0 z7oYmZB^-Zn^bo__V2D2ia6D@Ja59Q_aHxO&lIaZN`0`Ff26!F@boTV|K>hYHPCGo> zW!B|=A?hX_**( zXsfl(r_A%@=qgihlYzH`0Z)nAvH6pz9gl}Z?HqV$bP(i4XH>p@6yYPI9|`)qA4PTY z({h=ZF3ZkLS8Nf$Krm)$vjC z(>q;ZThAvzT`hqAd{We|Q>Q>(off6}R_jb`AN!$eaUVG2-IslV8oRIwUkLqbQFM&K zXTiKW%dzsw95{n97yS3mgR>TA!+d)R;B&bxiGo;74HXemH910D2V0@@iPSe-&M3@UNp*zI_bv<54Z& z>b@%Pzud}w>3cIIrnCBe7~dB4>1Uun5dXW+ptbvc-`YJ3;+zjy=i6W5_zaeHqnUoa zopAy$aefDD%2UurPs7~)EcBD7p`Sbp^Uq5#_Fo13r>GtKZ$$0>;!UXAH=sV>jM_8m zZ$)W;q35U<`dK|Nh3mP1Xx8OAXC!;10-ku5F_o_{}d(Gt}RlX^h&l?(anH zy^nXJ_T2k>QG4I&!|3Y%Mw0_qUgLZI!ydmw6q@abI2In**uc z=-_QyrF=hfle$9?$qQUtVuQ{IPC1rg1@UQJux( zVyj*YMY~_kbhhke<&CX+*>Ul0z~AWw_wjq#wRMMHeGJ~Qmz~FU?q&CMKj_s{{|~>I zK{EdV?nmEV>%7Q#g8R|;);b?Ee$4&ohijd1JK@LO&jj9H;V%Uq$oL6&t-yP?)BUes zlNjzyWjveD9i7W@#z&n#Yn{6p9}t}=@RN)uL?;XU7sdxh4-vTcOo?9*_=k+IjIQb9 z_veZC)AyVC&Ap$#DfiIP=g)@TL#Mms8soiqyxZQ>yXrJ&UpClr&YWq>wM7S?17tje z@uQ5X4=h!2CUvmv>fA5JRA&dDiRJU9Co?`Cd~Tdz($cwHi%)_(*C+Gc>T@~m{Hkxb z1pORd$vjAZME7#q(}0JCz(eJCTZj(HDvvXr#m)<&EU$9fpTXVd#gO&_z!!qwn2W%_ z%Edl^I5a=J$Mmms{%Po60ral~npXi{0`#x;`S78=kK0N3MrWJddOJIGvTVja9{Ve7 zWwRTB=1t%i=odi$7Vx`rE8OqC4eq@E68zpQhkM_*!~S9g-}O#24>vj0&ZP%^#f;{% z-05UQSq|Z}E1Cahg>AlfLRs#DvfS;fAL4lq)4b1_Y-rxgG#4psY2F7k?+2O>l+nDH zX+Gq12%6V2onLc1-m0+eZw~>@hoPT80{8kKg?fGr>hp2%*ZKs!tMVJ;dsD9+_b@+C zIm=8LrC-fk6}J351^he>eeW6H8$%@fJ>5xrfj>GAPwMS_#`IrsRtfr>cM(nL$6#B9 zEq%XF16$sgz<$s0OcJB<=q|b#Sa4g z!0w{mtV1}Hd6RF2U&^>IzmF{U_5G^eXWtXbPWb0s_P9HBfbQG! z-HrB z*R7Oe$GFwjwV*%YzcCLJ+zSWjaW@`#H~`vf0_1xTlzkHP`9q+u9t!Pv7`%0I1o$ra zDctct67Kb9;XUZ7?o@-D_}yn&#sj&GQeS-#x6xYWxv{EGB)wjP3*E`0 zTyvTJX;7aFf&bG1pY4VWKG(H#{&~8w=P*8c^-=VgE|XWt+)-wU~~KFDb=;th55$f{XD`8%}6ZpIb`on$DSAPw2=|iryM?CC~F!(W;PabzkUo@dWiSX^U`Zjhku54e;s_zyaB#t-h{Wh{=)BbN&L1u(Uj$-s%4o7Wg&bE zm*su;1yPmykZXXD@{C@_%V!q)1AbI8!>WAN1D}MS zXFk`uy$9+#{|D6hKY5;!b^aC9`C8!rUx3#_90%T=55c|oF!&0Hg0Fzh;a>I@aIg7W ze6RWM%)`I957ZQ?j9*tRBc79?_U&CH+&{FxDdVmoTgJX2TgHCi69D~_>;YvN0Qb%J zfIH?xfajrbf4nYa$EgQ*$>VUxKM8(I(r{y8y(7W*$heR_6S9A3 zrNQGv_Dsk`@JZ4bT5a$Y@JaI1kky?Y8M1fHnnEFio8gW7R(RKbddM@l4c@Zv2wB}} zC%kKabZCUZC3xe$o8Pq`!fm}9*K?ZjfKat|p8`5b!ehAI7lfAVuG{?tX!rRcJD;2w zvTrvmfObC{`olTU2NpmdI0x?Lp9}rrJn)aP82k)e0QdAS1YZ!Bfd7X}!6(UOA$tbt za=5>L1^6FW0{$Ov1OE@d1iv@S!RN#6p#=sn4Ox55H6g3pUly`wC$0@y|4!FIzghwK z4(LmFhDgtxD^lH_#AAOJ;k3}3 zVl8__;rFVnYg)hEU*Q+H4?Gn*YLM;&zlA>VB=mvbL0dlsec+GK?$1G6KM#ICUVwIg z73R7>f!~QghhW`-`Qb0%7v(MR2l6)fqWLS#6@P=d;$3L>_rR~w`_R@OhU~eTk73^U zB(%if&qCIY^Evo0`Xcn8!T$)^`>a5a}nxQ2=7xOdx3nP;wOyl`xGrIE$aLW zrT^;u>EDLx{Hy8e|F`|n{<36!&wc@TukQ7~y@GgC-a*js9enYueRnc17Lt>?scvNt zy0zQZ^DBUn2YMfYXwv%#>wEi>-a9yR7SWOK8r(I@(!6RmVfn7XuNg}l!PkuCy9Ryd z5SH&69L!ki>Q7_5jPWYQQpf%tWBIPZu5$^?cMYa6mhT#z$5_5=u!6CC*WeY#@?C@Q zF@)v21_{RUU4tVS%XbaVVJzP@xQns$zx^p=`L4kajwLMhVMcMWDRmhT#z!&ts+ zu!^yK*Whi&(w}7id4%P=2KzIX?-~>t%XbYfU@YG?c$Bex*Whc$cb}kq5>TSo-{8<8>cDG48ice11xsK+{dpYf?&MhMCGo1DmPWvZ? z?LO#KpmSOoo%fHEHlx*hXkW_JY(^IXz6kv2Ucqy3=y=veRQ0PLoU6ZoJmICzJA0UW zsX%`j;A0sZBGZ->0@U>&~9YkAeY@C*{+F`U;u zPQA$MNKU&7Y%%Cx8tparK)&~bt>Gc4+xvQ4w?`e%>%Q!VjHOTJKORqgPrkG8cjogA z#@n4h^k0W|e*<`X)7NK6|JmmR!hdt7i89Kxe+4@fzKQTY;J<;*=tHp6eFX0{d;&JO zPvISk&%l241-#w%nPcVrzk|=EF9c5-e<}Vm@|8K;Mr9${Z*MM(S4glPz6*cbm#}B=i3r_cPPC zzXN>QciSmG^|9kQet$PSSj0a;+A`42V$<#h*#9Pi?a#Y|ZfX$NCWZhW1Z5uzWlw=F zDDB!kTD@z}VhwZcIm|r)?*+cH_XZ!lBLRZ_YYh7_c9M~*$4adjhg4z z6qa#@`Qo6zDfBCaXCMhb#q~VVoh9n|y%VHO!PfIcpS{E4M!*NVc1}3d?PKs^toM_= zHCEM^2Is(kGe24PO2f~Q%+C+zOKjJREbx#6z1ei=+j;2Q(?NHd2Rqsf(3iFYo&&a+ zBKWYH18sVY+hXwXfKLFw%JbcM5N>_Vo#Neq{+Z8ot$yh&H)Zg-;5+Dix82~yZpq+F+yw?->Yi=z#qRkAUkLajcZtE5 z1HQ^#X7DxcjRs%Gc))z>zf;}M`mc4y%%`#3yy#Ed6pXc4F5N_w6cUJBkFWLIG{rd0SJOui#Fz7rZ zp~e6Y7cp<4kmWNJs>Ww6;NTs->zU83LyHBUk1(CBz?baSz-MoRDXsY9{DISMAG+9- zaeIir1K^!NPxu4S0q$aK1VoeU0`D=+A)%KH%^^T%DBu|2IM7dlzHu1%XWkp^5yQZ@ z?cSh!+$UuF;l9u=!$Wo*909)8M}p7cQJ`DiAM}mm!Dew_$e#H>80-{BhG@NW7tp*n zG_)o#XKuTI+9kt!*S?I0h4B1M#em73y<3 z=yGRp+wH|XH> z1$;G61E0M)@Yy@9#?I}nHTJyOOz^|pRb$6g2l(SXx@I1P+kH&|{P7lRPBpkxb1sB0 zhH!h2dsfZm2G0RMy~l!&)_FC0?-Q(l9o}Ezw&Z>iksbKc|5I(&{Yqm}FcK*WjFXOZyE6it^6t=SQl=qxRxGnwgJ&*24*|8w?@Ed3k&9O~_QsJ9z| z=1nzQLipAYZrko=@O}M@nm*KLIIkOOs-02n1AG!b>ty;nk>lLX_&~5AA*b8}E;!ZLufz#C^7xc=)ydJ8zfg zPN9A!`^l_Rs2@&*dnGbltp%V1KLqZTOaYzzA#g|LFw<{GIfuiWfJefcfK9xoJCpNm zH1t<1-gN&Do*BD>d2Vs~B(!|n0(|BGPY2sU9{8LIxD)Oybitj4qe0(Zf;$TZcrW;87{o{XIN&D%KLh#x!9iUU z_J`mdv4c1-d|MOoYk*&ec7GGv`Y&K-dE2x*(I?!_^gnP4roVjvG(QIXsqd~0;Zr#6 zSIz>H_A7}0HDCwyMIo>qM8ICq3-IP}-u2snzXLXfZNR4RUAV)tlkZLh;U&yxUw4Jz z^B(R4yMj)>Z&lkz6zC9sg6Rz5IFim_pfd#0;``2Vqnjc+g#XHPhPkT@KN+BdZ#3@< zc$AMHqEmAk;U5D(`vaXHLt3;uOoliI_xP>nT{*8K+=mR$hXb7>fPNF;=CV56o9WB| zo{s`LGa&8JK7AnVDURT@bKEBc53^3Aw6i&_q%#}zigSR@v4H2nIsfC!+T~29e=5hn zf$5(DyqyYk@E*Y;(2<^L`Z>`gypm~Nu%uTUcmR4wcUG6=TUbvL+25o^C+Z!0`PCk z=zMD-;WZqmb|KOE1IHQ0_>bI<;}^;^>QuLfE|j`cdbh51A^C-Pf$OBm_(eX~y@>J4 zP(N#chd+Vt`Zcg;{Ta@LzYg=#8$jnxn3w(nb^bogOCR#QbkRb2exB}SEMxp4=PTF5 zmwo+>;@{5o@CEbv2af+a)aMt#|33k*b%SH`EvCcUZbc^qde<7CZqwp=))7hG!X`e> z1Hn0AVg=k^;a;Z`-UoQt8+h2Kif-^I;9=iQ=3yZ7aCFG_t1jT-=!$y6QO+@;V14e# zbWQ|1^MTHZK3$*1r;)Bwie?>(m5CCoCj&`8+khI*_?J6@UVo_EV+1h15^Hv{C`tcj4c?Zy3!8G4JU1B?b-T`zTD5LWart>I=@3e^L0j4uhVN2&x zp!0Yco#Y~tr}lAL#C~n!BHGgp=eC}~;Uk^4b?oEjE&A_1j{a@vp6mbC8O~oVqIQ4H z*-?yz7rCGO3HDsCaeOr=8%+I#*6X)8?OV<+ChcD!?OTxc?XtA)8HC@1IEdf(#iu^m zkK?1}h zhkw9rIu6=YhASD{U}{rp!>`Yf`}e-0ugbK|khTTV=E~CUcqZYzM5Iuos>SJ|7N-vwuI4wra+Qz?r>c z03U14@2ysKj(7(1Il1at$01d4aIZIu%YKq`q$vBDO!EXT`xT7mvmRhM;{{M&t4|ok z9=0?-rAj@V3S~bSbU{A>oyj3^F7Y(L3yrUUjj4xfZz%@-4?M#4aF%nasE0L7^9-(s z_ZgoF=Y-FK@}BMM54P;*RBd;wFFFLyWS$H7Jm0&J8(Q8(6&%!?{gcakk@Ku5?>1)< z&Ba{a-56iM2MQo$BorxV$%TJ;-}ZH*h`duCT2Kzpo*S zZ>~}gzu3TfxE1hi|B-q)nd{+BXMa%-=W{)*gtY+u5v>AzkC9JC1Se*^fp&@NAce*1Ua7WbV+GR6~5 z(AKYcs0AJfKYAAJLH2ao#UA9ZjQ4iB*0CS?{H$-T%(f|a%FupU6Fs@aV8 zRI=h`FS9fG4;KrDh}Gk zs@cC@JzL7Lmx^)p;o0kwWBqrI?0BCIcn*xOdB&!&TID6r(9ZIWah>)x$G#a&IOrE; zE%Q0wxyy|A`M}S~fX^tCb+% zb)Gf+Tnq7UFqq=gJlV+c?{S_J@!L4xRbXetyFd3s{XYP8i+n|m>%oaev~_6v@^AN?};#9rgr^DVEz8|AM%_N>br z=Ik`tq3jv6w;X$p@onz+62Ifvvt;i&_Uy`g=KXiFN!fE{pK#xj_){JwbI&1t>b=gJ zTdj4@=K8;neK20h_nqC3st68k-qeCXRJa(N}6bF1dU+=yq;y=RW`Z>479~Iu* zq`e;Kpf9ZJp6C=8SVi70^0W$7~{9XSia4jVCv@vwmrSh zJj=TzAD>I|!;Mw_`AmR%Ap9?`hZS5dSr4}}&wo_d`f^zTWyd=scS0Y&1MF@qpdRjl zwq61CaF5%^;CtbI+5J%V2jI@&YPd)CE7zWFe$chPJ060&fe*WM_Hw)Ps4Vi%OFzad zxnIe;y0dCs>2sU?6;7T<_$hZtgYIMKzpMIP6^mbhI(Z)Y#!F@n5$iAXhc!_4mtmfN z3Fh$EVcvcV#{Sz-C-1oSjQ6{6hweSsp7H+Bwd?Xnu02QkDfp=W4DQW+R$V{S_W} z9_{b$bmocuUEw^kL!DvTs72Aiz25Tk{=3(se;c~j!#&!D?(c9<_dm6F+my3~xYz5+ z*~pL2lV=h8WO_SWoG;HJk_@oD!d521bBT?BCxK4pV4p8XnoIkhPxvq=Bk1qNG!KPy zjE4aov`6INK7K3cbK2nC;L*IlXk?mGtDa*V0{jrpGC%X2Ho?yZy$yyYd;bv{HV zqvk8ZTL<-8oOZ9WwAJRZ!#V!JW${t3rF|due$M(nI(CWU9LH&8Z@q!>K8*915}sN{ zljdhiyG63bdG<1j<8k=qmlNKb@yeeQZY@ju*Pq*RZF@ao>HBEw8wg9^M`IaF-$yeT zOZ(0hjHU0Rrx-6|OiuW;@1q1`>H8?pSo%J?lCkuC^a5k)`{*mi()Urnn+QwaN8=bv z-$!#9OW#LVGnT%O{=iuJKKd79>1U(krYydO&8^B{aagr98iBcPvr+_63$f5SB@@o&xBqojAWK0}^y?7i1#x!#Ma z-e@eGs4(^ab8eIK57o&pIDEN7ekxWmUSZ@hY&*hZ03TKXzZSsfSHapRNq>c(;6AX% z`DB>xS8KRm?WORRrVp%fNH_9lz_Jglfwo%%ec%96pxUlQKT zEr>dq$TT-&UBnRzf8X%A8R#xHhcoJ1fF5s4z*~VHV{6dod>eEc-vQmuHlWk^F6cD2 z1)aurpwrmFooeuofOmFV4c-NO2lWBGEBNl{4?2*(t{wXW+*2XWA_%v>h6aM3WDxir z+5`L!4FX?7dw|Ylh->GEI`AXpxmHh-0N+7z_XP;IeuV1XH3m0;FP%LB?*(`t_ZEYP zyLTBp!hOu(k?u0`D=elDIUJUpG zcY?teyAut*#685|OWmmkUkUhXx4owFoQW9U(w!Q>a$eoh_pZv+0G8|c4|%RTn&bCj zo%RWgcV&CQ8I1e--Upcjcnx4ZHY?#vna)1GcRlp@C7x-_UdwSt`Qp3;ao(wd*Fs)F zEc2b{e@`T2(-OXo<4pF&=?ihHVLhf+1Ez2qJNGcn9M}INzm)bVvO7G>cslFMUsd>f zkneb)L;X+R?=oKGYg64f8?8tY4y=fKL6YqvMP*%aZd=L0+ycgE! z)gZ&%1MBs@V2fPM_NmR5lYDy<+g7$+PWAAMs=9i;zV}ynm*s@t=K9&6)4t99;c$hi zeRIo6=6oCM+HXUB{tfIJzAwPr=6e8OS7`yVh6ymmp*O z!}tfI`&@Rv@D=zQTUGQv<%@!{9$B68hZWXy|K$d-2;7 z(uVR^9v6k>5^G&_uwAsjo&E|R%k8oiiN?-(oL2h#I$U9^)0S~0wtm2Z^n-UNFI!G~ z+%}H0^hXrFO=#bJdpm#l5z*g<^Lj^No7Xmw*8#A{JP7b4*i*Ds)ISjJT>%rH+g8Eo zw}kLLTt98jA^Y|=c~vVr`XSM{MaB7|x5aNR|7Pim(f0JrK&zA7dmD*w*?iOV!y9Uc z8or&xw~Dx@Y-hv&rSPib{C+KZ?Y#aoil}Esef9cmSmDh?8{JNQM(RbAx6@eIllQa3 z6{c}l4mTZ4GKlWqC+UWNM{mcP? zCpg-6PyK%y{m11x)H%wGokM|7v}YXw_@}^s6WE5P0ng2F{;gH~XVcm}W**M79mTxO zx}DBA9p=2Z)mrByuFu1rYCdg(Wx0^cBF|Xf%xO!k?^>m>JyU__F!63qH!1=wCp}Y&>{NCxHD?1BxWoPr4)Zq&t{8Zr6o+UUB^k(O? z-t6hyXtr_TH$LR>Ic8oB*7FjmXTr`3c^34yqR(u%!kz`~x5AzU zO)G52LbY?DSHgO+6zcpMI9q-#=zOj-^&jLj_%7=H%;zmmbhzg87tH683KO4sg)N`A z0B^qpyd3yk34GoOeBKRwuIe$L-OT6x97pnbAM<&J!j{kbn9qw8wr8d82R?rV_(9{JU;_<`wZ~>4DkF6@cb@l_L%28 zSIGOV`u}3E2yfwDZg}3@wLEXmGVK{E z-159Roa^(yxoq*)uwU2)berFWJ;HXt^Y%UFc>wdgvupe6POcqaJGr*6?gVG*b_U*l z;5)}iY4>58y8_KVuI>MQfMy?{xhv4@TSoIIO!G(XbEa;013q^Hngd)rrUpRW`ri=< z((hvWgWWZT{vN>d9zeeq=+^@M!9agV8U2M!KMr*w-(r4JVLQG&s1yIY%ogLB;S}IB z;QEShum=0X#)iM9%7taTn#;HslyMmJ|6#5jvwK4S-xKO^FW`S~!21A3e?-Fpj{rRK zf3@rzQYZIwos5M#83T1P2I^!#sFVGmPR2sH#sS_RF#1^<4;asiPxybPP6)TCILi*Q z_~kpkx%OW(g*TwvtTuEbOG}uhX z7@kM5Ro;vdkX3#R`j!b`!yON2`3?dZU^2*2Q{X)y>04kd^RQpp**x9ngJ%&BWBz~Y z^d6!2l0OALry5N0N$*tT_^r+^BK`u-D+lK@TOsXq-}s_E+F2`UpICH068prfna;6J zouKnergIFOb2t|0%!B$o4(!YG;Jm~MAUmB1d+G(e$CUUaz$e4`hszv$2L5Vuj-B>0 zCmVdNV{Mw(nKuaNzP3I4eZ6Dtn@hQmO1w;@uyL$!;Ts(51Nc>SH2ytH1QP$zvG1omCstIAU*J_#;+J_Pk$4TS5)!|{p7|txl}~I* z{AcstF3I+X82ql&V(@!To53GAM;ZK~Q-bh05PrPDA2|yR{@Af^xO@uuGk)LXUhcQ^ zSl98yN_i%>lHQ)M?t8B(`~t_njN`w-_-f}n0)NPODfjt*FusPza_CON%N#Ly1J-Z2^jEm-_}SD-8V8gw!)*jz$jXQ=^uN*M0wMZtbi12&W}oPUVGotLP47{osk;!J}$_AEp% zz6&#k>rmd&`^lZO4$893a}z|_gDBFuB$EGx>35Wwyd&;`ZnO+;0qM@Q{MsG z);6xK&+oeZA$%Z&4}$PI2v0z`JqNxW*lxCmdozgZc zZi;NVp*D+ZJ{JBrd~OHNjT7F~dpbS!r9hZ`DfsT@fGws^qYZBZd^eAgvCeWaM*eu0 zlr611hBECqz}4>N90q9*hck^wfDZpi(0xq>8Mp~#;AtQOH}hFa`EGk7ua$2wpOdPd zdkp$B`Q$EXi+oj-ahtpO>;&_n0Ne)hd>6>21y~2WLC!D2nplE0aTegY zY*!k>Jj|#n&j;`J?sYfe6jn zX{Ibep8EsO^xquj`3xsvcwPj1fir-&Gl8FT0G|*1{EYj?MR(JDa;EcL;9*PPVF2(z zcnR}xnRA%o;S#nz{Yqit=Q+lg!g=`1fVV55-Yx^)u7rMmmCu$<`>!`R-|L)(Cf{p0 z-T z@%LbV`~&P^p9A~j^Nu}B^O9p_+E)Sp3HG_KI;{|H_q?yep7(9Qf91OX*RP^6@u>5q z*r!j(QT;qtQSK$I^QAh+y@tM1&|l%Zx&GgGI>zYwf0yh3`Bf4V{SO$w$Nl-=3R`_6 zzMK3h;J^FMoNo=`y&=9`Up|BN!*_x^@;mdr_|!erjy0}*Q!i}p@(1fp>r(nFJn9}P z|Bu+OlKhW$nSOu=fK6&3?4fq&`jl_~?dq-#y#1$nz&9pzowuksD4#dq^I!R#{{1I( zzm??n4b}HnlW%X}K9+K(nm(4|aEa>y4+Fdx$gz7@^_v%b69oIxuT}r)68ZiM@Hee5 z?Q^fy?T-U|*1eT={)k_OIJ@6x@eqZ(>s)6pgg)wYdr~S7Ir?J-iVR`O| z{taX-?*i||_}`2tG2X!q(rM%HLl~dHSe;K}EYGLi$oO!^4=|Qz)&9u%NXG9n&N8M0 zzw_1p>-&$`a!q6`_XrCgp|Q4%$I&H^NZl#gAoN;5W9?KCM~}gU%OD?CcoY++8T-I!Z&Gp>3Trb3>16Zz{~}>@IM^ z=Js4u2cb#{iiPH(D$k)d@9E9WURK2H%D3lQhB*0-Ql>Ppt~R#&UIqR$tgg<}|l86*#^p<9j0hu$U*lw0Cw)@1v>3dq%ChqnMxGk!vyO5|FOWmoAR!IIptA z$qh*C<2Gdz#_B5l8&;RD^bcv3ag(mbO{@y7Vw>m^CV9O~UcdXW!ErC0svk!GZ(^0@ z)*z!dP;;b`$#_!4lrc<;#p)DCb%JKhtC!7YDA{5FrVrQA$GV$*oYikNfg|LQiiG)(D#gb1^f z711|}nr@}8_STJWB_fjVXe~4m%9iGK!R`5u?m2^}cXSVJ&rcgF)`7wFmuL*m zwYLuShBOS;1jR&^h$YH7=_(ak@~y2|8g?;WGVWa#hj|)X`P+zf^NNKi>kj{C{Luy5lfaO(qB^LiBxG~X)LAhOFb5}snj_$-z+~gm}VMz=ziJZlMg&# z+(_Aeb-ph@Ik0h*45uof`sd&ghfW?XgFO!RY;09XFU}tl_Jb;jmq0@FK{4wk`9r;8 zY1F93(UT_0FDXnyUo2Z`{b}QScSo*yu$qQSO@-;XQnrwro)>es8dsj`>&e|6@u8z> zX0Di-Ou?e;xyHIoU2S756RVvxG2_)X#xwES#zZDj+nCHGYa3IURBdBAldf&7&(zm8 zHe?z^XJUdvtUePHG-3^z zn4sd-WjsN}i)B1P#q%nRu#}f2C_DiQ>iU z#h-L0-XQ+eXA*VdPeUdlYJ-ZI@aS(WlZew_FOx{n-*_gGq`#t;QuH^ONf0ej*aQ(1 zrA-huQQRbv6Xi`3JyGB!(Gw+35t9m%Ea{&q=A{r*KO2~jf~S58>6(8h^zRfCDX~S(E@m>uG;`*6 zf=RZU-|19Yt;#x0$vRDA>&EJb$qCV{nz33lciSL2Z>Kk3j7_OmU-kpRQz@5`k*F)wiweqSCyp6M#Y@T&o1|Vhi2jOh*D9A!iZeyVNy#{A6{lXs z5yD6xDgx2SjT}C5?C9)-0}q@i=6U&J^n~Ff#*Y>=zWh0A+$8?(so!J9A3SNSSOvu9 zr%9APO9d-*w##uKhXILbv?7Z#6iS&fdb_g`s)v^DnKS41NZFC^+%R27d3?$*-x>2$46(6qsRDN{?# z=~|zNX@h<8rRorAC0>`w(P=GV2j%Fr7O>0Z=(HBG%jD>^maxm^=(HBG%jD>^maxm^ z=(HBG%jD>^mav0zbXp78WpZ>nC}AssH7!R4RX@tnX(?V)qxKfaAEmsdKPB)JjXwRs*T<<*^at6>ii>fR8g+PD zvcM~#p*YHZZ%{1O$tBWL(+`z-W_Kw!#}tzm{aAZv^Nfrf9b$5>7n5yMF_Yo%qOAQ? z#9IC{)QYK&FO z&qq$LjA91s?h+!f9NK9Tg6s7*iN~yzf%P!Y$T6;JEMJtdyn0ppX)OV_=r0ZGOM@1K zTbf7`;>ktti8^v~N?DyEUZ+y<7ENxF#5cLXWq3N!dnMaoanT?8adpN$-R@~oSB)cM zabH2X@cyDp0&zp2u39?&n()Pgx}@o;kSlh#mx^j8Op-h2l@8aI?%tj zR-tNdt(z!C3qwE2OD+9La5I^oNp5uWGo`+!{fz%7xU}QT;}PVk@#V<~_5NZceScDc zp$in~b3@g%zC_i=dli1FWaT4PuHi`W>Zo)Zw1!&U2LH0U4gP6$8~oGiHuxv#Hso)s z+mOFOx4{9Z+mHdE+mHdE+fWQy-G&SR-G&SR-3AAsZbJruZbJrG-3I>#-G=;absO@x z)NR=QLJ~wjRh!(JF;91F9T3-DTL+k~pZsqF{7*E19U*ZZ1aUP&;wnZe*hKNb-=H)E zWcYh}T?Bjys}0?1j8)6eM=q#HOUZp4{cQ-U(#$4OY!Sr9gI5Nv(qs)+{cN#}=Q2v= zI!I|-Tjj1rcELifNvdHJDnimmkiBx6C6ZEc(l(Cls?!XadKIO?Mo~JkT)UW#IZmuj zMWO-K%A0cCsma1Yo2~qG8B?q#M0oft0`$t?(%W-b*0r*?c?0n>OcNcvd~Ok7z_ytq+)P`zcF z+nb6-YL+^=9gC^5)yaKSKLRZB@ptAZU6$U8?mntaC9SE{t2SOI6^hVcQ~~c*>C)T zBZS00WZaNMLtS0nkSr; zQhTS%^b(rbQTBU- zVzJJehAQa2q|~Z~Rjs39IeZ@Bw$LEas0ALvbI4* zk$pOxb`P%y>%}A)mGS~w3f(nZoK)x z%#)i)VIya3MMJi9c1CV4sjkR`?Xhu$#><3*56Dg$-8fFHjw6O2JSv;4lcOdWo=%b- zyF5G=tINbIeuyWs$xNc+Cy`0A(g&}uE|aSCAuc|oD}6|b5A_xEAX*I-ztq?9Ijc(f zC+Jhf^2aHsSj8$xFu{tIkR~o-6)T~E30ACzSc3VeSQDb((zlA05wGWT73)K6=jmJJ z8i^%|s8_j8;&nt-^cXo-WQWX7YwB*v7Me1_*rdq^PRz#2`j-sO zmUl4z;K>scHs@lgQ*6-lrJ~L`A#;wKoReiaPaNJjZt|ho2?tIXoe7pweH%Sx^n^0j z)VBjijVfbKeL7%xM<8Nq5w@}4xjr^|RJQ*3tp=n4Bx z9-B>;jT`)$DjPibHC;A>@GG4{^zq5Unmk^knXQ-1Drrf@%XhSP>Ie<05Ab%qj=D%j zc8yv!0e5y~WQ(cQKvqUZ)`VIDAmfb8RZaY@?M>5*85YO%B=7H%-K{=uSoWg7EPJI2 zb0`L#xlr5)#tU;=itT z)!pi3cdIkqtxk8h>>&qCwxsFD=mREBK2*`B-#*%NW|qon*Gt->cjy9(rD$4H^Nga7 z(I8`R_lS9>|Imu>)hW@&t5c$l-0rJmVWlizkWtZ8D^Uq;a9pQO*wnJwL?_Y8cu!t* z;lCsmC+el(>eVS}SIgPdH@i!|t1m*lQoqg7Gxb|`gpO(Ir|O&SowKvE#ROTj${wYbFfs>RI$!gGIBoBY83Q~Zg zRU616)h9$$e|ReGariLbIGL;lh?rJHyEJobDI$7xC?eLWmQpc19V4zfg=tNcfW11U zvht*w#4n-qS-dPAO*H*aA2bvTkuTiLN}GCXrKz}Sr)8LuK5;^GiqgqskD&`*qB2=W zo#V-qFC%43xne0ZI95wR9i1IHF%|Ij8PVLL5i;__(cO8`Q9b#kt+UYCJ-tmVe)Lmp z_6j*6?I$+c#wttSl5d*6vG;YF3e*1|xv%s82q&|e2CM5~*{n$4oSoH_ZO<2ZCagDl z8V5q<@k0KnbvtSp@`gFHpWLklzS)UmKRIDIIJp}IiI|L7BWDIK5u&kQP=`MUsYyU5 zm-}Zm938oJ6cqSK6x(Pf4%CBOWlQe|Jajs>wbvwq4HIf$|Qwj_1L!OPirhy!(bM zaOpI&WG6Yz*!Y2=N?;wkIPXUuk)X_N)J=>jz}$*r>>@H`F0^t^98*) z@3@MInN7tRF{KWyGrLK$`^XH$fSlGnT@UQIl0OsbV_xiS<91~8EtNSXAqR<-wCLL? zXlnUlS9{Z3PL(veQYlJycjS-m&gp!m+B9AV=S^mI7IFa!dPA`(XWDGt4i<7CE#snk zsmjzZQA(~csV<}s9o_9Lk~a$hF<7@UJSM|Mr&Pt^P>(}p2nic9G!CKM|2Z_lp<;09 zhMq3NlN??w3s1@L=C)i*cYCfN1JgnfwZu(;xEvm*~Y;DC{n$7d&vo=l2TF&=E#ekv>mVdExDn#@+H z5p0qYBf@@b9DTrnQ%0LlaZJ{Dkhw{g2!yK(XGsWFB(hURkDPp9qZk@KMzfR09WeU9 zgC~p8VZ-@eT2_Qk6dyN$|EG#nGKi_cAYDfivpP`J(BVY?GqD zNu4NFA(7-QKQl+-tWKF$DeHC024g>@q&(NRW@m}p4%{v5K?9N?lfH%TA*#%xFxhu9DJ|S<0%q9VPKgZRsSb)ir@i z4O}Nb#O#NBXPw<#n%L4@Od@3_NFFzzI*b*vfiPCVDvc}cq9o8?*Q0YVd&g`?C$~87 zh+;jl!?P=d`sAFURnPS3v8Ohi%l*mvnh%2NuddX#m0jt zPRyR-Dy2gPjD(laHN3lGgckfvQsKX|xX!G2^s0b+?yDY7o(xZ*}l%qN;Kp zQ2Gbw#7FPsR;G!MSelHaSU*wHp}6hEY59`6QLo6;Hd;r?Yket?obtHEw$9mEuB}Q{ zw;|(O25;E-_NAfm&Cbd;X@D!*b?U_Ernzt-I#eHmid|x~+-UbxN<9Rk^r!}liJ-y*2(3@y z;U&~*2H!D+Dyk1Jp-!k&%4yS7AD+BN&wpjBCe#fbC8q|Bg3A2I?3Zgsq`x!IQ<@Pk zs2TCTv6>N2YDT>EX+}J$8S%Zp2f%5l`zzyq@YtJf$1) zv~I*xx{=hnbR%BRbR(YBjo7BEtR3;BcBCv?P(R`+{fMXaBi?%SBc9Ta1macDk9bNy z;%WVew;uh7r}QJ{w#YG;W#X+OrSXe>53Q%IiBU+Zb(Bjf=SgKj^G^r|6**vto*t4i_|i3y3Au<27G z`%!w6HD>s@@#gbPqR%X}Hs$$1N>Oa&G+V>Rk8Yf7*=eT}VSy-AFU=%xz@<8yx#*Cc zExgT3V^r=Sm13p*v6@=+7LeU&NHMa#Q~aMYoEjRXPPsYtM=j3Im&BSFjNDr2oN1!# z#+7+0UiPDpiH-B2=ksIOyip{03MxMe)}yq_FxxewL_5O$MvY*f*hRe%iJ}F2Pa?_t zK)Dr@E!d)UXIY-SbH!rT>M_JpLFzxc`{nyCdawDE!cThAsGN{|**670@~+TNjZ5C$ z2WwWKuHdZFo$pap0Ky-IZ?^LIg_LCu0aieIq9%)V^?anVi z=;XBXZ8L|HgjAp$RO*RhT6b$}j)p8N<{b4^-Ac^TZN{v0T-d2yTl%RcOd6}xR96~# z<4_pLOLAU=ED2gjiBDK5519q6M{P4Oo1K}PnPpXvE;9#tqJUy@Y8SoVlx3Fm=}$sb zcY^%wXH|$k_rM2lGD@Qa9&6N8qz^~5=Q{MvWAYNr${G^CO>Ie4uEbh{#K~rgX7bprl^jHvuCHJPIns^5ukCppb^3%w2a^3mw%e=Puuo#rCA#1^y z;Wf%E>6@Uvw5oH}pgOV;Ukgno!)P%_mz=YKsaB;?9jk1Sva>he-n1=5#CWMvUreWx zKg|q7hxAAnpYNa>9jZpipMV)`Gn?k<^MAxO>s<5?Ro?PRMwGTCqt_+T-hw#IAX(Wo zreBy$G^KRK&PpAm;Oij?wJ7j1HmOvA^4Wf6a;5@`4|Ee`jIOVO$yQ9W!i0C>c&HnKYJsYGdWX!51!8 z^<2p=;&z_qU9RXS(+f>Atw>v#USwILgd$ICA(zupvlIo$&>9Y($P&qQDzK3(WQ}=p zXxj0Z2!Llv6i zo+u16t(Pz&3au~V=wcnEC6HzV+O)Y=kHw?Ab7HR0%`N27OqX6vNq7X%KNs zs-Px@?rD@xSD=v?VIH9Gx?dM^Glf7ru49B0!>DL+p9dzdE}`cf8TY{Ml0P!7zz5`J zj%4{`l3A2R&?Ld&B$bg28C5Kq5F?{xS=DN~Qu)%FZR_luAq7|(tkh&=<+aO$j!>r* zA9Ysm!BwDJcNXW8@Eu@{iIHgPN=Izg?2wAw*Lf$E5vB3ZWaE{mY7wQ2qbNCzx{cIH z$z(oJklvw^O}Z%?8J<&$^a`5KBRnge{T|^xV+;V7@SfFzTc7YL>$1(PR2;Df&fulf z>{wd4cu3cx0#rGJmkzOGY2|(^T?;x7773a=yXJyGpuedF#+ZcVVfR9_v30iR>E@We zn3By_A~vQ1F_|mXUbdrY2JfnqEO1Dvn}69T;y)cl3NRfUobNCzA?cO z6*r8Wj22~NSk5z&cM8^(y=CDm5t0pG>5OSg<&p1zYRR|2 zH4EMYHno??HdT<{bx)AoRjn)~$7Ksmv-MKns#}(SO#}*o2tMj%%o_fPF(o6LD;zQ2 zozSXnkKLOA(5&xP(Om}pnc~V4s24klMV( z#zAx-E&mjn%`pk4X@98(RcuTa9YV2D;>#C-Aq3y^ExJ!AQ{5EVo*bDkgBTkrvk^BD zAs&$n#8VmvA&2Ug*2gj0>G+7M$h_HoNkb+tJBFk$g;B^Aa`N^Ic4RFdYF@)1mLYNLC87oMlUAM-G3>%e2a}lq z>j`C9*G~MsL=Pj`C9 z4@L`G))UIIp3s){gg^f>%X>)&ub>Sk@EDvYybE^~8EC>j`C9PpsFno=}$cgtn|F zdTd!wD9d_cotE{4vaAQIFKAg$D9d^YwtY$|~NSi$S1ni;JJRz;~K^A>h^Mo?b zC$xD!QN=u8$!eaEW_kLnYb6DqEjLXP;X{^f4s2_+;c}4Nsyq0yCfR9}zKwP?{KTR| z8cv8HxzfH8WE8zml8Lq6G@v;XBu@{ASTZ6XS?LMg{9<$+XFvgwR5FM+a$n zMJ07<5fr}*Nu)WKC4ZClP;XbWsWOaeoo^b!9y7|#?40GJXAO zy$)yT`79h(FWyUE((q{t)Tg30q znJTQH=5UAmc~_^=rO8U?&fnQZPKG%+DVrkS4yG^I^GoL%)?8`S_5~F#HYa51l4dne zZA#VNIhVB-O<5P(M>enYy3z_cu~#Wdtye;iI+Ki-IbVD@Twt!c>}OZMmQJasB)z{G z$x2TXud`~S7Ny6D*U1VM0y5DpHnp0ZWE4eN(lFUbAv~DEnmE;y%+ffa4V}`4kW@BU zgJ(9)Ij|c}9Rz5=L?vQ&t|O-3u1fv1iUH0V>eTrTTkG<Ez)E-zi zjX(KHbFQBCo7zjkWHHrUv(v1R#FNK1w1p(L(fWP;!d){>kJ9IJs~L3q5QTnrf>hXI z>f~!z(jG)bVf$eb^ylicRC(JoGxniLeLaTnI7laW958afI)kL@?>JRb^MA@g7YH3=kr;+Z%ea8`{%kPQmeT_g&_Ke>-w+bDV z1wSnk^iW=yyN<8xISlEh-9+`Ai9>zAOTA~I9hP+s z)XIN;xkUE4F4gB+_!x*kL1AE>dDy|vr;zz`rCfOzmkfB7k~Eb{O-WDl`G#2kwRiyFE86*DgyY+Pk~U!1Ba0YK4SxJ57qZ%g@RcDjY*< zmKtBac%a*suLbaIp$)%03Gvj)(@;x=Py5+VtQPN)Bd2O7N4to`;Fh@^O*8X!OHFM( z0z!v5Tdda^l+JzetgvLiWqsOvc`~!Gj_*pLSvdv|l#Y@XA@!WE{d20lKLAUPttEl?C#}*-c$>Pm9HK^oja{7K;M+DD$R<`6ge=>_R2tbDVvNBR|amXOp4w^&Njb6$=cG`O9oW8!HP)_l7YdFYCvJbGykPX;uBI(Jlb z!dAG;79^YPkY|S{Vu}`j3fTp+*5$>R3LoSKr5ROB&HDHP#*;HkFdFv=c}JpDXm4gQ zvMej}Nrcw>?()~;UH*ErSi!kmPMfhC6-kSGFH_^E;(d)k{as}M*Z5gy=o9J4P9r^v zRJy_v8>Wx+lP!}}SJ`0e?q_6dDHzTvjumkO@2PI|*j2Z>jU$DkQC0Cn^Lp1Uuj`QI zS)Yni3B=GT1oUJ92M=jwQ|hAg2x;v+CE$A@?Q5?zwwL^2jv>g0x1}y3ChybrMCHn^ zMSAw2lrJtXsq7tc&K#%QA&Im_N(r>`Gq-HI)vv_{47mTPXKs_~nOnBxs^@tIz)$m{ zjr^HXU(XI9|NG4C|40L@^WpcTe#X?-BL2U@XKsBj z#3%JLw^a!E5^lhY^hx{7ZFzqF7wH4f+$PmCxAH-*3eVh@J8_Ch_whXIRdbz`R#B3> z`%nJhVV54A{3#hnC1po{RJ+LoGX46g^CAOe0{P%(kRI1TSti$8f6CP^U+9 z0(`Qw%2_0RoFs4_M`)2f@Pw9GIA~b zkt4(Wl;;G@&oq4XO*aRLxxE^P^zeP-$o0ig)08KLd;tm7HYOm6F*c-m;_Iy>d@SA5%bTAW z|KH>WR9g?TXS(TiW!&Qov7IWoo|22*dVNnN;jN&6^C|gBPRr1!x{L8++@5^Fa)2)& zrW;iUco<_t8a1)rTE!>6J^4UpzW_7-zupGaaSyX+x`}mV+~W*QqXu1lCHbU=_Vtyt zcfXCZubA=jWgE-WecVebZuIPD0_s&`nSch2u_29>TyJe9RbwS3cVtBG7huN!w_yY7 zu7}xk#<6u}+~W*QV+CBQCE0w9j?SRH*5^}=6%u8mF0T7^+>@Nf6M7lb0ZF~g>3|f* z*pP-yt+ysqsv%Q~yL6DdWZ>_HtUx`?p6S-FE8`w#h@-CDZ(Wj4pH^wk^*gQuF-7&uJhGu^*|ERAoCC)K**Ai zVYJN5ot=H~uvR-G?aKSo&PuElimQFhY6o^_#xtXpAXJLj7%P5MVFHe!6yg*Z6Gufb z#txsyMV(!F#^` zoK6O%O9X!1KcY^LGkd|eai)xqJ43S(jXIZmoknqZmKB>^jZeqS-#FD=sxsGRpKFWK zpU1&fEKXxa(wb|0<!2N%3ZZVT7 zh07)vZZs9zpC_laq;P5fAm19-G^B9Z)WY?hZ^q>bV>W*c+flgk0#{e8mpMr-YXxmb z;fi&$_-#}vQnfPCb`;{&1}AA&Nra6;lbwlWN8$2y^z<8-i4uup*-^M+4JLk-gVjXi zaoJJ0V!0xIn^ekXmeD%dZJANHV!`4wpU#ZJRn`^>%R7F+io#`Mi(ssv5rr#_EnMk1 zCE*^!h{6@qbtqm9BMMiVTexESzEHX>o56^}6_c+_FryKLE6pujF`cnrSi5UZYeeCS znMx*|)`-GoQ;T5j1#Ku?wzUXGvrH&lX=mXc+l0cE))uZ%^<1o`<91HyN;?UW`dCI4 zuJmN+3MI~s6F;U=h0C@QwK|n$Q{hS{hC zRu--_lyH@ygzFnh*csKbvT%hTL-DH=TFTXl+v!vjxi!+Co%zyMdJDu>0hPF%!1;VS zrb|9@zJ}>yqHUa(kC;-Y&qZ);Qe2zmyT#+;x|R=rtCV{7uJM^%9D1|9tNS4w(>O&- zlv3q7>tu1liaeSd@naUmm(>&>5*MFU<2GmCcbp%&(V`1KW90hCjzm`z(rL#&$x*OZ zpfq+}u3T&_u`=G1AFYlHV9?4YO^K!40oC?hHB5E}A}YNQ&+j5vU}gEf)|A*3R_4~n zxygG!a=tGB&)eA7P8JV>Tv3i;V%B%)7T;%0j6K5W`koSpyT<(N#wPXYZsDOufQ0-! zp0dgt_uEA96ZKpysT`GmiIjeH^`mrOAj{4kiJHVY*it#CpNo~M5AxzkwQWFdAuF$L zoFV@jR}mBan?Gpo$ydj{;@B7|7*yNVk*)cGSgRVSCFN2_6qU-xpY&6*pOly?>o3S$ zx0iNoP-AQrhp*3C=u~{HzwC|OvCMHtCLKUL$R-*}SUIB*(yGpVxuQn!vK z%~P@Z6mf!?F)wsw^(0+1`7AtkyJktpMm8!VpS3`~!HjbI)?!=?nq=dal+Q_?0E`<+ z6V{Etx_HBOu0}q>ps3H{J8UubFIpCtkE(M!%J!|Uq8?+G?@s)Qqn zu1NRLdLy>X1|cLLhYwGeAY330_sbL{)DYfG6(XL?iJCy~oq=0;>zL`rrz z$NfDiOyGilJEg$)1h1N@Ulr$hrsyEGQCOAC%{En zugRB$)uwN}Q}NHPDNkAfCquGqc0^AcC{x!}eel~!{L6RcIcIgzIv=|;%udC+g#G=a z{ipI3eRxkhyB<^Nh0&u?W7`&3+ygYxyx4$oMP3Nu z$(Uh|)7o5$K}^SR`IO|gY3n{;DI3Ra#W_#w>NE-t-1_8s*1b<7)7QFXo~bM(W0uja zaOwg|C2*C`iQUE{Rk1G)x$BvUzc|O3n<`d>CeM%L*0r?6Qt_sBtjI1FMwb`wLf(ID zN}`E`6Zv8MBp_9l=bW%B@8jmRYp77kW4|(S0z4WTd=vW*fg2ZzC&s;#>*$xf^h|z8 zEG54aWL23eCr_Nq=bknWPD1GB;T)U#naMrT9E+icie=H}RO$pTH+_F0u2gUR%nE{II~xWxMHBad)P>w|~1gkZx;@MXjJL zg5q}24g@9aAj;8=ULrgk%eMu>%J;Hdk2tWE1=~%To=ksR7sGgzQj5n#w5zk59=-Oi zwrn<&6`V$PvrEYV;j!zoO0wYl+SY!xR|s+n*`(VB+Pt>@Oq%W_0f#rQ-glBF{n+qQO5b%sa-nL!dKoCNI& zp+e#Py@KL~DI2m>p`qZch~HR?6O&Rkgc5|NFky!vG}mIrq?TxV@7A6HuXm#tjDukk zL$!TSr87A+GEUz+Pe5<^EJkx<4uO0j#~x`1#7(Q{JH4H05fF>^ZRr$G@u+-AMEg4U z$&Jc~WVA2KPmNLekc#%D`Kc)?ADW{B{Lm8Zl{{n7EgShM9_^4%iRgd|bfa1Ml#Hh3 zQ)6^cKBb}q@~J7hrJbLeqaE_8C7R_YtS{2?DIOh^Psl_*xzTo2uw=Ad7AVmeZI=Z} zq@wMz0Ewn(yDUPY84WBSTcR7fKEV|di?%acHy-V78^mA*$DWMW-J6C2NTAt?>MK)m z4}6Y@UVmFpy0;tkEf7X1DqK8n?CNbBK&1=NhauTX2WCNcIjFrI)z448-F;n|K|yS^ zgP2K*WfBBZ%Hn+B2kk`CAcZfK01tjd?)@)h;&W`tXt)0^=mW1(i`YZspSWLm zWa2vdbjNP6<27yx6+7wO*ej0aT^1tAZ@T$u)PF)Oj07{*Zl5;gKRFGRYbTK*eye5v z9am4}G==ve6{mqtHaiVtSkV)KCVTZ8r{KN2OHKnyBki;K^P|(i@rElE;?KDZ4THaP zynkoo-z@phaUxE~pV{FuzL; zeqGz9=a)IocwNUC?$os~v}ma``OImzwgV zAivw|oNt^L=2!bKBK|+ykEO88IjivO0Os1Ec3?awfaeDAJjwrv#Ph{3)jQ*pEU9KY z3j%my051yQlLL6MRqlG{ouhpL{H0^igXv!m;E&FlnSQMN^MUk#H*044?*h23Zf1Hg z{Y`Z<(}VIoWp+N`m+JJGApGk(N46s4BXy3^D(@UUdA90JjL!u=)xZ}6FEj9Z;N=GH z2VP;|QQ%buo|?_NP2qjOQ3Kxr95e8N*{r)1ehj$Tz|YKPou%+EW@}wR__x4m1J|Q6 zIt+YTJ?kii*Vfzhm8!SvD_w8bSAPKSthej0P;b}Y_4RiBeXicFzpvEW^>+O|TW{Cj>-Bd19jdqM?`XYUe~ahX^>@x3yZ)kc?E1T8j$MD7f%^=+9eBXN z2k^}Xo|NS2Dc*5ZKpTMniG+r>@PJbqF%%HCUe!{>m zaAdB=AE)$2e%p0ri}H8|7Wz4WKN-N+&*%A**F+~dpCgR?mW$l#oNoh<0-r8%Fu#Q- z+5Aogei!jCoW=210xzE*ao&{aF9x1_QbhCt!j}Ut06w>l@fP5<3w8dZz}JD_UWq>m zoCf_ti9ZGWKJZo3$oH24`ECckci|Die-`TRZs5I(BF_CX{XbCtCnJ9;|92_B#Sx)1 z34b4W5I8OIzXIUEZ@~x2cD~SIox_*a&zq2&r zESCMH3Vi51T_1lA{GNfo0DQ#2`+?s#@YhMcQzK4H^*`W8PFCY{zVl=u0%ePXX^lf4F&;EHCguL%utJ2Uh6v9suq$@WV7PfcqqV68Hs!{tWOS z@C_2b2K=PK|JT4bt}wG=3*l` zxLU_Q75F)$J>tOi>mp8B=C>YrYMqw<3gGvU->6JK4E%zTeggP;qyDCV??n3hWqgN@!o;(*MP4FzEI*vfbRjGFY)uh_W|E3@gd+1v536jR7vN`8dj5VH_zk1J-Ufai^dCt2QQ+$#&w42jrWWVFjQAL; z&i*FdKTtK!;%2RnH_)r5=Hs7_`XV;o4!r!*h_g+mr}fSH^%1e>5&8@C!S#Cn3-Z4; zz;8eBTZa6>_+Jmi{}%8eBmU#SF%;?+*?*q`e%xrkSAidyp+Ed4!2kDDKN&rLo{fRB zBcsPdBk;bA9uGah?;G-51$-Fvs-#~BT-d1f!!5w~0PmOh?}3lZQ2s|x3Dkdp{$zmu zEbvX6^!oP20R8_u4wmQNfjb5w;)NOMD=Oc^-MW0i`UvtnR(%QnTW$Wg_8&k0W96rw zHsjw?>TigDw_IN?1^;>sl-5@6Uxb$d&u@%~JsaT|u-ZS7*6jd3yo$#g(XRmhMjZNo z7UMkd^KCl4`kRvZ|0(EC%kglE@qTZvq~E+$zyFIE^4CfF-+&@{0{&hKz~~q z$gfq#e-!llE@FK^^dI5jo;d3}!v6-mw3*kBW_p$1uRy=|G@k!W`eI2}_*{t(BmT1q z9-kC{$wwS#IEwXHAbmo{UjzDcMt!sZZ`c%({4k#YZ%(m3AiN#;nGRi^ap2M>EngY9 zKBDX6i@*m?R{ZBXw*%iA)8+pr@a0Q+KSua5;He1D=Y*dGzA4V@Wx_uN-fz_B&nZ3j za|66Tpueyf1*9&6aw{imZV>Ns@*>>1HQCV*N^&p zM#k@^{5p7lMf5B2@YMynKdZm5%J>z~-^6;ZRmQ&w_?a60Rmt-e&?6msJbfLwoaFtX zDUa$O-v#~o*08*)zda3lJ=XWvOZp4I+Mqb@pi# zQ^#KiTuMh|esxY7_|Qq=`cUI>@HEy(sy~ka?=!|*8F+u2t}pf1FVlYp^g9}P{vrBp z6n`PFXQ=(}1HLn&`^P^5&+m-L@rC{e+#J>UzX<%s84Ks<1w| z!O`PYy&p97%K}MX06|Vo>hZA>_`RrZ&r5+1LI2-f&v+B?1DJ0+0{Ja6@}s}L09Nfi zj`T~xe~nCk9r3?F_qW@CAHPVK|1RKX4E><~lzx2x^bKc5oP+ab)>o>14{&j-tm^4xEcp1)I4o)qZAhW_dV-VxF5m8WmN$bW^b&ne(HJ{}R@6lNOlsy;uB z_^+mQ{|@#Sh1Gc6kN6LtACdB*zX9*;)b0O>lt9TGo9{EhUl0zYY#|9#*>N{`=#XFJYI&{qcnJLv7TUl?;O1V^u0!ZN&&y$q35d%@YBZl+X8&VSPy!@$&A+bdx85;y;q_8$fM2lxtNwBr=?^CLc#fd(%Z&MW4e(cMtRGj&^dAR(t}&jw zfFCsY?F5cC>hV|t-gkjsUwsDnabrB)4*XiPUccW9ys}Y`$47ymZH&nJu5*3@yg8!B z&wuETuR@3Xj^zJX#QCA5FFD8Y#}k$3Y~ZU5e!=>==p0-BCV-!d=>C1lIre&JJ@Dej zh)j?E2YmH~5i#Eo-UD2MzS%74pQZRIo&T55;r*`CM}G_aLt{RA5V+YGf9fx|-ca&C zjrhN4)8qSRz||%EzEi9(fbXu+zN){Q-^-|ci!pHDs}VmqzpMP0BmVl?THckwhg-w* z`I(~4Mur8fp>Q3`FaQN{Zam&M7RpvVbFu}DEvSGuL$6z#OC)#D*va!|J7!_ zUimBFhm7*vi-)s}`Tt?y$Of&ieoPUK{`3;?GR(&>N&4HsS7SaOmiP$piq?qKM|IBP z^Dv%_{m*&8D~$Ov3ViS*{JnzcO~9|zct5aImahZ!_l^E59^{!6!dpOptY5D;gYEMt zpzrMr&tIxN$3cJ4=r2{^b2sSq&h@}I$nS|n{}S+WL;sxM?U1F3q3T$%JV|z)yG!8% z)6*Cc4V6d6ZDUS8X4sHD0eK3!5oz^ZX#nj+?#`xj_-t)`Vs~&8A96nbfw+{e*+u3r z#OXxSlf~9vkBgNX{_wbcD4b4+N#)u~HAf~-?b|oC^|yPQyZbh5-RNce0s)(X0RzE+ z{&+AT5e!HM0~$j~Vxf>Q+YsM`8wv?!l?dmR3WYRk!}S+OIoPWLMaP1S*Y1UEw(H%8``qPZQ#tN(5@mmMUROm9V8s*it2IsS>tS30ta!EtP9aL2XbOoe0y+cSN_GG}9dTX)9qO+8z?J>i%<+wXOE_5_23ZI2najpDTp27^NJbbetL zLNGGkxFTJPFwo!D7mH0ph}R-?c5UkQYYMgGb*4>}v1mPgibFfu@O455k#jh%5zp)I z?e?ZBWk*(@f6p0TK3T@}O1~r5kZ~}1B@+kijc2+i5g1CcxW_9@<{eH(-t=}kWlYcI zf;UD-`t?<=#j_H z#1S4+$R55(M#1v(62s>RkgyNTk9hu7uR}u0A$7~3yc{)#sM@7UvLzOaHF&h_@YJ%y z!yLkw-HIo6j6yET<&wk0lEc%2qz6Z@D~&j8Kuz8xOapeuv_81?JP+++eV5qqMPD~nX!^5#|r zvSs8vIdrYOx0h_#6e(R1OaKyeovvasnjaPSgKCfT9HwqHG>XkpMC36PKs+dCo;oq# z8Cru-&P`(c^zN?m1?aj`#O1vjR=Bi7qoWkGt2`tuk*R|h^zF%tU1vdYBbQB{*Mj~* z&YeW{SE=gBnYYcz03#Nf5@}1-vK2~pMy!oGMK>EMkGKi>BefJ4b{&gW5o4eH7KjUy zjefMdKruYBr1n9c8ZTc#v-m-U{IF2U0#Jin36u|VNf+tG6MOiQK*tj1c}35^e8bU? z6fV-s#`3&Wiw}nAqD-znpWNK+c-jv-1+?%5U$W1ew+mAn*1F4`#$Jmt;PRrZHE(i9 z?qu-ldC3%tRjklcljzU%)LbJKE0x-ps@Di-6*%2}=#Dqt)#o)Rtb&X|4-uPOss!Vv zY{yeqEj#+UWKZ1`>UjPQ$c|Uz(orXL8))r2F)ix>=+%Ivj77sN%`2+(U!!M6_ET=d%V+8tRz*UXo`R-q6u*7Oc^!sRS&oH&a zYxL1%%rV@qXjdm)Ibo{F0r7?`HLA2K<>eZ^d@(P((>dy^^EfPg2{UuhbFOsNT#nv&#;urr!IMV=B}~)Gx~nrg;CV8;F||UJ%h+-v=9RI1A+6!7 zY15aLpUzlh=$=o$zACKc^r}*JW>cjYYva&m?RGP1Z#u|F+>%PGc62<5+RUOV!{J~J z8rLhcNa*ocNE`gs>?&NFQ5=+7Rcd7%i~Wh5s5hwsXdS5Qgt&-(0Ag78(L1c$jM>Et zWW{1wj>P=tArBRv*&wozvdm2k?UELUuZCvPv+2}Oc_LTv!~`lTmPUr|2a=V`tb%v4 zJ6_1=sGPS3iXFr;aHAs;+YQNU-vla(D}9NHD#b!V_%%^gSj&f5u$;WYW%KJw-ql5k z>7rPk@L2Eb>xqmgtTB+`FltQn*=mt1%&++t)xX63(&W{*JS4U)G$85S>`>Kgbqq{e z&eC2{581-dHD>#xu+)p>@-Ec($sLq!&y>9whJy~TCJGX-Eth19%YRE%q5Ev@QL zbuwR0e-wy%%X-z5erLzotDyWoQf` zLlf2D=7^^g!9v&9^K z43%@n&O0yn*q-6qw&vL3<*?_Cm2)|3OXH6Qk^((AA)N>XmC)`2UA8Ayv7!B-H(o4W z!)=A`qWg#FNWm>-$e)|cRt+55?Xi22qCFnXZIbDNSgPh4yHu-D_6+5HPU7xpd$a_X z@mf$GyTU!Y_U$>MlgrYFE-U8&(IFd6YaM%LOW9BprNA7FzV~D(W}Byk)hQdGcj%XaGvB`oBr!j*9>Q diff --git a/packages/hal/v85x/ceb_v850/current/images/v850sb1/8mhz/gdb_module.sre b/packages/hal/v85x/ceb_v850/current/images/v850sb1/8mhz/gdb_module.sre new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/ceb_v850/current/images/v850sb1/8mhz/gdb_module.sre @@ -0,0 +1,1230 @@ +S02B00002F6578706F72742F706F742F6563632D6F626A2F763835302F6365622D737475622F696E7374616C7F +S21910000080074003000000000000000000000000031E70FF6319 +S2191000150F0500200E010080075204031E70FF630F0500200E6C +S21910002A020080074204031E70FF630F0500200E0300800732EC +S21910003F04031E70FF630F0500200E040080072204031E70FF1D +S219100054630F0500200E050080071204031E70FF630F05002014 +S2191000690E060080070204031E70FF630F0500200E0700800709 +S21910007EF203031E70FF630F0500200E08008007E203031E7029 +S219100093FF630F0500200E09008007D203031E70FF630F050033 +S2191000A8200E0A008007C203031E70FF630F0500200E0B0080EA +S2191000BD07B203031E70FF630F0500200E0C008007A203031ECF +S2191000D270FF630F0500200E0D0080079203031E70FF630F05C0 +S2191000E700200E0E0080078203031E70FF630F0500200E0F0063 +S2191000FC80077203031E70FF630F0500200E10008007620303AA +S2191001111E70FF630F0500200E110080075203031E70FF630FA3 +S2191001260500200E120080074203031E70FF630F0500200E1356 +S21910013B0080073203031E70FF630F0500200E140080072203E9 +S219100150031E70FF630F0500200E150080071203031E70FF63AC +S2191001650F0500200E160080070203031E70FF630F0500200E57 +S21910017A17008007F202031E70FF630F0500200E18008007E213 +S21910018F02031E70FF630F0500200E19008007D202031E70FF0B +S2191001A4630F0500200E1A008007C202031E70FF630F05002000 +S2191001B90E1B008007B202031E70FF630F0500200E1C008007E0 +S2191001CEA202031E70FF630F0500200E1D0080079202031E7065 +S2191001E3FF630F0500200E1E0080078202031E70FF630F05001E +S2191001F8200E1F0080077202031E70FF630F0500200E200080C0 +S21910020D076202031E70FF630F0500200E210080075202031E0A +S21910022270FF630F0500200E220080074202031E70FF630F05AA +S21910023700200E230080073202031E70FF630F0500200E240038 +S21910024C80072202031E70FF630F0500200E25008007120203E5 +S2191002611E70FF630F0500200E260080070202031E70FF630F8E +S2191002760500200E27008007F201031E70FF630F0500200E282D +S21910028B008007E201031E70FF630F0500200E29008007D20127 +S2191002A0031E70FF630F0500200E2A008007C201031E70FF6398 +S2191002B50F0500200E2B008007B201031E70FF630F0500200E43 +S2191002CA2C008007A201031E70FF630F0500200E2D0080079239 +S2191002DF01031E70FF630F0500200E2E0080078201031E70FFF7 +S2191002F4630F0500200E2F0080077201031E70FF630F050020EB +S2191003090E300080076201031E70FF630F0500200E31008007B5 +S21910031E5201031E70FF630F0500200E320080074201031E70A0 +S219100333FF630F0500200E33008007320140360000010A460F39 +S21910034864F0200EFD3F660F60F0200EA82A660F62F0000A46F1 +S21910035D0FC0F0010A460FC2F0200E2C00460F22F0200EFF00B7 +S219100372460F26F0200EEC00460F02F0000A460F34F0000A46C2 +S2191003870F14F0200EDD00460F04F3030A460F0EF3200EC80089 +S21910039C460F00F3200E4700460F34F1070A460F4CF0E53F40FA +S2191003B10087468000E82F2000000A460F70F1460F74F0E72F0F +S2191003C62000000000000000000000004036100026364C564029 +S2191003DB3EFC00273E00004046FC002846480E260F0100670F67 +S2191003F0010006360400073E0400E741FAF5400EFC00210E3099 +S2191004050901184036FC002636480E403EFC00273EF427660720 +S21910041A010006360400E639BAFD4036FC0026360000404EFC49 +S21910042F00294E40034046000028469407664701000636100060 +S219100444E649BAFD80FF020C80FF0C1D400EFC00210E100400E6 +S2191004591601006117010080FF7E3480FF100B80FFD60185053E +S21910046E63F7790003F07E0F8D001E0E90000515070D09250B61 +S2191004832D0D350F3D1145134D1555175D19651B6D1D751F7DCC +S2191004982185238D2595279D29A52BAD2DB52FBD31C533CD35C7 +S2191004ADD537DD39E53BED3E478D003FFD6442BE1DE2374000CE +S2191004C2E33F4000400EFC00210E1004C1C700008A1D7E3781BC +S2191004D7007E3F8500E5374000C6363FFFE62F2000400E100090 +S2191004EC210E3A056100E0374000E13F40006642BA050636FCC1 +S219100501FF7E3781007E3F8500E43740007E378900E537400064 +S219100516C6363FFFE62F2000C242400EFC00210E4003C1412862 +S21910052B0F010061000330031EF0FF80FF140A03F610003E3FCF +S2191005408500020D3E37810004153E278D00E54740006422CE3C +S2191005550D8846800088462000E82F2000E71F2000E6172000B9 +S21910056AD50D6822BE058846400088462000E82F2000E70F20EF +S21910057F00E607200008250A2D0C350E3D1045124D1455165DC5 +S21910059418651A6D1C751E7D2085228D2495269D28A52AAD2C6D +S2191005A9B52EBD30C532CD34D536DD38E53AED3EFD061D3CF5A5 +S2191005BEE007400103F0031EF0FF4046FC002846F02768F70181 +S2191005D3003E378D000646F8FFC242400EFC00210EA00AC809C1 +S2191005E821EF0100400EFC00210EF009C809213F0100400EFCEA +S2191005FD00210E4009C8091E40210F010080FF0600E59561009C +S219100612E0076001400EFC00210E1004610701006000E55740A4 +S21910062700E00760017F00E5374000E08760017F00E62F20000A +S21910063C7F008057224380FF642BE5FD80571843405601002AF6 +S2191006515668BFEA39DA05E031B20580FF0E3A80070C438057C4 +S219100666FC42403E01000132273E68BFBFFFD6FF8007F642801C +S21910067B572E4206D83B572100E051CA353B573100E051921D2A +S2191006907B0749007B074D007B0751001BEE44001D3080FF12A8 +S2191006A52E1B363C001D3880FF1E2E3B573100E051AE05435214 +S2191006BAA2527B5739003B576100E05192151BEE54007D072546 +S2191006CF007D0729001DE620001C3080FFDA2D1D3618001C38A0 +S2191006E480FFE62D01527B5721008007CE418057DE4008D03A77 +S2191006F9E7010026C7150007C838BF010018EE24001D36200089 +S21910070E80FFAC2D7D0729003857310000B2E051CA1D1C505F67 +S219100723E2E051C7751CD6FFFF19DE01001830193F0000375747 +S2191007380100C73EFF0080FF040044FA6A00E051C2F51BC81C80 +S21910074D501AE0E051BFEDD55D80FF1C2DE0E187553D5705002B +S2191007623D5F0D000A660100EB61AA0500623D571100EB518A8B +S2191007773501DA7DDF250037570D00183080FF040044FA6A00B9 +S21910078C3D572500E051B2153D572D001D361800DC517D572D38 +S2191007A10080FF322DE051BA057DDF29003D572D00BC517D5739 +S2191007B62D003D572900E051E2CD3A5701001CB2BC517A570110 +S2191007CB007D0729007D072500C5151E081DF0025D00555FE2AC +S2191007E0196F0000CB514A6F0000415A035D0365085541CA4186 +S2191007F552095501F085B537570D00183080FF040044FA6A00F1 +S21910080A80FF782C1D36200080FFB22C16508007D83F8057F402 +S21910081F3F07D826E7150000D208C81CEE54003CC701001D3618 +S219100834200080FF842C7D0729003C57610000BAE051FA1D396F +S21910084957010001D2EAB9C955385705001C3080FF040044FAF8 +S21910085E6A005B57000041DA395F01001A5041D2EB5191F5B5AC +S2191008734579D701007D0729007D0725001CBA953D80FFEE2B2F +S21910088839570100EAB9B9353D571100E051C71D1E081DF00037 +S21910089D55045DCB510A5700005B5700000455065D41520555A3 +S2191008B2045501F041DAEB51BA057D0709003D57110041D25F18 +S2191008C7527D571100851501E27DE725001D36180080FFFC2BB9 +S2191008DCE051BA057DE729003D572900E051DAC539570100EA6D +S2191008F1D1F1CD80FF8E2B1D36200080FFC82B175080072A3FDA +S21910090601527F0080573E3F00CA073EFFFE26DF1500205610F5 +S21910091B001BE624003BD701001BEE5400EA39B3058007F201C8 +S219100930C13A405610002A5E4609CB39275700000B38CA3967F6 +S219100945002200B0007601FC004801D801D801D801D801D801BD +S21910095AD801D801D801D801D801D8015E00295F0100205613ED +S21910096F00EA59D31D3B570D001E0808F001553B57110003551D +S2191009843B57150005553B57190007553B371D0020561400091F +S2191009993501F06957010080078201295701006F52DB052056AB +S2191009AEEAFF8007740120561000695701003D570D0068570192 +S2191009C300E051E2053D37110068370500B505680705003C5708 +S2191009D80D0068570900E051F2053C37110068370D0080073809 +S2191009ED0168070D00800730013C570D00E051BA05800724016F +S219100A021C36200080FFB42A80FF682AB50D01527C5725001CC1 +S219100A1736180080FFBA2AE051AA051CCA3C572D00E051BAF59E +S219100A2C3C571100E051FFED80FF4E2A1C36200080FF882A95B0 +S219100A41753D570D00E051D26D1DE620001C3080FF6A2A80FF04 +S219100A561E2A3D572500E051A20D01527D5729001D361800805A +S219100A6BFF982A7D0725001E081DF00905085503550255055550 +S219100A8001F080FF002A1C3080FF3C2AB54D3D570D00E051822B +S219100A950D01527D5729001D36180080FF622A3C570D00E05193 +S219100AAAC23D01527C5729001C36180080FF4C2AC5353C570DDB +S219100ABF00E05182351CEE20001D3080FFF02980FFA4293C5737 +S219100AD41100E05187151E081CF0090508551B30035502553A49 +S219100AE95F1100055501F080FF040044FA6B003C572500E05113 +S219100AFEA20D01527C5729001C36180080FFF8297C072500809E +S219100B13FF70291D3080FFAC29B50520CEEAFF195080073C3D85 +S219100B288057383E26371500265701002A57090080FF04004415 +S219100B3DFA6A0080072C3E8057643D06D81BEE24003D57110011 +S219100B523BE70100E051D73D3D3F01003D5709001B30CA3907A2 +S219100B673F00003C570100C73EFF0080FF040044FA6A00E05131 +S219100B7CF2151E081DF00455065D41520555045501F0EB51BA2C +S219100B91057D0709003D5711005F527D5711003D571100E05197 +S219100BA6AFDDD5153D570D003D5F11003D671500AB51EC51D699 +S219100BBB1D3D572500E051921D7D0725001D36180080FF3C2962 +S219100BD0A5153C5711001B3080FF040044FA6A003D572500E08E +S219100BE551F2057D0725001D36180080FF12298007C83C80576E +S219100BFA683D06600C365400265711002C5F6100C73EFF00EBC7 +S219100C0F51FE151E080CF02C5D26570100CB514A3F0000415AEE +S219100C242D5D2C55305D01F0EB51BA056C075900265711004187 +S219100C39526657110026572500E051F2056607250006361800C1 +S219100C4E80FFB42880071A3D265F1500015205626B5701006BC1 +S219100C636705007F0026370100263715000052663F09007F002D +S219100C788057983B031EBCFF07D817526307110000D208E02629 +S219100C8DCF15003C5F010039BF090001EAEBD1894503C614006A +S219100CA21B5F000003661400CB76FF0041DA6A72FA0DD9C70053 +S219100CB700C20D235F11000D6AD8594B6F0000235F1100415A21 +S219100CCC635F1100235F1100CB614C770000235F110020663E52 +S219100CE100415A635F1100EC59DF053C670100ECE99A151730E3 +S219100CF6033E14000346100080FFCE33E051CA0D235F11003CCF +S219100D0B670100CBD1630711001D5841EAEC59C1C57CD7010080 +S219100D20031E44008007083B8057603A581A07C808C026EF15D6 +S219100D3500385701003DDF090000E2EAE1B97D01B203BE170071 +S219100D4A03D6100040AE100040A6100063B711001B30033E17D4 +S219100D5F000346100080FFA233E051C20578E70100F5651950A2 +S219100D74035F1700DC514A5F00003D67050041E2DDDF0400CAB0 +S219100D8955CB56FF006A52E225CF056852820DA5456D52F2153B +S219100D9E205E7F00EB51CA3D5EE2E0E1BE0500E29545DDD704B3 +S219100DB300E23D0352635711001B30353E1A531A4080FF083398 +S219100DC8C535CC5602009A35CC560100C2050A5243571700DD40 +S219100DDDD70400D215DDC70000B20D0252635711001B30343EEB +S219100DF21E531A4080FFD632850D63B711001B3017381A408054 +S219100E07FFC632DCC9035F17000052595FFFFF78E70100A5158A +S219100E1CDDD70400820D63B711001B3017381A4080FFA03238BD +S219100E31570100EAE1819578E701000052481A80076C39805747 +S219100E461C3B265715002A37090080FFF0328007183B805708D5 +S219100E5B3B2667150000522C370900205E0102EB39CA15295FC6 +S219100E700100675ACB052056EAFFF50D2C6F05002C6701000829 +S219100E855A68670100686F0500695F0100B50580FFCE328007B4 +S219100E9AD43A8057C43A2667150000522C370900205E8102EBFF +S219100EAF399A15294F0100684AC2052056EAFFC50D284F050092 +S219100EC4284701006C4701006C4F0500B50580FFCA32800796CE +S219100ED93A7F008057843A26371500BFFFF6FF01528007823AE6 +S219100EEE8057723A0730D832B83280FF4E29015280076E3A8034 +S219100F03575E3A5C1A0336130080FFA02903571300CA56FF003F +S219100F18441A8007523A8057423A20568101EA39DA0D40361063 +S219100F2D00403E100026362E53273E325380FFAA300052B505E0 +S219100F422056EAFF8007263A8057AE3940EEFC003D575D0EE078 +S219100F5751CA0D01527D575D0E4056FC006A37D92580FFE2071D +S219100F6C7D075D0E8007983980575C394056FC002AEE440E406C +S219100F8156FC002A56400EEAE9B10D0AE03D57010080FF040093 +S219100F9644FA6A005CEAFCE989FD800744398057BC39065007AB +S219100FAB4040361000263645530A3880FF2E3000528007B03981 +S219100FC0C2324056FC002A563C0CCA3126370100E031F2050652 +S219100FD55700008A564000465700007F00C2324056FC002A5659 +S219100FEA3C0CCA3126370100E031F20506570000CA56BF0046B2 +S219100FFF5700007F00C2324056FC002A563C0CCA31263701004B +S219101014E031F20506570000CA567F00465700007F00206E47BD +S219101029004056FC002A665C0C205E2C002C570100E051B205FD +S21910103E4A6F000044625F5A8AFD7F0080571639BFFFD8FF802F +S219101053FF08008007163980579E3880FFD02820EE20001D30F7 +S21910106880FF0E001D3080FF0800800796384056FC002A56ECAA +S21910107D0CCA3120561027065F00005F52405F14F0BAFD2056AF +S2191010923075400714F05F52DAFD7F00C6360F00405610002A62 +S2191010A7569D53CA310637000006507F008057AC384066FC006F +S2191010BC2C57B50DE051D7051F5A6C5FB50DB50580FF1E1B80C0 +S2191010D1079C38C636FF0006569FFF6552CB050656A9FF7F001B +S2191010E60656D0FF6952930D0656BFFF6552CB050656C9FF7F16 +S2191010FB001F527F00031ECCFF63FF310043072000633719003F +S219101110BFFFA4FFCA36FF00033E100080FF10006152FAF503D0 +S2191011251E20008007443880577C3707E81D5710000AD8E0D9C7 +S21910113AFA0D20562400EA31AA3D01521E081DF0905307050172 +S21910114F051F52035501F0853561DAAA2520562300EA31AA0D88 +S2191011643D5709003D5F0D00CB514A0700000252F51D3D670D97 +S2191011790020560008EA61A25D1E081DF00055045DC65101552E +S21910118ECC594B3700000C560100075501F0D50D62DADA0DC615 +S2191011A336FF00BFFF2EFFC4527D57050003525D5710000052A8 +S2191011B8954563DACA3DC636FF00BFFF12FF3D5F05000A593DE4 +S2191011CD5701007D5F0500CA56FF00EB51E20520362D0080FF7B +S2191011E2E019852D20362B0080FFD6193D370900065F02002045 +S2191011F7563A00EA59AA1D063700003DE70D0080FFBA193D3700 +S21910120C09000637010080FFAE191B58FC59BB0D3D570900CB33 +S219101221510A670000415A4A67FDFFFC59F3F50152C5055D07DB +S21910123610001F528007823680570A3606D0405610002ACE9DA6 +S21910124B532036240080FF701900DA1A37000000E2C6EEFF00E4 +S219101260F20D1D3080FF5C19DBE941E21A50DC510A570000DD68 +S219101275DEFF00CAEEFF00BAF52036230080FF3E191B308432BC +S21910128AD9310637000080FF3019DB360F00D931063700008044 +S21910129FFF2219BFFF12FECA567F00205E2B00EB51EACD80075B +S2191012B4AE35805792355C1A4056FC006A07B90D4066FC002C82 +S2191012C95FF11F0AD80CC8E059E77540E6FC000CD04056FC00B1 +S2191012DE2A57FD1FE05192252C57F11F6352A30D3C57F51F4082 +S2191012F35EFC00CA560300DA0504EAC50D405EFC003957F11F7B +S21910130801EAFD51D305CBC7F41FAA0502EA033610002B3FF5C2 +S21910131D1F1D4080FFB620850D3C57F51F0A57000001EA4357B6 +S21910133210003B57B90DE051AA45006AFD69AE3503861000407D +S21910134776FC00405610002A7E9D531B880D50D0510A5700004A +S21910135C2E5FF91FCA66FF000C508452CF510A5700004B57003E +S21910137100415A3157B90D6E5FF91FE0518A25CC560F00CF5153 +S2191013860A5700004B5700003B67B90D0B5601006E57F91FE0B3 +S21910139B619A15416AFD6996DD3A5FF11F3C57F51F1A60BD59B4 +S2191013B07A5FF11FDD517C57F51FE059FF8D441A8007A0348017 +S2191013C5570C35405EFC006B3FF91F4056FC006A37F51F40562D +S2191013DAFC006A47F11F4056FC006A4FFD1F0BE0E049921540CA +S2191013EFEEFC007D07B90D3D57B90DBFFFBCFE3D57B90D3D57E0 +S219101404B90DE051D2050052950DBFFFA8FE3C57F91F4A07009C +S219101419003C57F91F8007C6348057F6345C1A00D24056FC00A2 +S21910142E6A07B90D4066FC002C5FF11F0AA00C10E059BF0580DD +S219101443070A01405EFC002B57F51F0A5700000BC0E051B27DB1 +S21910145840AEFC0040CEFC000CB814B03557FD1FE051E2152CF2 +S21910146D57F11F6352830D3957F91FCA560300BA0504E2C50D67 +S2191014822257F11F01E2FC51F305D9C7F81FCA0502E2A505017A +S219101497E200EAFCE99E3540DEFC003B57F51F0A370000415213 +S2191014AC7B57F51FC636FF00BFFF20FC365FB90DC452CAD6FF4B +S2191014C100E059CA453857F51F0A37000041527857F51FC63663 +S2191014D6FF00BFFFFCFB345FB90D1A51CAD6FF00E059AA351DA0 +S2191014EB500358CA590B5614004AD7FCFF41EAFCE9B6D5355751 +S219101500FD1FE051920D03361000393FF91F1C4080FFE81ED546 +S219101515053957F91F4AD700003657B90DE051CA15375FF11FD5 +S21910152A3957F91F1760BC59775FF11FDC517957F91FE059F738 +S21910153F053857F51F0A570000E051DA8D441A8007EE33805704 +S2191015547E334056FC006A37F51F405EFC006B3FF91F4056FC87 +S219101569006A47F11F4056FC006A4FFD1F0BE0E049921540EE47 +S21910157EFC007D07B90D3D57B90DBFFF9AFE3D57B90D3D57B9A6 +S2191015930DE051D2050052D505BFFF86FE3C57F91F8007403306 +S2191015A88057B83380FFEC1A405EFC0001526B579D0D8007B240 +S2191015BD338057EA3200DA07E07C07010006E8D50D3C5F01002D +S2191015D241DAC45A0A593D5701007C5F010041527D5701003D3D +S2191015E737010006370000E031F205C636FF00BFFFDEFAE0519B +S2191015FC9EED1B508007BC320052E0399A0D2056300046570005 +S219101611004657010002527F00085E0700E059BE05085E0E0061 +S2191016260B40A342A22D2096FF00408E1000086EFFFF0D58C36C +S21910163B5A0760EB6780000D80BA0561428A1D52610C580678C7 +S219101650413231769D53A45ACB6E0F00CE69CC5E0F00CE594247 +S219101665520D6700000B5F00004F670000465F0000413210400D +S21910167AE041CADD7F008057783200524046FC002847D125063F +S21910168F38E041B72D40EEFC003D5FC10DE059E205013280FF8E +S2191016A4040044FA6B006152EA05405EFC004B57BC0D951D3DD9 +S2191016B95FC10DE059B2057F52BA154056FC002A57C525E0511C +S2191016CED20D013280FF040044FA6A00E051E205405EFC000102 +S2191016E3524B57BD0D8007203280570C3240EEFC001D57BC0DCA +S2191016F8E051B2154056FC002A5FC10DE059D20D00324056FC0B +S21910170D002A47D125003A80FF040044FA6B005D07BC0D40EE8A +S219101722FC001D57BD0DE051E20D4056FC002A57C525E0518293 +S2191017370D003280FF040044FA6A005D07BD0D8007C23180579F +S21910174C5E31405EFC002B57B10DE051F2052B57B10D80FF041F +S2191017610044FA6A00405EFC002B57D525E051D2056B07D5252C +S21910177602E2F50580FF962A0A3080FF622A0AE080FFEE2CE084 +S21910178B51B20580FF042D80FFE02CBFFF56FF80FF962C033268 +S2191017A080FF5C1B033280FF2C1B40DEFC00E0E1C20D40EEFC5A +S2191017B5003D57A10D1C3080FF040044FA6A00E0518AFD80FF1A +S2191017CAA82C3B57AD0DE051F2053B57AD0D80FF040044FA6A36 +S2191017DF008007DC3080576430031EDCFF06E800DA40CEFC0014 +S2191017F403D610003957C92501E2E051920D1B301A3880FF0491 +S2191018090044FA6A000AE0E5051B3080FF881363571100E0E148 +S21910181EB20D1A301D380442004ABFFF9CFB0AE81B6601008564 +S21910183315205678001D30075A063E08001B660100465700006F +S21910184841325F5A7F5ABAFD07E80CD820564100EAD9F7CD03A6 +S21910185D1E24008007003080571430541A0656010063571900AF +S219101872005A20E6420007D00637000020565000EA31DA2D03AB +S219101887361800033E1400BFFF30FDE0519215235719000A5FD5 +S21910189C000020663D00415263571900EC59EA05235F15000B23 +S2191018B1E60100D515405E10000B57AE531A382B5EAE53E0511E +S2191018C6923D0B57000047570000415A0B570000413AE051FA86 +S2191018DBF5E52D0BE840DE1000FCE98E1D63071100233719003D +S2191018F0033E10000442004ABFFF5AFC233F11001D3080FFACEE +S219101905122357190041EA485263571900FCE9A6ED1A381B573F +S21910191AB2533B5EB253E051B20D0B57000047570000415A0B6A +S21910192F570000413AE051FAF5470700004C1A8007522F805709 +S219101944362F031E40FF00D2403EFC004707F01706E01C5700BA +S21910195900205E340007D80A56C1FFEB51B30580077E07C152A0 +S21910196E405E10002B668219CC512A5F00000C50CB516A006A83 +S21910198300640704016206060564076407640746023A06640723 +S2191019986407640764070E03640764074602EC00640706054E05 +S2191019AD066407640764070C0364076407640764076407640738 +S2191019C264076407640708070605B00064076407F80064076453 +S2191019D7076407180664075402640764076407E0003206060531 +S2191019EC80FF24280A3080FFF027205E53005B5FF0170A58A49E +S219101A015ACB5E0F00406610002C669D53CC59CA560F00CC5180 +S219101A163B66F0174C0703000B5F00000A5700004C5F01004CE5 +S219101A2B5702008007C606405EFC000B576C0D3B66F0172B5E3F +S219101A406C0DE051BA05800784060B5700004C570000415A0B57 +S219101A555700004162E051FAF580076C061C36010080FFD408A6 +S219101A6A80078A061C36010080FF160A80077E063B36F017BF07 +S219101A7FFF66FD800772061C570100E051BA1D80FF2C07405E10 +S219101A9410000B57B2533B66F0172B5EB253E051BA05800724E0 +S219101AA9060B5700004C570000415A0B5700004162E051FAF548 +S219101ABE80070C061C36010063374D0003EE4C0003D6480020AD +S219101AD3E62C001D301A38BFFFE4FAE051E23D23574D000A5F1C +S219101AE80000415263574D00FC59DA351D30033E4400BFFFC482 +S219101AFDFAE051E22D23574D000A5F0000415263574D00FC5966 +S219101B12DA25233F4900E039F2152337450080FFD0060A38E0C9 +S219101B2739820D23374D0023474900004ABFFF1EFA235749008F +S219101B3C235F4D00CA51CA59635F4D0023574D000A5F0000FC37 +S219101B5159DA05415263574D00E5BD23574D000A570000E0519D +S219101B669A1D405E10000B57B2533B66F0172B5EB253E051BA68 +S219101B7B0580074E050B5700004C570000415A0B5700004162BC +S219101B90E051FAF580073605405E10000B57B5533B66F0172B5E +S219101BA55EB553E051BA0580071E050B5700004C570000415A76 +S219101BBA0B5700004162E051FAF5800706051C303B3EF017BFBF +S219101BCFFF96FC800722051C3601006337410003EE40001D3001 +S219101BE4033E3C00BFFFD6F9E051823D235741000A5F00002099 +S219101BF9662C00415263574100EC59DA2D1D30033E3800BFFFD2 +S219101C0EB2F9E051E22523373D003BEEF0171D38234739000109 +S219101C234ABFFFA0F7E051B2058007C804405E10000B57B953A1 +S219101C381D382B5EB953E051B20D0B57000047570000415A0B02 +S219101C4D570000413AE051FAF54707000080079A04405E10005A +S219101C620B57B5533B66F0172B5EB553E051BA05800758040BD7 +S219101C775700004C570000415A0B5700004162E051FAF5800702 +S219101C8C400401D21C3601006337350003EE34001D30033E3012 +S219101CA100BFFF1CF9E051BA058007AE01235735000A5F000008 +S219101CB620662C00415263573500EC59B205800794011D300368 +S219101CCB3E2C00BFFFF0F8E051BA0580078201233735000657F9 +S219101CE00000205E3A00413263373500EB51B20580076801E01D +S219101CF5D1827D23572D00E051C24523572D0000EAEAE9F92594 +S219101D0A207E7D0020762000206E7F0003665000235F35000B56 +S219101D1F5700004C570000D852B852415A635F3500EF51AA0DE3 +S219101D340B5700000E514C5700000B56010063573500416241EC +S219101D49EAEDE9DB0523572D00EAE9B1E503365000233F3100A4 +S219101D5E1D4080FF9816FD51CA0D1E0803F0165D1855BD591786 +S219101D735DDD51195501F0E059AAC523572D00E0519A1D405E87 +S219101D8810000B57B2533B66F0172B5EB253E051BA05800730DD +S219101D9D030B5700004C570000415A0B5700004162E051FAF554 +S219101DB280071803405E10000B57B9533B66F0172B5EB953E02C +S219101DC751BA05800700030B5700004C570000415A0B57000056 +S219101DDC4162E051FAF58007E802233F310023472D00014ABF75 +S219101DF1FF62F7E051921D405E10000B57B2533B66F0172B5E4A +S219101E06B253E051BA058007BE020B5700004C570000415A0BCB +S219101E1B5700004162E051FAF58007A602405E10000B57B95338 +S219101E303B66F0172B5EB953E051BA0580078E020B5700004C96 +S219101E45570000415A0B5700004162E051FAF580077602405EBF +S219101E5A10000B57BD533B66F0172B5EBD53E051BA0580075EC6 +S219101E6F020B5700004C570000415A0B5700004162E051FAF582 +S219101E84800746021C560100635729001C570000630725000A03 +S219101E995820564300EA59F2052056530003362800EA59DA1578 +S219101EAE03EE28001D30033E2400BFFF06F7235F29001D300B81 +S219101EC367000020563B00EA61DA050B56010063572900033E2D +S219101ED82000BFFFE4F6E051D2052337210080FF382303328016 +S219101EEDFF1014033280FFE01323372500E031C21D405EFC00F8 +S219101F022B57A90DE051B20D2B57A90D80FF040044FA6A00E04A +S219101F1751BA056307250023572500E051820D093263372500A8 +S219101F2C80FF44028007CC0180FFC00DE051A20D205663005C11 +S219101F41570000405EFC0001526B57D10D1C3700002056730056 +S219101F56EA31D20520565300EA31FA0D0032BFFF1CF7405EFCE7 +S219101F6B004056FC002A56DC256B57CD0D80FF4A24C5050132B3 +S219101F80BFFF00F7033280FF7613033280FF461380FF820C1F0C +S219101F95528007680180FF780C4056FC002A57A50D80FF040095 +S219101FAA44FA6A00015280074E0180FFD21180073C011C3601C3 +S219101FBF003B3EF01720462C0180FF8208800728011C360100D9 +S219101FD43B3EF01720462C0180FF3408800714011C36010063C3 +S219101FE9371D0003361C00033E1800BFFFCAF5E051B2352357BD +S219101FFE1D000A5F000020662C00415263571D00EC598A2D0A11 +S2191020135F0000415263571D0020564300EA59EA05233719007C +S21910202880FFF614D5052337190080FFE814405E10000B57B27B +S21910203D533B66F0172B5EB253E05192450B5700004C570000E3 +S219102052415A0B5700004162E051FAF5E535405E10000B57B5C5 +S219102067533B66F0172B5EB553E051C22D0B5700004C5700009E +S21910207C415A0B5700004162E051FAF595251C360100633715BE +S2191020910003361400033E1000BFFF24F5E0518A1D405E10002A +S2191020A60B57C1533B66F0172B5EC153E051B20D0B5700004CB7 +S2191020BB570000415A0B5700004162E051FAF54C070000B515C7 +S2191020D0403610002636B253BFFF66F12337110080FF580B8518 +S2191020E50D1C303B3EF01720462C0180FF2C133B36F017BFFF71 +S2191020FA46F10052031EC00080078E278057F227403EFC002785 +S21910210FEEF0171D3880FF96101D30BFFF24F18007EA278057A8 +S219102124D6274056FC002A57B50DE051BE05BFFFD4FF4036FCC8 +S2191021390026EEF00F1D30BFFFC0EF1D30BFFFFCF7E05192FDF1 +S21910214E2A509F528007B6277F0080570828BFFF4CF480FF7A1B +S2191021630F20362B0080FF580A800700288057F0274066FC00A2 +S219102178205658004C57F0170650A452CA560F00405E10002B71 +S21910218D5E9D53CB51C6360F00CB312C5EF0174B0703000A5770 +S2191021A20000063700004B5701004B3702000B30BFFF8CF080BA +S2191021B707B627405EFC001F526B5755204056FC006A07512064 +S2191021CC4056FC006A070120405EFC004056FC002A5658206B36 +S2191021E157D920405EFC0001526B57C50D7F008057E02607E8B8 +S2191021F64056FC002A57C50D06E0E051BA05BFFFB6FF20561209 +S21910220B00EAE18F154066FC002C57D920405EFC002B5E582081 +S2191022200C68AB51DD51205E8000EB51B3050052952D4076FC3E +S219102235002E575520EAE1E21D405EFC002B5751204066FC008C +S21910224AEAE1B60D1C5601006B575120C2522C5E0020CB516AF2 +S21910225F0701001C50C2522C5E0020CB512D5FD9206EE75520B8 +S2191022746A5F01002D57D920CAE96DEFD920800762268057C249 +S219102289255C1A06D807E008E8405EFC002B57C90D408EFC001F +S21910229EE051EA2501526B57C90D005240860080405EC1042BC5 +S2191022B37EB71D405EFC002B9EDC202096FF000A58D85A086A95 +S2191022C80A60C2620A7601000B50C1525059A2052F510A585FDE +S2191022DD6A9AFDD3616C5701000E50F251C3ED7107B90D11C876 +S2191022F24056FC002AD6DC20F50D1D58C85A0357130098EACAE2 +S21910230756FF002AE9C2EADAE93DEF010041DA2BE95FE27FE2D7 +S21910231CB20D033613001B38014280FFB0103957B90DE051E24E +S219102331E51D50441A80072A2580576E25581A63372900403EDF +S219102346FC004707F0170657000027E6F01707E80A6020564399 +S21910235B00EA618A65065F01004F52EA59BA5D065702000AD87C +S219102370ECD9EA55065F030020563A00EA598A554432633729CC +S2191023850003362800033E1400BFFF30F2E051F275235729005D +S21910239A0A5F000020662C00415263572900EC59CA6D033628AB +S2191023AF00033E1000BFFF0AF2E051C26523371500233F1100BF +S2191023C41F42BFFFC0FE405EFC002B5FB90D0A38E059F2154066 +S2191023D95E10000B57B5531C302B5EB553E051B20D0B570000D3 +S2191023EE46570000415A0B5700004132E051FAF54607000085C6 +S219102403451C36010020462000BFFFF8F15DDFF0171C30CA3160 +S21910241846070100B5352337290020664C0006570000065E014B +S21910242D00EC51B20DDF055762EC51F215E51D20665000EC5193 +S219102442A20D951D0B303D3EF01720462C0180FF5005F5150BD6 +S219102457303D3EF01720462C0180FF0A06F50D0B303D3EF017C8 +S21910246C2046000880FF1803F5053D3EF01720462C0180FF961A +S2191024810F481A800738248057D824065F000020567000EA597C +S219102496AA0D403EFC00273EF01720462C0180FFA603950D40E2 +S2191024AB3EFC00273EF01720462C0180FF620F8007B224065E1D +S2191024C00801EB31990D2757010066570100443A4432EB319149 +S2191024D5FD7F0020564500465700004132205630004657000053 +S2191024EA41322056320046570000065601007F0020564F004629 +S2191024FF570000413220564B0046570000065601007F008057D8 +S219102514962306D807E800E2E0E9B20D1B37000041DABFFFAED4 +S219102529EB0AE15FEAB205C4E2F5F51C508007862380579623F6 +S21910253E06E807E0023ABFFFCEFF7C5701001D56020080079473 +S2191025532380577C2306E807E0083ABFFFB4FF7C5701001D56F6 +S219102568080080077A23D832B83206569FFF6552FB050636A993 +S21910257DFF6737010001527F000656BFFF6552CB050636C9FF1F +S219102592E5F50656D0FF6952BB050A3085F500527F00805754EF +S2191025A72306E81D37000041EABFFFBEFF1D5080075223C73E91 +S2191025BCFF000758845A405610002A66C553CC59C73E0F000B27 +S2191025D1570000CC39073F0000465700004132463F000006564D +S2191025E601007F0080578E225C1A06E800E207D003DE10008531 +S2191025FB0D41EA23571100C4E2CA560F000AE11D3700001B388C +S219102610BFFF5EFFE051BAF57AE701001D50441A8007702280DF +S21910262557242206D81BCE100007D0F9D9C9151BE01C37000042 +S21910263ABFFF9AEA0AE842DA1C370100C4EA42E2BFFF8AEA0AC4 +S21910264FE95AEF000041D2F9D9F1ED1B508007042280579822C3 +S21910266407E8983ABFFF52FF1D38B03A0A30C73EFF00BFFF44FD +S219102679FF1D38A83A0A30C73EFF00BFFF36FF0A30DD3EFF007C +S21910268EBFFF2CFF8007762280573A2207E000EA1C5700001C87 +S2191026A3660100E051F2050C5F000041EA4162E059BAFD2056DF +S2191026B8C800EAE9A7050AE8DD3EFF00BFFFF6FE0A301D505FED +S2191026CDEAE051B715205623001C5F000041E2E059B205EA5992 +S2191026E2BA05205E2A00465F000041321D585FEAE0599FF506BE +S2191026F7508007EC218057D42107E806E61000FC31B90D1D3FCF +S21910270C000041EAC73EFF00BFFFA6FE0A30FC31F1F5065080EF +S21910272107C42103524607000041325F527F52BAFD0750B852F3 +S2191027364657000041320750B0524657000041320750A8524669 +S21910274B570000463F01007F0000524432036AC852065F000054 +S2191027600D605F6ACB5EFF000B514132E061EFF57F00075A0716 +S2191027755700005F5A46570000413A41327F5A8AFD7F008057E9 +S21910278A4821031EE0FF07E803E610001C3080FF940DE051B285 +S21910279F15205651005D57000041EA205643005D57000041EABD +S2191027B41C30BFFF9EFF1D300A38BFFFA2FEC5051D30BFFF1280 +S2191027C9FD0AE85D070000031E20008007102180572021031E61 +S2191027DEC0FF063803EE30001D30BFFF3CFF1D30033E1000804F +S2191027F3FFA80D0A580052E059E20523571900E051EA5700002F +S219102808031E40008007FC208057C0205C1A06E807E0033E104F +S21910281D00BFFFCCFDEAE9B20D23371100BFFFAEFFE051D2059A +S2191028321C30BFFFC6FCC5051C30BFFF9CFC4A070000441A8015 +S219102847079E2080578620031EDCFF07E0065700001F5A635FAA +S21910285C11004132205E6700EB51823DDF055C5AEB518215D5AC +S2191028714D205E7000EB519A4D033E1000BFFF26FD0A30033E32 +S2191028861400BFFF9CFDB545065F000020562D00EA59BA0D06AB +S21910289B5F01004452EA59EA054056FC006A07D125F50540EECA +S2191028B0FC003D3ED025BFFF34FD4036FC002637D125E031D2FB +S2191028C505BFFF12FFE051F21D1C30BFFF2AFCE51D40EEFC0079 +S2191028DA3D3ECC25BFFF0CFD3D3FCD2503361400BFFF3AFE3DB3 +S2191028EF3FCD257F3AB205E039DA05025263571100950D015212 +S21910290463571100D5051C30BFFFCCFB0AE023571100415263C8 +S219102919529B3DC152405E10002B663229CC512A5F00000C50BB +S21910292ECB516A00620008001A005200405EFC004056FC002ACD +S21910294356DC256B57CD0DD5254036FC0026EEE4261D30403E22 +S219102958FC00273EDC25BFFF60FB03361400203E42001D408010 +S21910296DFF660CE051D20D4056FC006AEFCD0D1C30BFFF7CFB79 +S219102982850D1C30BFFF74FBC5051C30BFFF4AFB0AE05C0700BA +S21910299700031E24008007481F8057301E581A07E800C2033E5A +S2191029AC140008D8BFFFF4FB0A30033E1000BFFF80FB0A304022 +S2191029C1E6FC003CBEE4241738BFFF5AFC1BCEE6FFDDC92056BB +S2191029D651005D57000041EA20564D005D57000041EA1DB01622 +S2191029EB30003ABFFFCCFB0AE81DD0205630005A5700001A364D +S219102A0001001738BFFFF8FC0AE81CB8B50D41C21D301C38BFBF +S219102A15FFE8FC0AE81B301C38BFFF54FDF9E9991D23571100F1 +S219102A2AEAC1DE152337150037DEE4241B384046FC0028E6EC89 +S219102A3F241C4080FF1C0B63071500E0519AE5205631005A57C0 +S219102A5400001630D83EFF00BFFF5EFB5D070000481A80078A0F +S219102A691D8057661E031EBCFF07E81E0803F00F0511051305A5 +S219102A7E150501F0033E1000BFFFCEFA0A3003E634001C38BFE2 +S219102A93FF92FB1C3003E614001C3880FFFC0AE051D25D205695 +S219102AA871005D57000041EA205670005D570000233F11001D8A +S219102ABD360100BFFFA0FB0A301C38BFFF34FC0AE8C3CF10004F +S219102AD292151D30023ABFFF88FB0A30023ABFFFDAFA033F1C03 +S219102AE7000A30C73EFF00BFFFCCFA0AE8C3D71000F20D2357EE +S219102AFC2100E051B20D1D30043ABFFF5AFB233F21000A30BF85 +S219102B11FF86FB0AE8C3DF1000F20D23572500E051B20D1D309B +S219102B26083ABFFF38FB233F25000A30BFFF64FB0AE8235711F7 +S219102B3B00203E10004751A21523572900E051E20D1D30BFFFE5 +S219102B5012FB233F29000A30BFFF3EFBC5051D30BFFF78F90A42 +S219102B65E85D070000031E44008007761D8057361D031EE0FF51 +S219102B7A06D803EE10001D3007E00838BFFF9EFB1D301B381CCB +S219102B8F4080FF7E0A031E20008007241D4056FC002A57CD0DDF +S219102BA4C232C6512A5701007F004056FC002A57CD0DC232C654 +S219102BB9516A3F01007F008057A01D4056FC002A5640042A570D +S219102BCE19002A5F0100C63EFF002A570D000B3080FF040044A7 +S219102BE3FA6A008007861D8057761D4056FC002A5640042A57F9 +S219102BF819002A3701002A57110080FF040044FA6A00CA56FF5C +S219102C0D0080075E1D80574E1D4056FC002A5640042A57190069 +S219102C222A3701002A571500083A80FF040044FA6A0080073864 +S219102C371D8057281D4056FC002A5640042A57190006402A5F7B +S219102C4C0100003A2A5715000B3080FF040044FA6A0080070E92 +S219102C611D8057461C4056FC006A07D10D06E040EEFC003D378E +S219102C7659253DDE5825E031F20580FF30003D575925E0519A8A +S219102C8B157DE759253C57000003327B570400205685057C57B7 +S219102CA0000080FF5A06033280FF2A068007101C8057B01C40B1 +S219102CB556FC002A57D10D0668E051FA154056FC002A5F5925FD +S219102CCA2A665825EB69FA0D6A0759252C57040003326D570009 +S219102CDF0080FF1C06033280FFEC050152A505005280077C1C17 +S219102CF44056FC002A575925E051EA5700007F0080575C1CE005 +S219102D0931C21D405EFC002B57D50D5F526B57D50DE051BF2D20 +S219102D1E4056FC002A5640042A5719006B07D50D2A3701002ABB +S219102D33571500053A80FF040044FA6A00951D405EFC002B57D2 +S219102D48D50D41526B57D50D61528A154056FC002A5640042A76 +S219102D5D5719002A3701002A571500043A80FF040044FA6A007B +S219102D728007FA1B8057EA1B4056FC002A5640042A5719002AA5 +S219102D873701002A57110080FF040044FA6A00CA56FF00800787 +S219102D9CD21B80577A1B5C1AC73EFF006D3ABA0580079C014070 +S219102DB166FC002C5FD90D406EFC002D6EF42440A6FC000CB822 +S219102DC60B50CD514A3F0000415A6C5FD90D6A3AF20520566420 +S219102DDB00EA59B205800768014056FC002A5640042ADF19006C +S219102DF020AE4F00BFFF30D80A10405610002AB6D6533B37019A +S219102E05003B570D00203E240080FF040044FA6A003B370100E4 +S219102E1A15C83B570D00153880FF040044FA6A003757D90D0026 +S219102E2FD2EAD18E3D405610002AC6D6533456F424DA510A5734 +S219102E44000041D23B3701000A588452CA560F00D851CB5E0F16 +S219102E59000A3F0000D859C7EEFF000B5700001D383B5F0D00C3 +S219102E6E0AE080FF040044FA6B00DCE6FF001C38D9E93B3701DA +S219102E8300DDCEFF003B570D00D9E180FF040044FA6A00375769 +S219102E98D90DDCCEFF00EAD1E6CD3B3701003B570D00203E2380 +S219102EAD0080FF040044FA6A001938843A3B370100D639073FF9 +S219102EC200003B570D00C73EFF0080FF040044FA6A00D93E0FF2 +S219102ED7003B370100D639073F00003B570D00C73EFF0080FFE7 +S219102EEC040044FA6A003B3701003B57110080FF040044FA6ACF +S219102F0100CA56FF0043571300205E2B00EB51F21503361300A2 +S219102F16013A80FF080BE0519A0D035F130020562D00EA59CAC7 +S219102F2BE5BF07D6FE4056FC002A5E400401526B5745007707C7 +S219102F40D90D0230BFFFF4D6441A8007F21980575A1907E0089E +S219102F55E81D505FEA06D8E051D20D1C3F00001B3041E2C73EF8 +S219102F6AFF00BFFF32FE1D505FEAE051DAF58007441980572CB3 +S219102F7F1907E008E81D505FEA06D8E051B20D1B30BFFFE6FDC8 +S219102F945C57000041E21D505FEAE051FAF580071A198057D204 +S219102FA91900527F008057B2190032BFFF50FD4056FC000A8811 +S219102FBE4086FC002A76DC250E68407EFC002F57D9252066202C +S219102FD3002A5F01005F626D5F0100446A4452E0618AFD2F572A +S219102FE8D9252A5F85003166DC256E5F95002A6F8900405EFCFD +S219102FFD006B67CD0D6E6F91002A578100305FD10D6E5701015A +S219103012E059A20D7007D10D20364000BFFF7EFB0A30BFFF8C06 +S219103027FC20364000BFFF70FB0A30BFFF7EFC405EFC006B57F6 +S21910303CD52580072E1980571E19407EFC002F5FD9254056FCBC +S219103051002A76DC250E68206620002D5701005F626B5701008F +S219103066445A446AE0618AFD2F57D9252E5F95006A5F85002E0A +S21910307B5F91006A5F89002E5F010101326A5F8100BFFF78FCAB +S2191030908007DC1800527F00405EFC00405610002A5694306BDB +S2191030A557A90D405EFC00405610002A5686316B57A50D405E6B +S2191030BAFC00405610002A56AE2F6B57B10D405EFC004056102D +S2191030CF002A5642306B57AD0D7F008057CE17405EFC002B5712 +S2191030E4DD0DE051DA4D01526B57DD0D80FF521640DEFC003B45 +S2191030F9E640043C5735001F3280FF040044FA6A001D323C5F55 +S21910310E35000AE880FF040044FA6B003C571500405E10002BC3 +S2191031235E4E2F1E080AF0035D405E10002B5E7C2F055D405E45 +S21910313810002B5E9E2D075D405E10002B5E762D095D405E10B7 +S21910314D002B5EA62F0B5D01F07EEAA20DE0E9820D3C5735006A +S2191031621D3080FF040044FA6A003B5640042A57310000328092 +S219103177FF040044FA6A0080FFE21580073A178057DA174056D7 +S21910318CFC002A5640042A574100E051D20580FF040044FA6A64 +S2191031A1008007CA1785057F008057CE16541A6307110007E800 +S2191031B6205654005D57000006E0A432BFFFDCDE5D5701001C6C +S2191031CB30BFFFD2DE1E081DF082532056740083532056680096 +S2191031E0845320567200855320566500865320566100875320A9 +S2191031F5566400885320D63A0089D301F04AEA80FF6A040A581B +S21910320AB85A1E0803F0985B0A58B05A995B0A58A85A9A5B9B28 +S21910321F5301F0033618001D380442004ABFFF98E10AE820DEE4 +S2191032343B005DDF000041EA0432BFFF60DE5D57000041EA209D +S219103249E640001C30BFFF50DE5D57000041EA5DD7000041EABF +S21910325E1C30BFFF3CF96357150003E614001C301D3804420054 +S2191032734ABFFF50E1033610000A380042004ABFFF42E10AE80E +S2191032885DDF000041EA0032BFFF0EDE5D57000041EA0232BF07 +S21910329DFF02DE5D57000041EA5DD7000041EA0232BFFFEEF812 +S2191032B2635715001C301D380442004ABFFF06E10AE85DDF001F +S2191032C7005D0701004C1A8007C21501526332AB15EA37C0002B +S2191032DC405E10002B66F032CC31265F00000C30CB3166000A3D +S2191032F1000A0008000A0000527F0001526332AB15EA37C0003D +S219103306405E10002B661A33CC31265F00000C30CB3166000AE7 +S21910331B000A0008000A0000527F00406EFC0001526D57B90D14 +S2191033304066FC00405610002A56D0336C57E10D405EFC002B32 +S2191033455761250D700C780B68E051E23D0B602C576125635294 +S21910335AB315C75603008A15C6560300DA0D265701006757017F +S21910336F00443A2B57612544325C526B576125A5252C5761256F +S2191033846152B315C75601008A15C6560100DA0D2657000067FF +S219103399570000423A2D57612542325E526D576125C50D065790 +S2191033AE00004757000041322C576125413A5F526C5761250D59 +S2191033C3582B576125E051DAC56E07B90D6F07E10D7F008057BB +S2191033D8FA1408E040EEFC007DE76125065007300A38BFFF3CF8 +S2191033EDFF3D5761259C518007F0148057D81408E040EEFC0050 +S2191034027DE76125BFFF20FF3D5761259C518007D41400527F92 +S2191034170000527F0000527F0080578814405EFC002B576925CC +S21910342CE05182250BD8BFFFF2D13BEF69253D5F15007B5F698E +S219103441253DE719000A307D071900BFFFECD13D3701003D57A4 +S2191034560D003D4711001C3880FF040044FA6A003B576925E02B +S21910346B51BAE580074E14405EFC002B57ED2741526B57ED27C5 +S2191034807F008057261440EEFC0040DEFC0001E23D57ED276162 +S21910349552BA05BFFF88FF7D07ED273B576925E051D2057DE793 +S2191034AAED27BF07E4FF80070C14460700007F000152465700D8 +S2191034BF0001527F00460700007F0046070000663F05007F00CF +S2191034D48057241406E8BFFF98FF01525D5700001D57000061A0 +S2191034E952FA05BFFF34FF1D5700006152B2FDBFFF8AFF015207 +S2191034FE80070A14460700007F00460700007F0080575214BF6B +S219103513FFF2DA8007561401527F0001527F004056FC006A37FB +S2191035286D257F0080573414403EFC004056FC002A576D2567C3 +S21910353D3771252A570100273E7025E051BA050052E5050232BB +S21910355280FF040044FA6A0080071214805702144056FC006A8E +S2191035673771252A5E70256B3F05004056FC002A576D256B474A +S21910357C09002A570100E051BA050052F50503320B3880FF0463 +S2191035910044FA6A008007D6138057C6134056FC006A3771257F +S2191035A62A5E70254056FC002A576D256B3F05002A570100E028 +S2191035BB51BA050052F50504320B3880FF040044FA6A0080075F +S2191035D09E1380578E134056FC006A3771252A5E70256B3F0513 +S2191035E5004056FC002A576D256B4709002A570100E051BA05EA +S2191035FA0052F50505320B3880FF040044FA6A0080076213803A +S21910360F5752134056FC006A3771252A5E70256B3F05004056AA +S219103624FC002A576D256B4709002A570100E051BA050052F5F9 +S2191036390507320B3880FF040044FA6A008007261306509852BB +S21910364E0658905A2066FF004C59C85A0B510658885A4C59D0AD +S2191036635A0B514C31D83206517F00031ECCFF63FF3100033672 +S2191036781000BFFFB2FEE051820D23371500BFFFC4FFCA56FFDB +S21910368DFFA5050052031E20008007D61206505F32E051B70D8C +S2191036A2065EFFFF09525F52E051EEFD06500B30E051FFF57F3F +S2191036B7008057A812BFFF56CF00526A0080579C12BFFFF0FF87 +S2191036CC005280079E1200527F008057D21106E8005201DA00A5 +S2191036E1627EEAC215CF057DEAC21DD51D7FEABA1D405EFC0038 +S2191036F62B5FE50D0BDEFFFFE059DF150BD8E0D9AA151DDA8543 +S21910370B15405EFC002B5E40046B071900405EFC006BEFE50DA7 +S219103720D50500EAD50541EA0162E061D235405EFC002BE64020 +S219103735043C5F1900E059A20D2B3701002B571500043A80FF13 +S21910374A040044FA6A00405EFC006BEFE50DC5EA405EFC002B4F +S21910375F5E7C25CBE97CEF19003C5F1900E051B20D2B37010002 +S2191037742B571500053A80FF040044FA6A00A50D2B3701002BEA +S219103789571500043A80FF040044FA6A001B50800724110152C7 +S21910379E00627E32C215CF057D32C21DD51D7F32BA1D4056FCAA +S2191037B3002A5FE90D0B56FFFFE059DF150B50E051AA151D5227 +S2191037C88515405EFC002B5E40046B071500405EFC006B37E92A +S2191037DD0DD5050032D50541320162E0619215405EFC006B37D5 +S2191037F2E90DC532405EFC002B5E7C25CB31405EFC002B5E409D +S219103807046B3715007F007F007F008057E61080FF2C0F405642 +S21910381CFC002AEE40043D5731001F3280FF040044FA6A00E009 +S21910383151820D3D573500003280FF040044FA6A008007C6100A +S2191038468057B210D832B832405EFC002B6640042C5715000BB9 +S21910385BE8E051D20D2A5F0100C63EFF002A570D000B3080FF76 +S219103870040044FA6A00E50D2C5719002A5F0100C63EFF002A3D +S219103885570D000B3080FF040044FA6A003D5E40042B574500A9 +S21910389AE051E2056B074500003280FF96018007601080574CD3 +S2191038AF104056FC002A5E40042B57150006E8E051BA052B578A +S2191038C419002A3701002A57110080FF040044FA6A005D5700EE +S2191038D90080072E107F00805718105C1A4056FC002A564004B6 +S2191038EE2A5F19000640630711002B57010007480A302B5719A6 +S21910390300033E100080FF040044FA6A00235F11000AE8E05960 +S219103918F2054056FC002A37F12780FF18011D50441A8007DEBB +S21910392D0F8057CA0F405610002A66D2364076FC002E564004F9 +S219103942205E40006A67010044525F5ACAFD0052405EFC002B9E +S2191039577E7C25405E10002B6ED2360A660100C552CF51075ACF +S21910396C6A6F010044525F5AE059BEFD0C506152B7F5205613D0 +S219103981006E5741042EEE40044056FC002A5640091E081DF024 +S21910399603554056FC002A5640030555405610002A56B83621CB +S2191039AB55405610002A56C4360955405610002A569A362555AF +S2191039C0405610002A56D6361955405610002A569C371B554094 +S2191039D55610002A560E381155405610002A5610380F5501F073 +S2191039EA1E32BFFFEAFC1E32BFFFAAFD1E081DF013051505277E +S2191039FF05230501F04036FC0026367C04BFFF16FB40561000BD +S219103A142A56622C7D578D008007EC0EE039A20D5F3A0650C71A +S219103A29510A57000063528AFD01527F0000527F008057260FD6 +S219103A3E0650403610002636643AE051B2052A3781004056FC2C +S219103A53002A5640042A578D0080FF040044FA6A008007080FAE +S219103A688057680E07E04056FC002A5640042A571900063A2AA6 +S219103A7D5F010006E82A5715000B3080FF040044FA6A00EAE902 +S219103A928A0D1D301C38BFFF48FE0A58E059AA0D1D301C38BF1C +S219103AA7FFFED40A580052E059A2050B508007300E8057400E4B +S219103ABC06E8D8EAB8EA6AEACA050D32BFFF7EFD1D30BFFF7870 +S219103AD1FD8007360E8057220E06E81D370000E031A20D41EACF +S219103AE6D832B832BFFFCEFF1D370000E0318AFD8007120E8024 +S219103AFB57660E5C1A63071100203E100020462B00004A80FF1D +S219103B10E400441A8007580E8057000E031EE0FF06D007D820A2 +S219103B25BE20002357710008A823A775000910E051B20520BEDF +S219103B3A3000405610002AB6E75300CA20661F0003C610001811 +S219103B4F580B50D9514ABF000041CAECC9A7FD00CA1A501B5162 +S219103B648A25205630005857000001CAD51D15E000EA1A301B32 +S219103B79381C401D4880FF72121860D9611658CA5941CA1A308E +S219103B8E1B380B5700001C401D484C57000080FFEC0D0AD00B97 +S219103BA3D81A501B51DAE5F9A1A70514C820562D00EA11FA0DC4 +S219103BB81850195EFFFFCB510A570000F751AA050BC81850D97E +S219103BCD514A170000A50D5FCA850D1830D931063700005FCAF7 +S219103BE2BFFFD6FEE0C98EFD031E200080074E0D80576E0D5826 +S219103BF71A0650005A23672D00634F11000848636715000760CA +S219103C0C0A300B380C40BFFF06FF481A8007540D0152E031BA9A +S219103C210500527F0006680D5F0000E059922520860001207E94 +S219103C36E0FF20765E000B60D862B8620D58A659F059A7050079 +S219103C4B526A62A20D6D62820D0C58CF59CB5EFF00EE59A30581 +S219103C600052416AE051D2050D5F0000E059FAE57F0080575EFD +S219103C750B581A06E007C8BFFFA0FFE051B20580074E03403660 +S219103C8A10002636F853BFFF46FE1C30BFFF64FE40361000263F +S219103C9F360D54BFFF34FE19E81DE61C0020362000BFFF08FE1A +S219103CB43D370100BFFF42FE44EAFCE9E7F54036100026361092 +S219103CC954BFFF0CFE8007100306E8D8EAB8EA20562500EAE95B +S219103CDEE2051D30BFFFD6FD8007EA0200D2204E2B0041E21CDA +S219103CF3370000006A2056300006E8EAE9E2B700001D56D0FFC4 +S219103D086952BB15205ED0FF1A50C352DA51CAD1DDD141E21C87 +S219103D1D370000CBD106E81D50CB51CA56FF00695293F520565A +S219103D326C00EAE9CA0D41E21C37000006E8EAE9EA0541E21CEC +S219103D47370000016A06E8205E53001D56DBFFEB51B305800729 +S219103D5C6802C152405E10002B66743DCC512A5F00000C50CB03 +S219103D71516A0044024E024E024E024E024E024E024E024E02A7 +S219103D864E024E024E024E024E024E024E024E024E024E024EA5 +S219103D9B024E024E024E024E024E024E024E024E024E021A0210 +S219103DB03C01A8004E024E024E024E024E024E024E024E024E36 +S219103DC5024E024E024E024E024E024A014E024E024E024E02B7 +S219103DDAFA004E024E024E024E024E024E024E024E024E021ADB +S219103DEF023C01A8004E024E024E024E024E024E024E024E0243 +S219103E044E024E024E024E024E024E024A014E024E024E024E2B +S219103E1902FA00E069F21539370100393F050048CAE039FE0517 +S219103E2E80FF42090A300B38204E2D0063B7110063D715000A04 +S219103E4342BFFFD4FC800788013937010044CAE031CE05803161 +S219103E58204E2D0063D711000A3A09401648BFFF8CFD8007663B +S219103E6D01E069A21563B7110063D715002046100039370100C9 +S219103E82393F0500204E2B0048CABFFF8CFC8007400163D71195 +S219103E9700203E100020462B0039370100164844CABFFF4AFD20 +S219103EAC800724011937000044CABFFF02FC8007160139EF015F +S219103EC10000DA00C200BA44CAE0E9EA054036100026EE1354BA +S219103ED6A51D1D30BFFF42FDE051DA154036100026361A54BF87 +S219103EEBFFECFB1D30BFFF0AFC4036100026EE2C54205619000D +S219103F00EAD1B7051AD6E7FF00B21D57000041E2E051820D4100 +S219103F15DA1D50DB510A570000E051AAFDE0D1C205FAD9A705DF +S219103F2A1AD8E0B1C2051AC0BBC1B5051AB8BBB918505FC2172D +S219103F3FD6FFFFE051970D20362000BFFF6EFB18505FC2E05158 +S219103F549FFD1D370000850D41EAD832B832BFFF56FB1D37003F +S219103F6900E031C2055FDA7FDADAF517501AB8E051C72D203641 +S219103F7E2000BFFF38FB17505FBAE0519FFDB52539E70100E0E0 +S219103F93D1BA0520D620001AEEFFFF1C50FD57A000CA560100D7 +S219103FA820362E00A2054332BFFF08FB5FEAC5F520362500BF51 +S219103FBDFFFCFA850D20362500BFFFF2FA1D30BFFFECFA41E21A +S219103FD21C370000E031B205BF07F8FC481A8007100880579484 +S219103FE709031ECCFF1E0803F019FD035640001C652A5FFDFFED +S219103FFC096544522A67FDFF0B5D44522A5FFDFF0D6544522A55 +S21910401167FDFF0F5D44522A5FFDFF1165135D44522A5FFDFF9A +S2191040262A570100033E1000155D175501F0BFFF3EFC031E2095 +S21910403B00800730098057200920567427EA39DA05E031B205C0 +S219104050BFFFC2F780071809805708090132203E7427BFFFDE77 +S219104065FF8007060980573E08405EFC002B57ED0D0BD8E05155 +S21910407AFA254036FC0026EE000E4056FC002A56400EEAE9A294 +S21910408F1D0AE03D570D001D3080FF040044FA6A00E051E205CF +S2191040A43D5719008A560100D5053D5719001E5A4B517D5719DC +S2191040B9001DEE2000FCE99AED01527B57ED0D8007F4078057CE +S2191040CE9408265709002A570100E051CA05205636FF9515E0EF +S2191040E341F20528570100E051BA050052950D265709002A5710 +S2191040F8010080FF040044FA6A0080076A0880575A08265709BA +S21910410D002A570500E051CA05205636FF9515E041F205285716 +S2191041220100E051BA050052950D265709002A57050080FF04FF +S2191041370044FA6A008007300880572008265709002A571100E0 +S21910414CE051CA05205636FFD50580FF040044FA6A0080070E04 +S219104161088057FE07265709002A571500E051CA05205636FF89 +S2191041769515E049F20529570100E051BA050052950D2657096A +S21910418B002A57150080FF040044FA6A008007D4078057C40745 +S2191041A0265709002A571900E051CA05205636FF9515E049F265 +S2191041B50529570100E051BA050052950D265709002A57190056 +S2191041CA80FF040044FA6A0080079A07205636FF7F00205636A2 +S2191041DFFF7F006132A2156232AA154056FC002A57D9252A5F01 +S2191041F481002B6700000552205E8505EB61E20500527F000229 +S219104209527F0005527F004056FC002A57D9252A578D007F0046 +S21910421E80574207063820364000BFFF86E9800740078057A010 +S2191042330606E03C3700001C50C6EEFFFFDD5E8007875A6F5A78 +S219104248B305800774010B50C152405E10002B666642CC512AFC +S21910425D5F00000C50CB516A0020001C011C011C011C011C0145 +S2191042722E012E012E012E012E0138002E012E012E0122011D32 +S21910428750205E60004B51EB519A7DDD361F00BFFF06E980078A +S21910429C240120362500BFFFFAE8DD8E00F8888ADD5E70008414 +S2191042B15A0B890A58A15ACB5E01000A68A26ACD6E01000A604A +S2191042C6A362CC6601000072DD860080DD360F00CA7E0100E0F6 +S2191042DB81C205208600FF10896F329B4DC132407610002E863D +S2191042F0FE42D031267700001030CE31660020002E0028002C7F +S219104305003E007E0036003A00460056004E00540074005E0052 +S21910431A68007000616AE2770000A52D0F70852D0F616162E265 +S21910432F770000B5252D59B5052D590F59615AE2770000B51DFF +S219104344E069E2770000F515AF760100C5150F61E061E2770099 +S21910435900F50D0A70A472CE760100A50DED59E2770000E50528 +S21910436E2D590F59E059E2770000E071C2051150D151E51D1CEC +S219104383560200C51DDD566000205E3F00EB51C3051C5604000C +S219104398B5151D504B513C5F0200D052DD362000CB5EFFFF0B04 +S2191043AD51E031C205405EC0FF0B511E825051DC5180072605E4 +S2191043C280573605031EE0FF20364000BFFFCEE7205EE00763EE +S2191043D75F1000205E8007635F120003EE10000A30BFFF48FE35 +S2191043EC405EFC006B57F10D4066FC00025A6C5FC125406EFCF4 +S219104401002A5F00003D670000031E20006D5FBC256A670000A5 +S21910441642522A6700003D5F02002D6EBC256D6702006A5F009E +S21910442B008007DC04407EFC002F77C1250F80E071921D405695 +S219104440FC002A67F10D005A4056FC002A6EBC25EE59CE0D2D13 +S219104455570000415A6C570000426A2F57C1254262EA59E6F5AE +S21910446A7007C1257F007F007F008057EC0420364000BFFF2013 +S21910447FE7405E10002B5EA631EB51E25700008007DE04805769 +S219104494660420EE40001D30BFFF00E70A30BFFF8EFD1D300A7A +S2191044A938BFFF04E780075A04205E680001622056C800405705 +S2191044BE00F3405F04F340670EF3400720F320564700405732C3 +S2191044D3F1400730F1405734F17F00405602002A5EFFFFC73E08 +S2191044E8FF00403F06F320668000005734F14C51CA56FF00BA3B +S2191044FD055F5A9AFD005734F1CA567F00405734F17F00005793 +S21910451232F1E051B60500527F00005708F347570000005F321E +S219104527F10152CB5E7F00405F32F17F0080579C035C1A06E06B +S21910453C03EE13001C301D38BFFFCCFFE051B2FD03571300CA10 +S21910455156FF00441A80078E0380574E0307E008E81D505FEAC0 +S21910456606D8E051D20D1C3F00001B3041E2C73EFF00BFFF664C +S21910457BFF1D505FEAE051DAF5800738038057200307E008E8CE +S2191045901D505FEA06D8E051B20D1B30BFFF98FF5C57000041E9 +S2191045A5E21D505FEAE051FAF580070E038057C6024056FC006B +S2191045BA2A57F50D06D007D80AE8C3EACAE9CAE94056FC002ADE +S2191045CFE64004950D3C5749002036640080FF040044FA6A0035 +S2191045E41A301B38BFFF28FFE051CA055FEA7FEA8AF580079AD9 +S2191045F90280577E038057FA0200EA5C3A633A8B35C13A4056FD +S21910460E10002A5E2046CB39275700000B38CA3967001C000831 +S219104623003200380020362100BFFFB6C9405EFC0001526B57A0 +S219104638F90DF5154056FC002AEFF90D203621006A07F90DBFEA +S21910464DFF74C9C50D20EE2100950D405EFC00235721002BEF15 +S219104662F50D6B57F50D1D5080079E0280578A025C1A0057089C +S219104677F30336130007E8013A435713007D070100BFFF98F335 +S21910468CE051C20501527D57010020362100BFFF74EE015244B6 +S2191046A11A8007660280572A024056FC002AEE40043D5735002C +S2191046B61F3280FF040044FA6A00203621000AE0BFFFFAC8007D +S2191046CB32BFFFE6FD3D573500003280FF040044FA6A003D5738 +S2191046E01500405E10002B5E5A451E080AF00105035D405E1091 +S2191046F5002B5E8845055D405E10002B5EDE44075D405E100078 +S21910470A2B5E3445095D405E10002B5EFA450B5D405E10002B66 +S21910471F5E6E460D5D405E10002B5EB2450F5D01F03D573500A0 +S2191047341C3080FF040044FA6A008007A60180571E02405EFC25 +S219104749002B57FD0DE051EA0501526B57FD0DBFFF4EFF8007E9 +S21910475E10020752405782F320569000405784F37F0006608041 +S219104773610C5007308031E061EA6700000658AC597F00000003 +S2191047881E08031EC4FF03F009ED0BE50DDD0FD511CD13C5158B +S21910479DBD17B519AD1BA51DFD01F06A0000001E0803F008ED60 +S2191047B20AE50CDD0ED510CD12C514BD16B518AD1AA51CFD0332 +S2191047C71E3C0001F07F0000001E08031ECCFF03F009ED0BE513 +S2191047DC0DDD0FD511CD13C515BD17B519FD01F06A0000001E02 +S2191047F10803F008ED0AE50CDD0ED510CD12C514BD16B518FD8E +S219104806031E340001F07F0000001E08031ED0FF03F009ED0BB9 +S21910481BE50DDD0FD511CD13C515BD17FD01F06A001E0803F0B0 +S21910483008ED0AE50CDD0ED510CD12C514BD16FD031E300001C4 +S219104845F07F001E08031ED8FF03F009ED0BE50DDD0FD511CD37 +S21910485A13FD01F06A001E0803F008ED0AE50CDD0ED510CD1211 +S21910486FFD031E280001F07F001E08031EDCFF03F009ED0BE56E +S2191048840DDD0FD511FD01F06A0000001E0803F008ED0AE50CCA +S219104899DD0ED510FD031E240001F07F0000001E08031EE0FF4D +S2191048AE03F009ED0BE50DDD0FFD01F06A001E0803F008ED0A9E +S2191048C3E50CDD0EFD031E200001F07F00031EE4FF63EF1100DA +S2191048D863E7150063FF19006A00000023EF110023E71500230D +S2191048EDFF1900031E1C007F000000031EE8FF63EF110063FF00 +S21910490215006A00000023EF110023FF1500031E18007F0000FA +S219104917001E08031EC0FF03F009ED0BE50DDD0FD511CD13C513 +S21910492C15BD17B519AD1BA51D151FFD01F06A001E0803F00873 +S219104941ED0AE50CDD0ED510CD12C514BD16B518AD1AA51C159F +S2191049561EFD031E400001F07F00031EECFF63FF11006A000062 +S21910496B0023FF1100031E14007F0000001E0803F00135033DAC +S2191049800545074D01F06A00BF5700FE581A08C009E006A80728 +S219104995B8E0E1B20580078602F7C1F375405601002A5EFFFF7C +S2191049AA0AA0EBC18B0D2056FF00EAC1EB570000C352A50D408C +S2191049BF5600012A5EFFFF20561800EBC1AB055852EA478000AC +S2191049D4405E10002B5E4854CB4108470000206620000C58C8B9 +S2191049E946FF00CA41A859C20DEBC7C000EBBFC000AB61155037 +S2191049FEEC5780000AB9EBAFC00018D890DA34CEFFFF58C9171D +S219104A13301B3880FF7E080AE817301B3880FF9A030AD01A3025 +S219104A28193880FF9408D0EA1558905A0BE9EAE9990D5FD2D871 +S219104A3DE9F8E9D105EAE9B9055FD2D8E9AAE91D301B3880FF7A +S219104A5244080AE01D301B3880FF60030AE81D30193880FF5A19 +S219104A6708D0E2345EFFFF4BA915E1EAE1890D5FEAD8E1F8E1B5 +S219104A7CC105EAE1A9055FEA1AC8D0CA1DC980071803E041EA79 +S219104A91050132003A80FF24030AC0405601002A5EFFFF0AA052 +S219104AA6EBC18B0D2056FF00EAC1EB670000C362A50D405600C3 +S219104ABB012A56FFFF20661800EAC1AB0558621850EC57800074 +S219104AD0405E10002B5E4854CB510A570000206E20000D58CA8F +S219104AE556FF00CC51AA59CA05B8B901B2C5550D60AB61EBC7FA +S219104AFAC00017D8ECDF8000EBBFC0001550EC5780000AB9EB58 +S219104B0FAFC00018D090D234CEFFFF58C91B301A3880FF74070B +S219104B240AE81B301A3880FF90020AD81B30193880FF8A07D069 +S219104B39EA1758905A0BE9EAE9990D5FDAD8E9F8E9D105EAE91E +S219104B4EB9055FDAD8E9AAE91D301A3880FF3A070AE01D301A42 +S219104B633880FF56020AE81D30193880FF5007D0E2345EFFFF71 +S219104B784BB917E1EAE1990D5FEAD8E1F8E1D105EAE1B9055F0D +S219104B8DEAD8E11BB0D0B21DB11CB8AAB918D890DA34CEFFFFAF +S219104BA258C917301B3880FFEC060AE817301B3880FF08020A9E +S219104BB7D01A30193880FF0207D0EA1558905A0BE9EAE9990D63 +S219104BCC5FD2D8E9F8E9D105EAE9B9055FD2D8E9AAE91D301B98 +S219104BE13880FFB2060AE01D301B3880FFCE010AE81D301938D3 +S219104BF680FFC806D0E2345EFFFF4BA915E1EAE1890D5FEAD89A +S219104C0BE1F8E1C105EAE1A9055FEA1AC8D0CA1DC980078801CB +S219104C20F7E1C30500CA80077C01405601002A5EFFFF0AA0EB4A +S219104C35E18B0D2056FF00EAE1EB670000C362A50D40560001DC +S219104C4A2A56FFFF20661800EAE1AB0558621C50EC5780004080 +S219104C5F5E10002B5E4854CB510A570000206E20000D58CA56E8 +S219104C74FF00CC51AA598A0DFCB9BB05F8A991D501CA80071C76 +S219104C89010D60AB61EBE7C0001850EC5780000AE1EBC7C0006D +S219104C9E17D8ECDF8000EBBFC0001550EC5780000AB9EBAFC003 +S219104CB3001CC890CA34B6FFFF5CB11B30193880FFD2050AE8C0 +S219104CC81B30193880FFEE000AD81B30163880FFE805D0EA1701 +S219104CDD58905A0BE9EAE9990D5FDADCE9FCE9D105EAE9B905B4 +S219104CF25FDADCE9AAE91D30193880FF98050AD01D3019388055 +S219104D07FFB4000AE81D30163880FFAE05D0D2345EFFFF4BB9DA +S219104D1C17D1EAD1990D5FEADCD1FCD1D105EAD1B9055FEADCED +S219104D31D1AAD11BC8D0CA1DC934B6FFFF19E856E919D890DA26 +S219104D4618E056E11D301C3880FF70051D3090C218380AB8804E +S219104D5BFF64050AE81B301C3880FF5A051B3018380AE080FF53 +S219104D7050051758905ACBE9DCE9FCE9C905405E0100CB511D67 +S219104D85609062CA6116585D59D05A17505651CA59FA61CB05DD +S219104D9ACA05F559A3055FCA00B263CF110063B7150023571152 +S219104DAF00235F1500481ABF07F6F901620052E639D915406EBC +S219104DC40080E0399615C13AC162E639D90DE061D20D07984D52 +S219104DD99982FDF505E731B105A7310C518162813AE0619AFD25 +S219104DEE7F00BF5798F9031EE4FF08C009B063371D0007C80367 +S219104E0356240063572100E0B1B20580072802F9C1D33D4056D7 +S219104E1801002A5EFFFF0AA0EBC18B0D2056FF00EAC1EB570099 +S219104E2D00C352A50D405600012A5EFFFF20561800EBC1AB058D +S219104E425852EA478000405E10002B5E4855CB4108470000209C +S219104E575E20000BA8C846FF00CA41A8A9BA0580073001F5C764 +S219104E6CC000F5CFC000B55923571D0023671D00EB5780000AC0 +S219104E81C9F567C00063671D0080070C01E041EA050132003A2A +S219104E96BFFF24FF0AC0405601002A5EFFFF0AA0EBC18B0D201C +S219104EAB56FF00EAC1EB5F0000C35AA50D405600012A56FFFFAF +S219104EC0205E1800EAC1AB05585A1850EB578000406610002C19 +S219104ED5664855CC510A570000206620000CA8CA56FF00CB519D +S219104EEAAAA9BA05B8C9B5551E0803F00D650C50B5510D55F5BD +S219104EFFC7C00019E0EAE78000F5CFC0000E550C5D0E65EB57B3 +S219104F1480000AC9F567C0000F6501F018D890DA34D6FFFF58E5 +S219104F29D11C301B3880FF66030AE81C301B38BFFF82FE0A30FD +S219104F3E1A3880FF7E03D0EA1958905A0BE9EAE9F905D8E9F864 +S219104F53E9C105EAE9A905D8E9AAE91D301B3880FF32030AE072 +S219104F681D301B38BFFF4EFE0A301A3880FF4A03D0E2345EFFDA +S219104F7DFF4BC919E1EAE1F905D8E1F8E1C105EAE1A905D8E1AA +S219104F921CC8AAC918D890DA34D6FFFF58D119301B3880FFF008 +S219104FA7020AE819301B38BFFF0CFE0A301A3880FF0803235FF0 +S219104FBC1D00D0EA905A0BE9EAE9F905D8E9F8E9C105EAE9A961 +S219104FD105D8E9AAE91D301B3880FFBA020AE01D301B38BFFF3A +S219104FE6D6FD0A301A3880FFD202D0E223671D00345EFFFF4CBA +S219104FFB590BE1EAE1F905D8E1F8E1C105EAE1A905D8E1AAE169 +S21910501063E71D0023572100E051BA0580076802235F1D00F5FF +S2191050255F8000635F110000626367150080073E02F9B1F30DFD +S21910503A6337110063CF150023571100235F15006357250063F6 +S21910504F5F290080073202405601002A5EFFFF0AA0EBB18B0DF9 +S2191050642056FF00EAB1EB5F0000C35AA50D405600012A56FFE3 +S219105079FF205E1800EAB1AB05585A1650EB578000406610009D +S21910508E2C664855CC510A570000206620000CA8CA56FF00CB07 +S2191050A351AAA9DA25F6C9DB0523571D00F851D10D23571D004C +S2191050B8B6C9235F1D00B851EB51EB5F0000ABC963571D0023B3 +S2191050CD672100E061BA058007B00123571D0063CF1500635761 +S2191050E2110023571100235F1500800790011E0803F00D650CC2 +S2191050F750B5510D55F5B7C00018500C5DF5C7C00019E0F5CF61 +S21910510CC0000E65EB5780000AB10E55EBE78000EB5780000A48 +S219105121C9F567C0000F6501F016D090D234BEFFFF56B91C3087 +S2191051361A3880FF5C010AE81C301A38BFFF78FC0AE01C301712 +S21910514B3880FF7201D0EA1958905A0BE9EAE9990D5FE2D6E98E +S219105160F6E9D105EAE9B9055FE2D6E9AAE91D301A3880FF220C +S219105175010AD81D301A38BFFF3EFC0AE81D30173880FF380150 +S21910518AD0DA345EFFFF4BC919D9EAD9990D5FEAD6D9F6D9D1BA +S21910519F05EAD9B9055FEAD6D9AAD91C50D0521D511BC80AE814 +S2191051B4DDEEFFFF18E0DCE6FFFF18D090D21D301C380AB89013 +S2191051C9BA80FFF4001D301A380AA080FFEA000AE817301C3850 +S2191051DE80FFE00017301A380AE080FFD6001458905ACBE9DC8A +S2191051F3E9FCE9C905405E0100CB511D68906ACA6940661000D3 +S2191052082C6648562C5F01001450CA56FFFF5D59D05ACA59F942 +S21910521D69EB05DA0D23571D00EA59930D0B50B851B669EB51EE +S219105232EB5F0000AB690A5823672100E061A2251E0803F00EB8 +S219105247651BC8ADC90E55AB61EA61EB570000AAC919500C5D3E +S21910525CF5678000EB57C0000C510955F5CF80000BCD01F0235F +S219105271571100235F1500236721006C5701006C5F050023575B +S2191052862500235F2900031E1C00BF071CF5541A63FF090063DE +S21910529B3F050063370100BFFF18FB233F05000A3080FF120007 +S2191052B023370100865123FF09004C1A7F0006682086FF0F5020 +S2191052C569077850790D50EF508C32067050710E58EF588C3A0A +S2191052DA076050618C3A5039ED388C32EC685031CD59CC5ACB74 +S2151052EF510E58EC58EF30CB39C639D83AC7517F00D3 +S2191053002F6465762F68616C64696167002F6465762F7474791E +S2191053156469616700082008000D0A002F6465762F68616C645C +S21910532A6961670025730A0068616C646961675F7365745F634F +S21910533F6F6E6669670053707572696F757320496E7465727233 +S219105354757074212121202D20766563746F723A2025642C2044 +S219105369646174613A2025780A00526567730A00522532643A9D +S21910537E200030782530387820000A005043203D2025782C2015 +S219105393505357203D2025780A00303132333435363738396164 +S2191053A8626364656600503031004F4B0045303100453033004E +S2191053BD45303200423031003031323334353637383961626349 +S2191053D2646566003031323334353637383941424344454600E0 +S2191053E730313233343536373839414243444546003C426164B7 +S2191053FC20666F726D617420737472696E673A2000203A003E35 +S2191054110A003C6E756C6C3E003C4E6F74206120737472696EF4 +S219105426673A203078003E00253038583A200025303258002077 +S21910543B20002000207C002563007C0A0000010202030303034C +S219105450040404040404040405050505050505050505050505D1 +S219105465050505060606060606060606060606060606060606A2 +S21910547A06060606060606060606060606060707070707070783 +S21910548F07070707070707070707070707070707070707070760 +S2191054A40707070707070707070707070707070707070707074B +S2191054B907070707070707070707070707070708080808080830 +S2191054CE0808080808080808080808080808080808080808080C +S2191054E3080808080808080808080808080808080808080808F7 +S2191054F8080808080808080808080808080808080808080808E2 +S21910550D080808080808080808080808080808080808080808CC +S219105522080808080808080808080808080808080808080808B7 +S219105537080808080808080808080808080808080800010202BD +S21910554C030303030404040404040404050505050505050505DC +S219105561050505050505050606060606060606060606060606A9 +S2191055760606060606060606060606060606060606060707078A +S21910558B07070707070707070707070707070707070707070763 +S2191055A00707070707070707070707070707070707070707074E +S2191055B507070707070707070707070707070707070707080837 +S2191055CA0808080808080808080808080808080808080808080F +S2191055DF080808080808080808080808080808080808080808FA +S2191055F4080808080808080808080808080808080808080808E5 +S219105609080808080808080808080808080808080808080808CF +S21910561E080808080808080808080808080808080808080808BA +S219105633080808080808080808080808080808080808080808A5 +S208105648FFFF00004B +S21910564C00000000000000000000000000000000000000000034 +S2191056610000000000000000000000000000000000000000001F +S2191056760000000000000000000000000000000000000000000A +S21910568B000000000000000000000000000000000000000000F5 +S2191056A0000000000000000000000000000000000000000000E0 +S2191056B5000000000000000000000000000000000000000000CB +S2191056CA000000000000000000000000000000000000000000B6 +S2191056DF000000000000000000000000000000000000000000A1 +S2191056F40000000000000000000000000000000000000000008C +S21910570900000000000000000000000000000000000000000076 +S21910571E00000000000000000000000000000000000000000061 +S2191057330000000000000000000000000000000000000000004C +S21910574800000000000000000000000000000000000000000037 +S21910575D00000000000000000000000000000000000000000022 +S2191057720000000000000000000000000000000000000000000D +S219105787000000000000000000000000000000000000000000F8 +S21910579C000000000000000000000000000000000000000000E3 +S2191057B1000000000000000000000000000000000000000000CE +S2191057C6000000000000000000000000000000000000000000B9 +S2191057DB000000000000000000000000000000000000000000A4 +S2191057F00000000000000000000000000000000000000000008F +S21910580500000000000000000000000000000000000000000079 +S21910581A00000000000000000000000000000000000000000064 +S21910582F0000000000000000000000000000000000000000004F +S2191058440000000000000000000000000000000000000000003A +S21910585900000000000000000000000000000000000000000025 +S21910586E00000000000000000000000000000000000000000010 +S219105883000000000000000000000000000000000000000000FB +S219105898000000000000000000000000000000000000000000E6 +S2191058AD000000000000000000000000000000000000000000D1 +S2191058C2000000000000000000000000000000000000000000BC +S2191058D7000000000000000000000000000000000000000000A7 +S2191058EC00000000000000000000000000000000000000000092 +S2191059010000000000000000000000000000000000000000007C +S21910591600000000000000000000000000000000000000000067 +S21910592B00000000000000000000000000000000000000000052 +S2191059400000000000000000000000000000000000000000003D +S21910595500000000000000000000000000000000000000000028 +S21910596A00000000000000000000000000000000000000000013 +S21910597F00000000000000000000000000300510003005100074 +S21910599430051000300510003005100030051000300510003060 +S2191059A9051000C2051000C2051000C2051000C2051000C2059C +S2191059BE1000C2051000C2051000C2051000C2051000C205107C +S2191059D300C2051000C2051000C2051000C2051000C205100077 +S2191059E8C2051000C2051000C2051000C2051000C2051000C2A0 +S2191059FD051000C2051000C2051000C2051000C2051000C20548 +S219105A121000C2051000C2051000C2051000C2051000C2051027 +S219105A2700C2051000C2051000C2051000C2051000C205100022 +S219105A3CC2051000C2051000C2051000C2051000C2051000C24B +S219105A51051000C2051000C20510000000000000000000000068 +S219105A6600000000000000000000000000000000000000000016 +S219105A7B00000000000000000000000000000000000000000001 +S219105A90000000000000000000000000000000000000000000EC +S219105AA5000000000000000000000000000000000000000000D7 +S219105ABA000000000000000000000000000000000000000000C2 +S219105ACF000000000000000000000000000000000000000000AD +S219105AE400000000000000000000000000000000000000000098 +S219105AF900000000000000000000000000000000000000000083 +S219105B0E0000000000000000000000000000000000000000006D +S219105B2300000000000000000000000000000000000000000058 +S219105B3800000000000000000000000000000000000000000043 +S219105B4D0000000000000000000000000000000000000000002E +S219105B6200000000000000000000000000000000000000000019 +S219105B7700000000000000000000000000000000000000000004 +S219105B8C000000000000000000000000000000000000000000EF +S219105BA1000000000000000000000000000000000000000000DA +S219105BB6000000000000000000000000000000000000000000C5 +S219105BCB000000000000000000000000000000000000000000B0 +S219105BE00000000000000000000000000000000000000000009B +S219105BF500000000000000000000000000000000000000000086 +S219105C0A00000000000000000000000000000000000000000070 +S219105C1F0000000000000000000000000000000000000000005B +S219105C3400000000000000000000000000000000000000000046 +S219105C4900000000000000000000000000000000000000000031 +S219105C5E0000000000000000000000000000000000000000001C +S219105C7300000000000000000000000000000000000000000007 +S219105C88000000000000000000000000000000000000000000F2 +S219105C9D000000000000000000000000000000000000000000DD +S219105CB2000000000000000000000000000000000000000000C8 +S219105CC7000000000000000000000000000000000000000000B3 +S219105CDC0000000000000000000000000000000000000000009E +S219105CF100000000000000000000000000000000000000000089 +S219105D0600000000000000000000000000000000000000000073 +S219105D1B0000000000000000000000000000000000000000005E +S219105D3000000000000000000000000000000000000000000049 +S219105D4500000000000000000000000000000000000000000034 +S219105D5A0000000000000000000000000000000000000000001F +S219105D6F0000000000000000000000000000000000000000000A +S219105D84000000000000000000000000000000000000000000F5 +S219105D99000000000000000000000000000000000000000000E0 +S219105DAE000000000000000000000000000000000000000000CB +S219105DC3000000000000000000000000000000000000000000B6 +S219105DD8000000000000000000000000000000000000000000A1 +S219105DED0000000000000000000000000000000000000000008C +S219105E0200000000000000000000000000000000000000000076 +S219105E1700000000000000000000000000000000000000000061 +S219105E2C0000000000000000000000000000000000000000004C +S219105E4100000000000000000000000000000000000000000037 +S219105E5600000000000000000000000000000000000000000022 +S219105E6B0000000000000000000000000000000000000000000D +S219105E80000000000000000000000000000000000000000000F8 +S219105E95000000000000000000000000000000000000000000E3 +S219105EAA000000000000000000000000000000000000000000CE +S219105EBF000000000000000000000000000000000000000000B9 +S219105ED4000000000000000000000000000000000000000000A4 +S219105EE90000000000000000000000000000000000000000008F +S219105EFE0000000000000000000000000000000000000000007A +S219105F1300000000000000000000000000000000000000000064 +S219105F280000000000000000000000000000000000000000004F +S219105F3D0000000000000000000000000000000000000000003A +S219105F5200000000000000000000000000000000000000000025 +S219105F6700000000000000000000000000000000000000000010 +S219105F7C00000000000000000000000000000000683A100068E1 +S219105F913A1000683A1000683A1000683A1000683A1000683A32 +S219105FA61000683A1000683A1000683A1000683A1000683A1047 +S219105FBB00683A1000683A1000683A1000683A1000683A100042 +S219105FD0683A1000683A1000683A1000683A1000683A100068C5 +S219105FE53A1000683A1000683A1000683A1000683A1000683ADE +S219105FFA1000683A1000683A1000683A1000683A1000683A10F3 +S21910600F00683A1000683A1000683A1000683A1000683A1000ED +S219106024683A1000683A1000683A1000683A1000683A10006870 +S2191060393A1000000000000000000000000000000000000000F3 +S21910604E00000000000000000000000000000000000000000028 +S21910606300000000000000000000000000000000000000000013 +S219106078000000000000000000000000000000000000000000FE +S21910608D000000000000000000000000000000000000000000E9 +S2191060A2000000000000000000000000000000000000000000D4 +S2191060B7000000000000000000000000000000000000000000BF +S2191060CC000000000000000000000000000000000000000000AA +S2191060E100000000000000000000000000000000000000000095 +S2191060F600000000000000000000000000000000000000000080 +S21910610B0000000000000000000000000000000000000000006A +S21910612000000000000000000000000000000000000000000055 +S21910613500000000000000000000000000000000000000000040 +S21910614A0000000000000000000000000000000000000000002B +S21910615F00000000000000000000000000000000000000000016 +S21910617400000000000000000000000000000000000000000001 +S219106189000000000000000000000000000000000000000000EC +S21910619E000000000000000000000000000000000000000000D7 +S2191061B3000000000000000000000000000000000000000000C2 +S2191061C800000000F20610001C081000D6411000DC4110000617 +S2191061DD0910000A091000280B10007A061000440B1000F80B27 +S2191061F21000780C1000280D1000D6411000DC411000440E10E4 +S21910620700580E10009C0E1000EE0E1000020F10001E0F1000D3 +S21910621C0000000000000000C40BFC009C0BFC00580EFC001276 +S2191062310000000100000000000000080000000000000000003A +S2191062460000000000000000000000000000000000000000002E +S21910625B00000000000000000000000000000000000000000019 +S21910627000000000000000000000000000000000000000000004 +S219106285000000000000000000000000000000000000000000EF +S21910629A000000000000000000000000000000F1FFFF02F1FFF9 +S2191062AFFF04F1FFFF06F1FFFF08F1FFFF0AF1FFFF0CF1FFFFF3 +S2191062C40EF1FFFF00000000000000000000000000000000189B +S2191062D9F1FFFF1AF1FFFF1CF1FFFF1EF1FFFF20F1FFFF22F169 +S2191062EEFFFF24F1FFFF26F1FFFF28F1FFFF2AF1FFFF2CF1FF14 +S219106303FF2EF1FFFF30F1FFFF32F1FFFF34F1FFFF36F1FFFFCC +S21910631838F1FFFF3AF1FFFF3CF1FFFF3EF1FFFF40F1FFFF4242 +S21910632DF1FFFF44F1FFFF46F1FFFF48F1FFFF4AF1FFFF4CF142 +S219106342FFFF4EF1FFFF50F1FFFF52F1FFFF54F1FFFF56F1FFED +S219106357FF803000000000000000000000000000523F065B4F2C +S21910636C666D7D077F6700000048000000777C395E797100000E +S219106381000000000000000000000000000000000000000000F2 +S219106396000000000000000000000000000000000000000000DD +S2191063AB0000000000000000000000010065436F732047444250 +S2191063C0207374756273202D206275696C74204A616E20323218 +S2191063D52032303031202F2031383A34333A333600000000009F +S2191063EA000022211000562110000000000000000000000000AF +S2191063FF00FFFFFFFF0000000000000000722B100000000000CB +S21910641400000000DC25FC000000000000000000000000000061 +S21910642900000000000000FEFFFFFFFEFFFFFF00000000000053 +S21910643E0000E803000000000000000000000D53100000531076 +S21910645300A80BFC00560C1000680C10004C0EFC000010000014 +S219106468000000002153100000000000800BFC00DC0E10000005 +S21910647D000000D80BFC000010000000000000640610005840F4 +S2061064921000E3 +S804100000EB diff --git a/packages/hal/v85x/ceb_v850/current/include/hal_diag.h b/packages/hal/v85x/ceb_v850/current/include/hal_diag.h --- a/packages/hal/v85x/ceb_v850/current/include/hal_diag.h +++ b/packages/hal/v85x/ceb_v850/current/include/hal_diag.h @@ -26,7 +26,7 @@ // // The Initial Developer of the Original Code is Red Hat. // Portions created by Red Hat are -// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. // All Rights Reserved. // ------------------------------------------- // @@ -35,8 +35,8 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): nickg -// Contributors: nickg, gthomas -// Date: 1998-03-02 +// Contributors: nickg, gthomas,jlarmour +// Date: 2001-03-21 // Purpose: HAL Support for Kernel Diagnostic Routines // Description: Diagnostic routines for use during kernel development. // Usage: #include @@ -45,32 +45,14 @@ // //===========================================================================*/ -#include - -#include - /*---------------------------------------------------------------------------*/ -#if defined(CYGSEM_HAL_VIRTUAL_VECTOR_DIAG) - #include #define HAL_DIAG_INIT() hal_if_diag_init() #define HAL_DIAG_WRITE_CHAR(_c_) hal_if_diag_write_char(_c_) #define HAL_DIAG_READ_CHAR(_c_) hal_if_diag_read_char(&_c_) -#else - -externC void hal_diag_init(void); -externC void hal_diag_write_char(char c); -externC void hal_diag_read_char(char *c); - -#define HAL_DIAG_INIT() hal_diag_init() -#define HAL_DIAG_WRITE_CHAR(_c_) hal_diag_write_char(_c_) -#define HAL_DIAG_READ_CHAR(_c_) hal_diag_read_char(&_c_) - -#endif - /*---------------------------------------------------------------------------*/ /* end of hal_diag.h */ #endif /* CYGONCE_HAL_HAL_DIAG_H */ diff --git a/packages/hal/v85x/ceb_v850/current/include/hal_platform_setup.h b/packages/hal/v85x/ceb_v850/current/include/hal_platform_setup.h --- a/packages/hal/v85x/ceb_v850/current/include/hal_platform_setup.h +++ b/packages/hal/v85x/ceb_v850/current/include/hal_platform_setup.h @@ -26,7 +26,7 @@ // // The Initial Developer of the Original Code is Red Hat. // Portions created by Red Hat are -// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. // All Rights Reserved. // ------------------------------------------- // @@ -35,7 +35,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): gthomas -// Contributors: gthomas +// Contributors: gthomas, jlarmour // Date: 2000-03-10 // Purpose: NEC CEB/V850 platform specific support routines // Description: @@ -56,59 +56,99 @@ .endm .macro PLATFORM_SETUP1 -#ifdef CYG_HAL_STARTUP_ROM +#if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_ROMRAM) movhi hi(V850_REGS),r0,r6 + // set bus control signals mov 0x01,r1 st.b r1,lo(V850_REG_SYC)[r6] - // Internal RAM, I/O - 1 wait state - // Externam ROM - 3 wait states + // Internal RAM, internal ROM and I/O - no wait states, regardless + // of the setting of DWC +#if CYGHWR_HAL_V85X_CPU_FREQ > 17000000 + // External ROM - 3 wait states + // External RAM - 3 wait states + movea 0xFFFF,r0,r1 +#elif CYGHWR_HAL_V85X_CPU_FREQ > 8000000 + // External ROM - 2 wait states + // External RAM - 1 wait states movea 0x7FFE,r0,r1 +#elif CYGHWR_HAL_V85X_CPU_FREQ > 4194304 + // External ROM - 1 wait states + // External RAM - 0 wait states + movea 0x3FFD,r0,r1 +#else + +#endif st.h r1,lo(V850_REG_DWC)[r6] - // Internal RAM, I/O - 0 idle - // Externam ROM - 0 idle + // Internal RAM, ROM, I/O - always 0 idle regardless of the setting + // of BCC + // External RAM - 0 idle + // External ROM - 0 idle movea 0x2AA8,r0,r1 st.h r1,lo(V850_REG_BCC)[r6] + // No INTs on rising edge mov 0x00,r1 st.b r1,lo(V850_REG_EGP0)[r6] + // enable INTP0 (serial) IRQ only, set for falling edge mov 0x01,r1 st.b r1,lo(V850_REG_EGN0)[r6] + // Port 1 mode: set serial DSR, RXD and CTS as inputs, and others + // as outputs movea 0x2C,r0,r1 st.b r1,lo(V850_REG_PM1)[r6] + // Port 3 mode: SW2 read port: set to all input movea 0xFF,r0,r1 st.b r1,lo(V850_REG_PM3)[r6] + // Set serial port control inputs (DSR, RXD, CTS) to 1 + // FIXME Why? Also I don't get why the top two bits are set. movea 0xEC,r0,r1 st.b r1,lo(V850_REG_P1)[r6] + // Enable all outputs for 7-segment LED mov 0x00,r1 st.b r1,lo(V850_REG_PM10)[r6] + // Set LED to 0 mov 0x00,r1 st.b r1,lo(V850_REG_P10)[r6] + // Init serial port 0 baud rate to divide clock down to 9600 baud + // by setting baud count here + // This may seem unnecessary, but setting up the serial allows + // us to do diag output before HAL diag is initialized. The values + // are clock dependent however, but this is only for debug so we + // don't care. movea 0xDD,r0,r1 st.b r1,lo(V850_REG_BRGC0)[r6] + // and divisor here mov 0x03,r1 - st.b r1,lo(V850_REG_BRGM0)[r6] + st.b r1,lo(V850_REG_BRGMC00)[r6] + // set serial 0 to enable tx/rx and 8-N-1 movea 0xC8,r0,r1 st.b r1,lo(V850_REG_ASIM0)[r6] + // disable reception of serial interrupts, and set serial interrupt + // priority to level 7 (lowest) movea 0x47,r0,r1 st.b r1,lo(V850_REG_STIC0)[r6] + // Memory expansion mode - set to 4MB + // We could probably set this to 256K (MM==0x4), but there seems + // no advantage mov 0x07,r1 st.b r1,lo(V850_REG_MM)[r6] - // Setting the PCC register is tricky + // Setting the PCC register is tricky - it is a "specific register" + // We set the CPU clock to full speed stsr PSW,r7 ori CYGARC_PSW_NP,r7,r8 ldsr r8,PSW diff --git a/packages/hal/v85x/ceb_v850/current/include/pkgconf/mlt_v85x_v850_ceb_flash.h b/packages/hal/v85x/ceb_v850/current/include/pkgconf/mlt_v85x_v850_ceb_flash.h new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/ceb_v850/current/include/pkgconf/mlt_v85x_v850_ceb_flash.h @@ -0,0 +1,20 @@ +// eCos memory layout - Fri Jan 26 09:43:36 2001 + +// This is a generated file - do not edit + +#ifndef __ASSEMBLER__ +#include +#include + +#endif +#define CYGMEM_REGION_rom (0) +#define CYGMEM_REGION_rom_SIZE (0x80000) +#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R) +#define CYGMEM_REGION_ram (0xfc0000) +#define CYGMEM_REGION_ram_SIZE (0x3f000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__heap1) []; +#endif +#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1)) +#define CYGMEM_SECTION_heap1_SIZE (0xfff000 - (size_t) CYG_LABEL_NAME (__heap1)) diff --git a/packages/hal/v85x/ceb_v850/current/include/pkgconf/mlt_v85x_v850_ceb_flash.ldi b/packages/hal/v85x/ceb_v850/current/include/pkgconf/mlt_v85x_v850_ceb_flash.ldi new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/ceb_v850/current/include/pkgconf/mlt_v85x_v850_ceb_flash.ldi @@ -0,0 +1,28 @@ +// eCos memory layout - Fri Jan 26 09:43:36 2001 + +// This is a generated file - do not edit + +#include + +MEMORY +{ + rom : ORIGIN = 0, LENGTH = 0x80000 + ram : ORIGIN = 0xfc0000, LENGTH = 0x3f000 +} + +SECTIONS +{ + SECTIONS_BEGIN + SECTION_rom_vectors (rom, 0, LMA_EQ_VMA) + SECTION_text (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fini (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_rodata (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_rodata1 (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fixup (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_gcc_except_table (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_ram_vectors (ram, 0xfc0000, FOLLOWING (.gcc_except_table)) + SECTION_data (ram, ALIGN (0x4), FOLLOWING (.ram_vectors)) + SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA) + CYG_LABEL_DEFN(__heap1) = ALIGN (0x8); + SECTIONS_END +} diff --git a/packages/hal/v85x/ceb_v850/current/include/pkgconf/mlt_v85x_v850_ceb_flash.mlt b/packages/hal/v85x/ceb_v850/current/include/pkgconf/mlt_v85x_v850_ceb_flash.mlt new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/ceb_v850/current/include/pkgconf/mlt_v85x_v850_ceb_flash.mlt @@ -0,0 +1,14 @@ +version 0 +region rom 0 80000 1 ! +region ram fc0000 3f000 0 ! +section rom_vectors 0 1 0 1 1 1 1 1 0 0 text text ! +section text 0 4 0 1 0 1 0 1 fini fini ! +section fini 0 4 0 1 0 1 0 1 rodata rodata ! +section rodata 0 4 0 1 0 1 0 1 rodata1 rodata1 ! +section rodata1 0 4 0 1 0 1 0 1 fixup fixup ! +section fixup 0 4 0 1 0 1 0 1 gcc_except_table gcc_except_table ! +section gcc_except_table 0 4 0 1 0 0 0 1 ram_vectors ! +section ram_vectors 0 1 1 1 1 1 0 1 fc0000 data data ! +section data 0 4 1 1 0 1 0 0 bss ! +section bss 0 4 0 1 0 1 0 1 heap1 heap1 ! +section heap1 0 8 0 0 0 0 0 0 ! diff --git a/packages/hal/v85x/ceb_v850/current/include/pkgconf/mlt_v85x_v850_ceb_flashromram.h b/packages/hal/v85x/ceb_v850/current/include/pkgconf/mlt_v85x_v850_ceb_flashromram.h new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/ceb_v850/current/include/pkgconf/mlt_v85x_v850_ceb_flashromram.h @@ -0,0 +1,20 @@ +// eCos memory layout - Fri Jan 26 09:09:49 2001 + +// This is a generated file - do not edit + +#ifndef __ASSEMBLER__ +#include +#include + +#endif +#define CYGMEM_REGION_rom (0) +#define CYGMEM_REGION_rom_SIZE (0x80000) +#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R) +#define CYGMEM_REGION_ram (0xfc0000) +#define CYGMEM_REGION_ram_SIZE (0x3f000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__heap1) []; +#endif +#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1)) +#define CYGMEM_SECTION_heap1_SIZE (0xfff000 - (size_t) CYG_LABEL_NAME (__heap1)) diff --git a/packages/hal/v85x/ceb_v850/current/include/pkgconf/mlt_v85x_v850_ceb_flashromram.ldi b/packages/hal/v85x/ceb_v850/current/include/pkgconf/mlt_v85x_v850_ceb_flashromram.ldi new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/ceb_v850/current/include/pkgconf/mlt_v85x_v850_ceb_flashromram.ldi @@ -0,0 +1,28 @@ +// eCos memory layout - Fri Jan 26 09:09:49 2001 + +// This is a generated file - do not edit + +#include + +MEMORY +{ + rom : ORIGIN = 0, LENGTH = 0x80000 + ram : ORIGIN = 0xfc0000, LENGTH = 0x3f000 +} + +SECTIONS +{ + SECTIONS_BEGIN + SECTION_rom_vectors (ram, 0xfc0000, AT (0)) + SECTION_ram_vectors (ram, ALIGN (0x4), FOLLOWING (.rom_vectors)) + SECTION_text (ram, ALIGN (0x4), FOLLOWING (.ram_vectors)) + SECTION_fini (ram, ALIGN (0x4), FOLLOWING (.text)) + SECTION_rodata (ram, ALIGN (0x4), FOLLOWING (.fini)) + SECTION_rodata1 (ram, ALIGN (0x4), FOLLOWING (.rodata)) + SECTION_fixup (ram, ALIGN (0x4), FOLLOWING (.rodata1)) + SECTION_gcc_except_table (ram, ALIGN (0x4), FOLLOWING (.fixup)) + SECTION_data (ram, ALIGN (0x4), FOLLOWING (.gcc_except_table)) + SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA) + CYG_LABEL_DEFN(__heap1) = ALIGN (0x8); + SECTIONS_END +} diff --git a/packages/hal/v85x/ceb_v850/current/include/pkgconf/mlt_v85x_v850_ceb_flashromram.mlt b/packages/hal/v85x/ceb_v850/current/include/pkgconf/mlt_v85x_v850_ceb_flashromram.mlt new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/ceb_v850/current/include/pkgconf/mlt_v85x_v850_ceb_flashromram.mlt @@ -0,0 +1,14 @@ +version 0 +region rom 0 80000 1 ! +region ram fc0000 3f000 0 ! +section rom_vectors 0 1 1 1 1 1 1 1 fc0000 0 ram_vectors ram_vectors ! +section ram_vectors 0 4 1 1 0 1 0 1 text text ! +section text 0 4 1 1 0 1 0 1 fini fini ! +section fini 0 4 1 1 0 1 0 1 rodata rodata ! +section rodata 0 4 1 1 0 1 0 1 rodata1 rodata1 ! +section rodata1 0 4 1 1 0 1 0 1 fixup fixup ! +section fixup 0 4 1 1 0 1 0 1 gcc_except_table gcc_except_table ! +section gcc_except_table 0 4 1 1 0 1 0 1 data data ! +section data 0 4 1 1 0 1 0 0 bss ! +section bss 0 4 0 1 0 1 0 1 heap1 heap1 ! +section heap1 0 8 0 0 0 0 0 0 ! diff --git a/packages/hal/v85x/ceb_v850/current/include/pkgconf/mlt_v85x_v850_ceb_ram.h b/packages/hal/v85x/ceb_v850/current/include/pkgconf/mlt_v85x_v850_ceb_ram.h --- a/packages/hal/v85x/ceb_v850/current/include/pkgconf/mlt_v85x_v850_ceb_ram.h +++ b/packages/hal/v85x/ceb_v850/current/include/pkgconf/mlt_v85x_v850_ceb_ram.h @@ -1,4 +1,4 @@ -// eCos memory layout - Fri Oct 20 08:31:56 2000 +// eCos memory layout - Fri Jan 26 09:07:19 2001 // This is a generated file - do not edit @@ -8,7 +8,7 @@ #endif #define CYGMEM_REGION_ram (0xfc0000) -#define CYGMEM_REGION_ram_SIZE (0x40000) +#define CYGMEM_REGION_ram_SIZE (0x3f000) #define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) #ifndef __ASSEMBLER__ extern char CYG_LABEL_NAME (__reserved) []; @@ -19,4 +19,4 @@ extern char CYG_LABEL_NAME (__reserved) extern char CYG_LABEL_NAME (__heap1) []; #endif #define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1)) -#define CYGMEM_SECTION_heap1_SIZE (0x1000000 - (size_t) CYG_LABEL_NAME (__heap1)) +#define CYGMEM_SECTION_heap1_SIZE (0xfff000 - (size_t) CYG_LABEL_NAME (__heap1)) diff --git a/packages/hal/v85x/ceb_v850/current/include/pkgconf/mlt_v85x_v850_ceb_ram.ldi b/packages/hal/v85x/ceb_v850/current/include/pkgconf/mlt_v85x_v850_ceb_ram.ldi --- a/packages/hal/v85x/ceb_v850/current/include/pkgconf/mlt_v85x_v850_ceb_ram.ldi +++ b/packages/hal/v85x/ceb_v850/current/include/pkgconf/mlt_v85x_v850_ceb_ram.ldi @@ -1,4 +1,4 @@ -// eCos memory layout - Fri Oct 20 08:31:56 2000 +// eCos memory layout - Fri Jan 26 09:07:19 2001 // This is a generated file - do not edit @@ -6,7 +6,7 @@ MEMORY { - ram : ORIGIN = 0xfc0000, LENGTH = 0x40000 + ram : ORIGIN = 0xfc0000, LENGTH = 0x3f000 } SECTIONS diff --git a/packages/hal/v85x/ceb_v850/current/include/pkgconf/mlt_v85x_v850_ceb_ram.mlt b/packages/hal/v85x/ceb_v850/current/include/pkgconf/mlt_v85x_v850_ceb_ram.mlt --- a/packages/hal/v85x/ceb_v850/current/include/pkgconf/mlt_v85x_v850_ceb_ram.mlt +++ b/packages/hal/v85x/ceb_v850/current/include/pkgconf/mlt_v85x_v850_ceb_ram.mlt @@ -1,5 +1,5 @@ version 0 -region ram fc0000 40000 0 ! +region ram fc0000 3f000 0 ! section reserved 4000 1 0 0 1 1 1 1 fc0000 fc0000 text text ! section text 0 4 0 1 0 1 0 1 fini fini ! section fini 0 4 0 1 0 1 0 1 rodata rodata ! diff --git a/packages/hal/v85x/ceb_v850/current/include/pkgconf/mlt_v85x_v850_ceb_rom.h b/packages/hal/v85x/ceb_v850/current/include/pkgconf/mlt_v85x_v850_ceb_rom.h --- a/packages/hal/v85x/ceb_v850/current/include/pkgconf/mlt_v85x_v850_ceb_rom.h +++ b/packages/hal/v85x/ceb_v850/current/include/pkgconf/mlt_v85x_v850_ceb_rom.h @@ -1,4 +1,4 @@ -// eCos memory layout - Fri Oct 20 08:32:23 2000 +// eCos memory layout - Fri Jan 26 09:44:26 2001 // This is a generated file - do not edit @@ -11,10 +11,10 @@ #define CYGMEM_REGION_rom_SIZE (0x80000) #define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R) #define CYGMEM_REGION_ram (0xfc0000) -#define CYGMEM_REGION_ram_SIZE (0x40000) +#define CYGMEM_REGION_ram_SIZE (0x3f000) #define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) #ifndef __ASSEMBLER__ extern char CYG_LABEL_NAME (__heap1) []; #endif #define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1)) -#define CYGMEM_SECTION_heap1_SIZE (0x1000000 - (size_t) CYG_LABEL_NAME (__heap1)) +#define CYGMEM_SECTION_heap1_SIZE (0xfff000 - (size_t) CYG_LABEL_NAME (__heap1)) diff --git a/packages/hal/v85x/ceb_v850/current/include/pkgconf/mlt_v85x_v850_ceb_rom.ldi b/packages/hal/v85x/ceb_v850/current/include/pkgconf/mlt_v85x_v850_ceb_rom.ldi --- a/packages/hal/v85x/ceb_v850/current/include/pkgconf/mlt_v85x_v850_ceb_rom.ldi +++ b/packages/hal/v85x/ceb_v850/current/include/pkgconf/mlt_v85x_v850_ceb_rom.ldi @@ -1,4 +1,4 @@ -// eCos memory layout - Fri Oct 20 08:32:23 2000 +// eCos memory layout - Fri Jan 26 09:44:26 2001 // This is a generated file - do not edit @@ -7,7 +7,7 @@ MEMORY { rom : ORIGIN = 0x100000, LENGTH = 0x80000 - ram : ORIGIN = 0xfc0000, LENGTH = 0x40000 + ram : ORIGIN = 0xfc0000, LENGTH = 0x3f000 } SECTIONS @@ -20,7 +20,8 @@ SECTIONS SECTION_rodata1 (rom, ALIGN (0x4), LMA_EQ_VMA) SECTION_fixup (rom, ALIGN (0x4), LMA_EQ_VMA) SECTION_gcc_except_table (rom, ALIGN (0x4), LMA_EQ_VMA) - SECTION_data (ram, 0xfc0000, FOLLOWING (.gcc_except_table)) + SECTION_ram_vectors (ram, 0xfc0000, FOLLOWING (.gcc_except_table)) + SECTION_data (ram, ALIGN (0x4), FOLLOWING (.ram_vectors)) SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA) CYG_LABEL_DEFN(__heap1) = ALIGN (0x8); SECTIONS_END diff --git a/packages/hal/v85x/ceb_v850/current/include/pkgconf/mlt_v85x_v850_ceb_rom.mlt b/packages/hal/v85x/ceb_v850/current/include/pkgconf/mlt_v85x_v850_ceb_rom.mlt --- a/packages/hal/v85x/ceb_v850/current/include/pkgconf/mlt_v85x_v850_ceb_rom.mlt +++ b/packages/hal/v85x/ceb_v850/current/include/pkgconf/mlt_v85x_v850_ceb_rom.mlt @@ -1,13 +1,14 @@ version 0 region rom 100000 80000 1 ! -region ram fc0000 40000 0 ! +region ram fc0000 3f000 0 ! section rom_vectors 0 1 0 1 1 1 1 1 100000 100000 text text ! section text 0 4 0 1 0 1 0 1 fini fini ! section fini 0 4 0 1 0 1 0 1 rodata rodata ! section rodata 0 4 0 1 0 1 0 1 rodata1 rodata1 ! section rodata1 0 4 0 1 0 1 0 1 fixup fixup ! section fixup 0 4 0 1 0 1 0 1 gcc_except_table gcc_except_table ! -section gcc_except_table 0 4 0 1 0 0 0 1 data ! -section data 0 4 1 1 1 1 0 0 fc0000 bss ! +section gcc_except_table 0 4 0 1 0 0 0 1 ram_vectors ! +section ram_vectors 0 1 1 1 1 1 0 1 fc0000 data data ! +section data 0 4 1 1 0 1 0 0 bss ! section bss 0 4 0 1 0 1 0 1 heap1 heap1 ! section heap1 0 8 0 0 0 0 0 0 ! diff --git a/packages/hal/v85x/ceb_v850/current/include/pkgconf/mlt_v85x_v850_ceb_romram.h b/packages/hal/v85x/ceb_v850/current/include/pkgconf/mlt_v85x_v850_ceb_romram.h new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/ceb_v850/current/include/pkgconf/mlt_v85x_v850_ceb_romram.h @@ -0,0 +1,20 @@ +// eCos memory layout - Tue Jan 23 18:50:05 2001 + +// This is a generated file - do not edit + +#ifndef __ASSEMBLER__ +#include +#include + +#endif +#define CYGMEM_REGION_rom (0x100000) +#define CYGMEM_REGION_rom_SIZE (0x80000) +#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R) +#define CYGMEM_REGION_ram (0xfc0000) +#define CYGMEM_REGION_ram_SIZE (0x3f000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__heap1) []; +#endif +#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1)) +#define CYGMEM_SECTION_heap1_SIZE (0xfff000 - (size_t) CYG_LABEL_NAME (__heap1)) diff --git a/packages/hal/v85x/ceb_v850/current/include/pkgconf/mlt_v85x_v850_ceb_romram.ldi b/packages/hal/v85x/ceb_v850/current/include/pkgconf/mlt_v85x_v850_ceb_romram.ldi new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/ceb_v850/current/include/pkgconf/mlt_v85x_v850_ceb_romram.ldi @@ -0,0 +1,28 @@ +// eCos memory layout - Tue Jan 23 18:50:05 2001 + +// This is a generated file - do not edit + +#include + +MEMORY +{ + rom : ORIGIN = 0x100000, LENGTH = 0x80000 + ram : ORIGIN = 0xfc0000, LENGTH = 0x3f000 +} + +SECTIONS +{ + SECTIONS_BEGIN + SECTION_rom_vectors (ram, 0xfc0000, AT (0x100000)) + SECTION_ram_vectors (ram, ALIGN (0x4), FOLLOWING (.rom_vectors)) + SECTION_text (ram, ALIGN (0x4), FOLLOWING (.ram_vectors)) + SECTION_fini (ram, ALIGN (0x4), FOLLOWING (.text)) + SECTION_rodata (ram, ALIGN (0x4), FOLLOWING (.fini)) + SECTION_rodata1 (ram, ALIGN (0x4), FOLLOWING (.rodata)) + SECTION_fixup (ram, ALIGN (0x4), FOLLOWING (.rodata1)) + SECTION_gcc_except_table (ram, ALIGN (0x4), FOLLOWING (.fixup)) + SECTION_data (ram, ALIGN (0x4), FOLLOWING (.gcc_except_table)) + SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA) + CYG_LABEL_DEFN(__heap1) = ALIGN (0x8); + SECTIONS_END +} diff --git a/packages/hal/v85x/ceb_v850/current/include/pkgconf/mlt_v85x_v850_ceb_romram.mlt b/packages/hal/v85x/ceb_v850/current/include/pkgconf/mlt_v85x_v850_ceb_romram.mlt new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/ceb_v850/current/include/pkgconf/mlt_v85x_v850_ceb_romram.mlt @@ -0,0 +1,14 @@ +version 0 +region rom 100000 80000 1 ! +region ram fc0000 3f000 0 ! +section rom_vectors 0 1 1 1 1 1 1 1 fc0000 100000 ram_vectors ram_vectors ! +section ram_vectors 0 4 1 1 0 1 0 1 text text ! +section text 0 4 1 1 0 1 0 1 fini fini ! +section fini 0 4 1 1 0 1 0 1 rodata rodata ! +section rodata 0 4 1 1 0 1 0 1 rodata1 rodata1 ! +section rodata1 0 4 1 1 0 1 0 1 fixup fixup ! +section fixup 0 4 1 1 0 1 0 1 gcc_except_table gcc_except_table ! +section gcc_except_table 0 4 1 1 0 1 0 1 data data ! +section data 0 4 1 1 0 1 0 0 bss ! +section bss 0 4 0 1 0 1 0 1 heap1 heap1 ! +section heap1 0 8 0 0 0 0 0 0 ! diff --git a/packages/hal/v85x/ceb_v850/current/include/plf_cache.h b/packages/hal/v85x/ceb_v850/current/include/plf_cache.h --- a/packages/hal/v85x/ceb_v850/current/include/plf_cache.h +++ b/packages/hal/v85x/ceb_v850/current/include/plf_cache.h @@ -26,7 +26,7 @@ // // The Initial Developer of the Original Code is Red Hat. // Portions created by Red Hat are -// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. // All Rights Reserved. // ------------------------------------------- // @@ -34,36 +34,22 @@ //============================================================================= //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg -// Date: 1998-02-17 -// Purpose: Cache control API -// Description: The macros defined here provide the HAL APIs for handling -// cache control operations. +// Author(s): nickg +// Contributors: nickg,jlarmour +// Date: 2001-03-21 +// Purpose: Cache control API +// Description: The macros defined here provide the HAL APIs for handling +// cache control operations. // Usage: -// #include -// ... +// #include +// ... // // //####DESCRIPTIONEND#### // //============================================================================= -#include -#include - -//============================================================================= - -// No caches defined on this platform -#define HAL_ICACHE_ENABLE() -#define HAL_ICACHE_DISABLE() -#define HAL_ICACHE_SYNC() -#define HAL_ICACHE_INVALIDATE_ALL() - -#define HAL_DCACHE_ENABLE() -#define HAL_DCACHE_DISABLE() -#define HAL_DCACHE_SYNC() -#define HAL_DCACHE_INVALIDATE_ALL() +// Nothing to do here //----------------------------------------------------------------------------- #endif // ifndef CYGONCE_PLF_CACHE_H diff --git a/packages/hal/v85x/ceb_v850/current/include/plf_intr.h b/packages/hal/v85x/ceb_v850/current/include/plf_intr.h --- a/packages/hal/v85x/ceb_v850/current/include/plf_intr.h +++ b/packages/hal/v85x/ceb_v850/current/include/plf_intr.h @@ -26,7 +26,7 @@ // // The Initial Developer of the Original Code is Red Hat. // Portions created by Red Hat are -// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. // All Rights Reserved. // ------------------------------------------- // @@ -34,13 +34,13 @@ //========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg, jskov, -// gthomas, jlarmour -// Date: 1999-02-16 +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 2001-03-21 // Purpose: Define Interrupt support // Description: The macros defined here provide the HAL APIs for handling -// interrupts and the clock for the VRC4373 board. +// interrupts and the clock for platforms of the NEC V85x +// architecture. // // Usage: // #include @@ -51,102 +51,7 @@ // //========================================================================== -#include - -#include - -//-------------------------------------------------------------------------- -// NEC (70F3017) vectors. - -// These are the exception codes presented in the Cause register and -// correspond to VSRs. These values are the ones to use for HAL_VSR_GET/SET - -#define CYGNUM_HAL_VECTOR_RESET 0x00 -#define CYGNUM_HAL_VECTOR_NMI 0x01 -#define CYGNUM_HAL_VECTOR_WATCHDOG_TIMER 0x02 -#define CYGNUM_HAL_VECTOR_TRAP0 0x04 -#define CYGNUM_HAL_VECTOR_TRAP1 0x05 -#define CYGNUM_HAL_VECTOR_ILLEGAL_OPCODE 0x06 -#define CYGNUM_HAL_VECTOR_WATCHDOG_TIMER_M 0x08 -#define CYGNUM_HAL_VECTOR_INTP0 0x09 -#define CYGNUM_HAL_VECTOR_INTP1 0x0A -#define CYGNUM_HAL_VECTOR_INTP2 0x0B -#define CYGNUM_HAL_VECTOR_INTP3 0x0C -#define CYGNUM_HAL_VECTOR_INTP4 0x0D -#define CYGNUM_HAL_VECTOR_INTP5 0x0E -#define CYGNUM_HAL_VECTOR_INTP6 0x0F -#define CYGNUM_HAL_VECTOR_INTWTI 0x10 -#define CYGNUM_HAL_VECTOR_INTTM00 0x11 -#define CYGNUM_HAL_VECTOR_INTTM01 0x12 -#define CYGNUM_HAL_VECTOR_INTTM10 0x13 -#define CYGNUM_HAL_VECTOR_INTTM11 0x14 -#define CYGNUM_HAL_VECTOR_INTTM2 0x15 -#define CYGNUM_HAL_VECTOR_INTTM3 0x16 -#define CYGNUM_HAL_VECTOR_INTTM4 0x17 -#define CYGNUM_HAL_VECTOR_INTTM5 0x18 -#define CYGNUM_HAL_VECTOR_INTCSI0 0x19 -#define CYGNUM_HAL_VECTOR_INTSER0 0x1A -#define CYGNUM_HAL_VECTOR_INTCSI1 0x1B -#define CYGNUM_HAL_VECTOR_INTST0 0x1C -#define CYGNUM_HAL_VECTOR_INTCSI2 0x1D -#define CYGNUM_HAL_VECTOR_INTSER1 0x1E -#define CYGNUM_HAL_VECTOR_INTSR1 0x1F -#define CYGNUM_HAL_VECTOR_INTST1 0x20 -#define CYGNUM_HAL_VECTOR_INTAD 0x21 -#define CYGNUM_HAL_VECTOR_INTDMA0 0x22 -#define CYGNUM_HAL_VECTOR_INTDMA1 0x23 -#define CYGNUM_HAL_VECTOR_INTDMA2 0x24 -#define CYGNUM_HAL_VECTOR_INTWT 0x25 - -#define CYGNUM_HAL_VSR_MIN 0 -#define CYGNUM_HAL_VSR_MAX 0x25 -#define CYGNUM_HAL_VSR_COUNT 0x26 - -// Min/Max exception numbers and how many there are -#define CYGNUM_HAL_EXCEPTION_MIN 0 -#define CYGNUM_HAL_EXCEPTION_MAX 7 -#define CYGNUM_HAL_EXCEPTION_COUNT ((CYGNUM_HAL_EXCEPTION_MAX-CYGNUM_HAL_EXCEPTION_MIN)+1) - -// Min/Max ISR numbers and how many there are -#define CYGNUM_HAL_ISR_MIN 0x08 -#define CYGNUM_HAL_ISR_MAX 0x25 -#define CYGNUM_HAL_ISR_COUNT ((CYGNUM_HAL_ISR_MAX-CYGNUM_HAL_ISR_MIN)+1) - -// The vector used by the Real time clock. -#define CYGNUM_HAL_INTERRUPT_RTC CYGNUM_HAL_VECTOR_INTTM10 - -// Mapping from interrupt numbers to hardware registers -#define CYG_HAL_V85X_INTERRUPT_CONTROL_REGISTERS \ - (volatile unsigned char *)V850_REG_WDTIC, \ - (volatile unsigned char *)V850_REG_PIC0, \ - (volatile unsigned char *)V850_REG_PIC1, \ - (volatile unsigned char *)V850_REG_PIC2, \ - (volatile unsigned char *)V850_REG_PIC3, \ - (volatile unsigned char *)V850_REG_PIC4, \ - (volatile unsigned char *)V850_REG_PIC5, \ - (volatile unsigned char *)V850_REG_PIC6, \ - (volatile unsigned char *)V850_REG_WTIIC, \ - (volatile unsigned char *)V850_REG_TMIC00, \ - (volatile unsigned char *)V850_REG_TMIC01, \ - (volatile unsigned char *)V850_REG_TMIC10, \ - (volatile unsigned char *)V850_REG_TMIC11, \ - (volatile unsigned char *)V850_REG_TMIC2, \ - (volatile unsigned char *)V850_REG_TMIC3, \ - (volatile unsigned char *)V850_REG_TMIC4, \ - (volatile unsigned char *)V850_REG_TMIC5, \ - (volatile unsigned char *)V850_REG_CSIC0, \ - (volatile unsigned char *)V850_REG_SERIC0, \ - (volatile unsigned char *)V850_REG_SRIC0, \ - (volatile unsigned char *)V850_REG_STIC0, \ - (volatile unsigned char *)V850_REG_CSIC2, \ - (volatile unsigned char *)V850_REG_SERIC1, \ - (volatile unsigned char *)V850_REG_SRIC1, \ - (volatile unsigned char *)V850_REG_STIC1, \ - (volatile unsigned char *)V850_REG_ADIC, \ - (volatile unsigned char *)V850_REG_DMAIC0, \ - (volatile unsigned char *)V850_REG_DMAIC1, \ - (volatile unsigned char *)V850_REG_DMAIC2, \ - (volatile unsigned char *)V850_REG_WTIC +// Nothing to do here. Handled by default variant code. //-------------------------------------------------------------------------- #endif // ifndef CYGONCE_HAL_PLF_INTR_H diff --git a/packages/hal/v85x/ceb_v850/current/include/plf_io.h b/packages/hal/v85x/ceb_v850/current/include/plf_io.h --- a/packages/hal/v85x/ceb_v850/current/include/plf_io.h +++ b/packages/hal/v85x/ceb_v850/current/include/plf_io.h @@ -26,7 +26,7 @@ // // The Initial Developer of the Original Code is Red Hat. // Portions created by Red Hat are -// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. // All Rights Reserved. // ------------------------------------------- // @@ -34,177 +34,20 @@ //============================================================================= //#####DESCRIPTIONBEGIN#### // -// Author(s): hmt, jskov, nickg -// Contributors: hmt, jskov, nickg -// Date: 1999-08-09 -// Purpose: VRC4373 PCI IO support macros +// Author(s): jlarmour +// Contributors: +// Date: 2001-01-12 +// Purpose: NEC platform specific IO support, e.g. for PCI support // Description: -// Usage: #include +// Usage: #include // -// Note: Based on information in -// "VRC4373 System Controller Data Sheet" //####DESCRIPTIONEND#### // //============================================================================= -#include - -#include // IO macros -#include // Interrupt vectors - -//----------------------------------------------------------------------------- -// PCI access registers - -#define HAL_PCI_ADDRESS_WINDOW_1 0xAF000014 -#define HAL_PCI_ADDRESS_WINDOW_2 0xAF000018 -#define HAL_PCI_IO_WINDOW 0xAF000024 -#define HAL_PCI_CONFIG_SPACE_DATA 0xAF000028 -#define HAL_PCI_CONFIG_SPACE_ADDR 0xAF00002C -#define HAL_PCI_ENABLE_REG 0xAF000074 - -//----------------------------------------------------------------------------- -// Mappings for PCI memory and IO spaces - -// This is where the PCI spaces are mapped in the CPU's (virtual) -// address space. -#define HAL_PCI_PHYSICAL_MEMORY_BASE 0xC0000000 -#define HAL_PCI_PHYSICAL_IO_BASE 0xAC000000 - //----------------------------------------------------------------------------- -// Initialize the PCI bus. -// This has actually already been done by the HAL. -#define HAL_PCI_INIT() - -// Compute address necessary to access PCI config space for the given -// bus and device. -#define HAL_PCI_CONFIG_ADDRESS( __bus, __devfn, __offset ) \ - ({ \ - cyg_uint32 __addr; \ - cyg_uint32 __dev = CYG_PCI_DEV_GET_DEV(__devfn); \ - if (0 == __bus) { \ - __addr = (1 << (__dev+16)); \ - } else { \ - /* We need better info about how to form type 1 addresses */ \ - __addr = 0x800000000 | (__bus << 16) | (__dev << 11); \ - } \ - __addr |= CYG_PCI_DEV_GET_FN(__devfn) << 8; \ - __addr |= (__offset)&~3; \ - __addr; \ - }) - -// The following function allows us to read locations in the PCI config -// space that we are not sure contains a valid device. Support in platform.S -// catches and fixes any bus errors caused. -externC CYG_WORD32 hal_pci_config_read(CYG_ADDRESS addr); -#define HAL_PCI_CONFIG_READ( __addr, __val ) __val = hal_pci_config_read(__addr) - -// Read a value from the PCI configuration space of the appropriate -// size at an address composed from the bus, devfn and offset. -// We can only make 32 bit accesses to the PCI config data register, hence -// all the shifing and masking in these macros. -// Note that we may only use HAL_PCI_CONFIG_READ() here. -#define HAL_PCI_CFG_READ_UINT8( __bus, __devfn, __offset, __val ) \ -CYG_MACRO_START \ - CYG_WORD32 _val_; \ - CYG_WORD32 _offset_ = __offset & 3; \ - HAL_WRITE_UINT32(HAL_PCI_CONFIG_SPACE_ADDR, \ - HAL_PCI_CONFIG_ADDRESS(__bus, __devfn, __offset)); \ - HAL_PCI_CONFIG_READ(HAL_PCI_CONFIG_SPACE_DATA, _val_); \ - __val = (CYG_BYTE)((_val_>>(_offset_*8))&0xFF); \ -CYG_MACRO_END - -#define HAL_PCI_CFG_READ_UINT16( __bus, __devfn, __offset, __val ) \ -CYG_MACRO_START \ - CYG_WORD32 _val_; \ - CYG_WORD32 _offset_ = __offset & 2; \ - HAL_WRITE_UINT32(HAL_PCI_CONFIG_SPACE_ADDR, \ - HAL_PCI_CONFIG_ADDRESS(__bus, __devfn, __offset)); \ - HAL_PCI_CONFIG_READ(HAL_PCI_CONFIG_SPACE_DATA, _val_); \ - __val = (CYG_WORD16)((_val_>>(_offset_*8))&0xFFFF); \ -CYG_MACRO_END - -#define HAL_PCI_CFG_READ_UINT32( __bus, __devfn, __offset, __val ) \ -CYG_MACRO_START \ - CYG_WORD32 _val_; \ - HAL_WRITE_UINT32(HAL_PCI_CONFIG_SPACE_ADDR, \ - HAL_PCI_CONFIG_ADDRESS(__bus, __devfn, __offset)); \ - HAL_PCI_CONFIG_READ(HAL_PCI_CONFIG_SPACE_DATA, _val_); \ - __val = (CYG_WORD32)_val_; \ -CYG_MACRO_END - -// Write a value to the PCI configuration space of the appropriate -// size at an address composed from the bus, devfn and offset. -// We can only make 32 bit accesses to the PCI config data register, hence -// all the shifing and masking in these macros. -// Note that we do not need to use HAL_PCI_CONFIG_READ() here since we -// should not be writing to config space locations that we do not already -// know are valid. -#define HAL_PCI_CFG_WRITE_UINT8( __bus, __devfn, __offset, __val ) \ -CYG_MACRO_START \ - CYG_WORD32 _val_; \ - CYG_WORD32 _offset_ = __offset & 3; \ - HAL_WRITE_UINT32(HAL_PCI_CONFIG_SPACE_ADDR, \ - HAL_PCI_CONFIG_ADDRESS(__bus, __devfn, __offset)); \ - HAL_READ_UINT32(HAL_PCI_CONFIG_SPACE_DATA, _val_); \ - _val_ &= ~(0xFF<<(_offset_*8)); \ - _val_ |= (__val)<<(_offset_*8); \ - HAL_WRITE_UINT32(HAL_PCI_CONFIG_SPACE_DATA, _val_); \ -CYG_MACRO_END - -#define HAL_PCI_CFG_WRITE_UINT16( __bus, __devfn, __offset, __val ) \ -CYG_MACRO_START \ - CYG_WORD32 _val_; \ - CYG_WORD32 _offset_ = __offset & 2; \ - HAL_WRITE_UINT32(HAL_PCI_CONFIG_SPACE_ADDR, \ - HAL_PCI_CONFIG_ADDRESS(__bus, __devfn, __offset)); \ - HAL_READ_UINT32(HAL_PCI_CONFIG_SPACE_DATA, _val_); \ - _val_ &= ~(0xFFFF<<(_offset_*8)); \ - _val_ |= (__val)<<(_offset_*8); \ - HAL_WRITE_UINT32(HAL_PCI_CONFIG_SPACE_DATA, _val_); \ -CYG_MACRO_END - -#define HAL_PCI_CFG_WRITE_UINT32( __bus, __devfn, __offset, __val ) \ -CYG_MACRO_START \ - HAL_WRITE_UINT32(HAL_PCI_CONFIG_SPACE_ADDR, \ - HAL_PCI_CONFIG_ADDRESS(__bus, __devfn, __offset)); \ - HAL_WRITE_UINT32(HAL_PCI_CONFIG_SPACE_DATA, __val); \ -CYG_MACRO_END - - -//----------------------------------------------------------------------------- -// Resources - -// Map PCI device resources starting from these addresses in PCI space. -#define HAL_PCI_ALLOC_BASE_MEMORY 0 -#define HAL_PCI_ALLOC_BASE_IO 0 - -// Translate the PCI interrupt requested by the device (INTA#, INTB#, -// INTC# or INTD#) to the associated CPU interrupt (i.e., HAL vector). -// We don't actually know what the mappings are at present for this -// board. The following is therefore just a temporary guess until -// we can find out. - -#define HAL_PCI_TRANSLATE_INTERRUPT( __bus, __devfn, __vec, __valid) \ - CYG_MACRO_START \ - cyg_uint8 __req; \ - HAL_PCI_CFG_READ_UINT8(__bus, __devfn, CYG_PCI_CFG_INT_PIN, __req); \ - if (0 != __req) { \ - CYG_ADDRWORD __translation[4] = { \ - CYGNUM_HAL_INTERRUPT_PCI_INTA, /* INTA# */ \ - CYGNUM_HAL_INTERRUPT_PCI_INTB, /* INTB# */ \ - CYGNUM_HAL_INTERRUPT_PCI_INTC, /* INTC# */ \ - CYGNUM_HAL_INTERRUPT_PCI_INTD };/* INTD# */ \ - \ - __vec = __translation[(((__req-1)+CYG_PCI_DEV_GET_DEV(__devfn))&3)]; \ - \ - __valid = true; \ - } else { \ - /* Device will not generate interrupt requests. */ \ - __valid = false; \ - } \ - CYG_MACRO_END - +// Nothing yet //----------------------------------------------------------------------------- // end of plf_io.h diff --git a/packages/hal/v85x/ceb_v850/current/include/plf_sections.h b/packages/hal/v85x/ceb_v850/current/include/plf_sections.h --- a/packages/hal/v85x/ceb_v850/current/include/plf_sections.h +++ b/packages/hal/v85x/ceb_v850/current/include/plf_sections.h @@ -23,7 +23,7 @@ // // The Initial Developer of the Original Code is Red Hat. // Portions created by Red Hat are -// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. // All Rights Reserved. // ------------------------------------------- // @@ -32,7 +32,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): gthomas -// Contributors: gthomas +// Contributors: gthomas, jlarmour // Date: 2000-05-24 // Purpose: Hardwired layout definitions // Description: Used only in linker scripts @@ -41,6 +41,24 @@ // //========================================================================== +#include + +#if CYGINT_HAL_V850_VARIANT_SA1 + #define SECTIONS_END . = ALIGN(4); _end = .; PROVIDE (end = .); \ PROVIDE(_hal_vsr_table = 0x00FC0260); \ + PROVIDE(__allow_nmi = 0x00FC02F8); \ PROVIDE(_hal_virtual_vector_table = 0x00FC0300); + +#elif CYGINT_HAL_V850_VARIANT_SB1 + +#define SECTIONS_END . = ALIGN(4); _end = .; PROVIDE (end = .); \ + PROVIDE(_hal_vsr_table = 0x00FC0340); \ + PROVIDE(__allow_nmi = 0x00FC0410); \ + PROVIDE(_hal_virtual_vector_table = 0x00FC0440); + +#else +# error No v850 variant defined +#endif + +// EOF plf_sections.h diff --git a/packages/hal/v85x/ceb_v850/current/include/v850_regs.h b/packages/hal/v85x/ceb_v850/current/include/v850_regs.h deleted file mode 100644 --- a/packages/hal/v85x/ceb_v850/current/include/v850_regs.h +++ /dev/null @@ -1,247 +0,0 @@ -#ifndef CYGONCE_V850_REGS_H -#define CYGONCE_V850_REGS_H - -/*============================================================================= -// -// v850_regs.h -// -// NEC/V850 platform register definitions -// -//============================================================================= -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Red Hat eCos Public License -// Version 1.1 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://www.redhat.com/ -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Configurable Operating System, -// released September 30, 1998. -// -// The Initial Developer of the Original Code is Red Hat. -// Portions created by Red Hat are -// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. -// All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//============================================================================= -//#####DESCRIPTIONBEGIN#### -// -// Author(s): gthomas -// Contributors: gthomas -// Date: 2000-03-10 -// Purpose: NEC/V850 CPU family hardware description -// Description: -// Usage: #include -// -//####DESCRIPTIONEND#### -// -//===========================================================================*/ - -// These definitions are for the SA1 (70F3017) - -#define V850_REGS 0xFFFFF000 - -#define V850_REG_P0 0xFFFFF000 -#define V850_REG_P1 0xFFFFF002 -#define V850_REG_P2 0xFFFFF004 -#define V850_REG_P3 0xFFFFF006 -#define V850_REG_P4 0xFFFFF008 -#define V850_REG_P5 0xFFFFF00A -#define V850_REG_P6 0xFFFFF00C -#define V850_REG_P7 0xFFFFF00E -#define V850_REG_P8 0xFFFFF010 -#define V850_REG_P9 0xFFFFF012 -#define V850_REG_P10 0xFFFFF014 -#define V850_REG_P11 0xFFFFF016 -#define V850_REG_P12 0xFFFFF018 - -#define V850_REG_PM0 0xFFFFF020 -#define V850_REG_PM1 0xFFFFF022 -#define V850_REG_PM2 0xFFFFF024 -#define V850_REG_PM3 0xFFFFF026 -#define V850_REG_PM4 0xFFFFF028 -#define V850_REG_PM5 0xFFFFF02A -#define V850_REG_PM6 0xFFFFF02C -#define V850_REG_PM7 0xFFFFF02E -#define V850_REG_PM8 0xFFFFF030 -#define V850_REG_PM9 0xFFFFF032 -#define V850_REG_PM10 0xFFFFF034 -#define V850_REG_PM11 0xFFFFF036 -#define V850_REG_PM12 0xFFFFF038 - -#define V850_REG_MM 0xFFFFF04C - -#define V850_REG_PMC12 0xFFFFF058 - -#define V850_REG_DWC 0xFFFFF060 -#define V850_REG_BCC 0xFFFFF062 -#define V850_REG_SYC 0xFFFFF064 -#define V850_REG_MAM 0xFFFFF068 - -#define V850_REG_PSC 0xFFFFF070 -#define V850_REG_PCC 0xFFFFF074 -#define V850_REG_SYS 0xFFFFF078 - -#define V850_REG_PU0 0xFFFFF080 -#define V850_REG_PU1 0xFFFFF082 -#define V850_REG_PU2 0xFFFFF084 -#define V850_REG_PU3 0xFFFFF086 -#define V850_REG_PU10 0xFFFFF094 -#define V850_REG_PU11 0xFFFFF096 - -#define V850_REG_PF1 0xFFFFF0A2 -#define V850_REG_PF2 0xFFFFF0A4 -#define V850_REG_PF10 0xFFFFF0B4 - -#define V850_REG_EGP0 0xFFFFF0C0 -#define V850_REG_EGN0 0xFFFFF0C2 - -#define V850_REG_WDTIC 0xFFFFF100 -#define V850_REG_PIC0 0xFFFFF102 -#define V850_REG_PIC1 0xFFFFF104 -#define V850_REG_PIC2 0xFFFFF106 -#define V850_REG_PIC3 0xFFFFF108 -#define V850_REG_PIC4 0xFFFFF10A -#define V850_REG_PIC5 0xFFFFF10C -#define V850_REG_PIC6 0xFFFFF10E -#define V850_REG_WTIIC 0xFFFFF110 -#define V850_REG_TMIC00 0xFFFFF112 -#define V850_REG_TMIC01 0xFFFFF114 -#define V850_REG_TMIC10 0xFFFFF116 -#define V850_REG_TMIC11 0xFFFFF118 -#define V850_REG_TMIC2 0xFFFFF11A -#define V850_REG_TMIC3 0xFFFFF11C -#define V850_REG_TMIC4 0xFFFFF11E -#define V850_REG_TMIC5 0xFFFFF120 -#define V850_REG_CSIC0 0xFFFFF122 -#define V850_REG_SERIC0 0xFFFFF124 -#define V850_REG_CSIC1 0xFFFFF126 // Is this correct? -#define V850_REG_SRIC0 0xFFFFF126 -#define V850_REG_STIC0 0xFFFFF128 -#define V850_REG_CSIC2 0xFFFFF12A -#define V850_REG_SERIC1 0xFFFFF12C -#define V850_REG_SRIC1 0xFFFFF12E -#define V850_REG_STIC1 0xFFFFF130 -#define V850_REG_ADIC 0xFFFFF132 -#define V850_REG_DMAIC0 0xFFFFF134 -#define V850_REG_DMAIC1 0xFFFFF136 -#define V850_REG_DMAIC2 0xFFFFF138 -#define V850_REG_WTIC 0xFFFFF13A - -#define V850_REG_ISPR 0xFFFFF166 -#define V850_REG_PRCMD 0xFFFFF170 - -#define V850_REG_DIOA0 0xFFFFF180 -#define V850_REG_DRA0 0xFFFFF182 -#define V850_REG_DBC0 0xFFFFF184 -#define V850_REG_DCHC0 0xFFFFF186 - -#define V850_REG_DIOA1 0xFFFFF190 -#define V850_REG_DRA1 0xFFFFF192 -#define V850_REG_DBC1 0xFFFFF194 -#define V850_REG_DCHC1 0xFFFFF196 - -#define V850_REG_DIOA2 0xFFFFF1A0 -#define V850_REG_DRA2 0xFFFFF1A2 -#define V850_REG_DBC2 0xFFFFF1A4 -#define V850_REG_DCHC2 0xFFFFF1A6 - -#define V850_REG_TM0 0xFFFFF200 -#define V850_REG_CR00 0xFFFFF202 -#define V850_REG_CR01 0xFFFFF204 -#define V850_REG_PRM0 0xFFFFF206 -#define V850_REG_TMC0 0xFFFFF208 -#define V850_REG_CRC0 0xFFFFF20A -#define V850_REG_TOC0 0xFFFFF20C - -#define V850_REG_TM1 0xFFFFF210 -#define V850_REG_CR10 0xFFFFF212 -#define V850_REG_CR11 0xFFFFF214 -#define V850_REG_PRM1 0xFFFFF216 -#define V850_REG_TMC1 0xFFFFF218 -#define V850_REG_CRC1 0xFFFFF21A -#define V850_REG_TOC1 0xFFFFF21C - -#define V850_REG_TM2 0xFFFFF240 -#define V850_REG_CR20 0xFFFFF242 -#define V850_REG_TCL2 0xFFFFF244 -#define V850_REG_TMC2 0xFFFFF246 -#define V850_REG_TM23 0xFFFFF24A -#define V850_REG_CR23 0xFFFFF24C - -#define V850_REG_TM3 0xFFFFF250 -#define V850_REG_CR30 0xFFFFF252 -#define V850_REG_TCL3 0xFFFFF254 -#define V850_REG_TMC3 0xFFFFF256 - -#define V850_REG_TM4 0xFFFFF260 -#define V850_REG_CR40 0xFFFFF262 -#define V850_REG_TCL4 0xFFFFF264 -#define V850_REG_TMC4 0xFFFFF266 -#define V850_REG_TM45 0xFFFFF26A -#define V850_REG_CR45 0xFFFFF26C - -#define V850_REG_TM5 0xFFFFF270 -#define V850_REG_CR50 0xFFFFF272 -#define V850_REG_TCL5 0xFFFFF274 -#define V850_REG_TMC5 0xFFFFF276 - -#define V850_REG_SIO0 0xFFFFF2A0 -#define V850_REG_CSIM0 0xFFFFF2A2 -#define V850_REG_CSIS0 0xFFFFF2A4 - -#define V850_REG_SIO1 0xFFFFF2B0 -#define V850_REG_CSIM1 0xFFFFF2B2 -#define V850_REG_CSIS1 0xFFFFF2B4 - -#define V850_REG_SIO2 0xFFFFF2C0 -#define V850_REG_CSIM2 0xFFFFF2C2 -#define V850_REG_CSIS2 0xFFFFF2C4 - -#define V850_REG_ASIM0 0xFFFFF300 -#define V850_REG_ASIS0 0xFFFFF302 -#define V850_REG_BRGC0 0xFFFFF304 -#define V850_REG_TXS0 0xFFFFF306 -#define V850_REG_RXS0 0xFFFFF308 -#define V850_REG_BRGM0 0xFFFFF30E -#define V850_REG_BRGX0 0xFFFFF320 - -#define V850_REG_ASIM1 0xFFFFF310 -#define V850_REG_ASIS1 0xFFFFF312 -#define V850_REG_BRGC1 0xFFFFF314 -#define V850_REG_TXS1 0xFFFFF316 -#define V850_REG_RXS1 0xFFFFF318 -#define V850_REG_BRGM1 0xFFFFF31E - -#define V850_REG_IICC0 0xFFFFF340 -#define V850_REG_IICS0 0xFFFFF342 -#define V850_REG_IICCL0 0xFFFFF344 -#define V850_REG_SVA0 0xFFFFF346 -#define V850_REG_IIC0 0xFFFFF348 - -#define V850_REG_WTM 0xFFFFF360 -#define V850_REG_OSTS 0xFFFFF380 -#define V850_REG_WDCS 0xFFFFF382 -#define V850_REG_WDTM 0xFFFFF384 - -#define V850_REG_RTBL 0xFFFFF3A0 -#define V850_REG_RTBH 0xFFFFF3A2 -#define V850_REG_RTPM 0xFFFFF3A4 -#define V850_REG_RTPC 0xFFFFF3A6 - -#define V850_REG_ADM 0xFFFFF3C0 -#define V850_REG_ADS 0xFFFFF3C2 -#define V850_REG_ADCR 0xFFFFF3C4 -#define V850_REG_ADCRH 0xFFFFF3C6 - -/*---------------------------------------------------------------------------*/ -/* end of v850_regs.h */ -#endif /* CYGONCE_V850_REGS_H */ diff --git a/packages/hal/v85x/ceb_v850/current/src/hal_diag.c b/packages/hal/v85x/ceb_v850/current/src/hal_diag.c deleted file mode 100644 --- a/packages/hal/v85x/ceb_v850/current/src/hal_diag.c +++ /dev/null @@ -1,440 +0,0 @@ -/*============================================================================= -// -// hal_diag.c -// -// HAL diagnostic output code -// -//============================================================================= -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Red Hat eCos Public License -// Version 1.1 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://www.redhat.com/ -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Configurable Operating System, -// released September 30, 1998. -// -// The Initial Developer of the Original Code is Red Hat. -// Portions created by Red Hat are -// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. -// All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//============================================================================= -//#####DESCRIPTIONBEGIN#### -// -// Author(s): nickg, gthomas -// Contributors:nickg, gthomas -// Date: 2000-05-22 -// Purpose: HAL diagnostic output -// Description: Implementations of HAL diagnostic output support. -// -//####DESCRIPTIONEND#### -// -//===========================================================================*/ - -#include -#include -#include CYGBLD_HAL_PLATFORM_H - -#include // base types -#include // tracing macros -#include // assertion macros - -#include // basic machine info -#include // interrupt macros -#include // IO macros -#include - -#include // target_register_t -#include // Calling interface definitions -#include // Helper functions -#include // CYG_ISR_HANDLED - -#include // hardware registers, etc. - - -#if (CYGHWR_HAL_V85X_V850_CEB_DIAG_BAUD == 9600) -#define BAUD_COUNT 0xDD -#define BAUD_DIVISOR 3 -#endif -#if (CYGHWR_HAL_V85X_V850_CEB_DIAG_BAUD == 19200) -#define BAUD_COUNT 0xDD -#define BAUD_DIVISOR 2 -#endif -#if (CYGHWR_HAL_V85X_V850_CEB_DIAG_BAUD == 38400) -#define BAUD_COUNT 0xDD -#define BAUD_DIVISOR 1 -#endif -#ifndef BAUD_COUNT -#error Unsupported BAUD rate -#endif - -/*---------------------------------------------------------------------------*/ -// CEB-v850 - -void -init_serial_channel(void* base) -{ - volatile unsigned char *mode = (volatile unsigned char *)V850_REG_ASIM0; - volatile unsigned char *brgc = (volatile unsigned char *)V850_REG_BRGC0; - volatile unsigned char *brgm = (volatile unsigned char *)V850_REG_BRGM0; - volatile unsigned char *rxstat = (volatile unsigned char *)V850_REG_SRIC0; - volatile unsigned char *rxerr = (volatile unsigned char *)V850_REG_SERIC0; - volatile unsigned char *txstat = (volatile unsigned char *)V850_REG_STIC0; - - *mode = 0xC8; - *brgc = BAUD_COUNT; - *brgm = BAUD_DIVISOR; - *rxstat = 0x47; - *rxerr = 0; - *txstat = 0x47; -} - -// Actually send character down the wire -void -cyg_hal_plf_serial_putc(void* __ch_data, cyg_uint8 c) -{ - volatile unsigned char *TxDATA = (volatile unsigned char *)V850_REG_TXS0; - volatile unsigned char *TxSTAT = (volatile unsigned char *)V850_REG_STIC0; - CYGARC_HAL_SAVE_GP(); - - // Send character - *TxDATA = (unsigned char)c; - // Wait for Tx not busy - while ((*TxSTAT & 0x80) == 0x00); - *TxSTAT &= ~0x80; - - CYGARC_HAL_RESTORE_GP(); -} - -static cyg_bool -cyg_hal_plf_serial_getc_nonblock(void* __ch_data, cyg_uint8* ch) -{ - volatile unsigned char *RxDATA = (volatile unsigned char *)V850_REG_RXS0; - volatile unsigned char *RxSTAT = (volatile unsigned char *)V850_REG_SRIC0; - - if ((*RxSTAT & 0x80) == 0x00) - return false; - - *ch = (char)*RxDATA; - *RxSTAT &= ~0x80; - return true; -} - -cyg_uint8 -cyg_hal_plf_serial_getc(void* __ch_data) -{ - cyg_uint8 ch; - CYGARC_HAL_SAVE_GP(); - - while(!cyg_hal_plf_serial_getc_nonblock(__ch_data, &ch)); - - CYGARC_HAL_RESTORE_GP(); - return ch; -} - -static void -cyg_hal_plf_serial_write(void* __ch_data, const cyg_uint8* __buf, - cyg_uint32 __len) -{ - CYGARC_HAL_SAVE_GP(); - - while(__len-- > 0) - cyg_hal_plf_serial_putc(__ch_data, *__buf++); - - CYGARC_HAL_RESTORE_GP(); -} - -static void -cyg_hal_plf_serial_read(void* __ch_data, cyg_uint8* __buf, cyg_uint32 __len) -{ - CYGARC_HAL_SAVE_GP(); - - while(__len-- > 0) - *__buf++ = cyg_hal_plf_serial_getc(__ch_data); - - CYGARC_HAL_RESTORE_GP(); -} - -cyg_int32 msec_timeout = 1000; - -cyg_bool -cyg_hal_plf_serial_getc_timeout(void* __ch_data, cyg_uint8* ch) -{ - int delay_count = msec_timeout * 10; // delay in .1 ms steps - cyg_bool res; - CYGARC_HAL_SAVE_GP(); - - for(;;) { - res = cyg_hal_plf_serial_getc_nonblock(__ch_data, ch); - if (res || 0 == delay_count--) - break; - - CYGACC_CALL_IF_DELAY_US(100); - } - - CYGARC_HAL_RESTORE_GP(); - return res; -} - -static int -cyg_hal_plf_serial_control(void *__ch_data, __comm_control_cmd_t __func, ...) -{ - static int irq_state = 0; - int ret = 0; - CYGARC_HAL_SAVE_GP(); - - switch (__func) { - case __COMMCTL_IRQ_ENABLE: - HAL_INTERRUPT_UNMASK(CYGNUM_HAL_VECTOR_INTCSI1); - irq_state = 1; - break; - case __COMMCTL_IRQ_DISABLE: - ret = irq_state; - irq_state = 0; - HAL_INTERRUPT_MASK(CYGNUM_HAL_VECTOR_INTCSI1); - break; - case __COMMCTL_DBG_ISR_VECTOR: - ret = CYGNUM_HAL_VECTOR_INTCSI1; - break; - case __COMMCTL_SET_TIMEOUT: - { - va_list ap; - - va_start(ap, __func); - - ret = msec_timeout; - msec_timeout = va_arg(ap, cyg_uint32); - - va_end(ap); - } - default: - break; - } - CYGARC_HAL_RESTORE_GP(); - return ret; -} - -static int -cyg_hal_plf_serial_isr(void *__ch_data, int* __ctrlc, - CYG_ADDRWORD __vector, CYG_ADDRWORD __data) -{ - volatile unsigned char *RxDATA = (volatile unsigned char *)V850_REG_RXS0; - cyg_uint8 c; - int res = 0; - CYGARC_HAL_SAVE_GP(); - - c = (char)*RxDATA; - *__ctrlc = 0; - if( cyg_hal_is_break( &c , 1 ) ) - *__ctrlc = 1; - - cyg_drv_interrupt_acknowledge(CYGNUM_HAL_VECTOR_INTCSI1); - - res = CYG_ISR_HANDLED; - - CYGARC_HAL_RESTORE_GP(); - return res; -} - -static void -cyg_hal_plf_serial_init(void) -{ - hal_virtual_comm_table_t* comm; - int cur = CYGACC_CALL_IF_SET_CONSOLE_COMM(CYGNUM_CALL_IF_SET_COMM_ID_QUERY_CURRENT); - - // Disable interrupts. - HAL_INTERRUPT_MASK(CYGNUM_HAL_VECTOR_INTCSI1); - - // Init channels - init_serial_channel((cyg_uint8*)0); - - // Setup procs in the vector table - - // Set channel 0 - CYGACC_CALL_IF_SET_CONSOLE_COMM(0); - comm = CYGACC_CALL_IF_CONSOLE_PROCS(); - CYGACC_COMM_IF_CH_DATA_SET(*comm, 0); - CYGACC_COMM_IF_WRITE_SET(*comm, cyg_hal_plf_serial_write); - CYGACC_COMM_IF_READ_SET(*comm, cyg_hal_plf_serial_read); - CYGACC_COMM_IF_PUTC_SET(*comm, cyg_hal_plf_serial_putc); - CYGACC_COMM_IF_GETC_SET(*comm, cyg_hal_plf_serial_getc); - CYGACC_COMM_IF_CONTROL_SET(*comm, cyg_hal_plf_serial_control); - CYGACC_COMM_IF_DBG_ISR_SET(*comm, cyg_hal_plf_serial_isr); - CYGACC_COMM_IF_GETC_TIMEOUT_SET(*comm, cyg_hal_plf_serial_getc_timeout); - - // Restore original console - CYGACC_CALL_IF_SET_CONSOLE_COMM(cur); -} - -void -cyg_hal_plf_comms_init(void) -{ - static int initialized = 0; - - if (initialized) - return; - - initialized = 1; - - cyg_hal_plf_serial_init(); -} - -//============================================================================= -// Compatibility with older stubs -//============================================================================= - -#ifndef CYGSEM_HAL_VIRTUAL_VECTOR_DIAG - -// Assumption: all diagnostic output must be GDB packetized unless this is a ROM (i.e. -// totally stand-alone) system. - -//#ifdef CYGSEM_HAL_ROM_MONITOR -//#define CYG_HAL_STARTUP_ROM -//#undef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS -//#endif - -#if defined(CYG_HAL_STARTUP_ROM) && !defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS) -#define HAL_DIAG_USES_HARDWARE -#else -#if !defined(CYGDBG_HAL_DIAG_TO_DEBUG_CHAN) -#define HAL_DIAG_USES_HARDWARE -#endif -#endif - -void hal_diag_init(void) -{ - init_serial_channel(0); -} - -#ifdef HAL_DIAG_USES_HARDWARE - -void hal_diag_write_char(char c) -{ - CYG_INTERRUPT_STATE old; - HAL_DISABLE_INTERRUPTS(old); - cyg_hal_plf_serial_putc(0, c); - HAL_RESTORE_INTERRUPTS(old); -} - -void hal_diag_read_char(char *c) -{ - *c = cyg_hal_plf_serial_getc(0); -} - -#else // HAL_DIAG relies on GDB - -void -hal_diag_read_char(char *c) -{ - *c = cyg_hal_plf_serial_getc(0); -} - -#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS -static void hal_diag_write_char_break(void) -{ -} -#endif - -void -hal_diag_write_char(char c) -{ - static char line[100]; - static int pos = 0; - - // No need to send CRs - if( c == '\r' ) return; - - line[pos++] = c; - - if( c == '\n' || pos == sizeof(line) ) - { - CYG_INTERRUPT_STATE old; - - // Disable interrupts. This prevents GDB trying to interrupt us - // while we are in the middle of sending a packet. The serial - // receive interrupt will be seen when we re-enable interrupts - // later. - -#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS - CYG_HAL_GDB_ENTER_CRITICAL_IO_REGION(old); -#else - HAL_DISABLE_INTERRUPTS(old); -#endif - - while(1) - { - static char hex[] = "0123456789ABCDEF"; - cyg_uint8 csum = 0; - int i; - char c1; - - cyg_hal_plf_serial_putc(0, '$'); - cyg_hal_plf_serial_putc(0, 'O'); - csum += 'O'; - for( i = 0; i < pos; i++ ) - { - char ch = line[i]; - char h = hex[(ch>>4)&0xF]; - char l = hex[ch&0xF]; - cyg_hal_plf_serial_putc(0, h); - cyg_hal_plf_serial_putc(0, l); - csum += h; - csum += l; - } - cyg_hal_plf_serial_putc(0, '#'); - cyg_hal_plf_serial_putc(0, hex[(csum>>4)&0xF]); - cyg_hal_plf_serial_putc(0, hex[csum&0xF]); - - // Wait for the ACK character '+' from GDB here and handle - // receiving a ^C instead. This is the reason for this clause - // being a loop. - c1 = cyg_hal_plf_serial_getc(0); - - if( c1 == '+' ) - break; // a good acknowledge - -#if defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS) && \ - defined(CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT) - cyg_drv_interrupt_acknowledge(CYGNUM_HAL_VECTOR_INTCSI1); - if( c1 == 3 ) { - // Ctrl-C: breakpoint. -#if 0 // FIXME - __builtin_return_address() doesn't work - cyg_hal_gdb_interrupt (__builtin_return_address(0)); -#else - cyg_hal_gdb_interrupt((CYG_ADDRWORD)hal_diag_write_char_break); -#endif - break; - } -#endif - // otherwise, loop round again - } - - pos = 0; - - // And re-enable interrupts -#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS - CYG_HAL_GDB_LEAVE_CRITICAL_IO_REGION(old); -#if 1 // FIXME - __builtin_return_address() doesn't work - hal_diag_write_char_break(); -#endif -#else - HAL_RESTORE_INTERRUPTS(old); -#endif - } -} -#endif // USE HARDWARE - -#endif // CYGSEM_HAL_VIRTUAL_VECTOR_DIAG - -/*---------------------------------------------------------------------------*/ -/* End of hal_diag.c */ diff --git a/packages/hal/v85x/ceb_v850/current/src/plf_misc.c b/packages/hal/v85x/ceb_v850/current/src/plf_misc.c --- a/packages/hal/v85x/ceb_v850/current/src/plf_misc.c +++ b/packages/hal/v85x/ceb_v850/current/src/plf_misc.c @@ -23,7 +23,7 @@ // // The Initial Developer of the Original Code is Red Hat. // Portions created by Red Hat are -// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. // All Rights Reserved. // ------------------------------------------- // @@ -32,7 +32,7 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): nickg -// Contributors: nickg, gthomas +// Contributors: nickg, gthomas, jlarmour // Date: 2000-03-10 // Purpose: HAL miscellaneous functions // Description: This file contains miscellaneous functions provided by the @@ -209,11 +209,7 @@ static unsigned char led_bits[] = { LED(0,0,0,0,0,0,0,0), // 0x7F }; -#ifdef CYG_HAL_STARTUP_ROM #define DELAY 10000 -#else -#define DELAY 100000 -#endif void show_led(int p) @@ -270,12 +266,12 @@ hal_clock_initialize(cyg_int32 period) { volatile unsigned char *tmc = (volatile unsigned char *)V850_REG_TMC1; volatile unsigned char *crc = (volatile unsigned char *)V850_REG_CRC1; - volatile unsigned char *prm = (volatile unsigned char *)V850_REG_PRM1; + volatile unsigned char *prm = (volatile unsigned char *)V850_REG_PRM10; volatile unsigned short *cmp0 = (volatile unsigned short *)V850_REG_CR10; volatile unsigned short *cmp1 = (volatile unsigned short *)V850_REG_CR11; *tmc = 0x00; // Halt timer *crc = 0x00; // Select simple compare mode - *prm = 0x01; // System clock / 4 = 4250KHz + *prm = 0x01; // System clock / 4 *cmp0 = period; *cmp1 = period; *tmc = 0x0C; // Continuous, reset mode (interval timer) @@ -298,7 +294,8 @@ cyg_uint32 hal_clock_read(void) } -extern void _hal_thread_load_context(HAL_SavedRegisters **to); +extern void _hal_thread_load_context(HAL_SavedRegisters **to) + CYGBLD_ATTRIB_NORET; extern void _hal_thread_switch_context(HAL_SavedRegisters **to, HAL_SavedRegisters **from); void hal_thread_load_context(CYG_ADDRESS to) diff --git a/packages/hal/v85x/ceb_v850/current/src/plf_stub.c b/packages/hal/v85x/ceb_v850/current/src/plf_stub.c --- a/packages/hal/v85x/ceb_v850/current/src/plf_stub.c +++ b/packages/hal/v85x/ceb_v850/current/src/plf_stub.c @@ -45,13 +45,6 @@ #ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS #include - -#include // HAL IO macros -#include // diag output. FIXME -#include - -#include - #include //----------------------------------------------------------------------------- @@ -62,7 +55,9 @@ void hal_plf_stub_init(void) // Set up watchdog timer since we have to use it to emulate a breakpoint volatile unsigned char *wdcs = (volatile unsigned char *)V850_REG_WDCS; volatile unsigned char *wdtm = (volatile unsigned char *)V850_REG_WDTM; - *wdcs = 0x07; // 246.7ms - lowest possible overhead + + *wdcs = 0x07; // lowest possible overhead - 246.7ms for 17MHz V850/SA1 + // 209.7ms for 20MHz SB1 *wdtm = 0x90; // Start watchdog } diff --git a/packages/hal/v85x/ceb_v850/current/src/v850flash.S b/packages/hal/v85x/ceb_v850/current/src/v850flash.S new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/ceb_v850/current/src/v850flash.S @@ -0,0 +1,69 @@ +/*============================================================================= +// +// v850flash.S +// +// CEB v850 flash boot code +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jlarmour +// Contributors: +// Date: 2001-03-21 +// Purpose: Loader image to program into V850 internal flash to allow +// programming of eCos ROM startup applications into the EPROM. +// Description: Compile with: +// v850-elf-gcc -o v850flash.img v850flash.S -Ttext=0 -nostartfiles +// +//####DESCRIPTIONEND#### +// +//===========================================================================*/ + + .text + .org 0 + .globl _start // dummy _start to keep linker happy +_start: + mov 7,r1 + st.b r1,0xFFFFF04C[r0] + mov 1,r1 + st.b r1,0xFFFFF064[r0] + + jr 0x0FFFF4 // jump to 0x100000 + jr 0x100000 // jump to 0x100010 + + .org 0x20 + .rept 0x3E + jr 0xFFFC0000 // jump to symmetric location in RAM + nop + nop + nop + nop + nop + nop + .endr + +// EOF v850flash.S diff --git a/packages/hal/v85x/v850/current/ChangeLog b/packages/hal/v85x/v850/current/ChangeLog --- a/packages/hal/v85x/v850/current/ChangeLog +++ b/packages/hal/v85x/v850/current/ChangeLog @@ -1,3 +1,42 @@ +2001-03-29 Jonathan Larmour + + * cdl/hal_v85x_v850.cdl: Fix typo. + +2001-03-28 Jonathan Larmour + + * src/hal_diag.c: Move here from platform HALs - on-board serial0 + is generic for V850 platforms. + + * cdl/hal_v85x_v850.cdl: Build hal_diag.c + Add interfaces indicating variant. + Add option for ICE debugging. + + * include/v850_common.h: Move register definitions here from + platform HAL and define both SA1 and SB1 variants. + Also rename some to match official docs. + + * include/var_arch.h: No need to include + + * include/var_cache.h: Provide empty default cache macros here. + + * include/var_intr.h: Move interrupt definitions here from + platform HAL and define for both SA1 and SB1 variants. + Also rename some to match official docs. + + * src/v850_misc.c: Doesn't use tracing, so don't include header. + + * src/v850_stub.c: Reflect CYGNUM_HAL_VECTOR_WATCHDOG_TIMER -> + CYGNUM_HAL_VECTOR_INTWDT renaming. + Add support for debugging via ICE and gdbserv. + + * src/v85x_v850.ld: Start at "start" not "reset_vector". + Support ram_vectors section (separated out to support ROMRAM startup). + + * src/nec.ld: Remove - redundant. + + * tests/nmitest.c: Added. Standalone test for checking if we've + received an NMI. + 2000-09-06 Gary Thomas * cdl/hal_v85x_v850.cdl: Improve [CPU] variant support. @@ -87,7 +126,7 @@ 2000-03-20 Gary Thomas " } - compile v850_stub.c v850_misc.c context.S + compile v850_stub.c v850_misc.c context.S hal_diag.c - cdl_interface CYGINT_HAL_V85X_VARIANT_SA1 { + cdl_interface CYGINT_HAL_V850_DIAG_ONCHIP_SERIAL0 { + display "Defined if platform uses standard on-chip serial0" + } + + cdl_interface CYGINT_HAL_V850_VARIANT_SA1 { display "Defined if CPU is a V850/SA1" } - cdl_interface CYGINT_HAL_V85X_VARIANT_SB1 { + cdl_interface CYGINT_HAL_V850_VARIANT_SB1 { display "Defined if CPU is a V850/SB1" } + requires 1 == CYGINT_HAL_V850_VARIANT_SA1 ^ 1 == CYGINT_HAL_V850_VARIANT_SB1 + # by virtue of the above requires: + implements CYGINT_HAL_V85X_VARIANT + + cdl_option CYGDBG_HAL_V850_ICE { + display "Support debugging via ICE" + default_value { 0 != CYGDBG_KERNEL_DEBUG_GDB_THREAD_SUPPORT } + requires CYGDBG_KERNEL_DEBUG_GDB_THREAD_SUPPORT + implements CYGINT_HAL_V85X_ICE_DEBUG + description \ + "This option enables additional support for debugging via + ICE, chiefly in the form of an interface to gdbserv which + allows it to provide eCos thread data in GDB." + } + make { /lib/target.ld: /src/v85x_v850.ld $(CC) -E -P -Wp,-MD,target.tmp -DEXTRAS=1 -xc $(INCLUDE_PATH) $(CFLAGS) -o $@ $< diff --git a/packages/hal/v85x/v850/current/include/v850_common.h b/packages/hal/v85x/v850/current/include/v850_common.h --- a/packages/hal/v85x/v850/current/include/v850_common.h +++ b/packages/hal/v85x/v850/current/include/v850_common.h @@ -26,7 +26,7 @@ // // The Initial Developer of the Original Code is Red Hat. // Portions created by Red Hat are -// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. // All Rights Reserved. // ------------------------------------------- // @@ -34,8 +34,8 @@ //============================================================================= //#####DESCRIPTIONBEGIN#### // -// Author(s): gthomas -// Contributors: gthomas +// Author(s): gthomas, jlarmour +// Contributors: gthomas, jlarmour // Date: 2000-03-10 // Purpose: NEC/V850 CPU family hardware description // Description: @@ -49,7 +49,496 @@ // to sanitise (mangle) the names. Also, care should be taken to keep this // clean for use in assembly code (no "C" constructs). -#include +#include + +// These definitions are for the NEC V850/SA1 (70301x) + +#if CYGINT_HAL_V850_VARIANT_SA1 + +#define V850_REGS 0xFFFFF000 + +#define V850_REG_P0 0xFFFFF000 +#define V850_REG_P1 0xFFFFF002 +#define V850_REG_P2 0xFFFFF004 +#define V850_REG_P3 0xFFFFF006 +#define V850_REG_P4 0xFFFFF008 +#define V850_REG_P5 0xFFFFF00A +#define V850_REG_P6 0xFFFFF00C +#define V850_REG_P7 0xFFFFF00E +#define V850_REG_P8 0xFFFFF010 +#define V850_REG_P9 0xFFFFF012 +#define V850_REG_P10 0xFFFFF014 +#define V850_REG_P11 0xFFFFF016 +#define V850_REG_P12 0xFFFFF018 + +#define V850_REG_PM0 0xFFFFF020 +#define V850_REG_PM1 0xFFFFF022 +#define V850_REG_PM2 0xFFFFF024 +#define V850_REG_PM3 0xFFFFF026 +#define V850_REG_PM4 0xFFFFF028 +#define V850_REG_PM5 0xFFFFF02A +#define V850_REG_PM6 0xFFFFF02C +#define V850_REG_PM9 0xFFFFF032 +#define V850_REG_PM10 0xFFFFF034 +#define V850_REG_PM11 0xFFFFF036 +#define V850_REG_PM12 0xFFFFF038 + +#define V850_REG_MM 0xFFFFF04C + +#define V850_REG_PMC12 0xFFFFF058 + +#define V850_REG_DWC 0xFFFFF060 +#define V850_REG_BCC 0xFFFFF062 +#define V850_REG_SYC 0xFFFFF064 +#define V850_REG_MAM 0xFFFFF068 + +#define V850_REG_PSC 0xFFFFF070 +#define V850_REG_PCC 0xFFFFF074 +#define V850_REG_SYS 0xFFFFF078 + +#define V850_REG_PU0 0xFFFFF080 +#define V850_REG_PU1 0xFFFFF082 +#define V850_REG_PU2 0xFFFFF084 +#define V850_REG_PU3 0xFFFFF086 +#define V850_REG_PU10 0xFFFFF094 +#define V850_REG_PU11 0xFFFFF096 + +#define V850_REG_PF1 0xFFFFF0A2 +#define V850_REG_PF2 0xFFFFF0A4 +#define V850_REG_PF10 0xFFFFF0B4 + +#define V850_REG_EGP0 0xFFFFF0C0 +#define V850_REG_EGN0 0xFFFFF0C2 + +#define V850_REG_WDTIC 0xFFFFF100 +#define V850_REG_PIC0 0xFFFFF102 +#define V850_REG_PIC1 0xFFFFF104 +#define V850_REG_PIC2 0xFFFFF106 +#define V850_REG_PIC3 0xFFFFF108 +#define V850_REG_PIC4 0xFFFFF10A +#define V850_REG_PIC5 0xFFFFF10C +#define V850_REG_PIC6 0xFFFFF10E +#define V850_REG_WTIIC 0xFFFFF110 +#define V850_REG_WTNIIC 0xFFFFF110 +#define V850_REG_TMIC00 0xFFFFF112 +#define V850_REG_TMIC01 0xFFFFF114 +#define V850_REG_TMIC10 0xFFFFF116 +#define V850_REG_TMIC11 0xFFFFF118 +#define V850_REG_TMIC2 0xFFFFF11A +#define V850_REG_TMIC3 0xFFFFF11C +#define V850_REG_TMIC4 0xFFFFF11E +#define V850_REG_TMIC5 0xFFFFF120 +#define V850_REG_CSIC0 0xFFFFF122 +#define V850_REG_SERIC0 0xFFFFF124 +#define V850_REG_CSIC1 0xFFFFF126 +#define V850_REG_SRIC0 0xFFFFF126 +#define V850_REG_STIC0 0xFFFFF128 +#define V850_REG_CSIC2 0xFFFFF12A +#define V850_REG_SRIC2 0xFFFFF12A +#define V850_REG_SERIC1 0xFFFFF12C +#define V850_REG_SRIC1 0xFFFFF12E +#define V850_REG_STIC1 0xFFFFF130 +#define V850_REG_ADIC 0xFFFFF132 +#define V850_REG_DMAIC0 0xFFFFF134 +#define V850_REG_DMAIC1 0xFFFFF136 +#define V850_REG_DMAIC2 0xFFFFF138 +#define V850_REG_WTIC 0xFFFFF13A +#define V850_REG_WTNIC 0xFFFFF13A + +#define V850_REG_ISPR 0xFFFFF166 +#define V850_REG_PRCMD 0xFFFFF170 + +#define V850_REG_DIOA0 0xFFFFF180 +#define V850_REG_DRA0 0xFFFFF182 +#define V850_REG_DBC0 0xFFFFF184 +#define V850_REG_DCHC0 0xFFFFF186 + +#define V850_REG_DIOA1 0xFFFFF190 +#define V850_REG_DRA1 0xFFFFF192 +#define V850_REG_DBC1 0xFFFFF194 +#define V850_REG_DCHC1 0xFFFFF196 + +#define V850_REG_DIOA2 0xFFFFF1A0 +#define V850_REG_DRA2 0xFFFFF1A2 +#define V850_REG_DBC2 0xFFFFF1A4 +#define V850_REG_DCHC2 0xFFFFF1A6 + +#define V850_REG_TM0 0xFFFFF200 +#define V850_REG_CR00 0xFFFFF202 +#define V850_REG_CR01 0xFFFFF204 +#define V850_REG_PRM0 0xFFFFF206 +#define V850_REG_PRM00 0xFFFFF206 +#define V850_REG_TMC0 0xFFFFF208 +#define V850_REG_CRC0 0xFFFFF20A +#define V850_REG_TOC0 0xFFFFF20C + +#define V850_REG_TM1 0xFFFFF210 +#define V850_REG_CR10 0xFFFFF212 +#define V850_REG_CR11 0xFFFFF214 +#define V850_REG_PRM1 0xFFFFF216 +#define V850_REG_PRM10 0xFFFFF216 +#define V850_REG_TMC1 0xFFFFF218 +#define V850_REG_CRC1 0xFFFFF21A +#define V850_REG_TOC1 0xFFFFF21C + +#define V850_REG_TM2 0xFFFFF240 +#define V850_REG_CR20 0xFFFFF242 +#define V850_REG_TCL2 0xFFFFF244 +#define V850_REG_TMC2 0xFFFFF246 +#define V850_REG_TM23 0xFFFFF24A +#define V850_REG_CR23 0xFFFFF24C + +#define V850_REG_TM3 0xFFFFF250 +#define V850_REG_CR30 0xFFFFF252 +#define V850_REG_TCL3 0xFFFFF254 +#define V850_REG_TMC3 0xFFFFF256 + +#define V850_REG_TM4 0xFFFFF260 +#define V850_REG_CR40 0xFFFFF262 +#define V850_REG_TCL4 0xFFFFF264 +#define V850_REG_TMC4 0xFFFFF266 +#define V850_REG_TM45 0xFFFFF26A +#define V850_REG_CR45 0xFFFFF26C + +#define V850_REG_TM5 0xFFFFF270 +#define V850_REG_CR50 0xFFFFF272 +#define V850_REG_TCL5 0xFFFFF274 +#define V850_REG_TMC5 0xFFFFF276 + +#define V850_REG_SIO0 0xFFFFF2A0 +#define V850_REG_CSIM0 0xFFFFF2A2 +#define V850_REG_CSIS0 0xFFFFF2A4 + +#define V850_REG_SIO1 0xFFFFF2B0 +#define V850_REG_CSIM1 0xFFFFF2B2 +#define V850_REG_CSIS1 0xFFFFF2B4 + +#define V850_REG_SIO2 0xFFFFF2C0 +#define V850_REG_CSIM2 0xFFFFF2C2 +#define V850_REG_CSIS2 0xFFFFF2C4 + +#define V850_REG_ASIM0 0xFFFFF300 +#define V850_REG_ASIS0 0xFFFFF302 +#define V850_REG_BRGC0 0xFFFFF304 +#define V850_REG_TXS0 0xFFFFF306 +#define V850_REG_RXB0 0xFFFFF308 +#define V850_REG_BRGMC0 0xFFFFF30E +#define V850_REG_BRGMC00 0xFFFFF30E + +#define V850_REG_ASIM1 0xFFFFF310 +#define V850_REG_ASIS1 0xFFFFF312 +#define V850_REG_BRGC1 0xFFFFF314 +#define V850_REG_TXS1 0xFFFFF316 +#define V850_REG_RXB1 0xFFFFF318 +#define V850_REG_BRGMC1 0xFFFFF31E +#define V850_REG_BRGMC10 0xFFFFF31E + +#define V850_REG_IICC0 0xFFFFF340 +#define V850_REG_IICS0 0xFFFFF342 +#define V850_REG_IICCL0 0xFFFFF344 +#define V850_REG_SVA0 0xFFFFF346 +#define V850_REG_IIC0 0xFFFFF348 + +#define V850_REG_WTM 0xFFFFF360 +#define V850_REG_OSTS 0xFFFFF380 +#define V850_REG_WDCS 0xFFFFF382 +#define V850_REG_WDTM 0xFFFFF384 + +#define V850_REG_RTBL 0xFFFFF3A0 +#define V850_REG_RTBH 0xFFFFF3A2 +#define V850_REG_RTPM 0xFFFFF3A4 +#define V850_REG_RTPC 0xFFFFF3A6 + +#define V850_REG_ADM 0xFFFFF3C0 +#define V850_REG_ADS 0xFFFFF3C2 +#define V850_REG_ADCR 0xFFFFF3C4 +#define V850_REG_ADCRH 0xFFFFF3C6 + +/*---------------------------------------------------------------------------*/ + +// These definitions are for the NEC V850/SB1 (70303x) + +#elif CYGINT_HAL_V850_VARIANT_SB1 + +#define V850_REGS 0xFFFFF000 + +#define V850_REG_P0 0xFFFFF000 +#define V850_REG_P1 0xFFFFF002 +#define V850_REG_P2 0xFFFFF004 +#define V850_REG_P3 0xFFFFF006 +#define V850_REG_P4 0xFFFFF008 +#define V850_REG_P5 0xFFFFF00A +#define V850_REG_P6 0xFFFFF00C +#define V850_REG_P7 0xFFFFF00E +#define V850_REG_P8 0xFFFFF010 +#define V850_REG_P9 0xFFFFF012 +#define V850_REG_P10 0xFFFFF014 +#define V850_REG_P11 0xFFFFF016 + +#define V850_REG_PM0 0xFFFFF020 +#define V850_REG_PM1 0xFFFFF022 +#define V850_REG_PM2 0xFFFFF024 +#define V850_REG_PM3 0xFFFFF026 +#define V850_REG_PM4 0xFFFFF028 +#define V850_REG_PM5 0xFFFFF02A +#define V850_REG_PM6 0xFFFFF02C +#define V850_REG_PM9 0xFFFFF032 +#define V850_REG_PM10 0xFFFFF034 +#define V850_REG_PM11 0xFFFFF036 + +#define V850_REG_PAC 0xFFFFF040 +#define V850_REG_MM 0xFFFFF04C + +#define V850_REG_DWC 0xFFFFF060 +#define V850_REG_BCC 0xFFFFF062 +#define V850_REG_SYC 0xFFFFF064 +#define V850_REG_MAM 0xFFFFF068 + +#define V850_REG_PSC 0xFFFFF070 +#define V850_REG_PCC 0xFFFFF074 +#define V850_REG_SYS 0xFFFFF078 + +#define V850_REG_PU0 0xFFFFF080 +#define V850_REG_PU1 0xFFFFF082 +#define V850_REG_PU2 0xFFFFF084 +#define V850_REG_PU3 0xFFFFF086 +#define V850_REG_PU10 0xFFFFF094 +#define V850_REG_PU11 0xFFFFF096 + +#define V850_REG_PF1 0xFFFFF0A2 +#define V850_REG_PF2 0xFFFFF0A4 +#define V850_REG_PF3 0xFFFFF0A6 +#define V850_REG_PF10 0xFFFFF0B4 + +#define V850_REG_EGP0 0xFFFFF0C0 +#define V850_REG_EGN0 0xFFFFF0C2 + +#define V850_REG_WDTIC 0xFFFFF100 +#define V850_REG_PIC0 0xFFFFF102 +#define V850_REG_PIC1 0xFFFFF104 +#define V850_REG_PIC2 0xFFFFF106 +#define V850_REG_PIC3 0xFFFFF108 +#define V850_REG_PIC4 0xFFFFF10A +#define V850_REG_PIC5 0xFFFFF10C +#define V850_REG_PIC6 0xFFFFF10E +#define V850_REG_WTNIIC 0xFFFFF118 +#define V850_REG_TMIC00 0xFFFFF11A +#define V850_REG_TMIC01 0xFFFFF11C +#define V850_REG_TMIC10 0xFFFFF11E +#define V850_REG_TMIC11 0xFFFFF120 +#define V850_REG_TMIC2 0xFFFFF122 +#define V850_REG_TMIC3 0xFFFFF124 +#define V850_REG_TMIC4 0xFFFFF126 +#define V850_REG_TMIC5 0xFFFFF128 +#define V850_REG_TMIC6 0xFFFFF12A +#define V850_REG_TMIC7 0xFFFFF12C +#define V850_REG_CSIC0 0xFFFFF12E +#define V850_REG_SERIC0 0xFFFFF130 +#define V850_REG_CSIC1 0xFFFFF132 +#define V850_REG_SRIC0 0xFFFFF132 +#define V850_REG_STIC0 0xFFFFF134 +#define V850_REG_CSIC2 0xFFFFF136 +#define V850_REG_SRIC2 0xFFFFF136 +#define V850_REG_IICIC1 0xFFFFF138 +#define V850_REG_SERIC1 0xFFFFF13A +#define V850_REG_CSIC3 0xFFFFF13C +#define V850_REG_SRIC3 0xFFFFF13C +#define V850_REG_STIC1 0xFFFFF13E +#define V850_REG_CSIC4 0xFFFFF140 +#define V850_REG_SRIC4 0xFFFFF140 +#define V850_REG_IEBIC1 0xFFFFF142 +#define V850_REG_IEBIC2 0xFFFFF144 +#define V850_REG_ADIC 0xFFFFF146 +#define V850_REG_DMAIC0 0xFFFFF148 +#define V850_REG_DMAIC1 0xFFFFF14A +#define V850_REG_DMAIC2 0xFFFFF14C +#define V850_REG_DMAIC3 0xFFFFF14E +#define V850_REG_DMAIC4 0xFFFFF150 +#define V850_REG_DMAIC5 0xFFFFF152 +#define V850_REG_WTNIC 0xFFFFF154 +#define V850_REG_KRIC 0xFFFFF156 + +#define V850_REG_ISPR 0xFFFFF166 +#define V850_REG_PRCMD 0xFFFFF170 + +#define V850_REG_DIOA0 0xFFFFF180 +#define V850_REG_DRA0 0xFFFFF182 +#define V850_REG_DBC0 0xFFFFF184 +#define V850_REG_DCHC0 0xFFFFF186 + +#define V850_REG_DIOA1 0xFFFFF190 +#define V850_REG_DRA1 0xFFFFF192 +#define V850_REG_DBC1 0xFFFFF194 +#define V850_REG_DCHC1 0xFFFFF196 + +#define V850_REG_DIOA2 0xFFFFF1A0 +#define V850_REG_DRA2 0xFFFFF1A2 +#define V850_REG_DBC2 0xFFFFF1A4 +#define V850_REG_DCHC2 0xFFFFF1A6 + +#define V850_REG_DIOA3 0xFFFFF1B0 +#define V850_REG_DRA3 0xFFFFF1B2 +#define V850_REG_DBC3 0xFFFFF1B4 +#define V850_REG_DCHC3 0xFFFFF1B6 + +#define V850_REG_DIOA4 0xFFFFF1C0 +#define V850_REG_DRA4 0xFFFFF1C2 +#define V850_REG_DBC4 0xFFFFF1C4 +#define V850_REG_DCHC4 0xFFFFF1C6 + +#define V850_REG_DIOA5 0xFFFFF1D0 +#define V850_REG_DRA5 0xFFFFF1D2 +#define V850_REG_DBC5 0xFFFFF1D4 +#define V850_REG_DCHC5 0xFFFFF1D6 + +#define V850_REG_TM0 0xFFFFF200 +#define V850_REG_CR00 0xFFFFF202 +#define V850_REG_CR01 0xFFFFF204 +#define V850_REG_PRM00 0xFFFFF206 +#define V850_REG_TMC0 0xFFFFF208 +#define V850_REG_CRC0 0xFFFFF20A +#define V850_REG_TOC0 0xFFFFF20C +#define V850_REG_PRM01 0xFFFFF20E + +#define V850_REG_TM1 0xFFFFF210 +#define V850_REG_CR10 0xFFFFF212 +#define V850_REG_CR11 0xFFFFF214 +#define V850_REG_PRM10 0xFFFFF216 +#define V850_REG_TMC1 0xFFFFF218 +#define V850_REG_CRC1 0xFFFFF21A +#define V850_REG_TOC1 0xFFFFF21C +#define V850_REG_PRM11 0xFFFFF21E + +#define V850_REG_TM2 0xFFFFF240 +#define V850_REG_CR20 0xFFFFF242 +#define V850_REG_TCL20 0xFFFFF244 +#define V850_REG_TMC2 0xFFFFF246 +#define V850_REG_TM23 0xFFFFF24A +#define V850_REG_CR23 0xFFFFF24C +#define V850_REG_TCL21 0xFFFFF24E + +#define V850_REG_TM3 0xFFFFF250 +#define V850_REG_CR30 0xFFFFF252 +#define V850_REG_TCL30 0xFFFFF254 +#define V850_REG_TMC3 0xFFFFF256 +#define V850_REG_TCL31 0xFFFFF25E + +#define V850_REG_TM4 0xFFFFF260 +#define V850_REG_CR40 0xFFFFF262 +#define V850_REG_TCL40 0xFFFFF264 +#define V850_REG_TMC4 0xFFFFF266 +#define V850_REG_TM45 0xFFFFF26A +#define V850_REG_CR45 0xFFFFF26C +#define V850_REG_TCL41 0xFFFFF26E + +#define V850_REG_TM5 0xFFFFF270 +#define V850_REG_CR50 0xFFFFF272 +#define V850_REG_TCL50 0xFFFFF274 +#define V850_REG_TMC5 0xFFFFF276 +#define V850_REG_TCL51 0xFFFFF27E + +#define V850_REG_TM6 0xFFFFF280 +#define V850_REG_CR60 0xFFFFF282 +#define V850_REG_TCL60 0xFFFFF284 +#define V850_REG_TMC6 0xFFFFF286 +#define V850_REG_TM67 0xFFFFF28A +#define V850_REG_CR67 0xFFFFF28C +#define V850_REG_TCL61 0xFFFFF28E + +#define V850_REG_TM7 0xFFFFF290 +#define V850_REG_CR70 0xFFFFF292 +#define V850_REG_TCL70 0xFFFFF294 +#define V850_REG_TMC7 0xFFFFF296 +#define V850_REG_TCL71 0xFFFFF29E + +#define V850_REG_SIO0 0xFFFFF2A0 +#define V850_REG_CSIM0 0xFFFFF2A2 +#define V850_REG_CSIS0 0xFFFFF2A4 + +#define V850_REG_SIO1 0xFFFFF2B0 +#define V850_REG_CSIM1 0xFFFFF2B2 +#define V850_REG_CSIS1 0xFFFFF2B4 + +#define V850_REG_SIO2 0xFFFFF2C0 +#define V850_REG_CSIM2 0xFFFFF2C2 +#define V850_REG_CSIS2 0xFFFFF2C4 + +#define V850_REG_SIO3 0xFFFFF2D0 +#define V850_REG_CSIM3 0xFFFFF2D2 +#define V850_REG_CSIS3 0xFFFFF2D4 + +#define V850_REG_SIO4 0xFFFFF2E0 +#define V850_REG_CSIM4 0xFFFFF2E2 +#define V850_REG_CSIB4 0xFFFFF2E4 +#define V850_REG_BRGCN4 0xFFFFF2E6 +#define V850_REG_BRGCK4 0xFFFFF2E8 + +#define V850_REG_ASIM0 0xFFFFF300 +#define V850_REG_ASIS0 0xFFFFF302 +#define V850_REG_BRGC0 0xFFFFF304 +#define V850_REG_TXS0 0xFFFFF306 +#define V850_REG_RXB0 0xFFFFF308 +#define V850_REG_BRGMC00 0xFFFFF30E + +#define V850_REG_ASIM1 0xFFFFF310 +#define V850_REG_ASIS1 0xFFFFF312 +#define V850_REG_BRGC1 0xFFFFF314 +#define V850_REG_TXS1 0xFFFFF316 +#define V850_REG_RXB1 0xFFFFF318 +#define V850_REG_BRGMC10 0xFFFFF31E +#define V850_REG_BRGMC01 0xFFFFF320 +#define V850_REG_BRGMC11 0xFFFFF322 + +#define V850_REG_IICC0 0xFFFFF340 +#define V850_REG_IICS0 0xFFFFF342 +#define V850_REG_IICCL0 0xFFFFF344 +#define V850_REG_SVA0 0xFFFFF346 +#define V850_REG_IIC0 0xFFFFF348 +#define V850_REG_IICX0 0xFFFFF34A +#define V850_REG_IICCE0 0xFFFFF34C + +#define V850_REG_IICC1 0xFFFFF350 +#define V850_REG_IICS1 0xFFFFF352 +#define V850_REG_IICCL1 0xFFFFF354 +#define V850_REG_SVA1 0xFFFFF356 +#define V850_REG_IIC1 0xFFFFF358 +#define V850_REG_IICX1 0xFFFFF35A +#define V850_REG_IICCE1 0xFFFFF35C + +#define V850_REG_WTNM 0xFFFFF360 +#define V850_REG_WTNCS 0xFFFFF364 + +#define V850_REG_CORCN 0xFFFFF36C +#define V850_REG_CORRQ 0xFFFFF36E +#define V850_REG_CORAD0 0xFFFFF370 +#define V850_REG_CORAD1 0xFFFFF374 +#define V850_REG_CORAD2 0xFFFFF378 +#define V850_REG_CORAD3 0xFFFFF37C + +#define V850_REG_OSTS 0xFFFFF380 +#define V850_REG_WDCS 0xFFFFF382 +#define V850_REG_WDTM 0xFFFFF384 +#define V850_REG_DMAS 0xFFFFF38E + +#define V850_REG_RTBL 0xFFFFF3A0 +#define V850_REG_RTBH 0xFFFFF3A2 +#define V850_REG_RTPM 0xFFFFF3A4 +#define V850_REG_RTPC 0xFFFFF3A6 + +#define V850_REG_ADM1 0xFFFFF3C0 +#define V850_REG_ADS 0xFFFFF3C2 +#define V850_REG_ADCR 0xFFFFF3C4 +#define V850_REG_ADCRH 0xFFFFF3C6 +#define V850_REG_ADM2 0xFFFFF3C8 + +#define V850_REG_KRM 0xFFFFF3D0 + +#define V850_REG_NCC 0xFFFFF3D4 + +#else // elif CYGINT_HAL_V850_VARIANT_SB1 +# error No v850 variant defined +#endif + /*---------------------------------------------------------------------------*/ /* end of v850_common.h */ diff --git a/packages/hal/v85x/v850/current/include/var_arch.h b/packages/hal/v85x/v850/current/include/var_arch.h --- a/packages/hal/v85x/v850/current/include/var_arch.h +++ b/packages/hal/v85x/v850/current/include/var_arch.h @@ -26,7 +26,7 @@ // // The Initial Developer of the Original Code is Red Hat. // Portions created by Red Hat are -// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. // All Rights Reserved. // ------------------------------------------- // @@ -46,7 +46,6 @@ // //========================================================================== -#include #include #define CYG_HAL_GDB_REG CYG_WORD32 diff --git a/packages/hal/v85x/v850/current/include/var_cache.h b/packages/hal/v85x/v850/current/include/var_cache.h --- a/packages/hal/v85x/v850/current/include/var_cache.h +++ b/packages/hal/v85x/v850/current/include/var_cache.h @@ -26,7 +26,7 @@ // // The Initial Developer of the Original Code is Red Hat. // Portions created by Red Hat are -// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. // All Rights Reserved. // ------------------------------------------- // @@ -34,25 +34,37 @@ //============================================================================= //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg -// Contributors: nickg -// Date: 1998-02-17 -// Purpose: Cache control API -// Description: The macros defined here provide the HAL APIs for handling -// cache control operations. +// Author(s): nickg +// Contributors: nickg,jlarmour +// Date: 2001-03-21 +// Purpose: Cache control API +// Description: The macros defined here provide the HAL APIs for handling +// cache control operations. // Usage: -// #include -// ... +// #include +// ... // // //####DESCRIPTIONEND#### // //============================================================================= -#include -#include +#include -#include +// No caches defined in this variant by default +#ifndef HAL_ICACHE_ENABLE +# define HAL_ICACHE_ENABLE() +# define HAL_ICACHE_DISABLE() +# define HAL_ICACHE_SYNC() +# define HAL_ICACHE_INVALIDATE_ALL() +#endif + +#ifndef HAL_DCACHE_ENABLE +# define HAL_DCACHE_ENABLE() +# define HAL_DCACHE_DISABLE() +# define HAL_DCACHE_SYNC() +# define HAL_DCACHE_INVALIDATE_ALL() +#endif //----------------------------------------------------------------------------- #endif // ifndef CYGONCE_VAR_CACHE_H diff --git a/packages/hal/v85x/v850/current/include/var_intr.h b/packages/hal/v85x/v850/current/include/var_intr.h --- a/packages/hal/v85x/v850/current/include/var_intr.h +++ b/packages/hal/v85x/v850/current/include/var_intr.h @@ -5,7 +5,7 @@ // // var_intr.h // -// VR4300 Interrupt and clock support +// NEC V850 Interrupt and clock support // //========================================================================== //####COPYRIGHTBEGIN#### @@ -26,7 +26,7 @@ // // The Initial Developer of the Original Code is Red Hat. // Portions created by Red Hat are -// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. // All Rights Reserved. // ------------------------------------------- // @@ -35,12 +35,11 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): nickg -// Contributors: nickg, jskov, -// gthomas, jlarmour -// Date: 1999-02-16 -// Purpose: VR4300 Interrupt support +// Contributors: nickg, jskov, gthomas, jlarmour +// Date: 2001-03-21 +// Purpose: NEC V850 Interrupt support // Description: The macros defined here provide the HAL APIs for handling -// interrupts and the clock for variants of the NEC VR4300 +// interrupts and the clock for variants of the NEC V85x // architecture. // // Usage: @@ -59,7 +58,200 @@ #include //-------------------------------------------------------------------------- -// Interrupt controller access. +// NEC V850/SA1 (70301x) and V850/SB1 (70303x) vectors. + +// These are the exception codes presented in the Cause register and +// correspond to VSRs. These values are the ones to use for HAL_VSR_GET/SET + +#define CYGNUM_HAL_VECTOR_RESET 0x00 +#define CYGNUM_HAL_VECTOR_NMI 0x01 +#define CYGNUM_HAL_VECTOR_INTWDT 0x02 // watchdog timer NMI +#define CYGNUM_HAL_VECTOR_TRAP00 0x04 +#define CYGNUM_HAL_VECTOR_TRAP10 0x05 +#define CYGNUM_HAL_VECTOR_ILGOP 0x06 // illegal opcode +#define CYGNUM_HAL_VECTOR_INTWDTM 0x08 // watchdog timer maskable +#define CYGNUM_HAL_VECTOR_INTP0 0x09 +#define CYGNUM_HAL_VECTOR_INTP1 0x0A +#define CYGNUM_HAL_VECTOR_INTP2 0x0B +#define CYGNUM_HAL_VECTOR_INTP3 0x0C +#define CYGNUM_HAL_VECTOR_INTP4 0x0D +#define CYGNUM_HAL_VECTOR_INTP5 0x0E +#define CYGNUM_HAL_VECTOR_INTP6 0x0F + +#if CYGINT_HAL_V850_VARIANT_SA1 +#define CYGNUM_HAL_VECTOR_INTWTNI 0x10 +#define CYGNUM_HAL_VECTOR_INTTM00 0x11 +#define CYGNUM_HAL_VECTOR_INTTM01 0x12 +#define CYGNUM_HAL_VECTOR_INTTM10 0x13 +#define CYGNUM_HAL_VECTOR_INTTM11 0x14 +#define CYGNUM_HAL_VECTOR_INTTM2 0x15 +#define CYGNUM_HAL_VECTOR_INTTM3 0x16 +#define CYGNUM_HAL_VECTOR_INTTM4 0x17 +#define CYGNUM_HAL_VECTOR_INTTM5 0x18 +#define CYGNUM_HAL_VECTOR_INTIIC0 0x19 +#define CYGNUM_HAL_VECTOR_INTCSI0 0x19 +#define CYGNUM_HAL_VECTOR_INTSER0 0x1A +#define CYGNUM_HAL_VECTOR_INTSR0 0x1B +#define CYGNUM_HAL_VECTOR_INTCSI1 0x1B +#define CYGNUM_HAL_VECTOR_INTST0 0x1C +#define CYGNUM_HAL_VECTOR_INTCSI2 0x1D +#define CYGNUM_HAL_VECTOR_INTSER1 0x1E +#define CYGNUM_HAL_VECTOR_INTSR1 0x1F +#define CYGNUM_HAL_VECTOR_INTST1 0x20 +#define CYGNUM_HAL_VECTOR_INTAD 0x21 +#define CYGNUM_HAL_VECTOR_INTDMA0 0x22 +#define CYGNUM_HAL_VECTOR_INTDMA1 0x23 +#define CYGNUM_HAL_VECTOR_INTDMA2 0x24 +#define CYGNUM_HAL_VECTOR_INTWTN 0x25 + +#define CYGNUM_HAL_VSR_MIN 0 +#define CYGNUM_HAL_VSR_MAX 0x25 +#define CYGNUM_HAL_VSR_COUNT 0x26 + +#elif CYGINT_HAL_V850_VARIANT_SB1 + +#define CYGNUM_HAL_VECTOR_INTWTNI 0x14 +#define CYGNUM_HAL_VECTOR_INTTM00 0x15 +#define CYGNUM_HAL_VECTOR_INTTM01 0x16 +#define CYGNUM_HAL_VECTOR_INTTM10 0x17 +#define CYGNUM_HAL_VECTOR_INTTM11 0x18 +#define CYGNUM_HAL_VECTOR_INTTM2 0x19 +#define CYGNUM_HAL_VECTOR_INTTM3 0x1A +#define CYGNUM_HAL_VECTOR_INTTM4 0x1B +#define CYGNUM_HAL_VECTOR_INTTM5 0x1C +#define CYGNUM_HAL_VECTOR_INTTM6 0x1D +#define CYGNUM_HAL_VECTOR_INTTM7 0x1E +#define CYGNUM_HAL_VECTOR_INTIIC0 0x1F +#define CYGNUM_HAL_VECTOR_INTCSI0 0x1F +#define CYGNUM_HAL_VECTOR_INTSER0 0x20 +#define CYGNUM_HAL_VECTOR_INTSR0 0x21 +#define CYGNUM_HAL_VECTOR_INTCSI1 0x21 +#define CYGNUM_HAL_VECTOR_INTST0 0x22 +#define CYGNUM_HAL_VECTOR_INTCSI2 0x23 +#define CYGNUM_HAL_VECTOR_INTIIC1 0x24 +#define CYGNUM_HAL_VECTOR_INTSER1 0x25 +#define CYGNUM_HAL_VECTOR_INTSR1 0x26 +#define CYGNUM_HAL_VECTOR_INTCSI3 0x26 +#define CYGNUM_HAL_VECTOR_INTST1 0x27 +#define CYGNUM_HAL_VECTOR_INTCSI4 0x28 +#ifdef __SB2 +#define CYGNUM_HAL_VECTOR_INTIE1 0x29 +#define CYGNUM_HAL_VECTOR_INTIE2 0x2A +#endif +#define CYGNUM_HAL_VECTOR_INTAD 0x2B +#define CYGNUM_HAL_VECTOR_INTDMA0 0x2C +#define CYGNUM_HAL_VECTOR_INTDMA1 0x2D +#define CYGNUM_HAL_VECTOR_INTDMA2 0x2E +#define CYGNUM_HAL_VECTOR_INTDMA3 0x2F +#define CYGNUM_HAL_VECTOR_INTDMA4 0x30 +#define CYGNUM_HAL_VECTOR_INTDMA5 0x31 +#define CYGNUM_HAL_VECTOR_INTWTN 0x32 +#define CYGNUM_HAL_VECTOR_INTKR 0x33 + + +#define CYGNUM_HAL_VSR_MIN 0 +#define CYGNUM_HAL_VSR_MAX 0x33 +#define CYGNUM_HAL_VSR_COUNT ((CYGNUM_HAL_VSR_MAX-CYGNUM_HAL_VSR_MIN)+1) + +#else +# error No v850 variant implemented! +#endif + +// Min/Max exception numbers and how many there are +#define CYGNUM_HAL_EXCEPTION_MIN 0 +#define CYGNUM_HAL_EXCEPTION_MAX 7 +#define CYGNUM_HAL_EXCEPTION_COUNT ((CYGNUM_HAL_EXCEPTION_MAX-CYGNUM_HAL_EXCEPTION_MIN)+1) + +// Min/Max ISR numbers and how many there are +#define CYGNUM_HAL_ISR_MIN 0x08 +#define CYGNUM_HAL_ISR_MAX CYGNUM_HAL_VSR_MAX +#define CYGNUM_HAL_ISR_COUNT ((CYGNUM_HAL_ISR_MAX-CYGNUM_HAL_ISR_MIN)+1) + +// The vector used by the Real time clock. +#define CYGNUM_HAL_INTERRUPT_RTC CYGNUM_HAL_VECTOR_INTTM10 + +// Mapping from interrupt numbers to hardware registers +#if CYGINT_HAL_V850_VARIANT_SA1 +#define CYG_HAL_V85X_INTERRUPT_CONTROL_REGISTERS \ + (volatile unsigned char *)V850_REG_WDTIC, \ + (volatile unsigned char *)V850_REG_PIC0, \ + (volatile unsigned char *)V850_REG_PIC1, \ + (volatile unsigned char *)V850_REG_PIC2, \ + (volatile unsigned char *)V850_REG_PIC3, \ + (volatile unsigned char *)V850_REG_PIC4, \ + (volatile unsigned char *)V850_REG_PIC5, \ + (volatile unsigned char *)V850_REG_PIC6, \ + (volatile unsigned char *)V850_REG_WTNIIC, \ + (volatile unsigned char *)V850_REG_TMIC00, \ + (volatile unsigned char *)V850_REG_TMIC01, \ + (volatile unsigned char *)V850_REG_TMIC10, \ + (volatile unsigned char *)V850_REG_TMIC11, \ + (volatile unsigned char *)V850_REG_TMIC2, \ + (volatile unsigned char *)V850_REG_TMIC3, \ + (volatile unsigned char *)V850_REG_TMIC4, \ + (volatile unsigned char *)V850_REG_TMIC5, \ + (volatile unsigned char *)V850_REG_CSIC0, \ + (volatile unsigned char *)V850_REG_SERIC0, \ + (volatile unsigned char *)V850_REG_CSIC1, \ + (volatile unsigned char *)V850_REG_STIC0, \ + (volatile unsigned char *)V850_REG_CSIC2, \ + (volatile unsigned char *)V850_REG_SERIC1, \ + (volatile unsigned char *)V850_REG_SRIC1, \ + (volatile unsigned char *)V850_REG_STIC1, \ + (volatile unsigned char *)V850_REG_ADIC, \ + (volatile unsigned char *)V850_REG_DMAIC0, \ + (volatile unsigned char *)V850_REG_DMAIC1, \ + (volatile unsigned char *)V850_REG_DMAIC2, \ + (volatile unsigned char *)V850_REG_WTNIC + +#elif CYGINT_HAL_V850_VARIANT_SB1 +#define CYG_HAL_V85X_INTERRUPT_CONTROL_REGISTERS \ + (volatile unsigned char *)V850_REG_WDTIC, \ + (volatile unsigned char *)V850_REG_PIC0, \ + (volatile unsigned char *)V850_REG_PIC1, \ + (volatile unsigned char *)V850_REG_PIC2, \ + (volatile unsigned char *)V850_REG_PIC3, \ + (volatile unsigned char *)V850_REG_PIC4, \ + (volatile unsigned char *)V850_REG_PIC5, \ + (volatile unsigned char *)V850_REG_PIC6, \ + NULL, \ + NULL, \ + NULL, \ + NULL, \ + (volatile unsigned char *)V850_REG_WTNIIC, \ + (volatile unsigned char *)V850_REG_TMIC00, \ + (volatile unsigned char *)V850_REG_TMIC01, \ + (volatile unsigned char *)V850_REG_TMIC10, \ + (volatile unsigned char *)V850_REG_TMIC11, \ + (volatile unsigned char *)V850_REG_TMIC2, \ + (volatile unsigned char *)V850_REG_TMIC3, \ + (volatile unsigned char *)V850_REG_TMIC4, \ + (volatile unsigned char *)V850_REG_TMIC5, \ + (volatile unsigned char *)V850_REG_TMIC6, \ + (volatile unsigned char *)V850_REG_TMIC7, \ + (volatile unsigned char *)V850_REG_CSIC0, \ + (volatile unsigned char *)V850_REG_SERIC0, \ + (volatile unsigned char *)V850_REG_CSIC1, \ + (volatile unsigned char *)V850_REG_STIC0, \ + (volatile unsigned char *)V850_REG_CSIC2, \ + (volatile unsigned char *)V850_REG_IICIC1, \ + (volatile unsigned char *)V850_REG_SERIC1, \ + (volatile unsigned char *)V850_REG_CSIC3, \ + (volatile unsigned char *)V850_REG_STIC1, \ + (volatile unsigned char *)V850_REG_CSIC4, \ + (volatile unsigned char *)V850_REG_IEBIC1, \ + (volatile unsigned char *)V850_REG_IEBIC2, \ + (volatile unsigned char *)V850_REG_ADIC, \ + (volatile unsigned char *)V850_REG_DMAIC0, \ + (volatile unsigned char *)V850_REG_DMAIC1, \ + (volatile unsigned char *)V850_REG_DMAIC2, \ + (volatile unsigned char *)V850_REG_DMAIC3, \ + (volatile unsigned char *)V850_REG_DMAIC4, \ + (volatile unsigned char *)V850_REG_DMAIC5, \ + (volatile unsigned char *)V850_REG_WTNIC, \ + (volatile unsigned char *)V850_REG_KRIC + +#endif // elif CYGINT_HAL_V850_VARIANT_SB1 //-------------------------------------------------------------------------- // Clock control diff --git a/packages/hal/v85x/v850/current/src/hal_diag.c b/packages/hal/v85x/v850/current/src/hal_diag.c new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/v850/current/src/hal_diag.c @@ -0,0 +1,437 @@ +/*============================================================================= +// +// hal_diag.c +// +// HAL diagnostic output code +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg, gthomas +// Contributors:nickg, gthomas, jlarmour +// Date: 2001-03-21 +// Purpose: HAL diagnostic output +// Description: Implementations of HAL diagnostic output support. +// +//####DESCRIPTIONEND#### +// +//===========================================================================*/ + +#include + +#if CYGINT_HAL_V850_DIAG_ONCHIP_SERIAL0 + +#include +#include CYGBLD_HAL_PLATFORM_H + +#include // base types +#include // assertion macros + +#include // basic machine info +#include // interrupt macros +#include // IO macros +#include + +#include // target_register_t +#include // Calling interface definitions +#include // Helper functions +#include // CYG_ISR_HANDLED + +#include // hardware registers, etc. + + +#define BAUD_COUNT ((CYGHWR_HAL_V85X_CPU_FREQ/2)/CYGHWR_HAL_V85X_V850_DIAG_BAUD) +#define BAUD_DIVISOR 1 + +/*---------------------------------------------------------------------------*/ +// V850 + +void +init_serial_channel(void* base) +{ + volatile unsigned char *mode = (volatile unsigned char *)V850_REG_ASIM0; + volatile unsigned char *brgc = (volatile unsigned char *)V850_REG_BRGC0; + volatile unsigned char *brgm0 = (volatile unsigned char *)V850_REG_BRGMC00; +#ifdef V850_REG_BRGMC01 + volatile unsigned char *brgm1 = (volatile unsigned char *)V850_REG_BRGMC01; +#endif + volatile unsigned char *rxstat = (volatile unsigned char *)V850_REG_SRIC0; + volatile unsigned char *rxerr = (volatile unsigned char *)V850_REG_SERIC0; + volatile unsigned char *txstat = (volatile unsigned char *)V850_REG_STIC0; + int count = BAUD_COUNT; + int divisor = BAUD_DIVISOR; + + while (count > 0xFF) { + count >>= 1; + divisor++; + } + + *mode = 0xC8; + *brgc = count; + *brgm0 = divisor & 0x07; +#ifdef V850_REG_BRGMC01 + *brgm1 = divisor >> 3; +#endif + *rxstat = 0x47; + *rxerr = 0; + *txstat = 0x47; +} + +// Actually send character down the wire +void +cyg_hal_plf_serial_putc(void* __ch_data, cyg_uint8 c) +{ + volatile unsigned char *TxDATA = (volatile unsigned char *)V850_REG_TXS0; + volatile unsigned char *TxSTAT = (volatile unsigned char *)V850_REG_STIC0; + int timeout = 0xFFFF; + + CYGARC_HAL_SAVE_GP(); + + // Send character + *TxDATA = (unsigned char)c; + // Wait for Tx not busy + while ((*TxSTAT & 0x80) == 0x00) { + if (--timeout == 0) + break; + } + *TxSTAT &= ~0x80; + + CYGARC_HAL_RESTORE_GP(); +} + +static cyg_bool +cyg_hal_plf_serial_getc_nonblock(void* __ch_data, cyg_uint8* ch) +{ + volatile unsigned char *RxDATA = (volatile unsigned char *)V850_REG_RXB0; + volatile unsigned char *RxSTAT = (volatile unsigned char *)V850_REG_SRIC0; + + if ((*RxSTAT & 0x80) == 0x00) + return false; + + *ch = (char)*RxDATA; + *RxSTAT &= ~0x80; + return true; +} + +cyg_uint8 +cyg_hal_plf_serial_getc(void* __ch_data) +{ + cyg_uint8 ch; + CYGARC_HAL_SAVE_GP(); + + while(!cyg_hal_plf_serial_getc_nonblock(__ch_data, &ch)); + + CYGARC_HAL_RESTORE_GP(); + return ch; +} + +static void +cyg_hal_plf_serial_write(void* __ch_data, const cyg_uint8* __buf, + cyg_uint32 __len) +{ + CYGARC_HAL_SAVE_GP(); + + while(__len-- > 0) + cyg_hal_plf_serial_putc(__ch_data, *__buf++); + + CYGARC_HAL_RESTORE_GP(); +} + +static void +cyg_hal_plf_serial_read(void* __ch_data, cyg_uint8* __buf, cyg_uint32 __len) +{ + CYGARC_HAL_SAVE_GP(); + + while(__len-- > 0) + *__buf++ = cyg_hal_plf_serial_getc(__ch_data); + + CYGARC_HAL_RESTORE_GP(); +} + +cyg_int32 msec_timeout = 1000; + +cyg_bool +cyg_hal_plf_serial_getc_timeout(void* __ch_data, cyg_uint8* ch) +{ + int delay_count = msec_timeout * 10; // delay in .1 ms steps + cyg_bool res; + CYGARC_HAL_SAVE_GP(); + + for(;;) { + res = cyg_hal_plf_serial_getc_nonblock(__ch_data, ch); + if (res || 0 == delay_count--) + break; + + CYGACC_CALL_IF_DELAY_US(100); + } + + CYGARC_HAL_RESTORE_GP(); + return res; +} + +static int +cyg_hal_plf_serial_control(void *__ch_data, __comm_control_cmd_t __func, ...) +{ + static int irq_state = 0; + int ret = 0; + CYGARC_HAL_SAVE_GP(); + + switch (__func) { + case __COMMCTL_IRQ_ENABLE: + HAL_INTERRUPT_UNMASK(CYGNUM_HAL_VECTOR_INTCSI1); + irq_state = 1; + break; + case __COMMCTL_IRQ_DISABLE: + ret = irq_state; + irq_state = 0; + HAL_INTERRUPT_MASK(CYGNUM_HAL_VECTOR_INTCSI1); + break; + case __COMMCTL_DBG_ISR_VECTOR: + ret = CYGNUM_HAL_VECTOR_INTCSI1; + break; + case __COMMCTL_SET_TIMEOUT: + { + va_list ap; + + va_start(ap, __func); + + ret = msec_timeout; + msec_timeout = va_arg(ap, cyg_uint32); + + va_end(ap); + } + default: + break; + } + CYGARC_HAL_RESTORE_GP(); + return ret; +} + +static int +cyg_hal_plf_serial_isr(void *__ch_data, int* __ctrlc, + CYG_ADDRWORD __vector, CYG_ADDRWORD __data) +{ + volatile unsigned char *RxDATA = (volatile unsigned char *)V850_REG_RXB0; + cyg_uint8 c; + int res = 0; + CYGARC_HAL_SAVE_GP(); + + c = (char)*RxDATA; + *__ctrlc = 0; + if( cyg_hal_is_break( &c , 1 ) ) + *__ctrlc = 1; + + cyg_drv_interrupt_acknowledge(CYGNUM_HAL_VECTOR_INTCSI1); + + res = CYG_ISR_HANDLED; + + CYGARC_HAL_RESTORE_GP(); + return res; +} + +static void +cyg_hal_plf_serial_init(void) +{ + hal_virtual_comm_table_t* comm; + int cur = CYGACC_CALL_IF_SET_CONSOLE_COMM(CYGNUM_CALL_IF_SET_COMM_ID_QUERY_CURRENT); + + // Disable interrupts. + HAL_INTERRUPT_MASK(CYGNUM_HAL_VECTOR_INTCSI1); + + // Init channels + init_serial_channel((cyg_uint8*)0); + + // Setup procs in the vector table + + // Set channel 0 + CYGACC_CALL_IF_SET_CONSOLE_COMM(0); + comm = CYGACC_CALL_IF_CONSOLE_PROCS(); + CYGACC_COMM_IF_CH_DATA_SET(*comm, 0); + CYGACC_COMM_IF_WRITE_SET(*comm, cyg_hal_plf_serial_write); + CYGACC_COMM_IF_READ_SET(*comm, cyg_hal_plf_serial_read); + CYGACC_COMM_IF_PUTC_SET(*comm, cyg_hal_plf_serial_putc); + CYGACC_COMM_IF_GETC_SET(*comm, cyg_hal_plf_serial_getc); + CYGACC_COMM_IF_CONTROL_SET(*comm, cyg_hal_plf_serial_control); + CYGACC_COMM_IF_DBG_ISR_SET(*comm, cyg_hal_plf_serial_isr); + CYGACC_COMM_IF_GETC_TIMEOUT_SET(*comm, cyg_hal_plf_serial_getc_timeout); + + // Restore original console + CYGACC_CALL_IF_SET_CONSOLE_COMM(cur); +} + +void +cyg_hal_plf_comms_init(void) +{ + static int initialized = 0; + + if (initialized) + return; + + initialized = 1; + + cyg_hal_plf_serial_init(); +} + +//============================================================================= +// Compatibility with older stubs +//============================================================================= + +#ifndef CYGSEM_HAL_VIRTUAL_VECTOR_DIAG + +// Assumption: all diagnostic output must be GDB packetized unless this is a ROM (i.e. +// totally stand-alone) system. + +//#ifdef CYGSEM_HAL_ROM_MONITOR +//#define CYG_HAL_STARTUP_ROM +//#undef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS +//#endif + +#if (defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_ROMRAM)) \ + && !defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS) +#define HAL_DIAG_USES_HARDWARE +#else +#if !defined(CYGDBG_HAL_DIAG_TO_DEBUG_CHAN) +#define HAL_DIAG_USES_HARDWARE +#endif +#endif + +void hal_diag_init(void) +{ + init_serial_channel(0); +} + +#ifdef HAL_DIAG_USES_HARDWARE + +void hal_diag_write_char(char c) +{ + CYG_INTERRUPT_STATE old; + HAL_DISABLE_INTERRUPTS(old); + cyg_hal_plf_serial_putc(0, c); + HAL_RESTORE_INTERRUPTS(old); +} + +void hal_diag_read_char(char *c) +{ + *c = cyg_hal_plf_serial_getc(0); +} + +#else // HAL_DIAG relies on GDB + +void +hal_diag_read_char(char *c) +{ + *c = cyg_hal_plf_serial_getc(0); +} + +void +hal_diag_write_char(char c) +{ + static char line[100]; + static int pos = 0; + + // No need to send CRs + if( c == '\r' ) return; + + line[pos++] = c; + + if( c == '\n' || pos == sizeof(line) ) + { + CYG_INTERRUPT_STATE old; + + // Disable interrupts. This prevents GDB trying to interrupt us + // while we are in the middle of sending a packet. The serial + // receive interrupt will be seen when we re-enable interrupts + // later. + +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + CYG_HAL_GDB_ENTER_CRITICAL_IO_REGION(old); +#else + HAL_DISABLE_INTERRUPTS(old); +#endif + + while(1) + { + static char hex[] = "0123456789ABCDEF"; + cyg_uint8 csum = 0; + int i; + char c1; + + cyg_hal_plf_serial_putc(0, '$'); + cyg_hal_plf_serial_putc(0, 'O'); + csum += 'O'; + for( i = 0; i < pos; i++ ) + { + char ch = line[i]; + char h = hex[(ch>>4)&0xF]; + char l = hex[ch&0xF]; + cyg_hal_plf_serial_putc(0, h); + cyg_hal_plf_serial_putc(0, l); + csum += h; + csum += l; + } + cyg_hal_plf_serial_putc(0, '#'); + cyg_hal_plf_serial_putc(0, hex[(csum>>4)&0xF]); + cyg_hal_plf_serial_putc(0, hex[csum&0xF]); + + // Wait for the ACK character '+' from GDB here and handle + // receiving a ^C instead. This is the reason for this clause + // being a loop. + c1 = cyg_hal_plf_serial_getc(0); + + if( c1 == '+' ) + break; // a good acknowledge + +#if defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS) && \ + defined(CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT) + cyg_drv_interrupt_acknowledge(CYGNUM_HAL_VECTOR_INTCSI1); + if( c1 == 3 ) { + // Ctrl-C: breakpoint. + cyg_hal_gdb_interrupt (__builtin_return_address(0)); + break; + } +#endif + // otherwise, loop round again + } + + pos = 0; + + // And re-enable interrupts +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + CYG_HAL_GDB_LEAVE_CRITICAL_IO_REGION(old); +#else + HAL_RESTORE_INTERRUPTS(old); +#endif + } +} +#endif // USE HARDWARE + +#endif // CYGSEM_HAL_VIRTUAL_VECTOR_DIAG + +#endif // #if CYGINT_HAL_V850_DIAG_ONCHIP_SERIAL0 + +/*---------------------------------------------------------------------------*/ +/* End of hal_diag.c */ diff --git a/packages/hal/v85x/v850/current/src/nec.ld b/packages/hal/v85x/v850/current/src/nec.ld deleted file mode 100644 --- a/packages/hal/v85x/v850/current/src/nec.ld +++ /dev/null @@ -1,123 +0,0 @@ -//============================================================================= -// -// MLT linker script for NEC -// adapted from packages/hal/arm/pid/v1_1/src/pid.ld -// -//============================================================================= -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Red Hat eCos Public License -// Version 1.1 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://www.redhat.com/ -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Configurable Operating System, -// released September 30, 1998. -// -// The Initial Developer of the Original Code is Red Hat. -// Portions created by Red Hat are -// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. -// All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//============================================================================= - -#include - -STARTUP(vectors.o) -ENTRY(reset_vector) -#ifdef EXTRAS -INPUT(extras.o) -#endif -GROUP(libtarget.a libgcc.a) - -#define ALIGN_LMA 4 -#define FOLLOWING(_section_) AT ((LOADADDR (_section_) + SIZEOF (_section_) + ALIGN_LMA - 1) & ~ (ALIGN_LMA - 1)) -#define LMA_EQ_VMA -#define FORCE_OUTPUT . = . - -#define SECTIONS_BEGIN \ - /* Debug information */ \ - .debug_aranges 0 : { *(.debug_aranges) } \ - .debug_pubnames 0 : { *(.debug_pubnames) } \ - .debug_info 0 : { *(.debug_info) } \ - .debug_abbrev 0 : { *(.debug_abbrev) } \ - .debug_line 0 : { *(.debug_line) } \ - .debug_frame 0 : { *(.debug_frame) } \ - .debug_str 0 : { *(.debug_str) } \ - .debug_loc 0 : { *(.debug_loc) } \ - .debug_macinfo 0 : { *(.debug_macinfo) } - -#define SECTION_rom_vectors(_region_, _vma_, _lma_) \ - .rom_vectors _vma_ : _lma_ \ - { FORCE_OUTPUT; KEEP (*(.vectors)) } \ - > _region_ - -#define SECTION_text(_region_, _vma_, _lma_) \ - .text _vma_ : _lma_ \ - { stext = ABSOLUTE(.); \ - PROVIDE (__stext = ABSOLUTE(.)); \ - *(.text*) *(.gnu.warning) *(.gnu.linkonce*) *(.init) \ - *(.glue_7) *(.glue_7t) \ - } > _region_ \ - etext = .; PROVIDE (__etext = .); - -#define SECTION_fini(_region_, _vma_, _lma_) \ - .fini _vma_ : _lma_ \ - { FORCE_OUTPUT; *(.fini) } \ - > _region_ - -#define SECTION_rodata(_region_, _vma_, _lma_) \ - .rodata _vma_ : _lma_ \ - { FORCE_OUTPUT; *(.rodata*) } \ - > _region_ - -#define SECTION_rodata1(_region_, _vma_, _lma_) \ - .rodata1 _vma_ : _lma_ \ - { FORCE_OUTPUT; *(.rodata1) } \ - > _region_ - -#define SECTION_fixup(_region_, _vma_, _lma_) \ - .fixup _vma_ : _lma_ \ - { FORCE_OUTPUT; *(.fixup) } \ - > _region_ - -#define SECTION_gcc_except_table(_region_, _vma_, _lma_) \ - .gcc_except_table _vma_ : _lma_ \ - { FORCE_OUTPUT; *(.gcc_except_table) } \ - > _region_ - -#define SECTION_data(_region_, _vma_, _lma_) \ - .data _vma_ : _lma_ \ - { __ram_data_start = ABSOLUTE (.); *(.data*) *(.data1) MERGE_IN_RODATA \ - _GOT1_START_ = ABSOLUTE (.); *(.got1) _GOT1_END_ = ABSOLUTE (.); \ - _GOT2_START_ = ABSOLUTE (.); *(.got2) _GOT2_END_ = ABSOLUTE (.); \ - . = ALIGN (4); \ - KEEP(*( SORT (.ecos.table.*))) ; \ - __CTOR_LIST__ = ABSOLUTE (.); KEEP (*(SORT (.ctors*))) __CTOR_END__ = ABSOLUTE (.); \ - __DTOR_LIST__ = ABSOLUTE (.); KEEP (*(SORT (.dtors*))) __DTOR_END__ = ABSOLUTE (.); \ - *(.dynamic) *(.sdata*) *(.sbss*) } \ - > _region_ \ - __rom_data_start = LOADADDR (.data); \ - __ram_data_end = .; PROVIDE (__ram_data_end = .); _edata = .; PROVIDE (edata = .); \ - PROVIDE (__rom_data_end = LOADADDR (.data) + SIZEOF(.data)); - -#define SECTION_bss(_region_, _vma_, _lma_) \ - .bss _vma_ : _lma_ \ - { __bss_start = ABSOLUTE (.); \ - *(.scommon) *(.dynbss) *(.bss*) *(COMMON) \ - __bss_end = ABSOLUTE (.); } \ - > _region_ - -#define SECTIONS_END . = ALIGN(4); _end = .; PROVIDE (end = .); - -#include -#include -#include CYGHWR_MEMORY_LAYOUT_LDI diff --git a/packages/hal/v85x/v850/current/src/v850_misc.c b/packages/hal/v85x/v850/current/src/v850_misc.c --- a/packages/hal/v85x/v850/current/src/v850_misc.c +++ b/packages/hal/v85x/v850/current/src/v850_misc.c @@ -23,7 +23,7 @@ // // The Initial Developer of the Original Code is Red Hat. // Portions created by Red Hat are -// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. // All Rights Reserved. // ------------------------------------------- // @@ -45,7 +45,6 @@ #include #include // Base types -#include // tracing macros #include // assertion macros #include diff --git a/packages/hal/v85x/v850/current/src/v850_stub.c b/packages/hal/v85x/v850/current/src/v850_stub.c --- a/packages/hal/v85x/v850/current/src/v850_stub.c +++ b/packages/hal/v85x/v850/current/src/v850_stub.c @@ -23,7 +23,7 @@ // // The Initial Developer of the Original Code is Red Hat. // Portions created by Red Hat are -// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. // All Rights Reserved. // ------------------------------------------- // @@ -31,7 +31,7 @@ //======================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): Red Hat, gthomas +// Author(s): Red Hat, gthomas, jlarmour // Contributors: Red Hat, gthomas, jskov // Date: 1998-11-26 // Purpose: @@ -49,6 +49,10 @@ #include #endif +#ifdef CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT +#include +#endif + #ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS #include @@ -60,17 +64,13 @@ #define TRUE 1 #endif -#ifdef CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT -#include // dbg_currthread_id -#endif - /* Given a trap value TRAP, return the corresponding signal. */ int __computeSignal (unsigned int trap_number) { unsigned short curins, *pc; switch (trap_number) { - case CYGNUM_HAL_VECTOR_WATCHDOG_TIMER: + case CYGNUM_HAL_VECTOR_INTWDT: // watchdog timer NMI pc = (unsigned short *)_hal_registers->pc; curins = *pc; if (curins == 0x0585) { @@ -313,3 +313,271 @@ void __skipinst (void) #endif // CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + +/* ----------------------------------------------------------------------- */ +/* ICE debugging */ + +#ifdef CYGDBG_HAL_V850_ICE + +#include + +/* Magic area for syscall information, from vectors.S */ +__externC char hal_v85x_ice_syscall_info[]; + +/* Syscall operation codes. This is a "contract" with the host. */ + +#define V850ICE_SYSCALL_GET_THREADNEXT 1 +#define V850ICE_SYSCALL_GET_THREADREGS 2 +#define V850ICE_SYSCALL_SET_THREADREGS 3 +#define V850ICE_SYSCALL_GET_CURRTHREAD 4 +#define V850ICE_SYSCALL_GET_THREADINFO 5 + +/* System call information area layout */ +#define ICE_SYSCALL_INFO_VALIDATOR (*(int *)&hal_v85x_ice_syscall_info[0]) +#define ICE_SYSCALL_INFO_STARTPC (*(int *)&hal_v85x_ice_syscall_info[4]) +#define ICE_SYSCALL_INFO_ENDPC (*(int *)&hal_v85x_ice_syscall_info[8]) +#define ICE_SYSCALL_INFO_STACK (*(int *)&hal_v85x_ice_syscall_info[12]) +#define ICE_SYSCALL_INFO_BUF (*(int *)&hal_v85x_ice_syscall_info[16]) + +/* Number of regs in GDB regs context */ +#define V850_GDB_REGS 66 + +static int ice_stack[128]; // ints so as to ensure alignment +static int ice_iobuf[128]; + +static void +hal_v85x_ice_syscall_end(void) +{ + for (;;); +} + +#define ICEDEBUG 0 + +#if ICEDEBUG +#include +#endif + +/* We can't use normal memcpy when invoked via the ICE. It may be unsafe */ +static void +my_memcpy( void *vd, void *vs, int n) +{ + char *d = vd; + char *s = vs; + + while (n--) + *d++=*s++; +} + +static void +my_memset( void *vs, char c, int n) +{ + char *s = vs; + + while (n--) + *s++ = c; +} + +static void +hal_v85x_ice_syscall(void) +{ + int code, len; + code = ice_iobuf[0]; + len = ice_iobuf[1]; + switch (code) { + case V850ICE_SYSCALL_GET_THREADNEXT: + { + int ret; + threadref currthread, nextthread; + int thread_id; + + /* Unmarshall thread ref */ + my_memcpy( &currthread, &ice_iobuf[2], 8 ); +#if ICEDEBUG + diag_printf("*NEXTTHREAD* currthread=%08x,%08x\n", + *(int *)&currthread[0], + *(int *)(((char *)&currthread[0])+4)); +#endif + // null threadref? + if ((ice_iobuf[2] == 0) && + (ice_iobuf[3] == 0)) { +#if ICEDEBUG + diag_printf("null threadref\n"); +#endif + ret = dbg_threadlist( 1, NULL, &nextthread ); + } else { +#if ICEDEBUG + diag_printf("non-null threadref\n"); +#endif + ret = dbg_threadlist( 0, &currthread, &nextthread ); + } +#if ICEDEBUG + diag_printf("*NEXTTHREAD* nextthread=%08x,%08x\n", + *(int *)&nextthread[0], + *(int *)(((char *)&nextthread[0])+4)); +#endif + if (ret) { // if valid thread found + thread_id = dbg_thread_id( &nextthread ); + /* Returns 0 on error */ + if (thread_id != 0) { + ice_iobuf[1] = thread_id; + my_memcpy( &ice_iobuf[2], nextthread, 8 ); + + // set return data size to 12 + ice_iobuf[0] = 12; +#if ICEDEBUG + { + int i; + for (i=0; i<3; i++) + diag_printf("%x, ", ice_iobuf[i]); + diag_printf("\n"); + } +#endif + } else { + ret = 0; + } + } + if (!ret) { + // set to null + my_memset( &ice_iobuf[1], 0, 12 ); + } + } + break; + case V850ICE_SYSCALL_GET_THREADREGS: + { + int ret; + threadref thread; + + /* Unmarshall thread ref */ + my_memcpy( &thread, &ice_iobuf[2], 8 ); +#if ICEDEBUG + diag_printf("*GTHREADREGS* thread=%08x,%08x\n", *(int *)&thread[0], + *(int *)(((char *)&thread[0])+4)); +#endif + ret = dbg_getthreadreg( &thread, V850_GDB_REGS, &ice_iobuf[1]); + if (ret) + ice_iobuf[0] = V850_GDB_REGS * 4; + else + ice_iobuf[0] = 0; + + } + break; + case V850ICE_SYSCALL_SET_THREADREGS: + { + int ret; + threadref thread; + + /* Unmarshall thread ref */ + my_memcpy( &thread, &ice_iobuf[2], 8 ); +#if ICEDEBUG + diag_printf("*STHREADREGS* thread=%08x,%08x\n", *(int *)&thread[0], + *(int *)(((char *)&thread[0])+4)); +#endif + ret = dbg_setthreadreg( &thread, V850_GDB_REGS, &ice_iobuf[4]); + if (ret) + ice_iobuf[0] = 1; + else + ice_iobuf[0] = 0; + } + break; + case V850ICE_SYSCALL_GET_CURRTHREAD: + { + int ret, thread_id; + threadref thread; + + ret = dbg_currthread( &thread ); +#if ICEDEBUG + diag_printf("*CURRTHREAD* thread=%08x,%08x\n", *(int *)&thread[0], + *(int *)(((char *)&thread[0])+4)); +#endif + + if (ret) { + thread_id = dbg_thread_id( &thread ); + /* Returns 0 on error */ + if (thread_id != 0) { + ice_iobuf[1] = thread_id; + my_memcpy( &ice_iobuf[2], thread, 8 ); + } + else { + ret = 0; + } + } + if (ret) + ice_iobuf[0] = 12; + else + ice_iobuf[0] = 0; + } + break; + case V850ICE_SYSCALL_GET_THREADINFO: + { + int ret; + threadref thread; + struct cygmon_thread_debug_info info; + char *s=(char *)&ice_iobuf[1], *p; + + /* Unmarshall thread ref */ + my_memcpy( &thread, &ice_iobuf[2], 8 ); +#if ICEDEBUG + diag_printf("*INFO* thread=%08x,%08x\n", *(int *)&thread[0], + *(int *)(((char *)&thread[0])+4)); +#endif + + ret = dbg_threadinfo( &thread, &info ); + if (ret) { + if (info.thread_display) { + my_memcpy (s, "State: ", 7); + s += 7; + p = info.thread_display; + while (*p) { + *s++ = *p++; + } + } + + if (info.unique_thread_name && info.unique_thread_name[0]) { + my_memcpy (s, ", Name: ", 8); + s += 8; + p = info.unique_thread_name; + while (*p) { + *s++ = *p++; + } + } + + if (info.more_display) { + my_memcpy (s, ", ", 2); + s += 2; + p = info.more_display; + while (*p) { + *s++ = *p++; + } + } + + } + *s++ = '\0'; + if (ret) + ice_iobuf[0] = s - (char *)&ice_iobuf[1]; + else + ice_iobuf[0] = 0; + } + break; + default: + // set return data size to 0 + ice_iobuf[0] = 0; + break; + } + hal_v85x_ice_syscall_end(); +} + +__externC void +hal_v85x_init_ice_syscall_info(void) +{ + int valid_string = 0x45434956; // "VICE" + ICE_SYSCALL_INFO_STARTPC = (int)&hal_v85x_ice_syscall; + ICE_SYSCALL_INFO_ENDPC = (int)&hal_v85x_ice_syscall_end; + ICE_SYSCALL_INFO_STACK = (int)&ice_stack[0]; + ICE_SYSCALL_INFO_BUF = (int)&ice_iobuf[0]; + // Leave validation string to last + ICE_SYSCALL_INFO_VALIDATOR = valid_string; +} + +#endif // ifdef CYGDBG_HAL_V850_ICE + +// EOF v850_stub.c diff --git a/packages/hal/v85x/v850/current/src/v85x_v850.ld b/packages/hal/v85x/v850/current/src/v85x_v850.ld --- a/packages/hal/v85x/v850/current/src/v85x_v850.ld +++ b/packages/hal/v85x/v850/current/src/v85x_v850.ld @@ -22,7 +22,7 @@ // // The Initial Developer of the Original Code is Red Hat. // Portions created by Red Hat are -// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. // All Rights Reserved. // ------------------------------------------- // @@ -32,7 +32,7 @@ #include STARTUP(vectors.o) -ENTRY(reset_vector) +ENTRY(start) #ifdef EXTRAS INPUT(extras.o) #endif @@ -60,6 +60,14 @@ GROUP(libtarget.a libgcc.a) { FORCE_OUTPUT; KEEP (*(.vectors)) } \ > _region_ +#define SECTION_ram_vectors(_region_, _vma_, _lma_) \ + .ram_vectors _vma_ : _lma_ \ + { ___ram_vectors_start = ABSOLUTE(.); \ + FORCE_OUTPUT; KEEP (*(.ram_vectors)) \ + ___ram_vectors_end = ABSOLUTE(.); \ + } > _region_ \ + ___ram_vectors_loadaddr = LOADADDR(.ram_vectors); + #define SECTION_text(_region_, _vma_, _lma_) \ .text _vma_ : _lma_ \ { stext = ABSOLUTE(.); \ @@ -121,3 +129,5 @@ GROUP(libtarget.a libgcc.a) #include #include #include CYGHWR_MEMORY_LAYOUT_LDI + +// EOF v85x_v850.ld diff --git a/packages/hal/v85x/v850/current/tests/nmitest.c b/packages/hal/v85x/v850/current/tests/nmitest.c new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/v850/current/tests/nmitest.c @@ -0,0 +1,88 @@ +//========================================================================== +// +// nmitest.c +// +// V850 NMI test program +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jlarmour +// Contributors: jlarmour +// Date: 2001-02-01 +// Purpose: Test NMI function +// Description: This test allows the NMI functionality to be tested. +// It is not built by default. +// +//####DESCRIPTIONEND#### +// +//========================================================================*/ + +#include +#include + +#include + +int nmicount; +char stack[4096]; +static cyg_handle_t thr0h; +static cyg_thread thr0; + +void +nmi_handler(cyg_addrword_t data, cyg_code_t exception_number, + cyg_addrword_t info) +{ + nmicount++; +} + +static void +entry0( cyg_addrword_t data ) +{ + int oldnmicount=0; + + cyg_exception_set_handler( CYGNUM_HAL_VECTOR_NMI, + &nmi_handler, + 0, + NULL, + NULL ); + for (;;) { + if ( oldnmicount != nmicount ) { + diag_printf("Caught NMI\n"); + oldnmicount = nmicount; + } + } +} + +void +cyg_user_start(void) +{ + cyg_thread_create(4, entry0, (cyg_addrword_t)0, "thread 0", + (void *)&stack[0], sizeof(stack), &thr0h, &thr0 ); + cyg_thread_resume(thr0h); +} + +// EOF nmitest.c diff --git a/packages/io/eth/current/ChangeLog b/packages/io/eth/current/ChangeLog --- a/packages/io/eth/current/ChangeLog +++ b/packages/io/eth/current/ChangeLog @@ -1,3 +1,15 @@ +2001-03-21 Gary Thomas + + * cdl/eth_drivers.cdl: Fewer buffers needed in stand-alone mode. + +2001-03-12 Hugo Tyson + + * cdl/eth_drivers.cdl: Permit defines for + CYGPKG_IO_ETH_DRIVERS_STAND_ALONE and CYGPKG_IO_ETH_DRIVERS_NET. + The generic i82559 driver needs to know, unfortunately; it calls + its own DSR directly to unblock after a lost interrupt. And you + mustn't call the DSR under RedBoot == ....STAND_ALONE. + 2001-01-15 Jesper Skov * src/net/eth_drv.c (eth_drv_init): Do not use enaddr if NULL. diff --git a/packages/io/eth/current/cdl/eth_drivers.cdl b/packages/io/eth/current/cdl/eth_drivers.cdl --- a/packages/io/eth/current/cdl/eth_drivers.cdl +++ b/packages/io/eth/current/cdl/eth_drivers.cdl @@ -52,7 +52,6 @@ cdl_package CYGPKG_IO_ETH_DRIVERS { display "Support for standard eCos TCP/IP stack." flavor bool active_if CYGPKG_NET - no_define default_value 1 compile net/eth_drv.c @@ -121,13 +120,12 @@ cdl_package CYGPKG_IO_ETH_DRIVERS { flavor bool active_if !CYGPKG_NET default_value 1 - no_define compile stand_alone/eth_drv.c cdl_option CYGNUM_IO_ETH_DRIVERS_NUM_PKT { display "Number of \[network\] buffers" flavor data - default_value 16 + default_value 4 legal_values 2 to 32 description " This option is used to allocate space to buffer incoming network diff --git a/packages/io/fileio/current/ChangeLog b/packages/io/fileio/current/ChangeLog --- a/packages/io/fileio/current/ChangeLog +++ b/packages/io/fileio/current/ChangeLog @@ -1,3 +1,25 @@ +2001-03-15 Gary Thomas + + * src/file.cxx (open): Check for required/valid open mode. + +2001-03-14 Jonathan Larmour + + * src/misc.cxx (cyg_mtab_lookup): check valid mtab entry + (umount): ditto. + +2001-03-14 Martin van Veen + + * src/misc.cxx (mount): Return error if mount fails. + +2001-03-12 Gary Thomas + + * src/misc.cxx (mount): Do implicit 'chdir()' in the + absence of any statically mounted file systems. + (cyg_fs_lock, cyg_fs_unlock): Add assertions. + + * src/file.cxx (LOCK_FS): + * src/dir.cxx (LOCK_FS): Add assertions on 'mte'. + 2001-01-05 Nick Garnett * tests/socket.c (main): diff --git a/packages/io/fileio/current/src/dir.cxx b/packages/io/fileio/current/src/dir.cxx --- a/packages/io/fileio/current/src/dir.cxx +++ b/packages/io/fileio/current/src/dir.cxx @@ -70,7 +70,10 @@ CYG_MACRO_END //========================================================================== // Implement filesystem locking protocol. -#define LOCK_FS( _mte_ ) cyg_fs_lock( _mte_, (_mte_)->fs->syncmode) +#define LOCK_FS( _mte_ ) { \ + CYG_ASSERT(_mte_ != NULL, "Bad mount table entry"); \ + cyg_fs_lock( _mte_, (_mte_)->fs->syncmode); \ +} #define UNLOCK_FS( _mte_ ) cyg_fs_unlock( _mte_, (_mte_)->fs->syncmode) diff --git a/packages/io/fileio/current/src/file.cxx b/packages/io/fileio/current/src/file.cxx --- a/packages/io/fileio/current/src/file.cxx +++ b/packages/io/fileio/current/src/file.cxx @@ -64,7 +64,10 @@ //========================================================================== // Implement filesystem locking protocol. -#define LOCK_FS( _mte_ ) cyg_fs_lock( _mte_, (_mte_)->fs->syncmode) +#define LOCK_FS( _mte_ ) { \ + CYG_ASSERT(_mte_ != NULL, "Bad mount table entry"); \ + cyg_fs_lock( _mte_, (_mte_)->fs->syncmode); \ +} #define UNLOCK_FS( _mte_ ) cyg_fs_unlock( _mte_, (_mte_)->fs->syncmode) @@ -187,6 +190,10 @@ static Cyg_Mutex getcwd_lock CYGBLD_ATTR cyg_dir dir = cdir_dir; const char *name = path; + // At least one of O_RDONLY, O_WRONLY, O_RDWR must be provided + if( (oflag & O_RDWR) == 0 ) + FILEIO_RETURN(EINVAL); + fd = cyg_fd_alloc(0); if( fd < 0 ) diff --git a/packages/io/fileio/current/src/misc.cxx b/packages/io/fileio/current/src/misc.cxx --- a/packages/io/fileio/current/src/misc.cxx +++ b/packages/io/fileio/current/src/misc.cxx @@ -220,7 +220,7 @@ static int matchlen( const char *s1, con // Otherwise search the mount table. for( m = &mtab[0]; m != &mtab_end; m++ ) { - if( m->name != NULL ) + if( m->name != NULL && m->valid ) { int len = matchlen(*name,m->name); if( len > best_len ) @@ -252,7 +252,8 @@ static int matchlen( const char *s1, con cyg_mtab_entry *m; cyg_fstab_entry *f; - + int result = ENOERR; + // Search the mount table for an empty entry for( m = &mtab[0]; m != &mtab_end; m++ ) { @@ -289,7 +290,7 @@ static int matchlen( const char *s1, con m->fsname = fsname; m->devname = devname; - if( f->mount( f, m ) == 0 ) + if( (result = f->mount( f, m )) == 0 ) { m->valid = true; m->fs = f; @@ -300,8 +301,14 @@ static int matchlen( const char *s1, con m->valid = false; m->name = NULL; } - - FILEIO_RETURN(ENOERR); + + // Make sure that there is something to search (for open) + + if (cdir_mtab_entry == (cyg_mtab_entry *)NULL) { + cdir_mtab_entry = m; + } + + FILEIO_RETURN(result); } //========================================================================== @@ -325,8 +332,8 @@ static int matchlen( const char *s1, con break; } - // Ignore empty entries - if( m->name == NULL ) continue; + // Ignore empty or invalid entries + if( m->name == NULL || !m->valid ) continue; // match names. if( strcmp(name,m->name) == 0 ) break; @@ -355,20 +362,32 @@ static int matchlen( const char *s1, con void cyg_fs_lock( cyg_mtab_entry *mte, cyg_uint32 syncmode ) { - if( syncmode & CYG_SYNCMODE_FILE_FILESYSTEM ) - fstab_lock[mte->fs-&fstab[0]].lock(); + CYG_ASSERT(mte != NULL, "Bad mount table entry"); - if( syncmode & CYG_SYNCMODE_FILE_MOUNTPOINT ) + if( syncmode & CYG_SYNCMODE_FILE_FILESYSTEM ) { + CYG_ASSERT(mte->fs-&fstab[0] < CYGNUM_FILEIO_FSTAB_MAX, "Bad file system"); + fstab_lock[mte->fs-&fstab[0]].lock(); + } + + if( syncmode & CYG_SYNCMODE_FILE_MOUNTPOINT ) { + CYG_ASSERT(mte-&mtab[0] < CYGNUM_FILEIO_MTAB_MAX, "Bad mount point"); mtab_lock[mte-&mtab[0]].lock(); + } } void cyg_fs_unlock( cyg_mtab_entry *mte, cyg_uint32 syncmode ) { - if( syncmode & CYG_SYNCMODE_FILE_FILESYSTEM ) - fstab_lock[mte->fs-&fstab[0]].unlock(); + CYG_ASSERT(mte != NULL, "Bad mount table entry"); - if( syncmode & CYG_SYNCMODE_FILE_MOUNTPOINT ) + if( syncmode & CYG_SYNCMODE_FILE_FILESYSTEM ) { + CYG_ASSERT(mte->fs-&fstab[0] < CYGNUM_FILEIO_FSTAB_MAX, "Bad file system"); + fstab_lock[mte->fs-&fstab[0]].unlock(); + } + + if( syncmode & CYG_SYNCMODE_FILE_MOUNTPOINT ) { + CYG_ASSERT(mte-&mtab[0] < CYGNUM_FILEIO_MTAB_MAX, "Bad mount point"); mtab_lock[mte-&mtab[0]].unlock(); + } } //========================================================================== diff --git a/packages/io/flash/current/ChangeLog b/packages/io/flash/current/ChangeLog --- a/packages/io/flash/current/ChangeLog +++ b/packages/io/flash/current/ChangeLog @@ -1,3 +1,25 @@ +2001-03-21 Gary Thomas + + * src/flash.c (flash_program): Verify data after programming. + +2001-03-21 Jesper Skov + + * include/flash.h: Added low voltage error message. + * src/flash.c: And its error message. + +2001-03-17 Gary Thomas + + * src/flash.c (flash_program): + * include/flash.h: Add support for [StrataFLASH] buffered writes. + This requires knowledge of the device write buffer size [saved]. + +2001-03-01 Gary Thomas + + * src/flash.c: + * include/flash.h: Allow platform to define pre/post routines + to enable/disable device access. These may be required, e.g. + to turn on some voltage, etc. + 2001-02-23 Jesper Skov * include/flash.h: HAL_FLASH_CACHES_WANT_OPTIMAL replaced with diff --git a/packages/io/flash/current/include/flash.h b/packages/io/flash/current/include/flash.h --- a/packages/io/flash/current/include/flash.h +++ b/packages/io/flash/current/include/flash.h @@ -79,6 +79,7 @@ externC int printf(char* fmt, ...); #define FLASH_ERR_DRV_VERIFY 0x0b // Driver failed to verify data #define FLASH_ERR_DRV_TIMEOUT 0x0c // Driver timed out waiting for device #define FLASH_ERR_DRV_WRONG_PART 0x0d // Driver does not support device +#define FLASH_ERR_LOW_VOLTAGE 0x0e // Not enough juice to complete job #ifdef _FLASH_PRIVATE_ @@ -87,6 +88,7 @@ struct flash_info { int work_space_size; int block_size; // Assuming fixed size "blocks" int blocks; // Number of blocks + int buffer_size; // Size of write buffer (only defined for some devices) unsigned long block_mask; void *start, *end; // Address range int init; @@ -96,6 +98,22 @@ externC struct flash_info flash_info; externC int flash_hwr_init(void); externC int flash_hwr_map_error(int err); +// +// Some FLASH devices may require additional support, e.g. to turn on +// appropriate voltage drivers, before any operation. +// +#ifdef CYGIMP_FLASH_ENABLE +#define FLASH_Enable CYGIMP_FLASH_ENABLE +extern void CYGIMP_FLASH_ENABLE(void *, void *); +#else +#define FLASH_Enable(_start_, _end_) +#endif +#ifdef CYGIMP_FLASH_DISABLE +#define FLASH_Disable CYGIMP_FLASH_DISABLE +extern void CYGIMP_FLASH_DISABLE(void *, void *); +#else +#define FLASH_Disable(_start_, _end_) +#endif //--------------------------------------------------------------------------- // Execution of flash code must be done inside a diff --git a/packages/io/flash/current/src/flash.c b/packages/io/flash/current/src/flash.c --- a/packages/io/flash/current/src/flash.c +++ b/packages/io/flash/current/src/flash.c @@ -23,7 +23,7 @@ // // The Initial Developer of the Original Code is Red Hat. // Portions created by Red Hat are -// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. // All Rights Reserved. // ------------------------------------------- // @@ -193,6 +193,7 @@ flash_erase(void *addr, int len, void ** printf("... Erase from %p-%p: ", (void*)block, (void*)end_addr); HAL_FLASH_CACHES_OFF(d_cache, i_cache); + FLASH_Enable(block, end_addr); while (block < end_addr) { // Supply the blocksize for a gross check for erase success stat = (*_flash_erase_block)(block, flash_info.block_size); @@ -204,6 +205,7 @@ flash_erase(void *addr, int len, void ** block += flash_info.block_size / sizeof(*block); printf("."); } + FLASH_Disable(block, end_addr); HAL_FLASH_CACHES_ON(d_cache, i_cache); printf("\n"); return (stat); @@ -214,7 +216,7 @@ flash_program(void *_addr, void *_data, { int stat = 0; int size; - typedef int code_fun(unsigned short *, unsigned short *, int); + typedef int code_fun(unsigned short *, unsigned short *, int, unsigned long, int); code_fun *_flash_program_buf; unsigned short *addr = (unsigned short *)_addr; unsigned short *data = (unsigned short *)_data; @@ -244,12 +246,18 @@ flash_program(void *_addr, void *_data, (void*)(((unsigned long)data)+len), (void*)addr); HAL_FLASH_CACHES_OFF(d_cache, i_cache); + FLASH_Enable(addr, addr+len); while (len > 0) { size = len; if (size > flash_info.block_size) size = flash_info.block_size; - stat = (*_flash_program_buf)(addr, data, size); + stat = (*_flash_program_buf)(addr, data, size, + flash_info.block_mask, flash_info.buffer_size); stat = flash_hwr_map_error(stat); + if (memcmp(addr, data, size) != 0) { + stat = 0x0BAD; + printf("V"); + } if (stat) { *err_addr = (void *)addr; break; @@ -259,6 +267,7 @@ flash_program(void *_addr, void *_data, addr += size/sizeof(*addr); data += size/sizeof(*data); } + FLASH_Disable(addr, addr+len); HAL_FLASH_CACHES_ON(d_cache, i_cache); printf("\n"); return (stat); @@ -301,6 +310,7 @@ flash_lock(void *addr, int len, void **e printf("... Lock from %p-%p: ", block, end_addr); HAL_FLASH_CACHES_OFF(d_cache, i_cache); + FLASH_Enable(block, end_addr); while (block < end_addr) { stat = (*_flash_lock_block)(block); stat = flash_hwr_map_error(stat); @@ -311,6 +321,7 @@ flash_lock(void *addr, int len, void **e block += flash_info.block_size / sizeof(*block); printf("."); } + FLASH_Disable(block, end_addr); HAL_FLASH_CACHES_ON(d_cache, i_cache); printf("\n"); return (stat); @@ -351,6 +362,7 @@ flash_unlock(void *addr, int len, void * printf("... Unlock from %p-%p: ", block, end_addr); HAL_FLASH_CACHES_OFF(d_cache, i_cache); + FLASH_Enable(block, end_addr); while (block < end_addr) { stat = (*_flash_unlock_block)(block, flash_info.block_size, flash_info.blocks); stat = flash_hwr_map_error(stat); @@ -361,6 +373,7 @@ flash_unlock(void *addr, int len, void * block += flash_info.block_size / sizeof(*block); printf("."); } + FLASH_Disable(block, end_addr); HAL_FLASH_CACHES_ON(d_cache, i_cache); printf("\n"); return (stat); @@ -397,6 +410,8 @@ flash_errmsg(int err) return "Driver timed out waiting for device"; case FLASH_ERR_DRV_WRONG_PART: return "Driver does not support device"; + case FLASH_ERR_LOW_VOLTAGE: + return "Device reports low voltage"; default: return "Unknown error"; } diff --git a/packages/io/pci/current/ChangeLog b/packages/io/pci/current/ChangeLog --- a/packages/io/pci/current/ChangeLog +++ b/packages/io/pci/current/ChangeLog @@ -1,3 +1,11 @@ +2001-02-28 Hugo Tyson + + * tests/pci1.c (pci_scan): Added a new function to re-scan the + device list after configuring to let a human confirm that we truly + are seeing distinct devices - ie. do they retain their distinct + resource allocations in the BARs? This was useful to me in + investigating a recalcitrant target... + 2001-02-02 Jesper Skov * tests/pci2.c (pci_test): Removed bogus check for 1MB IO limit. diff --git a/packages/io/pci/current/tests/pci1.c b/packages/io/pci/current/tests/pci1.c --- a/packages/io/pci/current/tests/pci1.c +++ b/packages/io/pci/current/tests/pci1.c @@ -78,12 +78,14 @@ // devices on the PCI bus. By enabling the below definition, the // devices will get PCI IO and MEM access activated after configuration // so you can play with IO registers and display/set contents of MEM. -#undef ENABLE_PCI_DEVICES +#define nENABLE_PCI_DEVICES unsigned char stack[CYGNUM_HAL_STACK_SIZE_TYPICAL]; cyg_thread thread_data; cyg_handle_t thread_handle; +void pci_scan( void ); + cyg_bool pci_api_test(int dummy) { @@ -155,6 +157,8 @@ pci_test( void ) cyg_pci_init(); + diag_printf( "========== Finding and configuring devices\n" ); + if (cyg_pci_find_next(CYG_PCI_NULL_DEVID, &devid)) { do { // Get device info @@ -283,10 +287,127 @@ pci_test( void ) diag_printf("No PCI devices found."); } + pci_scan(); + CYG_TEST_PASS_FINISH("pci1 test OK"); } void +pci_scan( void ) +{ + cyg_pci_device dev_info; + cyg_pci_device_id devid; + CYG_ADDRWORD irq; + int i; +#ifdef USE_PCI_CODE_LIST + cyg_bool no_match = false; + cyg_uint16 vendor, device; + cyg_uint8 bc, sc, pi; + PCI_VENTABLE* vtbl; + PCI_DEVTABLE* dtbl; + PCI_CLASSCODETABLE* ctbl; +#endif + + diag_printf( "========== Scanning initialized devices\n" ); + + if (cyg_pci_find_next(CYG_PCI_NULL_DEVID, &devid)) { + do { + // Since we are NOT about to configure the device, set the + // devinfo record so we don't mistake garbage for data. + memset( &dev_info, 0xAAAAAAAAu, sizeof( dev_info ) ); + + // Get device info + cyg_pci_get_device_info(devid, &dev_info); + + // Print stuff + diag_printf("Found device on bus %d, devfn 0x%02x:\n", + CYG_PCI_DEV_GET_BUS(devid), + CYG_PCI_DEV_GET_DEVFN(devid)); + + if (dev_info.command & CYG_PCI_CFG_COMMAND_ACTIVE) { + diag_printf(" Note that board is active. Probed" + " sizes and CPU addresses invalid!\n"); + } + + diag_printf(" Vendor 0x%04x", dev_info.vendor); +#ifdef USE_PCI_CODE_LIST + vendor = dev_info.vendor; + vtbl = PciVenTable; + for (i = 0; i < PCI_VENTABLE_LEN; i++, vtbl++) + if (vendor == vtbl->VenId) + break; + + if (i < PCI_VENTABLE_LEN) { + diag_printf(" [%s][%s]", vtbl->VenShort, vtbl->VenFull); + } else { + diag_printf(" [UNKNOWN]"); + no_match = true; + } +#endif + diag_printf("\n Device 0x%04x", dev_info.device); +#ifdef USE_PCI_CODE_LIST + device = dev_info.device; + dtbl = PciDevTable; + for (i = 0; i < PCI_DEVTABLE_LEN; i++, dtbl++) + if (vendor == dtbl->VenId && device == dtbl->DevId) + break; + + if (i < PCI_DEVTABLE_LEN) { + diag_printf(" [%s][%s]", dtbl->Chip, dtbl->ChipDesc); + } else { + diag_printf(" [UNKNOWN]"); + no_match = true; + } +#endif + + diag_printf("\n Command 0x%04x, Status 0x%04x\n", + dev_info.command, dev_info.status); + + diag_printf(" Class/Rev 0x%08x", dev_info.class_rev); +#ifdef USE_PCI_CODE_LIST + bc = (dev_info.class_rev >> 24) & 0xff; + sc = (dev_info.class_rev >> 16) & 0xff; + pi = (dev_info.class_rev >> 8) & 0xff; + ctbl = PciClassCodeTable; + for (i = 0; i < PCI_CLASSCODETABLE_LEN; i++, ctbl++) + if (bc == ctbl->BaseClass + && sc == ctbl->SubClass + && pi == ctbl->ProgIf) + break; + + if (i < PCI_CLASSCODETABLE_LEN) { + diag_printf(" [%s][%s][%s]", ctbl->BaseDesc, + ctbl->SubDesc, ctbl->ProgDesc); + } else { + diag_printf(" [UNKNOWN]"); + no_match = true; + } +#endif + diag_printf("\n Header 0x%02x\n", dev_info.header_type); + + diag_printf(" SubVendor 0x%04x, Sub ID 0x%04x\n", + dev_info.header.normal.sub_vendor, + dev_info.header.normal.sub_id); + + + for(i = 0; i < CYG_PCI_MAX_BAR; i++) { + diag_printf(" BAR[%d] 0x%08x /", i, dev_info.base_address[i]); + diag_printf(" probed size 0x%08x / CPU addr 0x%08x\n", + dev_info.base_size[i], dev_info.base_map[i]); + } + + if (cyg_pci_translate_interrupt(&dev_info, &irq)) + diag_printf(" Wired to HAL vector %d\n", irq); + else + diag_printf(" Does not generate interrupts.\n"); + + } while (cyg_pci_find_next(devid, &devid)); + } else { + diag_printf("No PCI devices found."); + } +} + +void cyg_start(void) { CYG_TEST_INIT(); diff --git a/packages/io/usb/eth/slave/current/doc/makefile b/packages/io/usb/eth/slave/current/doc/makefile new file mode 100644 --- /dev/null +++ b/packages/io/usb/eth/slave/current/doc/makefile @@ -0,0 +1,46 @@ +#============================================================================= +# +# makefile +# +# For building the USB-ethernet package documentation +# +#============================================================================= +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Red Hat eCos Public License +# Version 1.1 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://www.redhat.com/ +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Configurable Operating System, +# released September 30, 1998. +# +# The Initial Developer of the Original Code is Red Hat. +# Portions created by Red Hat are +# Copyright (C) 2001 Red Hat, Inc. +# All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +#============================================================================= +#####DESCRIPTIONBEGIN#### +# +# Author(s): bartv +# Date: 2001-01-11 +#####DESCRIPTIONEND#### +#============================================================================= + +TOPLEVEL := ../../../../../.. +MAIN_SGML := usbseth.sgml +MAIN_HTML := io-usb-slave-eth.html +MAIN_PDF := io-usb-slave-eth.pdf +OTHER_SGML := +PICTURES := simple tcpip + +include $(TOPLEVEL)/pkgconf/rules.doc diff --git a/packages/io/usb/slave/current/doc/makefile b/packages/io/usb/slave/current/doc/makefile new file mode 100644 --- /dev/null +++ b/packages/io/usb/slave/current/doc/makefile @@ -0,0 +1,46 @@ +#============================================================================= +# +# makefile +# +# For building the USB slave package documentation +# +#============================================================================= +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Red Hat eCos Public License +# Version 1.1 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://www.redhat.com/ +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Configurable Operating System, +# released September 30, 1998. +# +# The Initial Developer of the Original Code is Red Hat. +# Portions created by Red Hat are +# Copyright (C) 2001 Red Hat, Inc. +# All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +#============================================================================= +#####DESCRIPTIONBEGIN#### +# +# Author(s): bartv +# Date: 2001-01-11 +#####DESCRIPTIONEND#### +#============================================================================= + +TOPLEVEL := ../../../../.. +MAIN_SGML := usbs.sgml +MAIN_HTML := io-usb-slave.html +MAIN_PDF := io-usb-slave.pdf +OTHER_SGML := +PICTURES := + +include $(TOPLEVEL)/pkgconf/rules.doc diff --git a/packages/kernel/current/ChangeLog b/packages/kernel/current/ChangeLog --- a/packages/kernel/current/ChangeLog +++ b/packages/kernel/current/ChangeLog @@ -1,3 +1,10 @@ +2001-03-28 Jonathan Larmour + + * cdl/kernel.cdl: Only need to compile dbg_gdb.cxx with + CYGDBG_KERNEL_DEBUG_GDB_THREAD_SUPPORT + + * src/debug/dbg_gdb.cxx: Add new dbg_thread_id() function. + 2001-02-23 Jonathan Larmour * include/thread.inl (attach_stack): Check for non-NULL stack base. diff --git a/packages/kernel/current/cdl/kernel.cdl b/packages/kernel/current/cdl/kernel.cdl --- a/packages/kernel/current/cdl/kernel.cdl +++ b/packages/kernel/current/cdl/kernel.cdl @@ -61,7 +61,7 @@ cdl_package CYGPKG_KERNEL { sched/sched.cxx \ sync/bin_sem.cxx sync/cnt_sem.cxx sync/flag.cxx \ sync/cnt_sem2.cxx sync/mbox.cxx sync/mutex.cxx \ - debug/dbg-thread-demux.c debug/dbg_gdb.cxx + debug/dbg-thread-demux.c # --------------------------------------------------------------------- # The first component within the kernel is related to interrupt @@ -217,6 +217,7 @@ cdl_package CYGPKG_KERNEL { requires CYGVAR_KERNEL_THREADS_LIST requires CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT default_value 1 + compile debug/dbg_gdb.cxx description " This option enables some extra kernel code which is needed to support multi-threaded source level debugging." diff --git a/packages/kernel/current/src/debug/dbg_gdb.cxx b/packages/kernel/current/src/debug/dbg_gdb.cxx --- a/packages/kernel/current/src/debug/dbg_gdb.cxx +++ b/packages/kernel/current/src/debug/dbg_gdb.cxx @@ -177,6 +177,15 @@ externC int dbg_currthread(threadref * v //-------------------------------------------------------------------------- +externC int dbg_thread_id(threadref *threadid) +{ + Cyg_Thread *thread = dbg_get_thread(threadid); + if( thread == 0 ) return 0; + return thread->get_unique_id (); +} + +//-------------------------------------------------------------------------- + externC int dbg_currthread_id(void) { Cyg_Thread *thread = Cyg_Scheduler::get_current_thread(); diff --git a/packages/language/c/libc/stdio/current/ChangeLog b/packages/language/c/libc/stdio/current/ChangeLog --- a/packages/language/c/libc/stdio/current/ChangeLog +++ b/packages/language/c/libc/stdio/current/ChangeLog @@ -1,3 +1,37 @@ +2001-03-19 Jonathan Larmour + + * src/common/stream.cxx (refill_read_buffer): Flush all streams here... + (read): ...rather than here, or... + (read_byte): ...here. + This means less flushing, which improves performance. + + * src/input/fgets.cxx: Add a reminder comment to improve this later. + * src/input/gets.cxx: Ditto. + + +2001-03-16 Jonathan Larmour + + * include/stream.hxx (class Cyg_StdioStream): Improve member visibility. + + * src/common/stream.cxx (refill_read_buffer): Ensure eof is set. + * src/common/feof.cxx: New file. Implements the long lost + feof(), ferror() and clearerr() functions which were MIA for + no good reason. + * cdl/stdio.cdl: Build it. + +2001-03-15 Jonathan Larmour + + * cdl/stdio.cdl (CYGDAT_LIBC_STDIO_DEFAULT_CONSOLE): Default to + tty default console. + + * src/input/fgets.cxx (fgets): Reimplement to work with EOF properly. + Add tracing. + * src/input/gets.cxx (gets): Ditto. + + * include/io.hxx, include/io.inl, include/stream.hxx, + include/stream.inl, include/streambuf.hxx, include/streambuf.inl: + Silence warnings from recent compilers. + 2001-02-01 Jonathan Larmour * cdl/stdio.cdl (CYGPKG_LIBC_STDIO_OPEN): Implements diff --git a/packages/language/c/libc/stdio/current/cdl/stdio.cdl b/packages/language/c/libc/stdio/current/cdl/stdio.cdl --- a/packages/language/c/libc/stdio/current/cdl/stdio.cdl +++ b/packages/language/c/libc/stdio/current/cdl/stdio.cdl @@ -78,23 +78,27 @@ cdl_package CYGPKG_LIBC_STDIO { requires CYGINT_ISO_STRING_STRFUNCS requires CYGINT_ISO_STRING_MEMFUNCS - compile common/fclose.cxx common/fflush.cxx \ - common/fopen.cxx common/freopen.cxx \ - common/setvbuf.cxx common/snprintf.cxx \ - common/sprintf.cxx common/sscanf.cxx \ - common/stderr.cxx common/stdin.cxx \ - common/stdiofiles.cxx common/fseek.cxx \ - common/stdioinlines.cxx common/stdiosupp.cxx \ - common/stdout.cxx common/stream.cxx \ - common/streambuf.cxx common/ungetc.cxx \ - common/vsnprintf.cxx common/vsscanf.cxx \ + compile common/fclose.cxx common/feof.cxx \ + common/fflush.cxx common/fopen.cxx \ + common/freopen.cxx common/setvbuf.cxx \ + common/snprintf.cxx common/sprintf.cxx \ + common/sscanf.cxx common/stderr.cxx \ + common/stdin.cxx common/stdiofiles.cxx \ + common/fseek.cxx common/stdioinlines.cxx\ + common/stdiosupp.cxx common/stdout.cxx \ + common/stream.cxx common/streambuf.cxx \ + common/ungetc.cxx common/vsnprintf.cxx \ + common/vsscanf.cxx \ + \ input/fgetc.cxx input/fgets.cxx \ input/fread.cxx input/fscanf.cxx \ input/gets.cxx input/scanf.cxx \ - input/vfscanf.cxx output/fnprintf.cxx \ - output/fprintf.cxx output/fputc.cxx \ - output/fputs.cxx output/fwrite.cxx \ - output/printf.cxx output/vfnprintf.cxx + input/vfscanf.cxx \ + \ + output/fnprintf.cxx output/fprintf.cxx \ + output/fputc.cxx output/fputs.cxx \ + output/fwrite.cxx output/printf.cxx \ + output/vfnprintf.cxx # ==================================================================== @@ -267,7 +271,7 @@ cdl_package CYGPKG_LIBC_STDIO { cdl_option CYGDAT_LIBC_STDIO_DEFAULT_CONSOLE { display "Default console device" flavor data - default_value {"\"/dev/ttydiag\""} + default_value CYGDAT_IO_SERIAL_TTY_CONSOLE description " This option allows you to choose the default console device. In the current diff --git a/packages/language/c/libc/stdio/current/include/io.hxx b/packages/language/c/libc/stdio/current/include/io.hxx --- a/packages/language/c/libc/stdio/current/include/io.hxx +++ b/packages/language/c/libc/stdio/current/include/io.hxx @@ -77,5 +77,5 @@ typedef cyg_io_handle_t cyg_stdio_handle #endif //======================================================================== -#endif CYGONCE_LIBC_STDIO_IO_HXX multiple inclusion protection +#endif // CYGONCE_LIBC_STDIO_IO_HXX multiple inclusion protection // EOF io.hxx diff --git a/packages/language/c/libc/stdio/current/include/io.inl b/packages/language/c/libc/stdio/current/include/io.inl --- a/packages/language/c/libc/stdio/current/include/io.inl +++ b/packages/language/c/libc/stdio/current/include/io.inl @@ -241,6 +241,6 @@ inline cyg_bool cyg_stdio_interactive( c #endif // !CYGPKG_LIBC_STDIO_FILEIO //======================================================================== -#endif CYGONCE_LIBC_STDIO_IO_INL multiple inclusion protection +#endif // CYGONCE_LIBC_STDIO_IO_INL multiple inclusion protection // EOF io.inl diff --git a/packages/language/c/libc/stdio/current/include/stream.hxx b/packages/language/c/libc/stdio/current/include/stream.hxx --- a/packages/language/c/libc/stdio/current/include/stream.hxx +++ b/packages/language/c/libc/stdio/current/include/stream.hxx @@ -35,7 +35,7 @@ // // Author(s): jlarmour // Contributors: -// Date: 2000-04-19 +// Date: 2001-03-16 // Purpose: // Description: // Usage: #include @@ -275,18 +275,14 @@ public: void set_error( Cyg_ErrNo errno_to_set ); -public: // are we at EOF? true means we are, false means no cyg_bool get_eof_state( void ); -private: - // Set whether we are at EOF. void set_eof_state( cyg_bool eof_to_set ); -public: // retrieve position Cyg_ErrNo get_position( fpos_t *pos ); @@ -305,6 +301,6 @@ public: #include -#endif CYGONCE_LIBC_STDIO_STREAM_HXX multiple inclusion protection +#endif // CYGONCE_LIBC_STDIO_STREAM_HXX multiple inclusion protection // EOF stream.hxx diff --git a/packages/language/c/libc/stdio/current/include/stream.inl b/packages/language/c/libc/stdio/current/include/stream.inl --- a/packages/language/c/libc/stdio/current/include/stream.inl +++ b/packages/language/c/libc/stdio/current/include/stream.inl @@ -435,6 +435,6 @@ Cyg_StdioStream::set_position( fpos_t po } // set_position() -#endif CYGONCE_LIBC_STDIO_STREAM_INL multiple inclusion protection +#endif // CYGONCE_LIBC_STDIO_STREAM_INL multiple inclusion protection // EOF stream.inl diff --git a/packages/language/c/libc/stdio/current/include/streambuf.hxx b/packages/language/c/libc/stdio/current/include/streambuf.hxx --- a/packages/language/c/libc/stdio/current/include/streambuf.hxx +++ b/packages/language/c/libc/stdio/current/include/streambuf.hxx @@ -150,6 +150,6 @@ public: #endif // if defined(CYGSEM_LIBC_STDIO_WANT_BUFFERED_IO) -#endif CYGONCE_LIBC_STDIO_STREAMBUF_HXX multiple inclusion protection +#endif // CYGONCE_LIBC_STDIO_STREAMBUF_HXX multiple inclusion protection // EOF streambuf.hxx diff --git a/packages/language/c/libc/stdio/current/include/streambuf.inl b/packages/language/c/libc/stdio/current/include/streambuf.inl --- a/packages/language/c/libc/stdio/current/include/streambuf.inl +++ b/packages/language/c/libc/stdio/current/include/streambuf.inl @@ -172,6 +172,6 @@ Cyg_StdioStreamBuffer::drain_buffer( voi #endif // if defined(CYGSEM_LIBC_STDIO_WANT_BUFFERED_IO) -#endif CYGONCE_LIBC_STDIO_STREAMBUF_INL multiple inclusion protection +#endif // CYGONCE_LIBC_STDIO_STREAMBUF_INL multiple inclusion protection // EOF streambuf.inl diff --git a/packages/language/c/libc/stdio/current/src/common/feof.cxx b/packages/language/c/libc/stdio/current/src/common/feof.cxx new file mode 100644 --- /dev/null +++ b/packages/language/c/libc/stdio/current/src/common/feof.cxx @@ -0,0 +1,83 @@ +//======================================================================== +// +// feof.cxx +// +// Implementations of ISO C feof(), ferror(), clearerr() functions +// +//======================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//======================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jlarmour +// Contributors: +// Date: 2001-03-16 +// Purpose: Implementations of ISO C feof(), ferror(), clearerr() +// functions +// Description: +// Usage: +// +//####DESCRIPTIONEND#### +// +//======================================================================== + +// CONFIGURATION + +#include // Configuration header + +// INCLUDES + +#include // Common type definitions and support +#include // Header for this file +#include // Cyg_StdioStream class + +externC int +feof( FILE *stream ) +{ + Cyg_StdioStream *real_stream = (Cyg_StdioStream *)stream; + + return (real_stream->get_eof_state() != 0); +} // feof() + +externC int +ferror( FILE *stream ) +{ + Cyg_StdioStream *real_stream = (Cyg_StdioStream *)stream; + + return (real_stream->get_error() != 0); +} // ferror() + +externC void +clearerr( FILE *stream ) +{ + Cyg_StdioStream *real_stream = (Cyg_StdioStream *)stream; + + real_stream->set_error(0); + real_stream->set_eof_state(false); +} // clearerr() + + + +// EOF feof.cxx diff --git a/packages/language/c/libc/stdio/current/src/common/stream.cxx b/packages/language/c/libc/stdio/current/src/common/stream.cxx --- a/packages/language/c/libc/stdio/current/src/common/stream.cxx +++ b/packages/language/c/libc/stdio/current/src/common/stream.cxx @@ -254,18 +254,18 @@ Cyg_StdioStream::refill_read_buffer( voi if (flags.buffering) { read_err = flush_output_unlocked(); + // we're now reading + flags.last_buffer_op_was_read = true; + + // flush ALL streams + if (read_err == ENOERR) + read_err = cyg_libc_stdio_flush_all_but(this); + if (read_err != ENOERR) { unlock_me(); return read_err; } // if - } // if -#endif -#ifdef CYGSEM_LIBC_STDIO_WANT_BUFFERED_IO - // we're now reading - flags.last_buffer_op_was_read = true; - - if (flags.buffering) { len = io_buf.get_buffer_addr_to_write( (cyg_uint8**)&buffer ); if (!len) { // no buffer space available unlock_me(); @@ -298,8 +298,12 @@ Cyg_StdioStream::refill_read_buffer( voi unlock_me(); if (read_err == ENOERR) { - if (len == 0) + if (len == 0) { read_err = EAGAIN; + flags.at_eof = true; + } + else + flags.at_eof = false; } // if return read_err; @@ -334,25 +338,20 @@ Cyg_StdioStream::read( cyg_uint8 *user_b #ifdef CYGSEM_LIBC_STDIO_WANT_BUFFERED_IO if (flags.buffering) { + + // need to flush output if we were writing before + if (!flags.last_buffer_op_was_read) { + Cyg_ErrNo err = flush_output_unlocked(); + + if (ENOERR != err) { + unlock_me(); + return err; + } + } + cyg_uint8 *buff_to_read_from; cyg_ucount32 bytes_available; - Cyg_ErrNo err; - // this should really only be called after refill_read_buffer, but - // just in case - err = flush_output_unlocked(); - if (ENOERR == err) - err = cyg_libc_stdio_flush_all_but(this); - - if (err != ENOERR) { - position += *bytes_read; - unlock_me(); - return err; - } - - // we're now reading - flags.last_buffer_op_was_read = true; - bytes_available = io_buf.get_buffer_addr_to_read( (cyg_uint8 **)&buff_to_read_from ); @@ -397,21 +396,6 @@ Cyg_StdioStream::read_byte( cyg_uint8 *c return EINVAL; } - // this should really only be called after refill_read_buffer, but just - // in case -#ifdef CYGSEM_LIBC_STDIO_WANT_BUFFERED_IO - if (flags.buffering) - err = flush_output_unlocked(); - if (ENOERR == err) - err = cyg_libc_stdio_flush_all_but(this); - - if (err != ENOERR) - return err; - - // we're now reading - flags.last_buffer_op_was_read = true; -#endif - # ifdef CYGFUN_LIBC_STDIO_ungetc if (flags.unread_char_buf_in_use) { *c = unread_char_buf; @@ -424,6 +408,15 @@ Cyg_StdioStream::read_byte( cyg_uint8 *c #ifdef CYGSEM_LIBC_STDIO_WANT_BUFFERED_IO if (flags.buffering) { + // need to flush output if we were writing before + if (!flags.last_buffer_op_was_read) + err = flush_output_unlocked(); + + if (ENOERR != err) { + unlock_me(); + return err; + } + cyg_uint8 *buff_to_read_from; cyg_ucount32 bytes_available; diff --git a/packages/language/c/libc/stdio/current/src/input/fgets.cxx b/packages/language/c/libc/stdio/current/src/input/fgets.cxx --- a/packages/language/c/libc/stdio/current/src/input/fgets.cxx +++ b/packages/language/c/libc/stdio/current/src/input/fgets.cxx @@ -2,7 +2,7 @@ // // fgets.cxx // -// ANSI Stdio fgets() function +// ISO C standard I/O fgets() function // //======================================================================== //####COPYRIGHTBEGIN#### @@ -23,7 +23,7 @@ // // The Initial Developer of the Original Code is Red Hat. // Portions created by Red Hat are -// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. // All Rights Reserved. // ------------------------------------------- // @@ -33,8 +33,8 @@ // // Author(s): jlarmour // Contributors: -// Date: 2000-04-20 -// Purpose: +// Date: 2001-03-14 +// Purpose: Implementation of ISO C standard I/O fgets() function // Description: // Usage: // @@ -48,7 +48,9 @@ // INCLUDES -#include // Common project-wide type definitions +#include // Common type definitions +#include // Assertion support +#include // Tracing support #include // NULL and size_t from compiler #include // header for this file #include // error codes @@ -56,32 +58,58 @@ // FUNCTIONS +// FIXME: should be reworked to read buffer at a time, and scan that +// for newlines, rather than reading byte at a time. + externC char * fgets( char *s, int n, FILE *stream ) { Cyg_StdioStream *real_stream = (Cyg_StdioStream *)stream; - cyg_ucount32 bytes_read; - Cyg_ErrNo err; + Cyg_ErrNo err=ENOERR; + cyg_uint8 c; + cyg_uint8 *str=(cyg_uint8 *)s; + int nch; + + CYG_CHECK_DATA_PTRC( s ); + CYG_CHECK_DATA_PTRC( stream ); + CYG_PRECONDITION( n > 0, "requested 0 or negative chars"); + + CYG_REPORT_FUNCTYPE( "returning string %08x"); + CYG_REPORT_FUNCARG3( "s=%08x, n=%d, stream=%08x", s, n, stream ); - - err = real_stream->read( (cyg_uint8 *)s, n-1, &bytes_read ); + for (nch=1; nch < n; nch++) { + err = real_stream->read_byte( &c ); + + // if nothing to read, try again ONCE after refilling buffer + if (EAGAIN == err) { + err = real_stream->refill_read_buffer(); + if ( !err ) + err = real_stream->read_byte( &c ); - if (!err && !bytes_read) { // if no err, but nothing to read, try again - err = real_stream->refill_read_buffer(); - if ( !err ) - err = real_stream->read( (cyg_uint8 *)s, n-1, &bytes_read ); - + if (EAGAIN == err) { + if (1 == nch) { // indicates EOF at start + CYG_REPORT_RETVAL( NULL ); + return NULL; + } else + break; // EOF + } // if + } // if + + *str++ = c; + if ('\n' == c) + break; + } // while + + *str = '\0'; // NULL terminate it + + if (err && EAGAIN != err) { + real_stream->set_error( err ); + errno = err; + CYG_REPORT_RETVAL( NULL ); + return NULL; } // if - if (err) { - real_stream->set_error( err ); - errno = err; - return NULL; - } // if - - if (bytes_read > 0) - s[bytes_read]='\0'; // NULL terminate it - + CYG_REPORT_RETVAL( s ); return s; } // fgets() diff --git a/packages/language/c/libc/stdio/current/src/input/gets.cxx b/packages/language/c/libc/stdio/current/src/input/gets.cxx --- a/packages/language/c/libc/stdio/current/src/input/gets.cxx +++ b/packages/language/c/libc/stdio/current/src/input/gets.cxx @@ -2,7 +2,7 @@ // // gets.cxx // -// ANSI Stdio gets() function +// ISO C standard I/O gets() function // //=========================================================================== //####COPYRIGHTBEGIN#### @@ -23,7 +23,7 @@ // // The Initial Developer of the Original Code is Red Hat. // Portions created by Red Hat are -// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. // All Rights Reserved. // ------------------------------------------- // @@ -31,10 +31,10 @@ //=========================================================================== //#####DESCRIPTIONBEGIN#### // -// Author(s): jlarmour -// Contributors: jlarmour -// Date: 1998-02-13 -// Purpose: +// Author(s): jlarmour +// Contributors: +// Date: 2001-03-15 +// Purpose: Implementation of ISO C standard I/O gets() function // Description: // Usage: // @@ -48,50 +48,68 @@ // INCLUDES -#include // Common project-wide type definitions +#include // Common type definitions +#include // Assertion support +#include // Tracing support #include // NULL and size_t from compiler #include // header for this file #include // error codes -#include // UINT_MAX #include // Cyg_StdioStream // FUNCTIONS +// FIXME: should be reworked to read buffer at a time, and scan that +// for newlines, rather than reading byte at a time. + externC char * gets( char *s ) { Cyg_StdioStream *real_stream = (Cyg_StdioStream *)stdin; - cyg_ucount32 bytes_read; - Cyg_ErrNo err; + Cyg_ErrNo err=ENOERR; + cyg_uint8 c; + cyg_uint8 *str=(cyg_uint8 *)s; + int nch; + + CYG_CHECK_DATA_PTRC( s ); + CYG_CHECK_DATA_PTRC( real_stream ); + + CYG_REPORT_FUNCTYPE( "returning string %08x"); + CYG_REPORT_FUNCARG1( "s=%08x", s ); - - err = real_stream->read( (cyg_uint8 *)s, UINT_MAX, &bytes_read ); + for (nch=1;; nch++) { + err = real_stream->read_byte( &c ); + + // if nothing to read, try again ONCE after refilling buffer + if (EAGAIN == err) { + err = real_stream->refill_read_buffer(); + if ( !err ) + err = real_stream->read_byte( &c ); - if (!err && !bytes_read) // if no err, but nothing to read, try again - { - real_stream->refill_read_buffer(); - err = real_stream->read( (cyg_uint8 *)s, UINT_MAX, &bytes_read ); - + if (EAGAIN == err) { + if (1 == nch) { // indicates EOF at start + CYG_REPORT_RETVAL( NULL ); + return NULL; + } else + break; // EOF + } // if + } // if + + if ('\n' == c) // discard newlines + break; + *str++ = c; + } // while + + *str = '\0'; // NULL terminate it + + if (err && EAGAIN != err) { + real_stream->set_error( err ); + errno = err; + CYG_REPORT_RETVAL( NULL ); + return NULL; } // if - if (err) - { - real_stream->set_error( err ); - errno = err; - return NULL; - } // if - - if (bytes_read > 0) - { - // NULL terminate it - if (s[bytes_read-1] == '\n') - s[bytes_read-1] = '\0'; - else - s[bytes_read]='\0'; - } // if - + CYG_REPORT_RETVAL( s ); return s; - } // gets() // EOF gets.cxx diff --git a/packages/net/tcpip/current/ChangeLog b/packages/net/tcpip/current/ChangeLog --- a/packages/net/tcpip/current/ChangeLog +++ b/packages/net/tcpip/current/ChangeLog @@ -1,3 +1,22 @@ +2001-03-28 Richard Panton + + * include/bootp.h: Define func protos with C linkage + * include/netdb.h: Ditto + * include/network.h: Ditto + * include/tftp_support.h: Ditto + + * src/lib/getserv.c: getservbynumber() -> getservbyport() + +2001-03-12 Gary Thomas + + * src/lib/network_support.c (init_all_network_interfaces): + FIx slightly broken previous attempt in abort code. + +2001-03-11 Gary Thomas + + * src/lib/network_support.c (init_all_network_interfaces): + Let initialization of PCMCIA devices abort after ~5 seconds. + 2001-02-23 Jonathan Larmour * src/lib/tftp_server.c (STACK_SIZE): Align diff --git a/packages/net/tcpip/current/include/bootp.h b/packages/net/tcpip/current/include/bootp.h --- a/packages/net/tcpip/current/include/bootp.h +++ b/packages/net/tcpip/current/include/bootp.h @@ -346,7 +346,7 @@ extern const char *eth1_name; // ------------------------------------------------------------------------ // Initialize your own bootp record however you like, as far as is needed // to bring up an interface. -extern void +__externC void build_bootp_record(struct bootp *bp, const char *addrs_ip, const char *addrs_netmask, @@ -357,29 +357,29 @@ build_bootp_record(struct bootp *bp, // Do bootp to fill in the bootp record from the net (other interfaces must // be down for this to work, because of the "half-up" state of the // interface in use) -extern cyg_bool_t do_bootp(const char *interface, struct bootp *res); +__externC cyg_bool_t do_bootp(const char *interface, struct bootp *res); // Initialize an interface (which is down) according to a bootp structure -extern cyg_bool_t init_net(const char *interface, struct bootp *res); +__externC cyg_bool_t init_net(const char *interface, struct bootp *res); // Dump contents to diag_printf -extern void show_bootp(const char *interface, struct bootp *res); +__externC void show_bootp(const char *interface, struct bootp *res); // Interrogate a bootp record for a particular option -extern cyg_bool_t get_bootp_option(struct bootp *bp, unsigned char tag, void *res); +__externC cyg_bool_t get_bootp_option(struct bootp *bp, unsigned char tag, void *res); // ------------------------------------------------------------------------ // This isn't exactly the right place for this since bootp is not involved // BUT you will only be using this API if you are using bootp-style // initialization of the other interfaces; it fits here in a documentation // sense. -extern cyg_bool_t init_loopback_interface(int lo); +__externC cyg_bool_t init_loopback_interface(int lo); // ------------------------------------------------------------------------ // Do all the above automatically according to the configuration. Do not // mix using this and making the above calls yourself. // (this is also declared in the much simpler API in network.h) -extern void init_all_network_interfaces(void); +__externC void init_all_network_interfaces(void); #endif diff --git a/packages/net/tcpip/current/include/netdb.h b/packages/net/tcpip/current/include/netdb.h --- a/packages/net/tcpip/current/include/netdb.h +++ b/packages/net/tcpip/current/include/netdb.h @@ -59,6 +59,10 @@ #ifndef _NETDB_H_ #define _NETDB_H_ +#ifdef __cplusplus +extern "C" { +#endif + // Internet protocols struct protoent { char *p_name; @@ -92,4 +96,7 @@ struct hostent { struct hostent *gethostbyname(const char *host); struct hostent *gethostbyaddr(const char *addr, int len, int type); +#ifdef __cplusplus +} +#endif #endif // _NETDB_H_ diff --git a/packages/net/tcpip/current/include/network.h b/packages/net/tcpip/current/include/network.h --- a/packages/net/tcpip/current/include/network.h +++ b/packages/net/tcpip/current/include/network.h @@ -88,15 +88,15 @@ extern cyg_bool_t eth1_up; extern const char *eth1_name; #endif -extern void init_all_network_interfaces(void); +__externC void init_all_network_interfaces(void); -extern void route_reinit(void); -extern void perror(const char *); -extern int close(int); -extern ssize_t read(int, void *, size_t); -extern ssize_t write(int, const void *, size_t); -extern char *inet_ntoa(struct in_addr); -extern int select(int, fd_set *, fd_set *, fd_set *, struct timeval *tv); +__externC void route_reinit(void); +__externC void perror(const char *); +__externC int close(int); +__externC ssize_t read(int, void *, size_t); +__externC ssize_t write(int, const void *, size_t); +__externC char *inet_ntoa(struct in_addr); +__externC int select(int, fd_set *, fd_set *, fd_set *, struct timeval *tv); // This API is for our own automated network tests. // It's not at all supported. diff --git a/packages/net/tcpip/current/include/tftp_support.h b/packages/net/tcpip/current/include/tftp_support.h --- a/packages/net/tcpip/current/include/tftp_support.h +++ b/packages/net/tcpip/current/include/tftp_support.h @@ -97,15 +97,15 @@ struct tftpd_fileops { #define O_WRONLY 2 #endif -extern int tftpd_start(int, struct tftpd_fileops *); -extern int tftpd_stop(int); +__externC int tftpd_start(int, struct tftpd_fileops *); +__externC int tftpd_stop(int); /* * Client support */ -extern int tftp_get(char *, struct sockaddr_in *, char *, int, int, int *); -extern int tftp_put(char *, struct sockaddr_in *, char *, int, int, int *); +__externC int tftp_get(char *, struct sockaddr_in *, char *, int, int, int *); +__externC int tftp_put(char *, struct sockaddr_in *, char *, int, int, int *); #define TFTP_TIMEOUT_PERIOD 5 // Seconds between retries #define TFTP_TIMEOUT_MAX 50 // Max timeouts over all blocks diff --git a/packages/net/tcpip/current/src/lib/getserv.c b/packages/net/tcpip/current/src/lib/getserv.c --- a/packages/net/tcpip/current/src/lib/getserv.c +++ b/packages/net/tcpip/current/src/lib/getserv.c @@ -2,7 +2,7 @@ // // lib/getserv.c // -// getservbyname(), getservbynumber() +// getservbyname(), getservbyport() // //========================================================================== //####COPYRIGHTBEGIN#### @@ -79,7 +79,7 @@ getservbyname(const char *name, const ch } struct servent * -getservbynumber(const int num, const char *proto) +getservbyport(const int num, const char *proto) { struct servent *p = services; while (p->s_name) { diff --git a/packages/net/tcpip/current/src/lib/network_support.c b/packages/net/tcpip/current/src/lib/network_support.c --- a/packages/net/tcpip/current/src/lib/network_support.c +++ b/packages/net/tcpip/current/src/lib/network_support.c @@ -277,8 +277,15 @@ init_all_network_interfaces(void) if ( ! eth0_up ) { // Make this call idempotent #ifdef CYGPKG_IO_PCMCIA if ((t = eth_drv_netdev("eth0")) != (cyg_netdevtab_entry_t *)NULL) { + int tries = 0; while (t->status != CYG_NETDEVTAB_STATUS_AVAIL) { - diag_printf("... Waiting for PCMCIA device 'eth0'\n"); + if (tries == 0) { + diag_printf("... Waiting for PCMCIA device 'eth0'\n"); + } + if (++tries == 5) { + diag_printf("... Giving up on PCMCIA device 'eth0'\n"); + goto bail_eth0; + } cyg_thread_delay(100); } } @@ -314,14 +321,22 @@ init_all_network_interfaces(void) string(CYGHWR_NET_DRIVER_ETH0_ADDRS_SERVER)); show_bootp(eth0_name, ð0_bootp_data); #endif + bail_eth0: } #endif // CYGHWR_NET_DRIVER_ETH0 #ifdef CYGHWR_NET_DRIVER_ETH1 if ( ! eth1_up ) { // Make this call idempotent #ifdef CYGPKG_IO_PCMCIA if ((t = eth_drv_netdev("eth1")) != (cyg_netdevtab_entry_t *)NULL) { + int tries = 0; while (t->status != CYG_NETDEVTAB_STATUS_AVAIL) { - diag_printf("... Waiting for PCMCIA device 'eth1'\n"); + if (tries == 0) { + diag_printf("... Waiting for PCMCIA device 'eth1'\n"); + } + if (++tries == 5) { + diag_printf("... Giving up on PCMCIA device 'eth1'\n"); + goto bail_eth1; + } cyg_thread_delay(100); } } @@ -357,6 +372,7 @@ init_all_network_interfaces(void) string(CYGHWR_NET_DRIVER_ETH1_ADDRS_SERVER)); show_bootp(eth1_name, ð1_bootp_data); #endif + bail_eth1: } #endif // CYGHWR_NET_DRIVER_ETH1 #ifdef CYGHWR_NET_DRIVER_ETH0 diff --git a/packages/redboot/current/ChangeLog b/packages/redboot/current/ChangeLog --- a/packages/redboot/current/ChangeLog +++ b/packages/redboot/current/ChangeLog @@ -1,3 +1,157 @@ +2001-03-28 Mark Salter + + * src/net/tcp.c (__tcp_handler): Don't send ACK from TIME_WAIT state + unless the FIN comes in again. + +2000-03-27 Grant Edwards + + * src/net/tcp.c (__tcp_handler): Fixed sequence number bug seen when + doing an active close. + +2001-03-23 Gary Thomas + + * src/printf.c (_vprintf): Support %u (unsigned) descriptor. + + * src/main.c (do_cksum): New command to compute and print a POSIX + checksum on a range of memory. + + * src/crc.c (posix_crc32): New routine - matches POSIX algorithm. + +2001-03-21 Gary Thomas + + * cdl/redboot.cdl: Back off previous change in number of packets. + Also change minimum - below this, network debugging fails. + + * src/flash.c (fis_write): New function - support raw writes to FLASH. + + * src/net/enet.c (__enet_poll): Try to continue if out of packets. + + * src/main.c: + * src/load.c: + * src/flash.c: + * include/redboot.h: Keep track of available "user" RAM. + + * cdl/redboot.cdl: Reduce default number of [network] packets. + +2001-03-20 Gary Thomas + + * src/net/net_io.c (net_io_test): Change for new calling convention. + + * src/main.c (cyg_start): Idle processing now in I/O routines. + + * src/io.c (gets): Move idle processing into this function. + + * include/net/net.h (net_io_test): Needs idle parameter. + + * include/redboot.h: Change 'idle' functions to take state (idle/not). + +2001-03-19 Jesper Skov + + * cdl/redboot.cdl: Put version.o file in the public lib directory + so other packages can get at it and link redboot. + +2001-03-16 Gary Thomas + + * src/flash.c (fis_create): Preserve memory [load/exec] address + when making assumptions [rewriting existing image]. + +2001-03-16 Mark Salter + + * src/main.c (cyg_start): Restore console channel after returning + from stub. + +2001-03-15 Gary Thomas +2001-03-15 Grant Edwards + + * src/net/bootp.c (bootp_handler): Guard against buffer overflow. + +2001-03-15 Hugo Tyson + + * src/flash.c (fis_create): The code was installing a default for + img_size from data_length of an extant record. That's zero, so, + so whilst the flash was erased, no data was copied in! + (fis_list): Added a -d to get the data length field displayed. + +2001-03-15 Jesper Skov + + * src/main.c: Make use of script variable conditional on flash. + + * include/redboot.h: Changed type of workspace_end to silence + warning. + + * src/net/ping.c (do_ping): Fix warning. + * src/net/pktbuf.c (__pktbuf_dump): Fix warnings. + +2001-03-14 Gary Thomas + + * src/main.c (do_go): Make timeout code consistent with other + versions, e.g. script timeout. Also, allow a script to continue + if it was in effect when 'go' was called and ^C was typed. + + * src/flash.c (fis_create): Ask for additional user verification + if any [important] parameters are being assumed [left out by user]. + This just adds a level of safety in the presence of assumptions. + +2001-03-13 Gary Thomas + + * src/main.c: Define 'workspace' based on MLT files, rather than + simply using end of RAM area. + + * src/flash.c: Use 'workspace' for scratch area. + + * include/redboot.h: Define new variables 'workspace_XXX' to specify + ares used by RedBoot for scratch, etc. + +2001-03-12 Jesper Skov + + * src/decompress.c: Removed Z_BAD_CRC hack. zlib does CRC checking + now. + +2001-03-09 Jesper Skov + + * src/misc_funs.c: Added strncpy. + * include/redboot.h: And declaration. + +2001-03-08 Jesper Skov + + * src/load.c (do_load): Added decompression support. + * src/flash.c (fis_load): Same. + + * src/decompress.c: Added. Interfaces the zlib API. + + * include/redboot.h: Added some definitions used by decompression + code. + + * cdl/redboot.cdl: Added option to control size of zlib bounce + buffer. + +2001-03-05 Jesper Skov + + * src/main.c (cyg_start): Make sure communication channels are + initialized. + +2001-03-03 Gary Thomas + + * src/main.c (do_idle): New function - all 'idle' handling is here. + + * src/io.c (mon_read_char_with_timeout): Improve timeout handling + when scanning for a console by applying the minimum possible value + (1 ms) to each channel, accumulating the total value. The previous + algorithm was quite poor on systems where there is no buffering, + i.e. serial channels with no FIFOs, because each channel would + wait for T/N (t = total timeout, N = number channels). This might + possibly have been much longer than the devices could tolerate and + still return valid data. + +2001-03-01 Gary Thomas + + * src/version.c: Add 'bootstrap' to banner so the world can see + more of what RedBoot's all about. + +2001-02-28 Gary Thomas + + * include/redboot.h: Fix prioritization of 'init' table entries. + 2001-02-26 Gary Thomas * include/redboot.h (RedBoot_INIT_PRIO): Slight change - avoid @@ -146,6 +300,7 @@ 2001-01-31 Nick Garnett /bin/redboot.elf : $(PREFIX)/lib/target.ld $(PREFIX)/lib/vectors.o $(PREFIX)/lib/libtarget.a $(PREFIX)/lib/libextras.a @sh -c "mkdir -p $(dir $@)" - $(CC) -c $(INCLUDE_PATH) $(CFLAGS) -o version.o $(REPOSITORY)/$(PACKAGE)/src/version.c - $(CC) $(LDFLAGS) -L$(PREFIX)/lib -Ttarget.ld -o $@ version.o + $(CC) -c $(INCLUDE_PATH) $(CFLAGS) -o $(PREFIX)/lib/version.o $(REPOSITORY)/$(PACKAGE)/src/version.c + $(CC) $(LDFLAGS) -L$(PREFIX)/lib -Ttarget.ld -o $@ $(PREFIX)/lib/version.o } } @@ -114,7 +115,7 @@ cdl_package CYGPKG_REDBOOT { display "Number of \[network\] packet buffers" flavor data default_value 4 - legal_values 2 to 8 + legal_values 3 to 8 description " RedBoot may need to buffer network data to support various connections. This option allows control over the number of such buffered packets, @@ -158,6 +159,22 @@ cdl_package CYGPKG_REDBOOT { tradeoff between responsiveness and overhead." } + cdl_option CYGNUM_REDBOOT_LOAD_ZLIB_BUFFER { + display "Size of zlib decompression buffer" + active_if CYGPKG_COMPRESS_ZLIB + flavor data + default_value 64 + legal_values 5 to 256 + description " + This is the size of the buffer filled with incoming data + during load before calls are made to the decompressor + function. For ethernet downloads this can be made bigger + (at the cost of memory), but for serial downloads on slow + processors it may be necessary to reduce the size to + avoid serial overruns. zlib appears to bail out if less than + five bytes are available initially so this is the minimum." + } + cdl_component CYGPKG_REDBOOT_FLASH { display "Allow RedBoot to support FLASH programming" flavor bool diff --git a/packages/redboot/current/include/net/net.h b/packages/redboot/current/include/net/net.h --- a/packages/redboot/current/include/net/net.h +++ b/packages/redboot/current/include/net/net.h @@ -564,7 +564,7 @@ extern int __skt_write(tcp_socket_t *s, extern void net_init(void); // Test for new network I/O connections -extern void net_io_test(void); +extern void net_io_test(bool is_idle); // Conversion between IP addresses and printable strings extern bool inet_aton(char *, in_addr_t *); diff --git a/packages/redboot/current/include/redboot.h b/packages/redboot/current/include/redboot.h --- a/packages/redboot/current/include/redboot.h +++ b/packages/redboot/current/include/redboot.h @@ -70,6 +70,9 @@ EXTERN int argc; #define MAX_ARGV 32 EXTERN char *argv[MAX_ARGV]; EXTERN unsigned char *ram_start, *ram_end; +EXTERN unsigned char *user_ram_start, *user_ram_end; +EXTERN unsigned char *workspace_start, *workspace_end; +EXTERN unsigned long workspace_size; EXTERN unsigned long *entry_address; #ifdef CYGPKG_REDBOOT_ANY_CONSOLE @@ -101,6 +104,7 @@ int strncmp(const char *s1, const char int strcmpci(const char *s1, const char *s2); int strncmpci(const char *s1, const char *s2, int len); char *strcpy(char *s1, const char *s2); +char *strncpy(char *s1, const char *s2, unsigned long n); void mon_write_char(char c); bool verify_action(char *fmt, ...); @@ -124,6 +128,26 @@ void end_console(int old_console); unsigned short crc16(unsigned char *buf, int len); unsigned long crc32(unsigned char *buf, int len); +#ifdef CYGPKG_COMPRESS_ZLIB +// Decompression support +typedef struct _pipe { + unsigned char* in_buf; // only changed by producer + int in_avail; // only changed by producer + unsigned char* out_buf; // only changed by consumer (init by producer) + int out_size; // only changed by consumer (init by producer) + const char* msg; // message from consumer + void* priv; // handler's data +} _pipe_t; + +typedef int _decompress_fun_init(_pipe_t*); +typedef int _decompress_fun_inflate(_pipe_t*); +typedef int _decompress_fun_close(_pipe_t*, int); + +externC _decompress_fun_init* _dc_init; +externC _decompress_fun_inflate* _dc_inflate; +externC _decompress_fun_close* _dc_close; +#endif // CYGPKG_COMPRESS_ZLIB + // CLI support functions bool parse_num(char *s, unsigned long *val, char **es, char *delim); bool parse_bool(char *s, bool *val); @@ -167,12 +191,19 @@ struct init_tab_entry _init_tab_##_p_##_ #define RedBoot_IDLE_NETIO 5000 #define RedBoot_IDLE_AFTER_NETIO 7000 #define RedBoot_IDLE_LAST 9999 +typedef void idle_fun(bool); +typedef idle_fun *idle_fun_ptr; struct idle_tab_entry { - void_fun_ptr fun; + idle_fun_ptr fun; } CYG_HAL_TABLE_TYPE; #define _RedBoot_idle(_f_,_p_) \ -struct idle_tab_entry _idle_tab_##_p_##_f_ CYG_HAL_TABLE_QUALIFIED_ENTRY(RedBoot_idle,_f_) = { _f_ }; +struct idle_tab_entry _idle_tab_##_p_##_f_ \ + CYG_HAL_TABLE_QUALIFIED_ENTRY(RedBoot_idle,_p_##_f_) = { _f_ }; #define RedBoot_idle(_f_,_p_) _RedBoot_idle(_f_,_p_) + +// This function called when changing idle/not - mostly used by I/O +// to support idle when timeout, etc. +void do_idle(bool state); // Option processing support diff --git a/packages/redboot/current/src/crc.c b/packages/redboot/current/src/crc.c --- a/packages/redboot/current/src/crc.c +++ b/packages/redboot/current/src/crc.c @@ -46,7 +46,7 @@ #include // Table of CRC constants - implements x^16+x^12+x^5+1 -static unsigned short crc16_tab[] = { +static const unsigned short crc16_tab[] = { 0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50a5, 0x60c6, 0x70e7, 0x8108, 0x9129, 0xa14a, 0xb16b, 0xc18c, 0xd1ad, 0xe1ce, 0xf1ef, 0x1231, 0x0210, 0x3273, 0x2252, 0x52b5, 0x4294, 0x72f7, 0x62d6, @@ -104,7 +104,7 @@ crc16(unsigned char *buf, int len) /* */ /* ====================================================================== */ -static unsigned long crc32_tab[] = { +static const unsigned long crc32_tab[] = { 0x00000000L, 0x77073096L, 0xee0e612cL, 0x990951baL, 0x076dc419L, 0x706af48fL, 0xe963a535L, 0x9e6495a3L, 0x0edb8832L, 0x79dcb8a4L, 0xe0d5e91eL, 0x97d2d988L, 0x09b64c2bL, 0x7eb17cbdL, 0xe7b82d07L, @@ -166,6 +166,7 @@ crc32(unsigned char *s, int len) { int i; unsigned long crc32val; + unsigned long length; crc32val = 0; for (i = 0; i < len; i++) { @@ -173,3 +174,64 @@ crc32(unsigned char *s, int len) } return crc32val; } + +// Same basic algorithm as above, but the bits are defined in the +// opposite order. This computation matches the output of the +// Linux 'cksum' program. + +static const unsigned long posix_crc32_tab[] = { + 0x00000000, 0x04C11DB7, 0x09823B6E, 0x0D4326D9, 0x130476DC, 0x17C56B6B, 0x1A864DB2, 0x1E475005, + 0x2608EDB8, 0x22C9F00F, 0x2F8AD6D6, 0x2B4BCB61, 0x350C9B64, 0x31CD86D3, 0x3C8EA00A, 0x384FBDBD, + 0x4C11DB70, 0x48D0C6C7, 0x4593E01E, 0x4152FDA9, 0x5F15ADAC, 0x5BD4B01B, 0x569796C2, 0x52568B75, + 0x6A1936C8, 0x6ED82B7F, 0x639B0DA6, 0x675A1011, 0x791D4014, 0x7DDC5DA3, 0x709F7B7A, 0x745E66CD, + 0x9823B6E0, 0x9CE2AB57, 0x91A18D8E, 0x95609039, 0x8B27C03C, 0x8FE6DD8B, 0x82A5FB52, 0x8664E6E5, + 0xBE2B5B58, 0xBAEA46EF, 0xB7A96036, 0xB3687D81, 0xAD2F2D84, 0xA9EE3033, 0xA4AD16EA, 0xA06C0B5D, + 0xD4326D90, 0xD0F37027, 0xDDB056FE, 0xD9714B49, 0xC7361B4C, 0xC3F706FB, 0xCEB42022, 0xCA753D95, + 0xF23A8028, 0xF6FB9D9F, 0xFBB8BB46, 0xFF79A6F1, 0xE13EF6F4, 0xE5FFEB43, 0xE8BCCD9A, 0xEC7DD02D, + 0x34867077, 0x30476DC0, 0x3D044B19, 0x39C556AE, 0x278206AB, 0x23431B1C, 0x2E003DC5, 0x2AC12072, + 0x128E9DCF, 0x164F8078, 0x1B0CA6A1, 0x1FCDBB16, 0x018AEB13, 0x054BF6A4, 0x0808D07D, 0x0CC9CDCA, + 0x7897AB07, 0x7C56B6B0, 0x71159069, 0x75D48DDE, 0x6B93DDDB, 0x6F52C06C, 0x6211E6B5, 0x66D0FB02, + 0x5E9F46BF, 0x5A5E5B08, 0x571D7DD1, 0x53DC6066, 0x4D9B3063, 0x495A2DD4, 0x44190B0D, 0x40D816BA, + 0xACA5C697, 0xA864DB20, 0xA527FDF9, 0xA1E6E04E, 0xBFA1B04B, 0xBB60ADFC, 0xB6238B25, 0xB2E29692, + 0x8AAD2B2F, 0x8E6C3698, 0x832F1041, 0x87EE0DF6, 0x99A95DF3, 0x9D684044, 0x902B669D, 0x94EA7B2A, + 0xE0B41DE7, 0xE4750050, 0xE9362689, 0xEDF73B3E, 0xF3B06B3B, 0xF771768C, 0xFA325055, 0xFEF34DE2, + 0xC6BCF05F, 0xC27DEDE8, 0xCF3ECB31, 0xCBFFD686, 0xD5B88683, 0xD1799B34, 0xDC3ABDED, 0xD8FBA05A, + 0x690CE0EE, 0x6DCDFD59, 0x608EDB80, 0x644FC637, 0x7A089632, 0x7EC98B85, 0x738AAD5C, 0x774BB0EB, + 0x4F040D56, 0x4BC510E1, 0x46863638, 0x42472B8F, 0x5C007B8A, 0x58C1663D, 0x558240E4, 0x51435D53, + 0x251D3B9E, 0x21DC2629, 0x2C9F00F0, 0x285E1D47, 0x36194D42, 0x32D850F5, 0x3F9B762C, 0x3B5A6B9B, + 0x0315D626, 0x07D4CB91, 0x0A97ED48, 0x0E56F0FF, 0x1011A0FA, 0x14D0BD4D, 0x19939B94, 0x1D528623, + 0xF12F560E, 0xF5EE4BB9, 0xF8AD6D60, 0xFC6C70D7, 0xE22B20D2, 0xE6EA3D65, 0xEBA91BBC, 0xEF68060B, + 0xD727BBB6, 0xD3E6A601, 0xDEA580D8, 0xDA649D6F, 0xC423CD6A, 0xC0E2D0DD, 0xCDA1F604, 0xC960EBB3, + 0xBD3E8D7E, 0xB9FF90C9, 0xB4BCB610, 0xB07DABA7, 0xAE3AFBA2, 0xAAFBE615, 0xA7B8C0CC, 0xA379DD7B, + 0x9B3660C6, 0x9FF77D71, 0x92B45BA8, 0x9675461F, 0x8832161A, 0x8CF30BAD, 0x81B02D74, 0x857130C3, + 0x5D8A9099, 0x594B8D2E, 0x5408ABF7, 0x50C9B640, 0x4E8EE645, 0x4A4FFBF2, 0x470CDD2B, 0x43CDC09C, + 0x7B827D21, 0x7F436096, 0x7200464F, 0x76C15BF8, 0x68860BFD, 0x6C47164A, 0x61043093, 0x65C52D24, + 0x119B4BE9, 0x155A565E, 0x18197087, 0x1CD86D30, 0x029F3D35, 0x065E2082, 0x0B1D065B, 0x0FDC1BEC, + 0x3793A651, 0x3352BBE6, 0x3E119D3F, 0x3AD08088, 0x2497D08D, 0x2056CD3A, 0x2D15EBE3, 0x29D4F654, + 0xC5A92679, 0xC1683BCE, 0xCC2B1D17, 0xC8EA00A0, 0xD6AD50A5, 0xD26C4D12, 0xDF2F6BCB, 0xDBEE767C, + 0xE3A1CBC1, 0xE760D676, 0xEA23F0AF, 0xEEE2ED18, 0xF0A5BD1D, 0xF464A0AA, 0xF9278673, 0xFDE69BC4, + 0x89B8FD09, 0x8D79E0BE, 0x803AC667, 0x84FBDBD0, 0x9ABC8BD5, 0x9E7D9662, 0x933EB0BB, 0x97FFAD0C, + 0xAFB010B1, 0xAB710D06, 0xA6322BDF, 0xA2F33668, 0xBCB4666D, 0xB8757BDA, 0xB5365D03, 0xB1F740B4 + }; + +// Compute a CRC, using the POSIX 1003 definition + +unsigned long +posix_crc32(unsigned char *s, int len) +{ + int i; + unsigned long crc32val; + unsigned long length; + + crc32val = 0; + for (i = 0; i < len; i++) { + crc32val = (crc32val << 8) ^ posix_crc32_tab[((crc32val >> 24) ^ *s++) & 0xFF]; + } + length = len; + while (length > 0) { + crc32val = (crc32val << 8) ^ posix_crc32_tab[((crc32val >> 24) ^ length) & 0xFF]; + length >>= 8; + } + crc32val = ~crc32val; + return crc32val; +} diff --git a/packages/redboot/current/src/decompress.c b/packages/redboot/current/src/decompress.c new file mode 100644 --- /dev/null +++ b/packages/redboot/current/src/decompress.c @@ -0,0 +1,109 @@ +//========================================================================== +// +// decompress.c +// +// RedBoot decompress support +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jskov +// Contributors: jskov +// Date: 2001-03-08 +// Purpose: +// Description: +// +// This code is part of RedBoot (tm). +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include + +#ifdef CYGPKG_COMPRESS_ZLIB +#include +static z_stream stream; + +static int +gzip_init(_pipe_t* p) +{ + int err; + + stream.zalloc = (alloc_func)0; + stream.zfree = (free_func)0; + stream.next_in = NULL; + stream.avail_in = 0; + stream.next_out = NULL; + stream.avail_out = 0; + err = inflateInit(&stream); + + return err; +} + +static int +gzip_inflate(_pipe_t* p) +{ + int err; + + stream.next_in = p->in_buf; + stream.avail_in = p->in_avail; + stream.next_out = p->out_buf; + stream.avail_out = -1; // no limits + err = inflate(&stream, Z_SYNC_FLUSH); + p->out_size += (stream.next_out - p->out_buf); + p->out_buf = stream.next_out; + p->msg = stream.msg; + + return err; +} + +static int +gzip_close(_pipe_t* p, int err) +{ + switch (err) { + case Z_STREAM_END: + err = 0; + break; + case Z_OK: + // Decompression didn't complete + p->msg = "premature end of input"; + // fall-through + default: + err = -1; + break; + } + + inflateEnd(&stream); + + return err; +} + +_decompress_fun_init* _dc_init = gzip_init; +_decompress_fun_inflate* _dc_inflate = gzip_inflate; +_decompress_fun_close* _dc_close = gzip_close; +#endif // CYGPKG_COMPRESS_ZLIB diff --git a/packages/redboot/current/src/flash.c b/packages/redboot/current/src/flash.c --- a/packages/redboot/current/src/flash.c +++ b/packages/redboot/current/src/flash.c @@ -70,7 +70,7 @@ local_cmd_entry("init", ); local_cmd_entry("list", "Display contents of FLASH Image System [FIS]", - "[-c]", + "[-c] [-d]", fis_list, FIS_cmds ); @@ -106,9 +106,16 @@ local_cmd_entry("delete", fis_delete, FIS_cmds ); + +static char fis_load_usage[] = +#ifdef CYGPKG_COMPRESS_ZLIB + "[-d] " +#endif + "[-b ] [-c] name"; + local_cmd_entry("load", "Load image from FLASH Image System [FIS] into RAM", - "[-b ] [-c] name", + fis_load_usage, fis_load, FIS_cmds ); @@ -119,6 +126,12 @@ local_cmd_entry("create", fis_create, FIS_cmds ); +local_cmd_entry("write", + "Write raw data directly to FLASH", + "-f -b -l ", + fis_write, + FIS_cmds + ); // Define table boundaries CYG_HAL_TABLE_BEGIN( __FIS_cmds_TAB__, FIS_cmds); @@ -308,24 +321,33 @@ fis_list(int argc, char *argv[]) struct fis_image_desc *img; int i; bool show_cksums = false; - struct option_info opts[1]; + bool show_datalen = false; + struct option_info opts[2]; init_opts(&opts[0], 'c', false, OPTION_ARG_TYPE_FLG, (void **)&show_cksums, (bool *)0, "display checksums"); - if (!scan_opts(argc, argv, 2, opts, 1, 0, 0, "")) + init_opts(&opts[1], 'd', false, OPTION_ARG_TYPE_FLG, + (void **)&show_datalen, (bool *)0, "display data length"); + if (!scan_opts(argc, argv, 2, opts, 2, 0, 0, "")) { return; } - img = (struct fis_image_desc *)((unsigned long)flash_end - block_size); - printf("Name FLASH addr %s Length Entry point\n", - show_cksums ? "Checksum" : "Mem addr"); + img = (struct fis_image_desc *)((unsigned long)flash_end - block_size); + // Let printf do the formatting in both cases, rather than cnouting + // cols by hand.... + printf("%-16s %-10s %-10s %-10s %-s\n", + "Name","FLASH addr", + show_cksums ? "Checksum" : "Mem addr", + show_datalen ? "Datalen" : "Length", + "Entry point" ); for (i = 0; i < block_size/sizeof(*img); i++, img++) { if (img->name[0] != (unsigned char)0xFF) { - printf("%-16s 0x%08lX 0x%08lX 0x%08lX 0x%08lX\n", img->name, + printf("%-16s 0x%08lX 0x%08lX 0x%08lX 0x%08lX\n", img->name, img->flash_base, show_cksums ? img->file_cksum : img->mem_base, - img->size, img->entry_point); + show_datalen ? img->data_length : img->size, + img->entry_point); } } } @@ -423,7 +445,7 @@ fis_create(int argc, char *argv[]) bool no_copy = false; void *fis_addr, *err_addr; struct fis_image_desc *img; - bool slot_found; + bool slot_found, defaults_assumed; struct option_info opts[7]; bool prog_ok; @@ -447,7 +469,8 @@ fis_create(int argc, char *argv[]) return; } - if ( name ) { + defaults_assumed = false; + if (name) { // Search existing files to acquire defaults for params not specified: fis_addr = (void *)((unsigned long)flash_end - block_size); memcpy(fis_work_block, fis_addr, block_size); @@ -455,13 +478,26 @@ fis_create(int argc, char *argv[]) for (i = 0; i < block_size/sizeof(*img); i++, img++) { if ((img->name[0] != (unsigned char)0xFF) && (strcmp(name, img->name) == 0)) { // Found it, so get any unset but necessary params from there: - if ( !length_set ) { + if (!length_set) { length_set = true; length = img->size; + defaults_assumed = true; } - if ( !flash_addr_set ) { + // img_size can also be handled below, set from length + if (!img_size_set && 0 < img->data_length) { + img_size_set = true; + img_size = img->data_length; + defaults_assumed = true; + } + if (!exec_addr_set) { + // Preserve "normal" behaviour + exec_addr_set = true; + exec_addr = flash_addr_set ? flash_addr : mem_addr; + } + if (!flash_addr_set) { flash_addr_set = true; flash_addr = img->flash_base; + defaults_assumed = true; } break; } @@ -525,8 +561,15 @@ fis_create(int argc, char *argv[]) } if (!verify_action("An image named '%s' exists", name)) { return; - } else { + } else { slot_found = true; + if (defaults_assumed) { + if (!verify_action("* CAUTION * about to program '%s'\n at %p..%p from %p", + name, (void *)flash_addr, (void *)(flash_addr+img_size-1), + (void *)mem_addr)) { + return; // The guy gave up + } + } break; } } @@ -592,6 +635,76 @@ fis_create(int argc, char *argv[]) } static void +fis_write(int argc, char *argv[]) +{ + int stat; + unsigned long mem_addr, flash_addr, length; + bool mem_addr_set = false; + bool flash_addr_set = false; + bool length_set = false; + void *err_addr; + struct option_info opts[3]; + bool prog_ok; + + init_opts(&opts[0], 'b', true, OPTION_ARG_TYPE_NUM, + (void **)&mem_addr, (bool *)&mem_addr_set, "memory base address"); + init_opts(&opts[1], 'f', true, OPTION_ARG_TYPE_NUM, + (void **)&flash_addr, (bool *)&flash_addr_set, "FLASH memory base address"); + init_opts(&opts[2], 'l', true, OPTION_ARG_TYPE_NUM, + (void **)&length, (bool *)&length_set, "image length [in FLASH]"); + if (!scan_opts(argc, argv, 2, opts, 3, 0, 0, 0)) + { + fis_usage("invalid arguments"); + return; + } + + if (!mem_addr_set || !flash_addr_set || !length_set) + fis_usage("required parameter missing"); + + // Round up length to FLASH block size +#ifndef CYGPKG_HAL_MIPS // FIXME: compiler is b0rken + length = ((length + block_size - 1) / block_size) * block_size; +#endif + if (flash_addr_set && + ((stat = flash_verify_addr((void *)flash_addr)) || + (stat = flash_verify_addr((void *)(flash_addr+length-1))))) { + printf("Invalid FLASH address: %p (%s)\n", (void *)flash_addr, flash_errmsg(stat)); + printf(" valid range is %p-%p\n", (void *)flash_start, (void *)flash_end); + return; + } + if ((mem_addr < (unsigned long)ram_start) || + ((mem_addr+length) >= (unsigned long)ram_end)) { + printf("** WARNING: RAM address: %p may be invalid\n", (void *)mem_addr); + printf(" valid range is %p-%p\n", (void *)ram_start, (void *)ram_end); + } + // Safety check - make sure the address range is not within the code we're running + if (flash_code_overlaps((void *)flash_addr, (void *)(flash_addr+length-1))) { + printf("Can't program this region - contains code in use!\n"); + return; + } + if (!verify_action("* CAUTION * about to program FLASH at %p..%p from %p", + (void *)flash_addr, (void *)(flash_addr+length-1), + (void *)mem_addr)) { + return; // The guy gave up + } + prog_ok = true; + if (prog_ok) { + // Erase area to be programmed + if ((stat = flash_erase((void *)flash_addr, length, (void **)&err_addr)) != 0) { + printf("Can't erase region at %p: 0x%x(%s)\n", err_addr, stat, flash_errmsg(stat)); + prog_ok = false; + } + } + if (prog_ok) { + // Now program it + if ((stat = flash_program((void *)flash_addr, (void *)mem_addr, length, (void **)&err_addr)) != 0) { + printf("Can't program region at %p: 0x%x(%s)\n", err_addr, stat, flash_errmsg(stat)); + prog_ok = false; + } + } +} + +static void fis_erase(int argc, char *argv[]) { int stat; @@ -794,14 +907,23 @@ fis_load(int argc, char *argv[]) unsigned long mem_addr; bool mem_addr_set = false; bool show_cksum = false; - struct option_info opts[2]; + struct option_info opts[3]; unsigned long cksum; + int num_options; + bool decompress = false; init_opts(&opts[0], 'b', true, OPTION_ARG_TYPE_NUM, (void **)&mem_addr, (bool *)&mem_addr_set, "memory [load] base address"); init_opts(&opts[1], 'c', false, OPTION_ARG_TYPE_FLG, (void **)&show_cksum, (bool *)0, "display checksum"); - if (!scan_opts(argc, argv, 2, opts, 2, (void **)&name, OPTION_ARG_TYPE_STR, "image name")) + num_options = 2; +#ifdef CYGPKG_COMPRESS_ZLIB + init_opts(&opts[2], 'd', false, OPTION_ARG_TYPE_FLG, + (void **)&decompress, 0, "decompress"); + num_options++; +#endif + + if (!scan_opts(argc, argv, 2, opts, num_options, (void **)&name, OPTION_ARG_TYPE_STR, "image name")) { fis_usage("invalid arguments"); return; @@ -814,18 +936,45 @@ fis_load(int argc, char *argv[]) mem_addr = img->mem_base; } // Load image from FLASH into RAM - if ((mem_addr < (unsigned long)ram_start) || - ((mem_addr+img->size) >= (unsigned long)ram_end)) { + if ((mem_addr < (unsigned long)user_ram_start) || + ((mem_addr+img->size) >= (unsigned long)user_ram_end)) { printf("Not a loadable image\n"); return; } - memcpy((void *)mem_addr, (void *)img->flash_base, img->data_length); +#ifdef CYGPKG_COMPRESS_ZLIB + if (decompress) { + int err; + _pipe_t fis_load_pipe; + _pipe_t* p = &fis_load_pipe; + p->out_buf = (unsigned char*) mem_addr; + p->out_size = -1; + p->in_buf = (unsigned char*) img->flash_base; + p->in_avail = img->data_length; + + err = (*_dc_init)(p); + + if (0 == err) + err = (*_dc_inflate)(p); + + // Free used resources, do final translation of + // error value. + err = (*_dc_close)(p, err); + + if (0 != err && p->msg) + printf("zlib: %s\n", p->msg); + + } else // dangling block +#endif + { + memcpy((void *)mem_addr, (void *)img->flash_base, img->data_length); + } entry_address = (unsigned long *)img->entry_point; cksum = crc32((unsigned char *)mem_addr, img->data_length); if (show_cksum) { printf("Checksum: 0x%08lx\n", cksum); } - if (img->file_cksum) { + // When decompressing, leave CRC checking to decompressor + if (!decompress && img->file_cksum) { if (cksum != img->file_cksum) { printf("** Warning - checksum failure. stored: 0x%08lx, computed: 0x%08lx\n", img->file_cksum, cksum); @@ -841,7 +990,7 @@ do_flash_init(void) if (!init) { init = 1; - if ((stat = flash_init((void *)(ram_end-FLASH_MIN_WORKSPACE), + if ((stat = flash_init((void *)(workspace_end-FLASH_MIN_WORKSPACE), FLASH_MIN_WORKSPACE)) != 0) { printf("FLASH: driver init failed!, status: 0x%x\n", stat); return false; @@ -850,7 +999,8 @@ do_flash_init(void) flash_get_block_info(&block_size, &blocks); printf("FLASH: %p - %p, %d blocks of %p bytes each.\n", flash_start, flash_end, blocks, (void *)block_size); - fis_work_block = (unsigned char *)(ram_end-FLASH_MIN_WORKSPACE-block_size); + fis_work_block = (unsigned char *)(workspace_end-FLASH_MIN_WORKSPACE-block_size); + workspace_end = fis_work_block; } return true; } diff --git a/packages/redboot/current/src/io.c b/packages/redboot/current/src/io.c --- a/packages/redboot/current/src/io.c +++ b/packages/redboot/current/src/io.c @@ -90,28 +90,35 @@ mon_read_char(char *c) } } +#ifdef CYGPKG_REDBOOT_ANY_CONSOLE +static int _mon_timeout; +#endif + static bool mon_read_char_with_timeout(char *c) { - bool res; + bool res = false; hal_virtual_comm_table_t *__chan; #ifdef CYGPKG_REDBOOT_ANY_CONSOLE if (!console_selected) { int cur = CYGACC_CALL_IF_SET_CONSOLE_COMM(CYGNUM_CALL_IF_SET_COMM_ID_QUERY_CURRENT); - int i; + int i, tot; // Try input from all channels - for (i = 0; i < CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS; i++) { - CYGACC_CALL_IF_SET_CONSOLE_COMM(i); - __chan = CYGACC_CALL_IF_CONSOLE_PROCS(); - res = CYGACC_COMM_IF_GETC_TIMEOUT(*__chan, c); - if (res) { - // Input available on this channel, make it be the console - if (*c != '\0') { - // Don't chose this unless real data have arrived - console_selected = true; - CYGACC_CALL_IF_SET_DEBUG_COMM(i); - return res; + tot = 0; + while (tot < _mon_timeout) { + for (i = 0; i < CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS; i++, tot++) { + CYGACC_CALL_IF_SET_CONSOLE_COMM(i); + __chan = CYGACC_CALL_IF_CONSOLE_PROCS(); + res = CYGACC_COMM_IF_GETC_TIMEOUT(*__chan, c); + if (res) { + // Input available on this channel, make it be the console + if (*c != '\0') { + // Don't chose this unless real data have arrived + console_selected = true; + CYGACC_CALL_IF_SET_DEBUG_COMM(i); + return res; + } } } } @@ -139,8 +146,9 @@ mon_set_read_char_timeout(int ms) if (!console_selected) { int cur = CYGACC_CALL_IF_SET_CONSOLE_COMM(CYGNUM_CALL_IF_SET_COMM_ID_QUERY_CURRENT); int i; - // Set timeout on each channel so total amounts to desired value - ms = ms / CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS; + // Set timeout to minimum on each channel; total amounts to desired value + _mon_timeout = ms; + ms = 1; for (i = 0; i < CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS; i++) { CYGACC_CALL_IF_SET_CONSOLE_COMM(i); if ((__chan = CYGACC_CALL_IF_CONSOLE_PROCS()) != 0) { @@ -178,6 +186,7 @@ gets(char *buf, int buflen, int timeout) #ifdef CYGSEM_REDBOOT_FLASH_CONFIG if (script && *script) { c = *script++; + do_idle(false); } else #endif if ((timeout > 0) && (ptr == buf)) { @@ -186,11 +195,13 @@ gets(char *buf, int buflen, int timeout) res = mon_read_char_with_timeout(&c); if (res) { // Got a character + do_idle(false); break; } timeout -= 50; } if (res == false) { + do_idle(true); return _GETS_TIMEOUT; // Input timed out } } else { diff --git a/packages/redboot/current/src/load.c b/packages/redboot/current/src/load.c --- a/packages/redboot/current/src/load.c +++ b/packages/redboot/current/src/load.c @@ -46,10 +46,19 @@ #include #include +#ifdef CYGPKG_COMPRESS_ZLIB +static unsigned char _buffer[CYGNUM_REDBOOT_LOAD_ZLIB_BUFFER]; +static _pipe_t load_pipe; +#endif + // Buffer used by redboot_getc getc_info_t getc_info; -static char usage[] = "[-r] [-v] [-h ] [-m {TFTP | xyzMODEM}]\n" +static char usage[] = "[-r] [-v] " +#ifdef CYGPKG_COMPRESS_ZLIB + "[-d] " +#endif + "[-h ] [-m {TFTP | xyzMODEM}]\n" " [-b ] "; // Exported CLI function @@ -59,10 +68,11 @@ RedBoot_cmd("load", do_load ); -static void +static unsigned long load_elf_image(int (*getc)(void)) { printf("ELF images not supported\n"); + return 0; } // @@ -102,7 +112,7 @@ static long // data which has only one section, e.g. a ROM image. // #define MAX_LINE 80 -static void +static unsigned long load_srec_image(int (*getc)(void), unsigned long base) { char line[MAX_LINE]; @@ -122,14 +132,14 @@ load_srec_image(int (*getc)(void), unsig if (c != 'S') { printf("Invalid S-record at offset %p, input: %c\n", (void *)offset, c); - return; + return 0; } type = (*getc)(); offset += 2; sum = 0; if ((count = _hex2(getc, 1, &sum)) < 0) { printf("Bad S-record count at offset %p\n", (void *)offset); - return; + return 0; } offset += 1; switch (type) { @@ -153,9 +163,9 @@ load_srec_image(int (*getc)(void), unsig if ((unsigned long)(addr-addr_offset) < lowest_address) { lowest_address = (unsigned long)(addr - addr_offset); } - if ((addr < ram_start) || (addr > ram_end)) { + if ((addr < user_ram_start) || (addr > user_ram_end)) { printf("Attempt to load S-record data to address: %p [not in RAM]\n", (void*)addr); - return; + return 0; } count -= ((type-'1'+2)+1); offset += count; @@ -170,7 +180,7 @@ load_srec_image(int (*getc)(void), unsig if (cksum != sum) { printf("*** Warning! Checksum failure - Addr: %lx, %02lX <> %02lX\n", (unsigned long)base_addr, sum, cksum); - return; + return 0; } if ((unsigned long)(addr-addr_offset) > highest_address) { highest_address = (unsigned long)(addr - addr_offset); @@ -185,14 +195,15 @@ load_srec_image(int (*getc)(void), unsig printf("Entry point: %p, address range: %p-%p\n", (void*)entry_address, (void *)lowest_address, (void *)highest_address); while ((c = (*getc)()) > 0) ; // Swallow rest of data - return; + return highest_address; default: printf("Invalid S-record at offset 0x%lx, type: %x\n", (unsigned long)offset, type); - return; + return 0; } while ((c = (*getc)()) != '\n') offset++; } + return 0; } @@ -261,10 +272,14 @@ do_load(int argc, char *argv[]) bool hostname_set; char *hostname; #endif +#ifdef CYGPKG_COMPRESS_ZLIB + bool decompress; +#endif unsigned long base = 0; + unsigned long end = 0; char type[4]; char *filename = 0; - struct option_info opts[5]; + struct option_info opts[6]; #ifdef CYGPKG_REDBOOT_NETWORKING memset((char *)&host, 0, sizeof(host)); @@ -291,8 +306,14 @@ do_load(int argc, char *argv[]) #ifdef CYGPKG_REDBOOT_NETWORKING init_opts(&opts[4], 'h', true, OPTION_ARG_TYPE_STR, (void **)&hostname, (bool *)&hostname_set, "host name (IP address)"); - num_options = 5; + num_options++; #endif +#ifdef CYGPKG_COMPRESS_ZLIB + init_opts(&opts[5], 'd', false, OPTION_ARG_TYPE_FLG, + (void **)&decompress, 0, "decompress"); + num_options++; +#endif + if (!scan_opts(argc, argv, 1, opts, num_options, (void *)&filename, OPTION_ARG_TYPE_STR, "file name")) { return; @@ -340,8 +361,8 @@ do_load(int argc, char *argv[]) return; } if (base_addr_set && - ((base < (unsigned long)ram_start) || - (base > (unsigned long)ram_end))) { + ((base < (unsigned long)user_ram_start) || + (base > (unsigned long)user_ram_end))) { printf("Specified address (%p) is not in RAM.\n", (void*)base); return; } @@ -378,19 +399,55 @@ do_load(int argc, char *argv[]) if (!base_addr_set) { printf("Raw load requires a memory address\n"); } else { - unsigned char *mp = (unsigned char *)base; - while ((res = redboot_getc()) >= 0) { - *mp++ = res; +#ifdef CYGPKG_COMPRESS_ZLIB + if (decompress) { + _pipe_t* p = &load_pipe; + p->out_buf = (unsigned char*) base; + p->out_size = 0; + p->in_buf = _buffer; + + err = (*_dc_init)(p); + + while (0 == err) { + p->in_avail = 0; + for (i = 0; i < CYGNUM_REDBOOT_LOAD_ZLIB_BUFFER; i++) { + res = redboot_getc(); + if (res < 0) break; + p->in_buf[p->in_avail++] = res; + } + if (0 == p->in_avail) break; + + err = (*_dc_inflate)(p); + } + + // Free used resources, do final translation of + // error value. + err = (*_dc_close)(p, err); + + if (0 != err && p->msg) + printf("zlib: %s\n", p->msg); + + end = (unsigned long) base + p->out_size; + } else // dangling block +#endif + { + unsigned char *mp = (unsigned char *)base; + while ((res = redboot_getc()) >= 0) { + *mp++ = res; + } + err = 0; + end = (unsigned long) mp; } - printf("Raw file loaded %p-%p\n", (void *)base, (void *)mp); + if (0 == err) + printf("Raw file loaded %p-%p\n", (void *)base, (void *)end); } } else { // Treat data as some sort of executable image if (strncmp(&type[1], "ELF", 3) == 0) { - load_elf_image(redboot_getc); + end = load_elf_image(redboot_getc); } else if ((type[0] == 'S') && ((type[1] >= '0') && (type[1] <= '9'))) { - load_srec_image(redboot_getc, base); + end = load_srec_image(redboot_getc, base); } else { printf("Unrecognized image type: %lx\n", *(unsigned long *)type); } diff --git a/packages/redboot/current/src/main.c b/packages/redboot/current/src/main.c --- a/packages/redboot/current/src/main.c +++ b/packages/redboot/current/src/main.c @@ -47,6 +47,7 @@ #include #include #include +#include #include #include CYGHWR_MEMORY_LAYOUT_H @@ -84,6 +85,11 @@ RedBoot_cmd("dump", "-b [-l ]", do_dump ); +RedBoot_cmd("cksum", + "Compute a 32bit checksum [POSIX algorithm] for a range of memory", + "-b -l ", + do_cksum + ); RedBoot_cmd("cache", "Manage machine caches", "[ON | OFF]", @@ -123,7 +129,20 @@ do_version(int argc, char *argv[]) printf("Platform: %s (%s) %s\n", HAL_PLATFORM_BOARD, HAL_PLATFORM_CPU, HAL_PLATFORM_EXTRA); #endif printf("Copyright (C) 2000, 2001, Red Hat, Inc.\n\n"); - printf("RAM: %p-%p\n", (void*)ram_start, (void*)ram_end); + printf("RAM: %p-%p, %p-%p available\n", + (void*)ram_start, (void*)ram_end, + (void*)user_ram_start, (void *)user_ram_end); +} + +void +do_idle(bool is_idle) +{ + struct idle_tab_entry *idle_entry; + + for (idle_entry = __RedBoot_IDLE_TAB__; + idle_entry != &__RedBoot_IDLE_TAB_END__; idle_entry++) { + (*idle_entry->fun)(is_idle); + } } // @@ -136,10 +155,16 @@ cyg_start(void) bool prompt = true; static char line[CYGPKG_REDBOOT_MAX_CMD_LINE]; struct cmd *cmd; - int cur = CYGACC_CALL_IF_SET_CONSOLE_COMM(CYGNUM_CALL_IF_SET_COMM_ID_QUERY_CURRENT); + int cur; struct init_tab_entry *init_entry; - struct idle_tab_entry *idle_entry; + + // Make sure the channels are properly initialized. + hal_if_diag_init(); + // Force console to output raw text - but remember the old setting + // so it can be restored if interaction with a debugger is + // required. + cur = CYGACC_CALL_IF_SET_CONSOLE_COMM(CYGNUM_CALL_IF_SET_COMM_ID_QUERY_CURRENT); CYGACC_CALL_IF_SET_CONSOLE_COMM(CYGNUM_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL); #ifdef CYGPKG_REDBOOT_ANY_CONSOLE console_selected = false; @@ -155,15 +180,31 @@ cyg_start(void) ram_end = HAL_MEM_REAL_REGION_TOP( ram_end_tmp ); } #endif +#ifdef CYGMEM_SECTION_heap1 + workspace_start = (unsigned char *)CYGMEM_SECTION_heap1; + workspace_end = (unsigned char *)(CYGMEM_SECTION_heap1+CYGMEM_SECTION_heap1_SIZE); + workspace_size = CYGMEM_SECTION_heap1_SIZE; +#else + workspace_start = (unsigned char *)CYGMEM_REGION_ram; + workspace_end = (unsigned char *)(CYGMEM_REGION_ram+CYGMEM_REGION_ram_SIZE); + workspace_size = CYGMEM_REGION_ram_SIZE; +#endif bist(); - do_version(0,0); - for (init_entry = __RedBoot_INIT_TAB__; init_entry != &__RedBoot_INIT_TAB_END__; init_entry++) { (*init_entry->fun)(); } +#ifdef CYGPKG_COMPRESS_ZLIB +#define ZLIB_COMPRESSION_OVERHEAD 0xB400 +#else +#define ZLIB_COMPRESSION_OVERHEAD 0 +#endif + user_ram_start = workspace_start + ZLIB_COMPRESSION_OVERHEAD; + user_ram_end = workspace_end; + do_version(0,0); + #ifdef CYGSEM_REDBOOT_FLASH_CONFIG // Give the guy a chance to abort any boot script if (script) { @@ -172,6 +213,7 @@ cyg_start(void) printf("== Executing boot script in %d.%03d seconds - enter ^C to abort\n", script_timeout_ms/1000, script_timeout_ms%1000); script = (unsigned char *)0; + res = _GETS_CTRLC; // Treat 0 timeout as ^C while (script_timeout_ms >= CYGNUM_REDBOOT_CLI_IDLE_TIMEOUT) { res = gets(line, sizeof(line), CYGNUM_REDBOOT_CLI_IDLE_TIMEOUT); if (res == _GETS_OK) { @@ -180,10 +222,6 @@ cyg_start(void) continue; // Ignore anything but ^C } if (res != _GETS_TIMEOUT) break; - for (idle_entry = __RedBoot_IDLE_TAB__; - idle_entry != &__RedBoot_IDLE_TAB_END__; idle_entry++) { - (*idle_entry->fun)(); - } script_timeout_ms -= CYGNUM_REDBOOT_CLI_IDLE_TIMEOUT; } if (res == _GETS_CTRLC) { @@ -202,12 +240,9 @@ cyg_start(void) res = gets(line, sizeof(line), CYGNUM_REDBOOT_CLI_IDLE_TIMEOUT); if (res == _GETS_TIMEOUT) { // No input arrived - for (idle_entry = __RedBoot_IDLE_TAB__; - idle_entry != &__RedBoot_IDLE_TAB_END__; idle_entry++) { - (*idle_entry->fun)(); - } } else { if (res == _GETS_GDB) { + int dbgchan; // Special case of '$' - need to start GDB protocol gdb_active = true; CYGACC_CALL_IF_SET_CONSOLE_COMM(cur); @@ -216,6 +251,8 @@ cyg_start(void) #else breakpoint(); // Get GDB stubs started, with a proper environment, etc. #endif + dbgchan = CYGACC_CALL_IF_SET_DEBUG_COMM(CYGNUM_CALL_IF_SET_COMM_ID_QUERY_CURRENT); + CYGACC_CALL_IF_SET_CONSOLE_COMM(dbgchan); } else { if (strlen(line) > 0) { if ((cmd = parse(line, &argc, &argv[0])) != (struct cmd *)0) { @@ -314,6 +351,29 @@ do_dump(int argc, char *argv[]) } void +do_cksum(int argc, char *argv[]) +{ + struct option_info opts[2]; + unsigned long base, len, crc; + bool base_set, len_set; + + init_opts(&opts[0], 'b', true, OPTION_ARG_TYPE_NUM, + (void **)&base, (bool *)&base_set, "base address"); + init_opts(&opts[1], 'l', true, OPTION_ARG_TYPE_NUM, + (void **)&len, (bool *)&len_set, "length"); + if (!scan_opts(argc, argv, 1, opts, 2, 0, 0, "")) + { + return; + } + if (!base_set || !len_set) { + printf("usage: cksum -b -l \n"); + return; + } + crc = posix_crc32((unsigned char *)base, len); + printf("POSIX cksum = 0x%08lx (%lu)\n", crc, crc); +} + +void do_go(int argc, char *argv[]) { typedef void code_fun(void); @@ -333,11 +393,22 @@ do_go(int argc, char *argv[]) return; } if (wait_time_set) { + int script_timeout_ms = wait_time * 1000; +#ifdef CYGSEM_REDBOOT_FLASH_CONFIG + unsigned char *hold_script = script; + script = (unsigned char *)0; +#endif printf("About to start execution at %p - abort with ^C within %d seconds\n", (void *)entry, wait_time); - res = gets(line, sizeof(line), wait_time*1000); - if (res == _GETS_CTRLC) { - return; + while (script_timeout_ms >= CYGNUM_REDBOOT_CLI_IDLE_TIMEOUT) { + res = gets(line, sizeof(line), CYGNUM_REDBOOT_CLI_IDLE_TIMEOUT); + if (res == _GETS_CTRLC) { +#ifdef CYGSEM_REDBOOT_FLASH_CONFIG + script = hold_script; // Re-enable script +#endif + return; + } + script_timeout_ms -= CYGNUM_REDBOOT_CLI_IDLE_TIMEOUT; } } fun = (code_fun *)entry; diff --git a/packages/redboot/current/src/misc_funs.c b/packages/redboot/current/src/misc_funs.c --- a/packages/redboot/current/src/misc_funs.c +++ b/packages/redboot/current/src/misc_funs.c @@ -66,6 +66,27 @@ strcmp(const char *s1, const char *s2) } char * +strncpy(char *s1, const char *s2, unsigned long n) +{ + char c; + char *_s1 = s1; + + if (n) { + n--; // leave space for terminator + while (n != 0 && (c = *s2++) != '\0') { + *s1++ = c; + n--; + } + *s1 = '\0'; + while (n != 0) { // fill remainder with zero + *s1++ = 0; + n--; + } + } + return _s1; +} + +char * strcpy(char *s1, const char *s2) { char c; diff --git a/packages/redboot/current/src/net/bootp.c b/packages/redboot/current/src/net/bootp.c --- a/packages/redboot/current/src/net/bootp.c +++ b/packages/redboot/current/src/net/bootp.c @@ -23,7 +23,7 @@ // // The Initial Developer of the Original Code is Red Hat. // Portions created by Red Hat are -// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. // All Rights Reserved. // ------------------------------------------- // @@ -63,6 +63,8 @@ bootp_handler(udp_socket_t *skt, char *b b = (bootp_header_t *)buf; if (bp_info) { + if (len > sizeof *bp_info) + len = sizeof *bp_info; memcpy(bp_info, b, len); } diff --git a/packages/redboot/current/src/net/enet.c b/packages/redboot/current/src/net/enet.c --- a/packages/redboot/current/src/net/enet.c +++ b/packages/redboot/current/src/net/enet.c @@ -118,6 +118,7 @@ void pktbuf_t *pkt; eth_header_t eth_hdr; int i, type; + static bool was_exhausted = false; while (true) { /* @@ -125,11 +126,16 @@ void * are available. */ if ((pkt = __pktbuf_alloc(ETH_MAX_PKTLEN)) == NULL) { - printf("__enet_poll: no more buffers\n"); - __pktbuf_dump(); - while (1) ; + if (!was_exhausted) { + int old = start_console(); // Force output to standard port + printf("__enet_poll: no more buffers\n"); + __pktbuf_dump(); + was_exhausted = true; + end_console(old); + } return; } + was_exhausted = false; // Report the next time we're out of buffers if ((pkt->pkt_bytes = eth_drv_read((char *)ð_hdr, (char *)pkt->buf, ETH_MAX_PKTLEN)) > 0) { diff --git a/packages/redboot/current/src/net/net_io.c b/packages/redboot/current/src/net/net_io.c --- a/packages/redboot/current/src/net/net_io.c +++ b/packages/redboot/current/src/net/net_io.c @@ -480,8 +480,9 @@ net_io_init(void) // Check for incoming TCP debug connection void -net_io_test(void) +net_io_test(bool is_idle) { + if (!is_idle) return; // Only care about idle case if (!have_net) return; __tcp_poll(); if (state != tcp_sock.state) { diff --git a/packages/redboot/current/src/net/ping.c b/packages/redboot/current/src/net/ping.c --- a/packages/redboot/current/src/net/ping.c +++ b/packages/redboot/current/src/net/ping.c @@ -139,7 +139,7 @@ do_ping(int argc, char *argv[]) length = DEFAULT_LENGTH; } if ((length < 64) || (length > 1400)) { - printf("Invalid length specified: %d\n", length); + printf("Invalid length specified: %ld\n", length); return; } if (!count_set) { diff --git a/packages/redboot/current/src/net/pktbuf.c b/packages/redboot/current/src/net/pktbuf.c --- a/packages/redboot/current/src/net/pktbuf.c +++ b/packages/redboot/current/src/net/pktbuf.c @@ -92,13 +92,13 @@ void for (i = 0; i < MAX_PKTBUF; i++) { printf("Buf[%d]/%p: buf: %p, len: %d/%d, next: %p\n", i, - &pktbuf_list[i], - pktbuf_list[i].buf, + (void*)&pktbuf_list[i], + (void*)pktbuf_list[i].buf, pktbuf_list[i].bufsize, pktbuf_list[i].pkt_bytes, - pktbuf_list[i].next); + (void*)pktbuf_list[i].next); } - printf("Free list = %p\n", free_list); + printf("Free list = %p\n", (void*)free_list); } /* diff --git a/packages/redboot/current/src/net/tcp.c b/packages/redboot/current/src/net/tcp.c --- a/packages/redboot/current/src/net/tcp.c +++ b/packages/redboot/current/src/net/tcp.c @@ -504,6 +504,7 @@ void handle_ack(s, pkt); if (ntohl(tcp->acknum) == (s->seq + 1)) { /* got ACK for FIN packet */ + s->seq++; if (tcp->flags & TCP_FLAG_FIN) { BSPLOG(bsp_log("_FIN_WAIT_1 --> _TIME_WAIT\n")); s->ack++; @@ -548,7 +549,8 @@ void case _TIME_WAIT: BSPLOG(bsp_log("_TIME_WAIT resend.\n")); - tcp_send(s, 0, 1); /* just resend ack */ + if (tcp->flags & TCP_FLAG_FIN) + tcp_send(s, 0, 1); /* just resend ack */ break; } } else { diff --git a/packages/redboot/current/src/printf.c b/packages/redboot/current/src/printf.c --- a/packages/redboot/current/src/printf.c +++ b/packages/redboot/current/src/printf.c @@ -119,6 +119,7 @@ static int zero_fill = true; left_prec = sizeof(unsigned long)*2; case 'd': + case 'u': case 'x': case 'X': val = va_arg(ap, long); @@ -128,6 +129,7 @@ static int sign = '-'; val = -val; } + case 'u': length = _cvt(val, buf, 10, "0123456789"); break; case 'p': diff --git a/packages/redboot/current/src/version.c b/packages/redboot/current/src/version.c --- a/packages/redboot/current/src/version.c +++ b/packages/redboot/current/src/version.c @@ -23,7 +23,7 @@ // // The Initial Developer of the Original Code is Red Hat. // Portions created by Red Hat are -// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. // All Rights Reserved. // ------------------------------------------- // @@ -59,7 +59,7 @@ // char RedBoot_version[] CYGBLD_ATTRIB_WEAK = - "\nRedBoot(tm) debug environment - built " __TIME__ ", " __DATE__ "\n"; + "\nRedBoot(tm) bootstrap and debug environment - built " __TIME__ ", " __DATE__ "\n\n"; // Override default GDB stubs 'info' // Note: this can still be a "weak" symbol since it will occur in the .o diff --git a/packages/services/compress/zlib/current/ChangeLog b/packages/services/compress/zlib/current/ChangeLog new file mode 100644 --- /dev/null +++ b/packages/services/compress/zlib/current/ChangeLog @@ -0,0 +1,63 @@ +2001-03-12 Jesper Skov + + * src/inflate.c: Remove BAD_CRC state. Do separate CRC for + gzippped data. + * include/zlib.h: Removed Z_BAD_CRC hack. Rename crc32 function. + * src/crc32.c: Include zlib.h header from + include/cyg/compress. Rename function. + * cdl/compress_zlib.cdl: Build the crc32.c file. + +2001-03-09 Jesper Skov + + * src/compress.c: Include zlib.h header from include/cyg/compress. + * src/uncompr.c: Same. + * tests/zlib1.c: Added. + * tests/zlib2.c: Added. + * cdl/compress_zlib.cdl: Compile tests. Compile + files holding compress/uncompress functions. + + * cdl/compress_zlib.cdl: Don't warn about prototypes when building. + +2001-03-08 Jesper Skov + + * cdl/compress_zlib.cdl: Add isoinfra requirement. + + * include/zconf.h: Override STDC check. + + * include/zlib.h: Added new BAD_CRC return type. Comment out crc32 + declaration. + + * src/inflate.c: Added additional states to allow for gzip header + decoding. + + * src/adler32.c: Include zlib.h header from include/cyg/compress. + * src/zutil.h: Same. + + * Import zlib 1.1.3 sources, but leave out some sub + directories. See src/README.eCos for details. + +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//=========================================================================== diff --git a/packages/services/compress/zlib/current/cdl/compress_zlib.cdl b/packages/services/compress/zlib/current/cdl/compress_zlib.cdl new file mode 100644 --- /dev/null +++ b/packages/services/compress/zlib/current/cdl/compress_zlib.cdl @@ -0,0 +1,123 @@ +# ==================================================================== +# +# compress_zlib.cdl +# +# Zlib compress/decompress configuration data +# +# ==================================================================== +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Red Hat eCos Public License +# Version 1.1 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://www.redhat.com/ +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Configurable Operating System, +# released September 30, 1998. +# +# The Initial Developer of the Original Code is Red Hat. +# Portions created by Red Hat are +# Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +# All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +# ==================================================================== +######DESCRIPTIONBEGIN#### +# +# Author(s): jskov +# Contributors: +# Date: 2001-03-06 +# +#####DESCRIPTIONEND#### +# +# ==================================================================== + +cdl_package CYGPKG_COMPRESS_ZLIB { + display "Zlib compress and decompress package" + description " + This package provides support for compression and + decompression." + include_dir cyg/compress + + requires CYGPKG_MEMALLOC + requires CYGPKG_ISOINFRA + + compile infblock.c infcodes.c inffast.c inflate.c + compile inftrees.c infutil.c adler32.c crc32.c + compile zutil.c deflate.c trees.c compress.c uncompr.c + + +# ==================================================================== + + cdl_component CYGPKG_COMPRESS_ZLIB_OPTIONS { + display "Common memory allocator package build options" + flavor none + no_define + description " + Package specific build options including control over + compiler flags used only in building this package, + and details of which tests are built." + + cdl_option CYGPKG_COMPRESS_ZLIB_CFLAGS_ADD { + display "Additional compiler flags" + flavor data + no_define + default_value { "-D__ECOS__ -DNO_ERRNO_H" } + description " + This option modifies the set of compiler flags for + building this package. These flags are used in addition + to the set of global flags." + } + + cdl_option CYGPKG_COMPRESS_ZLIB_CFLAGS_REMOVE { + display "Suppressed compiler flags" + flavor data + no_define + default_value { "-Wstrict-prototypes" } + description " + This option modifies the set of compiler flags for + building this package. These flags are removed from + the set of global flags if present." + } + + cdl_option CYGPKG_COMPRESS_ZLIB_LDFLAGS_ADD { + display "Additional compiler flags" + flavor data + no_define + default_value { "" } + description " + This option modifies the set of compiler flags for + building this package. These flags are used in addition + to the set of global flags." + } + + cdl_option CYGPKG_COMPRESS_ZLIB_LDFLAGS_REMOVE { + display "Suppressed compiler flags" + flavor data + no_define + default_value { "" } + description " + This option modifies the set of compiler flags for + building this package. These flags are removed from + the set of global flags if present." + } + + } + + cdl_option CYGPKG_COMPRESS_ZLIB_TESTS { + display "zlib tests" + flavor data + no_define + calculated { "tests/zlib1.c tests/zlib2.c" } + } +} + +# ==================================================================== +# EOF compress_zlib.cdl diff --git a/packages/services/compress/zlib/current/include/zconf.h b/packages/services/compress/zlib/current/include/zconf.h new file mode 100644 --- /dev/null +++ b/packages/services/compress/zlib/current/include/zconf.h @@ -0,0 +1,281 @@ +/* zconf.h -- configuration of the zlib compression library + * Copyright (C) 1995-1998 Jean-loup Gailly. + * For conditions of distribution and use, see copyright notice in zlib.h + */ + +/* @(#) $Id$ */ + +#ifndef _ZCONF_H +#define _ZCONF_H + +/* + * If you *really* need a unique prefix for all types and library functions, + * compile with -DZ_PREFIX. The "standard" zlib should be compiled without it. + */ +#ifdef Z_PREFIX +# define deflateInit_ z_deflateInit_ +# define deflate z_deflate +# define deflateEnd z_deflateEnd +# define inflateInit_ z_inflateInit_ +# define inflate z_inflate +# define inflateEnd z_inflateEnd +# define deflateInit2_ z_deflateInit2_ +# define deflateSetDictionary z_deflateSetDictionary +# define deflateCopy z_deflateCopy +# define deflateReset z_deflateReset +# define deflateParams z_deflateParams +# define inflateInit2_ z_inflateInit2_ +# define inflateSetDictionary z_inflateSetDictionary +# define inflateSync z_inflateSync +# define inflateSyncPoint z_inflateSyncPoint +# define inflateReset z_inflateReset +# define compress z_compress +# define compress2 z_compress2 +# define uncompress z_uncompress +# define adler32 z_adler32 +# define crc32 z_crc32 +# define get_crc_table z_get_crc_table + +# define Byte z_Byte +# define uInt z_uInt +# define uLong z_uLong +# define Bytef z_Bytef +# define charf z_charf +# define intf z_intf +# define uIntf z_uIntf +# define uLongf z_uLongf +# define voidpf z_voidpf +# define voidp z_voidp +#endif + +#if (defined(_WIN32) || defined(__WIN32__)) && !defined(WIN32) +# define WIN32 +#endif +#if defined(__GNUC__) || defined(WIN32) || defined(__386__) || defined(i386) +# ifndef __32BIT__ +# define __32BIT__ +# endif +#endif +#if defined(__MSDOS__) && !defined(MSDOS) +# define MSDOS +#endif + +/* + * Compile with -DMAXSEG_64K if the alloc function cannot allocate more + * than 64k bytes at a time (needed on systems with 16-bit int). + */ +#if defined(MSDOS) && !defined(__32BIT__) +# define MAXSEG_64K +#endif +#ifdef MSDOS +# define UNALIGNED_OK +#endif + +#ifndef __ECOS__ +#if (defined(MSDOS) || defined(_WINDOWS) || defined(WIN32)) && !defined(STDC) +# define STDC +#endif +#if defined(__STDC__) || defined(__cplusplus) || defined(__OS2__) +# ifndef STDC +# define STDC +# endif +#endif +#endif // __ECOS__ + +#ifndef STDC +# ifndef const /* cannot use !defined(STDC) && !defined(const) on Mac */ +# define const +# endif +#endif + +/* Some Mac compilers merge all .h files incorrectly: */ +#if defined(__MWERKS__) || defined(applec) ||defined(THINK_C) ||defined(__SC__) +# define NO_DUMMY_DECL +#endif + +/* Old Borland C incorrectly complains about missing returns: */ +#if defined(__BORLANDC__) && (__BORLANDC__ < 0x500) +# define NEED_DUMMY_RETURN +#endif + + +/* Maximum value for memLevel in deflateInit2 */ +#ifndef MAX_MEM_LEVEL +# ifdef MAXSEG_64K +# define MAX_MEM_LEVEL 8 +# else +# define MAX_MEM_LEVEL 9 +# endif +#endif + +/* Maximum value for windowBits in deflateInit2 and inflateInit2. + * WARNING: reducing MAX_WBITS makes minigzip unable to extract .gz files + * created by gzip. (Files created by minigzip can still be extracted by + * gzip.) + */ +#ifndef MAX_WBITS +# define MAX_WBITS 15 /* 32K LZ77 window */ +#endif + +/* The memory requirements for deflate are (in bytes): + (1 << (windowBits+2)) + (1 << (memLevel+9)) + that is: 128K for windowBits=15 + 128K for memLevel = 8 (default values) + plus a few kilobytes for small objects. For example, if you want to reduce + the default memory requirements from 256K to 128K, compile with + make CFLAGS="-O -DMAX_WBITS=14 -DMAX_MEM_LEVEL=7" + Of course this will generally degrade compression (there's no free lunch). + + The memory requirements for inflate are (in bytes) 1 << windowBits + that is, 32K for windowBits=15 (default value) plus a few kilobytes + for small objects. +*/ + + /* Type declarations */ + +#ifndef OF /* function prototypes */ +# ifdef STDC +# define OF(args) args +# else +# define OF(args) () +# endif +#endif + +/* The following definitions for FAR are needed only for MSDOS mixed + * model programming (small or medium model with some far allocations). + * This was tested only with MSC; for other MSDOS compilers you may have + * to define NO_MEMCPY in zutil.h. If you don't need the mixed model, + * just define FAR to be empty. + */ +#if (defined(M_I86SM) || defined(M_I86MM)) && !defined(__32BIT__) + /* MSC small or medium model */ +# define SMALL_MEDIUM +# ifdef _MSC_VER +# define FAR _far +# else +# define FAR far +# endif +#endif +#if defined(__BORLANDC__) && (defined(__SMALL__) || defined(__MEDIUM__)) +# ifndef __32BIT__ +# define SMALL_MEDIUM +# define FAR _far +# endif +#endif + +/* Compile with -DZLIB_DLL for Windows DLL support */ +#if defined(ZLIB_DLL) +# if defined(_WINDOWS) || defined(WINDOWS) +# ifdef FAR +# undef FAR +# endif +# include +# define ZEXPORT WINAPI +# ifdef WIN32 +# define ZEXPORTVA WINAPIV +# else +# define ZEXPORTVA FAR _cdecl _export +# endif +# endif +# if defined (__BORLANDC__) +# if (__BORLANDC__ >= 0x0500) && defined (WIN32) +# include +# define ZEXPORT __declspec(dllexport) WINAPI +# define ZEXPORTRVA __declspec(dllexport) WINAPIV +# else +# if defined (_Windows) && defined (__DLL__) +# define ZEXPORT _export +# define ZEXPORTVA _export +# endif +# endif +# endif +#endif + +#if defined (__BEOS__) +# if defined (ZLIB_DLL) +# define ZEXTERN extern __declspec(dllexport) +# else +# define ZEXTERN extern __declspec(dllimport) +# endif +#endif + +#ifndef ZEXPORT +# define ZEXPORT +#endif +#ifndef ZEXPORTVA +# define ZEXPORTVA +#endif +#ifndef ZEXTERN +# define ZEXTERN extern +#endif + +#ifndef FAR +# define FAR +#endif + +#if !defined(MACOS) && !defined(TARGET_OS_MAC) +typedef unsigned char Byte; /* 8 bits */ +#endif +typedef unsigned int uInt; /* 16 bits or more */ +typedef unsigned long uLong; /* 32 bits or more */ + +#ifdef SMALL_MEDIUM + /* Borland C/C++ and some old MSC versions ignore FAR inside typedef */ +# define Bytef Byte FAR +#else + typedef Byte FAR Bytef; +#endif +typedef char FAR charf; +typedef int FAR intf; +typedef uInt FAR uIntf; +typedef uLong FAR uLongf; + +#ifdef STDC + typedef void FAR *voidpf; + typedef void *voidp; +#else + typedef Byte FAR *voidpf; + typedef Byte *voidp; +#endif + +#ifdef HAVE_UNISTD_H +# include /* for off_t */ +# include /* for SEEK_* and off_t */ +# define z_off_t off_t +#endif +#ifndef SEEK_SET +# define SEEK_SET 0 /* Seek from beginning of file. */ +# define SEEK_CUR 1 /* Seek from current position. */ +# define SEEK_END 2 /* Set file pointer to EOF plus "offset" */ +#endif +#ifndef z_off_t +# define z_off_t long +#endif + +/* MVS linker does not support external names larger than 8 bytes */ +#if defined(__MVS__) +# pragma map(deflateInit_,"DEIN") +# pragma map(deflateInit2_,"DEIN2") +# pragma map(deflateEnd,"DEEND") +# pragma map(inflateInit_,"ININ") +# pragma map(inflateInit2_,"ININ2") +# pragma map(inflateEnd,"INEND") +# pragma map(inflateSync,"INSY") +# pragma map(inflateSetDictionary,"INSEDI") +# pragma map(inflate_blocks,"INBL") +# pragma map(inflate_blocks_new,"INBLNE") +# pragma map(inflate_blocks_free,"INBLFR") +# pragma map(inflate_blocks_reset,"INBLRE") +# pragma map(inflate_codes_free,"INCOFR") +# pragma map(inflate_codes,"INCO") +# pragma map(inflate_fast,"INFA") +# pragma map(inflate_flush,"INFLU") +# pragma map(inflate_mask,"INMA") +# pragma map(inflate_set_dictionary,"INSEDI2") +# pragma map(inflate_copyright,"INCOPY") +# pragma map(inflate_trees_bits,"INTRBI") +# pragma map(inflate_trees_dynamic,"INTRDY") +# pragma map(inflate_trees_fixed,"INTRFI") +# pragma map(inflate_trees_free,"INTRFR") +#endif + +#endif /* _ZCONF_H */ diff --git a/packages/services/compress/zlib/current/include/zlib.h b/packages/services/compress/zlib/current/include/zlib.h new file mode 100644 --- /dev/null +++ b/packages/services/compress/zlib/current/include/zlib.h @@ -0,0 +1,897 @@ +/* zlib.h -- interface of the 'zlib' general purpose compression library + version 1.1.3, July 9th, 1998 + + Copyright (C) 1995-1998 Jean-loup Gailly and Mark Adler + + This software is provided 'as-is', without any express or implied + warranty. In no event will the authors be held liable for any damages + arising from the use of this software. + + Permission is granted to anyone to use this software for any purpose, + including commercial applications, and to alter it and redistribute it + freely, subject to the following restrictions: + + 1. The origin of this software must not be misrepresented; you must not + claim that you wrote the original software. If you use this software + in a product, an acknowledgment in the product documentation would be + appreciated but is not required. + 2. Altered source versions must be plainly marked as such, and must not be + misrepresented as being the original software. + 3. This notice may not be removed or altered from any source distribution. + + Jean-loup Gailly Mark Adler + jloup@gzip.org madler@alumni.caltech.edu + + + The data format used by the zlib library is described by RFCs (Request for + Comments) 1950 to 1952 in the files ftp://ds.internic.net/rfc/rfc1950.txt + (zlib format), rfc1951.txt (deflate format) and rfc1952.txt (gzip format). +*/ + +#ifndef _ZLIB_H +#define _ZLIB_H + +#include "zconf.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#define ZLIB_VERSION "1.1.3" + +/* + The 'zlib' compression library provides in-memory compression and + decompression functions, including integrity checks of the uncompressed + data. This version of the library supports only one compression method + (deflation) but other algorithms will be added later and will have the same + stream interface. + + Compression can be done in a single step if the buffers are large + enough (for example if an input file is mmap'ed), or can be done by + repeated calls of the compression function. In the latter case, the + application must provide more input and/or consume the output + (providing more output space) before each call. + + The library also supports reading and writing files in gzip (.gz) format + with an interface similar to that of stdio. + + The library does not install any signal handler. The decoder checks + the consistency of the compressed data, so the library should never + crash even in case of corrupted input. +*/ + +typedef voidpf (*alloc_func) OF((voidpf opaque, uInt items, uInt size)); +typedef void (*free_func) OF((voidpf opaque, voidpf address)); + +struct internal_state; + +typedef struct z_stream_s { + Bytef *next_in; /* next input byte */ + uInt avail_in; /* number of bytes available at next_in */ + uLong total_in; /* total nb of input bytes read so far */ + + Bytef *next_out; /* next output byte should be put there */ + uInt avail_out; /* remaining free space at next_out */ + uLong total_out; /* total nb of bytes output so far */ + + char *msg; /* last error message, NULL if no error */ + struct internal_state FAR *state; /* not visible by applications */ + + alloc_func zalloc; /* used to allocate the internal state */ + free_func zfree; /* used to free the internal state */ + voidpf opaque; /* private data object passed to zalloc and zfree */ + + int data_type; /* best guess about the data type: ascii or binary */ + uLong adler; /* adler32 value of the uncompressed data */ + uLong reserved; /* reserved for future use */ +} z_stream; + +typedef z_stream FAR *z_streamp; + +/* + The application must update next_in and avail_in when avail_in has + dropped to zero. It must update next_out and avail_out when avail_out + has dropped to zero. The application must initialize zalloc, zfree and + opaque before calling the init function. All other fields are set by the + compression library and must not be updated by the application. + + The opaque value provided by the application will be passed as the first + parameter for calls of zalloc and zfree. This can be useful for custom + memory management. The compression library attaches no meaning to the + opaque value. + + zalloc must return Z_NULL if there is not enough memory for the object. + If zlib is used in a multi-threaded application, zalloc and zfree must be + thread safe. + + On 16-bit systems, the functions zalloc and zfree must be able to allocate + exactly 65536 bytes, but will not be required to allocate more than this + if the symbol MAXSEG_64K is defined (see zconf.h). WARNING: On MSDOS, + pointers returned by zalloc for objects of exactly 65536 bytes *must* + have their offset normalized to zero. The default allocation function + provided by this library ensures this (see zutil.c). To reduce memory + requirements and avoid any allocation of 64K objects, at the expense of + compression ratio, compile the library with -DMAX_WBITS=14 (see zconf.h). + + The fields total_in and total_out can be used for statistics or + progress reports. After compression, total_in holds the total size of + the uncompressed data and may be saved for use in the decompressor + (particularly if the decompressor wants to decompress everything in + a single step). +*/ + + /* constants */ + +#define Z_NO_FLUSH 0 +#define Z_PARTIAL_FLUSH 1 /* will be removed, use Z_SYNC_FLUSH instead */ +#define Z_SYNC_FLUSH 2 +#define Z_FULL_FLUSH 3 +#define Z_FINISH 4 +/* Allowed flush values; see deflate() below for details */ + +#define Z_OK 0 +#define Z_STREAM_END 1 +#define Z_NEED_DICT 2 +#define Z_ERRNO (-1) +#define Z_STREAM_ERROR (-2) +#define Z_DATA_ERROR (-3) +#define Z_MEM_ERROR (-4) +#define Z_BUF_ERROR (-5) +#define Z_VERSION_ERROR (-6) +/* Return codes for the compression/decompression functions. Negative + * values are errors, positive values are used for special but normal events. + */ + +#define Z_NO_COMPRESSION 0 +#define Z_BEST_SPEED 1 +#define Z_BEST_COMPRESSION 9 +#define Z_DEFAULT_COMPRESSION (-1) +/* compression levels */ + +#define Z_FILTERED 1 +#define Z_HUFFMAN_ONLY 2 +#define Z_DEFAULT_STRATEGY 0 +/* compression strategy; see deflateInit2() below for details */ + +#define Z_BINARY 0 +#define Z_ASCII 1 +#define Z_UNKNOWN 2 +/* Possible values of the data_type field */ + +#define Z_DEFLATED 8 +/* The deflate compression method (the only one supported in this version) */ + +#define Z_NULL 0 /* for initializing zalloc, zfree, opaque */ + +#define zlib_version zlibVersion() +/* for compatibility with versions < 1.0.2 */ + + /* basic functions */ + +ZEXTERN const char * ZEXPORT zlibVersion OF((void)); +/* The application can compare zlibVersion and ZLIB_VERSION for consistency. + If the first character differs, the library code actually used is + not compatible with the zlib.h header file used by the application. + This check is automatically made by deflateInit and inflateInit. + */ + +/* +ZEXTERN int ZEXPORT deflateInit OF((z_streamp strm, int level)); + + Initializes the internal stream state for compression. The fields + zalloc, zfree and opaque must be initialized before by the caller. + If zalloc and zfree are set to Z_NULL, deflateInit updates them to + use default allocation functions. + + The compression level must be Z_DEFAULT_COMPRESSION, or between 0 and 9: + 1 gives best speed, 9 gives best compression, 0 gives no compression at + all (the input data is simply copied a block at a time). + Z_DEFAULT_COMPRESSION requests a default compromise between speed and + compression (currently equivalent to level 6). + + deflateInit returns Z_OK if success, Z_MEM_ERROR if there was not + enough memory, Z_STREAM_ERROR if level is not a valid compression level, + Z_VERSION_ERROR if the zlib library version (zlib_version) is incompatible + with the version assumed by the caller (ZLIB_VERSION). + msg is set to null if there is no error message. deflateInit does not + perform any compression: this will be done by deflate(). +*/ + + +ZEXTERN int ZEXPORT deflate OF((z_streamp strm, int flush)); +/* + deflate compresses as much data as possible, and stops when the input + buffer becomes empty or the output buffer becomes full. It may introduce some + output latency (reading input without producing any output) except when + forced to flush. + + The detailed semantics are as follows. deflate performs one or both of the + following actions: + + - Compress more input starting at next_in and update next_in and avail_in + accordingly. If not all input can be processed (because there is not + enough room in the output buffer), next_in and avail_in are updated and + processing will resume at this point for the next call of deflate(). + + - Provide more output starting at next_out and update next_out and avail_out + accordingly. This action is forced if the parameter flush is non zero. + Forcing flush frequently degrades the compression ratio, so this parameter + should be set only when necessary (in interactive applications). + Some output may be provided even if flush is not set. + + Before the call of deflate(), the application should ensure that at least + one of the actions is possible, by providing more input and/or consuming + more output, and updating avail_in or avail_out accordingly; avail_out + should never be zero before the call. The application can consume the + compressed output when it wants, for example when the output buffer is full + (avail_out == 0), or after each call of deflate(). If deflate returns Z_OK + and with zero avail_out, it must be called again after making room in the + output buffer because there might be more output pending. + + If the parameter flush is set to Z_SYNC_FLUSH, all pending output is + flushed to the output buffer and the output is aligned on a byte boundary, so + that the decompressor can get all input data available so far. (In particular + avail_in is zero after the call if enough output space has been provided + before the call.) Flushing may degrade compression for some compression + algorithms and so it should be used only when necessary. + + If flush is set to Z_FULL_FLUSH, all output is flushed as with + Z_SYNC_FLUSH, and the compression state is reset so that decompression can + restart from this point if previous compressed data has been damaged or if + random access is desired. Using Z_FULL_FLUSH too often can seriously degrade + the compression. + + If deflate returns with avail_out == 0, this function must be called again + with the same value of the flush parameter and more output space (updated + avail_out), until the flush is complete (deflate returns with non-zero + avail_out). + + If the parameter flush is set to Z_FINISH, pending input is processed, + pending output is flushed and deflate returns with Z_STREAM_END if there + was enough output space; if deflate returns with Z_OK, this function must be + called again with Z_FINISH and more output space (updated avail_out) but no + more input data, until it returns with Z_STREAM_END or an error. After + deflate has returned Z_STREAM_END, the only possible operations on the + stream are deflateReset or deflateEnd. + + Z_FINISH can be used immediately after deflateInit if all the compression + is to be done in a single step. In this case, avail_out must be at least + 0.1% larger than avail_in plus 12 bytes. If deflate does not return + Z_STREAM_END, then it must be called again as described above. + + deflate() sets strm->adler to the adler32 checksum of all input read + so far (that is, total_in bytes). + + deflate() may update data_type if it can make a good guess about + the input data type (Z_ASCII or Z_BINARY). In doubt, the data is considered + binary. This field is only for information purposes and does not affect + the compression algorithm in any manner. + + deflate() returns Z_OK if some progress has been made (more input + processed or more output produced), Z_STREAM_END if all input has been + consumed and all output has been produced (only when flush is set to + Z_FINISH), Z_STREAM_ERROR if the stream state was inconsistent (for example + if next_in or next_out was NULL), Z_BUF_ERROR if no progress is possible + (for example avail_in or avail_out was zero). +*/ + + +ZEXTERN int ZEXPORT deflateEnd OF((z_streamp strm)); +/* + All dynamically allocated data structures for this stream are freed. + This function discards any unprocessed input and does not flush any + pending output. + + deflateEnd returns Z_OK if success, Z_STREAM_ERROR if the + stream state was inconsistent, Z_DATA_ERROR if the stream was freed + prematurely (some input or output was discarded). In the error case, + msg may be set but then points to a static string (which must not be + deallocated). +*/ + + +/* +ZEXTERN int ZEXPORT inflateInit OF((z_streamp strm)); + + Initializes the internal stream state for decompression. The fields + next_in, avail_in, zalloc, zfree and opaque must be initialized before by + the caller. If next_in is not Z_NULL and avail_in is large enough (the exact + value depends on the compression method), inflateInit determines the + compression method from the zlib header and allocates all data structures + accordingly; otherwise the allocation will be deferred to the first call of + inflate. If zalloc and zfree are set to Z_NULL, inflateInit updates them to + use default allocation functions. + + inflateInit returns Z_OK if success, Z_MEM_ERROR if there was not enough + memory, Z_VERSION_ERROR if the zlib library version is incompatible with the + version assumed by the caller. msg is set to null if there is no error + message. inflateInit does not perform any decompression apart from reading + the zlib header if present: this will be done by inflate(). (So next_in and + avail_in may be modified, but next_out and avail_out are unchanged.) +*/ + + +ZEXTERN int ZEXPORT inflate OF((z_streamp strm, int flush)); +/* + inflate decompresses as much data as possible, and stops when the input + buffer becomes empty or the output buffer becomes full. It may some + introduce some output latency (reading input without producing any output) + except when forced to flush. + + The detailed semantics are as follows. inflate performs one or both of the + following actions: + + - Decompress more input starting at next_in and update next_in and avail_in + accordingly. If not all input can be processed (because there is not + enough room in the output buffer), next_in is updated and processing + will resume at this point for the next call of inflate(). + + - Provide more output starting at next_out and update next_out and avail_out + accordingly. inflate() provides as much output as possible, until there + is no more input data or no more space in the output buffer (see below + about the flush parameter). + + Before the call of inflate(), the application should ensure that at least + one of the actions is possible, by providing more input and/or consuming + more output, and updating the next_* and avail_* values accordingly. + The application can consume the uncompressed output when it wants, for + example when the output buffer is full (avail_out == 0), or after each + call of inflate(). If inflate returns Z_OK and with zero avail_out, it + must be called again after making room in the output buffer because there + might be more output pending. + + If the parameter flush is set to Z_SYNC_FLUSH, inflate flushes as much + output as possible to the output buffer. The flushing behavior of inflate is + not specified for values of the flush parameter other than Z_SYNC_FLUSH + and Z_FINISH, but the current implementation actually flushes as much output + as possible anyway. + + inflate() should normally be called until it returns Z_STREAM_END or an + error. However if all decompression is to be performed in a single step + (a single call of inflate), the parameter flush should be set to + Z_FINISH. In this case all pending input is processed and all pending + output is flushed; avail_out must be large enough to hold all the + uncompressed data. (The size of the uncompressed data may have been saved + by the compressor for this purpose.) The next operation on this stream must + be inflateEnd to deallocate the decompression state. The use of Z_FINISH + is never required, but can be used to inform inflate that a faster routine + may be used for the single inflate() call. + + If a preset dictionary is needed at this point (see inflateSetDictionary + below), inflate sets strm-adler to the adler32 checksum of the + dictionary chosen by the compressor and returns Z_NEED_DICT; otherwise + it sets strm->adler to the adler32 checksum of all output produced + so far (that is, total_out bytes) and returns Z_OK, Z_STREAM_END or + an error code as described below. At the end of the stream, inflate() + checks that its computed adler32 checksum is equal to that saved by the + compressor and returns Z_STREAM_END only if the checksum is correct. + + inflate() returns Z_OK if some progress has been made (more input processed + or more output produced), Z_STREAM_END if the end of the compressed data has + been reached and all uncompressed output has been produced, Z_NEED_DICT if a + preset dictionary is needed at this point, Z_DATA_ERROR if the input data was + corrupted (input stream not conforming to the zlib format or incorrect + adler32 checksum), Z_STREAM_ERROR if the stream structure was inconsistent + (for example if next_in or next_out was NULL), Z_MEM_ERROR if there was not + enough memory, Z_BUF_ERROR if no progress is possible or if there was not + enough room in the output buffer when Z_FINISH is used. In the Z_DATA_ERROR + case, the application may then call inflateSync to look for a good + compression block. +*/ + + +ZEXTERN int ZEXPORT inflateEnd OF((z_streamp strm)); +/* + All dynamically allocated data structures for this stream are freed. + This function discards any unprocessed input and does not flush any + pending output. + + inflateEnd returns Z_OK if success, Z_STREAM_ERROR if the stream state + was inconsistent. In the error case, msg may be set but then points to a + static string (which must not be deallocated). +*/ + + /* Advanced functions */ + +/* + The following functions are needed only in some special applications. +*/ + +/* +ZEXTERN int ZEXPORT deflateInit2 OF((z_streamp strm, + int level, + int method, + int windowBits, + int memLevel, + int strategy)); + + This is another version of deflateInit with more compression options. The + fields next_in, zalloc, zfree and opaque must be initialized before by + the caller. + + The method parameter is the compression method. It must be Z_DEFLATED in + this version of the library. + + The windowBits parameter is the base two logarithm of the window size + (the size of the history buffer). It should be in the range 8..15 for this + version of the library. Larger values of this parameter result in better + compression at the expense of memory usage. The default value is 15 if + deflateInit is used instead. + + The memLevel parameter specifies how much memory should be allocated + for the internal compression state. memLevel=1 uses minimum memory but + is slow and reduces compression ratio; memLevel=9 uses maximum memory + for optimal speed. The default value is 8. See zconf.h for total memory + usage as a function of windowBits and memLevel. + + The strategy parameter is used to tune the compression algorithm. Use the + value Z_DEFAULT_STRATEGY for normal data, Z_FILTERED for data produced by a + filter (or predictor), or Z_HUFFMAN_ONLY to force Huffman encoding only (no + string match). Filtered data consists mostly of small values with a + somewhat random distribution. In this case, the compression algorithm is + tuned to compress them better. The effect of Z_FILTERED is to force more + Huffman coding and less string matching; it is somewhat intermediate + between Z_DEFAULT and Z_HUFFMAN_ONLY. The strategy parameter only affects + the compression ratio but not the correctness of the compressed output even + if it is not set appropriately. + + deflateInit2 returns Z_OK if success, Z_MEM_ERROR if there was not enough + memory, Z_STREAM_ERROR if a parameter is invalid (such as an invalid + method). msg is set to null if there is no error message. deflateInit2 does + not perform any compression: this will be done by deflate(). +*/ + +ZEXTERN int ZEXPORT deflateSetDictionary OF((z_streamp strm, + const Bytef *dictionary, + uInt dictLength)); +/* + Initializes the compression dictionary from the given byte sequence + without producing any compressed output. This function must be called + immediately after deflateInit, deflateInit2 or deflateReset, before any + call of deflate. The compressor and decompressor must use exactly the same + dictionary (see inflateSetDictionary). + + The dictionary should consist of strings (byte sequences) that are likely + to be encountered later in the data to be compressed, with the most commonly + used strings preferably put towards the end of the dictionary. Using a + dictionary is most useful when the data to be compressed is short and can be + predicted with good accuracy; the data can then be compressed better than + with the default empty dictionary. + + Depending on the size of the compression data structures selected by + deflateInit or deflateInit2, a part of the dictionary may in effect be + discarded, for example if the dictionary is larger than the window size in + deflate or deflate2. Thus the strings most likely to be useful should be + put at the end of the dictionary, not at the front. + + Upon return of this function, strm->adler is set to the Adler32 value + of the dictionary; the decompressor may later use this value to determine + which dictionary has been used by the compressor. (The Adler32 value + applies to the whole dictionary even if only a subset of the dictionary is + actually used by the compressor.) + + deflateSetDictionary returns Z_OK if success, or Z_STREAM_ERROR if a + parameter is invalid (such as NULL dictionary) or the stream state is + inconsistent (for example if deflate has already been called for this stream + or if the compression method is bsort). deflateSetDictionary does not + perform any compression: this will be done by deflate(). +*/ + +ZEXTERN int ZEXPORT deflateCopy OF((z_streamp dest, + z_streamp source)); +/* + Sets the destination stream as a complete copy of the source stream. + + This function can be useful when several compression strategies will be + tried, for example when there are several ways of pre-processing the input + data with a filter. The streams that will be discarded should then be freed + by calling deflateEnd. Note that deflateCopy duplicates the internal + compression state which can be quite large, so this strategy is slow and + can consume lots of memory. + + deflateCopy returns Z_OK if success, Z_MEM_ERROR if there was not + enough memory, Z_STREAM_ERROR if the source stream state was inconsistent + (such as zalloc being NULL). msg is left unchanged in both source and + destination. +*/ + +ZEXTERN int ZEXPORT deflateReset OF((z_streamp strm)); +/* + This function is equivalent to deflateEnd followed by deflateInit, + but does not free and reallocate all the internal compression state. + The stream will keep the same compression level and any other attributes + that may have been set by deflateInit2. + + deflateReset returns Z_OK if success, or Z_STREAM_ERROR if the source + stream state was inconsistent (such as zalloc or state being NULL). +*/ + +ZEXTERN int ZEXPORT deflateParams OF((z_streamp strm, + int level, + int strategy)); +/* + Dynamically update the compression level and compression strategy. The + interpretation of level and strategy is as in deflateInit2. This can be + used to switch between compression and straight copy of the input data, or + to switch to a different kind of input data requiring a different + strategy. If the compression level is changed, the input available so far + is compressed with the old level (and may be flushed); the new level will + take effect only at the next call of deflate(). + + Before the call of deflateParams, the stream state must be set as for + a call of deflate(), since the currently available input may have to + be compressed and flushed. In particular, strm->avail_out must be non-zero. + + deflateParams returns Z_OK if success, Z_STREAM_ERROR if the source + stream state was inconsistent or if a parameter was invalid, Z_BUF_ERROR + if strm->avail_out was zero. +*/ + +/* +ZEXTERN int ZEXPORT inflateInit2 OF((z_streamp strm, + int windowBits)); + + This is another version of inflateInit with an extra parameter. The + fields next_in, avail_in, zalloc, zfree and opaque must be initialized + before by the caller. + + The windowBits parameter is the base two logarithm of the maximum window + size (the size of the history buffer). It should be in the range 8..15 for + this version of the library. The default value is 15 if inflateInit is used + instead. If a compressed stream with a larger window size is given as + input, inflate() will return with the error code Z_DATA_ERROR instead of + trying to allocate a larger window. + + inflateInit2 returns Z_OK if success, Z_MEM_ERROR if there was not enough + memory, Z_STREAM_ERROR if a parameter is invalid (such as a negative + memLevel). msg is set to null if there is no error message. inflateInit2 + does not perform any decompression apart from reading the zlib header if + present: this will be done by inflate(). (So next_in and avail_in may be + modified, but next_out and avail_out are unchanged.) +*/ + +ZEXTERN int ZEXPORT inflateSetDictionary OF((z_streamp strm, + const Bytef *dictionary, + uInt dictLength)); +/* + Initializes the decompression dictionary from the given uncompressed byte + sequence. This function must be called immediately after a call of inflate + if this call returned Z_NEED_DICT. The dictionary chosen by the compressor + can be determined from the Adler32 value returned by this call of + inflate. The compressor and decompressor must use exactly the same + dictionary (see deflateSetDictionary). + + inflateSetDictionary returns Z_OK if success, Z_STREAM_ERROR if a + parameter is invalid (such as NULL dictionary) or the stream state is + inconsistent, Z_DATA_ERROR if the given dictionary doesn't match the + expected one (incorrect Adler32 value). inflateSetDictionary does not + perform any decompression: this will be done by subsequent calls of + inflate(). +*/ + +ZEXTERN int ZEXPORT inflateSync OF((z_streamp strm)); +/* + Skips invalid compressed data until a full flush point (see above the + description of deflate with Z_FULL_FLUSH) can be found, or until all + available input is skipped. No output is provided. + + inflateSync returns Z_OK if a full flush point has been found, Z_BUF_ERROR + if no more input was provided, Z_DATA_ERROR if no flush point has been found, + or Z_STREAM_ERROR if the stream structure was inconsistent. In the success + case, the application may save the current current value of total_in which + indicates where valid compressed data was found. In the error case, the + application may repeatedly call inflateSync, providing more input each time, + until success or end of the input data. +*/ + +ZEXTERN int ZEXPORT inflateReset OF((z_streamp strm)); +/* + This function is equivalent to inflateEnd followed by inflateInit, + but does not free and reallocate all the internal decompression state. + The stream will keep attributes that may have been set by inflateInit2. + + inflateReset returns Z_OK if success, or Z_STREAM_ERROR if the source + stream state was inconsistent (such as zalloc or state being NULL). +*/ + + + /* utility functions */ + +/* + The following utility functions are implemented on top of the + basic stream-oriented functions. To simplify the interface, some + default options are assumed (compression level and memory usage, + standard memory allocation functions). The source code of these + utility functions can easily be modified if you need special options. +*/ + +ZEXTERN int ZEXPORT compress OF((Bytef *dest, uLongf *destLen, + const Bytef *source, uLong sourceLen)); +/* + Compresses the source buffer into the destination buffer. sourceLen is + the byte length of the source buffer. Upon entry, destLen is the total + size of the destination buffer, which must be at least 0.1% larger than + sourceLen plus 12 bytes. Upon exit, destLen is the actual size of the + compressed buffer. + This function can be used to compress a whole file at once if the + input file is mmap'ed. + compress returns Z_OK if success, Z_MEM_ERROR if there was not + enough memory, Z_BUF_ERROR if there was not enough room in the output + buffer. +*/ + +ZEXTERN int ZEXPORT compress2 OF((Bytef *dest, uLongf *destLen, + const Bytef *source, uLong sourceLen, + int level)); +/* + Compresses the source buffer into the destination buffer. The level + parameter has the same meaning as in deflateInit. sourceLen is the byte + length of the source buffer. Upon entry, destLen is the total size of the + destination buffer, which must be at least 0.1% larger than sourceLen plus + 12 bytes. Upon exit, destLen is the actual size of the compressed buffer. + + compress2 returns Z_OK if success, Z_MEM_ERROR if there was not enough + memory, Z_BUF_ERROR if there was not enough room in the output buffer, + Z_STREAM_ERROR if the level parameter is invalid. +*/ + +ZEXTERN int ZEXPORT uncompress OF((Bytef *dest, uLongf *destLen, + const Bytef *source, uLong sourceLen)); + +/* + Decompresses the source buffer into the destination buffer. sourceLen is + the byte length of the source buffer. Upon entry, destLen is the total + size of the destination buffer, which must be large enough to hold the + entire uncompressed data. (The size of the uncompressed data must have + been saved previously by the compressor and transmitted to the decompressor + by some mechanism outside the scope of this compression library.) + Upon exit, destLen is the actual size of the compressed buffer. + This function can be used to decompress a whole file at once if the + input file is mmap'ed. + + uncompress returns Z_OK if success, Z_MEM_ERROR if there was not + enough memory, Z_BUF_ERROR if there was not enough room in the output + buffer, or Z_DATA_ERROR if the input data was corrupted. +*/ + + +typedef voidp gzFile; + +ZEXTERN gzFile ZEXPORT gzopen OF((const char *path, const char *mode)); +/* + Opens a gzip (.gz) file for reading or writing. The mode parameter + is as in fopen ("rb" or "wb") but can also include a compression level + ("wb9") or a strategy: 'f' for filtered data as in "wb6f", 'h' for + Huffman only compression as in "wb1h". (See the description + of deflateInit2 for more information about the strategy parameter.) + + gzopen can be used to read a file which is not in gzip format; in this + case gzread will directly read from the file without decompression. + + gzopen returns NULL if the file could not be opened or if there was + insufficient memory to allocate the (de)compression state; errno + can be checked to distinguish the two cases (if errno is zero, the + zlib error is Z_MEM_ERROR). */ + +ZEXTERN gzFile ZEXPORT gzdopen OF((int fd, const char *mode)); +/* + gzdopen() associates a gzFile with the file descriptor fd. File + descriptors are obtained from calls like open, dup, creat, pipe or + fileno (in the file has been previously opened with fopen). + The mode parameter is as in gzopen. + The next call of gzclose on the returned gzFile will also close the + file descriptor fd, just like fclose(fdopen(fd), mode) closes the file + descriptor fd. If you want to keep fd open, use gzdopen(dup(fd), mode). + gzdopen returns NULL if there was insufficient memory to allocate + the (de)compression state. +*/ + +ZEXTERN int ZEXPORT gzsetparams OF((gzFile file, int level, int strategy)); +/* + Dynamically update the compression level or strategy. See the description + of deflateInit2 for the meaning of these parameters. + gzsetparams returns Z_OK if success, or Z_STREAM_ERROR if the file was not + opened for writing. +*/ + +ZEXTERN int ZEXPORT gzread OF((gzFile file, voidp buf, unsigned len)); +/* + Reads the given number of uncompressed bytes from the compressed file. + If the input file was not in gzip format, gzread copies the given number + of bytes into the buffer. + gzread returns the number of uncompressed bytes actually read (0 for + end of file, -1 for error). */ + +ZEXTERN int ZEXPORT gzwrite OF((gzFile file, + const voidp buf, unsigned len)); +/* + Writes the given number of uncompressed bytes into the compressed file. + gzwrite returns the number of uncompressed bytes actually written + (0 in case of error). +*/ + +ZEXTERN int ZEXPORTVA gzprintf OF((gzFile file, const char *format, ...)); +/* + Converts, formats, and writes the args to the compressed file under + control of the format string, as in fprintf. gzprintf returns the number of + uncompressed bytes actually written (0 in case of error). +*/ + +ZEXTERN int ZEXPORT gzputs OF((gzFile file, const char *s)); +/* + Writes the given null-terminated string to the compressed file, excluding + the terminating null character. + gzputs returns the number of characters written, or -1 in case of error. +*/ + +ZEXTERN char * ZEXPORT gzgets OF((gzFile file, char *buf, int len)); +/* + Reads bytes from the compressed file until len-1 characters are read, or + a newline character is read and transferred to buf, or an end-of-file + condition is encountered. The string is then terminated with a null + character. + gzgets returns buf, or Z_NULL in case of error. +*/ + +ZEXTERN int ZEXPORT gzputc OF((gzFile file, int c)); +/* + Writes c, converted to an unsigned char, into the compressed file. + gzputc returns the value that was written, or -1 in case of error. +*/ + +ZEXTERN int ZEXPORT gzgetc OF((gzFile file)); +/* + Reads one byte from the compressed file. gzgetc returns this byte + or -1 in case of end of file or error. +*/ + +ZEXTERN int ZEXPORT gzflush OF((gzFile file, int flush)); +/* + Flushes all pending output into the compressed file. The parameter + flush is as in the deflate() function. The return value is the zlib + error number (see function gzerror below). gzflush returns Z_OK if + the flush parameter is Z_FINISH and all output could be flushed. + gzflush should be called only when strictly necessary because it can + degrade compression. +*/ + +ZEXTERN z_off_t ZEXPORT gzseek OF((gzFile file, + z_off_t offset, int whence)); +/* + Sets the starting position for the next gzread or gzwrite on the + given compressed file. The offset represents a number of bytes in the + uncompressed data stream. The whence parameter is defined as in lseek(2); + the value SEEK_END is not supported. + If the file is opened for reading, this function is emulated but can be + extremely slow. If the file is opened for writing, only forward seeks are + supported; gzseek then compresses a sequence of zeroes up to the new + starting position. + + gzseek returns the resulting offset location as measured in bytes from + the beginning of the uncompressed stream, or -1 in case of error, in + particular if the file is opened for writing and the new starting position + would be before the current position. +*/ + +ZEXTERN int ZEXPORT gzrewind OF((gzFile file)); +/* + Rewinds the given file. This function is supported only for reading. + + gzrewind(file) is equivalent to (int)gzseek(file, 0L, SEEK_SET) +*/ + +ZEXTERN z_off_t ZEXPORT gztell OF((gzFile file)); +/* + Returns the starting position for the next gzread or gzwrite on the + given compressed file. This position represents a number of bytes in the + uncompressed data stream. + + gztell(file) is equivalent to gzseek(file, 0L, SEEK_CUR) +*/ + +ZEXTERN int ZEXPORT gzeof OF((gzFile file)); +/* + Returns 1 when EOF has previously been detected reading the given + input stream, otherwise zero. +*/ + +ZEXTERN int ZEXPORT gzclose OF((gzFile file)); +/* + Flushes all pending output if necessary, closes the compressed file + and deallocates all the (de)compression state. The return value is the zlib + error number (see function gzerror below). +*/ + +ZEXTERN const char * ZEXPORT gzerror OF((gzFile file, int *errnum)); +/* + Returns the error message for the last error which occurred on the + given compressed file. errnum is set to zlib error number. If an + error occurred in the file system and not in the compression library, + errnum is set to Z_ERRNO and the application may consult errno + to get the exact error code. +*/ + + /* checksum functions */ + +/* + These functions are not related to compression but are exported + anyway because they might be useful in applications using the + compression library. +*/ + +ZEXTERN uLong ZEXPORT adler32 OF((uLong adler, const Bytef *buf, uInt len)); + +/* + Update a running Adler-32 checksum with the bytes buf[0..len-1] and + return the updated checksum. If buf is NULL, this function returns + the required initial value for the checksum. + An Adler-32 checksum is almost as reliable as a CRC32 but can be computed + much faster. Usage example: + + uLong adler = adler32(0L, Z_NULL, 0); + + while (read_buffer(buffer, length) != EOF) { + adler = adler32(adler, buffer, length); + } + if (adler != original_adler) error(); +*/ + +#if 1 // __ECOS__ +ZEXTERN uLong ZEXPORT gz_crc32 OF((uLong crc, const Bytef *buf, uInt len)); +#else +ZEXTERN uLong ZEXPORT crc32 OF((uLong crc, const Bytef *buf, uInt len)); +#endif // __ECOS__ +/* + Update a running crc with the bytes buf[0..len-1] and return the updated + crc. If buf is NULL, this function returns the required initial value + for the crc. Pre- and post-conditioning (one's complement) is performed + within this function so it shouldn't be done by the application. + Usage example: + + uLong crc = crc32(0L, Z_NULL, 0); + + while (read_buffer(buffer, length) != EOF) { + crc = crc32(crc, buffer, length); + } + if (crc != original_crc) error(); +*/ + + /* various hacks, don't look :) */ + +/* deflateInit and inflateInit are macros to allow checking the zlib version + * and the compiler's view of z_stream: + */ +ZEXTERN int ZEXPORT deflateInit_ OF((z_streamp strm, int level, + const char *version, int stream_size)); +ZEXTERN int ZEXPORT inflateInit_ OF((z_streamp strm, + const char *version, int stream_size)); +ZEXTERN int ZEXPORT deflateInit2_ OF((z_streamp strm, int level, int method, + int windowBits, int memLevel, + int strategy, const char *version, + int stream_size)); +ZEXTERN int ZEXPORT inflateInit2_ OF((z_streamp strm, int windowBits, + const char *version, int stream_size)); +#define deflateInit(strm, level) \ + deflateInit_((strm), (level), ZLIB_VERSION, sizeof(z_stream)) +#define inflateInit(strm) \ + inflateInit_((strm), ZLIB_VERSION, sizeof(z_stream)) +#define deflateInit2(strm, level, method, windowBits, memLevel, strategy) \ + deflateInit2_((strm),(level),(method),(windowBits),(memLevel),\ + (strategy), ZLIB_VERSION, sizeof(z_stream)) +#define inflateInit2(strm, windowBits) \ + inflateInit2_((strm), (windowBits), ZLIB_VERSION, sizeof(z_stream)) + + +#if !defined(_Z_UTIL_H) && !defined(NO_DUMMY_DECL) + struct internal_state {int dummy;}; /* hack for buggy compilers */ +#endif + +ZEXTERN const char * ZEXPORT zError OF((int err)); +ZEXTERN int ZEXPORT inflateSyncPoint OF((z_streamp z)); +ZEXTERN const uLongf * ZEXPORT get_crc_table OF((void)); + +#ifdef __cplusplus +} +#endif + +#endif /* _ZLIB_H */ diff --git a/packages/services/compress/zlib/current/src/ChangeLog b/packages/services/compress/zlib/current/src/ChangeLog new file mode 100644 --- /dev/null +++ b/packages/services/compress/zlib/current/src/ChangeLog @@ -0,0 +1,471 @@ + + ChangeLog file for zlib + +Changes in 1.1.3 (9 July 1998) +- fix "an inflate input buffer bug that shows up on rare but persistent + occasions" (Mark) +- fix gzread and gztell for concatenated .gz files (Didier Le Botlan) +- fix gzseek(..., SEEK_SET) in write mode +- fix crc check after a gzeek (Frank Faubert) +- fix miniunzip when the last entry in a zip file is itself a zip file + (J Lillge) +- add contrib/asm586 and contrib/asm686 (Brian Raiter) + See http://www.muppetlabs.com/~breadbox/software/assembly.html +- add support for Delphi 3 in contrib/delphi (Bob Dellaca) +- add support for C++Builder 3 and Delphi 3 in contrib/delphi2 (Davide Moretti) +- do not exit prematurely in untgz if 0 at start of block (Magnus Holmgren) +- use macro EXTERN instead of extern to support DLL for BeOS (Sander Stoks) +- added a FAQ file + +- Support gzdopen on Mac with Metrowerks (Jason Linhart) +- Do not redefine Byte on Mac (Brad Pettit & Jason Linhart) +- define SEEK_END too if SEEK_SET is not defined (Albert Chin-A-Young) +- avoid some warnings with Borland C (Tom Tanner) +- fix a problem in contrib/minizip/zip.c for 16-bit MSDOS (Gilles Vollant) +- emulate utime() for WIN32 in contrib/untgz (Gilles Vollant) +- allow several arguments to configure (Tim Mooney, Frodo Looijaard) +- use libdir and includedir in Makefile.in (Tim Mooney) +- support shared libraries on OSF1 V4 (Tim Mooney) +- remove so_locations in "make clean" (Tim Mooney) +- fix maketree.c compilation error (Glenn, Mark) +- Python interface to zlib now in Python 1.5 (Jeremy Hylton) +- new Makefile.riscos (Rich Walker) +- initialize static descriptors in trees.c for embedded targets (Nick Smith) +- use "foo-gz" in example.c for RISCOS and VMS (Nick Smith) +- add the OS/2 files in Makefile.in too (Andrew Zabolotny) +- fix fdopen and halloc macros for Microsoft C 6.0 (Tom Lane) +- fix maketree.c to allow clean compilation of inffixed.h (Mark) +- fix parameter check in deflateCopy (Gunther Nikl) +- cleanup trees.c, use compressed_len only in debug mode (Christian Spieler) +- Many portability patches by Christian Spieler: + . zutil.c, zutil.h: added "const" for zmem* + . Make_vms.com: fixed some typos + . Make_vms.com: msdos/Makefile.*: removed zutil.h from some dependency lists + . msdos/Makefile.msc: remove "default rtl link library" info from obj files + . msdos/Makefile.*: use model-dependent name for the built zlib library + . msdos/Makefile.emx, nt/Makefile.emx, nt/Makefile.gcc: + new makefiles, for emx (DOS/OS2), emx&rsxnt and mingw32 (Windows 9x / NT) +- use define instead of typedef for Bytef also for MSC small/medium (Tom Lane) +- replace __far with _far for better portability (Christian Spieler, Tom Lane) +- fix test for errno.h in configure (Tim Newsham) + +Changes in 1.1.2 (19 March 98) +- added contrib/minzip, mini zip and unzip based on zlib (Gilles Vollant) + See http://www.winimage.com/zLibDll/unzip.html +- preinitialize the inflate tables for fixed codes, to make the code + completely thread safe (Mark) +- some simplifications and slight speed-up to the inflate code (Mark) +- fix gzeof on non-compressed files (Allan Schrum) +- add -std1 option in configure for OSF1 to fix gzprintf (Martin Mokrejs) +- use default value of 4K for Z_BUFSIZE for 16-bit MSDOS (Tim Wegner + Glenn) +- added os2/Makefile.def and os2/zlib.def (Andrew Zabolotny) +- add shared lib support for UNIX_SV4.2MP (MATSUURA Takanori) +- do not wrap extern "C" around system includes (Tom Lane) +- mention zlib binding for TCL in README (Andreas Kupries) +- added amiga/Makefile.pup for Amiga powerUP SAS/C PPC (Andreas Kleinert) +- allow "make install prefix=..." even after configure (Glenn Randers-Pehrson) +- allow "configure --prefix $HOME" (Tim Mooney) +- remove warnings in example.c and gzio.c (Glenn Randers-Pehrson) +- move Makefile.sas to amiga/Makefile.sas + +Changes in 1.1.1 (27 Feb 98) +- fix macros _tr_tally_* in deflate.h for debug mode (Glenn Randers-Pehrson) +- remove block truncation heuristic which had very marginal effect for zlib + (smaller lit_bufsize than in gzip 1.2.4) and degraded a little the + compression ratio on some files. This also allows inlining _tr_tally for + matches in deflate_slow. +- added msdos/Makefile.w32 for WIN32 Microsoft Visual C++ (Bob Frazier) + +Changes in 1.1.0 (24 Feb 98) +- do not return STREAM_END prematurely in inflate (John Bowler) +- revert to the zlib 1.0.8 inflate to avoid the gcc 2.8.0 bug (Jeremy Buhler) +- compile with -DFASTEST to get compression code optimized for speed only +- in minigzip, try mmap'ing the input file first (Miguel Albrecht) +- increase size of I/O buffers in minigzip.c and gzio.c (not a big gain + on Sun but significant on HP) + +- add a pointer to experimental unzip library in README (Gilles Vollant) +- initialize variable gcc in configure (Chris Herborth) + +Changes in 1.0.9 (17 Feb 1998) +- added gzputs and gzgets functions +- do not clear eof flag in gzseek (Mark Diekhans) +- fix gzseek for files in transparent mode (Mark Diekhans) +- do not assume that vsprintf returns the number of bytes written (Jens Krinke) +- replace EXPORT with ZEXPORT to avoid conflict with other programs +- added compress2 in zconf.h, zlib.def, zlib.dnt +- new asm code from Gilles Vollant in contrib/asm386 +- simplify the inflate code (Mark): + . Replace ZALLOC's in huft_build() with single ZALLOC in inflate_blocks_new() + . ZALLOC the length list in inflate_trees_fixed() instead of using stack + . ZALLOC the value area for huft_build() instead of using stack + . Simplify Z_FINISH check in inflate() + +- Avoid gcc 2.8.0 comparison bug a little differently than zlib 1.0.8 +- in inftrees.c, avoid cc -O bug on HP (Farshid Elahi) +- in zconf.h move the ZLIB_DLL stuff earlier to avoid problems with + the declaration of FAR (Gilles VOllant) +- install libz.so* with mode 755 (executable) instead of 644 (Marc Lehmann) +- read_buf buf parameter of type Bytef* instead of charf* +- zmemcpy parameters are of type Bytef*, not charf* (Joseph Strout) +- do not redeclare unlink in minigzip.c for WIN32 (John Bowler) +- fix check for presence of directories in "make install" (Ian Willis) + +Changes in 1.0.8 (27 Jan 1998) +- fixed offsets in contrib/asm386/gvmat32.asm (Gilles Vollant) +- fix gzgetc and gzputc for big endian systems (Markus Oberhumer) +- added compress2() to allow setting the compression level +- include sys/types.h to get off_t on some systems (Marc Lehmann & QingLong) +- use constant arrays for the static trees in trees.c instead of computing + them at run time (thanks to Ken Raeburn for this suggestion). To create + trees.h, compile with GEN_TREES_H and run "make test". +- check return code of example in "make test" and display result +- pass minigzip command line options to file_compress +- simplifying code of inflateSync to avoid gcc 2.8 bug + +- support CC="gcc -Wall" in configure -s (QingLong) +- avoid a flush caused by ftell in gzopen for write mode (Ken Raeburn) +- fix test for shared library support to avoid compiler warnings +- zlib.lib -> zlib.dll in msdos/zlib.rc (Gilles Vollant) +- check for TARGET_OS_MAC in addition to MACOS (Brad Pettit) +- do not use fdopen for Metrowerks on Mac (Brad Pettit)) +- add checks for gzputc and gzputc in example.c +- avoid warnings in gzio.c and deflate.c (Andreas Kleinert) +- use const for the CRC table (Ken Raeburn) +- fixed "make uninstall" for shared libraries +- use Tracev instead of Trace in infblock.c +- in example.c use correct compressed length for test_sync +- suppress +vnocompatwarnings in configure for HPUX (not always supported) + +Changes in 1.0.7 (20 Jan 1998) +- fix gzseek which was broken in write mode +- return error for gzseek to negative absolute position +- fix configure for Linux (Chun-Chung Chen) +- increase stack space for MSC (Tim Wegner) +- get_crc_table and inflateSyncPoint are EXPORTed (Gilles Vollant) +- define EXPORTVA for gzprintf (Gilles Vollant) +- added man page zlib.3 (Rick Rodgers) +- for contrib/untgz, fix makedir() and improve Makefile + +- check gzseek in write mode in example.c +- allocate extra buffer for seeks only if gzseek is actually called +- avoid signed/unsigned comparisons (Tim Wegner, Gilles Vollant) +- add inflateSyncPoint in zconf.h +- fix list of exported functions in nt/zlib.dnt and mdsos/zlib.def + +Changes in 1.0.6 (19 Jan 1998) +- add functions gzprintf, gzputc, gzgetc, gztell, gzeof, gzseek, gzrewind and + gzsetparams (thanks to Roland Giersig and Kevin Ruland for some of this code) +- Fix a deflate bug occuring only with compression level 0 (thanks to + Andy Buckler for finding this one). +- In minigzip, pass transparently also the first byte for .Z files. +- return Z_BUF_ERROR instead of Z_OK if output buffer full in uncompress() +- check Z_FINISH in inflate (thanks to Marc Schluper) +- Implement deflateCopy (thanks to Adam Costello) +- make static libraries by default in configure, add --shared option. +- move MSDOS or Windows specific files to directory msdos +- suppress the notion of partial flush to simplify the interface + (but the symbol Z_PARTIAL_FLUSH is kept for compatibility with 1.0.4) +- suppress history buffer provided by application to simplify the interface + (this feature was not implemented anyway in 1.0.4) +- next_in and avail_in must be initialized before calling inflateInit or + inflateInit2 +- add EXPORT in all exported functions (for Windows DLL) +- added Makefile.nt (thanks to Stephen Williams) +- added the unsupported "contrib" directory: + contrib/asm386/ by Gilles Vollant + 386 asm code replacing longest_match(). + contrib/iostream/ by Kevin Ruland + A C++ I/O streams interface to the zlib gz* functions + contrib/iostream2/ by Tyge Løvset + Another C++ I/O streams interface + contrib/untgz/ by "Pedro A. Aranda Guti\irrez" + A very simple tar.gz file extractor using zlib + contrib/visual-basic.txt by Carlos Rios + How to use compress(), uncompress() and the gz* functions from VB. +- pass params -f (filtered data), -h (huffman only), -1 to -9 (compression + level) in minigzip (thanks to Tom Lane) + +- use const for rommable constants in deflate +- added test for gzseek and gztell in example.c +- add undocumented function inflateSyncPoint() (hack for Paul Mackerras) +- add undocumented function zError to convert error code to string + (for Tim Smithers) +- Allow compilation of gzio with -DNO_DEFLATE to avoid the compression code. +- Use default memcpy for Symantec MSDOS compiler. +- Add EXPORT keyword for check_func (needed for Windows DLL) +- add current directory to LD_LIBRARY_PATH for "make test" +- create also a link for libz.so.1 +- added support for FUJITSU UXP/DS (thanks to Toshiaki Nomura) +- use $(SHAREDLIB) instead of libz.so in Makefile.in (for HPUX) +- added -soname for Linux in configure (Chun-Chung Chen, +- assign numbers to the exported functions in zlib.def (for Windows DLL) +- add advice in zlib.h for best usage of deflateSetDictionary +- work around compiler bug on Atari (cast Z_NULL in call of s->checkfn) +- allow compilation with ANSI keywords only enabled for TurboC in large model +- avoid "versionString"[0] (Borland bug) +- add NEED_DUMMY_RETURN for Borland +- use variable z_verbose for tracing in debug mode (L. Peter Deutsch). +- allow compilation with CC +- defined STDC for OS/2 (David Charlap) +- limit external names to 8 chars for MVS (Thomas Lund) +- in minigzip.c, use static buffers only for 16-bit systems +- fix suffix check for "minigzip -d foo.gz" +- do not return an error for the 2nd of two consecutive gzflush() (Felix Lee) +- use _fdopen instead of fdopen for MSC >= 6.0 (Thomas Fanslau) +- added makelcc.bat for lcc-win32 (Tom St Denis) +- in Makefile.dj2, use copy and del instead of install and rm (Frank Donahoe) +- Avoid expanded $Id$. Use "rcs -kb" or "cvs admin -kb" to avoid Id expansion. +- check for unistd.h in configure (for off_t) +- remove useless check parameter in inflate_blocks_free +- avoid useless assignment of s->check to itself in inflate_blocks_new +- do not flush twice in gzclose (thanks to Ken Raeburn) +- rename FOPEN as F_OPEN to avoid clash with /usr/include/sys/file.h +- use NO_ERRNO_H instead of enumeration of operating systems with errno.h +- work around buggy fclose on pipes for HP/UX +- support zlib DLL with BORLAND C++ 5.0 (thanks to Glenn Randers-Pehrson) +- fix configure if CC is already equal to gcc + +Changes in 1.0.5 (3 Jan 98) +- Fix inflate to terminate gracefully when fed corrupted or invalid data +- Use const for rommable constants in inflate +- Eliminate memory leaks on error conditions in inflate +- Removed some vestigial code in inflate +- Update web address in README + +Changes in 1.0.4 (24 Jul 96) +- In very rare conditions, deflate(s, Z_FINISH) could fail to produce an EOF + bit, so the decompressor could decompress all the correct data but went + on to attempt decompressing extra garbage data. This affected minigzip too. +- zlibVersion and gzerror return const char* (needed for DLL) +- port to RISCOS (no fdopen, no multiple dots, no unlink, no fileno) +- use z_error only for DEBUG (avoid problem with DLLs) + +Changes in 1.0.3 (2 Jul 96) +- use z_streamp instead of z_stream *, which is now a far pointer in MSDOS + small and medium models; this makes the library incompatible with previous + versions for these models. (No effect in large model or on other systems.) +- return OK instead of BUF_ERROR if previous deflate call returned with + avail_out as zero but there is nothing to do +- added memcmp for non STDC compilers +- define NO_DUMMY_DECL for more Mac compilers (.h files merged incorrectly) +- define __32BIT__ if __386__ or i386 is defined (pb. with Watcom and SCO) +- better check for 16-bit mode MSC (avoids problem with Symantec) + +Changes in 1.0.2 (23 May 96) +- added Windows DLL support +- added a function zlibVersion (for the DLL support) +- fixed declarations using Bytef in infutil.c (pb with MSDOS medium model) +- Bytef is define's instead of typedef'd only for Borland C +- avoid reading uninitialized memory in example.c +- mention in README that the zlib format is now RFC1950 +- updated Makefile.dj2 +- added algorithm.doc + +Changes in 1.0.1 (20 May 96) [1.0 skipped to avoid confusion] +- fix array overlay in deflate.c which sometimes caused bad compressed data +- fix inflate bug with empty stored block +- fix MSDOS medium model which was broken in 0.99 +- fix deflateParams() which could generated bad compressed data. +- Bytef is define'd instead of typedef'ed (work around Borland bug) +- added an INDEX file +- new makefiles for DJGPP (Makefile.dj2), 32-bit Borland (Makefile.b32), + Watcom (Makefile.wat), Amiga SAS/C (Makefile.sas) +- speed up adler32 for modern machines without auto-increment +- added -ansi for IRIX in configure +- static_init_done in trees.c is an int +- define unlink as delete for VMS +- fix configure for QNX +- add configure branch for SCO and HPUX +- avoid many warnings (unused variables, dead assignments, etc...) +- no fdopen for BeOS +- fix the Watcom fix for 32 bit mode (define FAR as empty) +- removed redefinition of Byte for MKWERKS +- work around an MWKERKS bug (incorrect merge of all .h files) + +Changes in 0.99 (27 Jan 96) +- allow preset dictionary shared between compressor and decompressor +- allow compression level 0 (no compression) +- add deflateParams in zlib.h: allow dynamic change of compression level + and compression strategy. +- test large buffers and deflateParams in example.c +- add optional "configure" to build zlib as a shared library +- suppress Makefile.qnx, use configure instead +- fixed deflate for 64-bit systems (detected on Cray) +- fixed inflate_blocks for 64-bit systems (detected on Alpha) +- declare Z_DEFLATED in zlib.h (possible parameter for deflateInit2) +- always return Z_BUF_ERROR when deflate() has nothing to do +- deflateInit and inflateInit are now macros to allow version checking +- prefix all global functions and types with z_ with -DZ_PREFIX +- make falloc completely reentrant (inftrees.c) +- fixed very unlikely race condition in ct_static_init +- free in reverse order of allocation to help memory manager +- use zlib-1.0/* instead of zlib/* inside the tar.gz +- make zlib warning-free with "gcc -O3 -Wall -Wwrite-strings -Wpointer-arith + -Wconversion -Wstrict-prototypes -Wmissing-prototypes" +- allow gzread on concatenated .gz files +- deflateEnd now returns Z_DATA_ERROR if it was premature +- deflate is finally (?) fully deterministic (no matches beyond end of input) +- Document Z_SYNC_FLUSH +- add uninstall in Makefile +- Check for __cpluplus in zlib.h +- Better test in ct_align for partial flush +- avoid harmless warnings for Borland C++ +- initialize hash_head in deflate.c +- avoid warning on fdopen (gzio.c) for HP cc -Aa +- include stdlib.h for STDC compilers +- include errno.h for Cray +- ignore error if ranlib doesn't exist +- call ranlib twice for NeXTSTEP +- use exec_prefix instead of prefix for libz.a +- renamed ct_* as _tr_* to avoid conflict with applications +- clear z->msg in inflateInit2 before any error return +- initialize opaque in example.c, gzio.c, deflate.c and inflate.c +- fixed typo in zconf.h (_GNUC__ => __GNUC__) +- check for WIN32 in zconf.h and zutil.c (avoid farmalloc in 32-bit mode) +- fix typo in Make_vms.com (f$trnlnm -> f$getsyi) +- in fcalloc, normalize pointer if size > 65520 bytes +- don't use special fcalloc for 32 bit Borland C++ +- use STDC instead of __GO32__ to avoid redeclaring exit, calloc, etc... +- use Z_BINARY instead of BINARY +- document that gzclose after gzdopen will close the file +- allow "a" as mode in gzopen. +- fix error checking in gzread +- allow skipping .gz extra-field on pipes +- added reference to Perl interface in README +- put the crc table in FAR data (I dislike more and more the medium model :) +- added get_crc_table +- added a dimension to all arrays (Borland C can't count). +- workaround Borland C bug in declaration of inflate_codes_new & inflate_fast +- guard against multiple inclusion of *.h (for precompiled header on Mac) +- Watcom C pretends to be Microsoft C small model even in 32 bit mode. +- don't use unsized arrays to avoid silly warnings by Visual C++: + warning C4746: 'inflate_mask' : unsized array treated as '__far' + (what's wrong with far data in far model?). +- define enum out of inflate_blocks_state to allow compilation with C++ + +Changes in 0.95 (16 Aug 95) +- fix MSDOS small and medium model (now easier to adapt to any compiler) +- inlined send_bits +- fix the final (:-) bug for deflate with flush (output was correct but + not completely flushed in rare occasions). +- default window size is same for compression and decompression + (it's now sufficient to set MAX_WBITS in zconf.h). +- voidp -> voidpf and voidnp -> voidp (for consistency with other + typedefs and because voidnp was not near in large model). + +Changes in 0.94 (13 Aug 95) +- support MSDOS medium model +- fix deflate with flush (could sometimes generate bad output) +- fix deflateReset (zlib header was incorrectly suppressed) +- added support for VMS +- allow a compression level in gzopen() +- gzflush now calls fflush +- For deflate with flush, flush even if no more input is provided. +- rename libgz.a as libz.a +- avoid complex expression in infcodes.c triggering Turbo C bug +- work around a problem with gcc on Alpha (in INSERT_STRING) +- don't use inline functions (problem with some gcc versions) +- allow renaming of Byte, uInt, etc... with #define. +- avoid warning about (unused) pointer before start of array in deflate.c +- avoid various warnings in gzio.c, example.c, infblock.c, adler32.c, zutil.c +- avoid reserved word 'new' in trees.c + +Changes in 0.93 (25 June 95) +- temporarily disable inline functions +- make deflate deterministic +- give enough lookahead for PARTIAL_FLUSH +- Set binary mode for stdin/stdout in minigzip.c for OS/2 +- don't even use signed char in inflate (not portable enough) +- fix inflate memory leak for segmented architectures + +Changes in 0.92 (3 May 95) +- don't assume that char is signed (problem on SGI) +- Clear bit buffer when starting a stored block +- no memcpy on Pyramid +- suppressed inftest.c +- optimized fill_window, put longest_match inline for gcc +- optimized inflate on stored blocks. +- untabify all sources to simplify patches + +Changes in 0.91 (2 May 95) +- Default MEM_LEVEL is 8 (not 9 for Unix) as documented in zlib.h +- Document the memory requirements in zconf.h +- added "make install" +- fix sync search logic in inflateSync +- deflate(Z_FULL_FLUSH) now works even if output buffer too short +- after inflateSync, don't scare people with just "lo world" +- added support for DJGPP + +Changes in 0.9 (1 May 95) +- don't assume that zalloc clears the allocated memory (the TurboC bug + was Mark's bug after all :) +- let again gzread copy uncompressed data unchanged (was working in 0.71) +- deflate(Z_FULL_FLUSH), inflateReset and inflateSync are now fully implemented +- added a test of inflateSync in example.c +- moved MAX_WBITS to zconf.h because users might want to change that. +- document explicitly that zalloc(64K) on MSDOS must return a normalized + pointer (zero offset) +- added Makefiles for Microsoft C, Turbo C, Borland C++ +- faster crc32() + +Changes in 0.8 (29 April 95) +- added fast inflate (inffast.c) +- deflate(Z_FINISH) now returns Z_STREAM_END when done. Warning: this + is incompatible with previous versions of zlib which returned Z_OK. +- work around a TurboC compiler bug (bad code for b << 0, see infutil.h) + (actually that was not a compiler bug, see 0.81 above) +- gzread no longer reads one extra byte in certain cases +- In gzio destroy(), don't reference a freed structure +- avoid many warnings for MSDOS +- avoid the ERROR symbol which is used by MS Windows + +Changes in 0.71 (14 April 95) +- Fixed more MSDOS compilation problems :( There is still a bug with + TurboC large model. + +Changes in 0.7 (14 April 95) +- Added full inflate support. +- Simplified the crc32() interface. The pre- and post-conditioning + (one's complement) is now done inside crc32(). WARNING: this is + incompatible with previous versions; see zlib.h for the new usage. + +Changes in 0.61 (12 April 95) +- workaround for a bug in TurboC. example and minigzip now work on MSDOS. + +Changes in 0.6 (11 April 95) +- added minigzip.c +- added gzdopen to reopen a file descriptor as gzFile +- added transparent reading of non-gziped files in gzread. +- fixed bug in gzread (don't read crc as data) +- fixed bug in destroy (gzio.c) (don't return Z_STREAM_END for gzclose). +- don't allocate big arrays in the stack (for MSDOS) +- fix some MSDOS compilation problems + +Changes in 0.5: +- do real compression in deflate.c. Z_PARTIAL_FLUSH is supported but + not yet Z_FULL_FLUSH. +- support decompression but only in a single step (forced Z_FINISH) +- added opaque object for zalloc and zfree. +- added deflateReset and inflateReset +- added a variable zlib_version for consistency checking. +- renamed the 'filter' parameter of deflateInit2 as 'strategy'. + Added Z_FILTERED and Z_HUFFMAN_ONLY constants. + +Changes in 0.4: +- avoid "zip" everywhere, use zlib instead of ziplib. +- suppress Z_BLOCK_FLUSH, interpret Z_PARTIAL_FLUSH as block flush + if compression method == 8. +- added adler32 and crc32 +- renamed deflateOptions as deflateInit2, call one or the other but not both +- added the method parameter for deflateInit2. +- added inflateInit2 +- simplied considerably deflateInit and inflateInit by not supporting + user-provided history buffer. This is supported only in deflateInit2 + and inflateInit2. + +Changes in 0.3: +- prefix all macro names with Z_ +- use Z_FINISH instead of deflateEnd to finish compression. +- added Z_HUFFMAN_ONLY +- added gzerror() diff --git a/packages/services/compress/zlib/current/src/FAQ b/packages/services/compress/zlib/current/src/FAQ new file mode 100644 --- /dev/null +++ b/packages/services/compress/zlib/current/src/FAQ @@ -0,0 +1,72 @@ + + Frequently Asked Questions about zlib + + +If your question is not there, please check the zlib home page +http://www.cdrom.com/pub/infozip/zlib/ which may have more recent information. + + +1) I need a Windows DLL +2) I need a Visual Basic interface to zlib +3) compress() returns Z_BUF_ERROR +4) deflate or inflate returns Z_BUF_ERROR +5) Where is the zlib documentation (man pages, etc...)? +6) Why don't you use GNU autoconf, libtool, etc...? +7) There is a bug in zlib. +8) I get "undefined reference to gzputc" + + + +1) I need a Windows DLL + + The zlib sources can be compiled without change to produce a DLL. + If you want a precompiled DLL, see http://www.winimage.com/zLibDll + + +2) I need a Visual Basic interface to zlib + + See http://www.tcfb.com/dowseware/cmp-z-it.zip + http://web2.airmail.net/markn/articles/zlibtool/zlibtool.htm + and contrib/visual-basic.txt + +3) compress() returns Z_BUF_ERROR + + Make sure that before the call of compress, the length of the + compressed buffer is equal to the total size of the compressed buffer + and not zero. For Visual Basic, check that this parameter is passed + by reference ("as any"), not by value ("as long"). + + +4) deflate or inflate returns Z_BUF_ERROR + + Make sure that before the call avail_in and avail_out are not zero. + + +5) Where is the zlib documentation (man pages, etc...)? + + It's in zlib.h for the moment. Volunteers to transform this + to man pages, please contact jloup@gzip.org. Examples of zlib usage + are in the files example.c and minigzip.c. + + +6) Why don't you use GNU autoconf, libtool, etc...? + + Because we would like to keep zlib as a very small and simple package. + zlib is rather portable and doesn't need much configuration. + + +7) There is a bug in zlib. + + Most of the time, such problems are due to an incorrect usage + of zlib. Please try to reproduce the problem with a small + program and send us the corresponding source at zlib@quest.jpl.nasa.gov + Do not send multi-megabyte data files without prior agreement. + + +8) I get "undefined reference to gzputc" + + If "make test" produces something like + example.o(.text+0x174): + check that you don't have old files libz.* in /usr/lib, /usr/local/lib + or /usr/X11R6/lib. Remove old versions then do "make install". + diff --git a/packages/services/compress/zlib/current/src/INDEX b/packages/services/compress/zlib/current/src/INDEX new file mode 100644 --- /dev/null +++ b/packages/services/compress/zlib/current/src/INDEX @@ -0,0 +1,86 @@ +ChangeLog history of changes +INDEX this file +FAQ Frequently Asked Questions about zlib +Make_vms.com script for Vax/VMS +Makefile makefile for Unix (generated by configure) +Makefile.in makefile for Unix (template for configure) +Makefile.riscos makefile for RISCOS +README guess what +algorithm.txt description of the (de)compression algorithm +configure configure script for Unix +descrip.mms makefile for Vax/VMS +zlib.3 mini man page for zlib (volunteers to write full + man pages from zlib.h welcome. write to jloup@gzip.org) + +amiga/Makefile.sas makefile for Amiga SAS/C +amiga/Makefile.pup makefile for Amiga powerUP SAS/C PPC + +msdos/Makefile.w32 makefile for Microsoft Visual C++ 32-bit +msdos/Makefile.b32 makefile for Borland C++ 32-bit +msdos/Makefile.bor makefile for Borland C/C++ 16-bit +msdos/Makefile.dj2 makefile for DJGPP 2.x +msdos/Makefile.emx makefile for EMX 0.9c (32-bit DOS/OS2) +msdos/Makefile.msc makefile for Microsoft C 16-bit +msdos/Makefile.tc makefile for Turbo C +msdos/Makefile.wat makefile for Watcom C +msdos/zlib.def definition file for Windows DLL +msdos/zlib.rc definition file for Windows DLL + +nt/Makefile.nt makefile for Windows NT +nt/zlib.dnt definition file for Windows NT DLL +nt/Makefile.emx makefile for EMX 0.9c/RSXNT 1.41 (Win32 Intel) +nt/Makefile.gcc makefile for Windows NT using GCC (mingw32) + + + zlib public header files (must be kept): +zconf.h +zlib.h + + private source files used to build the zlib library: +adler32.c +compress.c +crc32.c +deflate.c +deflate.h +gzio.c +infblock.c +infblock.h +infcodes.c +infcodes.h +inffast.c +inffast.h +inflate.c +inftrees.c +inftrees.h +infutil.c +infutil.h +maketree.c +trees.c +uncompr.c +zutil.c +zutil.h + + source files for sample programs: +example.c +minigzip.c + + unsupported contribution by third parties + +contrib/asm386/ by Gilles Vollant + 386 asm code replacing longest_match(). + +contrib/minizip/ by Gilles Vollant + Mini zip and unzip based on zlib + See http://www.winimage.com/zLibDll/unzip.html + +contrib/iostream/ by Kevin Ruland + A C++ I/O streams interface to the zlib gz* functions + +contrib/iostream2/ by Tyge Løvset + Another C++ I/O streams interface + +contrib/untgz/ by "Pedro A. Aranda Guti\irrez" + A very simple tar.gz extractor using zlib + +contrib/visual-basic.txt by Carlos Rios + How to use compress(), uncompress() and the gz* functions from VB. diff --git a/packages/services/compress/zlib/current/src/Make_vms.com b/packages/services/compress/zlib/current/src/Make_vms.com new file mode 100644 --- /dev/null +++ b/packages/services/compress/zlib/current/src/Make_vms.com @@ -0,0 +1,115 @@ +$! make libz under VMS +$! written by Martin P.J. Zinser +$! +$! Look for the compiler used +$! +$ ccopt = "" +$ if f$getsyi("HW_MODEL").ge.1024 +$ then +$ ccopt = "/prefix=all"+ccopt +$ comp = "__decc__=1" +$ if f$trnlnm("SYS").eqs."" then define sys sys$library: +$ else +$ if f$search("SYS$SYSTEM:DECC$COMPILER.EXE").eqs."" +$ then +$ comp = "__vaxc__=1" +$ if f$trnlnm("SYS").eqs."" then define sys sys$library: +$ else +$ if f$trnlnm("SYS").eqs."" then define sys decc$library_include: +$ ccopt = "/decc/prefix=all"+ccopt +$ comp = "__decc__=1" +$ endif +$ endif +$! +$! Build the thing plain or with mms +$! +$ write sys$output "Compiling Zlib sources ..." +$ if f$search("SYS$SYSTEM:MMS.EXE").eqs."" +$ then +$ dele example.obj;*,minigzip.obj;* +$ CALL MAKE adler32.OBJ "CC ''CCOPT' adler32" - + adler32.c zlib.h zconf.h +$ CALL MAKE compress.OBJ "CC ''CCOPT' compress" - + compress.c zlib.h zconf.h +$ CALL MAKE crc32.OBJ "CC ''CCOPT' crc32" - + crc32.c zlib.h zconf.h +$ CALL MAKE deflate.OBJ "CC ''CCOPT' deflate" - + deflate.c deflate.h zutil.h zlib.h zconf.h +$ CALL MAKE gzio.OBJ "CC ''CCOPT' gzio" - + gzio.c zutil.h zlib.h zconf.h +$ CALL MAKE infblock.OBJ "CC ''CCOPT' infblock" - + infblock.c zutil.h zlib.h zconf.h infblock.h +$ CALL MAKE infcodes.OBJ "CC ''CCOPT' infcodes" - + infcodes.c zutil.h zlib.h zconf.h inftrees.h +$ CALL MAKE inffast.OBJ "CC ''CCOPT' inffast" - + inffast.c zutil.h zlib.h zconf.h inffast.h +$ CALL MAKE inflate.OBJ "CC ''CCOPT' inflate" - + inflate.c zutil.h zlib.h zconf.h infblock.h +$ CALL MAKE inftrees.OBJ "CC ''CCOPT' inftrees" - + inftrees.c zutil.h zlib.h zconf.h inftrees.h +$ CALL MAKE infutil.OBJ "CC ''CCOPT' infutil" - + infutil.c zutil.h zlib.h zconf.h inftrees.h infutil.h +$ CALL MAKE trees.OBJ "CC ''CCOPT' trees" - + trees.c deflate.h zutil.h zlib.h zconf.h +$ CALL MAKE uncompr.OBJ "CC ''CCOPT' uncompr" - + uncompr.c zlib.h zconf.h +$ CALL MAKE zutil.OBJ "CC ''CCOPT' zutil" - + zutil.c zutil.h zlib.h zconf.h +$ write sys$output "Building Zlib ..." +$ CALL MAKE libz.OLB "lib/crea libz.olb *.obj" *.OBJ +$ write sys$output "Building example..." +$ CALL MAKE example.OBJ "CC ''CCOPT' example" - + example.c zlib.h zconf.h +$ call make example.exe "LINK example,libz.olb/lib" example.obj libz.olb +$ write sys$output "Building minigzip..." +$ CALL MAKE minigzip.OBJ "CC ''CCOPT' minigzip" - + minigzip.c zlib.h zconf.h +$ call make minigzip.exe - + "LINK minigzip,libz.olb/lib,x11vms:xvmsutils.olb/lib" - + minigzip.obj libz.olb +$ else +$ mms/macro=('comp') +$ endif +$ write sys$output "Zlib build completed" +$ exit +$! +$! +$MAKE: SUBROUTINE !SUBROUTINE TO CHECK DEPENDENCIES +$ V = 'F$Verify(0) +$! P1 = What we are trying to make +$! P2 = Command to make it +$! P3 - P8 What it depends on +$ +$ If F$Search(P1) .Eqs. "" Then Goto Makeit +$ Time = F$CvTime(F$File(P1,"RDT")) +$arg=3 +$Loop: +$ Argument = P'arg +$ If Argument .Eqs. "" Then Goto Exit +$ El=0 +$Loop2: +$ File = F$Element(El," ",Argument) +$ If File .Eqs. " " Then Goto Endl +$ AFile = "" +$Loop3: +$ OFile = AFile +$ AFile = F$Search(File) +$ If AFile .Eqs. "" .Or. AFile .Eqs. OFile Then Goto NextEl +$ If F$CvTime(F$File(AFile,"RDT")) .Ges. Time Then Goto Makeit +$ Goto Loop3 +$NextEL: +$ El = El + 1 +$ Goto Loop2 +$EndL: +$ arg=arg+1 +$ If arg .Le. 8 Then Goto Loop +$ Goto Exit +$ +$Makeit: +$ VV=F$VERIFY(0) +$ write sys$output P2 +$ 'P2 +$ VV='F$Verify(VV) +$Exit: +$ If V Then Set Verify +$ENDSUBROUTINE diff --git a/packages/services/compress/zlib/current/src/Makefile b/packages/services/compress/zlib/current/src/Makefile new file mode 100644 --- /dev/null +++ b/packages/services/compress/zlib/current/src/Makefile @@ -0,0 +1,174 @@ +# Makefile for zlib +# Copyright (C) 1995-1998 Jean-loup Gailly. +# For conditions of distribution and use, see copyright notice in zlib.h + +# To compile and test, type: +# ./configure; make test +# The call of configure is optional if you don't have special requirements +# If you wish to build zlib as a shared library, use: ./configure -s + +# To install /usr/local/lib/libz.* and /usr/local/include/zlib.h, type: +# make install +# To install in $HOME instead of /usr/local, use: +# make install prefix=$HOME + +CC=cc + +CFLAGS=-O +#CFLAGS=-O -DMAX_WBITS=14 -DMAX_MEM_LEVEL=7 +#CFLAGS=-g -DDEBUG +#CFLAGS=-O3 -Wall -Wwrite-strings -Wpointer-arith -Wconversion \ +# -Wstrict-prototypes -Wmissing-prototypes + +LDFLAGS=-L. -lz +LDSHARED=$(CC) +CPP=$(CC) -E + +VER=1.1.3 +LIBS=libz.a +SHAREDLIB=libz.so + +AR=ar rc +RANLIB=ranlib +TAR=tar +SHELL=/bin/sh + +prefix = /usr/local +exec_prefix = ${prefix} +libdir = ${exec_prefix}/lib +includedir = ${prefix}/include + +OBJS = adler32.o compress.o crc32.o gzio.o uncompr.o deflate.o trees.o \ + zutil.o inflate.o infblock.o inftrees.o infcodes.o infutil.o inffast.o + +OBJA = +# to use the asm code: make OBJA=match.o + +TEST_OBJS = example.o minigzip.o + +DISTFILES = README FAQ INDEX ChangeLog configure Make*[a-z0-9] *.[ch] *.mms \ + algorithm.txt zlib.3 msdos/Make*[a-z0-9] msdos/zlib.def msdos/zlib.rc \ + nt/Make*[a-z0-9] nt/zlib.dnt amiga/Make*.??? os2/M*.os2 os2/zlib.def \ + contrib/RE*.contrib contrib/*.txt contrib/asm386/*.asm contrib/asm386/*.c \ + contrib/asm386/*.bat contrib/asm386/zlibvc.d?? contrib/asm[56]86/*.?86 \ + contrib/asm[56]86/*.S contrib/iostream/*.cpp \ + contrib/iostream/*.h contrib/iostream2/*.h contrib/iostream2/*.cpp \ + contrib/untgz/Makefile contrib/untgz/*.c contrib/untgz/*.w32 \ + contrib/minizip/[CM]*[pe] contrib/minizip/*.[ch] contrib/minizip/*.[td]?? \ + contrib/delphi*/*.??? + +all: example minigzip + +test: all + @LD_LIBRARY_PATH=.:$(LD_LIBRARY_PATH) ; export LD_LIBRARY_PATH; \ + echo hello world | ./minigzip | ./minigzip -d || \ + echo ' *** minigzip test FAILED ***' ; \ + if ./example; then \ + echo ' *** zlib test OK ***'; \ + else \ + echo ' *** zlib test FAILED ***'; \ + fi + +libz.a: $(OBJS) $(OBJA) + $(AR) $@ $(OBJS) $(OBJA) + -@ ($(RANLIB) $@ || true) >/dev/null 2>&1 + +match.o: match.S + $(CPP) match.S > _match.s + $(CC) -c _match.s + mv _match.o match.o + rm -f _match.s + +$(SHAREDLIB).$(VER): $(OBJS) + $(LDSHARED) -o $@ $(OBJS) + rm -f $(SHAREDLIB) $(SHAREDLIB).1 + ln -s $@ $(SHAREDLIB) + ln -s $@ $(SHAREDLIB).1 + +example: example.o $(LIBS) + $(CC) $(CFLAGS) -o $@ example.o $(LDFLAGS) + +minigzip: minigzip.o $(LIBS) + $(CC) $(CFLAGS) -o $@ minigzip.o $(LDFLAGS) + +install: $(LIBS) + -@if [ ! -d $(includedir) ]; then mkdir $(includedir); fi + -@if [ ! -d $(libdir) ]; then mkdir $(libdir); fi + cp zlib.h zconf.h $(includedir) + chmod 644 $(includedir)/zlib.h $(includedir)/zconf.h + cp $(LIBS) $(libdir) + cd $(libdir); chmod 755 $(LIBS) + -@(cd $(libdir); $(RANLIB) libz.a || true) >/dev/null 2>&1 + cd $(libdir); if test -f $(SHAREDLIB).$(VER); then \ + rm -f $(SHAREDLIB) $(SHAREDLIB).1; \ + ln -s $(SHAREDLIB).$(VER) $(SHAREDLIB); \ + ln -s $(SHAREDLIB).$(VER) $(SHAREDLIB).1; \ + (ldconfig || true) >/dev/null 2>&1; \ + fi +# The ranlib in install is needed on NeXTSTEP which checks file times +# ldconfig is for Linux + +uninstall: + cd $(includedir); \ + v=$(VER); \ + if test -f zlib.h; then \ + v=`sed -n '/VERSION "/s/.*"\(.*\)".*/\1/p' < zlib.h`; \ + rm -f zlib.h zconf.h; \ + fi; \ + cd $(libdir); rm -f libz.a; \ + if test -f $(SHAREDLIB).$$v; then \ + rm -f $(SHAREDLIB).$$v $(SHAREDLIB) $(SHAREDLIB).1; \ + fi + +clean: + rm -f *.o *~ example minigzip libz.a libz.so* foo.gz so_locations \ + _match.s maketree + +distclean: clean + +zip: + mv Makefile Makefile~; cp -p Makefile.in Makefile + rm -f test.c ztest*.c contrib/minizip/test.zip + v=`sed -n -e 's/\.//g' -e '/VERSION "/s/.*"\(.*\)".*/\1/p' < zlib.h`;\ + zip -ul9 zlib$$v $(DISTFILES) + mv Makefile~ Makefile + +dist: + mv Makefile Makefile~; cp -p Makefile.in Makefile + rm -f test.c ztest*.c contrib/minizip/test.zip + d=zlib-`sed -n '/VERSION "/s/.*"\(.*\)".*/\1/p' < zlib.h`;\ + rm -f $$d.tar.gz; \ + if test ! -d ../$$d; then rm -f ../$$d; ln -s `pwd` ../$$d; fi; \ + files=""; \ + for f in $(DISTFILES); do files="$$files $$d/$$f"; done; \ + cd ..; \ + GZIP=-9 $(TAR) chofz $$d/$$d.tar.gz $$files; \ + if test ! -d $$d; then rm -f $$d; fi + mv Makefile~ Makefile + +tags: + etags *.[ch] + +depend: + makedepend -- $(CFLAGS) -- *.[ch] + +# DO NOT DELETE THIS LINE -- make depend depends on it. + +adler32.o: zlib.h zconf.h +compress.o: zlib.h zconf.h +crc32.o: zlib.h zconf.h +deflate.o: deflate.h zutil.h zlib.h zconf.h +example.o: zlib.h zconf.h +gzio.o: zutil.h zlib.h zconf.h +infblock.o: infblock.h inftrees.h infcodes.h infutil.h zutil.h zlib.h zconf.h +infcodes.o: zutil.h zlib.h zconf.h +infcodes.o: inftrees.h infblock.h infcodes.h infutil.h inffast.h +inffast.o: zutil.h zlib.h zconf.h inftrees.h +inffast.o: infblock.h infcodes.h infutil.h inffast.h +inflate.o: zutil.h zlib.h zconf.h infblock.h +inftrees.o: zutil.h zlib.h zconf.h inftrees.h +infutil.o: zutil.h zlib.h zconf.h infblock.h inftrees.h infcodes.h infutil.h +minigzip.o: zlib.h zconf.h +trees.o: deflate.h zutil.h zlib.h zconf.h trees.h +uncompr.o: zlib.h zconf.h +zutil.o: zutil.h zlib.h zconf.h diff --git a/packages/services/compress/zlib/current/src/Makefile.in b/packages/services/compress/zlib/current/src/Makefile.in new file mode 100644 --- /dev/null +++ b/packages/services/compress/zlib/current/src/Makefile.in @@ -0,0 +1,174 @@ +# Makefile for zlib +# Copyright (C) 1995-1998 Jean-loup Gailly. +# For conditions of distribution and use, see copyright notice in zlib.h + +# To compile and test, type: +# ./configure; make test +# The call of configure is optional if you don't have special requirements +# If you wish to build zlib as a shared library, use: ./configure -s + +# To install /usr/local/lib/libz.* and /usr/local/include/zlib.h, type: +# make install +# To install in $HOME instead of /usr/local, use: +# make install prefix=$HOME + +CC=cc + +CFLAGS=-O +#CFLAGS=-O -DMAX_WBITS=14 -DMAX_MEM_LEVEL=7 +#CFLAGS=-g -DDEBUG +#CFLAGS=-O3 -Wall -Wwrite-strings -Wpointer-arith -Wconversion \ +# -Wstrict-prototypes -Wmissing-prototypes + +LDFLAGS=-L. -lz +LDSHARED=$(CC) +CPP=$(CC) -E + +VER=1.1.3 +LIBS=libz.a +SHAREDLIB=libz.so + +AR=ar rc +RANLIB=ranlib +TAR=tar +SHELL=/bin/sh + +prefix = /usr/local +exec_prefix = ${prefix} +libdir = ${exec_prefix}/lib +includedir = ${prefix}/include + +OBJS = adler32.o compress.o crc32.o gzio.o uncompr.o deflate.o trees.o \ + zutil.o inflate.o infblock.o inftrees.o infcodes.o infutil.o inffast.o + +OBJA = +# to use the asm code: make OBJA=match.o + +TEST_OBJS = example.o minigzip.o + +DISTFILES = README FAQ INDEX ChangeLog configure Make*[a-z0-9] *.[ch] *.mms \ + algorithm.txt zlib.3 msdos/Make*[a-z0-9] msdos/zlib.def msdos/zlib.rc \ + nt/Make*[a-z0-9] nt/zlib.dnt amiga/Make*.??? os2/M*.os2 os2/zlib.def \ + contrib/RE*.contrib contrib/*.txt contrib/asm386/*.asm contrib/asm386/*.c \ + contrib/asm386/*.bat contrib/asm386/zlibvc.d?? contrib/asm[56]86/*.?86 \ + contrib/asm[56]86/*.S contrib/iostream/*.cpp \ + contrib/iostream/*.h contrib/iostream2/*.h contrib/iostream2/*.cpp \ + contrib/untgz/Makefile contrib/untgz/*.c contrib/untgz/*.w32 \ + contrib/minizip/[CM]*[pe] contrib/minizip/*.[ch] contrib/minizip/*.[td]?? \ + contrib/delphi*/*.??? + +all: example minigzip + +test: all + @LD_LIBRARY_PATH=.:$(LD_LIBRARY_PATH) ; export LD_LIBRARY_PATH; \ + echo hello world | ./minigzip | ./minigzip -d || \ + echo ' *** minigzip test FAILED ***' ; \ + if ./example; then \ + echo ' *** zlib test OK ***'; \ + else \ + echo ' *** zlib test FAILED ***'; \ + fi + +libz.a: $(OBJS) $(OBJA) + $(AR) $@ $(OBJS) $(OBJA) + -@ ($(RANLIB) $@ || true) >/dev/null 2>&1 + +match.o: match.S + $(CPP) match.S > _match.s + $(CC) -c _match.s + mv _match.o match.o + rm -f _match.s + +$(SHAREDLIB).$(VER): $(OBJS) + $(LDSHARED) -o $@ $(OBJS) + rm -f $(SHAREDLIB) $(SHAREDLIB).1 + ln -s $@ $(SHAREDLIB) + ln -s $@ $(SHAREDLIB).1 + +example: example.o $(LIBS) + $(CC) $(CFLAGS) -o $@ example.o $(LDFLAGS) + +minigzip: minigzip.o $(LIBS) + $(CC) $(CFLAGS) -o $@ minigzip.o $(LDFLAGS) + +install: $(LIBS) + -@if [ ! -d $(includedir) ]; then mkdir $(includedir); fi + -@if [ ! -d $(libdir) ]; then mkdir $(libdir); fi + cp zlib.h zconf.h $(includedir) + chmod 644 $(includedir)/zlib.h $(includedir)/zconf.h + cp $(LIBS) $(libdir) + cd $(libdir); chmod 755 $(LIBS) + -@(cd $(libdir); $(RANLIB) libz.a || true) >/dev/null 2>&1 + cd $(libdir); if test -f $(SHAREDLIB).$(VER); then \ + rm -f $(SHAREDLIB) $(SHAREDLIB).1; \ + ln -s $(SHAREDLIB).$(VER) $(SHAREDLIB); \ + ln -s $(SHAREDLIB).$(VER) $(SHAREDLIB).1; \ + (ldconfig || true) >/dev/null 2>&1; \ + fi +# The ranlib in install is needed on NeXTSTEP which checks file times +# ldconfig is for Linux + +uninstall: + cd $(includedir); \ + v=$(VER); \ + if test -f zlib.h; then \ + v=`sed -n '/VERSION "/s/.*"\(.*\)".*/\1/p' < zlib.h`; \ + rm -f zlib.h zconf.h; \ + fi; \ + cd $(libdir); rm -f libz.a; \ + if test -f $(SHAREDLIB).$$v; then \ + rm -f $(SHAREDLIB).$$v $(SHAREDLIB) $(SHAREDLIB).1; \ + fi + +clean: + rm -f *.o *~ example minigzip libz.a libz.so* foo.gz so_locations \ + _match.s maketree + +distclean: clean + +zip: + mv Makefile Makefile~; cp -p Makefile.in Makefile + rm -f test.c ztest*.c contrib/minizip/test.zip + v=`sed -n -e 's/\.//g' -e '/VERSION "/s/.*"\(.*\)".*/\1/p' < zlib.h`;\ + zip -ul9 zlib$$v $(DISTFILES) + mv Makefile~ Makefile + +dist: + mv Makefile Makefile~; cp -p Makefile.in Makefile + rm -f test.c ztest*.c contrib/minizip/test.zip + d=zlib-`sed -n '/VERSION "/s/.*"\(.*\)".*/\1/p' < zlib.h`;\ + rm -f $$d.tar.gz; \ + if test ! -d ../$$d; then rm -f ../$$d; ln -s `pwd` ../$$d; fi; \ + files=""; \ + for f in $(DISTFILES); do files="$$files $$d/$$f"; done; \ + cd ..; \ + GZIP=-9 $(TAR) chofz $$d/$$d.tar.gz $$files; \ + if test ! -d $$d; then rm -f $$d; fi + mv Makefile~ Makefile + +tags: + etags *.[ch] + +depend: + makedepend -- $(CFLAGS) -- *.[ch] + +# DO NOT DELETE THIS LINE -- make depend depends on it. + +adler32.o: zlib.h zconf.h +compress.o: zlib.h zconf.h +crc32.o: zlib.h zconf.h +deflate.o: deflate.h zutil.h zlib.h zconf.h +example.o: zlib.h zconf.h +gzio.o: zutil.h zlib.h zconf.h +infblock.o: infblock.h inftrees.h infcodes.h infutil.h zutil.h zlib.h zconf.h +infcodes.o: zutil.h zlib.h zconf.h +infcodes.o: inftrees.h infblock.h infcodes.h infutil.h inffast.h +inffast.o: zutil.h zlib.h zconf.h inftrees.h +inffast.o: infblock.h infcodes.h infutil.h inffast.h +inflate.o: zutil.h zlib.h zconf.h infblock.h +inftrees.o: zutil.h zlib.h zconf.h inftrees.h +infutil.o: zutil.h zlib.h zconf.h infblock.h inftrees.h infcodes.h infutil.h +minigzip.o: zlib.h zconf.h +trees.o: deflate.h zutil.h zlib.h zconf.h trees.h +uncompr.o: zlib.h zconf.h +zutil.o: zutil.h zlib.h zconf.h diff --git a/packages/services/compress/zlib/current/src/Makefile.riscos b/packages/services/compress/zlib/current/src/Makefile.riscos new file mode 100644 --- /dev/null +++ b/packages/services/compress/zlib/current/src/Makefile.riscos @@ -0,0 +1,151 @@ +# Project: zlib_1_03 +# Patched for zlib 1.1.2 rw@shadow.org.uk 19980430 +# test works out-of-the-box, installs `somewhere' on demand + +# Toolflags: +CCflags = -c -depend !Depend -IC: -g -throwback -DRISCOS -fah +C++flags = -c -depend !Depend -IC: -throwback +Linkflags = -aif -c++ -o $@ +ObjAsmflags = -throwback -NoCache -depend !Depend +CMHGflags = +LibFileflags = -c -l -o $@ +Squeezeflags = -o $@ + +# change the line below to where _you_ want the library installed. +libdest = lib:zlib + +# Final targets: +@.lib: @.o.adler32 @.o.compress @.o.crc32 @.o.deflate @.o.gzio \ + @.o.infblock @.o.infcodes @.o.inffast @.o.inflate @.o.inftrees @.o.infutil @.o.trees \ + @.o.uncompr @.o.zutil + LibFile $(LibFileflags) @.o.adler32 @.o.compress @.o.crc32 @.o.deflate \ + @.o.gzio @.o.infblock @.o.infcodes @.o.inffast @.o.inflate @.o.inftrees @.o.infutil \ + @.o.trees @.o.uncompr @.o.zutil +test: @.minigzip @.example @.lib + @copy @.lib @.libc A~C~DF~L~N~P~Q~RS~TV + @echo running tests: hang on. + @/@.minigzip -f -9 libc + @/@.minigzip -d libc-gz + @/@.minigzip -f -1 libc + @/@.minigzip -d libc-gz + @/@.minigzip -h -9 libc + @/@.minigzip -d libc-gz + @/@.minigzip -h -1 libc + @/@.minigzip -d libc-gz + @/@.minigzip -9 libc + @/@.minigzip -d libc-gz + @/@.minigzip -1 libc + @/@.minigzip -d libc-gz + @diff @.lib @.libc + @echo that should have reported '@.lib and @.libc identical' if you have diff. + @/@.example @.fred @.fred + @echo that will have given lots of hello!'s. + +@.minigzip: @.o.minigzip @.lib C:o.Stubs + Link $(Linkflags) @.o.minigzip @.lib C:o.Stubs +@.example: @.o.example @.lib C:o.Stubs + Link $(Linkflags) @.o.example @.lib C:o.Stubs + +install: @.lib + cdir $(libdest) + cdir $(libdest).h + @copy @.h.zlib $(libdest).h.zlib A~C~DF~L~N~P~Q~RS~TV + @copy @.h.zconf $(libdest).h.zconf A~C~DF~L~N~P~Q~RS~TV + @copy @.lib $(libdest).lib A~C~DF~L~N~P~Q~RS~TV + @echo okay, installed zlib in $(libdest) + +clean:; remove @.minigzip + remove @.example + remove @.libc + -wipe @.o.* F~r~cV + remove @.fred + +# User-editable dependencies: +.c.o: + cc $(ccflags) -o $@ $< + +# Static dependencies: + +# Dynamic dependencies: +o.example: c.example +o.example: h.zlib +o.example: h.zconf +o.minigzip: c.minigzip +o.minigzip: h.zlib +o.minigzip: h.zconf +o.adler32: c.adler32 +o.adler32: h.zlib +o.adler32: h.zconf +o.compress: c.compress +o.compress: h.zlib +o.compress: h.zconf +o.crc32: c.crc32 +o.crc32: h.zlib +o.crc32: h.zconf +o.deflate: c.deflate +o.deflate: h.deflate +o.deflate: h.zutil +o.deflate: h.zlib +o.deflate: h.zconf +o.gzio: c.gzio +o.gzio: h.zutil +o.gzio: h.zlib +o.gzio: h.zconf +o.infblock: c.infblock +o.infblock: h.zutil +o.infblock: h.zlib +o.infblock: h.zconf +o.infblock: h.infblock +o.infblock: h.inftrees +o.infblock: h.infcodes +o.infblock: h.infutil +o.infcodes: c.infcodes +o.infcodes: h.zutil +o.infcodes: h.zlib +o.infcodes: h.zconf +o.infcodes: h.inftrees +o.infcodes: h.infblock +o.infcodes: h.infcodes +o.infcodes: h.infutil +o.infcodes: h.inffast +o.inffast: c.inffast +o.inffast: h.zutil +o.inffast: h.zlib +o.inffast: h.zconf +o.inffast: h.inftrees +o.inffast: h.infblock +o.inffast: h.infcodes +o.inffast: h.infutil +o.inffast: h.inffast +o.inflate: c.inflate +o.inflate: h.zutil +o.inflate: h.zlib +o.inflate: h.zconf +o.inflate: h.infblock +o.inftrees: c.inftrees +o.inftrees: h.zutil +o.inftrees: h.zlib +o.inftrees: h.zconf +o.inftrees: h.inftrees +o.inftrees: h.inffixed +o.infutil: c.infutil +o.infutil: h.zutil +o.infutil: h.zlib +o.infutil: h.zconf +o.infutil: h.infblock +o.infutil: h.inftrees +o.infutil: h.infcodes +o.infutil: h.infutil +o.trees: c.trees +o.trees: h.deflate +o.trees: h.zutil +o.trees: h.zlib +o.trees: h.zconf +o.trees: h.trees +o.uncompr: c.uncompr +o.uncompr: h.zlib +o.uncompr: h.zconf +o.zutil: c.zutil +o.zutil: h.zutil +o.zutil: h.zlib +o.zutil: h.zconf diff --git a/packages/services/compress/zlib/current/src/README b/packages/services/compress/zlib/current/src/README new file mode 100644 --- /dev/null +++ b/packages/services/compress/zlib/current/src/README @@ -0,0 +1,148 @@ +zlib 1.1.3 is a general purpose data compression library. All the code +is thread safe. The data format used by the zlib library +is described by RFCs (Request for Comments) 1950 to 1952 in the files +ftp://ds.internic.net/rfc/rfc1950.txt (zlib format), rfc1951.txt (deflate +format) and rfc1952.txt (gzip format). These documents are also available in +other formats from ftp://ftp.uu.net/graphics/png/documents/zlib/zdoc-index.html + +All functions of the compression library are documented in the file zlib.h +(volunteer to write man pages welcome, contact jloup@gzip.org). A usage +example of the library is given in the file example.c which also tests that +the library is working correctly. Another example is given in the file +minigzip.c. The compression library itself is composed of all source files +except example.c and minigzip.c. + +To compile all files and run the test program, follow the instructions +given at the top of Makefile. In short "make test; make install" +should work for most machines. For Unix: "configure; make test; make install" +For MSDOS, use one of the special makefiles such as Makefile.msc. +For VMS, use Make_vms.com or descrip.mms. + +Questions about zlib should be sent to , or to +Gilles Vollant for the Windows DLL version. +The zlib home page is http://www.cdrom.com/pub/infozip/zlib/ +The official zlib ftp site is ftp://ftp.cdrom.com/pub/infozip/zlib/ +Before reporting a problem, please check those sites to verify that +you have the latest version of zlib; otherwise get the latest version and +check whether the problem still exists or not. + +Mark Nelson wrote an article about zlib for the Jan. 1997 +issue of Dr. Dobb's Journal; a copy of the article is available in +http://web2.airmail.net/markn/articles/zlibtool/zlibtool.htm + +The changes made in version 1.1.3 are documented in the file ChangeLog. +The main changes since 1.1.2 are: + +- fix "an inflate input buffer bug that shows up on rare but persistent + occasions" (Mark) +- fix gzread and gztell for concatenated .gz files (Didier Le Botlan) +- fix gzseek(..., SEEK_SET) in write mode +- fix crc check after a gzeek (Frank Faubert) +- fix miniunzip when the last entry in a zip file is itself a zip file + (J Lillge) +- add contrib/asm586 and contrib/asm686 (Brian Raiter) + See http://www.muppetlabs.com/~breadbox/software/assembly.html +- add support for Delphi 3 in contrib/delphi (Bob Dellaca) +- add support for C++Builder 3 and Delphi 3 in contrib/delphi2 (Davide Moretti) +- do not exit prematurely in untgz if 0 at start of block (Magnus Holmgren) +- use macro EXTERN instead of extern to support DLL for BeOS (Sander Stoks) +- added a FAQ file + +plus many changes for portability. + +Unsupported third party contributions are provided in directory "contrib". + +A Java implementation of zlib is available in the Java Development Kit 1.1 +http://www.javasoft.com/products/JDK/1.1/docs/api/Package-java.util.zip.html +See the zlib home page http://www.cdrom.com/pub/infozip/zlib/ for details. + +A Perl interface to zlib written by Paul Marquess +is in the CPAN (Comprehensive Perl Archive Network) sites, such as: +ftp://ftp.cis.ufl.edu/pub/perl/CPAN/modules/by-module/Compress/Compress-Zlib* + +A Python interface to zlib written by A.M. Kuchling +is available in Python 1.5 and later versions, see +http://www.python.org/doc/lib/module-zlib.html + +A zlib binding for TCL written by Andreas Kupries +is availlable at http://www.westend.com/~kupries/doc/trf/man/man.html + +An experimental package to read and write files in .zip format, +written on top of zlib by Gilles Vollant , is +available at http://www.winimage.com/zLibDll/unzip.html +and also in the contrib/minizip directory of zlib. + + +Notes for some targets: + +- To build a Windows DLL version, include in a DLL project zlib.def, zlib.rc + and all .c files except example.c and minigzip.c; compile with -DZLIB_DLL + The zlib DLL support was initially done by Alessandro Iacopetti and is + now maintained by Gilles Vollant . Check the zlib DLL + home page at http://www.winimage.com/zLibDll + + From Visual Basic, you can call the DLL functions which do not take + a structure as argument: compress, uncompress and all gz* functions. + See contrib/visual-basic.txt for more information, or get + http://www.tcfb.com/dowseware/cmp-z-it.zip + +- For 64-bit Irix, deflate.c must be compiled without any optimization. + With -O, one libpng test fails. The test works in 32 bit mode (with + the -n32 compiler flag). The compiler bug has been reported to SGI. + +- zlib doesn't work with gcc 2.6.3 on a DEC 3000/300LX under OSF/1 2.1 + it works when compiled with cc. + +- on Digital Unix 4.0D (formely OSF/1) on AlphaServer, the cc option -std1 + is necessary to get gzprintf working correctly. This is done by configure. + +- zlib doesn't work on HP-UX 9.05 with some versions of /bin/cc. It works + with other compilers. Use "make test" to check your compiler. + +- gzdopen is not supported on RISCOS, BEOS and by some Mac compilers. + +- For Turbo C the small model is supported only with reduced performance to + avoid any far allocation; it was tested with -DMAX_WBITS=11 -DMAX_MEM_LEVEL=3 + +- For PalmOs, see http://www.cs.uit.no/~perm/PASTA/pilot/software.html + Per Harald Myrvang + + +Acknowledgments: + + The deflate format used by zlib was defined by Phil Katz. The deflate + and zlib specifications were written by L. Peter Deutsch. Thanks to all the + people who reported problems and suggested various improvements in zlib; + they are too numerous to cite here. + +Copyright notice: + + (C) 1995-1998 Jean-loup Gailly and Mark Adler + + This software is provided 'as-is', without any express or implied + warranty. In no event will the authors be held liable for any damages + arising from the use of this software. + + Permission is granted to anyone to use this software for any purpose, + including commercial applications, and to alter it and redistribute it + freely, subject to the following restrictions: + + 1. The origin of this software must not be misrepresented; you must not + claim that you wrote the original software. If you use this software + in a product, an acknowledgment in the product documentation would be + appreciated but is not required. + 2. Altered source versions must be plainly marked as such, and must not be + misrepresented as being the original software. + 3. This notice may not be removed or altered from any source distribution. + + Jean-loup Gailly Mark Adler + jloup@gzip.org madler@alumni.caltech.edu + +If you use the zlib library in a product, we would appreciate *not* +receiving lengthy legal documents to sign. The sources are provided +for free but without warranty of any kind. The library has been +entirely written by Jean-loup Gailly and Mark Adler; it does not +include third-party code. + +If you redistribute modified sources, we would appreciate that you include +in the file ChangeLog history information documenting your changes. diff --git a/packages/services/compress/zlib/current/src/README.eCos b/packages/services/compress/zlib/current/src/README.eCos new file mode 100644 --- /dev/null +++ b/packages/services/compress/zlib/current/src/README.eCos @@ -0,0 +1,17 @@ +Note that these are not the complete zlib sources - the following +directories have been deleted since they are irrelevant for the +eCos support: + +amiga/ +contrib/ +msdos/ +nt/ +os2/ + +See the main site http://www.info-zip.org/pub/infozip/zlib/ for +places to download the complete sources. + +Additionally, local changes has been made to the remaining files. Code +changes are marked by __ECOS__ (comments or definitions). Finally, the +headers zlib.h and zconf.h have been moved out of the directory into +../include. diff --git a/packages/services/compress/zlib/current/src/adler32.c b/packages/services/compress/zlib/current/src/adler32.c new file mode 100644 --- /dev/null +++ b/packages/services/compress/zlib/current/src/adler32.c @@ -0,0 +1,52 @@ +/* adler32.c -- compute the Adler-32 checksum of a data stream + * Copyright (C) 1995-1998 Mark Adler + * For conditions of distribution and use, see copyright notice in zlib.h + */ + +/* @(#) $Id$ */ + +#ifdef __ECOS__ +#include +#else +#include "zlib.h" +#endif // __ECOS__ + +#define BASE 65521L /* largest prime smaller than 65536 */ +#define NMAX 5552 +/* NMAX is the largest n such that 255n(n+1)/2 + (n+1)(BASE-1) <= 2^32-1 */ + +#define DO1(buf,i) {s1 += buf[i]; s2 += s1;} +#define DO2(buf,i) DO1(buf,i); DO1(buf,i+1); +#define DO4(buf,i) DO2(buf,i); DO2(buf,i+2); +#define DO8(buf,i) DO4(buf,i); DO4(buf,i+4); +#define DO16(buf) DO8(buf,0); DO8(buf,8); + +/* ========================================================================= */ +uLong ZEXPORT adler32(adler, buf, len) + uLong adler; + const Bytef *buf; + uInt len; +{ + unsigned long s1 = adler & 0xffff; + unsigned long s2 = (adler >> 16) & 0xffff; + int k; + + if (buf == Z_NULL) return 1L; + + while (len > 0) { + k = len < NMAX ? len : NMAX; + len -= k; + while (k >= 16) { + DO16(buf); + buf += 16; + k -= 16; + } + if (k != 0) do { + s1 += *buf++; + s2 += s1; + } while (--k); + s1 %= BASE; + s2 %= BASE; + } + return (s2 << 16) | s1; +} diff --git a/packages/services/compress/zlib/current/src/algorithm.txt b/packages/services/compress/zlib/current/src/algorithm.txt new file mode 100644 --- /dev/null +++ b/packages/services/compress/zlib/current/src/algorithm.txt @@ -0,0 +1,213 @@ +1. Compression algorithm (deflate) + +The deflation algorithm used by gzip (also zip and zlib) is a variation of +LZ77 (Lempel-Ziv 1977, see reference below). It finds duplicated strings in +the input data. The second occurrence of a string is replaced by a +pointer to the previous string, in the form of a pair (distance, +length). Distances are limited to 32K bytes, and lengths are limited +to 258 bytes. When a string does not occur anywhere in the previous +32K bytes, it is emitted as a sequence of literal bytes. (In this +description, `string' must be taken as an arbitrary sequence of bytes, +and is not restricted to printable characters.) + +Literals or match lengths are compressed with one Huffman tree, and +match distances are compressed with another tree. The trees are stored +in a compact form at the start of each block. The blocks can have any +size (except that the compressed data for one block must fit in +available memory). A block is terminated when deflate() determines that +it would be useful to start another block with fresh trees. (This is +somewhat similar to the behavior of LZW-based _compress_.) + +Duplicated strings are found using a hash table. All input strings of +length 3 are inserted in the hash table. A hash index is computed for +the next 3 bytes. If the hash chain for this index is not empty, all +strings in the chain are compared with the current input string, and +the longest match is selected. + +The hash chains are searched starting with the most recent strings, to +favor small distances and thus take advantage of the Huffman encoding. +The hash chains are singly linked. There are no deletions from the +hash chains, the algorithm simply discards matches that are too old. + +To avoid a worst-case situation, very long hash chains are arbitrarily +truncated at a certain length, determined by a runtime option (level +parameter of deflateInit). So deflate() does not always find the longest +possible match but generally finds a match which is long enough. + +deflate() also defers the selection of matches with a lazy evaluation +mechanism. After a match of length N has been found, deflate() searches for +a longer match at the next input byte. If a longer match is found, the +previous match is truncated to a length of one (thus producing a single +literal byte) and the process of lazy evaluation begins again. Otherwise, +the original match is kept, and the next match search is attempted only N +steps later. + +The lazy match evaluation is also subject to a runtime parameter. If +the current match is long enough, deflate() reduces the search for a longer +match, thus speeding up the whole process. If compression ratio is more +important than speed, deflate() attempts a complete second search even if +the first match is already long enough. + +The lazy match evaluation is not performed for the fastest compression +modes (level parameter 1 to 3). For these fast modes, new strings +are inserted in the hash table only when no match was found, or +when the match is not too long. This degrades the compression ratio +but saves time since there are both fewer insertions and fewer searches. + + +2. Decompression algorithm (inflate) + +2.1 Introduction + +The real question is, given a Huffman tree, how to decode fast. The most +important realization is that shorter codes are much more common than +longer codes, so pay attention to decoding the short codes fast, and let +the long codes take longer to decode. + +inflate() sets up a first level table that covers some number of bits of +input less than the length of longest code. It gets that many bits from the +stream, and looks it up in the table. The table will tell if the next +code is that many bits or less and how many, and if it is, it will tell +the value, else it will point to the next level table for which inflate() +grabs more bits and tries to decode a longer code. + +How many bits to make the first lookup is a tradeoff between the time it +takes to decode and the time it takes to build the table. If building the +table took no time (and if you had infinite memory), then there would only +be a first level table to cover all the way to the longest code. However, +building the table ends up taking a lot longer for more bits since short +codes are replicated many times in such a table. What inflate() does is +simply to make the number of bits in the first table a variable, and set it +for the maximum speed. + +inflate() sends new trees relatively often, so it is possibly set for a +smaller first level table than an application that has only one tree for +all the data. For inflate, which has 286 possible codes for the +literal/length tree, the size of the first table is nine bits. Also the +distance trees have 30 possible values, and the size of the first table is +six bits. Note that for each of those cases, the table ended up one bit +longer than the ``average'' code length, i.e. the code length of an +approximately flat code which would be a little more than eight bits for +286 symbols and a little less than five bits for 30 symbols. It would be +interesting to see if optimizing the first level table for other +applications gave values within a bit or two of the flat code size. + + +2.2 More details on the inflate table lookup + +Ok, you want to know what this cleverly obfuscated inflate tree actually +looks like. You are correct that it's not a Huffman tree. It is simply a +lookup table for the first, let's say, nine bits of a Huffman symbol. The +symbol could be as short as one bit or as long as 15 bits. If a particular +symbol is shorter than nine bits, then that symbol's translation is duplicated +in all those entries that start with that symbol's bits. For example, if the +symbol is four bits, then it's duplicated 32 times in a nine-bit table. If a +symbol is nine bits long, it appears in the table once. + +If the symbol is longer than nine bits, then that entry in the table points +to another similar table for the remaining bits. Again, there are duplicated +entries as needed. The idea is that most of the time the symbol will be short +and there will only be one table look up. (That's whole idea behind data +compression in the first place.) For the less frequent long symbols, there +will be two lookups. If you had a compression method with really long +symbols, you could have as many levels of lookups as is efficient. For +inflate, two is enough. + +So a table entry either points to another table (in which case nine bits in +the above example are gobbled), or it contains the translation for the symbol +and the number of bits to gobble. Then you start again with the next +ungobbled bit. + +You may wonder: why not just have one lookup table for how ever many bits the +longest symbol is? The reason is that if you do that, you end up spending +more time filling in duplicate symbol entries than you do actually decoding. +At least for deflate's output that generates new trees every several 10's of +kbytes. You can imagine that filling in a 2^15 entry table for a 15-bit code +would take too long if you're only decoding several thousand symbols. At the +other extreme, you could make a new table for every bit in the code. In fact, +that's essentially a Huffman tree. But then you spend two much time +traversing the tree while decoding, even for short symbols. + +So the number of bits for the first lookup table is a trade of the time to +fill out the table vs. the time spent looking at the second level and above of +the table. + +Here is an example, scaled down: + +The code being decoded, with 10 symbols, from 1 to 6 bits long: + +A: 0 +B: 10 +C: 1100 +D: 11010 +E: 11011 +F: 11100 +G: 11101 +H: 11110 +I: 111110 +J: 111111 + +Let's make the first table three bits long (eight entries): + +000: A,1 +001: A,1 +010: A,1 +011: A,1 +100: B,2 +101: B,2 +110: -> table X (gobble 3 bits) +111: -> table Y (gobble 3 bits) + +Each entry is what the bits decode to and how many bits that is, i.e. how +many bits to gobble. Or the entry points to another table, with the number of +bits to gobble implicit in the size of the table. + +Table X is two bits long since the longest code starting with 110 is five bits +long: + +00: C,1 +01: C,1 +10: D,2 +11: E,2 + +Table Y is three bits long since the longest code starting with 111 is six +bits long: + +000: F,2 +001: F,2 +010: G,2 +011: G,2 +100: H,2 +101: H,2 +110: I,3 +111: J,3 + +So what we have here are three tables with a total of 20 entries that had to +be constructed. That's compared to 64 entries for a single table. Or +compared to 16 entries for a Huffman tree (six two entry tables and one four +entry table). Assuming that the code ideally represents the probability of +the symbols, it takes on the average 1.25 lookups per symbol. That's compared +to one lookup for the single table, or 1.66 lookups per symbol for the +Huffman tree. + +There, I think that gives you a picture of what's going on. For inflate, the +meaning of a particular symbol is often more than just a letter. It can be a +byte (a "literal"), or it can be either a length or a distance which +indicates a base value and a number of bits to fetch after the code that is +added to the base value. Or it might be the special end-of-block code. The +data structures created in inftrees.c try to encode all that information +compactly in the tables. + + +Jean-loup Gailly Mark Adler +jloup@gzip.org madler@alumni.caltech.edu + + +References: + +[LZ77] Ziv J., Lempel A., ``A Universal Algorithm for Sequential Data +Compression,'' IEEE Transactions on Information Theory, Vol. 23, No. 3, +pp. 337-343. + +``DEFLATE Compressed Data Format Specification'' available in +ftp://ds.internic.net/rfc/rfc1951.txt diff --git a/packages/services/compress/zlib/current/src/compress.c b/packages/services/compress/zlib/current/src/compress.c new file mode 100644 --- /dev/null +++ b/packages/services/compress/zlib/current/src/compress.c @@ -0,0 +1,72 @@ +/* compress.c -- compress a memory buffer + * Copyright (C) 1995-1998 Jean-loup Gailly. + * For conditions of distribution and use, see copyright notice in zlib.h + */ + +/* @(#) $Id$ */ + +#ifdef __ECOS__ +#include +#else +#include "zlib.h" +#endif // __ECOS__ + +/* =========================================================================== + Compresses the source buffer into the destination buffer. The level + parameter has the same meaning as in deflateInit. sourceLen is the byte + length of the source buffer. Upon entry, destLen is the total size of the + destination buffer, which must be at least 0.1% larger than sourceLen plus + 12 bytes. Upon exit, destLen is the actual size of the compressed buffer. + + compress2 returns Z_OK if success, Z_MEM_ERROR if there was not enough + memory, Z_BUF_ERROR if there was not enough room in the output buffer, + Z_STREAM_ERROR if the level parameter is invalid. +*/ +int ZEXPORT compress2 (dest, destLen, source, sourceLen, level) + Bytef *dest; + uLongf *destLen; + const Bytef *source; + uLong sourceLen; + int level; +{ + z_stream stream; + int err; + + stream.next_in = (Bytef*)source; + stream.avail_in = (uInt)sourceLen; +#ifdef MAXSEG_64K + /* Check for source > 64K on 16-bit machine: */ + if ((uLong)stream.avail_in != sourceLen) return Z_BUF_ERROR; +#endif + stream.next_out = dest; + stream.avail_out = (uInt)*destLen; + if ((uLong)stream.avail_out != *destLen) return Z_BUF_ERROR; + + stream.zalloc = (alloc_func)0; + stream.zfree = (free_func)0; + stream.opaque = (voidpf)0; + + err = deflateInit(&stream, level); + if (err != Z_OK) return err; + + err = deflate(&stream, Z_FINISH); + if (err != Z_STREAM_END) { + deflateEnd(&stream); + return err == Z_OK ? Z_BUF_ERROR : err; + } + *destLen = stream.total_out; + + err = deflateEnd(&stream); + return err; +} + +/* =========================================================================== + */ +int ZEXPORT compress (dest, destLen, source, sourceLen) + Bytef *dest; + uLongf *destLen; + const Bytef *source; + uLong sourceLen; +{ + return compress2(dest, destLen, source, sourceLen, Z_DEFAULT_COMPRESSION); +} diff --git a/packages/services/compress/zlib/current/src/configure b/packages/services/compress/zlib/current/src/configure new file mode 100644 --- /dev/null +++ b/packages/services/compress/zlib/current/src/configure @@ -0,0 +1,212 @@ +#!/bin/sh +# configure script for zlib. This script is needed only if +# you wish to build a shared library and your system supports them, +# of if you need special compiler, flags or install directory. +# Otherwise, you can just use directly "make test; make install" +# +# To create a shared library, use "configure --shared"; by default a static +# library is created. If the primitive shared library support provided here +# does not work, use ftp://prep.ai.mit.edu/pub/gnu/libtool-*.tar.gz +# +# To impose specific compiler or flags or install directory, use for example: +# prefix=$HOME CC=cc CFLAGS="-O4" ./configure +# or for csh/tcsh users: +# (setenv prefix $HOME; setenv CC cc; setenv CFLAGS "-O4"; ./configure) +# LDSHARED is the command to be used to create a shared library + +# Incorrect settings of CC or CFLAGS may prevent creating a shared library. +# If you have problems, try without defining CC and CFLAGS before reporting +# an error. + +LIBS=libz.a +SHAREDLIB=libz.so +VER=`sed -n -e '/VERSION "/s/.*"\(.*\)".*/\1/p' < zlib.h` +AR=${AR-"ar rc"} +RANLIB=${RANLIB-"ranlib"} +prefix=${prefix-/usr/local} +exec_prefix=${exec_prefix-'${prefix}'} +libdir=${libdir-'${exec_prefix}/lib'} +includedir=${includedir-'${prefix}/include'} +shared_ext='.so' +shared=0 +gcc=0 +old_cc="$CC" +old_cflags="$CFLAGS" + +while test $# -ge 1 +do +case "$1" in + -h* | --h*) + echo 'usage:' + echo ' configure [--shared] [--prefix=PREFIX] [--exec_prefix=EXPREFIX]' + echo ' [--libdir=LIBDIR] [--includedir=INCLUDEDIR]' + exit 0;; + -p*=* | --p*=*) prefix=`echo $1 | sed 's/[-a-z_]*=//'`; shift;; + -e*=* | --e*=*) exec_prefix=`echo $1 | sed 's/[-a-z_]*=//'`; shift;; + -l*=* | --libdir=*) libdir=`echo $1 | sed 's/[-a-z_]*=//'`; shift;; + -i*=* | --includedir=*) includedir=`echo $1 | sed 's/[-a-z_]*=//'`;shift;; + -p* | --p*) prefix="$2"; shift; shift;; + -e* | --e*) exec_prefix="$2"; shift; shift;; + -l* | --l*) libdir="$2"; shift; shift;; + -i* | --i*) includedir="$2"; shift; shift;; + -s* | --s*) shared=1; shift;; + esac +done + +test=ztest$$ +cat > $test.c </dev/null; then + CC="$cc" + SFLAGS=${CFLAGS-"-fPIC -O3"} + CFLAGS="$cflags" + case `(uname -s || echo unknown) 2>/dev/null` in + Linux | linux) LDSHARED=${LDSHARED-"gcc -shared -Wl,-soname,libz.so.1"};; + *) LDSHARED=${LDSHARED-"gcc -shared"};; + esac +else + # find system name and corresponding cc options + CC=${CC-cc} + case `(uname -sr || echo unknown) 2>/dev/null` in + HP-UX*) SFLAGS=${CFLAGS-"-O +z"} + CFLAGS=${CFLAGS-"-O"} +# LDSHARED=${LDSHARED-"ld -b +vnocompatwarnings"} + LDSHARED=${LDSHARED-"ld -b"} + shared_ext='.sl' + SHAREDLIB='libz.sl';; + IRIX*) SFLAGS=${CFLAGS-"-ansi -O2 -rpath ."} + CFLAGS=${CFLAGS-"-ansi -O2"} + LDSHARED=${LDSHARED-"cc -shared"};; + OSF1\ V4*) SFLAGS=${CFLAGS-"-O -std1"} + CFLAGS=${CFLAGS-"-O -std1"} + LDSHARED=${LDSHARED-"cc -shared -Wl,-soname,$SHAREDLIB -Wl,-msym -Wl,-rpath,$(libdir) -Wl,-set_version,${VER}:1.0"};; + OSF1*) SFLAGS=${CFLAGS-"-O -std1"} + CFLAGS=${CFLAGS-"-O -std1"} + LDSHARED=${LDSHARED-"cc -shared"};; + QNX*) SFLAGS=${CFLAGS-"-4 -O"} + CFLAGS=${CFLAGS-"-4 -O"} + LDSHARED=${LDSHARED-"cc"} + RANLIB=${RANLIB-"true"} + AR="cc -A";; + SCO_SV\ 3.2*) SFLAGS=${CFLAGS-"-O3 -dy -KPIC "} + CFLAGS=${CFLAGS-"-O3"} + LDSHARED=${LDSHARED-"cc -dy -KPIC -G"};; + SunOS\ 5*) SFLAGS=${CFLAGS-"-fast -xcg89 -KPIC -R."} + CFLAGS=${CFLAGS-"-fast -xcg89"} + LDSHARED=${LDSHARED-"cc -G"};; + SunOS\ 4*) SFLAGS=${CFLAGS-"-O2 -PIC"} + CFLAGS=${CFLAGS-"-O2"} + LDSHARED=${LDSHARED-"ld"};; + UNIX_System_V\ 4.2.0) + SFLAGS=${CFLAGS-"-KPIC -O"} + CFLAGS=${CFLAGS-"-O"} + LDSHARED=${LDSHARED-"cc -G"};; + UNIX_SV\ 4.2MP) + SFLAGS=${CFLAGS-"-Kconform_pic -O"} + CFLAGS=${CFLAGS-"-O"} + LDSHARED=${LDSHARED-"cc -G"};; + # send working options for other systems to support@gzip.org + *) SFLAGS=${CFLAGS-"-O"} + CFLAGS=${CFLAGS-"-O"} + LDSHARED=${LDSHARED-"cc -shared"};; + esac +fi + +if test $shared -eq 1; then + echo Checking for shared library support... + # we must test in two steps (cc then ld), required at least on SunOS 4.x + if test "`($CC -c $SFLAGS $test.c) 2>&1`" = "" && + test "`($LDSHARED -o $test$shared_ext $test.o) 2>&1`" = ""; then + CFLAGS="$SFLAGS" + LIBS="$SHAREDLIB.$VER" + echo Building shared library $SHAREDLIB.$VER with $CC. + elif test -z "$old_cc" -a -z "$old_cflags"; then + echo No shared library suppport. + shared=0; + else + echo 'No shared library suppport; try without defining CC and CFLAGS' + shared=0; + fi +fi +if test $shared -eq 0; then + LDSHARED="$CC" + echo Building static library $LIBS version $VER with $CC. +fi + +cat > $test.c < +int main() { return 0; } +EOF +if test "`($CC -c $CFLAGS $test.c) 2>&1`" = ""; then + CFLAGS="$CFLAGS -DHAVE_UNISTD_H" + echo "Checking for unistd.h... Yes." +else + echo "Checking for unistd.h... No." +fi + +cat > $test.c < +int main() { return 0; } +EOF +if test "`($CC -c $CFLAGS $test.c) 2>&1`" = ""; then + echo "Checking for errno.h... Yes." +else + echo "Checking for errno.h... No." + CFLAGS="$CFLAGS -DNO_ERRNO_H" +fi + +cat > $test.c < +#include +#include +caddr_t hello() { + return mmap((caddr_t)0, (off_t)0, PROT_READ, MAP_SHARED, 0, (off_t)0); +} +EOF +if test "`($CC -c $CFLAGS $test.c) 2>&1`" = ""; then + CFLAGS="$CFLAGS -DUSE_MMAP" + echo Checking for mmap support... Yes. +else + echo Checking for mmap support... No. +fi + +CPP=${CPP-"$CC -E"} +case $CFLAGS in + *ASMV*) + if test "`nm $test.o | grep _hello`" = ""; then + CPP="$CPP -DNO_UNDERLINE" + echo Checking for underline in external names... No. + else + echo Checking for underline in external names... Yes. + fi;; +esac + +rm -f $test.[co] $test$shared_ext + +# udpate Makefile +sed < Makefile.in " +/^CC *=/s%=.*%=$CC% +/^CFLAGS *=/s%=.*%=$CFLAGS% +/^CPP *=/s%=.*%=$CPP% +/^LDSHARED *=/s%=.*%=$LDSHARED% +/^LIBS *=/s%=.*%=$LIBS% +/^SHAREDLIB *=/s%=.*%=$SHAREDLIB% +/^AR *=/s%=.*%=$AR% +/^RANLIB *=/s%=.*%=$RANLIB% +/^VER *=/s%=.*%=$VER% +/^prefix *=/s%=.*%=$prefix% +/^exec_prefix *=/s%=.*%=$exec_prefix% +/^libdir *=/s%=.*%=$libdir% +/^includedir *=/s%=.*%=$includedir% +" > Makefile diff --git a/packages/services/compress/zlib/current/src/crc32.c b/packages/services/compress/zlib/current/src/crc32.c new file mode 100644 --- /dev/null +++ b/packages/services/compress/zlib/current/src/crc32.c @@ -0,0 +1,170 @@ +/* crc32.c -- compute the CRC-32 of a data stream + * Copyright (C) 1995-1998 Mark Adler + * For conditions of distribution and use, see copyright notice in zlib.h + */ + +/* @(#) $Id$ */ + +#ifdef __ECOS__ +#include +#else +#include "zlib.h" +#endif // __ECOS__ + +#define local static + +#ifdef DYNAMIC_CRC_TABLE + +local int crc_table_empty = 1; +local uLongf crc_table[256]; +local void make_crc_table OF((void)); + +/* + Generate a table for a byte-wise 32-bit CRC calculation on the polynomial: + x^32+x^26+x^23+x^22+x^16+x^12+x^11+x^10+x^8+x^7+x^5+x^4+x^2+x+1. + + Polynomials over GF(2) are represented in binary, one bit per coefficient, + with the lowest powers in the most significant bit. Then adding polynomials + is just exclusive-or, and multiplying a polynomial by x is a right shift by + one. If we call the above polynomial p, and represent a byte as the + polynomial q, also with the lowest power in the most significant bit (so the + byte 0xb1 is the polynomial x^7+x^3+x+1), then the CRC is (q*x^32) mod p, + where a mod b means the remainder after dividing a by b. + + This calculation is done using the shift-register method of multiplying and + taking the remainder. The register is initialized to zero, and for each + incoming bit, x^32 is added mod p to the register if the bit is a one (where + x^32 mod p is p+x^32 = x^26+...+1), and the register is multiplied mod p by + x (which is shifting right by one and adding x^32 mod p if the bit shifted + out is a one). We start with the highest power (least significant bit) of + q and repeat for all eight bits of q. + + The table is simply the CRC of all possible eight bit values. This is all + the information needed to generate CRC's on data a byte at a time for all + combinations of CRC register values and incoming bytes. +*/ +local void make_crc_table() +{ + uLong c; + int n, k; + uLong poly; /* polynomial exclusive-or pattern */ + /* terms of polynomial defining this crc (except x^32): */ + static const Byte p[] = {0,1,2,4,5,7,8,10,11,12,16,22,23,26}; + + /* make exclusive-or pattern from polynomial (0xedb88320L) */ + poly = 0L; + for (n = 0; n < sizeof(p)/sizeof(Byte); n++) + poly |= 1L << (31 - p[n]); + + for (n = 0; n < 256; n++) + { + c = (uLong)n; + for (k = 0; k < 8; k++) + c = c & 1 ? poly ^ (c >> 1) : c >> 1; + crc_table[n] = c; + } + crc_table_empty = 0; +} +#else +/* ======================================================================== + * Table of CRC-32's of all single-byte values (made by make_crc_table) + */ +local const uLongf crc_table[256] = { + 0x00000000L, 0x77073096L, 0xee0e612cL, 0x990951baL, 0x076dc419L, + 0x706af48fL, 0xe963a535L, 0x9e6495a3L, 0x0edb8832L, 0x79dcb8a4L, + 0xe0d5e91eL, 0x97d2d988L, 0x09b64c2bL, 0x7eb17cbdL, 0xe7b82d07L, + 0x90bf1d91L, 0x1db71064L, 0x6ab020f2L, 0xf3b97148L, 0x84be41deL, + 0x1adad47dL, 0x6ddde4ebL, 0xf4d4b551L, 0x83d385c7L, 0x136c9856L, + 0x646ba8c0L, 0xfd62f97aL, 0x8a65c9ecL, 0x14015c4fL, 0x63066cd9L, + 0xfa0f3d63L, 0x8d080df5L, 0x3b6e20c8L, 0x4c69105eL, 0xd56041e4L, + 0xa2677172L, 0x3c03e4d1L, 0x4b04d447L, 0xd20d85fdL, 0xa50ab56bL, + 0x35b5a8faL, 0x42b2986cL, 0xdbbbc9d6L, 0xacbcf940L, 0x32d86ce3L, + 0x45df5c75L, 0xdcd60dcfL, 0xabd13d59L, 0x26d930acL, 0x51de003aL, + 0xc8d75180L, 0xbfd06116L, 0x21b4f4b5L, 0x56b3c423L, 0xcfba9599L, + 0xb8bda50fL, 0x2802b89eL, 0x5f058808L, 0xc60cd9b2L, 0xb10be924L, + 0x2f6f7c87L, 0x58684c11L, 0xc1611dabL, 0xb6662d3dL, 0x76dc4190L, + 0x01db7106L, 0x98d220bcL, 0xefd5102aL, 0x71b18589L, 0x06b6b51fL, + 0x9fbfe4a5L, 0xe8b8d433L, 0x7807c9a2L, 0x0f00f934L, 0x9609a88eL, + 0xe10e9818L, 0x7f6a0dbbL, 0x086d3d2dL, 0x91646c97L, 0xe6635c01L, + 0x6b6b51f4L, 0x1c6c6162L, 0x856530d8L, 0xf262004eL, 0x6c0695edL, + 0x1b01a57bL, 0x8208f4c1L, 0xf50fc457L, 0x65b0d9c6L, 0x12b7e950L, + 0x8bbeb8eaL, 0xfcb9887cL, 0x62dd1ddfL, 0x15da2d49L, 0x8cd37cf3L, + 0xfbd44c65L, 0x4db26158L, 0x3ab551ceL, 0xa3bc0074L, 0xd4bb30e2L, + 0x4adfa541L, 0x3dd895d7L, 0xa4d1c46dL, 0xd3d6f4fbL, 0x4369e96aL, + 0x346ed9fcL, 0xad678846L, 0xda60b8d0L, 0x44042d73L, 0x33031de5L, + 0xaa0a4c5fL, 0xdd0d7cc9L, 0x5005713cL, 0x270241aaL, 0xbe0b1010L, + 0xc90c2086L, 0x5768b525L, 0x206f85b3L, 0xb966d409L, 0xce61e49fL, + 0x5edef90eL, 0x29d9c998L, 0xb0d09822L, 0xc7d7a8b4L, 0x59b33d17L, + 0x2eb40d81L, 0xb7bd5c3bL, 0xc0ba6cadL, 0xedb88320L, 0x9abfb3b6L, + 0x03b6e20cL, 0x74b1d29aL, 0xead54739L, 0x9dd277afL, 0x04db2615L, + 0x73dc1683L, 0xe3630b12L, 0x94643b84L, 0x0d6d6a3eL, 0x7a6a5aa8L, + 0xe40ecf0bL, 0x9309ff9dL, 0x0a00ae27L, 0x7d079eb1L, 0xf00f9344L, + 0x8708a3d2L, 0x1e01f268L, 0x6906c2feL, 0xf762575dL, 0x806567cbL, + 0x196c3671L, 0x6e6b06e7L, 0xfed41b76L, 0x89d32be0L, 0x10da7a5aL, + 0x67dd4accL, 0xf9b9df6fL, 0x8ebeeff9L, 0x17b7be43L, 0x60b08ed5L, + 0xd6d6a3e8L, 0xa1d1937eL, 0x38d8c2c4L, 0x4fdff252L, 0xd1bb67f1L, + 0xa6bc5767L, 0x3fb506ddL, 0x48b2364bL, 0xd80d2bdaL, 0xaf0a1b4cL, + 0x36034af6L, 0x41047a60L, 0xdf60efc3L, 0xa867df55L, 0x316e8eefL, + 0x4669be79L, 0xcb61b38cL, 0xbc66831aL, 0x256fd2a0L, 0x5268e236L, + 0xcc0c7795L, 0xbb0b4703L, 0x220216b9L, 0x5505262fL, 0xc5ba3bbeL, + 0xb2bd0b28L, 0x2bb45a92L, 0x5cb36a04L, 0xc2d7ffa7L, 0xb5d0cf31L, + 0x2cd99e8bL, 0x5bdeae1dL, 0x9b64c2b0L, 0xec63f226L, 0x756aa39cL, + 0x026d930aL, 0x9c0906a9L, 0xeb0e363fL, 0x72076785L, 0x05005713L, + 0x95bf4a82L, 0xe2b87a14L, 0x7bb12baeL, 0x0cb61b38L, 0x92d28e9bL, + 0xe5d5be0dL, 0x7cdcefb7L, 0x0bdbdf21L, 0x86d3d2d4L, 0xf1d4e242L, + 0x68ddb3f8L, 0x1fda836eL, 0x81be16cdL, 0xf6b9265bL, 0x6fb077e1L, + 0x18b74777L, 0x88085ae6L, 0xff0f6a70L, 0x66063bcaL, 0x11010b5cL, + 0x8f659effL, 0xf862ae69L, 0x616bffd3L, 0x166ccf45L, 0xa00ae278L, + 0xd70dd2eeL, 0x4e048354L, 0x3903b3c2L, 0xa7672661L, 0xd06016f7L, + 0x4969474dL, 0x3e6e77dbL, 0xaed16a4aL, 0xd9d65adcL, 0x40df0b66L, + 0x37d83bf0L, 0xa9bcae53L, 0xdebb9ec5L, 0x47b2cf7fL, 0x30b5ffe9L, + 0xbdbdf21cL, 0xcabac28aL, 0x53b39330L, 0x24b4a3a6L, 0xbad03605L, + 0xcdd70693L, 0x54de5729L, 0x23d967bfL, 0xb3667a2eL, 0xc4614ab8L, + 0x5d681b02L, 0x2a6f2b94L, 0xb40bbe37L, 0xc30c8ea1L, 0x5a05df1bL, + 0x2d02ef8dL +}; +#endif + +/* ========================================================================= + * This function can be used by asm versions of crc32() + */ +const uLongf * ZEXPORT get_crc_table() +{ +#ifdef DYNAMIC_CRC_TABLE + if (crc_table_empty) make_crc_table(); +#endif + return (const uLongf *)crc_table; +} + +/* ========================================================================= */ +#define DO1(buf) crc = crc_table[((int)crc ^ (*buf++)) & 0xff] ^ (crc >> 8); +#define DO2(buf) DO1(buf); DO1(buf); +#define DO4(buf) DO2(buf); DO2(buf); +#define DO8(buf) DO4(buf); DO4(buf); + +/* ========================================================================= */ +#ifdef __ECOS__ +uLong ZEXPORT gz_crc32(crc, buf, len) +#else +uLong ZEXPORT crc32(crc, buf, len) +#endif + uLong crc; + const Bytef *buf; + uInt len; +{ + if (buf == Z_NULL) return 0L; +#ifdef DYNAMIC_CRC_TABLE + if (crc_table_empty) + make_crc_table(); +#endif + crc = crc ^ 0xffffffffL; + while (len >= 8) + { + DO8(buf); + len -= 8; + } + if (len) do { + DO1(buf); + } while (--len); + return crc ^ 0xffffffffL; +} diff --git a/packages/services/compress/zlib/current/src/deflate.c b/packages/services/compress/zlib/current/src/deflate.c new file mode 100644 --- /dev/null +++ b/packages/services/compress/zlib/current/src/deflate.c @@ -0,0 +1,1350 @@ +/* deflate.c -- compress data using the deflation algorithm + * Copyright (C) 1995-1998 Jean-loup Gailly. + * For conditions of distribution and use, see copyright notice in zlib.h + */ + +/* + * ALGORITHM + * + * The "deflation" process depends on being able to identify portions + * of the input text which are identical to earlier input (within a + * sliding window trailing behind the input currently being processed). + * + * The most straightforward technique turns out to be the fastest for + * most input files: try all possible matches and select the longest. + * The key feature of this algorithm is that insertions into the string + * dictionary are very simple and thus fast, and deletions are avoided + * completely. Insertions are performed at each input character, whereas + * string matches are performed only when the previous match ends. So it + * is preferable to spend more time in matches to allow very fast string + * insertions and avoid deletions. The matching algorithm for small + * strings is inspired from that of Rabin & Karp. A brute force approach + * is used to find longer strings when a small match has been found. + * A similar algorithm is used in comic (by Jan-Mark Wams) and freeze + * (by Leonid Broukhis). + * A previous version of this file used a more sophisticated algorithm + * (by Fiala and Greene) which is guaranteed to run in linear amortized + * time, but has a larger average cost, uses more memory and is patented. + * However the F&G algorithm may be faster for some highly redundant + * files if the parameter max_chain_length (described below) is too large. + * + * ACKNOWLEDGEMENTS + * + * The idea of lazy evaluation of matches is due to Jan-Mark Wams, and + * I found it in 'freeze' written by Leonid Broukhis. + * Thanks to many people for bug reports and testing. + * + * REFERENCES + * + * Deutsch, L.P.,"DEFLATE Compressed Data Format Specification". + * Available in ftp://ds.internic.net/rfc/rfc1951.txt + * + * A description of the Rabin and Karp algorithm is given in the book + * "Algorithms" by R. Sedgewick, Addison-Wesley, p252. + * + * Fiala,E.R., and Greene,D.H. + * Data Compression with Finite Windows, Comm.ACM, 32,4 (1989) 490-595 + * + */ + +/* @(#) $Id$ */ + +#include "deflate.h" + +const char deflate_copyright[] = + " deflate 1.1.3 Copyright 1995-1998 Jean-loup Gailly "; +/* + If you use the zlib library in a product, an acknowledgment is welcome + in the documentation of your product. If for some reason you cannot + include such an acknowledgment, I would appreciate that you keep this + copyright string in the executable of your product. + */ + +/* =========================================================================== + * Function prototypes. + */ +typedef enum { + need_more, /* block not completed, need more input or more output */ + block_done, /* block flush performed */ + finish_started, /* finish started, need only more output at next deflate */ + finish_done /* finish done, accept no more input or output */ +} block_state; + +typedef block_state (*compress_func) OF((deflate_state *s, int flush)); +/* Compression function. Returns the block state after the call. */ + +local void fill_window OF((deflate_state *s)); +local block_state deflate_stored OF((deflate_state *s, int flush)); +local block_state deflate_fast OF((deflate_state *s, int flush)); +local block_state deflate_slow OF((deflate_state *s, int flush)); +local void lm_init OF((deflate_state *s)); +local void putShortMSB OF((deflate_state *s, uInt b)); +local void flush_pending OF((z_streamp strm)); +local int read_buf OF((z_streamp strm, Bytef *buf, unsigned size)); +#ifdef ASMV + void match_init OF((void)); /* asm code initialization */ + uInt longest_match OF((deflate_state *s, IPos cur_match)); +#else +local uInt longest_match OF((deflate_state *s, IPos cur_match)); +#endif + +#ifdef DEBUG +local void check_match OF((deflate_state *s, IPos start, IPos match, + int length)); +#endif + +/* =========================================================================== + * Local data + */ + +#define NIL 0 +/* Tail of hash chains */ + +#ifndef TOO_FAR +# define TOO_FAR 4096 +#endif +/* Matches of length 3 are discarded if their distance exceeds TOO_FAR */ + +#define MIN_LOOKAHEAD (MAX_MATCH+MIN_MATCH+1) +/* Minimum amount of lookahead, except at the end of the input file. + * See deflate.c for comments about the MIN_MATCH+1. + */ + +/* Values for max_lazy_match, good_match and max_chain_length, depending on + * the desired pack level (0..9). The values given below have been tuned to + * exclude worst case performance for pathological files. Better values may be + * found for specific files. + */ +typedef struct config_s { + ush good_length; /* reduce lazy search above this match length */ + ush max_lazy; /* do not perform lazy search above this match length */ + ush nice_length; /* quit search above this match length */ + ush max_chain; + compress_func func; +} config; + +local const config configuration_table[10] = { +/* good lazy nice chain */ +/* 0 */ {0, 0, 0, 0, deflate_stored}, /* store only */ +/* 1 */ {4, 4, 8, 4, deflate_fast}, /* maximum speed, no lazy matches */ +/* 2 */ {4, 5, 16, 8, deflate_fast}, +/* 3 */ {4, 6, 32, 32, deflate_fast}, + +/* 4 */ {4, 4, 16, 16, deflate_slow}, /* lazy matches */ +/* 5 */ {8, 16, 32, 32, deflate_slow}, +/* 6 */ {8, 16, 128, 128, deflate_slow}, +/* 7 */ {8, 32, 128, 256, deflate_slow}, +/* 8 */ {32, 128, 258, 1024, deflate_slow}, +/* 9 */ {32, 258, 258, 4096, deflate_slow}}; /* maximum compression */ + +/* Note: the deflate() code requires max_lazy >= MIN_MATCH and max_chain >= 4 + * For deflate_fast() (levels <= 3) good is ignored and lazy has a different + * meaning. + */ + +#define EQUAL 0 +/* result of memcmp for equal strings */ + +struct static_tree_desc_s {int dummy;}; /* for buggy compilers */ + +/* =========================================================================== + * Update a hash value with the given input byte + * IN assertion: all calls to to UPDATE_HASH are made with consecutive + * input characters, so that a running hash key can be computed from the + * previous key instead of complete recalculation each time. + */ +#define UPDATE_HASH(s,h,c) (h = (((h)<hash_shift) ^ (c)) & s->hash_mask) + + +/* =========================================================================== + * Insert string str in the dictionary and set match_head to the previous head + * of the hash chain (the most recent string with same hash key). Return + * the previous length of the hash chain. + * If this file is compiled with -DFASTEST, the compression level is forced + * to 1, and no hash chains are maintained. + * IN assertion: all calls to to INSERT_STRING are made with consecutive + * input characters and the first MIN_MATCH bytes of str are valid + * (except for the last MIN_MATCH-1 bytes of the input file). + */ +#ifdef FASTEST +#define INSERT_STRING(s, str, match_head) \ + (UPDATE_HASH(s, s->ins_h, s->window[(str) + (MIN_MATCH-1)]), \ + match_head = s->head[s->ins_h], \ + s->head[s->ins_h] = (Pos)(str)) +#else +#define INSERT_STRING(s, str, match_head) \ + (UPDATE_HASH(s, s->ins_h, s->window[(str) + (MIN_MATCH-1)]), \ + s->prev[(str) & s->w_mask] = match_head = s->head[s->ins_h], \ + s->head[s->ins_h] = (Pos)(str)) +#endif + +/* =========================================================================== + * Initialize the hash table (avoiding 64K overflow for 16 bit systems). + * prev[] will be initialized on the fly. + */ +#define CLEAR_HASH(s) \ + s->head[s->hash_size-1] = NIL; \ + zmemzero((Bytef *)s->head, (unsigned)(s->hash_size-1)*sizeof(*s->head)); + +/* ========================================================================= */ +int ZEXPORT deflateInit_(strm, level, version, stream_size) + z_streamp strm; + int level; + const char *version; + int stream_size; +{ + return deflateInit2_(strm, level, Z_DEFLATED, MAX_WBITS, DEF_MEM_LEVEL, + Z_DEFAULT_STRATEGY, version, stream_size); + /* To do: ignore strm->next_in if we use it as window */ +} + +/* ========================================================================= */ +int ZEXPORT deflateInit2_(strm, level, method, windowBits, memLevel, strategy, + version, stream_size) + z_streamp strm; + int level; + int method; + int windowBits; + int memLevel; + int strategy; + const char *version; + int stream_size; +{ + deflate_state *s; + int noheader = 0; + static const char* my_version = ZLIB_VERSION; + + ushf *overlay; + /* We overlay pending_buf and d_buf+l_buf. This works since the average + * output size for (length,distance) codes is <= 24 bits. + */ + + if (version == Z_NULL || version[0] != my_version[0] || + stream_size != sizeof(z_stream)) { + return Z_VERSION_ERROR; + } + if (strm == Z_NULL) return Z_STREAM_ERROR; + + strm->msg = Z_NULL; + if (strm->zalloc == Z_NULL) { + strm->zalloc = zcalloc; + strm->opaque = (voidpf)0; + } + if (strm->zfree == Z_NULL) strm->zfree = zcfree; + + if (level == Z_DEFAULT_COMPRESSION) level = 6; +#ifdef FASTEST + level = 1; +#endif + + if (windowBits < 0) { /* undocumented feature: suppress zlib header */ + noheader = 1; + windowBits = -windowBits; + } + if (memLevel < 1 || memLevel > MAX_MEM_LEVEL || method != Z_DEFLATED || + windowBits < 8 || windowBits > 15 || level < 0 || level > 9 || + strategy < 0 || strategy > Z_HUFFMAN_ONLY) { + return Z_STREAM_ERROR; + } + s = (deflate_state *) ZALLOC(strm, 1, sizeof(deflate_state)); + if (s == Z_NULL) return Z_MEM_ERROR; + strm->state = (struct internal_state FAR *)s; + s->strm = strm; + + s->noheader = noheader; + s->w_bits = windowBits; + s->w_size = 1 << s->w_bits; + s->w_mask = s->w_size - 1; + + s->hash_bits = memLevel + 7; + s->hash_size = 1 << s->hash_bits; + s->hash_mask = s->hash_size - 1; + s->hash_shift = ((s->hash_bits+MIN_MATCH-1)/MIN_MATCH); + + s->window = (Bytef *) ZALLOC(strm, s->w_size, 2*sizeof(Byte)); + s->prev = (Posf *) ZALLOC(strm, s->w_size, sizeof(Pos)); + s->head = (Posf *) ZALLOC(strm, s->hash_size, sizeof(Pos)); + + s->lit_bufsize = 1 << (memLevel + 6); /* 16K elements by default */ + + overlay = (ushf *) ZALLOC(strm, s->lit_bufsize, sizeof(ush)+2); + s->pending_buf = (uchf *) overlay; + s->pending_buf_size = (ulg)s->lit_bufsize * (sizeof(ush)+2L); + + if (s->window == Z_NULL || s->prev == Z_NULL || s->head == Z_NULL || + s->pending_buf == Z_NULL) { + strm->msg = (char*)ERR_MSG(Z_MEM_ERROR); + deflateEnd (strm); + return Z_MEM_ERROR; + } + s->d_buf = overlay + s->lit_bufsize/sizeof(ush); + s->l_buf = s->pending_buf + (1+sizeof(ush))*s->lit_bufsize; + + s->level = level; + s->strategy = strategy; + s->method = (Byte)method; + + return deflateReset(strm); +} + +/* ========================================================================= */ +int ZEXPORT deflateSetDictionary (strm, dictionary, dictLength) + z_streamp strm; + const Bytef *dictionary; + uInt dictLength; +{ + deflate_state *s; + uInt length = dictLength; + uInt n; + IPos hash_head = 0; + + if (strm == Z_NULL || strm->state == Z_NULL || dictionary == Z_NULL || + strm->state->status != INIT_STATE) return Z_STREAM_ERROR; + + s = strm->state; + strm->adler = adler32(strm->adler, dictionary, dictLength); + + if (length < MIN_MATCH) return Z_OK; + if (length > MAX_DIST(s)) { + length = MAX_DIST(s); +#ifndef USE_DICT_HEAD + dictionary += dictLength - length; /* use the tail of the dictionary */ +#endif + } + zmemcpy(s->window, dictionary, length); + s->strstart = length; + s->block_start = (long)length; + + /* Insert all strings in the hash table (except for the last two bytes). + * s->lookahead stays null, so s->ins_h will be recomputed at the next + * call of fill_window. + */ + s->ins_h = s->window[0]; + UPDATE_HASH(s, s->ins_h, s->window[1]); + for (n = 0; n <= length - MIN_MATCH; n++) { + INSERT_STRING(s, n, hash_head); + } + if (hash_head) hash_head = 0; /* to make compiler happy */ + return Z_OK; +} + +/* ========================================================================= */ +int ZEXPORT deflateReset (strm) + z_streamp strm; +{ + deflate_state *s; + + if (strm == Z_NULL || strm->state == Z_NULL || + strm->zalloc == Z_NULL || strm->zfree == Z_NULL) return Z_STREAM_ERROR; + + strm->total_in = strm->total_out = 0; + strm->msg = Z_NULL; /* use zfree if we ever allocate msg dynamically */ + strm->data_type = Z_UNKNOWN; + + s = (deflate_state *)strm->state; + s->pending = 0; + s->pending_out = s->pending_buf; + + if (s->noheader < 0) { + s->noheader = 0; /* was set to -1 by deflate(..., Z_FINISH); */ + } + s->status = s->noheader ? BUSY_STATE : INIT_STATE; + strm->adler = 1; + s->last_flush = Z_NO_FLUSH; + + _tr_init(s); + lm_init(s); + + return Z_OK; +} + +/* ========================================================================= */ +int ZEXPORT deflateParams(strm, level, strategy) + z_streamp strm; + int level; + int strategy; +{ + deflate_state *s; + compress_func func; + int err = Z_OK; + + if (strm == Z_NULL || strm->state == Z_NULL) return Z_STREAM_ERROR; + s = strm->state; + + if (level == Z_DEFAULT_COMPRESSION) { + level = 6; + } + if (level < 0 || level > 9 || strategy < 0 || strategy > Z_HUFFMAN_ONLY) { + return Z_STREAM_ERROR; + } + func = configuration_table[s->level].func; + + if (func != configuration_table[level].func && strm->total_in != 0) { + /* Flush the last buffer: */ + err = deflate(strm, Z_PARTIAL_FLUSH); + } + if (s->level != level) { + s->level = level; + s->max_lazy_match = configuration_table[level].max_lazy; + s->good_match = configuration_table[level].good_length; + s->nice_match = configuration_table[level].nice_length; + s->max_chain_length = configuration_table[level].max_chain; + } + s->strategy = strategy; + return err; +} + +/* ========================================================================= + * Put a short in the pending buffer. The 16-bit value is put in MSB order. + * IN assertion: the stream state is correct and there is enough room in + * pending_buf. + */ +local void putShortMSB (s, b) + deflate_state *s; + uInt b; +{ + put_byte(s, (Byte)(b >> 8)); + put_byte(s, (Byte)(b & 0xff)); +} + +/* ========================================================================= + * Flush as much pending output as possible. All deflate() output goes + * through this function so some applications may wish to modify it + * to avoid allocating a large strm->next_out buffer and copying into it. + * (See also read_buf()). + */ +local void flush_pending(strm) + z_streamp strm; +{ + unsigned len = strm->state->pending; + + if (len > strm->avail_out) len = strm->avail_out; + if (len == 0) return; + + zmemcpy(strm->next_out, strm->state->pending_out, len); + strm->next_out += len; + strm->state->pending_out += len; + strm->total_out += len; + strm->avail_out -= len; + strm->state->pending -= len; + if (strm->state->pending == 0) { + strm->state->pending_out = strm->state->pending_buf; + } +} + +/* ========================================================================= */ +int ZEXPORT deflate (strm, flush) + z_streamp strm; + int flush; +{ + int old_flush; /* value of flush param for previous deflate call */ + deflate_state *s; + + if (strm == Z_NULL || strm->state == Z_NULL || + flush > Z_FINISH || flush < 0) { + return Z_STREAM_ERROR; + } + s = strm->state; + + if (strm->next_out == Z_NULL || + (strm->next_in == Z_NULL && strm->avail_in != 0) || + (s->status == FINISH_STATE && flush != Z_FINISH)) { + ERR_RETURN(strm, Z_STREAM_ERROR); + } + if (strm->avail_out == 0) ERR_RETURN(strm, Z_BUF_ERROR); + + s->strm = strm; /* just in case */ + old_flush = s->last_flush; + s->last_flush = flush; + + /* Write the zlib header */ + if (s->status == INIT_STATE) { + + uInt header = (Z_DEFLATED + ((s->w_bits-8)<<4)) << 8; + uInt level_flags = (s->level-1) >> 1; + + if (level_flags > 3) level_flags = 3; + header |= (level_flags << 6); + if (s->strstart != 0) header |= PRESET_DICT; + header += 31 - (header % 31); + + s->status = BUSY_STATE; + putShortMSB(s, header); + + /* Save the adler32 of the preset dictionary: */ + if (s->strstart != 0) { + putShortMSB(s, (uInt)(strm->adler >> 16)); + putShortMSB(s, (uInt)(strm->adler & 0xffff)); + } + strm->adler = 1L; + } + + /* Flush as much pending output as possible */ + if (s->pending != 0) { + flush_pending(strm); + if (strm->avail_out == 0) { + /* Since avail_out is 0, deflate will be called again with + * more output space, but possibly with both pending and + * avail_in equal to zero. There won't be anything to do, + * but this is not an error situation so make sure we + * return OK instead of BUF_ERROR at next call of deflate: + */ + s->last_flush = -1; + return Z_OK; + } + + /* Make sure there is something to do and avoid duplicate consecutive + * flushes. For repeated and useless calls with Z_FINISH, we keep + * returning Z_STREAM_END instead of Z_BUFF_ERROR. + */ + } else if (strm->avail_in == 0 && flush <= old_flush && + flush != Z_FINISH) { + ERR_RETURN(strm, Z_BUF_ERROR); + } + + /* User must not provide more input after the first FINISH: */ + if (s->status == FINISH_STATE && strm->avail_in != 0) { + ERR_RETURN(strm, Z_BUF_ERROR); + } + + /* Start a new block or continue the current one. + */ + if (strm->avail_in != 0 || s->lookahead != 0 || + (flush != Z_NO_FLUSH && s->status != FINISH_STATE)) { + block_state bstate; + + bstate = (*(configuration_table[s->level].func))(s, flush); + + if (bstate == finish_started || bstate == finish_done) { + s->status = FINISH_STATE; + } + if (bstate == need_more || bstate == finish_started) { + if (strm->avail_out == 0) { + s->last_flush = -1; /* avoid BUF_ERROR next call, see above */ + } + return Z_OK; + /* If flush != Z_NO_FLUSH && avail_out == 0, the next call + * of deflate should use the same flush parameter to make sure + * that the flush is complete. So we don't have to output an + * empty block here, this will be done at next call. This also + * ensures that for a very small output buffer, we emit at most + * one empty block. + */ + } + if (bstate == block_done) { + if (flush == Z_PARTIAL_FLUSH) { + _tr_align(s); + } else { /* FULL_FLUSH or SYNC_FLUSH */ + _tr_stored_block(s, (char*)0, 0L, 0); + /* For a full flush, this empty block will be recognized + * as a special marker by inflate_sync(). + */ + if (flush == Z_FULL_FLUSH) { + CLEAR_HASH(s); /* forget history */ + } + } + flush_pending(strm); + if (strm->avail_out == 0) { + s->last_flush = -1; /* avoid BUF_ERROR at next call, see above */ + return Z_OK; + } + } + } + Assert(strm->avail_out > 0, "bug2"); + + if (flush != Z_FINISH) return Z_OK; + if (s->noheader) return Z_STREAM_END; + + /* Write the zlib trailer (adler32) */ + putShortMSB(s, (uInt)(strm->adler >> 16)); + putShortMSB(s, (uInt)(strm->adler & 0xffff)); + flush_pending(strm); + /* If avail_out is zero, the application will call deflate again + * to flush the rest. + */ + s->noheader = -1; /* write the trailer only once! */ + return s->pending != 0 ? Z_OK : Z_STREAM_END; +} + +/* ========================================================================= */ +int ZEXPORT deflateEnd (strm) + z_streamp strm; +{ + int status; + + if (strm == Z_NULL || strm->state == Z_NULL) return Z_STREAM_ERROR; + + status = strm->state->status; + if (status != INIT_STATE && status != BUSY_STATE && + status != FINISH_STATE) { + return Z_STREAM_ERROR; + } + + /* Deallocate in reverse order of allocations: */ + TRY_FREE(strm, strm->state->pending_buf); + TRY_FREE(strm, strm->state->head); + TRY_FREE(strm, strm->state->prev); + TRY_FREE(strm, strm->state->window); + + ZFREE(strm, strm->state); + strm->state = Z_NULL; + + return status == BUSY_STATE ? Z_DATA_ERROR : Z_OK; +} + +/* ========================================================================= + * Copy the source state to the destination state. + * To simplify the source, this is not supported for 16-bit MSDOS (which + * doesn't have enough memory anyway to duplicate compression states). + */ +int ZEXPORT deflateCopy (dest, source) + z_streamp dest; + z_streamp source; +{ +#ifdef MAXSEG_64K + return Z_STREAM_ERROR; +#else + deflate_state *ds; + deflate_state *ss; + ushf *overlay; + + + if (source == Z_NULL || dest == Z_NULL || source->state == Z_NULL) { + return Z_STREAM_ERROR; + } + + ss = source->state; + + *dest = *source; + + ds = (deflate_state *) ZALLOC(dest, 1, sizeof(deflate_state)); + if (ds == Z_NULL) return Z_MEM_ERROR; + dest->state = (struct internal_state FAR *) ds; + *ds = *ss; + ds->strm = dest; + + ds->window = (Bytef *) ZALLOC(dest, ds->w_size, 2*sizeof(Byte)); + ds->prev = (Posf *) ZALLOC(dest, ds->w_size, sizeof(Pos)); + ds->head = (Posf *) ZALLOC(dest, ds->hash_size, sizeof(Pos)); + overlay = (ushf *) ZALLOC(dest, ds->lit_bufsize, sizeof(ush)+2); + ds->pending_buf = (uchf *) overlay; + + if (ds->window == Z_NULL || ds->prev == Z_NULL || ds->head == Z_NULL || + ds->pending_buf == Z_NULL) { + deflateEnd (dest); + return Z_MEM_ERROR; + } + /* following zmemcpy do not work for 16-bit MSDOS */ + zmemcpy(ds->window, ss->window, ds->w_size * 2 * sizeof(Byte)); + zmemcpy(ds->prev, ss->prev, ds->w_size * sizeof(Pos)); + zmemcpy(ds->head, ss->head, ds->hash_size * sizeof(Pos)); + zmemcpy(ds->pending_buf, ss->pending_buf, (uInt)ds->pending_buf_size); + + ds->pending_out = ds->pending_buf + (ss->pending_out - ss->pending_buf); + ds->d_buf = overlay + ds->lit_bufsize/sizeof(ush); + ds->l_buf = ds->pending_buf + (1+sizeof(ush))*ds->lit_bufsize; + + ds->l_desc.dyn_tree = ds->dyn_ltree; + ds->d_desc.dyn_tree = ds->dyn_dtree; + ds->bl_desc.dyn_tree = ds->bl_tree; + + return Z_OK; +#endif +} + +/* =========================================================================== + * Read a new buffer from the current input stream, update the adler32 + * and total number of bytes read. All deflate() input goes through + * this function so some applications may wish to modify it to avoid + * allocating a large strm->next_in buffer and copying from it. + * (See also flush_pending()). + */ +local int read_buf(strm, buf, size) + z_streamp strm; + Bytef *buf; + unsigned size; +{ + unsigned len = strm->avail_in; + + if (len > size) len = size; + if (len == 0) return 0; + + strm->avail_in -= len; + + if (!strm->state->noheader) { + strm->adler = adler32(strm->adler, strm->next_in, len); + } + zmemcpy(buf, strm->next_in, len); + strm->next_in += len; + strm->total_in += len; + + return (int)len; +} + +/* =========================================================================== + * Initialize the "longest match" routines for a new zlib stream + */ +local void lm_init (s) + deflate_state *s; +{ + s->window_size = (ulg)2L*s->w_size; + + CLEAR_HASH(s); + + /* Set the default configuration parameters: + */ + s->max_lazy_match = configuration_table[s->level].max_lazy; + s->good_match = configuration_table[s->level].good_length; + s->nice_match = configuration_table[s->level].nice_length; + s->max_chain_length = configuration_table[s->level].max_chain; + + s->strstart = 0; + s->block_start = 0L; + s->lookahead = 0; + s->match_length = s->prev_length = MIN_MATCH-1; + s->match_available = 0; + s->ins_h = 0; +#ifdef ASMV + match_init(); /* initialize the asm code */ +#endif +} + +/* =========================================================================== + * Set match_start to the longest match starting at the given string and + * return its length. Matches shorter or equal to prev_length are discarded, + * in which case the result is equal to prev_length and match_start is + * garbage. + * IN assertions: cur_match is the head of the hash chain for the current + * string (strstart) and its distance is <= MAX_DIST, and prev_length >= 1 + * OUT assertion: the match length is not greater than s->lookahead. + */ +#ifndef ASMV +/* For 80x86 and 680x0, an optimized version will be provided in match.asm or + * match.S. The code will be functionally equivalent. + */ +#ifndef FASTEST +local uInt longest_match(s, cur_match) + deflate_state *s; + IPos cur_match; /* current match */ +{ + unsigned chain_length = s->max_chain_length;/* max hash chain length */ + register Bytef *scan = s->window + s->strstart; /* current string */ + register Bytef *match; /* matched string */ + register int len; /* length of current match */ + int best_len = s->prev_length; /* best match length so far */ + int nice_match = s->nice_match; /* stop if match long enough */ + IPos limit = s->strstart > (IPos)MAX_DIST(s) ? + s->strstart - (IPos)MAX_DIST(s) : NIL; + /* Stop when cur_match becomes <= limit. To simplify the code, + * we prevent matches with the string of window index 0. + */ + Posf *prev = s->prev; + uInt wmask = s->w_mask; + +#ifdef UNALIGNED_OK + /* Compare two bytes at a time. Note: this is not always beneficial. + * Try with and without -DUNALIGNED_OK to check. + */ + register Bytef *strend = s->window + s->strstart + MAX_MATCH - 1; + register ush scan_start = *(ushf*)scan; + register ush scan_end = *(ushf*)(scan+best_len-1); +#else + register Bytef *strend = s->window + s->strstart + MAX_MATCH; + register Byte scan_end1 = scan[best_len-1]; + register Byte scan_end = scan[best_len]; +#endif + + /* The code is optimized for HASH_BITS >= 8 and MAX_MATCH-2 multiple of 16. + * It is easy to get rid of this optimization if necessary. + */ + Assert(s->hash_bits >= 8 && MAX_MATCH == 258, "Code too clever"); + + /* Do not waste too much time if we already have a good match: */ + if (s->prev_length >= s->good_match) { + chain_length >>= 2; + } + /* Do not look for matches beyond the end of the input. This is necessary + * to make deflate deterministic. + */ + if ((uInt)nice_match > s->lookahead) nice_match = s->lookahead; + + Assert((ulg)s->strstart <= s->window_size-MIN_LOOKAHEAD, "need lookahead"); + + do { + Assert(cur_match < s->strstart, "no future"); + match = s->window + cur_match; + + /* Skip to next match if the match length cannot increase + * or if the match length is less than 2: + */ +#if (defined(UNALIGNED_OK) && MAX_MATCH == 258) + /* This code assumes sizeof(unsigned short) == 2. Do not use + * UNALIGNED_OK if your compiler uses a different size. + */ + if (*(ushf*)(match+best_len-1) != scan_end || + *(ushf*)match != scan_start) continue; + + /* It is not necessary to compare scan[2] and match[2] since they are + * always equal when the other bytes match, given that the hash keys + * are equal and that HASH_BITS >= 8. Compare 2 bytes at a time at + * strstart+3, +5, ... up to strstart+257. We check for insufficient + * lookahead only every 4th comparison; the 128th check will be made + * at strstart+257. If MAX_MATCH-2 is not a multiple of 8, it is + * necessary to put more guard bytes at the end of the window, or + * to check more often for insufficient lookahead. + */ + Assert(scan[2] == match[2], "scan[2]?"); + scan++, match++; + do { + } while (*(ushf*)(scan+=2) == *(ushf*)(match+=2) && + *(ushf*)(scan+=2) == *(ushf*)(match+=2) && + *(ushf*)(scan+=2) == *(ushf*)(match+=2) && + *(ushf*)(scan+=2) == *(ushf*)(match+=2) && + scan < strend); + /* The funny "do {}" generates better code on most compilers */ + + /* Here, scan <= window+strstart+257 */ + Assert(scan <= s->window+(unsigned)(s->window_size-1), "wild scan"); + if (*scan == *match) scan++; + + len = (MAX_MATCH - 1) - (int)(strend-scan); + scan = strend - (MAX_MATCH-1); + +#else /* UNALIGNED_OK */ + + if (match[best_len] != scan_end || + match[best_len-1] != scan_end1 || + *match != *scan || + *++match != scan[1]) continue; + + /* The check at best_len-1 can be removed because it will be made + * again later. (This heuristic is not always a win.) + * It is not necessary to compare scan[2] and match[2] since they + * are always equal when the other bytes match, given that + * the hash keys are equal and that HASH_BITS >= 8. + */ + scan += 2, match++; + Assert(*scan == *match, "match[2]?"); + + /* We check for insufficient lookahead only every 8th comparison; + * the 256th check will be made at strstart+258. + */ + do { + } while (*++scan == *++match && *++scan == *++match && + *++scan == *++match && *++scan == *++match && + *++scan == *++match && *++scan == *++match && + *++scan == *++match && *++scan == *++match && + scan < strend); + + Assert(scan <= s->window+(unsigned)(s->window_size-1), "wild scan"); + + len = MAX_MATCH - (int)(strend - scan); + scan = strend - MAX_MATCH; + +#endif /* UNALIGNED_OK */ + + if (len > best_len) { + s->match_start = cur_match; + best_len = len; + if (len >= nice_match) break; +#ifdef UNALIGNED_OK + scan_end = *(ushf*)(scan+best_len-1); +#else + scan_end1 = scan[best_len-1]; + scan_end = scan[best_len]; +#endif + } + } while ((cur_match = prev[cur_match & wmask]) > limit + && --chain_length != 0); + + if ((uInt)best_len <= s->lookahead) return (uInt)best_len; + return s->lookahead; +} + +#else /* FASTEST */ +/* --------------------------------------------------------------------------- + * Optimized version for level == 1 only + */ +local uInt longest_match(s, cur_match) + deflate_state *s; + IPos cur_match; /* current match */ +{ + register Bytef *scan = s->window + s->strstart; /* current string */ + register Bytef *match; /* matched string */ + register int len; /* length of current match */ + register Bytef *strend = s->window + s->strstart + MAX_MATCH; + + /* The code is optimized for HASH_BITS >= 8 and MAX_MATCH-2 multiple of 16. + * It is easy to get rid of this optimization if necessary. + */ + Assert(s->hash_bits >= 8 && MAX_MATCH == 258, "Code too clever"); + + Assert((ulg)s->strstart <= s->window_size-MIN_LOOKAHEAD, "need lookahead"); + + Assert(cur_match < s->strstart, "no future"); + + match = s->window + cur_match; + + /* Return failure if the match length is less than 2: + */ + if (match[0] != scan[0] || match[1] != scan[1]) return MIN_MATCH-1; + + /* The check at best_len-1 can be removed because it will be made + * again later. (This heuristic is not always a win.) + * It is not necessary to compare scan[2] and match[2] since they + * are always equal when the other bytes match, given that + * the hash keys are equal and that HASH_BITS >= 8. + */ + scan += 2, match += 2; + Assert(*scan == *match, "match[2]?"); + + /* We check for insufficient lookahead only every 8th comparison; + * the 256th check will be made at strstart+258. + */ + do { + } while (*++scan == *++match && *++scan == *++match && + *++scan == *++match && *++scan == *++match && + *++scan == *++match && *++scan == *++match && + *++scan == *++match && *++scan == *++match && + scan < strend); + + Assert(scan <= s->window+(unsigned)(s->window_size-1), "wild scan"); + + len = MAX_MATCH - (int)(strend - scan); + + if (len < MIN_MATCH) return MIN_MATCH - 1; + + s->match_start = cur_match; + return len <= s->lookahead ? len : s->lookahead; +} +#endif /* FASTEST */ +#endif /* ASMV */ + +#ifdef DEBUG +/* =========================================================================== + * Check that the match at match_start is indeed a match. + */ +local void check_match(s, start, match, length) + deflate_state *s; + IPos start, match; + int length; +{ + /* check that the match is indeed a match */ + if (zmemcmp(s->window + match, + s->window + start, length) != EQUAL) { + fprintf(stderr, " start %u, match %u, length %d\n", + start, match, length); + do { + fprintf(stderr, "%c%c", s->window[match++], s->window[start++]); + } while (--length != 0); + z_error("invalid match"); + } + if (z_verbose > 1) { + fprintf(stderr,"\\[%d,%d]", start-match, length); + do { putc(s->window[start++], stderr); } while (--length != 0); + } +} +#else +# define check_match(s, start, match, length) +#endif + +/* =========================================================================== + * Fill the window when the lookahead becomes insufficient. + * Updates strstart and lookahead. + * + * IN assertion: lookahead < MIN_LOOKAHEAD + * OUT assertions: strstart <= window_size-MIN_LOOKAHEAD + * At least one byte has been read, or avail_in == 0; reads are + * performed for at least two bytes (required for the zip translate_eol + * option -- not supported here). + */ +local void fill_window(s) + deflate_state *s; +{ + register unsigned n, m; + register Posf *p; + unsigned more; /* Amount of free space at the end of the window. */ + uInt wsize = s->w_size; + + do { + more = (unsigned)(s->window_size -(ulg)s->lookahead -(ulg)s->strstart); + + /* Deal with !@#$% 64K limit: */ + if (more == 0 && s->strstart == 0 && s->lookahead == 0) { + more = wsize; + + } else if (more == (unsigned)(-1)) { + /* Very unlikely, but possible on 16 bit machine if strstart == 0 + * and lookahead == 1 (input done one byte at time) + */ + more--; + + /* If the window is almost full and there is insufficient lookahead, + * move the upper half to the lower one to make room in the upper half. + */ + } else if (s->strstart >= wsize+MAX_DIST(s)) { + + zmemcpy(s->window, s->window+wsize, (unsigned)wsize); + s->match_start -= wsize; + s->strstart -= wsize; /* we now have strstart >= MAX_DIST */ + s->block_start -= (long) wsize; + + /* Slide the hash table (could be avoided with 32 bit values + at the expense of memory usage). We slide even when level == 0 + to keep the hash table consistent if we switch back to level > 0 + later. (Using level 0 permanently is not an optimal usage of + zlib, so we don't care about this pathological case.) + */ + n = s->hash_size; + p = &s->head[n]; + do { + m = *--p; + *p = (Pos)(m >= wsize ? m-wsize : NIL); + } while (--n); + + n = wsize; +#ifndef FASTEST + p = &s->prev[n]; + do { + m = *--p; + *p = (Pos)(m >= wsize ? m-wsize : NIL); + /* If n is not on any hash chain, prev[n] is garbage but + * its value will never be used. + */ + } while (--n); +#endif + more += wsize; + } + if (s->strm->avail_in == 0) return; + + /* If there was no sliding: + * strstart <= WSIZE+MAX_DIST-1 && lookahead <= MIN_LOOKAHEAD - 1 && + * more == window_size - lookahead - strstart + * => more >= window_size - (MIN_LOOKAHEAD-1 + WSIZE + MAX_DIST-1) + * => more >= window_size - 2*WSIZE + 2 + * In the BIG_MEM or MMAP case (not yet supported), + * window_size == input_size + MIN_LOOKAHEAD && + * strstart + s->lookahead <= input_size => more >= MIN_LOOKAHEAD. + * Otherwise, window_size == 2*WSIZE so more >= 2. + * If there was sliding, more >= WSIZE. So in all cases, more >= 2. + */ + Assert(more >= 2, "more < 2"); + + n = read_buf(s->strm, s->window + s->strstart + s->lookahead, more); + s->lookahead += n; + + /* Initialize the hash value now that we have some input: */ + if (s->lookahead >= MIN_MATCH) { + s->ins_h = s->window[s->strstart]; + UPDATE_HASH(s, s->ins_h, s->window[s->strstart+1]); +#if MIN_MATCH != 3 + Call UPDATE_HASH() MIN_MATCH-3 more times +#endif + } + /* If the whole input has less than MIN_MATCH bytes, ins_h is garbage, + * but this is not important since only literal bytes will be emitted. + */ + + } while (s->lookahead < MIN_LOOKAHEAD && s->strm->avail_in != 0); +} + +/* =========================================================================== + * Flush the current block, with given end-of-file flag. + * IN assertion: strstart is set to the end of the current match. + */ +#define FLUSH_BLOCK_ONLY(s, eof) { \ + _tr_flush_block(s, (s->block_start >= 0L ? \ + (charf *)&s->window[(unsigned)s->block_start] : \ + (charf *)Z_NULL), \ + (ulg)((long)s->strstart - s->block_start), \ + (eof)); \ + s->block_start = s->strstart; \ + flush_pending(s->strm); \ + Tracev((stderr,"[FLUSH]")); \ +} + +/* Same but force premature exit if necessary. */ +#define FLUSH_BLOCK(s, eof) { \ + FLUSH_BLOCK_ONLY(s, eof); \ + if (s->strm->avail_out == 0) return (eof) ? finish_started : need_more; \ +} + +/* =========================================================================== + * Copy without compression as much as possible from the input stream, return + * the current block state. + * This function does not insert new strings in the dictionary since + * uncompressible data is probably not useful. This function is used + * only for the level=0 compression option. + * NOTE: this function should be optimized to avoid extra copying from + * window to pending_buf. + */ +local block_state deflate_stored(s, flush) + deflate_state *s; + int flush; +{ + /* Stored blocks are limited to 0xffff bytes, pending_buf is limited + * to pending_buf_size, and each stored block has a 5 byte header: + */ + ulg max_block_size = 0xffff; + ulg max_start; + + if (max_block_size > s->pending_buf_size - 5) { + max_block_size = s->pending_buf_size - 5; + } + + /* Copy as much as possible from input to output: */ + for (;;) { + /* Fill the window as much as possible: */ + if (s->lookahead <= 1) { + + Assert(s->strstart < s->w_size+MAX_DIST(s) || + s->block_start >= (long)s->w_size, "slide too late"); + + fill_window(s); + if (s->lookahead == 0 && flush == Z_NO_FLUSH) return need_more; + + if (s->lookahead == 0) break; /* flush the current block */ + } + Assert(s->block_start >= 0L, "block gone"); + + s->strstart += s->lookahead; + s->lookahead = 0; + + /* Emit a stored block if pending_buf will be full: */ + max_start = s->block_start + max_block_size; + if (s->strstart == 0 || (ulg)s->strstart >= max_start) { + /* strstart == 0 is possible when wraparound on 16-bit machine */ + s->lookahead = (uInt)(s->strstart - max_start); + s->strstart = (uInt)max_start; + FLUSH_BLOCK(s, 0); + } + /* Flush if we may have to slide, otherwise block_start may become + * negative and the data will be gone: + */ + if (s->strstart - (uInt)s->block_start >= MAX_DIST(s)) { + FLUSH_BLOCK(s, 0); + } + } + FLUSH_BLOCK(s, flush == Z_FINISH); + return flush == Z_FINISH ? finish_done : block_done; +} + +/* =========================================================================== + * Compress as much as possible from the input stream, return the current + * block state. + * This function does not perform lazy evaluation of matches and inserts + * new strings in the dictionary only for unmatched strings or for short + * matches. It is used only for the fast compression options. + */ +local block_state deflate_fast(s, flush) + deflate_state *s; + int flush; +{ + IPos hash_head = NIL; /* head of the hash chain */ + int bflush; /* set if current block must be flushed */ + + for (;;) { + /* Make sure that we always have enough lookahead, except + * at the end of the input file. We need MAX_MATCH bytes + * for the next match, plus MIN_MATCH bytes to insert the + * string following the next match. + */ + if (s->lookahead < MIN_LOOKAHEAD) { + fill_window(s); + if (s->lookahead < MIN_LOOKAHEAD && flush == Z_NO_FLUSH) { + return need_more; + } + if (s->lookahead == 0) break; /* flush the current block */ + } + + /* Insert the string window[strstart .. strstart+2] in the + * dictionary, and set hash_head to the head of the hash chain: + */ + if (s->lookahead >= MIN_MATCH) { + INSERT_STRING(s, s->strstart, hash_head); + } + + /* Find the longest match, discarding those <= prev_length. + * At this point we have always match_length < MIN_MATCH + */ + if (hash_head != NIL && s->strstart - hash_head <= MAX_DIST(s)) { + /* To simplify the code, we prevent matches with the string + * of window index 0 (in particular we have to avoid a match + * of the string with itself at the start of the input file). + */ + if (s->strategy != Z_HUFFMAN_ONLY) { + s->match_length = longest_match (s, hash_head); + } + /* longest_match() sets match_start */ + } + if (s->match_length >= MIN_MATCH) { + check_match(s, s->strstart, s->match_start, s->match_length); + + _tr_tally_dist(s, s->strstart - s->match_start, + s->match_length - MIN_MATCH, bflush); + + s->lookahead -= s->match_length; + + /* Insert new strings in the hash table only if the match length + * is not too large. This saves time but degrades compression. + */ +#ifndef FASTEST + if (s->match_length <= s->max_insert_length && + s->lookahead >= MIN_MATCH) { + s->match_length--; /* string at strstart already in hash table */ + do { + s->strstart++; + INSERT_STRING(s, s->strstart, hash_head); + /* strstart never exceeds WSIZE-MAX_MATCH, so there are + * always MIN_MATCH bytes ahead. + */ + } while (--s->match_length != 0); + s->strstart++; + } else +#endif + { + s->strstart += s->match_length; + s->match_length = 0; + s->ins_h = s->window[s->strstart]; + UPDATE_HASH(s, s->ins_h, s->window[s->strstart+1]); +#if MIN_MATCH != 3 + Call UPDATE_HASH() MIN_MATCH-3 more times +#endif + /* If lookahead < MIN_MATCH, ins_h is garbage, but it does not + * matter since it will be recomputed at next deflate call. + */ + } + } else { + /* No match, output a literal byte */ + Tracevv((stderr,"%c", s->window[s->strstart])); + _tr_tally_lit (s, s->window[s->strstart], bflush); + s->lookahead--; + s->strstart++; + } + if (bflush) FLUSH_BLOCK(s, 0); + } + FLUSH_BLOCK(s, flush == Z_FINISH); + return flush == Z_FINISH ? finish_done : block_done; +} + +/* =========================================================================== + * Same as above, but achieves better compression. We use a lazy + * evaluation for matches: a match is finally adopted only if there is + * no better match at the next window position. + */ +local block_state deflate_slow(s, flush) + deflate_state *s; + int flush; +{ + IPos hash_head = NIL; /* head of hash chain */ + int bflush; /* set if current block must be flushed */ + + /* Process the input block. */ + for (;;) { + /* Make sure that we always have enough lookahead, except + * at the end of the input file. We need MAX_MATCH bytes + * for the next match, plus MIN_MATCH bytes to insert the + * string following the next match. + */ + if (s->lookahead < MIN_LOOKAHEAD) { + fill_window(s); + if (s->lookahead < MIN_LOOKAHEAD && flush == Z_NO_FLUSH) { + return need_more; + } + if (s->lookahead == 0) break; /* flush the current block */ + } + + /* Insert the string window[strstart .. strstart+2] in the + * dictionary, and set hash_head to the head of the hash chain: + */ + if (s->lookahead >= MIN_MATCH) { + INSERT_STRING(s, s->strstart, hash_head); + } + + /* Find the longest match, discarding those <= prev_length. + */ + s->prev_length = s->match_length, s->prev_match = s->match_start; + s->match_length = MIN_MATCH-1; + + if (hash_head != NIL && s->prev_length < s->max_lazy_match && + s->strstart - hash_head <= MAX_DIST(s)) { + /* To simplify the code, we prevent matches with the string + * of window index 0 (in particular we have to avoid a match + * of the string with itself at the start of the input file). + */ + if (s->strategy != Z_HUFFMAN_ONLY) { + s->match_length = longest_match (s, hash_head); + } + /* longest_match() sets match_start */ + + if (s->match_length <= 5 && (s->strategy == Z_FILTERED || + (s->match_length == MIN_MATCH && + s->strstart - s->match_start > TOO_FAR))) { + + /* If prev_match is also MIN_MATCH, match_start is garbage + * but we will ignore the current match anyway. + */ + s->match_length = MIN_MATCH-1; + } + } + /* If there was a match at the previous step and the current + * match is not better, output the previous match: + */ + if (s->prev_length >= MIN_MATCH && s->match_length <= s->prev_length) { + uInt max_insert = s->strstart + s->lookahead - MIN_MATCH; + /* Do not insert strings in hash table beyond this. */ + + check_match(s, s->strstart-1, s->prev_match, s->prev_length); + + _tr_tally_dist(s, s->strstart -1 - s->prev_match, + s->prev_length - MIN_MATCH, bflush); + + /* Insert in hash table all strings up to the end of the match. + * strstart-1 and strstart are already inserted. If there is not + * enough lookahead, the last two strings are not inserted in + * the hash table. + */ + s->lookahead -= s->prev_length-1; + s->prev_length -= 2; + do { + if (++s->strstart <= max_insert) { + INSERT_STRING(s, s->strstart, hash_head); + } + } while (--s->prev_length != 0); + s->match_available = 0; + s->match_length = MIN_MATCH-1; + s->strstart++; + + if (bflush) FLUSH_BLOCK(s, 0); + + } else if (s->match_available) { + /* If there was no match at the previous position, output a + * single literal. If there was a match but the current match + * is longer, truncate the previous match to a single literal. + */ + Tracevv((stderr,"%c", s->window[s->strstart-1])); + _tr_tally_lit(s, s->window[s->strstart-1], bflush); + if (bflush) { + FLUSH_BLOCK_ONLY(s, 0); + } + s->strstart++; + s->lookahead--; + if (s->strm->avail_out == 0) return need_more; + } else { + /* There is no previous match to compare with, wait for + * the next step to decide. + */ + s->match_available = 1; + s->strstart++; + s->lookahead--; + } + } + Assert (flush != Z_NO_FLUSH, "no flush?"); + if (s->match_available) { + Tracevv((stderr,"%c", s->window[s->strstart-1])); + _tr_tally_lit(s, s->window[s->strstart-1], bflush); + s->match_available = 0; + } + FLUSH_BLOCK(s, flush == Z_FINISH); + return flush == Z_FINISH ? finish_done : block_done; +} diff --git a/packages/services/compress/zlib/current/src/deflate.h b/packages/services/compress/zlib/current/src/deflate.h new file mode 100644 --- /dev/null +++ b/packages/services/compress/zlib/current/src/deflate.h @@ -0,0 +1,318 @@ +/* deflate.h -- internal compression state + * Copyright (C) 1995-1998 Jean-loup Gailly + * For conditions of distribution and use, see copyright notice in zlib.h + */ + +/* WARNING: this file should *not* be used by applications. It is + part of the implementation of the compression library and is + subject to change. Applications should only use zlib.h. + */ + +/* @(#) $Id$ */ + +#ifndef _DEFLATE_H +#define _DEFLATE_H + +#include "zutil.h" + +/* =========================================================================== + * Internal compression state. + */ + +#define LENGTH_CODES 29 +/* number of length codes, not counting the special END_BLOCK code */ + +#define LITERALS 256 +/* number of literal bytes 0..255 */ + +#define L_CODES (LITERALS+1+LENGTH_CODES) +/* number of Literal or Length codes, including the END_BLOCK code */ + +#define D_CODES 30 +/* number of distance codes */ + +#define BL_CODES 19 +/* number of codes used to transfer the bit lengths */ + +#define HEAP_SIZE (2*L_CODES+1) +/* maximum heap size */ + +#define MAX_BITS 15 +/* All codes must not exceed MAX_BITS bits */ + +#define INIT_STATE 42 +#define BUSY_STATE 113 +#define FINISH_STATE 666 +/* Stream status */ + + +/* Data structure describing a single value and its code string. */ +typedef struct ct_data_s { + union { + ush freq; /* frequency count */ + ush code; /* bit string */ + } fc; + union { + ush dad; /* father node in Huffman tree */ + ush len; /* length of bit string */ + } dl; +} FAR ct_data; + +#define Freq fc.freq +#define Code fc.code +#define Dad dl.dad +#define Len dl.len + +typedef struct static_tree_desc_s static_tree_desc; + +typedef struct tree_desc_s { + ct_data *dyn_tree; /* the dynamic tree */ + int max_code; /* largest code with non zero frequency */ + static_tree_desc *stat_desc; /* the corresponding static tree */ +} FAR tree_desc; + +typedef ush Pos; +typedef Pos FAR Posf; +typedef unsigned IPos; + +/* A Pos is an index in the character window. We use short instead of int to + * save space in the various tables. IPos is used only for parameter passing. + */ + +typedef struct internal_state { + z_streamp strm; /* pointer back to this zlib stream */ + int status; /* as the name implies */ + Bytef *pending_buf; /* output still pending */ + ulg pending_buf_size; /* size of pending_buf */ + Bytef *pending_out; /* next pending byte to output to the stream */ + int pending; /* nb of bytes in the pending buffer */ + int noheader; /* suppress zlib header and adler32 */ + Byte data_type; /* UNKNOWN, BINARY or ASCII */ + Byte method; /* STORED (for zip only) or DEFLATED */ + int last_flush; /* value of flush param for previous deflate call */ + + /* used by deflate.c: */ + + uInt w_size; /* LZ77 window size (32K by default) */ + uInt w_bits; /* log2(w_size) (8..16) */ + uInt w_mask; /* w_size - 1 */ + + Bytef *window; + /* Sliding window. Input bytes are read into the second half of the window, + * and move to the first half later to keep a dictionary of at least wSize + * bytes. With this organization, matches are limited to a distance of + * wSize-MAX_MATCH bytes, but this ensures that IO is always + * performed with a length multiple of the block size. Also, it limits + * the window size to 64K, which is quite useful on MSDOS. + * To do: use the user input buffer as sliding window. + */ + + ulg window_size; + /* Actual size of window: 2*wSize, except when the user input buffer + * is directly used as sliding window. + */ + + Posf *prev; + /* Link to older string with same hash index. To limit the size of this + * array to 64K, this link is maintained only for the last 32K strings. + * An index in this array is thus a window index modulo 32K. + */ + + Posf *head; /* Heads of the hash chains or NIL. */ + + uInt ins_h; /* hash index of string to be inserted */ + uInt hash_size; /* number of elements in hash table */ + uInt hash_bits; /* log2(hash_size) */ + uInt hash_mask; /* hash_size-1 */ + + uInt hash_shift; + /* Number of bits by which ins_h must be shifted at each input + * step. It must be such that after MIN_MATCH steps, the oldest + * byte no longer takes part in the hash key, that is: + * hash_shift * MIN_MATCH >= hash_bits + */ + + long block_start; + /* Window position at the beginning of the current output block. Gets + * negative when the window is moved backwards. + */ + + uInt match_length; /* length of best match */ + IPos prev_match; /* previous match */ + int match_available; /* set if previous match exists */ + uInt strstart; /* start of string to insert */ + uInt match_start; /* start of matching string */ + uInt lookahead; /* number of valid bytes ahead in window */ + + uInt prev_length; + /* Length of the best match at previous step. Matches not greater than this + * are discarded. This is used in the lazy match evaluation. + */ + + uInt max_chain_length; + /* To speed up deflation, hash chains are never searched beyond this + * length. A higher limit improves compression ratio but degrades the + * speed. + */ + + uInt max_lazy_match; + /* Attempt to find a better match only when the current match is strictly + * smaller than this value. This mechanism is used only for compression + * levels >= 4. + */ +# define max_insert_length max_lazy_match + /* Insert new strings in the hash table only if the match length is not + * greater than this length. This saves time but degrades compression. + * max_insert_length is used only for compression levels <= 3. + */ + + int level; /* compression level (1..9) */ + int strategy; /* favor or force Huffman coding*/ + + uInt good_match; + /* Use a faster search when the previous match is longer than this */ + + int nice_match; /* Stop searching when current match exceeds this */ + + /* used by trees.c: */ + /* Didn't use ct_data typedef below to supress compiler warning */ + struct ct_data_s dyn_ltree[HEAP_SIZE]; /* literal and length tree */ + struct ct_data_s dyn_dtree[2*D_CODES+1]; /* distance tree */ + struct ct_data_s bl_tree[2*BL_CODES+1]; /* Huffman tree for bit lengths */ + + struct tree_desc_s l_desc; /* desc. for literal tree */ + struct tree_desc_s d_desc; /* desc. for distance tree */ + struct tree_desc_s bl_desc; /* desc. for bit length tree */ + + ush bl_count[MAX_BITS+1]; + /* number of codes at each bit length for an optimal tree */ + + int heap[2*L_CODES+1]; /* heap used to build the Huffman trees */ + int heap_len; /* number of elements in the heap */ + int heap_max; /* element of largest frequency */ + /* The sons of heap[n] are heap[2*n] and heap[2*n+1]. heap[0] is not used. + * The same heap array is used to build all trees. + */ + + uch depth[2*L_CODES+1]; + /* Depth of each subtree used as tie breaker for trees of equal frequency + */ + + uchf *l_buf; /* buffer for literals or lengths */ + + uInt lit_bufsize; + /* Size of match buffer for literals/lengths. There are 4 reasons for + * limiting lit_bufsize to 64K: + * - frequencies can be kept in 16 bit counters + * - if compression is not successful for the first block, all input + * data is still in the window so we can still emit a stored block even + * when input comes from standard input. (This can also be done for + * all blocks if lit_bufsize is not greater than 32K.) + * - if compression is not successful for a file smaller than 64K, we can + * even emit a stored file instead of a stored block (saving 5 bytes). + * This is applicable only for zip (not gzip or zlib). + * - creating new Huffman trees less frequently may not provide fast + * adaptation to changes in the input data statistics. (Take for + * example a binary file with poorly compressible code followed by + * a highly compressible string table.) Smaller buffer sizes give + * fast adaptation but have of course the overhead of transmitting + * trees more frequently. + * - I can't count above 4 + */ + + uInt last_lit; /* running index in l_buf */ + + ushf *d_buf; + /* Buffer for distances. To simplify the code, d_buf and l_buf have + * the same number of elements. To use different lengths, an extra flag + * array would be necessary. + */ + + ulg opt_len; /* bit length of current block with optimal trees */ + ulg static_len; /* bit length of current block with static trees */ + uInt matches; /* number of string matches in current block */ + int last_eob_len; /* bit length of EOB code for last block */ + +#ifdef DEBUG + ulg compressed_len; /* total bit length of compressed file mod 2^32 */ + ulg bits_sent; /* bit length of compressed data sent mod 2^32 */ +#endif + + ush bi_buf; + /* Output buffer. bits are inserted starting at the bottom (least + * significant bits). + */ + int bi_valid; + /* Number of valid bits in bi_buf. All bits above the last valid bit + * are always zero. + */ + +} FAR deflate_state; + +/* Output a byte on the stream. + * IN assertion: there is enough room in pending_buf. + */ +#define put_byte(s, c) {s->pending_buf[s->pending++] = (c);} + + +#define MIN_LOOKAHEAD (MAX_MATCH+MIN_MATCH+1) +/* Minimum amount of lookahead, except at the end of the input file. + * See deflate.c for comments about the MIN_MATCH+1. + */ + +#define MAX_DIST(s) ((s)->w_size-MIN_LOOKAHEAD) +/* In order to simplify the code, particularly on 16 bit machines, match + * distances are limited to MAX_DIST instead of WSIZE. + */ + + /* in trees.c */ +void _tr_init OF((deflate_state *s)); +int _tr_tally OF((deflate_state *s, unsigned dist, unsigned lc)); +void _tr_flush_block OF((deflate_state *s, charf *buf, ulg stored_len, + int eof)); +void _tr_align OF((deflate_state *s)); +void _tr_stored_block OF((deflate_state *s, charf *buf, ulg stored_len, + int eof)); + +#define d_code(dist) \ + ((dist) < 256 ? _dist_code[dist] : _dist_code[256+((dist)>>7)]) +/* Mapping from a distance to a distance code. dist is the distance - 1 and + * must not have side effects. _dist_code[256] and _dist_code[257] are never + * used. + */ + +#ifndef DEBUG +/* Inline versions of _tr_tally for speed: */ + +#if defined(GEN_TREES_H) || !defined(STDC) + extern uch _length_code[]; + extern uch _dist_code[]; +#else + extern const uch _length_code[]; + extern const uch _dist_code[]; +#endif + +# define _tr_tally_lit(s, c, flush) \ + { uch cc = (c); \ + s->d_buf[s->last_lit] = 0; \ + s->l_buf[s->last_lit++] = cc; \ + s->dyn_ltree[cc].Freq++; \ + flush = (s->last_lit == s->lit_bufsize-1); \ + } +# define _tr_tally_dist(s, distance, length, flush) \ + { uch len = (length); \ + ush dist = (distance); \ + s->d_buf[s->last_lit] = dist; \ + s->l_buf[s->last_lit++] = len; \ + dist--; \ + s->dyn_ltree[_length_code[len]+LITERALS+1].Freq++; \ + s->dyn_dtree[d_code(dist)].Freq++; \ + flush = (s->last_lit == s->lit_bufsize-1); \ + } +#else +# define _tr_tally_lit(s, c, flush) flush = _tr_tally(s, 0, c) +# define _tr_tally_dist(s, distance, length, flush) \ + flush = _tr_tally(s, distance, length) +#endif + +#endif diff --git a/packages/services/compress/zlib/current/src/descrip.mms b/packages/services/compress/zlib/current/src/descrip.mms new file mode 100644 --- /dev/null +++ b/packages/services/compress/zlib/current/src/descrip.mms @@ -0,0 +1,48 @@ +# descrip.mms: MMS description file for building zlib on VMS +# written by Martin P.J. Zinser + +cc_defs = +c_deb = + +.ifdef __DECC__ +pref = /prefix=all +.endif + +OBJS = adler32.obj, compress.obj, crc32.obj, gzio.obj, uncompr.obj,\ + deflate.obj, trees.obj, zutil.obj, inflate.obj, infblock.obj,\ + inftrees.obj, infcodes.obj, infutil.obj, inffast.obj + +CFLAGS= $(C_DEB) $(CC_DEFS) $(PREF) + +all : example.exe minigzip.exe + @ write sys$output " Example applications available" +libz.olb : libz.olb($(OBJS)) + @ write sys$output " libz available" + +example.exe : example.obj libz.olb + link example,libz.olb/lib + +minigzip.exe : minigzip.obj libz.olb + link minigzip,libz.olb/lib,x11vms:xvmsutils.olb/lib + +clean : + delete *.obj;*,libz.olb;* + + +# Other dependencies. +adler32.obj : zutil.h zlib.h zconf.h +compress.obj : zlib.h zconf.h +crc32.obj : zutil.h zlib.h zconf.h +deflate.obj : deflate.h zutil.h zlib.h zconf.h +example.obj : zlib.h zconf.h +gzio.obj : zutil.h zlib.h zconf.h +infblock.obj : zutil.h zlib.h zconf.h infblock.h inftrees.h infcodes.h infutil.h +infcodes.obj : zutil.h zlib.h zconf.h inftrees.h infutil.h infcodes.h inffast.h +inffast.obj : zutil.h zlib.h zconf.h inftrees.h infutil.h inffast.h +inflate.obj : zutil.h zlib.h zconf.h infblock.h +inftrees.obj : zutil.h zlib.h zconf.h inftrees.h +infutil.obj : zutil.h zlib.h zconf.h inftrees.h infutil.h +minigzip.obj : zlib.h zconf.h +trees.obj : deflate.h zutil.h zlib.h zconf.h +uncompr.obj : zlib.h zconf.h +zutil.obj : zutil.h zlib.h zconf.h diff --git a/packages/services/compress/zlib/current/src/example.c b/packages/services/compress/zlib/current/src/example.c new file mode 100644 --- /dev/null +++ b/packages/services/compress/zlib/current/src/example.c @@ -0,0 +1,556 @@ +/* example.c -- usage example of the zlib compression library + * Copyright (C) 1995-1998 Jean-loup Gailly. + * For conditions of distribution and use, see copyright notice in zlib.h + */ + +/* @(#) $Id$ */ + +#include +#include "zlib.h" + +#ifdef STDC +# include +# include +#else + extern void exit OF((int)); +#endif + +#if defined(VMS) || defined(RISCOS) +# define TESTFILE "foo-gz" +#else +# define TESTFILE "foo.gz" +#endif + +#define CHECK_ERR(err, msg) { \ + if (err != Z_OK) { \ + fprintf(stderr, "%s error: %d\n", msg, err); \ + exit(1); \ + } \ +} + +const char hello[] = "hello, hello!"; +/* "hello world" would be more standard, but the repeated "hello" + * stresses the compression code better, sorry... + */ + +const char dictionary[] = "hello"; +uLong dictId; /* Adler32 value of the dictionary */ + +void test_compress OF((Byte *compr, uLong comprLen, + Byte *uncompr, uLong uncomprLen)); +void test_gzio OF((const char *out, const char *in, + Byte *uncompr, int uncomprLen)); +void test_deflate OF((Byte *compr, uLong comprLen)); +void test_inflate OF((Byte *compr, uLong comprLen, + Byte *uncompr, uLong uncomprLen)); +void test_large_deflate OF((Byte *compr, uLong comprLen, + Byte *uncompr, uLong uncomprLen)); +void test_large_inflate OF((Byte *compr, uLong comprLen, + Byte *uncompr, uLong uncomprLen)); +void test_flush OF((Byte *compr, uLong *comprLen)); +void test_sync OF((Byte *compr, uLong comprLen, + Byte *uncompr, uLong uncomprLen)); +void test_dict_deflate OF((Byte *compr, uLong comprLen)); +void test_dict_inflate OF((Byte *compr, uLong comprLen, + Byte *uncompr, uLong uncomprLen)); +int main OF((int argc, char *argv[])); + +/* =========================================================================== + * Test compress() and uncompress() + */ +void test_compress(compr, comprLen, uncompr, uncomprLen) + Byte *compr, *uncompr; + uLong comprLen, uncomprLen; +{ + int err; + uLong len = strlen(hello)+1; + + err = compress(compr, &comprLen, (const Bytef*)hello, len); + CHECK_ERR(err, "compress"); + + strcpy((char*)uncompr, "garbage"); + + err = uncompress(uncompr, &uncomprLen, compr, comprLen); + CHECK_ERR(err, "uncompress"); + + if (strcmp((char*)uncompr, hello)) { + fprintf(stderr, "bad uncompress\n"); + exit(1); + } else { + printf("uncompress(): %s\n", (char *)uncompr); + } +} + +/* =========================================================================== + * Test read/write of .gz files + */ +void test_gzio(out, in, uncompr, uncomprLen) + const char *out; /* compressed output file */ + const char *in; /* compressed input file */ + Byte *uncompr; + int uncomprLen; +{ + int err; + int len = strlen(hello)+1; + gzFile file; + z_off_t pos; + + file = gzopen(out, "wb"); + if (file == NULL) { + fprintf(stderr, "gzopen error\n"); + exit(1); + } + gzputc(file, 'h'); + if (gzputs(file, "ello") != 4) { + fprintf(stderr, "gzputs err: %s\n", gzerror(file, &err)); + exit(1); + } + if (gzprintf(file, ", %s!", "hello") != 8) { + fprintf(stderr, "gzprintf err: %s\n", gzerror(file, &err)); + exit(1); + } + gzseek(file, 1L, SEEK_CUR); /* add one zero byte */ + gzclose(file); + + file = gzopen(in, "rb"); + if (file == NULL) { + fprintf(stderr, "gzopen error\n"); + } + strcpy((char*)uncompr, "garbage"); + + uncomprLen = gzread(file, uncompr, (unsigned)uncomprLen); + if (uncomprLen != len) { + fprintf(stderr, "gzread err: %s\n", gzerror(file, &err)); + exit(1); + } + if (strcmp((char*)uncompr, hello)) { + fprintf(stderr, "bad gzread: %s\n", (char*)uncompr); + exit(1); + } else { + printf("gzread(): %s\n", (char *)uncompr); + } + + pos = gzseek(file, -8L, SEEK_CUR); + if (pos != 6 || gztell(file) != pos) { + fprintf(stderr, "gzseek error, pos=%ld, gztell=%ld\n", + (long)pos, (long)gztell(file)); + exit(1); + } + + if (gzgetc(file) != ' ') { + fprintf(stderr, "gzgetc error\n"); + exit(1); + } + + gzgets(file, (char*)uncompr, uncomprLen); + uncomprLen = strlen((char*)uncompr); + if (uncomprLen != 6) { /* "hello!" */ + fprintf(stderr, "gzgets err after gzseek: %s\n", gzerror(file, &err)); + exit(1); + } + if (strcmp((char*)uncompr, hello+7)) { + fprintf(stderr, "bad gzgets after gzseek\n"); + exit(1); + } else { + printf("gzgets() after gzseek: %s\n", (char *)uncompr); + } + + gzclose(file); +} + +/* =========================================================================== + * Test deflate() with small buffers + */ +void test_deflate(compr, comprLen) + Byte *compr; + uLong comprLen; +{ + z_stream c_stream; /* compression stream */ + int err; + int len = strlen(hello)+1; + + c_stream.zalloc = (alloc_func)0; + c_stream.zfree = (free_func)0; + c_stream.opaque = (voidpf)0; + + err = deflateInit(&c_stream, Z_DEFAULT_COMPRESSION); + CHECK_ERR(err, "deflateInit"); + + c_stream.next_in = (Bytef*)hello; + c_stream.next_out = compr; + + while (c_stream.total_in != (uLong)len && c_stream.total_out < comprLen) { + c_stream.avail_in = c_stream.avail_out = 1; /* force small buffers */ + err = deflate(&c_stream, Z_NO_FLUSH); + CHECK_ERR(err, "deflate"); + } + /* Finish the stream, still forcing small buffers: */ + for (;;) { + c_stream.avail_out = 1; + err = deflate(&c_stream, Z_FINISH); + if (err == Z_STREAM_END) break; + CHECK_ERR(err, "deflate"); + } + + err = deflateEnd(&c_stream); + CHECK_ERR(err, "deflateEnd"); +} + +/* =========================================================================== + * Test inflate() with small buffers + */ +void test_inflate(compr, comprLen, uncompr, uncomprLen) + Byte *compr, *uncompr; + uLong comprLen, uncomprLen; +{ + int err; + z_stream d_stream; /* decompression stream */ + + strcpy((char*)uncompr, "garbage"); + + d_stream.zalloc = (alloc_func)0; + d_stream.zfree = (free_func)0; + d_stream.opaque = (voidpf)0; + + d_stream.next_in = compr; + d_stream.avail_in = 0; + d_stream.next_out = uncompr; + + err = inflateInit(&d_stream); + CHECK_ERR(err, "inflateInit"); + + while (d_stream.total_out < uncomprLen && d_stream.total_in < comprLen) { + d_stream.avail_in = d_stream.avail_out = 1; /* force small buffers */ + err = inflate(&d_stream, Z_NO_FLUSH); + if (err == Z_STREAM_END) break; + CHECK_ERR(err, "inflate"); + } + + err = inflateEnd(&d_stream); + CHECK_ERR(err, "inflateEnd"); + + if (strcmp((char*)uncompr, hello)) { + fprintf(stderr, "bad inflate\n"); + exit(1); + } else { + printf("inflate(): %s\n", (char *)uncompr); + } +} + +/* =========================================================================== + * Test deflate() with large buffers and dynamic change of compression level + */ +void test_large_deflate(compr, comprLen, uncompr, uncomprLen) + Byte *compr, *uncompr; + uLong comprLen, uncomprLen; +{ + z_stream c_stream; /* compression stream */ + int err; + + c_stream.zalloc = (alloc_func)0; + c_stream.zfree = (free_func)0; + c_stream.opaque = (voidpf)0; + + err = deflateInit(&c_stream, Z_BEST_SPEED); + CHECK_ERR(err, "deflateInit"); + + c_stream.next_out = compr; + c_stream.avail_out = (uInt)comprLen; + + /* At this point, uncompr is still mostly zeroes, so it should compress + * very well: + */ + c_stream.next_in = uncompr; + c_stream.avail_in = (uInt)uncomprLen; + err = deflate(&c_stream, Z_NO_FLUSH); + CHECK_ERR(err, "deflate"); + if (c_stream.avail_in != 0) { + fprintf(stderr, "deflate not greedy\n"); + exit(1); + } + + /* Feed in already compressed data and switch to no compression: */ + deflateParams(&c_stream, Z_NO_COMPRESSION, Z_DEFAULT_STRATEGY); + c_stream.next_in = compr; + c_stream.avail_in = (uInt)comprLen/2; + err = deflate(&c_stream, Z_NO_FLUSH); + CHECK_ERR(err, "deflate"); + + /* Switch back to compressing mode: */ + deflateParams(&c_stream, Z_BEST_COMPRESSION, Z_FILTERED); + c_stream.next_in = uncompr; + c_stream.avail_in = (uInt)uncomprLen; + err = deflate(&c_stream, Z_NO_FLUSH); + CHECK_ERR(err, "deflate"); + + err = deflate(&c_stream, Z_FINISH); + if (err != Z_STREAM_END) { + fprintf(stderr, "deflate should report Z_STREAM_END\n"); + exit(1); + } + err = deflateEnd(&c_stream); + CHECK_ERR(err, "deflateEnd"); +} + +/* =========================================================================== + * Test inflate() with large buffers + */ +void test_large_inflate(compr, comprLen, uncompr, uncomprLen) + Byte *compr, *uncompr; + uLong comprLen, uncomprLen; +{ + int err; + z_stream d_stream; /* decompression stream */ + + strcpy((char*)uncompr, "garbage"); + + d_stream.zalloc = (alloc_func)0; + d_stream.zfree = (free_func)0; + d_stream.opaque = (voidpf)0; + + d_stream.next_in = compr; + d_stream.avail_in = (uInt)comprLen; + + err = inflateInit(&d_stream); + CHECK_ERR(err, "inflateInit"); + + for (;;) { + d_stream.next_out = uncompr; /* discard the output */ + d_stream.avail_out = (uInt)uncomprLen; + err = inflate(&d_stream, Z_NO_FLUSH); + if (err == Z_STREAM_END) break; + CHECK_ERR(err, "large inflate"); + } + + err = inflateEnd(&d_stream); + CHECK_ERR(err, "inflateEnd"); + + if (d_stream.total_out != 2*uncomprLen + comprLen/2) { + fprintf(stderr, "bad large inflate: %ld\n", d_stream.total_out); + exit(1); + } else { + printf("large_inflate(): OK\n"); + } +} + +/* =========================================================================== + * Test deflate() with full flush + */ +void test_flush(compr, comprLen) + Byte *compr; + uLong *comprLen; +{ + z_stream c_stream; /* compression stream */ + int err; + int len = strlen(hello)+1; + + c_stream.zalloc = (alloc_func)0; + c_stream.zfree = (free_func)0; + c_stream.opaque = (voidpf)0; + + err = deflateInit(&c_stream, Z_DEFAULT_COMPRESSION); + CHECK_ERR(err, "deflateInit"); + + c_stream.next_in = (Bytef*)hello; + c_stream.next_out = compr; + c_stream.avail_in = 3; + c_stream.avail_out = (uInt)*comprLen; + err = deflate(&c_stream, Z_FULL_FLUSH); + CHECK_ERR(err, "deflate"); + + compr[3]++; /* force an error in first compressed block */ + c_stream.avail_in = len - 3; + + err = deflate(&c_stream, Z_FINISH); + if (err != Z_STREAM_END) { + CHECK_ERR(err, "deflate"); + } + err = deflateEnd(&c_stream); + CHECK_ERR(err, "deflateEnd"); + + *comprLen = c_stream.total_out; +} + +/* =========================================================================== + * Test inflateSync() + */ +void test_sync(compr, comprLen, uncompr, uncomprLen) + Byte *compr, *uncompr; + uLong comprLen, uncomprLen; +{ + int err; + z_stream d_stream; /* decompression stream */ + + strcpy((char*)uncompr, "garbage"); + + d_stream.zalloc = (alloc_func)0; + d_stream.zfree = (free_func)0; + d_stream.opaque = (voidpf)0; + + d_stream.next_in = compr; + d_stream.avail_in = 2; /* just read the zlib header */ + + err = inflateInit(&d_stream); + CHECK_ERR(err, "inflateInit"); + + d_stream.next_out = uncompr; + d_stream.avail_out = (uInt)uncomprLen; + + inflate(&d_stream, Z_NO_FLUSH); + CHECK_ERR(err, "inflate"); + + d_stream.avail_in = (uInt)comprLen-2; /* read all compressed data */ + err = inflateSync(&d_stream); /* but skip the damaged part */ + CHECK_ERR(err, "inflateSync"); + + err = inflate(&d_stream, Z_FINISH); + if (err != Z_DATA_ERROR) { + fprintf(stderr, "inflate should report DATA_ERROR\n"); + /* Because of incorrect adler32 */ + exit(1); + } + err = inflateEnd(&d_stream); + CHECK_ERR(err, "inflateEnd"); + + printf("after inflateSync(): hel%s\n", (char *)uncompr); +} + +/* =========================================================================== + * Test deflate() with preset dictionary + */ +void test_dict_deflate(compr, comprLen) + Byte *compr; + uLong comprLen; +{ + z_stream c_stream; /* compression stream */ + int err; + + c_stream.zalloc = (alloc_func)0; + c_stream.zfree = (free_func)0; + c_stream.opaque = (voidpf)0; + + err = deflateInit(&c_stream, Z_BEST_COMPRESSION); + CHECK_ERR(err, "deflateInit"); + + err = deflateSetDictionary(&c_stream, + (const Bytef*)dictionary, sizeof(dictionary)); + CHECK_ERR(err, "deflateSetDictionary"); + + dictId = c_stream.adler; + c_stream.next_out = compr; + c_stream.avail_out = (uInt)comprLen; + + c_stream.next_in = (Bytef*)hello; + c_stream.avail_in = (uInt)strlen(hello)+1; + + err = deflate(&c_stream, Z_FINISH); + if (err != Z_STREAM_END) { + fprintf(stderr, "deflate should report Z_STREAM_END\n"); + exit(1); + } + err = deflateEnd(&c_stream); + CHECK_ERR(err, "deflateEnd"); +} + +/* =========================================================================== + * Test inflate() with a preset dictionary + */ +void test_dict_inflate(compr, comprLen, uncompr, uncomprLen) + Byte *compr, *uncompr; + uLong comprLen, uncomprLen; +{ + int err; + z_stream d_stream; /* decompression stream */ + + strcpy((char*)uncompr, "garbage"); + + d_stream.zalloc = (alloc_func)0; + d_stream.zfree = (free_func)0; + d_stream.opaque = (voidpf)0; + + d_stream.next_in = compr; + d_stream.avail_in = (uInt)comprLen; + + err = inflateInit(&d_stream); + CHECK_ERR(err, "inflateInit"); + + d_stream.next_out = uncompr; + d_stream.avail_out = (uInt)uncomprLen; + + for (;;) { + err = inflate(&d_stream, Z_NO_FLUSH); + if (err == Z_STREAM_END) break; + if (err == Z_NEED_DICT) { + if (d_stream.adler != dictId) { + fprintf(stderr, "unexpected dictionary"); + exit(1); + } + err = inflateSetDictionary(&d_stream, (const Bytef*)dictionary, + sizeof(dictionary)); + } + CHECK_ERR(err, "inflate with dict"); + } + + err = inflateEnd(&d_stream); + CHECK_ERR(err, "inflateEnd"); + + if (strcmp((char*)uncompr, hello)) { + fprintf(stderr, "bad inflate with dict\n"); + exit(1); + } else { + printf("inflate with dictionary: %s\n", (char *)uncompr); + } +} + +/* =========================================================================== + * Usage: example [output.gz [input.gz]] + */ + +int main(argc, argv) + int argc; + char *argv[]; +{ + Byte *compr, *uncompr; + uLong comprLen = 10000*sizeof(int); /* don't overflow on MSDOS */ + uLong uncomprLen = comprLen; + static const char* myVersion = ZLIB_VERSION; + + if (zlibVersion()[0] != myVersion[0]) { + fprintf(stderr, "incompatible zlib version\n"); + exit(1); + + } else if (strcmp(zlibVersion(), ZLIB_VERSION) != 0) { + fprintf(stderr, "warning: different zlib version\n"); + } + + compr = (Byte*)calloc((uInt)comprLen, 1); + uncompr = (Byte*)calloc((uInt)uncomprLen, 1); + /* compr and uncompr are cleared to avoid reading uninitialized + * data and to ensure that uncompr compresses well. + */ + if (compr == Z_NULL || uncompr == Z_NULL) { + printf("out of memory\n"); + exit(1); + } + test_compress(compr, comprLen, uncompr, uncomprLen); + + test_gzio((argc > 1 ? argv[1] : TESTFILE), + (argc > 2 ? argv[2] : TESTFILE), + uncompr, (int)uncomprLen); + + test_deflate(compr, comprLen); + test_inflate(compr, comprLen, uncompr, uncomprLen); + + test_large_deflate(compr, comprLen, uncompr, uncomprLen); + test_large_inflate(compr, comprLen, uncompr, uncomprLen); + + test_flush(compr, &comprLen); + test_sync(compr, comprLen, uncompr, uncomprLen); + comprLen = uncomprLen; + + test_dict_deflate(compr, comprLen); + test_dict_inflate(compr, comprLen, uncompr, uncomprLen); + + exit(0); + return 0; /* to avoid warning */ +} diff --git a/packages/services/compress/zlib/current/src/gzio.c b/packages/services/compress/zlib/current/src/gzio.c new file mode 100644 --- /dev/null +++ b/packages/services/compress/zlib/current/src/gzio.c @@ -0,0 +1,875 @@ +/* gzio.c -- IO on .gz files + * Copyright (C) 1995-1998 Jean-loup Gailly. + * For conditions of distribution and use, see copyright notice in zlib.h + * + * Compile this file with -DNO_DEFLATE to avoid the compression code. + */ + +/* @(#) $Id$ */ + +#include + +#include "zutil.h" + +struct internal_state {int dummy;}; /* for buggy compilers */ + +#ifndef Z_BUFSIZE +# ifdef MAXSEG_64K +# define Z_BUFSIZE 4096 /* minimize memory usage for 16-bit DOS */ +# else +# define Z_BUFSIZE 16384 +# endif +#endif +#ifndef Z_PRINTF_BUFSIZE +# define Z_PRINTF_BUFSIZE 4096 +#endif + +#define ALLOC(size) malloc(size) +#define TRYFREE(p) {if (p) free(p);} + +static int gz_magic[2] = {0x1f, 0x8b}; /* gzip magic header */ + +/* gzip flag byte */ +#define ASCII_FLAG 0x01 /* bit 0 set: file probably ascii text */ +#define HEAD_CRC 0x02 /* bit 1 set: header CRC present */ +#define EXTRA_FIELD 0x04 /* bit 2 set: extra field present */ +#define ORIG_NAME 0x08 /* bit 3 set: original file name present */ +#define COMMENT 0x10 /* bit 4 set: file comment present */ +#define RESERVED 0xE0 /* bits 5..7: reserved */ + +typedef struct gz_stream { + z_stream stream; + int z_err; /* error code for last stream operation */ + int z_eof; /* set if end of input file */ + FILE *file; /* .gz file */ + Byte *inbuf; /* input buffer */ + Byte *outbuf; /* output buffer */ + uLong crc; /* crc32 of uncompressed data */ + char *msg; /* error message */ + char *path; /* path name for debugging only */ + int transparent; /* 1 if input file is not a .gz file */ + char mode; /* 'w' or 'r' */ + long startpos; /* start of compressed data in file (header skipped) */ +} gz_stream; + + +local gzFile gz_open OF((const char *path, const char *mode, int fd)); +local int do_flush OF((gzFile file, int flush)); +local int get_byte OF((gz_stream *s)); +local void check_header OF((gz_stream *s)); +local int destroy OF((gz_stream *s)); +local void putLong OF((FILE *file, uLong x)); +local uLong getLong OF((gz_stream *s)); + +/* =========================================================================== + Opens a gzip (.gz) file for reading or writing. The mode parameter + is as in fopen ("rb" or "wb"). The file is given either by file descriptor + or path name (if fd == -1). + gz_open return NULL if the file could not be opened or if there was + insufficient memory to allocate the (de)compression state; errno + can be checked to distinguish the two cases (if errno is zero, the + zlib error is Z_MEM_ERROR). +*/ +local gzFile gz_open (path, mode, fd) + const char *path; + const char *mode; + int fd; +{ + int err; + int level = Z_DEFAULT_COMPRESSION; /* compression level */ + int strategy = Z_DEFAULT_STRATEGY; /* compression strategy */ + char *p = (char*)mode; + gz_stream *s; + char fmode[80]; /* copy of mode, without the compression level */ + char *m = fmode; + + if (!path || !mode) return Z_NULL; + + s = (gz_stream *)ALLOC(sizeof(gz_stream)); + if (!s) return Z_NULL; + + s->stream.zalloc = (alloc_func)0; + s->stream.zfree = (free_func)0; + s->stream.opaque = (voidpf)0; + s->stream.next_in = s->inbuf = Z_NULL; + s->stream.next_out = s->outbuf = Z_NULL; + s->stream.avail_in = s->stream.avail_out = 0; + s->file = NULL; + s->z_err = Z_OK; + s->z_eof = 0; + s->crc = crc32(0L, Z_NULL, 0); + s->msg = NULL; + s->transparent = 0; + + s->path = (char*)ALLOC(strlen(path)+1); + if (s->path == NULL) { + return destroy(s), (gzFile)Z_NULL; + } + strcpy(s->path, path); /* do this early for debugging */ + + s->mode = '\0'; + do { + if (*p == 'r') s->mode = 'r'; + if (*p == 'w' || *p == 'a') s->mode = 'w'; + if (*p >= '0' && *p <= '9') { + level = *p - '0'; + } else if (*p == 'f') { + strategy = Z_FILTERED; + } else if (*p == 'h') { + strategy = Z_HUFFMAN_ONLY; + } else { + *m++ = *p; /* copy the mode */ + } + } while (*p++ && m != fmode + sizeof(fmode)); + if (s->mode == '\0') return destroy(s), (gzFile)Z_NULL; + + if (s->mode == 'w') { +#ifdef NO_DEFLATE + err = Z_STREAM_ERROR; +#else + err = deflateInit2(&(s->stream), level, + Z_DEFLATED, -MAX_WBITS, DEF_MEM_LEVEL, strategy); + /* windowBits is passed < 0 to suppress zlib header */ + + s->stream.next_out = s->outbuf = (Byte*)ALLOC(Z_BUFSIZE); +#endif + if (err != Z_OK || s->outbuf == Z_NULL) { + return destroy(s), (gzFile)Z_NULL; + } + } else { + s->stream.next_in = s->inbuf = (Byte*)ALLOC(Z_BUFSIZE); + + err = inflateInit2(&(s->stream), -MAX_WBITS); + /* windowBits is passed < 0 to tell that there is no zlib header. + * Note that in this case inflate *requires* an extra "dummy" byte + * after the compressed stream in order to complete decompression and + * return Z_STREAM_END. Here the gzip CRC32 ensures that 4 bytes are + * present after the compressed stream. + */ + if (err != Z_OK || s->inbuf == Z_NULL) { + return destroy(s), (gzFile)Z_NULL; + } + } + s->stream.avail_out = Z_BUFSIZE; + + errno = 0; + s->file = fd < 0 ? F_OPEN(path, fmode) : (FILE*)fdopen(fd, fmode); + + if (s->file == NULL) { + return destroy(s), (gzFile)Z_NULL; + } + if (s->mode == 'w') { + /* Write a very simple .gz header: + */ + fprintf(s->file, "%c%c%c%c%c%c%c%c%c%c", gz_magic[0], gz_magic[1], + Z_DEFLATED, 0 /*flags*/, 0,0,0,0 /*time*/, 0 /*xflags*/, OS_CODE); + s->startpos = 10L; + /* We use 10L instead of ftell(s->file) to because ftell causes an + * fflush on some systems. This version of the library doesn't use + * startpos anyway in write mode, so this initialization is not + * necessary. + */ + } else { + check_header(s); /* skip the .gz header */ + s->startpos = (ftell(s->file) - s->stream.avail_in); + } + + return (gzFile)s; +} + +/* =========================================================================== + Opens a gzip (.gz) file for reading or writing. +*/ +gzFile ZEXPORT gzopen (path, mode) + const char *path; + const char *mode; +{ + return gz_open (path, mode, -1); +} + +/* =========================================================================== + Associate a gzFile with the file descriptor fd. fd is not dup'ed here + to mimic the behavio(u)r of fdopen. +*/ +gzFile ZEXPORT gzdopen (fd, mode) + int fd; + const char *mode; +{ + char name[20]; + + if (fd < 0) return (gzFile)Z_NULL; + sprintf(name, "", fd); /* for debugging */ + + return gz_open (name, mode, fd); +} + +/* =========================================================================== + * Update the compression level and strategy + */ +int ZEXPORT gzsetparams (file, level, strategy) + gzFile file; + int level; + int strategy; +{ + gz_stream *s = (gz_stream*)file; + + if (s == NULL || s->mode != 'w') return Z_STREAM_ERROR; + + /* Make room to allow flushing */ + if (s->stream.avail_out == 0) { + + s->stream.next_out = s->outbuf; + if (fwrite(s->outbuf, 1, Z_BUFSIZE, s->file) != Z_BUFSIZE) { + s->z_err = Z_ERRNO; + } + s->stream.avail_out = Z_BUFSIZE; + } + + return deflateParams (&(s->stream), level, strategy); +} + +/* =========================================================================== + Read a byte from a gz_stream; update next_in and avail_in. Return EOF + for end of file. + IN assertion: the stream s has been sucessfully opened for reading. +*/ +local int get_byte(s) + gz_stream *s; +{ + if (s->z_eof) return EOF; + if (s->stream.avail_in == 0) { + errno = 0; + s->stream.avail_in = fread(s->inbuf, 1, Z_BUFSIZE, s->file); + if (s->stream.avail_in == 0) { + s->z_eof = 1; + if (ferror(s->file)) s->z_err = Z_ERRNO; + return EOF; + } + s->stream.next_in = s->inbuf; + } + s->stream.avail_in--; + return *(s->stream.next_in)++; +} + +/* =========================================================================== + Check the gzip header of a gz_stream opened for reading. Set the stream + mode to transparent if the gzip magic header is not present; set s->err + to Z_DATA_ERROR if the magic header is present but the rest of the header + is incorrect. + IN assertion: the stream s has already been created sucessfully; + s->stream.avail_in is zero for the first time, but may be non-zero + for concatenated .gz files. +*/ +local void check_header(s) + gz_stream *s; +{ + int method; /* method byte */ + int flags; /* flags byte */ + uInt len; + int c; + + /* Check the gzip magic header */ + for (len = 0; len < 2; len++) { + c = get_byte(s); + if (c != gz_magic[len]) { + if (len != 0) s->stream.avail_in++, s->stream.next_in--; + if (c != EOF) { + s->stream.avail_in++, s->stream.next_in--; + s->transparent = 1; + } + s->z_err = s->stream.avail_in != 0 ? Z_OK : Z_STREAM_END; + return; + } + } + method = get_byte(s); + flags = get_byte(s); + if (method != Z_DEFLATED || (flags & RESERVED) != 0) { + s->z_err = Z_DATA_ERROR; + return; + } + + /* Discard time, xflags and OS code: */ + for (len = 0; len < 6; len++) (void)get_byte(s); + + if ((flags & EXTRA_FIELD) != 0) { /* skip the extra field */ + len = (uInt)get_byte(s); + len += ((uInt)get_byte(s))<<8; + /* len is garbage if EOF but the loop below will quit anyway */ + while (len-- != 0 && get_byte(s) != EOF) ; + } + if ((flags & ORIG_NAME) != 0) { /* skip the original file name */ + while ((c = get_byte(s)) != 0 && c != EOF) ; + } + if ((flags & COMMENT) != 0) { /* skip the .gz file comment */ + while ((c = get_byte(s)) != 0 && c != EOF) ; + } + if ((flags & HEAD_CRC) != 0) { /* skip the header crc */ + for (len = 0; len < 2; len++) (void)get_byte(s); + } + s->z_err = s->z_eof ? Z_DATA_ERROR : Z_OK; +} + + /* =========================================================================== + * Cleanup then free the given gz_stream. Return a zlib error code. + Try freeing in the reverse order of allocations. + */ +local int destroy (s) + gz_stream *s; +{ + int err = Z_OK; + + if (!s) return Z_STREAM_ERROR; + + TRYFREE(s->msg); + + if (s->stream.state != NULL) { + if (s->mode == 'w') { +#ifdef NO_DEFLATE + err = Z_STREAM_ERROR; +#else + err = deflateEnd(&(s->stream)); +#endif + } else if (s->mode == 'r') { + err = inflateEnd(&(s->stream)); + } + } + if (s->file != NULL && fclose(s->file)) { +#ifdef ESPIPE + if (errno != ESPIPE) /* fclose is broken for pipes in HP/UX */ +#endif + err = Z_ERRNO; + } + if (s->z_err < 0) err = s->z_err; + + TRYFREE(s->inbuf); + TRYFREE(s->outbuf); + TRYFREE(s->path); + TRYFREE(s); + return err; +} + +/* =========================================================================== + Reads the given number of uncompressed bytes from the compressed file. + gzread returns the number of bytes actually read (0 for end of file). +*/ +int ZEXPORT gzread (file, buf, len) + gzFile file; + voidp buf; + unsigned len; +{ + gz_stream *s = (gz_stream*)file; + Bytef *start = (Bytef*)buf; /* starting point for crc computation */ + Byte *next_out; /* == stream.next_out but not forced far (for MSDOS) */ + + if (s == NULL || s->mode != 'r') return Z_STREAM_ERROR; + + if (s->z_err == Z_DATA_ERROR || s->z_err == Z_ERRNO) return -1; + if (s->z_err == Z_STREAM_END) return 0; /* EOF */ + + next_out = (Byte*)buf; + s->stream.next_out = (Bytef*)buf; + s->stream.avail_out = len; + + while (s->stream.avail_out != 0) { + + if (s->transparent) { + /* Copy first the lookahead bytes: */ + uInt n = s->stream.avail_in; + if (n > s->stream.avail_out) n = s->stream.avail_out; + if (n > 0) { + zmemcpy(s->stream.next_out, s->stream.next_in, n); + next_out += n; + s->stream.next_out = next_out; + s->stream.next_in += n; + s->stream.avail_out -= n; + s->stream.avail_in -= n; + } + if (s->stream.avail_out > 0) { + s->stream.avail_out -= fread(next_out, 1, s->stream.avail_out, + s->file); + } + len -= s->stream.avail_out; + s->stream.total_in += (uLong)len; + s->stream.total_out += (uLong)len; + if (len == 0) s->z_eof = 1; + return (int)len; + } + if (s->stream.avail_in == 0 && !s->z_eof) { + + errno = 0; + s->stream.avail_in = fread(s->inbuf, 1, Z_BUFSIZE, s->file); + if (s->stream.avail_in == 0) { + s->z_eof = 1; + if (ferror(s->file)) { + s->z_err = Z_ERRNO; + break; + } + } + s->stream.next_in = s->inbuf; + } + s->z_err = inflate(&(s->stream), Z_NO_FLUSH); + + if (s->z_err == Z_STREAM_END) { + /* Check CRC and original size */ + s->crc = crc32(s->crc, start, (uInt)(s->stream.next_out - start)); + start = s->stream.next_out; + + if (getLong(s) != s->crc) { + s->z_err = Z_DATA_ERROR; + } else { + (void)getLong(s); + /* The uncompressed length returned by above getlong() may + * be different from s->stream.total_out) in case of + * concatenated .gz files. Check for such files: + */ + check_header(s); + if (s->z_err == Z_OK) { + uLong total_in = s->stream.total_in; + uLong total_out = s->stream.total_out; + + inflateReset(&(s->stream)); + s->stream.total_in = total_in; + s->stream.total_out = total_out; + s->crc = crc32(0L, Z_NULL, 0); + } + } + } + if (s->z_err != Z_OK || s->z_eof) break; + } + s->crc = crc32(s->crc, start, (uInt)(s->stream.next_out - start)); + + return (int)(len - s->stream.avail_out); +} + + +/* =========================================================================== + Reads one byte from the compressed file. gzgetc returns this byte + or -1 in case of end of file or error. +*/ +int ZEXPORT gzgetc(file) + gzFile file; +{ + unsigned char c; + + return gzread(file, &c, 1) == 1 ? c : -1; +} + + +/* =========================================================================== + Reads bytes from the compressed file until len-1 characters are + read, or a newline character is read and transferred to buf, or an + end-of-file condition is encountered. The string is then terminated + with a null character. + gzgets returns buf, or Z_NULL in case of error. + + The current implementation is not optimized at all. +*/ +char * ZEXPORT gzgets(file, buf, len) + gzFile file; + char *buf; + int len; +{ + char *b = buf; + if (buf == Z_NULL || len <= 0) return Z_NULL; + + while (--len > 0 && gzread(file, buf, 1) == 1 && *buf++ != '\n') ; + *buf = '\0'; + return b == buf && len > 0 ? Z_NULL : b; +} + + +#ifndef NO_DEFLATE +/* =========================================================================== + Writes the given number of uncompressed bytes into the compressed file. + gzwrite returns the number of bytes actually written (0 in case of error). +*/ +int ZEXPORT gzwrite (file, buf, len) + gzFile file; + const voidp buf; + unsigned len; +{ + gz_stream *s = (gz_stream*)file; + + if (s == NULL || s->mode != 'w') return Z_STREAM_ERROR; + + s->stream.next_in = (Bytef*)buf; + s->stream.avail_in = len; + + while (s->stream.avail_in != 0) { + + if (s->stream.avail_out == 0) { + + s->stream.next_out = s->outbuf; + if (fwrite(s->outbuf, 1, Z_BUFSIZE, s->file) != Z_BUFSIZE) { + s->z_err = Z_ERRNO; + break; + } + s->stream.avail_out = Z_BUFSIZE; + } + s->z_err = deflate(&(s->stream), Z_NO_FLUSH); + if (s->z_err != Z_OK) break; + } + s->crc = crc32(s->crc, (const Bytef *)buf, len); + + return (int)(len - s->stream.avail_in); +} + +/* =========================================================================== + Converts, formats, and writes the args to the compressed file under + control of the format string, as in fprintf. gzprintf returns the number of + uncompressed bytes actually written (0 in case of error). +*/ +#ifdef STDC +#include + +int ZEXPORTVA gzprintf (gzFile file, const char *format, /* args */ ...) +{ + char buf[Z_PRINTF_BUFSIZE]; + va_list va; + int len; + + va_start(va, format); +#ifdef HAS_vsnprintf + (void)vsnprintf(buf, sizeof(buf), format, va); +#else + (void)vsprintf(buf, format, va); +#endif + va_end(va); + len = strlen(buf); /* some *sprintf don't return the nb of bytes written */ + if (len <= 0) return 0; + + return gzwrite(file, buf, (unsigned)len); +} +#else /* not ANSI C */ + +int ZEXPORTVA gzprintf (file, format, a1, a2, a3, a4, a5, a6, a7, a8, a9, a10, + a11, a12, a13, a14, a15, a16, a17, a18, a19, a20) + gzFile file; + const char *format; + int a1, a2, a3, a4, a5, a6, a7, a8, a9, a10, + a11, a12, a13, a14, a15, a16, a17, a18, a19, a20; +{ + char buf[Z_PRINTF_BUFSIZE]; + int len; + +#ifdef HAS_snprintf + snprintf(buf, sizeof(buf), format, a1, a2, a3, a4, a5, a6, a7, a8, + a9, a10, a11, a12, a13, a14, a15, a16, a17, a18, a19, a20); +#else + sprintf(buf, format, a1, a2, a3, a4, a5, a6, a7, a8, + a9, a10, a11, a12, a13, a14, a15, a16, a17, a18, a19, a20); +#endif + len = strlen(buf); /* old sprintf doesn't return the nb of bytes written */ + if (len <= 0) return 0; + + return gzwrite(file, buf, len); +} +#endif + +/* =========================================================================== + Writes c, converted to an unsigned char, into the compressed file. + gzputc returns the value that was written, or -1 in case of error. +*/ +int ZEXPORT gzputc(file, c) + gzFile file; + int c; +{ + unsigned char cc = (unsigned char) c; /* required for big endian systems */ + + return gzwrite(file, &cc, 1) == 1 ? (int)cc : -1; +} + + +/* =========================================================================== + Writes the given null-terminated string to the compressed file, excluding + the terminating null character. + gzputs returns the number of characters written, or -1 in case of error. +*/ +int ZEXPORT gzputs(file, s) + gzFile file; + const char *s; +{ + return gzwrite(file, (char*)s, (unsigned)strlen(s)); +} + + +/* =========================================================================== + Flushes all pending output into the compressed file. The parameter + flush is as in the deflate() function. +*/ +local int do_flush (file, flush) + gzFile file; + int flush; +{ + uInt len; + int done = 0; + gz_stream *s = (gz_stream*)file; + + if (s == NULL || s->mode != 'w') return Z_STREAM_ERROR; + + s->stream.avail_in = 0; /* should be zero already anyway */ + + for (;;) { + len = Z_BUFSIZE - s->stream.avail_out; + + if (len != 0) { + if ((uInt)fwrite(s->outbuf, 1, len, s->file) != len) { + s->z_err = Z_ERRNO; + return Z_ERRNO; + } + s->stream.next_out = s->outbuf; + s->stream.avail_out = Z_BUFSIZE; + } + if (done) break; + s->z_err = deflate(&(s->stream), flush); + + /* Ignore the second of two consecutive flushes: */ + if (len == 0 && s->z_err == Z_BUF_ERROR) s->z_err = Z_OK; + + /* deflate has finished flushing only when it hasn't used up + * all the available space in the output buffer: + */ + done = (s->stream.avail_out != 0 || s->z_err == Z_STREAM_END); + + if (s->z_err != Z_OK && s->z_err != Z_STREAM_END) break; + } + return s->z_err == Z_STREAM_END ? Z_OK : s->z_err; +} + +int ZEXPORT gzflush (file, flush) + gzFile file; + int flush; +{ + gz_stream *s = (gz_stream*)file; + int err = do_flush (file, flush); + + if (err) return err; + fflush(s->file); + return s->z_err == Z_STREAM_END ? Z_OK : s->z_err; +} +#endif /* NO_DEFLATE */ + +/* =========================================================================== + Sets the starting position for the next gzread or gzwrite on the given + compressed file. The offset represents a number of bytes in the + gzseek returns the resulting offset location as measured in bytes from + the beginning of the uncompressed stream, or -1 in case of error. + SEEK_END is not implemented, returns error. + In this version of the library, gzseek can be extremely slow. +*/ +z_off_t ZEXPORT gzseek (file, offset, whence) + gzFile file; + z_off_t offset; + int whence; +{ + gz_stream *s = (gz_stream*)file; + + if (s == NULL || whence == SEEK_END || + s->z_err == Z_ERRNO || s->z_err == Z_DATA_ERROR) { + return -1L; + } + + if (s->mode == 'w') { +#ifdef NO_DEFLATE + return -1L; +#else + if (whence == SEEK_SET) { + offset -= s->stream.total_in; + } + if (offset < 0) return -1L; + + /* At this point, offset is the number of zero bytes to write. */ + if (s->inbuf == Z_NULL) { + s->inbuf = (Byte*)ALLOC(Z_BUFSIZE); /* for seeking */ + zmemzero(s->inbuf, Z_BUFSIZE); + } + while (offset > 0) { + uInt size = Z_BUFSIZE; + if (offset < Z_BUFSIZE) size = (uInt)offset; + + size = gzwrite(file, s->inbuf, size); + if (size == 0) return -1L; + + offset -= size; + } + return (z_off_t)s->stream.total_in; +#endif + } + /* Rest of function is for reading only */ + + /* compute absolute position */ + if (whence == SEEK_CUR) { + offset += s->stream.total_out; + } + if (offset < 0) return -1L; + + if (s->transparent) { + /* map to fseek */ + s->stream.avail_in = 0; + s->stream.next_in = s->inbuf; + if (fseek(s->file, offset, SEEK_SET) < 0) return -1L; + + s->stream.total_in = s->stream.total_out = (uLong)offset; + return offset; + } + + /* For a negative seek, rewind and use positive seek */ + if ((uLong)offset >= s->stream.total_out) { + offset -= s->stream.total_out; + } else if (gzrewind(file) < 0) { + return -1L; + } + /* offset is now the number of bytes to skip. */ + + if (offset != 0 && s->outbuf == Z_NULL) { + s->outbuf = (Byte*)ALLOC(Z_BUFSIZE); + } + while (offset > 0) { + int size = Z_BUFSIZE; + if (offset < Z_BUFSIZE) size = (int)offset; + + size = gzread(file, s->outbuf, (uInt)size); + if (size <= 0) return -1L; + offset -= size; + } + return (z_off_t)s->stream.total_out; +} + +/* =========================================================================== + Rewinds input file. +*/ +int ZEXPORT gzrewind (file) + gzFile file; +{ + gz_stream *s = (gz_stream*)file; + + if (s == NULL || s->mode != 'r') return -1; + + s->z_err = Z_OK; + s->z_eof = 0; + s->stream.avail_in = 0; + s->stream.next_in = s->inbuf; + s->crc = crc32(0L, Z_NULL, 0); + + if (s->startpos == 0) { /* not a compressed file */ + rewind(s->file); + return 0; + } + + (void) inflateReset(&s->stream); + return fseek(s->file, s->startpos, SEEK_SET); +} + +/* =========================================================================== + Returns the starting position for the next gzread or gzwrite on the + given compressed file. This position represents a number of bytes in the + uncompressed data stream. +*/ +z_off_t ZEXPORT gztell (file) + gzFile file; +{ + return gzseek(file, 0L, SEEK_CUR); +} + +/* =========================================================================== + Returns 1 when EOF has previously been detected reading the given + input stream, otherwise zero. +*/ +int ZEXPORT gzeof (file) + gzFile file; +{ + gz_stream *s = (gz_stream*)file; + + return (s == NULL || s->mode != 'r') ? 0 : s->z_eof; +} + +/* =========================================================================== + Outputs a long in LSB order to the given file +*/ +local void putLong (file, x) + FILE *file; + uLong x; +{ + int n; + for (n = 0; n < 4; n++) { + fputc((int)(x & 0xff), file); + x >>= 8; + } +} + +/* =========================================================================== + Reads a long in LSB order from the given gz_stream. Sets z_err in case + of error. +*/ +local uLong getLong (s) + gz_stream *s; +{ + uLong x = (uLong)get_byte(s); + int c; + + x += ((uLong)get_byte(s))<<8; + x += ((uLong)get_byte(s))<<16; + c = get_byte(s); + if (c == EOF) s->z_err = Z_DATA_ERROR; + x += ((uLong)c)<<24; + return x; +} + +/* =========================================================================== + Flushes all pending output if necessary, closes the compressed file + and deallocates all the (de)compression state. +*/ +int ZEXPORT gzclose (file) + gzFile file; +{ + int err; + gz_stream *s = (gz_stream*)file; + + if (s == NULL) return Z_STREAM_ERROR; + + if (s->mode == 'w') { +#ifdef NO_DEFLATE + return Z_STREAM_ERROR; +#else + err = do_flush (file, Z_FINISH); + if (err != Z_OK) return destroy((gz_stream*)file); + + putLong (s->file, s->crc); + putLong (s->file, s->stream.total_in); +#endif + } + return destroy((gz_stream*)file); +} + +/* =========================================================================== + Returns the error message for the last error which occured on the + given compressed file. errnum is set to zlib error number. If an + error occured in the file system and not in the compression library, + errnum is set to Z_ERRNO and the application may consult errno + to get the exact error code. +*/ +const char* ZEXPORT gzerror (file, errnum) + gzFile file; + int *errnum; +{ + char *m; + gz_stream *s = (gz_stream*)file; + + if (s == NULL) { + *errnum = Z_STREAM_ERROR; + return (const char*)ERR_MSG(Z_STREAM_ERROR); + } + *errnum = s->z_err; + if (*errnum == Z_OK) return (const char*)""; + + m = (char*)(*errnum == Z_ERRNO ? zstrerror(errno) : s->stream.msg); + + if (m == NULL || *m == '\0') m = (char*)ERR_MSG(s->z_err); + + TRYFREE(s->msg); + s->msg = (char*)ALLOC(strlen(s->path) + strlen(m) + 3); + strcpy(s->msg, s->path); + strcat(s->msg, ": "); + strcat(s->msg, m); + return (const char*)s->msg; +} diff --git a/packages/services/compress/zlib/current/src/infblock.c b/packages/services/compress/zlib/current/src/infblock.c new file mode 100644 --- /dev/null +++ b/packages/services/compress/zlib/current/src/infblock.c @@ -0,0 +1,398 @@ +/* infblock.c -- interpret and process block types to last block + * Copyright (C) 1995-1998 Mark Adler + * For conditions of distribution and use, see copyright notice in zlib.h + */ + +#include "zutil.h" +#include "infblock.h" +#include "inftrees.h" +#include "infcodes.h" +#include "infutil.h" + +struct inflate_codes_state {int dummy;}; /* for buggy compilers */ + +/* simplify the use of the inflate_huft type with some defines */ +#define exop word.what.Exop +#define bits word.what.Bits + +/* Table for deflate from PKZIP's appnote.txt. */ +local const uInt border[] = { /* Order of the bit length code lengths */ + 16, 17, 18, 0, 8, 7, 9, 6, 10, 5, 11, 4, 12, 3, 13, 2, 14, 1, 15}; + +/* + Notes beyond the 1.93a appnote.txt: + + 1. Distance pointers never point before the beginning of the output + stream. + 2. Distance pointers can point back across blocks, up to 32k away. + 3. There is an implied maximum of 7 bits for the bit length table and + 15 bits for the actual data. + 4. If only one code exists, then it is encoded using one bit. (Zero + would be more efficient, but perhaps a little confusing.) If two + codes exist, they are coded using one bit each (0 and 1). + 5. There is no way of sending zero distance codes--a dummy must be + sent if there are none. (History: a pre 2.0 version of PKZIP would + store blocks with no distance codes, but this was discovered to be + too harsh a criterion.) Valid only for 1.93a. 2.04c does allow + zero distance codes, which is sent as one code of zero bits in + length. + 6. There are up to 286 literal/length codes. Code 256 represents the + end-of-block. Note however that the static length tree defines + 288 codes just to fill out the Huffman codes. Codes 286 and 287 + cannot be used though, since there is no length base or extra bits + defined for them. Similarily, there are up to 30 distance codes. + However, static trees define 32 codes (all 5 bits) to fill out the + Huffman codes, but the last two had better not show up in the data. + 7. Unzip can check dynamic Huffman blocks for complete code sets. + The exception is that a single code would not be complete (see #4). + 8. The five bits following the block type is really the number of + literal codes sent minus 257. + 9. Length codes 8,16,16 are interpreted as 13 length codes of 8 bits + (1+6+6). Therefore, to output three times the length, you output + three codes (1+1+1), whereas to output four times the same length, + you only need two codes (1+3). Hmm. + 10. In the tree reconstruction algorithm, Code = Code + Increment + only if BitLength(i) is not zero. (Pretty obvious.) + 11. Correction: 4 Bits: # of Bit Length codes - 4 (4 - 19) + 12. Note: length code 284 can represent 227-258, but length code 285 + really is 258. The last length deserves its own, short code + since it gets used a lot in very redundant files. The length + 258 is special since 258 - 3 (the min match length) is 255. + 13. The literal/length and distance code bit lengths are read as a + single stream of lengths. It is possible (and advantageous) for + a repeat code (16, 17, or 18) to go across the boundary between + the two sets of lengths. + */ + + +void inflate_blocks_reset(s, z, c) +inflate_blocks_statef *s; +z_streamp z; +uLongf *c; +{ + if (c != Z_NULL) + *c = s->check; + if (s->mode == BTREE || s->mode == DTREE) + ZFREE(z, s->sub.trees.blens); + if (s->mode == CODES) + inflate_codes_free(s->sub.decode.codes, z); + s->mode = TYPE; + s->bitk = 0; + s->bitb = 0; + s->read = s->write = s->window; + if (s->checkfn != Z_NULL) + z->adler = s->check = (*s->checkfn)(0L, (const Bytef *)Z_NULL, 0); + Tracev((stderr, "inflate: blocks reset\n")); +} + + +inflate_blocks_statef *inflate_blocks_new(z, c, w) +z_streamp z; +check_func c; +uInt w; +{ + inflate_blocks_statef *s; + + if ((s = (inflate_blocks_statef *)ZALLOC + (z,1,sizeof(struct inflate_blocks_state))) == Z_NULL) + return s; + if ((s->hufts = + (inflate_huft *)ZALLOC(z, sizeof(inflate_huft), MANY)) == Z_NULL) + { + ZFREE(z, s); + return Z_NULL; + } + if ((s->window = (Bytef *)ZALLOC(z, 1, w)) == Z_NULL) + { + ZFREE(z, s->hufts); + ZFREE(z, s); + return Z_NULL; + } + s->end = s->window + w; + s->checkfn = c; + s->mode = TYPE; + Tracev((stderr, "inflate: blocks allocated\n")); + inflate_blocks_reset(s, z, Z_NULL); + return s; +} + + +int inflate_blocks(s, z, r) +inflate_blocks_statef *s; +z_streamp z; +int r; +{ + uInt t; /* temporary storage */ + uLong b; /* bit buffer */ + uInt k; /* bits in bit buffer */ + Bytef *p; /* input data pointer */ + uInt n; /* bytes available there */ + Bytef *q; /* output window write pointer */ + uInt m; /* bytes to end of window or read pointer */ + + /* copy input/output information to locals (UPDATE macro restores) */ + LOAD + + /* process input based on current state */ + while (1) switch (s->mode) + { + case TYPE: + NEEDBITS(3) + t = (uInt)b & 7; + s->last = t & 1; + switch (t >> 1) + { + case 0: /* stored */ + Tracev((stderr, "inflate: stored block%s\n", + s->last ? " (last)" : "")); + DUMPBITS(3) + t = k & 7; /* go to byte boundary */ + DUMPBITS(t) + s->mode = LENS; /* get length of stored block */ + break; + case 1: /* fixed */ + Tracev((stderr, "inflate: fixed codes block%s\n", + s->last ? " (last)" : "")); + { + uInt bl, bd; + inflate_huft *tl, *td; + + inflate_trees_fixed(&bl, &bd, &tl, &td, z); + s->sub.decode.codes = inflate_codes_new(bl, bd, tl, td, z); + if (s->sub.decode.codes == Z_NULL) + { + r = Z_MEM_ERROR; + LEAVE + } + } + DUMPBITS(3) + s->mode = CODES; + break; + case 2: /* dynamic */ + Tracev((stderr, "inflate: dynamic codes block%s\n", + s->last ? " (last)" : "")); + DUMPBITS(3) + s->mode = TABLE; + break; + case 3: /* illegal */ + DUMPBITS(3) + s->mode = BAD; + z->msg = (char*)"invalid block type"; + r = Z_DATA_ERROR; + LEAVE + } + break; + case LENS: + NEEDBITS(32) + if ((((~b) >> 16) & 0xffff) != (b & 0xffff)) + { + s->mode = BAD; + z->msg = (char*)"invalid stored block lengths"; + r = Z_DATA_ERROR; + LEAVE + } + s->sub.left = (uInt)b & 0xffff; + b = k = 0; /* dump bits */ + Tracev((stderr, "inflate: stored length %u\n", s->sub.left)); + s->mode = s->sub.left ? STORED : (s->last ? DRY : TYPE); + break; + case STORED: + if (n == 0) + LEAVE + NEEDOUT + t = s->sub.left; + if (t > n) t = n; + if (t > m) t = m; + zmemcpy(q, p, t); + p += t; n -= t; + q += t; m -= t; + if ((s->sub.left -= t) != 0) + break; + Tracev((stderr, "inflate: stored end, %lu total out\n", + z->total_out + (q >= s->read ? q - s->read : + (s->end - s->read) + (q - s->window)))); + s->mode = s->last ? DRY : TYPE; + break; + case TABLE: + NEEDBITS(14) + s->sub.trees.table = t = (uInt)b & 0x3fff; +#ifndef PKZIP_BUG_WORKAROUND + if ((t & 0x1f) > 29 || ((t >> 5) & 0x1f) > 29) + { + s->mode = BAD; + z->msg = (char*)"too many length or distance symbols"; + r = Z_DATA_ERROR; + LEAVE + } +#endif + t = 258 + (t & 0x1f) + ((t >> 5) & 0x1f); + if ((s->sub.trees.blens = (uIntf*)ZALLOC(z, t, sizeof(uInt))) == Z_NULL) + { + r = Z_MEM_ERROR; + LEAVE + } + DUMPBITS(14) + s->sub.trees.index = 0; + Tracev((stderr, "inflate: table sizes ok\n")); + s->mode = BTREE; + case BTREE: + while (s->sub.trees.index < 4 + (s->sub.trees.table >> 10)) + { + NEEDBITS(3) + s->sub.trees.blens[border[s->sub.trees.index++]] = (uInt)b & 7; + DUMPBITS(3) + } + while (s->sub.trees.index < 19) + s->sub.trees.blens[border[s->sub.trees.index++]] = 0; + s->sub.trees.bb = 7; + t = inflate_trees_bits(s->sub.trees.blens, &s->sub.trees.bb, + &s->sub.trees.tb, s->hufts, z); + if (t != Z_OK) + { + ZFREE(z, s->sub.trees.blens); + r = t; + if (r == Z_DATA_ERROR) + s->mode = BAD; + LEAVE + } + s->sub.trees.index = 0; + Tracev((stderr, "inflate: bits tree ok\n")); + s->mode = DTREE; + case DTREE: + while (t = s->sub.trees.table, + s->sub.trees.index < 258 + (t & 0x1f) + ((t >> 5) & 0x1f)) + { + inflate_huft *h; + uInt i, j, c; + + t = s->sub.trees.bb; + NEEDBITS(t) + h = s->sub.trees.tb + ((uInt)b & inflate_mask[t]); + t = h->bits; + c = h->base; + if (c < 16) + { + DUMPBITS(t) + s->sub.trees.blens[s->sub.trees.index++] = c; + } + else /* c == 16..18 */ + { + i = c == 18 ? 7 : c - 14; + j = c == 18 ? 11 : 3; + NEEDBITS(t + i) + DUMPBITS(t) + j += (uInt)b & inflate_mask[i]; + DUMPBITS(i) + i = s->sub.trees.index; + t = s->sub.trees.table; + if (i + j > 258 + (t & 0x1f) + ((t >> 5) & 0x1f) || + (c == 16 && i < 1)) + { + ZFREE(z, s->sub.trees.blens); + s->mode = BAD; + z->msg = (char*)"invalid bit length repeat"; + r = Z_DATA_ERROR; + LEAVE + } + c = c == 16 ? s->sub.trees.blens[i - 1] : 0; + do { + s->sub.trees.blens[i++] = c; + } while (--j); + s->sub.trees.index = i; + } + } + s->sub.trees.tb = Z_NULL; + { + uInt bl, bd; + inflate_huft *tl, *td; + inflate_codes_statef *c; + + bl = 9; /* must be <= 9 for lookahead assumptions */ + bd = 6; /* must be <= 9 for lookahead assumptions */ + t = s->sub.trees.table; + t = inflate_trees_dynamic(257 + (t & 0x1f), 1 + ((t >> 5) & 0x1f), + s->sub.trees.blens, &bl, &bd, &tl, &td, + s->hufts, z); + ZFREE(z, s->sub.trees.blens); + if (t != Z_OK) + { + if (t == (uInt)Z_DATA_ERROR) + s->mode = BAD; + r = t; + LEAVE + } + Tracev((stderr, "inflate: trees ok\n")); + if ((c = inflate_codes_new(bl, bd, tl, td, z)) == Z_NULL) + { + r = Z_MEM_ERROR; + LEAVE + } + s->sub.decode.codes = c; + } + s->mode = CODES; + case CODES: + UPDATE + if ((r = inflate_codes(s, z, r)) != Z_STREAM_END) + return inflate_flush(s, z, r); + r = Z_OK; + inflate_codes_free(s->sub.decode.codes, z); + LOAD + Tracev((stderr, "inflate: codes end, %lu total out\n", + z->total_out + (q >= s->read ? q - s->read : + (s->end - s->read) + (q - s->window)))); + if (!s->last) + { + s->mode = TYPE; + break; + } + s->mode = DRY; + case DRY: + FLUSH + if (s->read != s->write) + LEAVE + s->mode = DONE; + case DONE: + r = Z_STREAM_END; + LEAVE + case BAD: + r = Z_DATA_ERROR; + LEAVE + default: + r = Z_STREAM_ERROR; + LEAVE + } +} + + +int inflate_blocks_free(s, z) +inflate_blocks_statef *s; +z_streamp z; +{ + inflate_blocks_reset(s, z, Z_NULL); + ZFREE(z, s->window); + ZFREE(z, s->hufts); + ZFREE(z, s); + Tracev((stderr, "inflate: blocks freed\n")); + return Z_OK; +} + + +void inflate_set_dictionary(s, d, n) +inflate_blocks_statef *s; +const Bytef *d; +uInt n; +{ + zmemcpy(s->window, d, n); + s->read = s->write = s->window + n; +} + + +/* Returns true if inflate is currently at the end of a block generated + * by Z_SYNC_FLUSH or Z_FULL_FLUSH. + * IN assertion: s != Z_NULL + */ +int inflate_blocks_sync_point(s) +inflate_blocks_statef *s; +{ + return s->mode == LENS; +} diff --git a/packages/services/compress/zlib/current/src/infblock.h b/packages/services/compress/zlib/current/src/infblock.h new file mode 100644 --- /dev/null +++ b/packages/services/compress/zlib/current/src/infblock.h @@ -0,0 +1,39 @@ +/* infblock.h -- header to use infblock.c + * Copyright (C) 1995-1998 Mark Adler + * For conditions of distribution and use, see copyright notice in zlib.h + */ + +/* WARNING: this file should *not* be used by applications. It is + part of the implementation of the compression library and is + subject to change. Applications should only use zlib.h. + */ + +struct inflate_blocks_state; +typedef struct inflate_blocks_state FAR inflate_blocks_statef; + +extern inflate_blocks_statef * inflate_blocks_new OF(( + z_streamp z, + check_func c, /* check function */ + uInt w)); /* window size */ + +extern int inflate_blocks OF(( + inflate_blocks_statef *, + z_streamp , + int)); /* initial return code */ + +extern void inflate_blocks_reset OF(( + inflate_blocks_statef *, + z_streamp , + uLongf *)); /* check value on output */ + +extern int inflate_blocks_free OF(( + inflate_blocks_statef *, + z_streamp)); + +extern void inflate_set_dictionary OF(( + inflate_blocks_statef *s, + const Bytef *d, /* dictionary */ + uInt n)); /* dictionary length */ + +extern int inflate_blocks_sync_point OF(( + inflate_blocks_statef *s)); diff --git a/packages/services/compress/zlib/current/src/infcodes.c b/packages/services/compress/zlib/current/src/infcodes.c new file mode 100644 --- /dev/null +++ b/packages/services/compress/zlib/current/src/infcodes.c @@ -0,0 +1,257 @@ +/* infcodes.c -- process literals and length/distance pairs + * Copyright (C) 1995-1998 Mark Adler + * For conditions of distribution and use, see copyright notice in zlib.h + */ + +#include "zutil.h" +#include "inftrees.h" +#include "infblock.h" +#include "infcodes.h" +#include "infutil.h" +#include "inffast.h" + +/* simplify the use of the inflate_huft type with some defines */ +#define exop word.what.Exop +#define bits word.what.Bits + +typedef enum { /* waiting for "i:"=input, "o:"=output, "x:"=nothing */ + START, /* x: set up for LEN */ + LEN, /* i: get length/literal/eob next */ + LENEXT, /* i: getting length extra (have base) */ + DIST, /* i: get distance next */ + DISTEXT, /* i: getting distance extra */ + COPY, /* o: copying bytes in window, waiting for space */ + LIT, /* o: got literal, waiting for output space */ + WASH, /* o: got eob, possibly still output waiting */ + END, /* x: got eob and all data flushed */ + BADCODE} /* x: got error */ +inflate_codes_mode; + +/* inflate codes private state */ +struct inflate_codes_state { + + /* mode */ + inflate_codes_mode mode; /* current inflate_codes mode */ + + /* mode dependent information */ + uInt len; + union { + struct { + inflate_huft *tree; /* pointer into tree */ + uInt need; /* bits needed */ + } code; /* if LEN or DIST, where in tree */ + uInt lit; /* if LIT, literal */ + struct { + uInt get; /* bits to get for extra */ + uInt dist; /* distance back to copy from */ + } copy; /* if EXT or COPY, where and how much */ + } sub; /* submode */ + + /* mode independent information */ + Byte lbits; /* ltree bits decoded per branch */ + Byte dbits; /* dtree bits decoder per branch */ + inflate_huft *ltree; /* literal/length/eob tree */ + inflate_huft *dtree; /* distance tree */ + +}; + + +inflate_codes_statef *inflate_codes_new(bl, bd, tl, td, z) +uInt bl, bd; +inflate_huft *tl; +inflate_huft *td; /* need separate declaration for Borland C++ */ +z_streamp z; +{ + inflate_codes_statef *c; + + if ((c = (inflate_codes_statef *) + ZALLOC(z,1,sizeof(struct inflate_codes_state))) != Z_NULL) + { + c->mode = START; + c->lbits = (Byte)bl; + c->dbits = (Byte)bd; + c->ltree = tl; + c->dtree = td; + Tracev((stderr, "inflate: codes new\n")); + } + return c; +} + + +int inflate_codes(s, z, r) +inflate_blocks_statef *s; +z_streamp z; +int r; +{ + uInt j; /* temporary storage */ + inflate_huft *t; /* temporary pointer */ + uInt e; /* extra bits or operation */ + uLong b; /* bit buffer */ + uInt k; /* bits in bit buffer */ + Bytef *p; /* input data pointer */ + uInt n; /* bytes available there */ + Bytef *q; /* output window write pointer */ + uInt m; /* bytes to end of window or read pointer */ + Bytef *f; /* pointer to copy strings from */ + inflate_codes_statef *c = s->sub.decode.codes; /* codes state */ + + /* copy input/output information to locals (UPDATE macro restores) */ + LOAD + + /* process input and output based on current state */ + while (1) switch (c->mode) + { /* waiting for "i:"=input, "o:"=output, "x:"=nothing */ + case START: /* x: set up for LEN */ +#ifndef SLOW + if (m >= 258 && n >= 10) + { + UPDATE + r = inflate_fast(c->lbits, c->dbits, c->ltree, c->dtree, s, z); + LOAD + if (r != Z_OK) + { + c->mode = r == Z_STREAM_END ? WASH : BADCODE; + break; + } + } +#endif /* !SLOW */ + c->sub.code.need = c->lbits; + c->sub.code.tree = c->ltree; + c->mode = LEN; + case LEN: /* i: get length/literal/eob next */ + j = c->sub.code.need; + NEEDBITS(j) + t = c->sub.code.tree + ((uInt)b & inflate_mask[j]); + DUMPBITS(t->bits) + e = (uInt)(t->exop); + if (e == 0) /* literal */ + { + c->sub.lit = t->base; + Tracevv((stderr, t->base >= 0x20 && t->base < 0x7f ? + "inflate: literal '%c'\n" : + "inflate: literal 0x%02x\n", t->base)); + c->mode = LIT; + break; + } + if (e & 16) /* length */ + { + c->sub.copy.get = e & 15; + c->len = t->base; + c->mode = LENEXT; + break; + } + if ((e & 64) == 0) /* next table */ + { + c->sub.code.need = e; + c->sub.code.tree = t + t->base; + break; + } + if (e & 32) /* end of block */ + { + Tracevv((stderr, "inflate: end of block\n")); + c->mode = WASH; + break; + } + c->mode = BADCODE; /* invalid code */ + z->msg = (char*)"invalid literal/length code"; + r = Z_DATA_ERROR; + LEAVE + case LENEXT: /* i: getting length extra (have base) */ + j = c->sub.copy.get; + NEEDBITS(j) + c->len += (uInt)b & inflate_mask[j]; + DUMPBITS(j) + c->sub.code.need = c->dbits; + c->sub.code.tree = c->dtree; + Tracevv((stderr, "inflate: length %u\n", c->len)); + c->mode = DIST; + case DIST: /* i: get distance next */ + j = c->sub.code.need; + NEEDBITS(j) + t = c->sub.code.tree + ((uInt)b & inflate_mask[j]); + DUMPBITS(t->bits) + e = (uInt)(t->exop); + if (e & 16) /* distance */ + { + c->sub.copy.get = e & 15; + c->sub.copy.dist = t->base; + c->mode = DISTEXT; + break; + } + if ((e & 64) == 0) /* next table */ + { + c->sub.code.need = e; + c->sub.code.tree = t + t->base; + break; + } + c->mode = BADCODE; /* invalid code */ + z->msg = (char*)"invalid distance code"; + r = Z_DATA_ERROR; + LEAVE + case DISTEXT: /* i: getting distance extra */ + j = c->sub.copy.get; + NEEDBITS(j) + c->sub.copy.dist += (uInt)b & inflate_mask[j]; + DUMPBITS(j) + Tracevv((stderr, "inflate: distance %u\n", c->sub.copy.dist)); + c->mode = COPY; + case COPY: /* o: copying bytes in window, waiting for space */ +#ifndef __TURBOC__ /* Turbo C bug for following expression */ + f = (uInt)(q - s->window) < c->sub.copy.dist ? + s->end - (c->sub.copy.dist - (q - s->window)) : + q - c->sub.copy.dist; +#else + f = q - c->sub.copy.dist; + if ((uInt)(q - s->window) < c->sub.copy.dist) + f = s->end - (c->sub.copy.dist - (uInt)(q - s->window)); +#endif + while (c->len) + { + NEEDOUT + OUTBYTE(*f++) + if (f == s->end) + f = s->window; + c->len--; + } + c->mode = START; + break; + case LIT: /* o: got literal, waiting for output space */ + NEEDOUT + OUTBYTE(c->sub.lit) + c->mode = START; + break; + case WASH: /* o: got eob, possibly more output */ + if (k > 7) /* return unused byte, if any */ + { + Assert(k < 16, "inflate_codes grabbed too many bytes") + k -= 8; + n++; + p--; /* can always return one */ + } + FLUSH + if (s->read != s->write) + LEAVE + c->mode = END; + case END: + r = Z_STREAM_END; + LEAVE + case BADCODE: /* x: got error */ + r = Z_DATA_ERROR; + LEAVE + default: + r = Z_STREAM_ERROR; + LEAVE + } +#ifdef NEED_DUMMY_RETURN + return Z_STREAM_ERROR; /* Some dumb compilers complain without this */ +#endif +} + + +void inflate_codes_free(c, z) +inflate_codes_statef *c; +z_streamp z; +{ + ZFREE(z, c); + Tracev((stderr, "inflate: codes free\n")); +} diff --git a/packages/services/compress/zlib/current/src/infcodes.h b/packages/services/compress/zlib/current/src/infcodes.h new file mode 100644 --- /dev/null +++ b/packages/services/compress/zlib/current/src/infcodes.h @@ -0,0 +1,27 @@ +/* infcodes.h -- header to use infcodes.c + * Copyright (C) 1995-1998 Mark Adler + * For conditions of distribution and use, see copyright notice in zlib.h + */ + +/* WARNING: this file should *not* be used by applications. It is + part of the implementation of the compression library and is + subject to change. Applications should only use zlib.h. + */ + +struct inflate_codes_state; +typedef struct inflate_codes_state FAR inflate_codes_statef; + +extern inflate_codes_statef *inflate_codes_new OF(( + uInt, uInt, + inflate_huft *, inflate_huft *, + z_streamp )); + +extern int inflate_codes OF(( + inflate_blocks_statef *, + z_streamp , + int)); + +extern void inflate_codes_free OF(( + inflate_codes_statef *, + z_streamp )); + diff --git a/packages/services/compress/zlib/current/src/inffast.c b/packages/services/compress/zlib/current/src/inffast.c new file mode 100644 --- /dev/null +++ b/packages/services/compress/zlib/current/src/inffast.c @@ -0,0 +1,170 @@ +/* inffast.c -- process literals and length/distance pairs fast + * Copyright (C) 1995-1998 Mark Adler + * For conditions of distribution and use, see copyright notice in zlib.h + */ + +#include "zutil.h" +#include "inftrees.h" +#include "infblock.h" +#include "infcodes.h" +#include "infutil.h" +#include "inffast.h" + +struct inflate_codes_state {int dummy;}; /* for buggy compilers */ + +/* simplify the use of the inflate_huft type with some defines */ +#define exop word.what.Exop +#define bits word.what.Bits + +/* macros for bit input with no checking and for returning unused bytes */ +#define GRABBITS(j) {while(k<(j)){b|=((uLong)NEXTBYTE)<avail_in-n;c=(k>>3)>3:c;n+=c;p-=c;k-=c<<3;} + +/* Called with number of bytes left to write in window at least 258 + (the maximum string length) and number of input bytes available + at least ten. The ten bytes are six bytes for the longest length/ + distance pair plus four bytes for overloading the bit buffer. */ + +int inflate_fast(bl, bd, tl, td, s, z) +uInt bl, bd; +inflate_huft *tl; +inflate_huft *td; /* need separate declaration for Borland C++ */ +inflate_blocks_statef *s; +z_streamp z; +{ + inflate_huft *t; /* temporary pointer */ + uInt e; /* extra bits or operation */ + uLong b; /* bit buffer */ + uInt k; /* bits in bit buffer */ + Bytef *p; /* input data pointer */ + uInt n; /* bytes available there */ + Bytef *q; /* output window write pointer */ + uInt m; /* bytes to end of window or read pointer */ + uInt ml; /* mask for literal/length tree */ + uInt md; /* mask for distance tree */ + uInt c; /* bytes to copy */ + uInt d; /* distance back to copy from */ + Bytef *r; /* copy source pointer */ + + /* load input, output, bit values */ + LOAD + + /* initialize masks */ + ml = inflate_mask[bl]; + md = inflate_mask[bd]; + + /* do until not enough input or output space for fast loop */ + do { /* assume called with m >= 258 && n >= 10 */ + /* get literal/length code */ + GRABBITS(20) /* max bits for literal/length code */ + if ((e = (t = tl + ((uInt)b & ml))->exop) == 0) + { + DUMPBITS(t->bits) + Tracevv((stderr, t->base >= 0x20 && t->base < 0x7f ? + "inflate: * literal '%c'\n" : + "inflate: * literal 0x%02x\n", t->base)); + *q++ = (Byte)t->base; + m--; + continue; + } + do { + DUMPBITS(t->bits) + if (e & 16) + { + /* get extra bits for length */ + e &= 15; + c = t->base + ((uInt)b & inflate_mask[e]); + DUMPBITS(e) + Tracevv((stderr, "inflate: * length %u\n", c)); + + /* decode distance base of block to copy */ + GRABBITS(15); /* max bits for distance code */ + e = (t = td + ((uInt)b & md))->exop; + do { + DUMPBITS(t->bits) + if (e & 16) + { + /* get extra bits to add to distance base */ + e &= 15; + GRABBITS(e) /* get extra bits (up to 13) */ + d = t->base + ((uInt)b & inflate_mask[e]); + DUMPBITS(e) + Tracevv((stderr, "inflate: * distance %u\n", d)); + + /* do the copy */ + m -= c; + if ((uInt)(q - s->window) >= d) /* offset before dest */ + { /* just copy */ + r = q - d; + *q++ = *r++; c--; /* minimum count is three, */ + *q++ = *r++; c--; /* so unroll loop a little */ + } + else /* else offset after destination */ + { + e = d - (uInt)(q - s->window); /* bytes from offset to end */ + r = s->end - e; /* pointer to offset */ + if (c > e) /* if source crosses, */ + { + c -= e; /* copy to end of window */ + do { + *q++ = *r++; + } while (--e); + r = s->window; /* copy rest from start of window */ + } + } + do { /* copy all or what's left */ + *q++ = *r++; + } while (--c); + break; + } + else if ((e & 64) == 0) + { + t += t->base; + e = (t += ((uInt)b & inflate_mask[e]))->exop; + } + else + { + z->msg = (char*)"invalid distance code"; + UNGRAB + UPDATE + return Z_DATA_ERROR; + } + } while (1); + break; + } + if ((e & 64) == 0) + { + t += t->base; + if ((e = (t += ((uInt)b & inflate_mask[e]))->exop) == 0) + { + DUMPBITS(t->bits) + Tracevv((stderr, t->base >= 0x20 && t->base < 0x7f ? + "inflate: * literal '%c'\n" : + "inflate: * literal 0x%02x\n", t->base)); + *q++ = (Byte)t->base; + m--; + break; + } + } + else if (e & 32) + { + Tracevv((stderr, "inflate: * end of block\n")); + UNGRAB + UPDATE + return Z_STREAM_END; + } + else + { + z->msg = (char*)"invalid literal/length code"; + UNGRAB + UPDATE + return Z_DATA_ERROR; + } + } while (1); + } while (m >= 258 && n >= 10); + + /* not enough input or output--restore pointers and return */ + UNGRAB + UPDATE + return Z_OK; +} diff --git a/packages/services/compress/zlib/current/src/inffast.h b/packages/services/compress/zlib/current/src/inffast.h new file mode 100644 --- /dev/null +++ b/packages/services/compress/zlib/current/src/inffast.h @@ -0,0 +1,17 @@ +/* inffast.h -- header to use inffast.c + * Copyright (C) 1995-1998 Mark Adler + * For conditions of distribution and use, see copyright notice in zlib.h + */ + +/* WARNING: this file should *not* be used by applications. It is + part of the implementation of the compression library and is + subject to change. Applications should only use zlib.h. + */ + +extern int inflate_fast OF(( + uInt, + uInt, + inflate_huft *, + inflate_huft *, + inflate_blocks_statef *, + z_streamp )); diff --git a/packages/services/compress/zlib/current/src/inffixed.h b/packages/services/compress/zlib/current/src/inffixed.h new file mode 100644 --- /dev/null +++ b/packages/services/compress/zlib/current/src/inffixed.h @@ -0,0 +1,151 @@ +/* inffixed.h -- table for decoding fixed codes + * Generated automatically by the maketree.c program + */ + +/* WARNING: this file should *not* be used by applications. It is + part of the implementation of the compression library and is + subject to change. Applications should only use zlib.h. + */ + +local uInt fixed_bl = 9; +local uInt fixed_bd = 5; +local inflate_huft fixed_tl[] = { + {{{96,7}},256}, {{{0,8}},80}, {{{0,8}},16}, {{{84,8}},115}, + {{{82,7}},31}, {{{0,8}},112}, {{{0,8}},48}, {{{0,9}},192}, + {{{80,7}},10}, {{{0,8}},96}, {{{0,8}},32}, {{{0,9}},160}, + {{{0,8}},0}, {{{0,8}},128}, {{{0,8}},64}, {{{0,9}},224}, + {{{80,7}},6}, {{{0,8}},88}, {{{0,8}},24}, {{{0,9}},144}, + {{{83,7}},59}, {{{0,8}},120}, {{{0,8}},56}, {{{0,9}},208}, + {{{81,7}},17}, {{{0,8}},104}, {{{0,8}},40}, {{{0,9}},176}, + {{{0,8}},8}, {{{0,8}},136}, {{{0,8}},72}, {{{0,9}},240}, + {{{80,7}},4}, {{{0,8}},84}, {{{0,8}},20}, {{{85,8}},227}, + {{{83,7}},43}, {{{0,8}},116}, {{{0,8}},52}, {{{0,9}},200}, + {{{81,7}},13}, {{{0,8}},100}, {{{0,8}},36}, {{{0,9}},168}, + {{{0,8}},4}, {{{0,8}},132}, {{{0,8}},68}, {{{0,9}},232}, + {{{80,7}},8}, {{{0,8}},92}, {{{0,8}},28}, {{{0,9}},152}, + {{{84,7}},83}, {{{0,8}},124}, {{{0,8}},60}, {{{0,9}},216}, + {{{82,7}},23}, {{{0,8}},108}, {{{0,8}},44}, {{{0,9}},184}, + {{{0,8}},12}, {{{0,8}},140}, {{{0,8}},76}, {{{0,9}},248}, + {{{80,7}},3}, {{{0,8}},82}, {{{0,8}},18}, {{{85,8}},163}, + {{{83,7}},35}, {{{0,8}},114}, {{{0,8}},50}, {{{0,9}},196}, + {{{81,7}},11}, {{{0,8}},98}, {{{0,8}},34}, {{{0,9}},164}, + {{{0,8}},2}, {{{0,8}},130}, {{{0,8}},66}, {{{0,9}},228}, + {{{80,7}},7}, {{{0,8}},90}, {{{0,8}},26}, {{{0,9}},148}, + {{{84,7}},67}, {{{0,8}},122}, {{{0,8}},58}, {{{0,9}},212}, + {{{82,7}},19}, {{{0,8}},106}, {{{0,8}},42}, {{{0,9}},180}, + {{{0,8}},10}, {{{0,8}},138}, {{{0,8}},74}, {{{0,9}},244}, + {{{80,7}},5}, {{{0,8}},86}, {{{0,8}},22}, {{{192,8}},0}, + {{{83,7}},51}, {{{0,8}},118}, {{{0,8}},54}, {{{0,9}},204}, + {{{81,7}},15}, {{{0,8}},102}, {{{0,8}},38}, {{{0,9}},172}, + {{{0,8}},6}, {{{0,8}},134}, {{{0,8}},70}, {{{0,9}},236}, + {{{80,7}},9}, {{{0,8}},94}, {{{0,8}},30}, {{{0,9}},156}, + {{{84,7}},99}, {{{0,8}},126}, {{{0,8}},62}, {{{0,9}},220}, + {{{82,7}},27}, {{{0,8}},110}, {{{0,8}},46}, {{{0,9}},188}, + {{{0,8}},14}, {{{0,8}},142}, {{{0,8}},78}, {{{0,9}},252}, + {{{96,7}},256}, {{{0,8}},81}, {{{0,8}},17}, {{{85,8}},131}, + {{{82,7}},31}, {{{0,8}},113}, {{{0,8}},49}, {{{0,9}},194}, + {{{80,7}},10}, {{{0,8}},97}, {{{0,8}},33}, {{{0,9}},162}, + {{{0,8}},1}, {{{0,8}},129}, {{{0,8}},65}, {{{0,9}},226}, + {{{80,7}},6}, {{{0,8}},89}, {{{0,8}},25}, {{{0,9}},146}, + {{{83,7}},59}, {{{0,8}},121}, {{{0,8}},57}, {{{0,9}},210}, + {{{81,7}},17}, {{{0,8}},105}, {{{0,8}},41}, {{{0,9}},178}, + {{{0,8}},9}, {{{0,8}},137}, {{{0,8}},73}, {{{0,9}},242}, + {{{80,7}},4}, {{{0,8}},85}, {{{0,8}},21}, {{{80,8}},258}, + {{{83,7}},43}, {{{0,8}},117}, {{{0,8}},53}, {{{0,9}},202}, + {{{81,7}},13}, {{{0,8}},101}, {{{0,8}},37}, {{{0,9}},170}, + {{{0,8}},5}, {{{0,8}},133}, {{{0,8}},69}, {{{0,9}},234}, + {{{80,7}},8}, {{{0,8}},93}, {{{0,8}},29}, {{{0,9}},154}, + {{{84,7}},83}, {{{0,8}},125}, {{{0,8}},61}, {{{0,9}},218}, + {{{82,7}},23}, {{{0,8}},109}, {{{0,8}},45}, {{{0,9}},186}, + {{{0,8}},13}, {{{0,8}},141}, {{{0,8}},77}, {{{0,9}},250}, + {{{80,7}},3}, {{{0,8}},83}, {{{0,8}},19}, {{{85,8}},195}, + {{{83,7}},35}, {{{0,8}},115}, {{{0,8}},51}, {{{0,9}},198}, + {{{81,7}},11}, {{{0,8}},99}, {{{0,8}},35}, {{{0,9}},166}, + {{{0,8}},3}, {{{0,8}},131}, {{{0,8}},67}, {{{0,9}},230}, + {{{80,7}},7}, {{{0,8}},91}, {{{0,8}},27}, {{{0,9}},150}, + {{{84,7}},67}, {{{0,8}},123}, {{{0,8}},59}, {{{0,9}},214}, + {{{82,7}},19}, {{{0,8}},107}, {{{0,8}},43}, {{{0,9}},182}, + {{{0,8}},11}, {{{0,8}},139}, {{{0,8}},75}, {{{0,9}},246}, + {{{80,7}},5}, {{{0,8}},87}, {{{0,8}},23}, {{{192,8}},0}, + {{{83,7}},51}, {{{0,8}},119}, {{{0,8}},55}, {{{0,9}},206}, + {{{81,7}},15}, {{{0,8}},103}, {{{0,8}},39}, {{{0,9}},174}, + {{{0,8}},7}, {{{0,8}},135}, {{{0,8}},71}, {{{0,9}},238}, + {{{80,7}},9}, {{{0,8}},95}, {{{0,8}},31}, {{{0,9}},158}, + {{{84,7}},99}, {{{0,8}},127}, {{{0,8}},63}, {{{0,9}},222}, + {{{82,7}},27}, {{{0,8}},111}, {{{0,8}},47}, {{{0,9}},190}, + {{{0,8}},15}, {{{0,8}},143}, {{{0,8}},79}, {{{0,9}},254}, + {{{96,7}},256}, {{{0,8}},80}, {{{0,8}},16}, {{{84,8}},115}, + {{{82,7}},31}, {{{0,8}},112}, {{{0,8}},48}, {{{0,9}},193}, + {{{80,7}},10}, {{{0,8}},96}, {{{0,8}},32}, {{{0,9}},161}, + {{{0,8}},0}, {{{0,8}},128}, {{{0,8}},64}, {{{0,9}},225}, + {{{80,7}},6}, {{{0,8}},88}, {{{0,8}},24}, {{{0,9}},145}, + {{{83,7}},59}, {{{0,8}},120}, {{{0,8}},56}, {{{0,9}},209}, + {{{81,7}},17}, {{{0,8}},104}, {{{0,8}},40}, {{{0,9}},177}, + {{{0,8}},8}, {{{0,8}},136}, {{{0,8}},72}, {{{0,9}},241}, + {{{80,7}},4}, {{{0,8}},84}, {{{0,8}},20}, {{{85,8}},227}, + {{{83,7}},43}, {{{0,8}},116}, {{{0,8}},52}, {{{0,9}},201}, + {{{81,7}},13}, {{{0,8}},100}, {{{0,8}},36}, {{{0,9}},169}, + {{{0,8}},4}, {{{0,8}},132}, {{{0,8}},68}, {{{0,9}},233}, + {{{80,7}},8}, {{{0,8}},92}, {{{0,8}},28}, {{{0,9}},153}, + {{{84,7}},83}, {{{0,8}},124}, {{{0,8}},60}, {{{0,9}},217}, + {{{82,7}},23}, {{{0,8}},108}, {{{0,8}},44}, {{{0,9}},185}, + {{{0,8}},12}, {{{0,8}},140}, {{{0,8}},76}, {{{0,9}},249}, + {{{80,7}},3}, {{{0,8}},82}, {{{0,8}},18}, {{{85,8}},163}, + {{{83,7}},35}, {{{0,8}},114}, {{{0,8}},50}, {{{0,9}},197}, + {{{81,7}},11}, {{{0,8}},98}, {{{0,8}},34}, {{{0,9}},165}, + {{{0,8}},2}, {{{0,8}},130}, {{{0,8}},66}, {{{0,9}},229}, + {{{80,7}},7}, {{{0,8}},90}, {{{0,8}},26}, {{{0,9}},149}, + {{{84,7}},67}, {{{0,8}},122}, {{{0,8}},58}, {{{0,9}},213}, + {{{82,7}},19}, {{{0,8}},106}, {{{0,8}},42}, {{{0,9}},181}, + {{{0,8}},10}, {{{0,8}},138}, {{{0,8}},74}, {{{0,9}},245}, + {{{80,7}},5}, {{{0,8}},86}, {{{0,8}},22}, {{{192,8}},0}, + {{{83,7}},51}, {{{0,8}},118}, {{{0,8}},54}, {{{0,9}},205}, + {{{81,7}},15}, {{{0,8}},102}, {{{0,8}},38}, {{{0,9}},173}, + {{{0,8}},6}, {{{0,8}},134}, {{{0,8}},70}, {{{0,9}},237}, + {{{80,7}},9}, {{{0,8}},94}, {{{0,8}},30}, {{{0,9}},157}, + {{{84,7}},99}, {{{0,8}},126}, {{{0,8}},62}, {{{0,9}},221}, + {{{82,7}},27}, {{{0,8}},110}, {{{0,8}},46}, {{{0,9}},189}, + {{{0,8}},14}, {{{0,8}},142}, {{{0,8}},78}, {{{0,9}},253}, + {{{96,7}},256}, {{{0,8}},81}, {{{0,8}},17}, {{{85,8}},131}, + {{{82,7}},31}, {{{0,8}},113}, {{{0,8}},49}, {{{0,9}},195}, + {{{80,7}},10}, {{{0,8}},97}, {{{0,8}},33}, {{{0,9}},163}, + {{{0,8}},1}, {{{0,8}},129}, {{{0,8}},65}, {{{0,9}},227}, + {{{80,7}},6}, {{{0,8}},89}, {{{0,8}},25}, {{{0,9}},147}, + {{{83,7}},59}, {{{0,8}},121}, {{{0,8}},57}, {{{0,9}},211}, + {{{81,7}},17}, {{{0,8}},105}, {{{0,8}},41}, {{{0,9}},179}, + {{{0,8}},9}, {{{0,8}},137}, {{{0,8}},73}, {{{0,9}},243}, + {{{80,7}},4}, {{{0,8}},85}, {{{0,8}},21}, {{{80,8}},258}, + {{{83,7}},43}, {{{0,8}},117}, {{{0,8}},53}, {{{0,9}},203}, + {{{81,7}},13}, {{{0,8}},101}, {{{0,8}},37}, {{{0,9}},171}, + {{{0,8}},5}, {{{0,8}},133}, {{{0,8}},69}, {{{0,9}},235}, + {{{80,7}},8}, {{{0,8}},93}, {{{0,8}},29}, {{{0,9}},155}, + {{{84,7}},83}, {{{0,8}},125}, {{{0,8}},61}, {{{0,9}},219}, + {{{82,7}},23}, {{{0,8}},109}, {{{0,8}},45}, {{{0,9}},187}, + {{{0,8}},13}, {{{0,8}},141}, {{{0,8}},77}, {{{0,9}},251}, + {{{80,7}},3}, {{{0,8}},83}, {{{0,8}},19}, {{{85,8}},195}, + {{{83,7}},35}, {{{0,8}},115}, {{{0,8}},51}, {{{0,9}},199}, + {{{81,7}},11}, {{{0,8}},99}, {{{0,8}},35}, {{{0,9}},167}, + {{{0,8}},3}, {{{0,8}},131}, {{{0,8}},67}, {{{0,9}},231}, + {{{80,7}},7}, {{{0,8}},91}, {{{0,8}},27}, {{{0,9}},151}, + {{{84,7}},67}, {{{0,8}},123}, {{{0,8}},59}, {{{0,9}},215}, + {{{82,7}},19}, {{{0,8}},107}, {{{0,8}},43}, {{{0,9}},183}, + {{{0,8}},11}, {{{0,8}},139}, {{{0,8}},75}, {{{0,9}},247}, + {{{80,7}},5}, {{{0,8}},87}, {{{0,8}},23}, {{{192,8}},0}, + {{{83,7}},51}, {{{0,8}},119}, {{{0,8}},55}, {{{0,9}},207}, + {{{81,7}},15}, {{{0,8}},103}, {{{0,8}},39}, {{{0,9}},175}, + {{{0,8}},7}, {{{0,8}},135}, {{{0,8}},71}, {{{0,9}},239}, + {{{80,7}},9}, {{{0,8}},95}, {{{0,8}},31}, {{{0,9}},159}, + {{{84,7}},99}, {{{0,8}},127}, {{{0,8}},63}, {{{0,9}},223}, + {{{82,7}},27}, {{{0,8}},111}, {{{0,8}},47}, {{{0,9}},191}, + {{{0,8}},15}, {{{0,8}},143}, {{{0,8}},79}, {{{0,9}},255} + }; +local inflate_huft fixed_td[] = { + {{{80,5}},1}, {{{87,5}},257}, {{{83,5}},17}, {{{91,5}},4097}, + {{{81,5}},5}, {{{89,5}},1025}, {{{85,5}},65}, {{{93,5}},16385}, + {{{80,5}},3}, {{{88,5}},513}, {{{84,5}},33}, {{{92,5}},8193}, + {{{82,5}},9}, {{{90,5}},2049}, {{{86,5}},129}, {{{192,5}},24577}, + {{{80,5}},2}, {{{87,5}},385}, {{{83,5}},25}, {{{91,5}},6145}, + {{{81,5}},7}, {{{89,5}},1537}, {{{85,5}},97}, {{{93,5}},24577}, + {{{80,5}},4}, {{{88,5}},769}, {{{84,5}},49}, {{{92,5}},12289}, + {{{82,5}},13}, {{{90,5}},3073}, {{{86,5}},193}, {{{192,5}},24577} + }; diff --git a/packages/services/compress/zlib/current/src/inflate.c b/packages/services/compress/zlib/current/src/inflate.c new file mode 100644 --- /dev/null +++ b/packages/services/compress/zlib/current/src/inflate.c @@ -0,0 +1,534 @@ +/* inflate.c -- zlib interface to inflate modules + * Copyright (C) 1995-1998 Mark Adler + * For conditions of distribution and use, see copyright notice in zlib.h + */ + +#include "zutil.h" +#include "infblock.h" + +struct inflate_blocks_state {int dummy;}; /* for buggy compilers */ + +typedef enum { + METHOD, /* waiting for method byte */ +#ifdef __ECOS__ + GZ_HDR2, + GZ_METHOD, + GZ_FLAG, + GZ_TIME, + GZ_EXTRA, + GZ_EXTRA_HI, + GZ_EXTRA_ZAP, + GZ_NAME, + GZ_COMMENT, + GZ_HEAD_CRC_LO, + GZ_HEAD_CRC_HI, + GZ_DONE, +#endif // __ECOS__ + FLAG, /* waiting for flag byte */ + DICT4, /* four dictionary check bytes to go */ + DICT3, /* three dictionary check bytes to go */ + DICT2, /* two dictionary check bytes to go */ + DICT1, /* one dictionary check byte to go */ + DICT0, /* waiting for inflateSetDictionary */ + BLOCKS, /* decompressing blocks */ + CHECK4, /* four check bytes to go */ + CHECK3, /* three check bytes to go */ + CHECK2, /* two check bytes to go */ + CHECK1, /* one check byte to go */ + DONE, /* finished check, done */ + BAD} /* got an error--stay here */ +inflate_mode; + +/* inflate private state */ +struct internal_state { + + /* mode */ + inflate_mode mode; /* current inflate mode */ +#ifdef __ECOS__ + inflate_mode gz_mode; + uInt gz_flag; + int gz_cnt; + unsigned char* gz_start; +#endif + + /* mode dependent information */ + union { + uInt method; /* if FLAGS, method byte */ + struct { + uLong was; /* computed check value */ + uLong need; /* stream check value */ + } check; /* if CHECK, check values to compare */ + uInt marker; /* if BAD, inflateSync's marker bytes count */ + } sub; /* submode */ + + /* mode independent information */ + int nowrap; /* flag for no wrapper */ + uInt wbits; /* log2(window size) (8..15, defaults to 15) */ + inflate_blocks_statef + *blocks; /* current inflate_blocks state */ + +}; + +#ifdef __ECOS__ +/* gzip flag byte */ +#define _GZ_ASCII_FLAG 0x01 /* bit 0 set: file probably ascii text */ +#define _GZ_HEAD_CRC 0x02 /* bit 1 set: header CRC present */ +#define _GZ_EXTRA_FIELD 0x04 /* bit 2 set: extra field present */ +#define _GZ_ORIG_NAME 0x08 /* bit 3 set: original file name present */ +#define _GZ_COMMENT 0x10 /* bit 4 set: file comment present */ +#define _GZ_RESERVED 0xE0 /* bits 5..7: reserved */ +#endif // __ECOS__ + + +int ZEXPORT inflateReset(z) +z_streamp z; +{ + if (z == Z_NULL || z->state == Z_NULL) + return Z_STREAM_ERROR; + z->total_in = z->total_out = 0; + z->msg = Z_NULL; + z->state->mode = z->state->nowrap ? BLOCKS : METHOD; + inflate_blocks_reset(z->state->blocks, z, Z_NULL); + Tracev((stderr, "inflate: reset\n")); + return Z_OK; +} + + +int ZEXPORT inflateEnd(z) +z_streamp z; +{ + if (z == Z_NULL || z->state == Z_NULL || z->zfree == Z_NULL) + return Z_STREAM_ERROR; + if (z->state->blocks != Z_NULL) + inflate_blocks_free(z->state->blocks, z); + ZFREE(z, z->state); + z->state = Z_NULL; + Tracev((stderr, "inflate: end\n")); + return Z_OK; +} + + +int ZEXPORT inflateInit2_(z, w, version, stream_size) +z_streamp z; +int w; +const char *version; +int stream_size; +{ + if (version == Z_NULL || version[0] != ZLIB_VERSION[0] || + stream_size != sizeof(z_stream)) + return Z_VERSION_ERROR; + + /* initialize state */ + if (z == Z_NULL) + return Z_STREAM_ERROR; + z->msg = Z_NULL; + if (z->zalloc == Z_NULL) + { + z->zalloc = zcalloc; + z->opaque = (voidpf)0; + } + if (z->zfree == Z_NULL) z->zfree = zcfree; + if ((z->state = (struct internal_state FAR *) + ZALLOC(z,1,sizeof(struct internal_state))) == Z_NULL) + return Z_MEM_ERROR; + z->state->blocks = Z_NULL; + + /* handle undocumented nowrap option (no zlib header or check) */ + z->state->nowrap = 0; + if (w < 0) + { + w = - w; + z->state->nowrap = 1; + } + + /* set window size */ + if (w < 8 || w > 15) + { + inflateEnd(z); + return Z_STREAM_ERROR; + } + z->state->wbits = (uInt)w; + + /* create inflate_blocks state */ + if ((z->state->blocks = + inflate_blocks_new(z, z->state->nowrap ? Z_NULL : adler32, (uInt)1 << w)) + == Z_NULL) + { + inflateEnd(z); + return Z_MEM_ERROR; + } + Tracev((stderr, "inflate: allocated\n")); + + /* reset state */ + inflateReset(z); + return Z_OK; +} + + +int ZEXPORT inflateInit_(z, version, stream_size) +z_streamp z; +const char *version; +int stream_size; +{ + return inflateInit2_(z, DEF_WBITS, version, stream_size); +} + + +#define NEEDBYTE {if(z->avail_in==0)return r;r=f;} +#define NEXTBYTE (z->avail_in--,z->total_in++,*z->next_in++) + +int ZEXPORT inflate(z, f) +z_streamp z; +int f; +{ + int r; + uInt b; + + if (z == Z_NULL || z->state == Z_NULL || z->next_in == Z_NULL) + return Z_STREAM_ERROR; + f = f == Z_FINISH ? Z_BUF_ERROR : Z_OK; + r = Z_BUF_ERROR; + while (1) switch (z->state->mode) + { + case METHOD: +#ifdef __ECOS__ + // "Clear" gz_mode - if DONE at exit, this was a zlib stream. + z->state->gz_mode = DONE; +#endif + NEEDBYTE + if (((z->state->sub.method = NEXTBYTE) & 0xf) != Z_DEFLATED) + { +#ifdef __ECOS__ + if (0x1f == z->state->sub.method) { + z->state->mode = GZ_HDR2; + break; + } + // This is a hack to get a reasonable error message in + // RedBoot if the user tries to decompress raw data. + z->state->mode = BAD; + z->msg = (char*)"incorrect gzip header"; + z->state->sub.marker = 5; /* can't try inflateSync */ +#else + z->state->mode = BAD; + z->msg = (char*)"unknown compression method"; + z->state->sub.marker = 5; /* can't try inflateSync */ +#endif // __ECOS__ + break; + } + if ((z->state->sub.method >> 4) + 8 > z->state->wbits) + { + z->state->mode = BAD; + z->msg = (char*)"invalid window size"; + z->state->sub.marker = 5; /* can't try inflateSync */ + break; + } + z->state->mode = FLAG; +#ifdef __ECOS__ + break; + case GZ_HDR2: + NEEDBYTE; + b = NEXTBYTE; + if (0x8b != b) { + z->state->mode = BAD; + z->msg = (char*)"incorrect gzip header"; + z->state->sub.marker = 5; /* can't try inflateSync */ + break; + } + z->state->mode = GZ_METHOD; + case GZ_METHOD: + NEEDBYTE + if ((z->state->sub.method = NEXTBYTE) != Z_DEFLATED) + { + z->state->mode = BAD; + z->msg = (char*)"unknown compression method"; + z->state->sub.marker = 5; /* can't try inflateSync */ + break; + } + if ((z->state->sub.method >> 4) + 8 > z->state->wbits) + { + z->state->mode = BAD; + z->msg = (char*)"invalid window size"; + z->state->sub.marker = 5; /* can't try inflateSync */ + break; + } + z->state->mode = GZ_FLAG; + case GZ_FLAG: + NEEDBYTE + z->state->gz_flag = NEXTBYTE; + z->state->mode = GZ_TIME; + z->state->gz_cnt = 6; // for GZ_TIME + case GZ_TIME: + // Discard time, xflags and OS code + while (z->state->gz_cnt-- > 0) { + NEEDBYTE; + b = NEXTBYTE; + } + z->state->mode = GZ_EXTRA; + case GZ_EXTRA: + if (!(z->state->gz_flag & _GZ_EXTRA_FIELD)) { + z->state->mode = GZ_NAME; + break; + } + + NEEDBYTE; + z->state->gz_cnt = NEXTBYTE; + z->state->mode = GZ_EXTRA_HI; + case GZ_EXTRA_HI: + NEEDBYTE; + z->state->gz_cnt += (((uInt)NEXTBYTE)<<8); + z->state->mode = GZ_EXTRA_ZAP; + case GZ_EXTRA_ZAP: + // Discard extra field + while (z->state->gz_cnt-- > 0) { + NEEDBYTE; + b = NEXTBYTE; + } + z->state->mode = GZ_NAME; + case GZ_NAME: + if (!(z->state->gz_flag & _GZ_ORIG_NAME)) { + z->state->mode = GZ_COMMENT; + break; + } + // Skip the name + do { + NEEDBYTE; + b = NEXTBYTE; + } while (0 != b); + z->state->mode = GZ_COMMENT; + case GZ_COMMENT: + if (!(z->state->gz_flag & _GZ_COMMENT)) { + z->state->mode = GZ_HEAD_CRC_LO; + break; + } + // Skip the comment + do { + NEEDBYTE; + b = NEXTBYTE; + } while (0 != b); + z->state->mode = GZ_HEAD_CRC_LO; + case GZ_HEAD_CRC_LO: + if (!(z->state->gz_flag & _GZ_HEAD_CRC)) { + z->state->mode = GZ_DONE; + break; + } + // skip lo byte + NEEDBYTE; + b = NEXTBYTE; + z->state->mode = GZ_HEAD_CRC_HI; + case GZ_HEAD_CRC_HI: + // skip hi byte + NEEDBYTE; + b = NEXTBYTE; + z->state->mode = GZ_DONE; + case GZ_DONE: + // Remember where output is written to and flag that this is a + // gz stream by setting the gz_mode. + z->state->gz_start = z->next_out; + z->state->gz_mode = BLOCKS; + + // Depending on the flag select correct next step + // (clone of code in FLAG) + if (!(z->state->gz_flag & PRESET_DICT)) + z->state->mode = BLOCKS; + else + z->state->mode = DICT4; + break; +#endif // __ECOS__ + case FLAG: + NEEDBYTE + b = NEXTBYTE; + if (((z->state->sub.method << 8) + b) % 31) + { + z->state->mode = BAD; + z->msg = (char*)"incorrect header check"; + z->state->sub.marker = 5; /* can't try inflateSync */ + break; + } + Tracev((stderr, "inflate: zlib header ok\n")); + if (!(b & PRESET_DICT)) + { + z->state->mode = BLOCKS; + break; + } + z->state->mode = DICT4; + case DICT4: + NEEDBYTE + z->state->sub.check.need = (uLong)NEXTBYTE << 24; + z->state->mode = DICT3; + case DICT3: + NEEDBYTE + z->state->sub.check.need += (uLong)NEXTBYTE << 16; + z->state->mode = DICT2; + case DICT2: + NEEDBYTE + z->state->sub.check.need += (uLong)NEXTBYTE << 8; + z->state->mode = DICT1; + case DICT1: + NEEDBYTE + z->state->sub.check.need += (uLong)NEXTBYTE; + z->adler = z->state->sub.check.need; + z->state->mode = DICT0; + return Z_NEED_DICT; + case DICT0: + z->state->mode = BAD; + z->msg = (char*)"need dictionary"; + z->state->sub.marker = 0; /* can try inflateSync */ + return Z_STREAM_ERROR; + case BLOCKS: + r = inflate_blocks(z->state->blocks, z, r); + if (r == Z_DATA_ERROR) + { + z->state->mode = BAD; + z->state->sub.marker = 0; /* can try inflateSync */ + break; + } + if (r == Z_OK) + r = f; + if (r != Z_STREAM_END) + return r; + r = f; + inflate_blocks_reset(z->state->blocks, z, &z->state->sub.check.was); + if (z->state->nowrap) + { + z->state->mode = DONE; + break; + } + z->state->mode = CHECK4; + case CHECK4: + NEEDBYTE + z->state->sub.check.need = (uLong)NEXTBYTE << 24; + z->state->mode = CHECK3; + case CHECK3: + NEEDBYTE + z->state->sub.check.need += (uLong)NEXTBYTE << 16; + z->state->mode = CHECK2; + case CHECK2: + NEEDBYTE + z->state->sub.check.need += (uLong)NEXTBYTE << 8; + z->state->mode = CHECK1; + case CHECK1: + NEEDBYTE + z->state->sub.check.need += (uLong)NEXTBYTE; + +#ifdef __ECOS__ + if (z->state->gz_mode != DONE) { + // Byte swap CRC since it is read in the opposite order as + // written by gzip. + unsigned long c = gz_crc32(0, z->state->gz_start, z->next_out - z->state->gz_start); + z->state->sub.check.was = (((c & 0xff000000) >> 24) | ((c & 0x00ff0000) >> 8) + | ((c & 0x0000ff00) << 8) | ((c & 0x000000ff) << 24)); + + } +#endif + + if (z->state->sub.check.was != z->state->sub.check.need) + { + z->state->mode = BAD; + z->msg = (char*)"incorrect data check"; + z->state->sub.marker = 5; /* can't try inflateSync */ + break; + } + Tracev((stderr, "inflate: zlib check ok\n")); + z->state->mode = DONE; + case DONE: + return Z_STREAM_END; + case BAD: + return Z_DATA_ERROR; + default: + return Z_STREAM_ERROR; + } +#ifdef NEED_DUMMY_RETURN + return Z_STREAM_ERROR; /* Some dumb compilers complain without this */ +#endif +} + + +int ZEXPORT inflateSetDictionary(z, dictionary, dictLength) +z_streamp z; +const Bytef *dictionary; +uInt dictLength; +{ + uInt length = dictLength; + + if (z == Z_NULL || z->state == Z_NULL || z->state->mode != DICT0) + return Z_STREAM_ERROR; + + if (adler32(1L, dictionary, dictLength) != z->adler) return Z_DATA_ERROR; + z->adler = 1L; + + if (length >= ((uInt)1<state->wbits)) + { + length = (1<state->wbits)-1; + dictionary += dictLength - length; + } + inflate_set_dictionary(z->state->blocks, dictionary, length); + z->state->mode = BLOCKS; + return Z_OK; +} + + +int ZEXPORT inflateSync(z) +z_streamp z; +{ + uInt n; /* number of bytes to look at */ + Bytef *p; /* pointer to bytes */ + uInt m; /* number of marker bytes found in a row */ + uLong r, w; /* temporaries to save total_in and total_out */ + + /* set up */ + if (z == Z_NULL || z->state == Z_NULL) + return Z_STREAM_ERROR; + if (z->state->mode != BAD) + { + z->state->mode = BAD; + z->state->sub.marker = 0; + } + if ((n = z->avail_in) == 0) + return Z_BUF_ERROR; + p = z->next_in; + m = z->state->sub.marker; + + /* search */ + while (n && m < 4) + { + static const Byte mark[4] = {0, 0, 0xff, 0xff}; + if (*p == mark[m]) + m++; + else if (*p) + m = 0; + else + m = 4 - m; + p++, n--; + } + + /* restore */ + z->total_in += p - z->next_in; + z->next_in = p; + z->avail_in = n; + z->state->sub.marker = m; + + /* return no joy or set up to restart on a new block */ + if (m != 4) + return Z_DATA_ERROR; + r = z->total_in; w = z->total_out; + inflateReset(z); + z->total_in = r; z->total_out = w; + z->state->mode = BLOCKS; + return Z_OK; +} + + +/* Returns true if inflate is currently at the end of a block generated + * by Z_SYNC_FLUSH or Z_FULL_FLUSH. This function is used by one PPP + * implementation to provide an additional safety check. PPP uses Z_SYNC_FLUSH + * but removes the length bytes of the resulting empty stored block. When + * decompressing, PPP checks that at the end of input packet, inflate is + * waiting for these length bytes. + */ +int ZEXPORT inflateSyncPoint(z) +z_streamp z; +{ + if (z == Z_NULL || z->state == Z_NULL || z->state->blocks == Z_NULL) + return Z_STREAM_ERROR; + return inflate_blocks_sync_point(z->state->blocks); +} diff --git a/packages/services/compress/zlib/current/src/inftrees.c b/packages/services/compress/zlib/current/src/inftrees.c new file mode 100644 --- /dev/null +++ b/packages/services/compress/zlib/current/src/inftrees.c @@ -0,0 +1,455 @@ +/* inftrees.c -- generate Huffman trees for efficient decoding + * Copyright (C) 1995-1998 Mark Adler + * For conditions of distribution and use, see copyright notice in zlib.h + */ + +#include "zutil.h" +#include "inftrees.h" + +#if !defined(BUILDFIXED) && !defined(STDC) +# define BUILDFIXED /* non ANSI compilers may not accept inffixed.h */ +#endif + +const char inflate_copyright[] = + " inflate 1.1.3 Copyright 1995-1998 Mark Adler "; +/* + If you use the zlib library in a product, an acknowledgment is welcome + in the documentation of your product. If for some reason you cannot + include such an acknowledgment, I would appreciate that you keep this + copyright string in the executable of your product. + */ +struct internal_state {int dummy;}; /* for buggy compilers */ + +/* simplify the use of the inflate_huft type with some defines */ +#define exop word.what.Exop +#define bits word.what.Bits + + +local int huft_build OF(( + uIntf *, /* code lengths in bits */ + uInt, /* number of codes */ + uInt, /* number of "simple" codes */ + const uIntf *, /* list of base values for non-simple codes */ + const uIntf *, /* list of extra bits for non-simple codes */ + inflate_huft * FAR*,/* result: starting table */ + uIntf *, /* maximum lookup bits (returns actual) */ + inflate_huft *, /* space for trees */ + uInt *, /* hufts used in space */ + uIntf * )); /* space for values */ + +/* Tables for deflate from PKZIP's appnote.txt. */ +local const uInt cplens[31] = { /* Copy lengths for literal codes 257..285 */ + 3, 4, 5, 6, 7, 8, 9, 10, 11, 13, 15, 17, 19, 23, 27, 31, + 35, 43, 51, 59, 67, 83, 99, 115, 131, 163, 195, 227, 258, 0, 0}; + /* see note #13 above about 258 */ +local const uInt cplext[31] = { /* Extra bits for literal codes 257..285 */ + 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 2, 2, 2, 2, + 3, 3, 3, 3, 4, 4, 4, 4, 5, 5, 5, 5, 0, 112, 112}; /* 112==invalid */ +local const uInt cpdist[30] = { /* Copy offsets for distance codes 0..29 */ + 1, 2, 3, 4, 5, 7, 9, 13, 17, 25, 33, 49, 65, 97, 129, 193, + 257, 385, 513, 769, 1025, 1537, 2049, 3073, 4097, 6145, + 8193, 12289, 16385, 24577}; +local const uInt cpdext[30] = { /* Extra bits for distance codes */ + 0, 0, 0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, + 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, + 12, 12, 13, 13}; + +/* + Huffman code decoding is performed using a multi-level table lookup. + The fastest way to decode is to simply build a lookup table whose + size is determined by the longest code. However, the time it takes + to build this table can also be a factor if the data being decoded + is not very long. The most common codes are necessarily the + shortest codes, so those codes dominate the decoding time, and hence + the speed. The idea is you can have a shorter table that decodes the + shorter, more probable codes, and then point to subsidiary tables for + the longer codes. The time it costs to decode the longer codes is + then traded against the time it takes to make longer tables. + + This results of this trade are in the variables lbits and dbits + below. lbits is the number of bits the first level table for literal/ + length codes can decode in one step, and dbits is the same thing for + the distance codes. Subsequent tables are also less than or equal to + those sizes. These values may be adjusted either when all of the + codes are shorter than that, in which case the longest code length in + bits is used, or when the shortest code is *longer* than the requested + table size, in which case the length of the shortest code in bits is + used. + + There are two different values for the two tables, since they code a + different number of possibilities each. The literal/length table + codes 286 possible values, or in a flat code, a little over eight + bits. The distance table codes 30 possible values, or a little less + than five bits, flat. The optimum values for speed end up being + about one bit more than those, so lbits is 8+1 and dbits is 5+1. + The optimum values may differ though from machine to machine, and + possibly even between compilers. Your mileage may vary. + */ + + +/* If BMAX needs to be larger than 16, then h and x[] should be uLong. */ +#define BMAX 15 /* maximum bit length of any code */ + +local int huft_build(b, n, s, d, e, t, m, hp, hn, v) +uIntf *b; /* code lengths in bits (all assumed <= BMAX) */ +uInt n; /* number of codes (assumed <= 288) */ +uInt s; /* number of simple-valued codes (0..s-1) */ +const uIntf *d; /* list of base values for non-simple codes */ +const uIntf *e; /* list of extra bits for non-simple codes */ +inflate_huft * FAR *t; /* result: starting table */ +uIntf *m; /* maximum lookup bits, returns actual */ +inflate_huft *hp; /* space for trees */ +uInt *hn; /* hufts used in space */ +uIntf *v; /* working area: values in order of bit length */ +/* Given a list of code lengths and a maximum table size, make a set of + tables to decode that set of codes. Return Z_OK on success, Z_BUF_ERROR + if the given code set is incomplete (the tables are still built in this + case), Z_DATA_ERROR if the input is invalid (an over-subscribed set of + lengths), or Z_MEM_ERROR if not enough memory. */ +{ + + uInt a; /* counter for codes of length k */ + uInt c[BMAX+1]; /* bit length count table */ + uInt f; /* i repeats in table every f entries */ + int g; /* maximum code length */ + int h; /* table level */ + register uInt i; /* counter, current code */ + register uInt j; /* counter */ + register int k; /* number of bits in current code */ + int l; /* bits per table (returned in m) */ + uInt mask; /* (1 << w) - 1, to avoid cc -O bug on HP */ + register uIntf *p; /* pointer into c[], b[], or v[] */ + inflate_huft *q; /* points to current table */ + struct inflate_huft_s r; /* table entry for structure assignment */ + inflate_huft *u[BMAX]; /* table stack */ + register int w; /* bits before this table == (l * h) */ + uInt x[BMAX+1]; /* bit offsets, then code stack */ + uIntf *xp; /* pointer into x */ + int y; /* number of dummy codes added */ + uInt z; /* number of entries in current table */ + + + /* Generate counts for each bit length */ + p = c; +#define C0 *p++ = 0; +#define C2 C0 C0 C0 C0 +#define C4 C2 C2 C2 C2 + C4 /* clear c[]--assume BMAX+1 is 16 */ + p = b; i = n; + do { + c[*p++]++; /* assume all entries <= BMAX */ + } while (--i); + if (c[0] == n) /* null input--all zero length codes */ + { + *t = (inflate_huft *)Z_NULL; + *m = 0; + return Z_OK; + } + + + /* Find minimum and maximum length, bound *m by those */ + l = *m; + for (j = 1; j <= BMAX; j++) + if (c[j]) + break; + k = j; /* minimum code length */ + if ((uInt)l < j) + l = j; + for (i = BMAX; i; i--) + if (c[i]) + break; + g = i; /* maximum code length */ + if ((uInt)l > i) + l = i; + *m = l; + + + /* Adjust last length count to fill out codes, if needed */ + for (y = 1 << j; j < i; j++, y <<= 1) + if ((y -= c[j]) < 0) + return Z_DATA_ERROR; + if ((y -= c[i]) < 0) + return Z_DATA_ERROR; + c[i] += y; + + + /* Generate starting offsets into the value table for each length */ + x[1] = j = 0; + p = c + 1; xp = x + 2; + while (--i) { /* note that i == g from above */ + *xp++ = (j += *p++); + } + + + /* Make a table of values in order of bit lengths */ + p = b; i = 0; + do { + if ((j = *p++) != 0) + v[x[j]++] = i; + } while (++i < n); + n = x[g]; /* set n to length of v */ + + + /* Generate the Huffman codes and for each, make the table entries */ + x[0] = i = 0; /* first Huffman code is zero */ + p = v; /* grab values in bit order */ + h = -1; /* no tables yet--level -1 */ + w = -l; /* bits decoded == (l * h) */ + u[0] = (inflate_huft *)Z_NULL; /* just to keep compilers happy */ + q = (inflate_huft *)Z_NULL; /* ditto */ + z = 0; /* ditto */ + + /* go through the bit lengths (k already is bits in shortest code) */ + for (; k <= g; k++) + { + a = c[k]; + while (a--) + { + /* here i is the Huffman code of length k bits for value *p */ + /* make tables up to required level */ + while (k > w + l) + { + h++; + w += l; /* previous table always l bits */ + + /* compute minimum size table less than or equal to l bits */ + z = g - w; + z = z > (uInt)l ? l : z; /* table size upper limit */ + if ((f = 1 << (j = k - w)) > a + 1) /* try a k-w bit table */ + { /* too few codes for k-w bit table */ + f -= a + 1; /* deduct codes from patterns left */ + xp = c + k; + if (j < z) + while (++j < z) /* try smaller tables up to z bits */ + { + if ((f <<= 1) <= *++xp) + break; /* enough codes to use up j bits */ + f -= *xp; /* else deduct codes from patterns */ + } + } + z = 1 << j; /* table entries for j-bit table */ + + /* allocate new table */ + if (*hn + z > MANY) /* (note: doesn't matter for fixed) */ + return Z_MEM_ERROR; /* not enough memory */ + u[h] = q = hp + *hn; + *hn += z; + + /* connect to last table, if there is one */ + if (h) + { + x[h] = i; /* save pattern for backing up */ + r.bits = (Byte)l; /* bits to dump before this table */ + r.exop = (Byte)j; /* bits in this table */ + j = i >> (w - l); + r.base = (uInt)(q - u[h-1] - j); /* offset to this table */ + u[h-1][j] = r; /* connect to last table */ + } + else + *t = q; /* first table is returned result */ + } + + /* set up table entry in r */ + r.bits = (Byte)(k - w); + if (p >= v + n) + r.exop = 128 + 64; /* out of values--invalid code */ + else if (*p < s) + { + r.exop = (Byte)(*p < 256 ? 0 : 32 + 64); /* 256 is end-of-block */ + r.base = *p++; /* simple code is just the value */ + } + else + { + r.exop = (Byte)(e[*p - s] + 16 + 64);/* non-simple--look up in lists */ + r.base = d[*p++ - s]; + } + + /* fill code-like entries with r */ + f = 1 << (k - w); + for (j = i >> w; j < z; j += f) + q[j] = r; + + /* backwards increment the k-bit code i */ + for (j = 1 << (k - 1); i & j; j >>= 1) + i ^= j; + i ^= j; + + /* backup over finished tables */ + mask = (1 << w) - 1; /* needed on HP, cc -O bug */ + while ((i & mask) != x[h]) + { + h--; /* don't need to update q */ + w -= l; + mask = (1 << w) - 1; + } + } + } + + + /* Return Z_BUF_ERROR if we were given an incomplete table */ + return y != 0 && g != 1 ? Z_BUF_ERROR : Z_OK; +} + + +int inflate_trees_bits(c, bb, tb, hp, z) +uIntf *c; /* 19 code lengths */ +uIntf *bb; /* bits tree desired/actual depth */ +inflate_huft * FAR *tb; /* bits tree result */ +inflate_huft *hp; /* space for trees */ +z_streamp z; /* for messages */ +{ + int r; + uInt hn = 0; /* hufts used in space */ + uIntf *v; /* work area for huft_build */ + + if ((v = (uIntf*)ZALLOC(z, 19, sizeof(uInt))) == Z_NULL) + return Z_MEM_ERROR; + r = huft_build(c, 19, 19, (uIntf*)Z_NULL, (uIntf*)Z_NULL, + tb, bb, hp, &hn, v); + if (r == Z_DATA_ERROR) + z->msg = (char*)"oversubscribed dynamic bit lengths tree"; + else if (r == Z_BUF_ERROR || *bb == 0) + { + z->msg = (char*)"incomplete dynamic bit lengths tree"; + r = Z_DATA_ERROR; + } + ZFREE(z, v); + return r; +} + + +int inflate_trees_dynamic(nl, nd, c, bl, bd, tl, td, hp, z) +uInt nl; /* number of literal/length codes */ +uInt nd; /* number of distance codes */ +uIntf *c; /* that many (total) code lengths */ +uIntf *bl; /* literal desired/actual bit depth */ +uIntf *bd; /* distance desired/actual bit depth */ +inflate_huft * FAR *tl; /* literal/length tree result */ +inflate_huft * FAR *td; /* distance tree result */ +inflate_huft *hp; /* space for trees */ +z_streamp z; /* for messages */ +{ + int r; + uInt hn = 0; /* hufts used in space */ + uIntf *v; /* work area for huft_build */ + + /* allocate work area */ + if ((v = (uIntf*)ZALLOC(z, 288, sizeof(uInt))) == Z_NULL) + return Z_MEM_ERROR; + + /* build literal/length tree */ + r = huft_build(c, nl, 257, cplens, cplext, tl, bl, hp, &hn, v); + if (r != Z_OK || *bl == 0) + { + if (r == Z_DATA_ERROR) + z->msg = (char*)"oversubscribed literal/length tree"; + else if (r != Z_MEM_ERROR) + { + z->msg = (char*)"incomplete literal/length tree"; + r = Z_DATA_ERROR; + } + ZFREE(z, v); + return r; + } + + /* build distance tree */ + r = huft_build(c + nl, nd, 0, cpdist, cpdext, td, bd, hp, &hn, v); + if (r != Z_OK || (*bd == 0 && nl > 257)) + { + if (r == Z_DATA_ERROR) + z->msg = (char*)"oversubscribed distance tree"; + else if (r == Z_BUF_ERROR) { +#ifdef PKZIP_BUG_WORKAROUND + r = Z_OK; + } +#else + z->msg = (char*)"incomplete distance tree"; + r = Z_DATA_ERROR; + } + else if (r != Z_MEM_ERROR) + { + z->msg = (char*)"empty distance tree with lengths"; + r = Z_DATA_ERROR; + } + ZFREE(z, v); + return r; +#endif + } + + /* done */ + ZFREE(z, v); + return Z_OK; +} + + +/* build fixed tables only once--keep them here */ +#ifdef BUILDFIXED +local int fixed_built = 0; +#define FIXEDH 544 /* number of hufts used by fixed tables */ +local inflate_huft fixed_mem[FIXEDH]; +local uInt fixed_bl; +local uInt fixed_bd; +local inflate_huft *fixed_tl; +local inflate_huft *fixed_td; +#else +#include "inffixed.h" +#endif + + +int inflate_trees_fixed(bl, bd, tl, td, z) +uIntf *bl; /* literal desired/actual bit depth */ +uIntf *bd; /* distance desired/actual bit depth */ +inflate_huft * FAR *tl; /* literal/length tree result */ +inflate_huft * FAR *td; /* distance tree result */ +z_streamp z; /* for memory allocation */ +{ +#ifdef BUILDFIXED + /* build fixed tables if not already */ + if (!fixed_built) + { + int k; /* temporary variable */ + uInt f = 0; /* number of hufts used in fixed_mem */ + uIntf *c; /* length list for huft_build */ + uIntf *v; /* work area for huft_build */ + + /* allocate memory */ + if ((c = (uIntf*)ZALLOC(z, 288, sizeof(uInt))) == Z_NULL) + return Z_MEM_ERROR; + if ((v = (uIntf*)ZALLOC(z, 288, sizeof(uInt))) == Z_NULL) + { + ZFREE(z, c); + return Z_MEM_ERROR; + } + + /* literal table */ + for (k = 0; k < 144; k++) + c[k] = 8; + for (; k < 256; k++) + c[k] = 9; + for (; k < 280; k++) + c[k] = 7; + for (; k < 288; k++) + c[k] = 8; + fixed_bl = 9; + huft_build(c, 288, 257, cplens, cplext, &fixed_tl, &fixed_bl, + fixed_mem, &f, v); + + /* distance table */ + for (k = 0; k < 30; k++) + c[k] = 5; + fixed_bd = 5; + huft_build(c, 30, 0, cpdist, cpdext, &fixed_td, &fixed_bd, + fixed_mem, &f, v); + + /* done */ + ZFREE(z, v); + ZFREE(z, c); + fixed_built = 1; + } +#endif + *bl = fixed_bl; + *bd = fixed_bd; + *tl = fixed_tl; + *td = fixed_td; + return Z_OK; +} diff --git a/packages/services/compress/zlib/current/src/inftrees.h b/packages/services/compress/zlib/current/src/inftrees.h new file mode 100644 --- /dev/null +++ b/packages/services/compress/zlib/current/src/inftrees.h @@ -0,0 +1,58 @@ +/* inftrees.h -- header to use inftrees.c + * Copyright (C) 1995-1998 Mark Adler + * For conditions of distribution and use, see copyright notice in zlib.h + */ + +/* WARNING: this file should *not* be used by applications. It is + part of the implementation of the compression library and is + subject to change. Applications should only use zlib.h. + */ + +/* Huffman code lookup table entry--this entry is four bytes for machines + that have 16-bit pointers (e.g. PC's in the small or medium model). */ + +typedef struct inflate_huft_s FAR inflate_huft; + +struct inflate_huft_s { + union { + struct { + Byte Exop; /* number of extra bits or operation */ + Byte Bits; /* number of bits in this code or subcode */ + } what; + uInt pad; /* pad structure to a power of 2 (4 bytes for */ + } word; /* 16-bit, 8 bytes for 32-bit int's) */ + uInt base; /* literal, length base, distance base, + or table offset */ +}; + +/* Maximum size of dynamic tree. The maximum found in a long but non- + exhaustive search was 1004 huft structures (850 for length/literals + and 154 for distances, the latter actually the result of an + exhaustive search). The actual maximum is not known, but the + value below is more than safe. */ +#define MANY 1440 + +extern int inflate_trees_bits OF(( + uIntf *, /* 19 code lengths */ + uIntf *, /* bits tree desired/actual depth */ + inflate_huft * FAR *, /* bits tree result */ + inflate_huft *, /* space for trees */ + z_streamp)); /* for messages */ + +extern int inflate_trees_dynamic OF(( + uInt, /* number of literal/length codes */ + uInt, /* number of distance codes */ + uIntf *, /* that many (total) code lengths */ + uIntf *, /* literal desired/actual bit depth */ + uIntf *, /* distance desired/actual bit depth */ + inflate_huft * FAR *, /* literal/length tree result */ + inflate_huft * FAR *, /* distance tree result */ + inflate_huft *, /* space for trees */ + z_streamp)); /* for messages */ + +extern int inflate_trees_fixed OF(( + uIntf *, /* literal desired/actual bit depth */ + uIntf *, /* distance desired/actual bit depth */ + inflate_huft * FAR *, /* literal/length tree result */ + inflate_huft * FAR *, /* distance tree result */ + z_streamp)); /* for memory allocation */ diff --git a/packages/services/compress/zlib/current/src/infutil.c b/packages/services/compress/zlib/current/src/infutil.c new file mode 100644 --- /dev/null +++ b/packages/services/compress/zlib/current/src/infutil.c @@ -0,0 +1,87 @@ +/* inflate_util.c -- data and routines common to blocks and codes + * Copyright (C) 1995-1998 Mark Adler + * For conditions of distribution and use, see copyright notice in zlib.h + */ + +#include "zutil.h" +#include "infblock.h" +#include "inftrees.h" +#include "infcodes.h" +#include "infutil.h" + +struct inflate_codes_state {int dummy;}; /* for buggy compilers */ + +/* And'ing with mask[n] masks the lower n bits */ +uInt inflate_mask[17] = { + 0x0000, + 0x0001, 0x0003, 0x0007, 0x000f, 0x001f, 0x003f, 0x007f, 0x00ff, + 0x01ff, 0x03ff, 0x07ff, 0x0fff, 0x1fff, 0x3fff, 0x7fff, 0xffff +}; + + +/* copy as much as possible from the sliding window to the output area */ +int inflate_flush(s, z, r) +inflate_blocks_statef *s; +z_streamp z; +int r; +{ + uInt n; + Bytef *p; + Bytef *q; + + /* local copies of source and destination pointers */ + p = z->next_out; + q = s->read; + + /* compute number of bytes to copy as far as end of window */ + n = (uInt)((q <= s->write ? s->write : s->end) - q); + if (n > z->avail_out) n = z->avail_out; + if (n && r == Z_BUF_ERROR) r = Z_OK; + + /* update counters */ + z->avail_out -= n; + z->total_out += n; + + /* update check information */ + if (s->checkfn != Z_NULL) + z->adler = s->check = (*s->checkfn)(s->check, q, n); + + /* copy as far as end of window */ + zmemcpy(p, q, n); + p += n; + q += n; + + /* see if more to copy at beginning of window */ + if (q == s->end) + { + /* wrap pointers */ + q = s->window; + if (s->write == s->end) + s->write = s->window; + + /* compute bytes to copy */ + n = (uInt)(s->write - q); + if (n > z->avail_out) n = z->avail_out; + if (n && r == Z_BUF_ERROR) r = Z_OK; + + /* update counters */ + z->avail_out -= n; + z->total_out += n; + + /* update check information */ + if (s->checkfn != Z_NULL) + z->adler = s->check = (*s->checkfn)(s->check, q, n); + + /* copy */ + zmemcpy(p, q, n); + p += n; + q += n; + } + + /* update pointers */ + z->next_out = p; + s->read = q; + + /* done */ + return r; +} diff --git a/packages/services/compress/zlib/current/src/infutil.h b/packages/services/compress/zlib/current/src/infutil.h new file mode 100644 --- /dev/null +++ b/packages/services/compress/zlib/current/src/infutil.h @@ -0,0 +1,98 @@ +/* infutil.h -- types and macros common to blocks and codes + * Copyright (C) 1995-1998 Mark Adler + * For conditions of distribution and use, see copyright notice in zlib.h + */ + +/* WARNING: this file should *not* be used by applications. It is + part of the implementation of the compression library and is + subject to change. Applications should only use zlib.h. + */ + +#ifndef _INFUTIL_H +#define _INFUTIL_H + +typedef enum { + TYPE, /* get type bits (3, including end bit) */ + LENS, /* get lengths for stored */ + STORED, /* processing stored block */ + TABLE, /* get table lengths */ + BTREE, /* get bit lengths tree for a dynamic block */ + DTREE, /* get length, distance trees for a dynamic block */ + CODES, /* processing fixed or dynamic block */ + DRY, /* output remaining window bytes */ + DONE, /* finished last block, done */ + BAD} /* got a data error--stuck here */ +inflate_block_mode; + +/* inflate blocks semi-private state */ +struct inflate_blocks_state { + + /* mode */ + inflate_block_mode mode; /* current inflate_block mode */ + + /* mode dependent information */ + union { + uInt left; /* if STORED, bytes left to copy */ + struct { + uInt table; /* table lengths (14 bits) */ + uInt index; /* index into blens (or border) */ + uIntf *blens; /* bit lengths of codes */ + uInt bb; /* bit length tree depth */ + inflate_huft *tb; /* bit length decoding tree */ + } trees; /* if DTREE, decoding info for trees */ + struct { + inflate_codes_statef + *codes; + } decode; /* if CODES, current state */ + } sub; /* submode */ + uInt last; /* true if this block is the last block */ + + /* mode independent information */ + uInt bitk; /* bits in bit buffer */ + uLong bitb; /* bit buffer */ + inflate_huft *hufts; /* single malloc for tree space */ + Bytef *window; /* sliding window */ + Bytef *end; /* one byte after sliding window */ + Bytef *read; /* window read pointer */ + Bytef *write; /* window write pointer */ + check_func checkfn; /* check function */ + uLong check; /* check on output */ + +}; + + +/* defines for inflate input/output */ +/* update pointers and return */ +#define UPDBITS {s->bitb=b;s->bitk=k;} +#define UPDIN {z->avail_in=n;z->total_in+=p-z->next_in;z->next_in=p;} +#define UPDOUT {s->write=q;} +#define UPDATE {UPDBITS UPDIN UPDOUT} +#define LEAVE {UPDATE return inflate_flush(s,z,r);} +/* get bytes and bits */ +#define LOADIN {p=z->next_in;n=z->avail_in;b=s->bitb;k=s->bitk;} +#define NEEDBYTE {if(n)r=Z_OK;else LEAVE} +#define NEXTBYTE (n--,*p++) +#define NEEDBITS(j) {while(k<(j)){NEEDBYTE;b|=((uLong)NEXTBYTE)<>=(j);k-=(j);} +/* output bytes */ +#define WAVAIL (uInt)(qread?s->read-q-1:s->end-q) +#define LOADOUT {q=s->write;m=(uInt)WAVAIL;} +#define WRAP {if(q==s->end&&s->read!=s->window){q=s->window;m=(uInt)WAVAIL;}} +#define FLUSH {UPDOUT r=inflate_flush(s,z,r); LOADOUT} +#define NEEDOUT {if(m==0){WRAP if(m==0){FLUSH WRAP if(m==0) LEAVE}}r=Z_OK;} +#define OUTBYTE(a) {*q++=(Byte)(a);m--;} +/* load local pointers */ +#define LOAD {LOADIN LOADOUT} + +/* masks for lower bits (size given to avoid silly warnings with Visual C++) */ +extern uInt inflate_mask[17]; + +/* copy as much as possible from the sliding window to the output area */ +extern int inflate_flush OF(( + inflate_blocks_statef *, + z_streamp , + int)); + +struct internal_state {int dummy;}; /* for buggy compilers */ + +#endif diff --git a/packages/services/compress/zlib/current/src/maketree.c b/packages/services/compress/zlib/current/src/maketree.c new file mode 100644 --- /dev/null +++ b/packages/services/compress/zlib/current/src/maketree.c @@ -0,0 +1,85 @@ +/* maketree.c -- make inffixed.h table for decoding fixed codes + * Copyright (C) 1998 Mark Adler + * For conditions of distribution and use, see copyright notice in zlib.h + */ + +/* WARNING: this file should *not* be used by applications. It is + part of the implementation of the compression library and is + subject to change. Applications should only use zlib.h. + */ + +/* This program is included in the distribution for completeness. + You do not need to compile or run this program since inffixed.h + is already included in the distribution. To use this program + you need to compile zlib with BUILDFIXED defined and then compile + and link this program with the zlib library. Then the output of + this program can be piped to inffixed.h. */ + +#include +#include +#include "zutil.h" +#include "inftrees.h" + +/* simplify the use of the inflate_huft type with some defines */ +#define exop word.what.Exop +#define bits word.what.Bits + +/* generate initialization table for an inflate_huft structure array */ +void maketree(uInt b, inflate_huft *t) +{ + int i, e; + + i = 0; + while (1) + { + e = t[i].exop; + if (e && (e & (16+64)) == 0) /* table pointer */ + { + fprintf(stderr, "maketree: cannot initialize sub-tables!\n"); + exit(1); + } + if (i % 4 == 0) + printf("\n "); + printf(" {{{%u,%u}},%u}", t[i].exop, t[i].bits, t[i].base); + if (++i == (1< +#include "zlib.h" + +#ifdef STDC +# include +# include +#else + extern void exit OF((int)); +#endif + +#ifdef USE_MMAP +# include +# include +# include +#endif + +#if defined(MSDOS) || defined(OS2) || defined(WIN32) +# include +# include +# define SET_BINARY_MODE(file) setmode(fileno(file), O_BINARY) +#else +# define SET_BINARY_MODE(file) +#endif + +#ifdef VMS +# define unlink delete +# define GZ_SUFFIX "-gz" +#endif +#ifdef RISCOS +# define unlink remove +# define GZ_SUFFIX "-gz" +# define fileno(file) file->__file +#endif +#if defined(__MWERKS__) && __dest_os != __be_os && __dest_os != __win32_os +# include /* for fileno */ +#endif + +#ifndef WIN32 /* unlink already in stdio.h for WIN32 */ + extern int unlink OF((const char *)); +#endif + +#ifndef GZ_SUFFIX +# define GZ_SUFFIX ".gz" +#endif +#define SUFFIX_LEN (sizeof(GZ_SUFFIX)-1) + +#define BUFLEN 16384 +#define MAX_NAME_LEN 1024 + +#ifdef MAXSEG_64K +# define local static + /* Needed for systems with limitation on stack size. */ +#else +# define local +#endif + +char *prog; + +void error OF((const char *msg)); +void gz_compress OF((FILE *in, gzFile out)); +#ifdef USE_MMAP +int gz_compress_mmap OF((FILE *in, gzFile out)); +#endif +void gz_uncompress OF((gzFile in, FILE *out)); +void file_compress OF((char *file, char *mode)); +void file_uncompress OF((char *file)); +int main OF((int argc, char *argv[])); + +/* =========================================================================== + * Display error message and exit + */ +void error(msg) + const char *msg; +{ + fprintf(stderr, "%s: %s\n", prog, msg); + exit(1); +} + +/* =========================================================================== + * Compress input to output then close both files. + */ + +void gz_compress(in, out) + FILE *in; + gzFile out; +{ + local char buf[BUFLEN]; + int len; + int err; + +#ifdef USE_MMAP + /* Try first compressing with mmap. If mmap fails (minigzip used in a + * pipe), use the normal fread loop. + */ + if (gz_compress_mmap(in, out) == Z_OK) return; +#endif + for (;;) { + len = fread(buf, 1, sizeof(buf), in); + if (ferror(in)) { + perror("fread"); + exit(1); + } + if (len == 0) break; + + if (gzwrite(out, buf, (unsigned)len) != len) error(gzerror(out, &err)); + } + fclose(in); + if (gzclose(out) != Z_OK) error("failed gzclose"); +} + +#ifdef USE_MMAP /* MMAP version, Miguel Albrecht */ + +/* Try compressing the input file at once using mmap. Return Z_OK if + * if success, Z_ERRNO otherwise. + */ +int gz_compress_mmap(in, out) + FILE *in; + gzFile out; +{ + int len; + int err; + int ifd = fileno(in); + caddr_t buf; /* mmap'ed buffer for the entire input file */ + off_t buf_len; /* length of the input file */ + struct stat sb; + + /* Determine the size of the file, needed for mmap: */ + if (fstat(ifd, &sb) < 0) return Z_ERRNO; + buf_len = sb.st_size; + if (buf_len <= 0) return Z_ERRNO; + + /* Now do the actual mmap: */ + buf = mmap((caddr_t) 0, buf_len, PROT_READ, MAP_SHARED, ifd, (off_t)0); + if (buf == (caddr_t)(-1)) return Z_ERRNO; + + /* Compress the whole file at once: */ + len = gzwrite(out, (char *)buf, (unsigned)buf_len); + + if (len != (int)buf_len) error(gzerror(out, &err)); + + munmap(buf, buf_len); + fclose(in); + if (gzclose(out) != Z_OK) error("failed gzclose"); + return Z_OK; +} +#endif /* USE_MMAP */ + +/* =========================================================================== + * Uncompress input to output then close both files. + */ +void gz_uncompress(in, out) + gzFile in; + FILE *out; +{ + local char buf[BUFLEN]; + int len; + int err; + + for (;;) { + len = gzread(in, buf, sizeof(buf)); + if (len < 0) error (gzerror(in, &err)); + if (len == 0) break; + + if ((int)fwrite(buf, 1, (unsigned)len, out) != len) { + error("failed fwrite"); + } + } + if (fclose(out)) error("failed fclose"); + + if (gzclose(in) != Z_OK) error("failed gzclose"); +} + + +/* =========================================================================== + * Compress the given file: create a corresponding .gz file and remove the + * original. + */ +void file_compress(file, mode) + char *file; + char *mode; +{ + local char outfile[MAX_NAME_LEN]; + FILE *in; + gzFile out; + + strcpy(outfile, file); + strcat(outfile, GZ_SUFFIX); + + in = fopen(file, "rb"); + if (in == NULL) { + perror(file); + exit(1); + } + out = gzopen(outfile, mode); + if (out == NULL) { + fprintf(stderr, "%s: can't gzopen %s\n", prog, outfile); + exit(1); + } + gz_compress(in, out); + + unlink(file); +} + + +/* =========================================================================== + * Uncompress the given file and remove the original. + */ +void file_uncompress(file) + char *file; +{ + local char buf[MAX_NAME_LEN]; + char *infile, *outfile; + FILE *out; + gzFile in; + int len = strlen(file); + + strcpy(buf, file); + + if (len > SUFFIX_LEN && strcmp(file+len-SUFFIX_LEN, GZ_SUFFIX) == 0) { + infile = file; + outfile = buf; + outfile[len-3] = '\0'; + } else { + outfile = file; + infile = buf; + strcat(infile, GZ_SUFFIX); + } + in = gzopen(infile, "rb"); + if (in == NULL) { + fprintf(stderr, "%s: can't gzopen %s\n", prog, infile); + exit(1); + } + out = fopen(outfile, "wb"); + if (out == NULL) { + perror(file); + exit(1); + } + + gz_uncompress(in, out); + + unlink(infile); +} + + +/* =========================================================================== + * Usage: minigzip [-d] [-f] [-h] [-1 to -9] [files...] + * -d : decompress + * -f : compress with Z_FILTERED + * -h : compress with Z_HUFFMAN_ONLY + * -1 to -9 : compression level + */ + +int main(argc, argv) + int argc; + char *argv[]; +{ + int uncompr = 0; + gzFile file; + char outmode[20]; + + strcpy(outmode, "wb6 "); + + prog = argv[0]; + argc--, argv++; + + while (argc > 0) { + if (strcmp(*argv, "-d") == 0) + uncompr = 1; + else if (strcmp(*argv, "-f") == 0) + outmode[3] = 'f'; + else if (strcmp(*argv, "-h") == 0) + outmode[3] = 'h'; + else if ((*argv)[0] == '-' && (*argv)[1] >= '1' && (*argv)[1] <= '9' && + (*argv)[2] == 0) + outmode[2] = (*argv)[1]; + else + break; + argc--, argv++; + } + if (argc == 0) { + SET_BINARY_MODE(stdin); + SET_BINARY_MODE(stdout); + if (uncompr) { + file = gzdopen(fileno(stdin), "rb"); + if (file == NULL) error("can't gzdopen stdin"); + gz_uncompress(file, stdout); + } else { + file = gzdopen(fileno(stdout), outmode); + if (file == NULL) error("can't gzdopen stdout"); + gz_compress(stdin, file); + } + } else { + do { + if (uncompr) { + file_uncompress(*argv); + } else { + file_compress(*argv, outmode); + } + } while (argv++, --argc); + } + exit(0); + return 0; /* to avoid warning */ +} diff --git a/packages/services/compress/zlib/current/src/trees.c b/packages/services/compress/zlib/current/src/trees.c new file mode 100644 --- /dev/null +++ b/packages/services/compress/zlib/current/src/trees.c @@ -0,0 +1,1214 @@ +/* trees.c -- output deflated data using Huffman coding + * Copyright (C) 1995-1998 Jean-loup Gailly + * For conditions of distribution and use, see copyright notice in zlib.h + */ + +/* + * ALGORITHM + * + * The "deflation" process uses several Huffman trees. The more + * common source values are represented by shorter bit sequences. + * + * Each code tree is stored in a compressed form which is itself + * a Huffman encoding of the lengths of all the code strings (in + * ascending order by source values). The actual code strings are + * reconstructed from the lengths in the inflate process, as described + * in the deflate specification. + * + * REFERENCES + * + * Deutsch, L.P.,"'Deflate' Compressed Data Format Specification". + * Available in ftp.uu.net:/pub/archiving/zip/doc/deflate-1.1.doc + * + * Storer, James A. + * Data Compression: Methods and Theory, pp. 49-50. + * Computer Science Press, 1988. ISBN 0-7167-8156-5. + * + * Sedgewick, R. + * Algorithms, p290. + * Addison-Wesley, 1983. ISBN 0-201-06672-6. + */ + +/* @(#) $Id$ */ + +/* #define GEN_TREES_H */ + +#include "deflate.h" + +#ifdef DEBUG +# include +#endif + +/* =========================================================================== + * Constants + */ + +#define MAX_BL_BITS 7 +/* Bit length codes must not exceed MAX_BL_BITS bits */ + +#define END_BLOCK 256 +/* end of block literal code */ + +#define REP_3_6 16 +/* repeat previous bit length 3-6 times (2 bits of repeat count) */ + +#define REPZ_3_10 17 +/* repeat a zero length 3-10 times (3 bits of repeat count) */ + +#define REPZ_11_138 18 +/* repeat a zero length 11-138 times (7 bits of repeat count) */ + +local const int extra_lbits[LENGTH_CODES] /* extra bits for each length code */ + = {0,0,0,0,0,0,0,0,1,1,1,1,2,2,2,2,3,3,3,3,4,4,4,4,5,5,5,5,0}; + +local const int extra_dbits[D_CODES] /* extra bits for each distance code */ + = {0,0,0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7,8,8,9,9,10,10,11,11,12,12,13,13}; + +local const int extra_blbits[BL_CODES]/* extra bits for each bit length code */ + = {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,2,3,7}; + +local const uch bl_order[BL_CODES] + = {16,17,18,0,8,7,9,6,10,5,11,4,12,3,13,2,14,1,15}; +/* The lengths of the bit length codes are sent in order of decreasing + * probability, to avoid transmitting the lengths for unused bit length codes. + */ + +#define Buf_size (8 * 2*sizeof(char)) +/* Number of bits used within bi_buf. (bi_buf might be implemented on + * more than 16 bits on some systems.) + */ + +/* =========================================================================== + * Local data. These are initialized only once. + */ + +#define DIST_CODE_LEN 512 /* see definition of array dist_code below */ + +#if defined(GEN_TREES_H) || !defined(STDC) +/* non ANSI compilers may not accept trees.h */ + +local ct_data static_ltree[L_CODES+2]; +/* The static literal tree. Since the bit lengths are imposed, there is no + * need for the L_CODES extra codes used during heap construction. However + * The codes 286 and 287 are needed to build a canonical tree (see _tr_init + * below). + */ + +local ct_data static_dtree[D_CODES]; +/* The static distance tree. (Actually a trivial tree since all codes use + * 5 bits.) + */ + +uch _dist_code[DIST_CODE_LEN]; +/* Distance codes. The first 256 values correspond to the distances + * 3 .. 258, the last 256 values correspond to the top 8 bits of + * the 15 bit distances. + */ + +uch _length_code[MAX_MATCH-MIN_MATCH+1]; +/* length code for each normalized match length (0 == MIN_MATCH) */ + +local int base_length[LENGTH_CODES]; +/* First normalized length for each code (0 = MIN_MATCH) */ + +local int base_dist[D_CODES]; +/* First normalized distance for each code (0 = distance of 1) */ + +#else +# include "trees.h" +#endif /* GEN_TREES_H */ + +struct static_tree_desc_s { + const ct_data *static_tree; /* static tree or NULL */ + const intf *extra_bits; /* extra bits for each code or NULL */ + int extra_base; /* base index for extra_bits */ + int elems; /* max number of elements in the tree */ + int max_length; /* max bit length for the codes */ +}; + +local static_tree_desc static_l_desc = +{static_ltree, extra_lbits, LITERALS+1, L_CODES, MAX_BITS}; + +local static_tree_desc static_d_desc = +{static_dtree, extra_dbits, 0, D_CODES, MAX_BITS}; + +local static_tree_desc static_bl_desc = +{(const ct_data *)0, extra_blbits, 0, BL_CODES, MAX_BL_BITS}; + +/* =========================================================================== + * Local (static) routines in this file. + */ + +local void tr_static_init OF((void)); +local void init_block OF((deflate_state *s)); +local void pqdownheap OF((deflate_state *s, ct_data *tree, int k)); +local void gen_bitlen OF((deflate_state *s, tree_desc *desc)); +local void gen_codes OF((ct_data *tree, int max_code, ushf *bl_count)); +local void build_tree OF((deflate_state *s, tree_desc *desc)); +local void scan_tree OF((deflate_state *s, ct_data *tree, int max_code)); +local void send_tree OF((deflate_state *s, ct_data *tree, int max_code)); +local int build_bl_tree OF((deflate_state *s)); +local void send_all_trees OF((deflate_state *s, int lcodes, int dcodes, + int blcodes)); +local void compress_block OF((deflate_state *s, ct_data *ltree, + ct_data *dtree)); +local void set_data_type OF((deflate_state *s)); +local unsigned bi_reverse OF((unsigned value, int length)); +local void bi_windup OF((deflate_state *s)); +local void bi_flush OF((deflate_state *s)); +local void copy_block OF((deflate_state *s, charf *buf, unsigned len, + int header)); + +#ifdef GEN_TREES_H +local void gen_trees_header OF((void)); +#endif + +#ifndef DEBUG +# define send_code(s, c, tree) send_bits(s, tree[c].Code, tree[c].Len) + /* Send a code of the given tree. c and tree must not have side effects */ + +#else /* DEBUG */ +# define send_code(s, c, tree) \ + { if (z_verbose>2) fprintf(stderr,"\ncd %3d ",(c)); \ + send_bits(s, tree[c].Code, tree[c].Len); } +#endif + +/* =========================================================================== + * Output a short LSB first on the stream. + * IN assertion: there is enough room in pendingBuf. + */ +#define put_short(s, w) { \ + put_byte(s, (uch)((w) & 0xff)); \ + put_byte(s, (uch)((ush)(w) >> 8)); \ +} + +/* =========================================================================== + * Send a value on a given number of bits. + * IN assertion: length <= 16 and value fits in length bits. + */ +#ifdef DEBUG +local void send_bits OF((deflate_state *s, int value, int length)); + +local void send_bits(s, value, length) + deflate_state *s; + int value; /* value to send */ + int length; /* number of bits */ +{ + Tracevv((stderr," l %2d v %4x ", length, value)); + Assert(length > 0 && length <= 15, "invalid length"); + s->bits_sent += (ulg)length; + + /* If not enough room in bi_buf, use (valid) bits from bi_buf and + * (16 - bi_valid) bits from value, leaving (width - (16-bi_valid)) + * unused bits in value. + */ + if (s->bi_valid > (int)Buf_size - length) { + s->bi_buf |= (value << s->bi_valid); + put_short(s, s->bi_buf); + s->bi_buf = (ush)value >> (Buf_size - s->bi_valid); + s->bi_valid += length - Buf_size; + } else { + s->bi_buf |= value << s->bi_valid; + s->bi_valid += length; + } +} +#else /* !DEBUG */ + +#define send_bits(s, value, length) \ +{ int len = length;\ + if (s->bi_valid > (int)Buf_size - len) {\ + int val = value;\ + s->bi_buf |= (val << s->bi_valid);\ + put_short(s, s->bi_buf);\ + s->bi_buf = (ush)val >> (Buf_size - s->bi_valid);\ + s->bi_valid += len - Buf_size;\ + } else {\ + s->bi_buf |= (value) << s->bi_valid;\ + s->bi_valid += len;\ + }\ +} +#endif /* DEBUG */ + + +#define MAX(a,b) (a >= b ? a : b) +/* the arguments must not have side effects */ + +/* =========================================================================== + * Initialize the various 'constant' tables. + */ +local void tr_static_init() +{ +#if defined(GEN_TREES_H) || !defined(STDC) + static int static_init_done = 0; + int n; /* iterates over tree elements */ + int bits; /* bit counter */ + int length; /* length value */ + int code; /* code value */ + int dist; /* distance index */ + ush bl_count[MAX_BITS+1]; + /* number of codes at each bit length for an optimal tree */ + + if (static_init_done) return; + + /* For some embedded targets, global variables are not initialized: */ + static_l_desc.static_tree = static_ltree; + static_l_desc.extra_bits = extra_lbits; + static_d_desc.static_tree = static_dtree; + static_d_desc.extra_bits = extra_dbits; + static_bl_desc.extra_bits = extra_blbits; + + /* Initialize the mapping length (0..255) -> length code (0..28) */ + length = 0; + for (code = 0; code < LENGTH_CODES-1; code++) { + base_length[code] = length; + for (n = 0; n < (1< dist code (0..29) */ + dist = 0; + for (code = 0 ; code < 16; code++) { + base_dist[code] = dist; + for (n = 0; n < (1<>= 7; /* from now on, all distances are divided by 128 */ + for ( ; code < D_CODES; code++) { + base_dist[code] = dist << 7; + for (n = 0; n < (1<<(extra_dbits[code]-7)); n++) { + _dist_code[256 + dist++] = (uch)code; + } + } + Assert (dist == 256, "tr_static_init: 256+dist != 512"); + + /* Construct the codes of the static literal tree */ + for (bits = 0; bits <= MAX_BITS; bits++) bl_count[bits] = 0; + n = 0; + while (n <= 143) static_ltree[n++].Len = 8, bl_count[8]++; + while (n <= 255) static_ltree[n++].Len = 9, bl_count[9]++; + while (n <= 279) static_ltree[n++].Len = 7, bl_count[7]++; + while (n <= 287) static_ltree[n++].Len = 8, bl_count[8]++; + /* Codes 286 and 287 do not exist, but we must include them in the + * tree construction to get a canonical Huffman tree (longest code + * all ones) + */ + gen_codes((ct_data *)static_ltree, L_CODES+1, bl_count); + + /* The static distance tree is trivial: */ + for (n = 0; n < D_CODES; n++) { + static_dtree[n].Len = 5; + static_dtree[n].Code = bi_reverse((unsigned)n, 5); + } + static_init_done = 1; + +# ifdef GEN_TREES_H + gen_trees_header(); +# endif +#endif /* defined(GEN_TREES_H) || !defined(STDC) */ +} + +/* =========================================================================== + * Genererate the file trees.h describing the static trees. + */ +#ifdef GEN_TREES_H +# ifndef DEBUG +# include +# endif + +# define SEPARATOR(i, last, width) \ + ((i) == (last)? "\n};\n\n" : \ + ((i) % (width) == (width)-1 ? ",\n" : ", ")) + +void gen_trees_header() +{ + FILE *header = fopen("trees.h", "w"); + int i; + + Assert (header != NULL, "Can't open trees.h"); + fprintf(header, + "/* header created automatically with -DGEN_TREES_H */\n\n"); + + fprintf(header, "local const ct_data static_ltree[L_CODES+2] = {\n"); + for (i = 0; i < L_CODES+2; i++) { + fprintf(header, "{{%3u},{%3u}}%s", static_ltree[i].Code, + static_ltree[i].Len, SEPARATOR(i, L_CODES+1, 5)); + } + + fprintf(header, "local const ct_data static_dtree[D_CODES] = {\n"); + for (i = 0; i < D_CODES; i++) { + fprintf(header, "{{%2u},{%2u}}%s", static_dtree[i].Code, + static_dtree[i].Len, SEPARATOR(i, D_CODES-1, 5)); + } + + fprintf(header, "const uch _dist_code[DIST_CODE_LEN] = {\n"); + for (i = 0; i < DIST_CODE_LEN; i++) { + fprintf(header, "%2u%s", _dist_code[i], + SEPARATOR(i, DIST_CODE_LEN-1, 20)); + } + + fprintf(header, "const uch _length_code[MAX_MATCH-MIN_MATCH+1]= {\n"); + for (i = 0; i < MAX_MATCH-MIN_MATCH+1; i++) { + fprintf(header, "%2u%s", _length_code[i], + SEPARATOR(i, MAX_MATCH-MIN_MATCH, 20)); + } + + fprintf(header, "local const int base_length[LENGTH_CODES] = {\n"); + for (i = 0; i < LENGTH_CODES; i++) { + fprintf(header, "%1u%s", base_length[i], + SEPARATOR(i, LENGTH_CODES-1, 20)); + } + + fprintf(header, "local const int base_dist[D_CODES] = {\n"); + for (i = 0; i < D_CODES; i++) { + fprintf(header, "%5u%s", base_dist[i], + SEPARATOR(i, D_CODES-1, 10)); + } + + fclose(header); +} +#endif /* GEN_TREES_H */ + +/* =========================================================================== + * Initialize the tree data structures for a new zlib stream. + */ +void _tr_init(s) + deflate_state *s; +{ + tr_static_init(); + + s->l_desc.dyn_tree = s->dyn_ltree; + s->l_desc.stat_desc = &static_l_desc; + + s->d_desc.dyn_tree = s->dyn_dtree; + s->d_desc.stat_desc = &static_d_desc; + + s->bl_desc.dyn_tree = s->bl_tree; + s->bl_desc.stat_desc = &static_bl_desc; + + s->bi_buf = 0; + s->bi_valid = 0; + s->last_eob_len = 8; /* enough lookahead for inflate */ +#ifdef DEBUG + s->compressed_len = 0L; + s->bits_sent = 0L; +#endif + + /* Initialize the first block of the first file: */ + init_block(s); +} + +/* =========================================================================== + * Initialize a new block. + */ +local void init_block(s) + deflate_state *s; +{ + int n; /* iterates over tree elements */ + + /* Initialize the trees. */ + for (n = 0; n < L_CODES; n++) s->dyn_ltree[n].Freq = 0; + for (n = 0; n < D_CODES; n++) s->dyn_dtree[n].Freq = 0; + for (n = 0; n < BL_CODES; n++) s->bl_tree[n].Freq = 0; + + s->dyn_ltree[END_BLOCK].Freq = 1; + s->opt_len = s->static_len = 0L; + s->last_lit = s->matches = 0; +} + +#define SMALLEST 1 +/* Index within the heap array of least frequent node in the Huffman tree */ + + +/* =========================================================================== + * Remove the smallest element from the heap and recreate the heap with + * one less element. Updates heap and heap_len. + */ +#define pqremove(s, tree, top) \ +{\ + top = s->heap[SMALLEST]; \ + s->heap[SMALLEST] = s->heap[s->heap_len--]; \ + pqdownheap(s, tree, SMALLEST); \ +} + +/* =========================================================================== + * Compares to subtrees, using the tree depth as tie breaker when + * the subtrees have equal frequency. This minimizes the worst case length. + */ +#define smaller(tree, n, m, depth) \ + (tree[n].Freq < tree[m].Freq || \ + (tree[n].Freq == tree[m].Freq && depth[n] <= depth[m])) + +/* =========================================================================== + * Restore the heap property by moving down the tree starting at node k, + * exchanging a node with the smallest of its two sons if necessary, stopping + * when the heap property is re-established (each father smaller than its + * two sons). + */ +local void pqdownheap(s, tree, k) + deflate_state *s; + ct_data *tree; /* the tree to restore */ + int k; /* node to move down */ +{ + int v = s->heap[k]; + int j = k << 1; /* left son of k */ + while (j <= s->heap_len) { + /* Set j to the smallest of the two sons: */ + if (j < s->heap_len && + smaller(tree, s->heap[j+1], s->heap[j], s->depth)) { + j++; + } + /* Exit if v is smaller than both sons */ + if (smaller(tree, v, s->heap[j], s->depth)) break; + + /* Exchange v with the smallest son */ + s->heap[k] = s->heap[j]; k = j; + + /* And continue down the tree, setting j to the left son of k */ + j <<= 1; + } + s->heap[k] = v; +} + +/* =========================================================================== + * Compute the optimal bit lengths for a tree and update the total bit length + * for the current block. + * IN assertion: the fields freq and dad are set, heap[heap_max] and + * above are the tree nodes sorted by increasing frequency. + * OUT assertions: the field len is set to the optimal bit length, the + * array bl_count contains the frequencies for each bit length. + * The length opt_len is updated; static_len is also updated if stree is + * not null. + */ +local void gen_bitlen(s, desc) + deflate_state *s; + tree_desc *desc; /* the tree descriptor */ +{ + ct_data *tree = desc->dyn_tree; + int max_code = desc->max_code; + const ct_data *stree = desc->stat_desc->static_tree; + const intf *extra = desc->stat_desc->extra_bits; + int base = desc->stat_desc->extra_base; + int max_length = desc->stat_desc->max_length; + int h; /* heap index */ + int n, m; /* iterate over the tree elements */ + int bits; /* bit length */ + int xbits; /* extra bits */ + ush f; /* frequency */ + int overflow = 0; /* number of elements with bit length too large */ + + for (bits = 0; bits <= MAX_BITS; bits++) s->bl_count[bits] = 0; + + /* In a first pass, compute the optimal bit lengths (which may + * overflow in the case of the bit length tree). + */ + tree[s->heap[s->heap_max]].Len = 0; /* root of the heap */ + + for (h = s->heap_max+1; h < HEAP_SIZE; h++) { + n = s->heap[h]; + bits = tree[tree[n].Dad].Len + 1; + if (bits > max_length) bits = max_length, overflow++; + tree[n].Len = (ush)bits; + /* We overwrite tree[n].Dad which is no longer needed */ + + if (n > max_code) continue; /* not a leaf node */ + + s->bl_count[bits]++; + xbits = 0; + if (n >= base) xbits = extra[n-base]; + f = tree[n].Freq; + s->opt_len += (ulg)f * (bits + xbits); + if (stree) s->static_len += (ulg)f * (stree[n].Len + xbits); + } + if (overflow == 0) return; + + Trace((stderr,"\nbit length overflow\n")); + /* This happens for example on obj2 and pic of the Calgary corpus */ + + /* Find the first bit length which could increase: */ + do { + bits = max_length-1; + while (s->bl_count[bits] == 0) bits--; + s->bl_count[bits]--; /* move one leaf down the tree */ + s->bl_count[bits+1] += 2; /* move one overflow item as its brother */ + s->bl_count[max_length]--; + /* The brother of the overflow item also moves one step up, + * but this does not affect bl_count[max_length] + */ + overflow -= 2; + } while (overflow > 0); + + /* Now recompute all bit lengths, scanning in increasing frequency. + * h is still equal to HEAP_SIZE. (It is simpler to reconstruct all + * lengths instead of fixing only the wrong ones. This idea is taken + * from 'ar' written by Haruhiko Okumura.) + */ + for (bits = max_length; bits != 0; bits--) { + n = s->bl_count[bits]; + while (n != 0) { + m = s->heap[--h]; + if (m > max_code) continue; + if (tree[m].Len != (unsigned) bits) { + Trace((stderr,"code %d bits %d->%d\n", m, tree[m].Len, bits)); + s->opt_len += ((long)bits - (long)tree[m].Len) + *(long)tree[m].Freq; + tree[m].Len = (ush)bits; + } + n--; + } + } +} + +/* =========================================================================== + * Generate the codes for a given tree and bit counts (which need not be + * optimal). + * IN assertion: the array bl_count contains the bit length statistics for + * the given tree and the field len is set for all tree elements. + * OUT assertion: the field code is set for all tree elements of non + * zero code length. + */ +local void gen_codes (tree, max_code, bl_count) + ct_data *tree; /* the tree to decorate */ + int max_code; /* largest code with non zero frequency */ + ushf *bl_count; /* number of codes at each bit length */ +{ + ush next_code[MAX_BITS+1]; /* next code value for each bit length */ + ush code = 0; /* running code value */ + int bits; /* bit index */ + int n; /* code index */ + + /* The distribution counts are first used to generate the code values + * without bit reversal. + */ + for (bits = 1; bits <= MAX_BITS; bits++) { + next_code[bits] = code = (code + bl_count[bits-1]) << 1; + } + /* Check that the bit counts in bl_count are consistent. The last code + * must be all ones. + */ + Assert (code + bl_count[MAX_BITS]-1 == (1<dyn_tree; + const ct_data *stree = desc->stat_desc->static_tree; + int elems = desc->stat_desc->elems; + int n, m; /* iterate over heap elements */ + int max_code = -1; /* largest code with non zero frequency */ + int node; /* new node being created */ + + /* Construct the initial heap, with least frequent element in + * heap[SMALLEST]. The sons of heap[n] are heap[2*n] and heap[2*n+1]. + * heap[0] is not used. + */ + s->heap_len = 0, s->heap_max = HEAP_SIZE; + + for (n = 0; n < elems; n++) { + if (tree[n].Freq != 0) { + s->heap[++(s->heap_len)] = max_code = n; + s->depth[n] = 0; + } else { + tree[n].Len = 0; + } + } + + /* The pkzip format requires that at least one distance code exists, + * and that at least one bit should be sent even if there is only one + * possible code. So to avoid special checks later on we force at least + * two codes of non zero frequency. + */ + while (s->heap_len < 2) { + node = s->heap[++(s->heap_len)] = (max_code < 2 ? ++max_code : 0); + tree[node].Freq = 1; + s->depth[node] = 0; + s->opt_len--; if (stree) s->static_len -= stree[node].Len; + /* node is 0 or 1 so it does not have extra bits */ + } + desc->max_code = max_code; + + /* The elements heap[heap_len/2+1 .. heap_len] are leaves of the tree, + * establish sub-heaps of increasing lengths: + */ + for (n = s->heap_len/2; n >= 1; n--) pqdownheap(s, tree, n); + + /* Construct the Huffman tree by repeatedly combining the least two + * frequent nodes. + */ + node = elems; /* next internal node of the tree */ + do { + pqremove(s, tree, n); /* n = node of least frequency */ + m = s->heap[SMALLEST]; /* m = node of next least frequency */ + + s->heap[--(s->heap_max)] = n; /* keep the nodes sorted by frequency */ + s->heap[--(s->heap_max)] = m; + + /* Create a new node father of n and m */ + tree[node].Freq = tree[n].Freq + tree[m].Freq; + s->depth[node] = (uch) (MAX(s->depth[n], s->depth[m]) + 1); + tree[n].Dad = tree[m].Dad = (ush)node; +#ifdef DUMP_BL_TREE + if (tree == s->bl_tree) { + fprintf(stderr,"\nnode %d(%d), sons %d(%d) %d(%d)", + node, tree[node].Freq, n, tree[n].Freq, m, tree[m].Freq); + } +#endif + /* and insert the new node in the heap */ + s->heap[SMALLEST] = node++; + pqdownheap(s, tree, SMALLEST); + + } while (s->heap_len >= 2); + + s->heap[--(s->heap_max)] = s->heap[SMALLEST]; + + /* At this point, the fields freq and dad are set. We can now + * generate the bit lengths. + */ + gen_bitlen(s, (tree_desc *)desc); + + /* The field len is now set, we can generate the bit codes */ + gen_codes ((ct_data *)tree, max_code, s->bl_count); +} + +/* =========================================================================== + * Scan a literal or distance tree to determine the frequencies of the codes + * in the bit length tree. + */ +local void scan_tree (s, tree, max_code) + deflate_state *s; + ct_data *tree; /* the tree to be scanned */ + int max_code; /* and its largest code of non zero frequency */ +{ + int n; /* iterates over all tree elements */ + int prevlen = -1; /* last emitted length */ + int curlen; /* length of current code */ + int nextlen = tree[0].Len; /* length of next code */ + int count = 0; /* repeat count of the current code */ + int max_count = 7; /* max repeat count */ + int min_count = 4; /* min repeat count */ + + if (nextlen == 0) max_count = 138, min_count = 3; + tree[max_code+1].Len = (ush)0xffff; /* guard */ + + for (n = 0; n <= max_code; n++) { + curlen = nextlen; nextlen = tree[n+1].Len; + if (++count < max_count && curlen == nextlen) { + continue; + } else if (count < min_count) { + s->bl_tree[curlen].Freq += count; + } else if (curlen != 0) { + if (curlen != prevlen) s->bl_tree[curlen].Freq++; + s->bl_tree[REP_3_6].Freq++; + } else if (count <= 10) { + s->bl_tree[REPZ_3_10].Freq++; + } else { + s->bl_tree[REPZ_11_138].Freq++; + } + count = 0; prevlen = curlen; + if (nextlen == 0) { + max_count = 138, min_count = 3; + } else if (curlen == nextlen) { + max_count = 6, min_count = 3; + } else { + max_count = 7, min_count = 4; + } + } +} + +/* =========================================================================== + * Send a literal or distance tree in compressed form, using the codes in + * bl_tree. + */ +local void send_tree (s, tree, max_code) + deflate_state *s; + ct_data *tree; /* the tree to be scanned */ + int max_code; /* and its largest code of non zero frequency */ +{ + int n; /* iterates over all tree elements */ + int prevlen = -1; /* last emitted length */ + int curlen; /* length of current code */ + int nextlen = tree[0].Len; /* length of next code */ + int count = 0; /* repeat count of the current code */ + int max_count = 7; /* max repeat count */ + int min_count = 4; /* min repeat count */ + + /* tree[max_code+1].Len = -1; */ /* guard already set */ + if (nextlen == 0) max_count = 138, min_count = 3; + + for (n = 0; n <= max_code; n++) { + curlen = nextlen; nextlen = tree[n+1].Len; + if (++count < max_count && curlen == nextlen) { + continue; + } else if (count < min_count) { + do { send_code(s, curlen, s->bl_tree); } while (--count != 0); + + } else if (curlen != 0) { + if (curlen != prevlen) { + send_code(s, curlen, s->bl_tree); count--; + } + Assert(count >= 3 && count <= 6, " 3_6?"); + send_code(s, REP_3_6, s->bl_tree); send_bits(s, count-3, 2); + + } else if (count <= 10) { + send_code(s, REPZ_3_10, s->bl_tree); send_bits(s, count-3, 3); + + } else { + send_code(s, REPZ_11_138, s->bl_tree); send_bits(s, count-11, 7); + } + count = 0; prevlen = curlen; + if (nextlen == 0) { + max_count = 138, min_count = 3; + } else if (curlen == nextlen) { + max_count = 6, min_count = 3; + } else { + max_count = 7, min_count = 4; + } + } +} + +/* =========================================================================== + * Construct the Huffman tree for the bit lengths and return the index in + * bl_order of the last bit length code to send. + */ +local int build_bl_tree(s) + deflate_state *s; +{ + int max_blindex; /* index of last bit length code of non zero freq */ + + /* Determine the bit length frequencies for literal and distance trees */ + scan_tree(s, (ct_data *)s->dyn_ltree, s->l_desc.max_code); + scan_tree(s, (ct_data *)s->dyn_dtree, s->d_desc.max_code); + + /* Build the bit length tree: */ + build_tree(s, (tree_desc *)(&(s->bl_desc))); + /* opt_len now includes the length of the tree representations, except + * the lengths of the bit lengths codes and the 5+5+4 bits for the counts. + */ + + /* Determine the number of bit length codes to send. The pkzip format + * requires that at least 4 bit length codes be sent. (appnote.txt says + * 3 but the actual value used is 4.) + */ + for (max_blindex = BL_CODES-1; max_blindex >= 3; max_blindex--) { + if (s->bl_tree[bl_order[max_blindex]].Len != 0) break; + } + /* Update opt_len to include the bit length tree and counts */ + s->opt_len += 3*(max_blindex+1) + 5+5+4; + Tracev((stderr, "\ndyn trees: dyn %ld, stat %ld", + s->opt_len, s->static_len)); + + return max_blindex; +} + +/* =========================================================================== + * Send the header for a block using dynamic Huffman trees: the counts, the + * lengths of the bit length codes, the literal tree and the distance tree. + * IN assertion: lcodes >= 257, dcodes >= 1, blcodes >= 4. + */ +local void send_all_trees(s, lcodes, dcodes, blcodes) + deflate_state *s; + int lcodes, dcodes, blcodes; /* number of codes for each tree */ +{ + int rank; /* index in bl_order */ + + Assert (lcodes >= 257 && dcodes >= 1 && blcodes >= 4, "not enough codes"); + Assert (lcodes <= L_CODES && dcodes <= D_CODES && blcodes <= BL_CODES, + "too many codes"); + Tracev((stderr, "\nbl counts: ")); + send_bits(s, lcodes-257, 5); /* not +255 as stated in appnote.txt */ + send_bits(s, dcodes-1, 5); + send_bits(s, blcodes-4, 4); /* not -3 as stated in appnote.txt */ + for (rank = 0; rank < blcodes; rank++) { + Tracev((stderr, "\nbl code %2d ", bl_order[rank])); + send_bits(s, s->bl_tree[bl_order[rank]].Len, 3); + } + Tracev((stderr, "\nbl tree: sent %ld", s->bits_sent)); + + send_tree(s, (ct_data *)s->dyn_ltree, lcodes-1); /* literal tree */ + Tracev((stderr, "\nlit tree: sent %ld", s->bits_sent)); + + send_tree(s, (ct_data *)s->dyn_dtree, dcodes-1); /* distance tree */ + Tracev((stderr, "\ndist tree: sent %ld", s->bits_sent)); +} + +/* =========================================================================== + * Send a stored block + */ +void _tr_stored_block(s, buf, stored_len, eof) + deflate_state *s; + charf *buf; /* input block */ + ulg stored_len; /* length of input block */ + int eof; /* true if this is the last block for a file */ +{ + send_bits(s, (STORED_BLOCK<<1)+eof, 3); /* send block type */ +#ifdef DEBUG + s->compressed_len = (s->compressed_len + 3 + 7) & (ulg)~7L; + s->compressed_len += (stored_len + 4) << 3; +#endif + copy_block(s, buf, (unsigned)stored_len, 1); /* with header */ +} + +/* =========================================================================== + * Send one empty static block to give enough lookahead for inflate. + * This takes 10 bits, of which 7 may remain in the bit buffer. + * The current inflate code requires 9 bits of lookahead. If the + * last two codes for the previous block (real code plus EOB) were coded + * on 5 bits or less, inflate may have only 5+3 bits of lookahead to decode + * the last real code. In this case we send two empty static blocks instead + * of one. (There are no problems if the previous block is stored or fixed.) + * To simplify the code, we assume the worst case of last real code encoded + * on one bit only. + */ +void _tr_align(s) + deflate_state *s; +{ + send_bits(s, STATIC_TREES<<1, 3); + send_code(s, END_BLOCK, static_ltree); +#ifdef DEBUG + s->compressed_len += 10L; /* 3 for block type, 7 for EOB */ +#endif + bi_flush(s); + /* Of the 10 bits for the empty block, we have already sent + * (10 - bi_valid) bits. The lookahead for the last real code (before + * the EOB of the previous block) was thus at least one plus the length + * of the EOB plus what we have just sent of the empty static block. + */ + if (1 + s->last_eob_len + 10 - s->bi_valid < 9) { + send_bits(s, STATIC_TREES<<1, 3); + send_code(s, END_BLOCK, static_ltree); +#ifdef DEBUG + s->compressed_len += 10L; +#endif + bi_flush(s); + } + s->last_eob_len = 7; +} + +/* =========================================================================== + * Determine the best encoding for the current block: dynamic trees, static + * trees or store, and output the encoded block to the zip file. + */ +void _tr_flush_block(s, buf, stored_len, eof) + deflate_state *s; + charf *buf; /* input block, or NULL if too old */ + ulg stored_len; /* length of input block */ + int eof; /* true if this is the last block for a file */ +{ + ulg opt_lenb, static_lenb; /* opt_len and static_len in bytes */ + int max_blindex = 0; /* index of last bit length code of non zero freq */ + + /* Build the Huffman trees unless a stored block is forced */ + if (s->level > 0) { + + /* Check if the file is ascii or binary */ + if (s->data_type == Z_UNKNOWN) set_data_type(s); + + /* Construct the literal and distance trees */ + build_tree(s, (tree_desc *)(&(s->l_desc))); + Tracev((stderr, "\nlit data: dyn %ld, stat %ld", s->opt_len, + s->static_len)); + + build_tree(s, (tree_desc *)(&(s->d_desc))); + Tracev((stderr, "\ndist data: dyn %ld, stat %ld", s->opt_len, + s->static_len)); + /* At this point, opt_len and static_len are the total bit lengths of + * the compressed block data, excluding the tree representations. + */ + + /* Build the bit length tree for the above two trees, and get the index + * in bl_order of the last bit length code to send. + */ + max_blindex = build_bl_tree(s); + + /* Determine the best encoding. Compute first the block length in bytes*/ + opt_lenb = (s->opt_len+3+7)>>3; + static_lenb = (s->static_len+3+7)>>3; + + Tracev((stderr, "\nopt %lu(%lu) stat %lu(%lu) stored %lu lit %u ", + opt_lenb, s->opt_len, static_lenb, s->static_len, stored_len, + s->last_lit)); + + if (static_lenb <= opt_lenb) opt_lenb = static_lenb; + + } else { + Assert(buf != (char*)0, "lost buf"); + opt_lenb = static_lenb = stored_len + 5; /* force a stored block */ + } + +#ifdef FORCE_STORED + if (buf != (char*)0) { /* force stored block */ +#else + if (stored_len+4 <= opt_lenb && buf != (char*)0) { + /* 4: two words for the lengths */ +#endif + /* The test buf != NULL is only necessary if LIT_BUFSIZE > WSIZE. + * Otherwise we can't have processed more than WSIZE input bytes since + * the last block flush, because compression would have been + * successful. If LIT_BUFSIZE <= WSIZE, it is never too late to + * transform a block into a stored block. + */ + _tr_stored_block(s, buf, stored_len, eof); + +#ifdef FORCE_STATIC + } else if (static_lenb >= 0) { /* force static trees */ +#else + } else if (static_lenb == opt_lenb) { +#endif + send_bits(s, (STATIC_TREES<<1)+eof, 3); + compress_block(s, (ct_data *)static_ltree, (ct_data *)static_dtree); +#ifdef DEBUG + s->compressed_len += 3 + s->static_len; +#endif + } else { + send_bits(s, (DYN_TREES<<1)+eof, 3); + send_all_trees(s, s->l_desc.max_code+1, s->d_desc.max_code+1, + max_blindex+1); + compress_block(s, (ct_data *)s->dyn_ltree, (ct_data *)s->dyn_dtree); +#ifdef DEBUG + s->compressed_len += 3 + s->opt_len; +#endif + } + Assert (s->compressed_len == s->bits_sent, "bad compressed size"); + /* The above check is made mod 2^32, for files larger than 512 MB + * and uLong implemented on 32 bits. + */ + init_block(s); + + if (eof) { + bi_windup(s); +#ifdef DEBUG + s->compressed_len += 7; /* align on byte boundary */ +#endif + } + Tracev((stderr,"\ncomprlen %lu(%lu) ", s->compressed_len>>3, + s->compressed_len-7*eof)); +} + +/* =========================================================================== + * Save the match info and tally the frequency counts. Return true if + * the current block must be flushed. + */ +int _tr_tally (s, dist, lc) + deflate_state *s; + unsigned dist; /* distance of matched string */ + unsigned lc; /* match length-MIN_MATCH or unmatched char (if dist==0) */ +{ + s->d_buf[s->last_lit] = (ush)dist; + s->l_buf[s->last_lit++] = (uch)lc; + if (dist == 0) { + /* lc is the unmatched char */ + s->dyn_ltree[lc].Freq++; + } else { + s->matches++; + /* Here, lc is the match length - MIN_MATCH */ + dist--; /* dist = match distance - 1 */ + Assert((ush)dist < (ush)MAX_DIST(s) && + (ush)lc <= (ush)(MAX_MATCH-MIN_MATCH) && + (ush)d_code(dist) < (ush)D_CODES, "_tr_tally: bad match"); + + s->dyn_ltree[_length_code[lc]+LITERALS+1].Freq++; + s->dyn_dtree[d_code(dist)].Freq++; + } + +#ifdef TRUNCATE_BLOCK + /* Try to guess if it is profitable to stop the current block here */ + if ((s->last_lit & 0x1fff) == 0 && s->level > 2) { + /* Compute an upper bound for the compressed length */ + ulg out_length = (ulg)s->last_lit*8L; + ulg in_length = (ulg)((long)s->strstart - s->block_start); + int dcode; + for (dcode = 0; dcode < D_CODES; dcode++) { + out_length += (ulg)s->dyn_dtree[dcode].Freq * + (5L+extra_dbits[dcode]); + } + out_length >>= 3; + Tracev((stderr,"\nlast_lit %u, in %ld, out ~%ld(%ld%%) ", + s->last_lit, in_length, out_length, + 100L - out_length*100L/in_length)); + if (s->matches < s->last_lit/2 && out_length < in_length/2) return 1; + } +#endif + return (s->last_lit == s->lit_bufsize-1); + /* We avoid equality with lit_bufsize because of wraparound at 64K + * on 16 bit machines and because stored blocks are restricted to + * 64K-1 bytes. + */ +} + +/* =========================================================================== + * Send the block data compressed using the given Huffman trees + */ +local void compress_block(s, ltree, dtree) + deflate_state *s; + ct_data *ltree; /* literal tree */ + ct_data *dtree; /* distance tree */ +{ + unsigned dist; /* distance of matched string */ + int lc; /* match length or unmatched char (if dist == 0) */ + unsigned lx = 0; /* running index in l_buf */ + unsigned code; /* the code to send */ + int extra; /* number of extra bits to send */ + + if (s->last_lit != 0) do { + dist = s->d_buf[lx]; + lc = s->l_buf[lx++]; + if (dist == 0) { + send_code(s, lc, ltree); /* send a literal byte */ + Tracecv(isgraph(lc), (stderr," '%c' ", lc)); + } else { + /* Here, lc is the match length - MIN_MATCH */ + code = _length_code[lc]; + send_code(s, code+LITERALS+1, ltree); /* send the length code */ + extra = extra_lbits[code]; + if (extra != 0) { + lc -= base_length[code]; + send_bits(s, lc, extra); /* send the extra length bits */ + } + dist--; /* dist is now the match distance - 1 */ + code = d_code(dist); + Assert (code < D_CODES, "bad d_code"); + + send_code(s, code, dtree); /* send the distance code */ + extra = extra_dbits[code]; + if (extra != 0) { + dist -= base_dist[code]; + send_bits(s, dist, extra); /* send the extra distance bits */ + } + } /* literal or match pair ? */ + + /* Check that the overlay between pending_buf and d_buf+l_buf is ok: */ + Assert(s->pending < s->lit_bufsize + 2*lx, "pendingBuf overflow"); + + } while (lx < s->last_lit); + + send_code(s, END_BLOCK, ltree); + s->last_eob_len = ltree[END_BLOCK].Len; +} + +/* =========================================================================== + * Set the data type to ASCII or BINARY, using a crude approximation: + * binary if more than 20% of the bytes are <= 6 or >= 128, ascii otherwise. + * IN assertion: the fields freq of dyn_ltree are set and the total of all + * frequencies does not exceed 64K (to fit in an int on 16 bit machines). + */ +local void set_data_type(s) + deflate_state *s; +{ + int n = 0; + unsigned ascii_freq = 0; + unsigned bin_freq = 0; + while (n < 7) bin_freq += s->dyn_ltree[n++].Freq; + while (n < 128) ascii_freq += s->dyn_ltree[n++].Freq; + while (n < LITERALS) bin_freq += s->dyn_ltree[n++].Freq; + s->data_type = (Byte)(bin_freq > (ascii_freq >> 2) ? Z_BINARY : Z_ASCII); +} + +/* =========================================================================== + * Reverse the first len bits of a code, using straightforward code (a faster + * method would use a table) + * IN assertion: 1 <= len <= 15 + */ +local unsigned bi_reverse(code, len) + unsigned code; /* the value to invert */ + int len; /* its bit length */ +{ + register unsigned res = 0; + do { + res |= code & 1; + code >>= 1, res <<= 1; + } while (--len > 0); + return res >> 1; +} + +/* =========================================================================== + * Flush the bit buffer, keeping at most 7 bits in it. + */ +local void bi_flush(s) + deflate_state *s; +{ + if (s->bi_valid == 16) { + put_short(s, s->bi_buf); + s->bi_buf = 0; + s->bi_valid = 0; + } else if (s->bi_valid >= 8) { + put_byte(s, (Byte)s->bi_buf); + s->bi_buf >>= 8; + s->bi_valid -= 8; + } +} + +/* =========================================================================== + * Flush the bit buffer and align the output on a byte boundary + */ +local void bi_windup(s) + deflate_state *s; +{ + if (s->bi_valid > 8) { + put_short(s, s->bi_buf); + } else if (s->bi_valid > 0) { + put_byte(s, (Byte)s->bi_buf); + } + s->bi_buf = 0; + s->bi_valid = 0; +#ifdef DEBUG + s->bits_sent = (s->bits_sent+7) & ~7; +#endif +} + +/* =========================================================================== + * Copy a stored block, storing first the length and its + * one's complement if requested. + */ +local void copy_block(s, buf, len, header) + deflate_state *s; + charf *buf; /* the input data */ + unsigned len; /* its length */ + int header; /* true if block header must be written */ +{ + bi_windup(s); /* align on byte boundary */ + s->last_eob_len = 8; /* enough lookahead for inflate */ + + if (header) { + put_short(s, (ush)len); + put_short(s, (ush)~len); +#ifdef DEBUG + s->bits_sent += 2*16; +#endif + } +#ifdef DEBUG + s->bits_sent += (ulg)len<<3; +#endif + while (len--) { + put_byte(s, *buf++); + } +} diff --git a/packages/services/compress/zlib/current/src/trees.h b/packages/services/compress/zlib/current/src/trees.h new file mode 100644 --- /dev/null +++ b/packages/services/compress/zlib/current/src/trees.h @@ -0,0 +1,128 @@ +/* header created automatically with -DGEN_TREES_H */ + +local const ct_data static_ltree[L_CODES+2] = { +{{ 12},{ 8}}, {{140},{ 8}}, {{ 76},{ 8}}, {{204},{ 8}}, {{ 44},{ 8}}, +{{172},{ 8}}, {{108},{ 8}}, {{236},{ 8}}, {{ 28},{ 8}}, {{156},{ 8}}, +{{ 92},{ 8}}, {{220},{ 8}}, {{ 60},{ 8}}, {{188},{ 8}}, {{124},{ 8}}, +{{252},{ 8}}, {{ 2},{ 8}}, {{130},{ 8}}, {{ 66},{ 8}}, {{194},{ 8}}, +{{ 34},{ 8}}, {{162},{ 8}}, {{ 98},{ 8}}, {{226},{ 8}}, {{ 18},{ 8}}, +{{146},{ 8}}, {{ 82},{ 8}}, {{210},{ 8}}, {{ 50},{ 8}}, {{178},{ 8}}, +{{114},{ 8}}, {{242},{ 8}}, {{ 10},{ 8}}, {{138},{ 8}}, {{ 74},{ 8}}, +{{202},{ 8}}, {{ 42},{ 8}}, {{170},{ 8}}, {{106},{ 8}}, {{234},{ 8}}, +{{ 26},{ 8}}, {{154},{ 8}}, {{ 90},{ 8}}, {{218},{ 8}}, {{ 58},{ 8}}, +{{186},{ 8}}, {{122},{ 8}}, {{250},{ 8}}, {{ 6},{ 8}}, {{134},{ 8}}, +{{ 70},{ 8}}, {{198},{ 8}}, {{ 38},{ 8}}, {{166},{ 8}}, {{102},{ 8}}, +{{230},{ 8}}, {{ 22},{ 8}}, {{150},{ 8}}, {{ 86},{ 8}}, {{214},{ 8}}, +{{ 54},{ 8}}, {{182},{ 8}}, {{118},{ 8}}, {{246},{ 8}}, {{ 14},{ 8}}, +{{142},{ 8}}, {{ 78},{ 8}}, {{206},{ 8}}, {{ 46},{ 8}}, {{174},{ 8}}, +{{110},{ 8}}, {{238},{ 8}}, {{ 30},{ 8}}, {{158},{ 8}}, {{ 94},{ 8}}, +{{222},{ 8}}, {{ 62},{ 8}}, {{190},{ 8}}, {{126},{ 8}}, {{254},{ 8}}, +{{ 1},{ 8}}, {{129},{ 8}}, {{ 65},{ 8}}, {{193},{ 8}}, {{ 33},{ 8}}, +{{161},{ 8}}, {{ 97},{ 8}}, {{225},{ 8}}, {{ 17},{ 8}}, {{145},{ 8}}, +{{ 81},{ 8}}, {{209},{ 8}}, {{ 49},{ 8}}, {{177},{ 8}}, {{113},{ 8}}, +{{241},{ 8}}, {{ 9},{ 8}}, {{137},{ 8}}, {{ 73},{ 8}}, {{201},{ 8}}, +{{ 41},{ 8}}, {{169},{ 8}}, {{105},{ 8}}, {{233},{ 8}}, {{ 25},{ 8}}, +{{153},{ 8}}, {{ 89},{ 8}}, {{217},{ 8}}, {{ 57},{ 8}}, {{185},{ 8}}, +{{121},{ 8}}, {{249},{ 8}}, {{ 5},{ 8}}, {{133},{ 8}}, {{ 69},{ 8}}, +{{197},{ 8}}, {{ 37},{ 8}}, {{165},{ 8}}, {{101},{ 8}}, {{229},{ 8}}, +{{ 21},{ 8}}, {{149},{ 8}}, {{ 85},{ 8}}, {{213},{ 8}}, {{ 53},{ 8}}, +{{181},{ 8}}, {{117},{ 8}}, {{245},{ 8}}, {{ 13},{ 8}}, {{141},{ 8}}, +{{ 77},{ 8}}, {{205},{ 8}}, {{ 45},{ 8}}, {{173},{ 8}}, {{109},{ 8}}, +{{237},{ 8}}, {{ 29},{ 8}}, {{157},{ 8}}, {{ 93},{ 8}}, {{221},{ 8}}, +{{ 61},{ 8}}, {{189},{ 8}}, {{125},{ 8}}, {{253},{ 8}}, {{ 19},{ 9}}, +{{275},{ 9}}, {{147},{ 9}}, {{403},{ 9}}, {{ 83},{ 9}}, {{339},{ 9}}, +{{211},{ 9}}, {{467},{ 9}}, {{ 51},{ 9}}, {{307},{ 9}}, {{179},{ 9}}, +{{435},{ 9}}, {{115},{ 9}}, {{371},{ 9}}, {{243},{ 9}}, {{499},{ 9}}, +{{ 11},{ 9}}, {{267},{ 9}}, {{139},{ 9}}, {{395},{ 9}}, {{ 75},{ 9}}, +{{331},{ 9}}, {{203},{ 9}}, {{459},{ 9}}, {{ 43},{ 9}}, {{299},{ 9}}, +{{171},{ 9}}, {{427},{ 9}}, {{107},{ 9}}, {{363},{ 9}}, {{235},{ 9}}, +{{491},{ 9}}, {{ 27},{ 9}}, {{283},{ 9}}, {{155},{ 9}}, {{411},{ 9}}, +{{ 91},{ 9}}, {{347},{ 9}}, {{219},{ 9}}, {{475},{ 9}}, {{ 59},{ 9}}, +{{315},{ 9}}, {{187},{ 9}}, {{443},{ 9}}, {{123},{ 9}}, {{379},{ 9}}, +{{251},{ 9}}, {{507},{ 9}}, {{ 7},{ 9}}, {{263},{ 9}}, {{135},{ 9}}, +{{391},{ 9}}, {{ 71},{ 9}}, {{327},{ 9}}, {{199},{ 9}}, {{455},{ 9}}, +{{ 39},{ 9}}, {{295},{ 9}}, {{167},{ 9}}, {{423},{ 9}}, {{103},{ 9}}, +{{359},{ 9}}, {{231},{ 9}}, {{487},{ 9}}, {{ 23},{ 9}}, {{279},{ 9}}, +{{151},{ 9}}, {{407},{ 9}}, {{ 87},{ 9}}, {{343},{ 9}}, {{215},{ 9}}, +{{471},{ 9}}, {{ 55},{ 9}}, {{311},{ 9}}, {{183},{ 9}}, {{439},{ 9}}, +{{119},{ 9}}, {{375},{ 9}}, {{247},{ 9}}, {{503},{ 9}}, {{ 15},{ 9}}, +{{271},{ 9}}, {{143},{ 9}}, {{399},{ 9}}, {{ 79},{ 9}}, {{335},{ 9}}, +{{207},{ 9}}, {{463},{ 9}}, {{ 47},{ 9}}, {{303},{ 9}}, {{175},{ 9}}, +{{431},{ 9}}, {{111},{ 9}}, {{367},{ 9}}, {{239},{ 9}}, {{495},{ 9}}, +{{ 31},{ 9}}, {{287},{ 9}}, {{159},{ 9}}, {{415},{ 9}}, {{ 95},{ 9}}, +{{351},{ 9}}, {{223},{ 9}}, {{479},{ 9}}, {{ 63},{ 9}}, {{319},{ 9}}, +{{191},{ 9}}, {{447},{ 9}}, {{127},{ 9}}, {{383},{ 9}}, {{255},{ 9}}, +{{511},{ 9}}, {{ 0},{ 7}}, {{ 64},{ 7}}, {{ 32},{ 7}}, {{ 96},{ 7}}, +{{ 16},{ 7}}, {{ 80},{ 7}}, {{ 48},{ 7}}, {{112},{ 7}}, {{ 8},{ 7}}, +{{ 72},{ 7}}, {{ 40},{ 7}}, {{104},{ 7}}, {{ 24},{ 7}}, {{ 88},{ 7}}, +{{ 56},{ 7}}, {{120},{ 7}}, {{ 4},{ 7}}, {{ 68},{ 7}}, {{ 36},{ 7}}, +{{100},{ 7}}, {{ 20},{ 7}}, {{ 84},{ 7}}, {{ 52},{ 7}}, {{116},{ 7}}, +{{ 3},{ 8}}, {{131},{ 8}}, {{ 67},{ 8}}, {{195},{ 8}}, {{ 35},{ 8}}, +{{163},{ 8}}, {{ 99},{ 8}}, {{227},{ 8}} +}; + +local const ct_data static_dtree[D_CODES] = { +{{ 0},{ 5}}, {{16},{ 5}}, {{ 8},{ 5}}, {{24},{ 5}}, {{ 4},{ 5}}, +{{20},{ 5}}, {{12},{ 5}}, {{28},{ 5}}, {{ 2},{ 5}}, {{18},{ 5}}, +{{10},{ 5}}, {{26},{ 5}}, {{ 6},{ 5}}, {{22},{ 5}}, {{14},{ 5}}, +{{30},{ 5}}, {{ 1},{ 5}}, {{17},{ 5}}, {{ 9},{ 5}}, {{25},{ 5}}, +{{ 5},{ 5}}, {{21},{ 5}}, {{13},{ 5}}, {{29},{ 5}}, {{ 3},{ 5}}, +{{19},{ 5}}, {{11},{ 5}}, {{27},{ 5}}, {{ 7},{ 5}}, {{23},{ 5}} +}; + +const uch _dist_code[DIST_CODE_LEN] = { + 0, 1, 2, 3, 4, 4, 5, 5, 6, 6, 6, 6, 7, 7, 7, 7, 8, 8, 8, 8, + 8, 8, 8, 8, 9, 9, 9, 9, 9, 9, 9, 9, 10, 10, 10, 10, 10, 10, 10, 10, +10, 10, 10, 10, 10, 10, 10, 10, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, +11, 11, 11, 11, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, +12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 13, 13, 13, 13, +13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, +13, 13, 13, 13, 13, 13, 13, 13, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, +14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, +14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, +14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 15, 15, 15, 15, 15, 15, 15, 15, +15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, +15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, +15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 0, 0, 16, 17, +18, 18, 19, 19, 20, 20, 20, 20, 21, 21, 21, 21, 22, 22, 22, 22, 22, 22, 22, 22, +23, 23, 23, 23, 23, 23, 23, 23, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24, +24, 24, 24, 24, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, +26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, +26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 27, 27, 27, 27, 27, 27, 27, 27, +27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, +27, 27, 27, 27, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, +28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, +28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, +28, 28, 28, 28, 28, 28, 28, 28, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, +29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, +29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, +29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29 +}; + +const uch _length_code[MAX_MATCH-MIN_MATCH+1]= { + 0, 1, 2, 3, 4, 5, 6, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 12, 12, +13, 13, 13, 13, 14, 14, 14, 14, 15, 15, 15, 15, 16, 16, 16, 16, 16, 16, 16, 16, +17, 17, 17, 17, 17, 17, 17, 17, 18, 18, 18, 18, 18, 18, 18, 18, 19, 19, 19, 19, +19, 19, 19, 19, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, +21, 21, 21, 21, 21, 21, 21, 21, 21, 21, 21, 21, 21, 21, 21, 21, 22, 22, 22, 22, +22, 22, 22, 22, 22, 22, 22, 22, 22, 22, 22, 22, 23, 23, 23, 23, 23, 23, 23, 23, +23, 23, 23, 23, 23, 23, 23, 23, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24, +24, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24, +25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, +25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 26, 26, 26, 26, 26, 26, 26, 26, +26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, +26, 26, 26, 26, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, +27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 28 +}; + +local const int base_length[LENGTH_CODES] = { +0, 1, 2, 3, 4, 5, 6, 7, 8, 10, 12, 14, 16, 20, 24, 28, 32, 40, 48, 56, +64, 80, 96, 112, 128, 160, 192, 224, 0 +}; + +local const int base_dist[D_CODES] = { + 0, 1, 2, 3, 4, 6, 8, 12, 16, 24, + 32, 48, 64, 96, 128, 192, 256, 384, 512, 768, + 1024, 1536, 2048, 3072, 4096, 6144, 8192, 12288, 16384, 24576 +}; + diff --git a/packages/services/compress/zlib/current/src/uncompr.c b/packages/services/compress/zlib/current/src/uncompr.c new file mode 100644 --- /dev/null +++ b/packages/services/compress/zlib/current/src/uncompr.c @@ -0,0 +1,62 @@ +/* uncompr.c -- decompress a memory buffer + * Copyright (C) 1995-1998 Jean-loup Gailly. + * For conditions of distribution and use, see copyright notice in zlib.h + */ + +/* @(#) $Id$ */ + +#ifdef __ECOS__ +#include +#else +#include "zlib.h" +#endif // __ECOS__ + +/* =========================================================================== + Decompresses the source buffer into the destination buffer. sourceLen is + the byte length of the source buffer. Upon entry, destLen is the total + size of the destination buffer, which must be large enough to hold the + entire uncompressed data. (The size of the uncompressed data must have + been saved previously by the compressor and transmitted to the decompressor + by some mechanism outside the scope of this compression library.) + Upon exit, destLen is the actual size of the compressed buffer. + This function can be used to decompress a whole file at once if the + input file is mmap'ed. + + uncompress returns Z_OK if success, Z_MEM_ERROR if there was not + enough memory, Z_BUF_ERROR if there was not enough room in the output + buffer, or Z_DATA_ERROR if the input data was corrupted. +*/ +int ZEXPORT uncompress (dest, destLen, source, sourceLen) + Bytef *dest; + uLongf *destLen; + const Bytef *source; + uLong sourceLen; +{ + z_stream stream; + int err; + + stream.next_in = (Bytef*)source; + stream.avail_in = (uInt)sourceLen; + /* Check for source > 64K on 16-bit machine: */ + if ((uLong)stream.avail_in != sourceLen) return Z_BUF_ERROR; + + stream.next_out = dest; + stream.avail_out = (uInt)*destLen; + if ((uLong)stream.avail_out != *destLen) return Z_BUF_ERROR; + + stream.zalloc = (alloc_func)0; + stream.zfree = (free_func)0; + + err = inflateInit(&stream); + if (err != Z_OK) return err; + + err = inflate(&stream, Z_FINISH); + if (err != Z_STREAM_END) { + inflateEnd(&stream); + return err == Z_OK ? Z_BUF_ERROR : err; + } + *destLen = stream.total_out; + + err = inflateEnd(&stream); + return err; +} diff --git a/packages/services/compress/zlib/current/src/zlib.3 b/packages/services/compress/zlib/current/src/zlib.3 new file mode 100644 --- /dev/null +++ b/packages/services/compress/zlib/current/src/zlib.3 @@ -0,0 +1,107 @@ +.TH ZLIB 3 "9 July 1998" +.SH NAME +zlib \- compression/decompression library +.SH SYNOPSIS +[see +.I zlib.h +for full description] +.SH DESCRIPTION +The +.I zlib +library is a general purpose data compression library. +The code is thread safe. +It provides in-memory compression and decompression functions, +including integrity checks of the uncompressed data. +This version of the library supports only one compression method (deflation) +but other algorithms will be added later and will have the same stream interface. +.LP +Compression can be done in a single step if the buffers are large enough +(for example if an input file is mmap'ed), +or can be done by repeated calls of the compression function. +In the latter case, +the application must provide more input and/or consume the output +(providing more output space) before each call. +.LP +The library also supports reading and writing files in +.I gzip +(.gz) format +with an interface similar to that of stdio. +.LP +The library does not install any signal handler. The decoder checks +the consistency of the compressed data, so the library should never +crash even in case of corrupted input. +.LP +All functions of the compression library are documented in the file +.IR zlib.h. +The distribution source includes examples of use of the library +the files +.I example.c +and +.IR minigzip.c . +.LP +A Java implementation of +.IR zlib +is available in the Java Development Kit 1.1 +.IP +http://www.javasoft.com/products/JDK/1.1/docs/api/Package-java.util.zip.html +.LP +A Perl interface to +.IR zlib , +written by Paul Marquess (pmarquess@bfsec.bt.co.uk) +is available at CPAN (Comprehensive Perl Archive Network) sites, +such as: +.IP +ftp://ftp.cis.ufl.edu/pub/perl/CPAN/modules/by-module/Compress/Compress-Zlib* +.LP +A Python interface to +.IR zlib +written by A.M. Kuchling +is available from the Python Software Association sites, such as: +.IP +ftp://ftp.python.org/pub/python/contrib/Encoding/zlib*.tar.gz +.SH "SEE ALSO" +Questions about zlib should be sent to: +.IP +zlib@quest.jpl.nasa.gov +or, if this fails, to the author addresses given below. +The zlib home page is: +.IP +http://www.cdrom.com/pub/infozip/zlib/ +.LP +The data format used by the zlib library is described by RFC +(Request for Comments) 1950 to 1952 in the files: +.IP +ftp://ds.internic.net/rfc/rfc1950.txt (zlib format) +.br +rfc1951.txt (deflate format) +.br +rfc1952.txt (gzip format) +.LP +These documents are also available in other formats from: +.IP +ftp://ftp.uu.net/graphics/png/documents/zlib/zdoc-index.html +.SH AUTHORS +Version 1.1.3 +Copyright (C) 1995-1998 Jean-loup Gailly (jloup@gzip.org) +and Mark Adler (madler@alumni.caltech.edu). +.LP +This software is provided "as-is," +without any express or implied warranty. +In no event will the authors be held liable for any damages +arising from the use of this software. +See the distribution directory with respect to requirements +governing redistribution. +The deflate format used by +.I zlib +was defined by Phil Katz. +The deflate and +.I zlib +specifications were written by L. Peter Deutsch. +Thanks to all the people who reported problems and suggested various +improvements in +.IR zlib ; +who are too numerous to cite here. +.LP +UNIX manual page by R. P. C. Rodgers, +U.S. National Library of Medicine (rodgers@nlm.nih.gov). +.\" end of man page diff --git a/packages/services/compress/zlib/current/src/zutil.c b/packages/services/compress/zlib/current/src/zutil.c new file mode 100644 --- /dev/null +++ b/packages/services/compress/zlib/current/src/zutil.c @@ -0,0 +1,225 @@ +/* zutil.c -- target dependent utility functions for the compression library + * Copyright (C) 1995-1998 Jean-loup Gailly. + * For conditions of distribution and use, see copyright notice in zlib.h + */ + +/* @(#) $Id$ */ + +#include "zutil.h" + +struct internal_state {int dummy;}; /* for buggy compilers */ + +#ifndef STDC +extern void exit OF((int)); +#endif + +const char *z_errmsg[10] = { +"need dictionary", /* Z_NEED_DICT 2 */ +"stream end", /* Z_STREAM_END 1 */ +"", /* Z_OK 0 */ +"file error", /* Z_ERRNO (-1) */ +"stream error", /* Z_STREAM_ERROR (-2) */ +"data error", /* Z_DATA_ERROR (-3) */ +"insufficient memory", /* Z_MEM_ERROR (-4) */ +"buffer error", /* Z_BUF_ERROR (-5) */ +"incompatible version",/* Z_VERSION_ERROR (-6) */ +""}; + + +const char * ZEXPORT zlibVersion() +{ + return ZLIB_VERSION; +} + +#ifdef DEBUG + +# ifndef verbose +# define verbose 0 +# endif +int z_verbose = verbose; + +void z_error (m) + char *m; +{ + fprintf(stderr, "%s\n", m); + exit(1); +} +#endif + +/* exported to allow conversion of error code to string for compress() and + * uncompress() + */ +const char * ZEXPORT zError(err) + int err; +{ + return ERR_MSG(err); +} + + +#ifndef HAVE_MEMCPY + +void zmemcpy(dest, source, len) + Bytef* dest; + const Bytef* source; + uInt len; +{ + if (len == 0) return; + do { + *dest++ = *source++; /* ??? to be unrolled */ + } while (--len != 0); +} + +int zmemcmp(s1, s2, len) + const Bytef* s1; + const Bytef* s2; + uInt len; +{ + uInt j; + + for (j = 0; j < len; j++) { + if (s1[j] != s2[j]) return 2*(s1[j] > s2[j])-1; + } + return 0; +} + +void zmemzero(dest, len) + Bytef* dest; + uInt len; +{ + if (len == 0) return; + do { + *dest++ = 0; /* ??? to be unrolled */ + } while (--len != 0); +} +#endif + +#ifdef __TURBOC__ +#if (defined( __BORLANDC__) || !defined(SMALL_MEDIUM)) && !defined(__32BIT__) +/* Small and medium model in Turbo C are for now limited to near allocation + * with reduced MAX_WBITS and MAX_MEM_LEVEL + */ +# define MY_ZCALLOC + +/* Turbo C malloc() does not allow dynamic allocation of 64K bytes + * and farmalloc(64K) returns a pointer with an offset of 8, so we + * must fix the pointer. Warning: the pointer must be put back to its + * original form in order to free it, use zcfree(). + */ + +#define MAX_PTR 10 +/* 10*64K = 640K */ + +local int next_ptr = 0; + +typedef struct ptr_table_s { + voidpf org_ptr; + voidpf new_ptr; +} ptr_table; + +local ptr_table table[MAX_PTR]; +/* This table is used to remember the original form of pointers + * to large buffers (64K). Such pointers are normalized with a zero offset. + * Since MSDOS is not a preemptive multitasking OS, this table is not + * protected from concurrent access. This hack doesn't work anyway on + * a protected system like OS/2. Use Microsoft C instead. + */ + +voidpf zcalloc (voidpf opaque, unsigned items, unsigned size) +{ + voidpf buf = opaque; /* just to make some compilers happy */ + ulg bsize = (ulg)items*size; + + /* If we allocate less than 65520 bytes, we assume that farmalloc + * will return a usable pointer which doesn't have to be normalized. + */ + if (bsize < 65520L) { + buf = farmalloc(bsize); + if (*(ush*)&buf != 0) return buf; + } else { + buf = farmalloc(bsize + 16L); + } + if (buf == NULL || next_ptr >= MAX_PTR) return NULL; + table[next_ptr].org_ptr = buf; + + /* Normalize the pointer to seg:0 */ + *((ush*)&buf+1) += ((ush)((uch*)buf-0) + 15) >> 4; + *(ush*)&buf = 0; + table[next_ptr++].new_ptr = buf; + return buf; +} + +void zcfree (voidpf opaque, voidpf ptr) +{ + int n; + if (*(ush*)&ptr != 0) { /* object < 64K */ + farfree(ptr); + return; + } + /* Find the original pointer */ + for (n = 0; n < next_ptr; n++) { + if (ptr != table[n].new_ptr) continue; + + farfree(table[n].org_ptr); + while (++n < next_ptr) { + table[n-1] = table[n]; + } + next_ptr--; + return; + } + ptr = opaque; /* just to make some compilers happy */ + Assert(0, "zcfree: ptr not found"); +} +#endif +#endif /* __TURBOC__ */ + + +#if defined(M_I86) && !defined(__32BIT__) +/* Microsoft C in 16-bit mode */ + +# define MY_ZCALLOC + +#if (!defined(_MSC_VER) || (_MSC_VER <= 600)) +# define _halloc halloc +# define _hfree hfree +#endif + +voidpf zcalloc (voidpf opaque, unsigned items, unsigned size) +{ + if (opaque) opaque = 0; /* to make compiler happy */ + return _halloc((long)items, size); +} + +void zcfree (voidpf opaque, voidpf ptr) +{ + if (opaque) opaque = 0; /* to make compiler happy */ + _hfree(ptr); +} + +#endif /* MSC */ + + +#ifndef MY_ZCALLOC /* Any system without a special alloc function */ + +#ifndef STDC +extern voidp calloc OF((uInt items, uInt size)); +extern void free OF((voidpf ptr)); +#endif + +voidpf zcalloc (opaque, items, size) + voidpf opaque; + unsigned items; + unsigned size; +{ + if (opaque) items += size - size; /* make compiler happy */ + return (voidpf)calloc(items, size); +} + +void zcfree (opaque, ptr) + voidpf opaque; + voidpf ptr; +{ + free(ptr); + if (opaque) return; /* make compiler happy */ +} + +#endif /* MY_ZCALLOC */ diff --git a/packages/services/compress/zlib/current/src/zutil.h b/packages/services/compress/zlib/current/src/zutil.h new file mode 100644 --- /dev/null +++ b/packages/services/compress/zlib/current/src/zutil.h @@ -0,0 +1,224 @@ +/* zutil.h -- internal interface and configuration of the compression library + * Copyright (C) 1995-1998 Jean-loup Gailly. + * For conditions of distribution and use, see copyright notice in zlib.h + */ + +/* WARNING: this file should *not* be used by applications. It is + part of the implementation of the compression library and is + subject to change. Applications should only use zlib.h. + */ + +/* @(#) $Id$ */ + +#ifndef _Z_UTIL_H +#define _Z_UTIL_H + +#ifdef __ECOS__ +#include +#else +#include "zlib.h" +#endif // __ECOS__ + +#ifdef STDC +# include +# include +# include +#endif +#ifdef NO_ERRNO_H + extern int errno; +#else +# include +#endif + +#ifndef local +# define local static +#endif +/* compile with -Dlocal if your debugger can't find static symbols */ + +typedef unsigned char uch; +typedef uch FAR uchf; +typedef unsigned short ush; +typedef ush FAR ushf; +typedef unsigned long ulg; + +extern const char *z_errmsg[10]; /* indexed by 2-zlib_error */ +/* (size given to avoid silly warnings with Visual C++) */ + +#define ERR_MSG(err) z_errmsg[Z_NEED_DICT-(err)] + +#define ERR_RETURN(strm,err) \ + return (strm->msg = (char*)ERR_MSG(err), (err)) +/* To be used only when the state is known to be valid */ + + /* common constants */ + +#ifndef DEF_WBITS +# define DEF_WBITS MAX_WBITS +#endif +/* default windowBits for decompression. MAX_WBITS is for compression only */ + +#if MAX_MEM_LEVEL >= 8 +# define DEF_MEM_LEVEL 8 +#else +# define DEF_MEM_LEVEL MAX_MEM_LEVEL +#endif +/* default memLevel */ + +#define STORED_BLOCK 0 +#define STATIC_TREES 1 +#define DYN_TREES 2 +/* The three kinds of block type */ + +#define MIN_MATCH 3 +#define MAX_MATCH 258 +/* The minimum and maximum match lengths */ + +#define PRESET_DICT 0x20 /* preset dictionary flag in zlib header */ + + /* target dependencies */ + +#ifdef MSDOS +# define OS_CODE 0x00 +# if defined(__TURBOC__) || defined(__BORLANDC__) +# if(__STDC__ == 1) && (defined(__LARGE__) || defined(__COMPACT__)) + /* Allow compilation with ANSI keywords only enabled */ + void _Cdecl farfree( void *block ); + void *_Cdecl farmalloc( unsigned long nbytes ); +# else +# include +# endif +# else /* MSC or DJGPP */ +# include +# endif +#endif + +#ifdef OS2 +# define OS_CODE 0x06 +#endif + +#ifdef WIN32 /* Window 95 & Windows NT */ +# define OS_CODE 0x0b +#endif + +#if defined(VAXC) || defined(VMS) +# define OS_CODE 0x02 +# define F_OPEN(name, mode) \ + fopen((name), (mode), "mbc=60", "ctx=stm", "rfm=fix", "mrs=512") +#endif + +#ifdef AMIGA +# define OS_CODE 0x01 +#endif + +#if defined(ATARI) || defined(atarist) +# define OS_CODE 0x05 +#endif + +#if defined(MACOS) || defined(TARGET_OS_MAC) +# define OS_CODE 0x07 +# if defined(__MWERKS__) && __dest_os != __be_os && __dest_os != __win32_os +# include /* for fdopen */ +# else +# ifndef fdopen +# define fdopen(fd,mode) NULL /* No fdopen() */ +# endif +# endif +#endif + +#ifdef __50SERIES /* Prime/PRIMOS */ +# define OS_CODE 0x0F +#endif + +#ifdef TOPS20 +# define OS_CODE 0x0a +#endif + +#if defined(_BEOS_) || defined(RISCOS) +# define fdopen(fd,mode) NULL /* No fdopen() */ +#endif + +#if (defined(_MSC_VER) && (_MSC_VER > 600)) +# define fdopen(fd,type) _fdopen(fd,type) +#endif + + + /* Common defaults */ + +#ifndef OS_CODE +# define OS_CODE 0x03 /* assume Unix */ +#endif + +#ifndef F_OPEN +# define F_OPEN(name, mode) fopen((name), (mode)) +#endif + + /* functions */ + +#ifdef HAVE_STRERROR + extern char *strerror OF((int)); +# define zstrerror(errnum) strerror(errnum) +#else +# define zstrerror(errnum) "" +#endif + +#if defined(pyr) +# define NO_MEMCPY +#endif +#if defined(SMALL_MEDIUM) && !defined(_MSC_VER) && !defined(__SC__) + /* Use our own functions for small and medium model with MSC <= 5.0. + * You may have to use the same strategy for Borland C (untested). + * The __SC__ check is for Symantec. + */ +# define NO_MEMCPY +#endif +#if defined(STDC) && !defined(HAVE_MEMCPY) && !defined(NO_MEMCPY) +# define HAVE_MEMCPY +#endif +#ifdef HAVE_MEMCPY +# ifdef SMALL_MEDIUM /* MSDOS small or medium model */ +# define zmemcpy _fmemcpy +# define zmemcmp _fmemcmp +# define zmemzero(dest, len) _fmemset(dest, 0, len) +# else +# define zmemcpy memcpy +# define zmemcmp memcmp +# define zmemzero(dest, len) memset(dest, 0, len) +# endif +#else + extern void zmemcpy OF((Bytef* dest, const Bytef* source, uInt len)); + extern int zmemcmp OF((const Bytef* s1, const Bytef* s2, uInt len)); + extern void zmemzero OF((Bytef* dest, uInt len)); +#endif + +/* Diagnostic functions */ +#ifdef DEBUG +# include + extern int z_verbose; + extern void z_error OF((char *m)); +# define Assert(cond,msg) {if(!(cond)) z_error(msg);} +# define Trace(x) {if (z_verbose>=0) fprintf x ;} +# define Tracev(x) {if (z_verbose>0) fprintf x ;} +# define Tracevv(x) {if (z_verbose>1) fprintf x ;} +# define Tracec(c,x) {if (z_verbose>0 && (c)) fprintf x ;} +# define Tracecv(c,x) {if (z_verbose>1 && (c)) fprintf x ;} +#else +# define Assert(cond,msg) +# define Trace(x) +# define Tracev(x) +# define Tracevv(x) +# define Tracec(c,x) +# define Tracecv(c,x) +#endif + + +typedef uLong (ZEXPORT *check_func) OF((uLong check, const Bytef *buf, + uInt len)); +voidpf zcalloc OF((voidpf opaque, unsigned items, unsigned size)); +void zcfree OF((voidpf opaque, voidpf ptr)); + +#define ZALLOC(strm, items, size) \ + (*((strm)->zalloc))((strm)->opaque, (items), (size)) +#define ZFREE(strm, addr) (*((strm)->zfree))((strm)->opaque, (voidpf)(addr)) +#define TRY_FREE(s, p) {if (p) ZFREE(s, p);} + +#endif /* _Z_UTIL_H */ diff --git a/packages/services/compress/zlib/current/tests/zlib1.c b/packages/services/compress/zlib/current/tests/zlib1.c new file mode 100644 --- /dev/null +++ b/packages/services/compress/zlib/current/tests/zlib1.c @@ -0,0 +1,222 @@ +//================================================================= +// +// zlib1.c +// +// zlib compression/decompression test 1 +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jskov +// Contributors: jskov +// Date: 2001-03-09 +// Description: Tests zlib compress/decompress functionality. +//####DESCRIPTIONEND#### + + +#include // CYGNUM_HAL_STACK_SIZE_TYPICAL + +#include + +#include + +#ifdef CYGFUN_KERNEL_API_C + +#include +#include + +#define NTHREADS 1 +#define STACKSIZE (CYGNUM_HAL_STACK_SIZE_TYPICAL > 8192 ? CYGNUM_HAL_STACK_SIZE_TYPICAL : 8192) + +static cyg_handle_t thread[NTHREADS]; + +static cyg_thread thread_obj[NTHREADS]; +static char stack[NTHREADS][STACKSIZE]; + +static char license_txt[] = +"Red Hat eCos Public License v1.1 + + +1. DEFINITIONS + +1.1. \"Contributor\" means each entity that creates or +contributes to the creation of Modifications. + +1.2. \"Contributor Version\" means the combination of the +Original Code, prior Modifications used by a +Contributor, and the Modifications made by that +particular Contributor. + +1.3. \"Covered Code\" means the Original Code or +Modifications or the combination of the Original Code +and Modifications, in each case including portions +thereof. + +1.4. \"Electronic Distribution Mechanism\" means a +mechanism generally accepted in the software development +community for the electronic transfer of data. + +1.5. \"Executable\" means Covered Code in any form other +than Source Code. +1.6. \"Initial Developer\" means the individual or entity +identified as the Initial Developer in the Source Code +notice required by Exhibit A. + +1.7. \"Larger Work\" means a work which combines Covered +Code or portions thereof with code not governed by the +terms of this License. + +1.8. \"License\" means this document. + +1.9. \"Modifications\" means any addition to or deletion +from the substance or structure of either the Original +Code or any previous Modifications. When Covered Code is +released as a series of files, a Modification is: + + A. Any addition to or deletion from the + contents of a file containing Original Code or + previous Modifications. + + B. Any new file that contains any part of the + Original Code or previous Modifications. + +1.10. \"Original Code\" means Source Code of computer +software code which is described in the Source Code +notice required by Exhibit A as Original Code, and +which, at the time of its release under this License is +not already Covered Code governed by this License. + +1.11. \"Source Code\" means the preferred form of the +Covered Code for making modifications to it, including +all modules it contains, plus any associated interface +definition files, scripts used to control compilation +and installation of an Executable, or a list of source +code differential comparisons against either the +Original Code or another well known, available Covered +Code of the Contributor's choice. The Source Code can be +in a compressed or archival form, provided the +appropriate decompression or de-archiving software is +widely available for no charge. + +1.12. \"You\" means an individual or a legal entity +exercising rights under, and complying with all of the +terms of, this License or a future version of this +License issued under Section 6.1. For legal entities, +\"You\" includes any entity which controls, is controlled +by, or is under common control with You. For purposes of +this definition, \"control\" means (a) the power, direct +or indirect, to cause the direction or management of +such entity, whether by contract or otherwise, or (b) +ownership of fifty percent (50%) or more of the +outstanding shares or beneficial ownership of such +entity. + +1.13. \"Red Hat Branded Code\" is code that Red Hat +distributes and/or permits others to distribute under +different terms than the Red Hat eCos Public License. +Red Hat's Branded Code may contain part or all of the +Covered Code. +"; + +static void entry0( cyg_addrword_t data ) +{ + int i; + unsigned long len; + int err; + int buf_size = sizeof(license_txt)+512; + unsigned char* packed = malloc(buf_size); + unsigned char* unpacked = malloc(buf_size); + + if (NULL == packed || NULL == unpacked) + CYG_TEST_NA("Not enough memory for buffers"); + + CYG_TEST_INFO("Compressing"); + + len = buf_size; + err = compress(packed, &len, license_txt, sizeof(license_txt)); + + if (Z_OK != err) + CYG_TEST_NA("Not enough memory for compression"); + + + CYG_TEST_INFO("Decompressing"); + err = uncompress(unpacked, &buf_size, packed, len); + + switch (err) { + case Z_OK: + break; + case Z_MEM_ERROR: + CYG_TEST_NA("Not enough memory for decompression"); + break; + case Z_BUF_ERROR: + CYG_TEST_FAIL_FINISH("Decompressed data larger than original"); + break; + case Z_DATA_ERROR: + CYG_TEST_FAIL_FINISH("Decompression failed"); + break; + default: + CYG_TEST_FAIL_FINISH("Unknown decompression error"); + break; + } + + for (i = 0; i < sizeof(license_txt)-1; i++) { + if (license_txt[i] != unpacked[i]) + CYG_TEST_FAIL_FINISH("Verify failed"); + } + + CYG_TEST_PASS_FINISH("zlib1 OK"); +} + +void zlib1_main( void ) +{ + CYG_TEST_INIT(); + + cyg_thread_create(4, entry0 , (cyg_addrword_t)0, "zlib1", + (void *)stack[0], STACKSIZE,&thread[0], &thread_obj[0]); + cyg_thread_resume(thread[0]); + + cyg_scheduler_start(); + + CYG_TEST_FAIL_FINISH("Not reached"); +} + +externC void +cyg_start( void ) +{ + zlib1_main(); +} + +#else /* def CYGFUN_KERNEL_API_C */ +externC void +cyg_start( void ) +{ + CYG_TEST_INIT(); + CYG_TEST_NA("Kernel C API layer disabled"); +} +#endif /* def CYGFUN_KERNEL_API_C */ + +// EOF zlib1.c diff --git a/packages/services/compress/zlib/current/tests/zlib2.c b/packages/services/compress/zlib/current/tests/zlib2.c new file mode 100644 --- /dev/null +++ b/packages/services/compress/zlib/current/tests/zlib2.c @@ -0,0 +1,305 @@ +//================================================================= +// +// zlib2.c +// +// zlib decompression test 2 +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jskov +// Contributors: jskov +// Date: 2001-03-09 +// Description: Tests zlib compression of gz compressed image. +//####DESCRIPTIONEND#### + + +#include // CYGNUM_HAL_STACK_SIZE_TYPICAL + +#include + +#include + +#ifdef CYGFUN_KERNEL_API_C + +#include +#include + +#define NTHREADS 1 +#define STACKSIZE (CYGNUM_HAL_STACK_SIZE_TYPICAL > 8192 ? CYGNUM_HAL_STACK_SIZE_TYPICAL : 8192) + +static cyg_handle_t thread[NTHREADS]; + +static cyg_thread thread_obj[NTHREADS]; +static char stack[NTHREADS][STACKSIZE]; + + +unsigned char gzip_test[] = { +0x1f, 0x8b, 0x08, 0x08, 0x23, 0xce, 0xa8, 0x3a, 0x00, 0x03, 0x61, 0x00, 0x8d, 0x56, 0xdb, 0x6e, +0xe3, 0x36, 0x10, 0x7d, 0xe7, 0x57, 0x10, 0x01, 0x8a, 0x66, 0x01, 0xd7, 0xdd, 0xb4, 0xdd, 0xed, +0xe5, 0x2d, 0x9b, 0x64, 0xd1, 0x00, 0x7b, 0x29, 0x92, 0x45, 0x17, 0x7d, 0xa4, 0xa9, 0x91, 0x4d, +0x44, 0x22, 0x55, 0x92, 0xb2, 0x93, 0xbf, 0xdf, 0x33, 0x43, 0x49, 0x96, 0x9c, 0x06, 0xa8, 0x9f, +0x4c, 0x91, 0x9c, 0x39, 0x33, 0x73, 0xe6, 0x0c, 0xef, 0xa8, 0xd2, 0x7f, 0x9a, 0xac, 0xe9, 0x2a, +0x24, 0xfd, 0x57, 0xbf, 0x69, 0x9c, 0xd5, 0x1f, 0x9c, 0x25, 0x9f, 0x48, 0xef, 0x2f, 0xd6, 0x17, +0x0a, 0xbf, 0x8b, 0xb5, 0xbe, 0xbe, 0x79, 0x7f, 0xfb, 0xe9, 0xf6, 0xcb, 0xed, 0xe7, 0x4f, 0xf7, +0xbc, 0xc6, 0x97, 0xb3, 0xab, 0xe0, 0x73, 0x74, 0x9b, 0x3e, 0x87, 0x78, 0xa6, 0x5b, 0x32, 0x3e, +0x69, 0x32, 0x76, 0xa7, 0xc9, 0x67, 0x97, 0x9f, 0x74, 0xde, 0xc1, 0xaa, 0x8d, 0x64, 0x32, 0x25, +0x1d, 0xa2, 0xb2, 0xe3, 0x71, 0x2c, 0x73, 0xc0, 0x36, 0x95, 0x5d, 0x17, 0xbc, 0x0e, 0xb5, 0xfe, +0x18, 0x2a, 0x57, 0x3b, 0x2b, 0xeb, 0xb4, 0x66, 0x1f, 0x3f, 0x2d, 0x7d, 0xe8, 0xbf, 0x29, 0x26, +0x6c, 0x8e, 0xbe, 0xc4, 0x40, 0x68, 0x37, 0xce, 0x4f, 0x36, 0xf0, 0x49, 0x7d, 0x8e, 0x6e, 0x8b, +0x4f, 0x8d, 0xbe, 0x0a, 0x15, 0xad, 0x74, 0x17, 0x1d, 0xae, 0x2e, 0x8c, 0xeb, 0x3e, 0x21, 0xe6, +0xcd, 0x93, 0x36, 0x6a, 0x66, 0x7e, 0xa5, 0x8d, 0xaf, 0xc4, 0xe8, 0xf2, 0x70, 0x6b, 0x2a, 0xe2, +0xc3, 0x1c, 0x8e, 0xea, 0x4c, 0xcc, 0xce, 0xf6, 0x8d, 0x89, 0x7a, 0x76, 0x55, 0xd0, 0xfe, 0x2c, +0x68, 0xf7, 0x14, 0x61, 0x9b, 0x5d, 0xcf, 0x61, 0x2e, 0x30, 0x71, 0x2e, 0x96, 0x2e, 0x00, 0xf0, +0xbf, 0x83, 0x59, 0x5e, 0x54, 0x0c, 0x70, 0x71, 0x73, 0xa5, 0x9d, 0x2f, 0x39, 0xb7, 0x06, 0xe5, +0x72, 0xde, 0x36, 0x7d, 0xe5, 0xfc, 0x56, 0x77, 0x21, 0xca, 0x01, 0x05, 0x23, 0x91, 0x42, 0x2d, +0x08, 0x7f, 0x01, 0xc2, 0x9b, 0x86, 0x6c, 0x8e, 0xc1, 0xa3, 0xc8, 0xd7, 0x2e, 0x95, 0x00, 0xd8, +0xdf, 0x47, 0xb2, 0x3b, 0xe3, 0x5d, 0x6a, 0x47, 0xd8, 0x46, 0xb5, 0xe3, 0x27, 0xbd, 0x25, 0x4f, +0xd1, 0x34, 0x0d, 0x32, 0x66, 0x2d, 0x75, 0x19, 0x11, 0xc2, 0x2f, 0xe3, 0x4b, 0xa1, 0xce, 0x07, +0x13, 0x49, 0x57, 0xb4, 0xa7, 0x26, 0x74, 0x2d, 0x6a, 0x8f, 0x42, 0xb7, 0x6d, 0xef, 0x99, 0x02, +0xf5, 0x10, 0x19, 0x1d, 0xbd, 0xe6, 0x08, 0xeb, 0x35, 0x45, 0x8e, 0xb0, 0x32, 0xd9, 0x08, 0xb2, +0x37, 0x8c, 0xec, 0x91, 0x6c, 0x9f, 0xcd, 0xa6, 0x99, 0x32, 0x37, 0xcf, 0x26, 0x3b, 0x34, 0x5e, +0x2c, 0xb6, 0x3a, 0x70, 0x54, 0x08, 0xcd, 0x78, 0x7d, 0x1f, 0xfa, 0x68, 0x49, 0x8e, 0xac, 0x61, +0xe8, 0x2d, 0x0c, 0xdd, 0xc2, 0xb5, 0x43, 0xca, 0xae, 0x0b, 0x24, 0x8a, 0xf3, 0x4a, 0x38, 0x5f, +0xb9, 0xbd, 0xab, 0x7a, 0xec, 0x03, 0x5b, 0x61, 0xaa, 0x72, 0x15, 0xff, 0xa9, 0x1d, 0x7c, 0x99, +0x72, 0xec, 0x99, 0x8d, 0x31, 0xe0, 0x99, 0x3f, 0xe5, 0x03, 0xb8, 0x40, 0x3a, 0xd2, 0xbf, 0xbd, +0x8b, 0x85, 0x51, 0x37, 0x8f, 0x3b, 0xb7, 0x71, 0x59, 0x5f, 0x4a, 0x58, 0xbf, 0x02, 0xcd, 0x07, +0x13, 0xb7, 0xb8, 0xfe, 0x35, 0xc4, 0x87, 0x29, 0xb5, 0xfa, 0x80, 0x95, 0x3e, 0xec, 0x1c, 0x17, +0x4e, 0x8a, 0x4e, 0x53, 0xb4, 0x6a, 0xa0, 0xc8, 0x54, 0x42, 0x3d, 0x94, 0x50, 0x1f, 0x5c, 0xe6, +0xe3, 0xd8, 0x85, 0x63, 0xbd, 0xe5, 0xe3, 0xbe, 0x78, 0x65, 0xda, 0x67, 0x8a, 0x6d, 0x2a, 0xb4, +0x71, 0x69, 0x6c, 0x60, 0x41, 0xf1, 0x1b, 0xa3, 0x28, 0xeb, 0x63, 0x26, 0x70, 0xa6, 0x0a, 0xb6, +0xe7, 0x7a, 0xc9, 0xa1, 0xdf, 0x71, 0x68, 0x41, 0xad, 0x09, 0x2c, 0x92, 0x6e, 0xaa, 0xca, 0x09, +0x4b, 0xd0, 0xb6, 0x40, 0x56, 0xa1, 0x9c, 0xbc, 0x54, 0x75, 0x0c, 0x6d, 0xa1, 0x41, 0xbf, 0x49, +0xd9, 0x78, 0x2b, 0xc0, 0xc1, 0xaa, 0xde, 0xe6, 0x1e, 0xa4, 0x00, 0x1a, 0x72, 0x0c, 0x7f, 0xc1, +0xe5, 0x29, 0x42, 0x36, 0xdd, 0x45, 0xda, 0xbb, 0xd0, 0xa7, 0x93, 0xf6, 0xd7, 0x5f, 0x77, 0xe4, +0x4f, 0x08, 0x90, 0x54, 0x84, 0x63, 0x93, 0x4a, 0x95, 0x8c, 0x4e, 0x14, 0x1d, 0x49, 0xc8, 0xb5, +0x6b, 0x08, 0xbd, 0x60, 0x16, 0x46, 0x70, 0xe1, 0x0f, 0xa5, 0x34, 0xff, 0x2e, 0xd7, 0xfa, 0xf2, +0xe5, 0x30, 0xf4, 0x18, 0x46, 0x39, 0xcc, 0x32, 0x85, 0xac, 0x88, 0x61, 0x23, 0xa6, 0xe5, 0x93, +0x71, 0x9e, 0x1b, 0xeb, 0x59, 0x27, 0xcb, 0x9d, 0x17, 0xa2, 0x18, 0xdc, 0xbf, 0x2b, 0xee, 0x3d, +0x1d, 0x8a, 0xb9, 0x22, 0x8c, 0xc5, 0x66, 0x49, 0x30, 0xcb, 0xca, 0xa8, 0x5f, 0x72, 0xe5, 0xd4, +0xcd, 0xcb, 0x1e, 0x20, 0xc5, 0xaf, 0x51, 0xbb, 0xc5, 0x85, 0xb1, 0x76, 0x33, 0xb2, 0xb2, 0x75, +0x50, 0xad, 0x83, 0xfa, 0x46, 0x35, 0x75, 0xad, 0xb0, 0xa9, 0xf0, 0x90, 0x09, 0x41, 0xc9, 0x42, +0x10, 0x8e, 0xdd, 0xfd, 0x7f, 0xc9, 0xce, 0xf5, 0x38, 0x91, 0x5d, 0x48, 0x95, 0x12, 0xc3, 0xf8, +0x9b, 0xc5, 0x58, 0x76, 0xad, 0xa0, 0x70, 0x48, 0xed, 0x50, 0x48, 0xdd, 0xfb, 0x4a, 0xc8, 0x71, +0x64, 0x2c, 0x97, 0x99, 0xe9, 0x6d, 0x1a, 0x8c, 0x86, 0xea, 0x69, 0x49, 0x81, 0x25, 0xe7, 0x4f, +0x68, 0x7e, 0xc1, 0x23, 0x69, 0x86, 0x78, 0xde, 0xf5, 0xc8, 0x1e, 0x24, 0x87, 0xed, 0x14, 0xfd, +0x28, 0x99, 0x5e, 0xd8, 0x66, 0xa9, 0x6a, 0xcd, 0x03, 0xd7, 0xb8, 0x5d, 0x88, 0x33, 0xc8, 0xe2, +0xf2, 0xea, 0xa8, 0xad, 0x0a, 0x42, 0xc8, 0x47, 0x7a, 0x70, 0x0e, 0x3b, 0x53, 0x21, 0x31, 0x6a, +0x9a, 0x7e, 0xe8, 0x97, 0x94, 0x82, 0x75, 0xa6, 0xe8, 0x24, 0x12, 0x5e, 0x1b, 0x4b, 0xaa, 0xa2, +0xda, 0xf9, 0xc2, 0xbf, 0x81, 0xaf, 0x9c, 0xed, 0x2e, 0x0f, 0xe3, 0x08, 0x6e, 0x64, 0x40, 0x86, +0x46, 0xea, 0xe4, 0x1a, 0x71, 0x2f, 0x92, 0x0f, 0xe3, 0x19, 0x4e, 0xa7, 0xc1, 0x00, 0xd9, 0x3b, +0x8a, 0xe5, 0x4a, 0x3a, 0x49, 0x37, 0x10, 0x73, 0xde, 0x4b, 0x92, 0x00, 0x25, 0x85, 0x45, 0x14, +0x88, 0x9a, 0xa5, 0xcd, 0x14, 0xa3, 0x26, 0xba, 0xc4, 0x21, 0x99, 0x2d, 0x03, 0xce, 0xb3, 0xe6, +0x54, 0xcf, 0x08, 0x67, 0xbc, 0xa8, 0xac, 0x3e, 0x10, 0xc2, 0x7d, 0xf0, 0xe1, 0xe0, 0x51, 0xc9, +0xbd, 0x01, 0x2e, 0x38, 0x3d, 0x11, 0xab, 0x32, 0xab, 0x66, 0x03, 0xf1, 0xfb, 0xa4, 0xed, 0x2e, +0xa0, 0x38, 0x6b, 0xfd, 0x65, 0xc9, 0x23, 0x0c, 0x2a, 0xaf, 0x37, 0xa4, 0x58, 0xce, 0x05, 0x53, +0xa4, 0xc4, 0xe1, 0xb3, 0xc7, 0x68, 0x77, 0x6e, 0x0f, 0x08, 0x5c, 0x23, 0x1e, 0xdc, 0x01, 0x42, +0x4d, 0x32, 0x92, 0x95, 0xe9, 0xb0, 0xc4, 0x28, 0x47, 0x4e, 0x41, 0xd3, 0xf1, 0x9e, 0xe4, 0x83, +0x1b, 0xf9, 0x87, 0x72, 0x97, 0x8b, 0x37, 0x71, 0x1b, 0x44, 0x3a, 0xe0, 0x3e, 0x0f, 0xad, 0x09, +0x36, 0x17, 0xd9, 0x23, 0xd1, 0x3b, 0x16, 0xe5, 0xc2, 0x1a, 0x7e, 0x64, 0xfc, 0x13, 0xfa, 0xa3, +0xdc, 0x9d, 0x8c, 0x08, 0xa4, 0x96, 0xb6, 0xf8, 0x3b, 0x8c, 0x0a, 0x7a, 0xa4, 0x68, 0x5d, 0x62, +0x4f, 0xc8, 0xd8, 0x8e, 0xab, 0xc7, 0x1c, 0x2e, 0x8f, 0x07, 0xc6, 0xd5, 0x3c, 0xf1, 0x9e, 0x68, +0x35, 0x13, 0x65, 0xa0, 0xda, 0xa8, 0xce, 0xab, 0x25, 0xd9, 0xc5, 0x7e, 0xdd, 0x8b, 0x58, 0xee, +0xcb, 0xeb, 0x66, 0x94, 0x70, 0x75, 0x6c, 0x88, 0xd4, 0x23, 0x0b, 0xa5, 0x55, 0xee, 0x31, 0x47, +0xf9, 0xd0, 0x5b, 0x7e, 0x80, 0xbd, 0xc7, 0xf5, 0x19, 0x38, 0x88, 0xe1, 0x4a, 0x95, 0x58, 0x0a, +0x59, 0xa9, 0xb0, 0x71, 0x78, 0x8e, 0x8d, 0xe3, 0x46, 0x38, 0xc6, 0x2f, 0x87, 0x34, 0x2e, 0x1a, +0x14, 0x72, 0xf3, 0x24, 0x44, 0x72, 0x43, 0x3c, 0x1c, 0x4a, 0x0b, 0x3f, 0x23, 0x25, 0x25, 0x1e, +0x98, 0x2e, 0x4e, 0xbb, 0x3e, 0x76, 0x21, 0x89, 0xf6, 0xaa, 0x32, 0x4a, 0x26, 0x6e, 0xaf, 0xf4, +0xd9, 0x70, 0x67, 0xcc, 0xe8, 0xb9, 0x79, 0x55, 0x7a, 0x30, 0x1c, 0x38, 0x4f, 0x15, 0xd4, 0xc3, +0x66, 0xc5, 0xbe, 0x7c, 0xf9, 0xbf, 0x12, 0xee, 0x1b, 0x74, 0x81, 0x9c, 0x2b, 0x1f, 0x87, 0xd2, +0xb6, 0xc6, 0x9b, 0x2d, 0xf1, 0x94, 0x62, 0x5f, 0xa9, 0x9f, 0x5e, 0x97, 0x2b, 0xc4, 0x43, 0x42, +0x50, 0x68, 0x81, 0x78, 0x34, 0x36, 0xf3, 0x0d, 0x61, 0xed, 0xc1, 0xa5, 0xd2, 0x18, 0xe7, 0x9b, +0x57, 0x0a, 0xd4, 0x45, 0x6a, 0x77, 0xae, 0x2b, 0xa3, 0xa2, 0x46, 0x2e, 0x30, 0xd0, 0x2d, 0xdb, +0x3c, 0x7f, 0xf3, 0xfa, 0xbb, 0x57, 0xe2, 0x27, 0xc4, 0x91, 0xc7, 0x2a, 0xf4, 0x99, 0x87, 0x99, +0xbc, 0xa3, 0x12, 0x98, 0x22, 0xaf, 0x57, 0x70, 0xd6, 0x23, 0x48, 0xcb, 0xad, 0xb4, 0x30, 0xc8, +0x98, 0x54, 0xc1, 0x54, 0x08, 0xc5, 0xef, 0xc0, 0xbb, 0xe1, 0x4d, 0xfd, 0x0e, 0x8f, 0x9d, 0x6a, +0x7a, 0x0f, 0x4a, 0xc6, 0xab, 0x41, 0xff, 0x87, 0x23, 0xaa, 0x1a, 0x5f, 0x61, 0x52, 0xad, 0xea, +0x47, 0x4e, 0x2f, 0xc8, 0xc2, 0x2a, 0x29, 0xa1, 0x88, 0x00, 0x1d, 0x0f, 0x95, 0xf2, 0xa8, 0xa9, +0xb5, 0x75, 0x61, 0x96, 0xbc, 0x85, 0x38, 0x7b, 0x77, 0x2f, 0xbf, 0xe6, 0xd7, 0x6a, 0xd8, 0x44, +0x77, 0xce, 0x81, 0x21, 0xc9, 0x4f, 0xa3, 0x8a, 0x0d, 0x93, 0x28, 0xce, 0xb9, 0x3b, 0x97, 0xc9, +0xb5, 0xfa, 0x06, 0x64, 0xed, 0xaa, 0x07, 0x2f, 0x0c, 0x00}; + +unsigned char gzip_test_ref[] = +"Red Hat eCos Public License v1.1 + + + +1. DEFINITIONS + +1.1. \"Contributor\" means each entity that creates or +contributes to the creation of Modifications. + +1.2. \"Contributor Version\" means the combination of the +Original Code, prior Modifications used by a +Contributor, and the Modifications made by that +particular Contributor. + +1.3. \"Covered Code\" means the Original Code or +Modifications or the combination of the Original Code +and Modifications, in each case including portions +thereof. + +1.4. \"Electronic Distribution Mechanism\" means a +mechanism generally accepted in the software development +community for the electronic transfer of data. + +1.5. \"Executable\" means Covered Code in any form other +than Source Code. +1.6. \"Initial Developer\" means the individual or entity +identified as the Initial Developer in the Source Code +notice required by Exhibit A. + +1.7. \"Larger Work\" means a work which combines Covered +Code or portions thereof with code not governed by the +terms of this License. + +1.8. \"License\" means this document. + +1.9. \"Modifications\" means any addition to or deletion +from the substance or structure of either the Original +Code or any previous Modifications. When Covered Code is +released as a series of files, a Modification is: + + A. Any addition to or deletion from the + contents of a file containing Original Code or + previous Modifications. + + B. Any new file that contains any part of the + Original Code or previous Modifications. + +1.10. \"Original Code\" means Source Code of computer +software code which is described in the Source Code +notice required by Exhibit A as Original Code, and +which, at the time of its release under this License is +not already Covered Code governed by this License. + +1.11. \"Source Code\" means the preferred form of the +Covered Code for making modifications to it, including +all modules it contains, plus any associated interface +definition files, scripts used to control compilation +and installation of an Executable, or a list of source +code differential comparisons against either the +Original Code or another well known, available Covered +Code of the Contributor's choice. The Source Code can be +in a compressed or archival form, provided the +appropriate decompression or de-archiving software is +widely available for no charge. + +1.12. \"You\" means an individual or a legal entity +exercising rights under, and complying with all of the +terms of, this License or a future version of this +License issued under Section 6.1. For legal entities, +\"You\" includes any entity which controls, is controlled +by, or is under common control with You. For purposes of +this definition, \"control\" means (a) the power, direct +or indirect, to cause the direction or management of +such entity, whether by contract or otherwise, or (b) +ownership of fifty percent (50%) or more of the +outstanding shares or beneficial ownership of such +entity. + +1.13. \"Red Hat Branded Code\" is code that Red Hat +distributes and/or permits others to distribute under +different terms than the Red Hat eCos Public License. +Red Hat's Branded Code may contain part or all of the +Covered Code. +"; + +static void entry0( cyg_addrword_t data ) +{ + int i; + unsigned long len; + int err; + int buf_size = sizeof(gzip_test_ref)+512; + unsigned char* unpacked = malloc(buf_size); + + if (NULL == unpacked) + CYG_TEST_NA("Not enough memory for buffers"); + + CYG_TEST_INFO("Decompressing"); + len = buf_size; + err = uncompress(unpacked, &len, gzip_test, sizeof(gzip_test)); + + switch (err) { + case Z_OK: + CYG_TEST_FAIL_FINISH("Unexpected success!"); + break; + case Z_MEM_ERROR: + CYG_TEST_NA("Not enough memory for decompression"); + break; + case Z_BUF_ERROR: + CYG_TEST_FAIL_FINISH("Decompressed data larger than original"); + break; + case Z_DATA_ERROR: + CYG_TEST_FAIL_FINISH("Decompression failed"); + break; + case Z_BAD_CRC: + // This is what we hoped for! zlib CRC is bad because it's + // different from gz CRC. + break; + default: + CYG_TEST_FAIL_FINISH("Unknown decompression error"); + break; + } + + for (i = 0; i < sizeof(gzip_test_ref)-1; i++) { + if (gzip_test_ref[i] != unpacked[i]) + CYG_TEST_FAIL_FINISH("Verify failed"); + } + + CYG_TEST_PASS_FINISH("zlib2 OK"); +} + +void zlib2_main( void ) +{ + CYG_TEST_INIT(); + + cyg_thread_create(4, entry0 , (cyg_addrword_t)0, "zlib1", + (void *)stack[0], STACKSIZE,&thread[0], &thread_obj[0]); + cyg_thread_resume(thread[0]); + + cyg_scheduler_start(); + + CYG_TEST_FAIL_FINISH("Not reached"); +} + +externC void +cyg_start( void ) +{ + zlib2_main(); +} + +#else /* def CYGFUN_KERNEL_API_C */ +externC void +cyg_start( void ) +{ + CYG_TEST_INIT(); + CYG_TEST_NA("Kernel C API layer disabled"); +} +#endif /* def CYGFUN_KERNEL_API_C */ + +// EOF zlib1.c diff --git a/packages/services/memalloc/common/current/ChangeLog b/packages/services/memalloc/common/current/ChangeLog --- a/packages/services/memalloc/common/current/ChangeLog +++ b/packages/services/memalloc/common/current/ChangeLog @@ -1,3 +1,8 @@ +2001-03-21 Jonathan Larmour + + * cdl/memalloc.cdl: Specify explicit output file when preprocessing + heapgen.cpp. Improves portability. + 2001-02-01 Jonathan Larmour * tests/malloc4.cxx: Use semaphores to sync startup order. diff --git a/packages/services/memalloc/common/current/cdl/memalloc.cdl b/packages/services/memalloc/common/current/cdl/memalloc.cdl --- a/packages/services/memalloc/common/current/cdl/memalloc.cdl +++ b/packages/services/memalloc/common/current/cdl/memalloc.cdl @@ -217,7 +217,7 @@ cdl_package CYGPKG_MEMALLOC { make -priority 50 { heapgeninc.tcl : /src/heapgen.cpp - $(CC) $(CFLAGS) $(INCLUDE_PATH) -Wp,-MD,heapgen.tmp -E $< > $@ + $(CC) $(CFLAGS) $(INCLUDE_PATH) -Wp,-MD,heapgen.tmp -E $< -o $@ @echo $@ ':' $< '\' > $(notdir $@).deps @tail +2 heapgen.tmp >> $(notdir $@).deps @echo >> $(notdir $@).deps diff --git a/packages/templates/redboot/ChangeLog b/packages/templates/redboot/ChangeLog --- a/packages/templates/redboot/ChangeLog +++ b/packages/templates/redboot/ChangeLog @@ -1,3 +1,8 @@ +2001-03-19 Jesper Skov + + * current.ect: Don't set CYGBLD_BUILD_GDB_STUBS - it should be + not be present in new platform ports. + 2000-07-30 Gary Thomas * current.ect: Ensure no mininum context saves - bad for debuggers. diff --git a/packages/templates/redboot/current.ect b/packages/templates/redboot/current.ect --- a/packages/templates/redboot/current.ect +++ b/packages/templates/redboot/current.ect @@ -15,10 +15,6 @@ This is the RedBoot configuration, used package CYGPKG_REDBOOT current ; }; -cdl_option CYGBLD_BUILD_GDB_STUBS { - user_value 0 ; -}; - cdl_option CYGBLD_BUILD_REDBOOT { user_value 1 ; };