# HG changeset patch
# User msalter
# Date 1030621788 0
# Node ID e17d1cf55283dca720942ccbdbc055d2f11720c2
# Parent  865310daf9500fe1cb985ae366207daa0b8631d5
ARM exception handler fix

diff --git a/packages/hal/arm/arch/current/ChangeLog b/packages/hal/arm/arch/current/ChangeLog
--- a/packages/hal/arm/arch/current/ChangeLog
+++ b/packages/hal/arm/arch/current/ChangeLog
@@ -1,3 +1,7 @@
+2002-08-29  Mark Salter  <msalter@redhat.com>
+
+	* src/vectors.S: Avoid entering thumb mode in exception handlers.
+
 2002-08-27  Mark Salter  <msalter@redhat.com>
 
 	* src/arm.ld: Undefine arm to avoid problem with .note.arm.ident.
diff --git a/packages/hal/arm/arch/current/src/vectors.S b/packages/hal/arm/arch/current/src/vectors.S
--- a/packages/hal/arm/arch/current/src/vectors.S
+++ b/packages/hal/arm/arch/current/src/vectors.S
@@ -585,6 +585,7 @@ 10:
         mov     r0,sp                   // r0 survives mode switch
         mrs     r2,cpsr                 // Save current psr for return
         orr     r1,r1,#CPSR_IRQ_DISABLE|CPSR_FIQ_DISABLE
+        bic     r1,r1,#CPSR_THUMB_ENABLE
         msr     cpsr,r1
         stmfd   r0!,{r8-r12,sp,lr}
         msr     cpsr,r2                 // back to svc mode
@@ -644,6 +645,7 @@ return_from_exception:
         add     r2,sp,#armreg_r8
         mrs     r1,cpsr
         orr     r0,r0,#CPSR_IRQ_DISABLE|CPSR_FIQ_DISABLE
+        bic     r0,r0,#CPSR_THUMB_ENABLE
         msr     cpsr,r0
         ldmfd   r2,{r8-r14}
         msr     cpsr, r1        // back to svc mode
@@ -724,6 +726,7 @@ handle_IRQ_or_FIQ:
         mov     r0,sp                   // r0 survives mode switch
         mrs     r2,cpsr                 // Save current psr for return
         orr     r1,r1,#CPSR_IRQ_DISABLE|CPSR_FIQ_DISABLE
+        bic     r1,r1,#CPSR_THUMB_ENABLE
         msr     cpsr,r1
         stmfd   r0!,{r8-r12,sp,lr}
         msr     cpsr,r2                 // back to svc mode