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devs/nand/micron_mt29: Remove defunct references (in comments) to mt29f2g08_oob_ecc.
author Ross Younger <wry@ecoscentric.com>
date Sun, 18 Jan 2015 17:59:01 +1300
parents 842a82a508f3
children
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1 #ifndef CYGONCE_HAL_PPC_STUB_H
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2 #define CYGONCE_HAL_PPC_STUB_H
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3 //========================================================================
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4 //
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5 // ppc_stub.h
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6 //
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7 // PowerPC-specific definitions for generic stub
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8 //
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9 //========================================================================
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10 // ####ECOSGPLCOPYRIGHTBEGIN####
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11 // -------------------------------------------
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12 // This file is part of eCos, the Embedded Configurable Operating System.
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13 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
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14 //
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15 // eCos is free software; you can redistribute it and/or modify it under
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16 // the terms of the GNU General Public License as published by the Free
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17 // Software Foundation; either version 2 or (at your option) any later
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18 // version.
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19 //
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20 // eCos is distributed in the hope that it will be useful, but WITHOUT
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21 // ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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22 // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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23 // for more details.
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24 //
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25 // You should have received a copy of the GNU General Public License
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26 // along with eCos; if not, write to the Free Software Foundation, Inc.,
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27 // 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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28 //
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29 // As a special exception, if other files instantiate templates or use
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30 // macros or inline functions from this file, or you compile this file
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31 // and link it with other works to produce a work based on this file,
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32 // this file does not by itself cause the resulting work to be covered by
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33 // the GNU General Public License. However the source code for this file
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34 // must still be made available in accordance with section (3) of the GNU
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35 // General Public License v2.
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36 //
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37 // This exception does not invalidate any other reasons why a work based
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38 // on this file might be covered by the GNU General Public License.
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39 // -------------------------------------------
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40 // ####ECOSGPLCOPYRIGHTEND####
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41 //========================================================================
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42 //#####DESCRIPTIONBEGIN####
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43 //
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44 // Author(s): Red Hat, jskov
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45 // Contributors: Red Hat, jskov
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46 // Date: 1998-08-20
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47 // Purpose:
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48 // Description: PowerPC-specific definitions for generic stub
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49 // Usage:
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50 //
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51 //####DESCRIPTIONEND####
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52 //
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53 //========================================================================
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54
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55 #ifdef __cplusplus
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56 extern "C" {
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57 #endif
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58
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59 typedef unsigned long target_register_t;
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60
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61
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62 #ifndef CYGHWR_HAL_POWERPC_BOOK_E
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63
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64 // Most PowerPCs use a standard register layout.
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65
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66 #define NUMREGS 71
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67
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68 #define REGSIZE( _x_ ) (((_x_) >= F0 && (_x_) <= F31) ? 8 : 4)
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69
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70 #else
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71
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72 // BookE processors only have 70 registers, MQ is not supported. All
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73 // registers are 32 bit and instead of FP registers there are the top
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74 // 32 bits of the GPRs. The 64-bit registers are only used by SPE
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75 // instructions, which we don't currently support.
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76
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77 #define NUMREGS 70
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78
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79 #define REGSIZE( _x_ ) (4)
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80
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81 #endif
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82
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83
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84 #ifdef CYGHWR_HAL_POWERPC_FPU
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85 // The PowerPC has floating point registers that are larger than what it
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86 // can hold in a target_register_t
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87 #define TARGET_HAS_LARGE_REGISTERS
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88
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89 // PowerPC stub has special needs for register handling because flating point
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90 // registers are bigger than the rest. Special put_register and get_register
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91 // are provided
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92 #define CYGARC_STUB_REGISTER_ACCESS_DEFINED 1
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93
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94 // extra space needed for floating point registers
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95 #define HAL_STUB_REGISTERS_SIZE ((sizeof(GDB_Registers) + sizeof(target_register_t) - 1)/sizeof(target_register_t))
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96 #endif
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97
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98
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99 enum regnames {
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100 R0, R1, R2, R3, R4, R5, R6, R7,
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101 R8, R9, R10, R11, R12, R13, R14, R15,
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102 R16, R17, R18, R19, R20, R21, R22, R23,
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103 R24, R25, R26, R27, R28, R29, R30, R31,
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104 F0, F1, F2, F3, F4, F5, F6, F7,
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105 F8, F9, F10, F11, F12, F13, F14, F15,
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106 F16, F17, F18, F19, F20, F21, F22, F23,
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107 F24, F25, F26, F27, F28, F29, F30, F31,
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108 PC, PS, CND, LR, CNT, XER, MQ
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109 };
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110
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111 // For convenience
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112 #define SP R1
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113
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114 typedef enum regnames regnames_t;
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115
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116 /* Given a trap value TRAP, return the corresponding signal. */
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117 extern int __computeSignal (unsigned int trap_number);
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118
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119 /* Return the SPARC trap number corresponding to the last-taken trap. */
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120 extern int __get_trap_number (void);
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121
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122 /* Return the currently-saved value corresponding to register REG. */
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123 extern target_register_t get_register (regnames_t reg);
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124
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125 /* Store VALUE in the register corresponding to WHICH. */
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126 extern void put_register (regnames_t which, target_register_t value);
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127
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128 /* Set the currently-saved pc register value to PC. This also updates NPC
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129 as needed. */
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130 extern void set_pc (target_register_t pc);
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131
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132 /* Set things up so that the next user resume will execute one instruction.
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133 This may be done by setting breakpoints or setting a single step flag
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134 in the saved user registers, for example. */
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135 void __single_step (void);
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136
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137 /* Clear the single-step state. */
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138 void __clear_single_step (void);
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139
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140 /* If the breakpoint we hit is in the breakpoint() instruction, return a
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141 non-zero value. */
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142 extern int __is_breakpoint_function (void);
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143
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144 /* Skip the current instruction. */
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145 extern void __skipinst (void);
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146
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147 extern void __install_breakpoints (void);
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148
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149 extern void __clear_breakpoints (void);
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150
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151 #ifdef __cplusplus
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152 } /* extern "C" */
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153 #endif
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154
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155 #endif // ifndef CYGONCE_HAL_PPC_STUB_H