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comparison packages/hal/mips/arch/current/src/vectors.S @ 38:e7ba79f6d3a8 ecos-sw-1999-09-23

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Merge from eCos master repository on 1999-09-23-20:10:25-BST
author jlarmour
date Thu, 23 Sep 1999 19:52:27 +0000
parents 306eee292492
children 1370c5e55234
comparison
equal deleted inserted replaced
37:0b25345c9c69 38:e7ba79f6d3a8
375 375
376 la ra,restore_state # load return address 376 la ra,restore_state # load return address
377 377
378 hal_cpu_except_enable # reenable exceptions 378 hal_cpu_except_enable # reenable exceptions
379 379
380 .extern exception_handler 380 .extern cyg_hal_exception_handler
381 j exception_handler # call C code 381 j cyg_hal_exception_handler # call C code
382 move a0,s0 # arg0 = register dump (delay slot) 382 move a0,s0 # arg0 = register dump (delay slot)
383 383
384 # When the exception handler returns, it will 384 # When the exception handler returns, it will
385 # go back to restore_state, below. 385 # go back to restore_state, below.
386 386
560 # and put it in SP. 560 # and put it in SP.
561 561
562 562
563 lw sp,mips_stack_frame_size(sp) # sp = *sp 563 lw sp,mips_stack_frame_size(sp) # sp = *sp
564 subu sp,sp,mips_stack_frame_size # make a null frame 564 subu sp,sp,mips_stack_frame_size # make a null frame
565 #endif 565 #endif
566 566
567 #ifdef CYGFUN_HAL_COMMON_KERNEL_SUPPORT 567 #ifdef CYGFUN_HAL_COMMON_KERNEL_SUPPORT
568 568
569 # We only need to call _interrupt_end() when there is a kernel 569 # We only need to call _interrupt_end() when there is a kernel
570 # present to do any tidying up. 570 # present to do any tidying up.
577 # Note that s0, s1 and s2 are defined to be preserved across 577 # Note that s0, s1 and s2 are defined to be preserved across
578 # calls by the calling convention, so they still contain 578 # calls by the calling convention, so they still contain
579 # the register dump, the vector offset and the interrupt number 579 # the register dump, the vector offset and the interrupt number
580 # respectively. 580 # respectively.
581 581
582 move a0,v0 # put ISR result in arg0 582 move s2,v0
583 583
584 la a1,hal_interrupt_objects # interrupt object table 584 la a1,hal_interrupt_objects # interrupt object table
585 add a1,a1,s1 # address of object ptr 585 add a1,a1,s1 # address of object ptr
586 lw a1,0(a1) # a1 = object ptr 586 lw a1,0(a1) # a1 = object ptr
587 587
588 move a2,s0 # arg3 = saved register dump 588 move a2,s0 # arg3 = saved register dump
589 589
590 .extern interrupt_end 590 .extern interrupt_end
591 jal interrupt_end # call into C to finish off 591 jal interrupt_end # call into C to finish off
592 nop # (delay slot) 592 move a0,v0 # put ISR result in arg0
593 593
594 move v0,s2 # return value from isr
594 #endif 595 #endif
595 596
596 restore_state: 597 restore_state:
598 move k0,v0
597 599
598 # All done, restore CPU state and continue 600 # All done, restore CPU state and continue
599 601
600 addi sp,sp,mips_stack_frame_size # retrieve CPU state ptr 602 addi sp,sp,mips_stack_frame_size # retrieve CPU state ptr
601 603
646 lw $28,(mipsreg_regs+28*4)(sp) # == GP 648 lw $28,(mipsreg_regs+28*4)(sp) # == GP
647 # lw $29,(mipsreg_regs+29*4)(sp) # == SP 649 # lw $29,(mipsreg_regs+29*4)(sp) # == SP
648 lw $30,(mipsreg_regs+30*4)(sp) # == FP 650 lw $30,(mipsreg_regs+30*4)(sp) # == FP
649 lw $31,(mipsreg_regs+31*4)(sp) # == RA 651 lw $31,(mipsreg_regs+31*4)(sp) # == RA
650 .set at 652 .set at
651 653
654
655 #if defined(CYG_HAL_USE_ROM_MONITOR_CYGMON)
656
657 # If we have a Cygmon that wants to listen to network interrupts, then
658 # the return code from the earlier call to hal_default_isr() will
659 # have been negative to indicate this. So we jump into Cygmon here
660 # because Cygmon requires the processor state to be the same as when
661 # the interrupt was taken, but with k0 as the exception number.
662
663 bgez k0,1f
664 nop
665 # Check for new cygmon
666 sw k0,(mipsreg_regs+26*4)(sp) # save k0
667 la k1,0x80000100 + 41*4 # New cygmon "magic" id
668 lw k1,0(k1)
669 lui k0,0x55aa
670 ori k0,0x4321
671 bne k0,k1,1f
672
673 # Need to let cygmon handle this
674 la k1,0x80000100 + 39*4 # stub entry vector
675 lw k0,(mipsreg_regs+26*4)(sp) # restore k0
676 lw k1,0(k1)
677 lw sp,(mipsreg_regs+29*4)(sp) # restore SP
678 sll k0,1 # clear bit 31.
679 jr k1
680 srl k0,1
681 1:
682 #endif
652 lw k0,mipsreg_pc(sp) # K0 = return PC 683 lw k0,mipsreg_pc(sp) # K0 = return PC
653 lw k1,mipsreg_sr(sp) # K1 = saved SR 684 lw k1,mipsreg_sr(sp) # K1 = saved SR
654 lw sp,(mipsreg_regs+29*4)(sp) # load SP 685 lw sp,(mipsreg_regs+29*4)(sp) # load SP
655 686
656 # Invoke CPU specific mechanism for returning from this 687 # Invoke CPU specific mechanism for returning from this