# HG changeset patch
# User jlarmour
# Date 930930277 0
# Node ID 5f5102441818cfcda17c5e8005481d0c9c4ec830
# Parent  1543030615514c52adddb6dfeaad68b6e51de343
Merge from eCos master repository on 1999-07-02-23:17:07-BST

diff --git a/packages/hal/arm/arch/current/ChangeLog b/packages/hal/arm/arch/current/ChangeLog
--- a/packages/hal/arm/arch/current/ChangeLog
+++ b/packages/hal/arm/arch/current/ChangeLog
@@ -1,3 +1,10 @@
+1999-06-22  Gary Thomas  <gthomas@cygnus.co.uk>
+
+	* src/vectors.S: Fix names of 'report' functions (debug dumps
+	for various exceptions).  These needed changes for two reasons:
+	name pollution and naming clashes after new ABI adopted.
+	Improve support for FIQ interrupts.
+
 1999-06-15  Gary Thomas  <gthomas@cygnus.co.uk>
 
 	* src/vectors.S (vectors): Some boards have an MMU, but the
diff --git a/packages/hal/arm/arch/current/src/context.S b/packages/hal/arm/arch/current/src/context.S
--- a/packages/hal/arm/arch/current/src/context.S
+++ b/packages/hal/arm/arch/current/src/context.S
@@ -86,7 +86,7 @@ FUNC_START(hal_thread_switch_context)
 FUNC_START(hal_thread_load_context)
 	ldr	fp,[r0]			// get context to restore
 	mrs	r0,cpsr			// disable IRQ's
-	orr	r0,r0,#CPSR_IRQ_DISABLE
+	orr	r0,r0,#CPSR_IRQ_DISABLE|CPSR_FIQ_DISABLE
 	msr	cpsr,r0
 	ldr	r0,[fp,#armreg_cpsr]
 	msr	spsr,r0
diff --git a/packages/hal/arm/arch/current/src/hal_misc.c b/packages/hal/arm/arch/current/src/hal_misc.c
--- a/packages/hal/arm/arch/current/src/hal_misc.c
+++ b/packages/hal/arm/arch/current/src/hal_misc.c
@@ -322,7 +322,7 @@ show_frame_out(HAL_SavedRegisters *frame
 
 #ifdef  CYGHWR_HAL_ARM_DUMP_EXCEPTIONS
 // Debug routines
-void undefined_instruction(HAL_SavedRegisters *frame)
+void cyg_hal_report_undefined_instruction(HAL_SavedRegisters *frame)
 {
     int old;
     HAL_DISABLE_INTERRUPTS(old);
@@ -331,7 +331,7 @@ void undefined_instruction(HAL_SavedRegi
     HAL_RESTORE_INTERRUPTS(old);
 }
 
-void software_interrupt(HAL_SavedRegisters *frame)
+void cyg_hal_report_software_interrupt(HAL_SavedRegisters *frame)
 {
     int old;
     HAL_DISABLE_INTERRUPTS(old);
@@ -340,7 +340,7 @@ void software_interrupt(HAL_SavedRegiste
     HAL_RESTORE_INTERRUPTS(old);
 }
 
-void abort_prefetch(HAL_SavedRegisters *frame)
+void cyg_hal_report_abort_prefetch(HAL_SavedRegisters *frame)
 {
     int old;
     HAL_DISABLE_INTERRUPTS(old);
@@ -349,7 +349,7 @@ void abort_prefetch(HAL_SavedRegisters *
     HAL_RESTORE_INTERRUPTS(old);
 }
 
-void abort_data(HAL_SavedRegisters *frame)
+void cyg_hal_report_abort_data(HAL_SavedRegisters *frame)
 {
     int old;
     HAL_DISABLE_INTERRUPTS(old);
@@ -358,16 +358,7 @@ void abort_data(HAL_SavedRegisters *fram
     HAL_RESTORE_INTERRUPTS(old);
 }
 
-void FIQ(HAL_SavedRegisters *frame)
-{
-    int old;
-    HAL_DISABLE_INTERRUPTS(old);
-    diag_printf("[FIQ] Frame:\n");
-    dump_frame((unsigned char *)frame);
-    HAL_RESTORE_INTERRUPTS(old);
-}
-
-void exception_handler_returned(HAL_SavedRegisters *frame)
+void cyg_hal_report_exception_handler_returned(HAL_SavedRegisters *frame)
 {    
     int old;
     HAL_DISABLE_INTERRUPTS(old);
diff --git a/packages/hal/arm/arch/current/src/vectors.S b/packages/hal/arm/arch/current/src/vectors.S
--- a/packages/hal/arm/arch/current/src/vectors.S
+++ b/packages/hal/arm/arch/current/src/vectors.S
@@ -209,7 +209,7 @@ 2:
 	ldr	sp,.__exception_stack
 	mov	r0,#(CPSR_IRQ_DISABLE|CPSR_FIQ_DISABLE|CPSR_FIQ_MODE)
 	msr	cpsr,r0
-	ldr	sp,.__exception_stack
+	ldr	sp,.__FIQ_exception_stack
 	mov	r0,#(CPSR_IRQ_DISABLE|CPSR_FIQ_DISABLE|CPSR_UNDEF_MODE)
 	msr	cpsr,r0
 	ldr	sp,.__exception_stack
@@ -297,7 +297,7 @@ 10:
 	str	fp,[sp,#armreg_sp]	// SP at time of interrupt
 #ifdef  CYGHWR_HAL_ARM_DUMP_EXCEPTIONS
 	mov	r0,sp
-	bl	undefined_instruction
+	bl	cyg_hal_report_undefined_instruction
 #endif
 	mov	v1,#CYGNUM_HAL_EXCEPTION_ILLEGAL_INSTRUCTION
 	b	call_exception_handler
@@ -329,7 +329,7 @@ software_interrupt:
 	str	r0,[sp,#armreg_sp]	// SP at time of interrupt
 #ifdef  CYGHWR_HAL_ARM_DUMP_EXCEPTIONS
 	mov	r0,sp
-	bl	software_interrupt
+	bl	cyg_hal_report_software_interrupt
 #endif
 	mov	v1,#CYGNUM_HAL_EXCEPTION_INTERRUPT
 	b	call_exception_handler
@@ -372,7 +372,7 @@ 10:
 	str	fp,[sp,#armreg_sp]	// SP at time of interrupt
 #ifdef  CYGHWR_HAL_ARM_DUMP_EXCEPTIONS
 	mov	r0,sp
-	bl	abort_prefetch
+	bl	cyg_hal_report_abort_prefetch
 #endif
 	mov	v1,#CYGNUM_HAL_EXCEPTION_CODE_ACCESS
 	b	call_exception_handler
@@ -415,43 +415,12 @@ 10:
 	str	fp,[sp,#armreg_sp]	// SP at time of interrupt
 #ifdef  CYGHWR_HAL_ARM_DUMP_EXCEPTIONS
 	mov	r0,sp
-	bl	abort_data
+	bl	cyg_hal_report_abort_data
 #endif
 	mov	v1,#CYGNUM_HAL_EXCEPTION_DATA_ACCESS
 	b	call_exception_handler
 
-	.code	32
-FIQ:
-	ldr	sp,.__startup_stack	// get good stack
-	sub	lr,lr,#4		// PC at time of interrupt
-	stmfd	sp!,{r0,ip,lr}		
-	mrs	r0,spsr
-	stmfd	sp!,{r0}
-	mov	ip,sp			// save SP which will vanish with
-                                        //    mode switch
-	mrs	r0,cpsr			// switch to Supervisor Mode
-	bic	r0,r0,#CPSR_MODE_BITS
-	orr	r0,r0,#CPSR_SUPERVISOR_MODE
-	msr	cpsr,r0			// sp,lr are now old values
-	mov	ip,sp
-	ldr	sp,.__startup_stack	// get good stack
-	sub	sp,sp,#ARMREG_SIZE+16	// make space for frame
-	stmea	sp,{r0-r10,fp}		// save immediately visible registers
-	ldmfd	ip,{r0-r3}		// saved registers
-	str	r0,[sp,#armreg_cpsr]	// CPSR at time of interrupt
-	str	r1,[sp,#armreg_r0]	// saved R0
-	str	r2,[sp,#armreg_ip]	// saved IP
-	str	r3,[sp,#armreg_pc]	// PC at time of interrupt
-	str	lr,[sp,#armreg_lr]	// LR at time of interrupt
-	add	r0,ip,#ARMREG_SIZE
-	str	r0,[sp,#armreg_sp]	// SP at time of interrupt
-#ifdef  CYGHWR_HAL_ARM_DUMP_EXCEPTIONS
-	mov	r0,sp
-	bl	FIQ
-#endif
-	mov	v1,#CYGNUM_HAL_EXCEPTION_FIQ
-	b	call_exception_handler
-
+        
 //
 // Dispatch an exception handler.
 
@@ -462,7 +431,7 @@ call_exception_handler:
 	bl	exception_handler
 #ifdef  CYGHWR_HAL_ARM_DUMP_EXCEPTIONS
 	mov	r0,sp
-	bl	exception_handler_returned
+	bl	cyg_hal_report_exception_handler_returned
 #endif
 
 // Restore [interrupted] context
@@ -490,6 +459,16 @@ call_exception_handler:
 // it needs to interface with the kernel (if present).
 
 	.code	32
+FIQ:
+	// Note: I use this exception stack while saving the context because
+	// the current SP does not seem to be always valid in this CPU mode.
+	ldr	sp,.__FIQ_exception_stack	// get good stack
+	sub	lr,lr,#4		// PC at time of interrupt
+	stmfd	sp!,{r0,fp,ip,lr}		
+	mrs	r0,spsr
+	stmfd	sp!,{r0}
+        b       handle_IRQ_or_FIQ
+
 IRQ:
 	// Note: I use this exception stack while saving the context because
 	// the current SP does not seem to be always valid in this CPU mode.
@@ -498,11 +477,13 @@ IRQ:
 	stmfd	sp!,{r0,fp,ip,lr}		
 	mrs	r0,spsr
 	stmfd	sp!,{r0}
+
+handle_IRQ_or_FIQ:              
 	mov	ip,sp			// save SP which will vanish with
                                         //   mode switch
 	mrs	r0,cpsr			// switch to Supervisor Mode
 	bic	r0,r0,#CPSR_MODE_BITS
-	orr	r0,r0,#CPSR_SUPERVISOR_MODE
+	orr	r0,r0,#CPSR_SUPERVISOR_MODE|CPSR_FIQ_DISABLE|CPSR_IRQ_DISABLE
 	msr	cpsr,r0			// sp,lr are now old values
 	mov	fp,sp			// save old SP
 	sub	sp,sp,#ARMREG_SIZE	// make space for frame
@@ -619,8 +600,8 @@ hal_interrupt_stack_call_pending_DSRs:
         stmfd	sp!,{r4,r5,lr}
 	// Disable interrupts
 	mrs	r4,cpsr			// disable IRQ's
-	orr	r2,r4,#CPSR_IRQ_DISABLE
-	bic	r5,r4,#CPSR_IRQ_DISABLE
+	orr	r2,r4,#CPSR_IRQ_DISABLE|CPSR_FIQ_DISABLE
+	bic	r5,r4,#CPSR_IRQ_DISABLE|CPSR_FIQ_DISABLE
 	msr	cpsr,r2
 	// Switch to interrupt stack
 	mov	r3,sp			// save old stack pointer
@@ -636,7 +617,7 @@ hal_interrupt_stack_call_pending_DSRs:
 
 	// Disable interrupts
 	mrs	r1,cpsr			// disable IRQ's
-	orr	r2,r1,#CPSR_IRQ_DISABLE
+	orr	r2,r1,#CPSR_IRQ_DISABLE|CPSR_FIQ_DISABLE
 	msr	cpsr,r2
 
 	// Move back to the thread stack.
@@ -676,6 +657,7 @@ PTR(__GDB_stack_base)
 PTR(__GDB_stack)
 #endif
 PTR(__startup_stack)
+PTR(__FIQ_exception_stack)
 PTR(__exception_stack)
 PTR(__undef_exception_stack)
 PTR(__bss_start)
@@ -749,6 +731,10 @@ hal_interrupt_objects:
         .rept   32
         .long   0
         .endr
+__FIQ_exception_stack:
+        .rept   32
+        .long   0
+        .endr
 __exception_stack:
         .rept   32
         .long   0
diff --git a/packages/hal/common/current/ChangeLog b/packages/hal/common/current/ChangeLog
--- a/packages/hal/common/current/ChangeLog
+++ b/packages/hal/common/current/ChangeLog
@@ -1,3 +1,13 @@
+1999-07-02  Jesper Skov  <jskov@cygnus.co.uk>
+        PR20157
+	* tests/cache.c: Print stride values, preventing timeout on slow
+	targets.
+
+1999-06-28  Jesper Skov  <jskov@cygnus.co.uk>
+
+	* include/pkgconf/hal.h (CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT):
+	Fixed parent.
+
 1999-06-24  Jonathan Larmour  <jlarmour@cygnus.co.uk>
 
 	* include/pkgconf/hal.h: Clarify descriptions of
diff --git a/packages/hal/common/current/include/pkgconf/hal.h b/packages/hal/common/current/include/pkgconf/hal.h
--- a/packages/hal/common/current/include/pkgconf/hal.h
+++ b/packages/hal/common/current/include/pkgconf/hal.h
@@ -327,7 +327,7 @@
 
  cdl_option CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT {
      display    "Include GDB external break support for stubs"
-     parent     CYGDBG_HAL_DEBUG
+     parent     CYGPKG_HAL_DEBUG
      requires   CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
      requires   !CYGPKG_HAL_MIPS_TX39_JMR3904
      requires   !CYGPKG_HAL_POWERPC_FADS
diff --git a/packages/hal/common/current/tests/cache.c b/packages/hal/common/current/tests/cache.c
--- a/packages/hal/common/current/tests/cache.c
+++ b/packages/hal/common/current/tests/cache.c
@@ -41,6 +41,7 @@
 
 #include <cyg/hal/hal_cache.h>
 #include <cyg/hal/hal_intr.h>
+#include <cyg/infra/diag.h>
 
 // -------------------------------------------------------------------------
 // If the HAL does not supply this, we supply our own version
@@ -81,11 +82,10 @@ volatile char m[MAXSIZE];
 static void time0(register cyg_uint32 stride)
 {
     register cyg_uint32 j,k;
-//    cyg_tick_count_t count0, count1;
-//    cyg_ucount32 t;
     register char c;
 
-//    count0 = current_time();
+    diag_printf("stride=%d\n", stride);
+
     k = 0;
     if ( cyg_test_is_simulator )
         k = 3960;
@@ -95,10 +95,6 @@ static void time0(register cyg_uint32 st
             c=m[stride*j];
         }
     }
-
-//    count1 = current_time();
-//    t = count1 - count0;
-//    diag_printf("stride=%d, time=%d\n", stride, t);
 }
 
 // -------------------------------------------------------------------------
diff --git a/packages/hal/powerpc/arch/current/ChangeLog b/packages/hal/powerpc/arch/current/ChangeLog
--- a/packages/hal/powerpc/arch/current/ChangeLog
+++ b/packages/hal/powerpc/arch/current/ChangeLog
@@ -1,3 +1,29 @@
+1999-06-29  Hugo Tyson  <hmt@cygnus.co.uk>
+
+	* include/hal_intr.h (CYGNUM_HAL_EXCEPTION_DATA_ACCESS): Define
+	this for handling MACHINE_CHECK if an MPC860 - it never generates
+	ISI nor DSI exceptions, only machine check.  This allows libc to
+	catch SEGVs from this unexpected quarter.
+
+1999-06-28  Hugo Tyson  <hmt@cygnus.co.uk>
+
+	* include/ppc_regs.h: Add proper definitions of timebase regs.
+
+	* tests/intr0.c: Add some useful debugging printouts and recording
+	of state, and make more platform-portable; the rate of PTA is not
+	always 1:32 wrt the timebase.
+
+1999-06-27  Gary Thomas  <gthomas@cygnus.co.uk>
+
+	* src/vectors.S (_start): Call platform dependent IRQ setup (see
+	next note).
+
+	* src/hal_intr.c (hal_IRQ_init): New platform dependent function
+	used to setup whatever is necessary to handle interrupts.
+
+	* include/hal_intr.h: Fix CPM interrupt macros - control register
+	is 32 bits, not 16.
+
 1999-06-24  Jesper Skov  <jskov@cygnus.co.uk>
 
 	* misc/CPUMask8xx.c: Added.
diff --git a/packages/hal/powerpc/arch/current/include/hal_intr.h b/packages/hal/powerpc/arch/current/include/hal_intr.h
--- a/packages/hal/powerpc/arch/current/include/hal_intr.h
+++ b/packages/hal/powerpc/arch/current/include/hal_intr.h
@@ -97,9 +97,24 @@
 // external exception handler using cyg_hal_deliver_exception()
 
 #define CYGNUM_HAL_EXCEPTION_RESERVED_0      CYGNUM_HAL_VECTOR_RESERVED_0
+
+#ifdef CYG_HAL_POWERPC_MPC860
+// The MPC860 does not generate DSI and ISI: instead it goes to machine
+// check, so that a software VM system can then call into vectors 0x300 or
+// 0x400 if the address is truly invalid rather than merely not in the TLB
+// right now.  Shades of IBM wanting to port OS/MVS here!
+// See pp 7-9/10 in "PowerQUICC - MPC860 User's Manual"
+#define CYGNUM_HAL_EXCEPTION_DATA_ACCESS     CYGNUM_HAL_VECTOR_MACHINE_CHECK
+// do not define catchers for DSI and ISI - should never happen.
+#else
+// Sensible PowerPCs that do what the architecture suggests.  See 6-25...29
+// in "PowerPC Microprocessor Family: the Programming Environments"
+// (Note: eCos libc does not catch CYGNUM_HAL_EXCEPTION_MACHINE_CHECK)
 #define CYGNUM_HAL_EXCEPTION_MACHINE_CHECK   CYGNUM_HAL_VECTOR_MACHINE_CHECK
 #define CYGNUM_HAL_EXCEPTION_DATA_ACCESS     CYGNUM_HAL_VECTOR_DSI
 #define CYGNUM_HAL_EXCEPTION_CODE_ACCESS     CYGNUM_HAL_VECTOR_ISI
+#endif // !CYG_HAL_POWERPC_MPC860 : DSI and ISI exceptions generated
+
 #define CYGNUM_HAL_EXCEPTION_DATA_UNALIGNED_ACCESS  \
            CYGNUM_HAL_VECTOR_ALIGNMENT
 #define CYGNUM_HAL_EXCEPTION_FPU_NOT_AVAIL   CYGNUM_HAL_VECTOR_FP_UNAVAILABLE
@@ -480,11 +495,11 @@ cyg_hal_interrupt_mask ( cyg_uint32 vect
     case CYGNUM_HAL_INTERRUPT_SIU_CPM:
     {
         // Communications Processor Module
-        cyg_uint16 cicr;
+        cyg_uint32 cicr;
 
-        HAL_READ_UINT16 (CYGARC_REG_IMM_CICR, cicr);
+        HAL_READ_UINT32 (CYGARC_REG_IMM_CICR, cicr);
         cicr &= ~(CYGARC_REG_IMM_CICR_IEN);
-        HAL_WRITE_UINT16 (CYGARC_REG_IMM_CICR, cicr);
+        HAL_WRITE_UINT32 (CYGARC_REG_IMM_CICR, cicr);
         break;
     }
     case CYGNUM_HAL_INTERRUPT_CPM_FIRST ... CYGNUM_HAL_INTERRUPT_CPM_LAST:
@@ -576,11 +591,11 @@ cyg_hal_interrupt_unmask ( cyg_uint32 ve
     case CYGNUM_HAL_INTERRUPT_SIU_CPM:
     {
         // Communications Processor Module
-        cyg_uint16 cicr;
+        cyg_uint32 cicr;
 
-        HAL_READ_UINT16 (CYGARC_REG_IMM_CICR, cicr);
+        HAL_READ_UINT32 (CYGARC_REG_IMM_CICR, cicr);
         cicr |= CYGARC_REG_IMM_CICR_IEN;
-        HAL_WRITE_UINT16 (CYGARC_REG_IMM_CICR, cicr);
+        HAL_WRITE_UINT32 (CYGARC_REG_IMM_CICR, cicr);
         break;
     }
     case CYGNUM_HAL_INTERRUPT_CPM_FIRST ... CYGNUM_HAL_INTERRUPT_CPM_LAST:
@@ -806,12 +821,12 @@ cyg_hal_interrupt_set_level ( cyg_uint32
     case CYGNUM_HAL_INTERRUPT_SIU_CPM:
     {
         // Communications Processor Module
-        cyg_uint16 cicr;
+        cyg_uint32 cicr;
 
-        HAL_READ_UINT16 (CYGARC_REG_IMM_CICR, cicr);
+        HAL_READ_UINT32 (CYGARC_REG_IMM_CICR, cicr);
         cicr &= ~(CYGARC_REG_IMM_CICR_IRQMASK);
         cicr |= level << CYGARC_REG_IMM_CICR_IRQ_SHIFT;
-        HAL_WRITE_UINT16 (CYGARC_REG_IMM_CICR, cicr);
+        HAL_WRITE_UINT32 (CYGARC_REG_IMM_CICR, cicr);
         break;
     }
     case CYGNUM_HAL_INTERRUPT_CPM_FIRST ... CYGNUM_HAL_INTERRUPT_CPM_LAST:
diff --git a/packages/hal/powerpc/arch/current/include/ppc_regs.h b/packages/hal/powerpc/arch/current/include/ppc_regs.h
--- a/packages/hal/powerpc/arch/current/include/ppc_regs.h
+++ b/packages/hal/powerpc/arch/current/include/ppc_regs.h
@@ -81,9 +81,6 @@
 #define CYGARC_REG_SPRG3   275
 #define CYGARC_REG_PVR     287
 
-#define CYGARC_REG_TBL_W   284
-#define CYGARC_REG_TBU_W   285
-
 #ifdef CYGARC_HAL_COMMON_EXPORT_CPU_MACROS
 #define DSISR      CYGARC_REG_DSISR
 #define DAR        CYGARC_REG_DAR
@@ -95,9 +92,6 @@
 #define SPRG2      CYGARC_REG_SPRG2
 #define SPRG3      CYGARC_REG_SPRG3
 #define PVR        CYGARC_REG_PVR
-
-#define TBL_W      CYGARC_REG_TBL_W
-#define TBU_W      CYGARC_REG_TBU_W
 #endif
 
 //--------------------------------------------------------------------------
@@ -122,9 +116,17 @@
 
 //--------------------------------------------------------------------------
 // Time Base Registers
+// READ and WRITE are different addresses!
+#define CYGARC_REG_TBL_W   284
+#define CYGARC_REG_TBU_W   285
+#define CYGARC_REG_TBL_R   268
+#define CYGARC_REG_TBU_R   269
+
 #ifdef CYGARC_HAL_COMMON_EXPORT_CPU_MACROS
-#define TBL_R           268
-#define TBU_R           269
+#define TBL_W      CYGARC_REG_TBL_W
+#define TBU_W      CYGARC_REG_TBU_W
+#define TBL_R      CYGARC_REG_TBL_R
+#define TBU_R      CYGARC_REG_TBU_R
 #endif // ifdef CYGARC_HAL_COMMON_EXPORT_CPU_MACROS
 
 //--------------------------------------------------------------------------
diff --git a/packages/hal/powerpc/arch/current/src/hal_intr.c b/packages/hal/powerpc/arch/current/src/hal_intr.c
--- a/packages/hal/powerpc/arch/current/src/hal_intr.c
+++ b/packages/hal/powerpc/arch/current/src/hal_intr.c
@@ -219,6 +219,24 @@ hal_arbitration_isr_cpm (CYG_ADDRWORD ve
     return 0;
 }
 
+externC void
+hal_IRQ_init(void)
+{
+#define ID_CPM 0xDEAD
+    HAL_INTERRUPT_ATTACH (CYGNUM_HAL_INTERRUPT_SIU_LVL7, 
+                          &hal_arbitration_isr_cpm, ID_CPM, 0);
+    HAL_INTERRUPT_UNMASK (CYGNUM_HAL_INTERRUPT_SIU_LVL7);
+    HAL_INTERRUPT_SET_LEVEL (CYGNUM_HAL_INTERRUPT_SIU_CPM, 7);
+    HAL_INTERRUPT_UNMASK (CYGNUM_HAL_INTERRUPT_SIU_CPM);
+}
+#else // ifdef CYG_HAL_POWERPC_MPC860
+
+externC void
+hal_IRQ_init(void)
+{
+    // Nothing special
+}
+
 #endif // ifdef CYG_HAL_POWERPC_MPC860
 
 // -------------------------------------------------------------------------
diff --git a/packages/hal/powerpc/arch/current/src/vectors.S b/packages/hal/powerpc/arch/current/src/vectors.S
--- a/packages/hal/powerpc/arch/current/src/vectors.S
+++ b/packages/hal/powerpc/arch/current/src/vectors.S
@@ -393,6 +393,10 @@ 2:
         .extern cyg_hal_invoke_constructors
         bl      cyg_hal_invoke_constructors
 
+        # set up platform specific interrupt environment
+        .extern hal_IRQ_init
+        bl      hal_IRQ_init
+
 #ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
         .extern initialize_stub
         bl      initialize_stub
diff --git a/packages/hal/powerpc/arch/current/tests/intr0.c b/packages/hal/powerpc/arch/current/tests/intr0.c
--- a/packages/hal/powerpc/arch/current/tests/intr0.c
+++ b/packages/hal/powerpc/arch/current/tests/intr0.c
@@ -37,6 +37,11 @@
 // Options:
 //####DESCRIPTIONEND####
 
+//#define DEBUG_PRINTFS
+#ifdef DEBUG_PRINTFS
+extern diag_printf( char *format, ... );
+#endif
+
 #include <pkgconf/hal.h>
 
 #define CYGARC_HAL_COMMON_EXPORT_CPU_MACROS
@@ -58,6 +63,7 @@
 // Period must be longer than the time required for setting up all the
 // interrupt handlers.
 #define PIT_PERIOD 5000
+
 #define TB_PERIOD (PIT_PERIOD*32)       // assuming 512/16 divisors
 
 #define ID_RTC_SEC   12345
@@ -76,6 +82,10 @@ volatile cyg_uint32 count = 0;
 static cyg_uint32 count_verify_table[] = {1, 4, 5, 41, 42};
 static int pit_count = 0;
 
+// These are useful for debugging:
+static cyg_uint32 count_actual_table[] = { -1, -1, -1, -1, -1};
+static cyg_uint32 tbr_actual_table[] = { -1, -1, -1, -1, -1};
+
 // Periodic timer ISR. Should be executing 5 times.
 static cyg_uint32 isr_pit(CYG_ADDRWORD vector, CYG_ADDRWORD data)
 {
@@ -90,6 +100,13 @@ static cyg_uint32 isr_pit(CYG_ADDRWORD v
 
     count++;
 
+    count_actual_table[pit_count] = count;
+    {
+        cyg_uint32 tbl;
+        CYGARC_MFTB (TBL_R, tbl);
+        tbr_actual_table[pit_count] = tbl;
+    }
+
     verify_value = count_verify_table[pit_count++];
 
     CYG_ASSERT (count == verify_value, "Count wrong!");
@@ -100,6 +117,20 @@ static cyg_uint32 isr_pit(CYG_ADDRWORD v
         HAL_INTERRUPT_MASK (CYGNUM_HAL_INTERRUPT_SIU_TB_A);
         HAL_INTERRUPT_MASK (CYGNUM_HAL_INTERRUPT_SIU_TB_B);
 
+#ifdef DEBUG_PRINTFS
+        diag_printf( "INFO: Actual counts: %d %d %d %d %d\n",
+                     count_actual_table[0],
+                     count_actual_table[1],
+                     count_actual_table[2],
+                     count_actual_table[3],
+                     count_actual_table[4] );
+        diag_printf( "INFO: Actuals tbrs: %d %d %d %d %d\n",
+                     tbr_actual_table[0],
+                     tbr_actual_table[1],
+                     tbr_actual_table[2],
+                     tbr_actual_table[3],
+                     tbr_actual_table[4] );
+#endif
         if (42 == count && 5 == pit_count)
             CYG_TEST_PASS_FINISH("Intr 0 OK");
         else
@@ -174,6 +205,9 @@ void intr0_main( void )
         HAL_WRITE_UINT32 (CYGARC_REG_IMM_PITC, 
                           (2*PIT_PERIOD) << CYGARC_REG_IMM_PITC_COUNT_SHIFT);
 
+#ifdef DEBUG_PRINTFS
+        diag_printf( "PIT set to %d\n", 2*PIT_PERIOD );
+#endif
         // Enable.
         HAL_READ_UINT16 (CYGARC_REG_IMM_PISCR, piscr);
         piscr |= CYGARC_REG_IMM_PISCR_PTE;
@@ -206,6 +240,12 @@ void intr0_main( void )
         tbl += TB_PERIOD*4;
         HAL_WRITE_UINT32 (CYGARC_REG_IMM_TBREF1, tbl);
 
+#ifdef DEBUG_PRINTFS
+        diag_printf( "TB initial %d, !1 %d !2 %d\n",
+                     tbl - 7*TB_PERIOD,
+                     tbl - 4*TB_PERIOD,
+                     tbl - 0*TB_PERIOD );
+#endif
         // Enable.
         HAL_READ_UINT16 (CYGARC_REG_IMM_TBSCR, tbscr);
         tbscr |= (CYGARC_REG_IMM_TBSCR_REFA | CYGARC_REG_IMM_TBSCR_REFB |
diff --git a/packages/io/serial/current/src/common/serial.c b/packages/io/serial/current/src/common/serial.c
--- a/packages/io/serial/current/src/common/serial.c
+++ b/packages/io/serial/current/src/common/serial.c
@@ -103,8 +103,8 @@ serial_write(cyg_io_handle_t handle, con
     int next;
     cbuf_t *cbuf = &chan->out_cbuf;
     Cyg_ErrNo res = ENOERR;
+
     cbuf->abort = false;
-
     cyg_drv_mutex_lock(&cbuf->lock);
     if (cbuf->len == 0) {
         // Non interrupt driven (i.e. polled) operation
@@ -154,8 +154,14 @@ serial_read(cyg_io_handle_t handle, void
     cyg_int32 size = 0;
     cbuf_t *cbuf = &chan->in_cbuf;
     Cyg_ErrNo res = ENOERR;
+#ifdef XX_CYGDBG_DIAG_BUF
+            extern int enable_diag_uart;
+            int _enable = enable_diag_uart;
+            int _time, _stime;
+            externC cyg_tick_count_t cyg_current_time(void);
+#endif // CYGDBG_DIAG_BUF
+
     cbuf->abort = false;
-
     cyg_drv_mutex_lock(&cbuf->lock);
     if (cbuf->len == 0) {
         // Non interrupt driven (i.e. polled) operation
@@ -171,7 +177,21 @@ serial_read(cyg_io_handle_t handle, void
                 size++;
             } else {
                 cbuf->waiting = true;
+#ifdef XX_CYGDBG_DIAG_BUF
+            enable_diag_uart = 0;
+            HAL_CLOCK_READ(&_time);
+            _stime = (int)cyg_current_time();
+            diag_printf("READ wait - get: %d, put: %d, time: %x.%x\n", cbuf->get, cbuf->put, _stime, _time);
+            enable_diag_uart = _enable;
+#endif // CYGDBG_DIAG_BUF
                 cyg_drv_cond_wait(&cbuf->wait);
+#ifdef XX_CYGDBG_DIAG_BUF
+            enable_diag_uart = 0;
+            HAL_CLOCK_READ(&_time);
+            _stime = (int)cyg_current_time();
+            diag_printf("READ continue - get: %d, put: %d, time: %x.%x\n", cbuf->get, cbuf->put, _stime, _time);
+            enable_diag_uart = _enable;
+#endif // CYGDBG_DIAG_BUF
                 if (cbuf->abort) {
                     // Give up!
                     cbuf->abort = false;
@@ -183,6 +203,15 @@ serial_read(cyg_io_handle_t handle, void
         }
         cyg_drv_dsr_unlock();
     }
+    cyg_drv_isr_lock();
+#ifdef XX_CYGDBG_DIAG_BUF
+            enable_diag_uart = 0;
+            HAL_CLOCK_READ(&_time);
+            _stime = (int)cyg_current_time();
+            diag_printf("READ done - size: %d, len: %d, time: %x.%x\n", size, *len, _stime, _time);
+            enable_diag_uart = _enable;
+#endif // CYGDBG_DIAG_BUF
+    cyg_drv_isr_unlock();
     cyg_drv_mutex_unlock(&cbuf->lock);
     return res;
 }
@@ -335,6 +364,17 @@ serial_rcv_char(serial_channel *chan, un
     cbuf->data[cbuf->put++] = c;
     if (cbuf->put == cbuf->len) cbuf->put = 0;
     if (cbuf->waiting) {
+#ifdef XX_CYGDBG_DIAG_BUF
+            extern int enable_diag_uart;
+            int _enable = enable_diag_uart;
+            int _time, _stime;
+            externC cyg_tick_count_t cyg_current_time(void);
+            enable_diag_uart = 0;
+            HAL_CLOCK_READ(&_time);
+            _stime = (int)cyg_current_time();
+            diag_printf("Signal reader - time: %x.%x\n", _stime, _time);
+            enable_diag_uart = _enable;
+#endif // CYGDBG_DIAG_BUF
         cbuf->waiting = false;
         cyg_drv_cond_signal(&cbuf->wait);
     }
diff --git a/packages/io/serial/current/tests/ser_test_protocol.inl b/packages/io/serial/current/tests/ser_test_protocol.inl
--- a/packages/io/serial/current/tests/ser_test_protocol.inl
+++ b/packages/io/serial/current/tests/ser_test_protocol.inl
@@ -473,6 +473,7 @@ change_config(cyg_io_handle_t handle, cy
 
     res = cyg_io_set_config(handle, CYG_IO_SET_CONFIG_SERIAL_INFO, 
                             &new_cfg, &len);
+    cyg_thread_delay(10);  // Some chips don't like changes to happen to fast...
 
     // Driver didn't like it. It will not have changed anything, so it's
     // safe to return now.
@@ -489,6 +490,7 @@ change_config(cyg_io_handle_t handle, cy
     // with the host.
     res = cyg_io_set_config(handle, CYG_IO_SET_CONFIG_SERIAL_INFO, 
                             &old_cfg, &len);
+    cyg_thread_delay(10);  // Some chips don't like changes to happen to fast...
     if (ENOERR != res) {
         diag_printf("change_config: set_config failed/1 (%d)\n", res);
         hang();
@@ -521,6 +523,7 @@ change_config(cyg_io_handle_t handle, cy
     len = sizeof(new_cfg);
     res = cyg_io_set_config(handle, CYG_IO_SET_CONFIG_SERIAL_INFO, 
                             &new_cfg, &len);
+    cyg_thread_delay(10);  // Some chips don't like changes to happen to fast...
     if (ENOERR != res) {
         diag_printf("change_config: set_config failed/2 (%d)\n", res);
         hang();
@@ -614,6 +617,7 @@ change_config(cyg_io_handle_t handle, cy
         len = sizeof(old_cfg);
         res = cyg_io_set_config(handle, CYG_IO_SET_CONFIG_SERIAL_INFO, 
                                 &old_cfg, &len);
+        cyg_thread_delay(10);  // Some chips don't like changes to happen to fast...
         if (res != ENOERR) {
             diag_printf("change_config: set_config failed/3 (%d)\n", res);
             hang();
diff --git a/packages/kernel/current/ChangeLog b/packages/kernel/current/ChangeLog
--- a/packages/kernel/current/ChangeLog
+++ b/packages/kernel/current/ChangeLog
@@ -1,3 +1,8 @@
+1999-06-30  Jesper Skov  <jskov@cygnus.co.uk>
+
+	* tests/dhrystone.c: Also NA-quit if CYGPKG_INFRA_DEBUG or
+	CYGPKG_KERNEL_INSTRUMENT are enabled.
+
 1999-06-23  Jesper Skov  <jskov@cygnus.co.uk>
         PR 20209
 	* tests/dhrystone.c: Use fewer loops on ARM targets - they don't
diff --git a/packages/kernel/current/tests/dhrystone.c b/packages/kernel/current/tests/dhrystone.c
--- a/packages/kernel/current/tests/dhrystone.c
+++ b/packages/kernel/current/tests/dhrystone.c
@@ -35,12 +35,15 @@
 #if defined(CYGPKG_KERNEL) && defined(CYGPKG_LIBC)
 
 #include <pkgconf/kernel.h>
+#include <pkgconf/infra.h>
 #include <pkgconf/libc.h>
 
 #if defined(CYGFUN_KERNEL_API_C) \
     && defined(CYGSEM_LIBC_STDIO_PRINTF_FLOATING_POINT)
 
-#ifdef __OPTIMIZE__
+#if defined(__OPTIMIZE__) \
+    && !defined(CYGPKG_INFRA_DEBUG) \
+    && !defined(CYGPKG_KERNEL_INSTRUMENT)
 
 #include <cyg/hal/hal_cache.h>
 #include <cyg/kernel/kapi.h>
@@ -1150,8 +1153,8 @@ Enumeration Enum_Par_Val;
 } /* Func_3 */
 
 #else
-#define NA_MSG "Only makes sense to run with optimized code"
-#endif // __OPTIMIZE__
+#define NA_MSG "Only runs with optimized code, no tracing and no asserts"
+#endif // __OPTIMIZE__ && !CYGPKG_INFRA_DEBUG && !CYGPKG_KERNEL_INSTRUMENT
 
 #else
 #define NA_MSG "Requires CYGFUN_KERNEL_API_C && CYGSEM_LIBC_STDIO_PRINTF_FLOATING_POINT"