Mercurial > nand-ecoscentric
changeset 3289:4a95551c2713
* misc/redboot_K70_ROM_FPU.ecm: Add ECM file
* cdl/hal_cortexm_kinetis_twr_k70f120m.cdl: Sync with variant changes due to
hardware floating point support. Implements CYGINT_HAL_FPV4_SP_D16.
Changed maximum peripheral bus clocks to 75MHz. [Bugzilla 1001607]
| author | vae |
|---|---|
| date | Sat, 09 Mar 2013 17:35:22 +0000 |
| parents | 8c765fccd2f2 |
| children | bdaf2ba0b81c |
| files | packages/hal/cortexm/kinetis/twr_k70f120m/current/ChangeLog packages/hal/cortexm/kinetis/twr_k70f120m/current/cdl/hal_cortexm_kinetis_twr_k70f120m.cdl packages/hal/cortexm/kinetis/twr_k70f120m/current/include/pkgconf/mlt_kinetis_flash_unisram_extram_ram.ldi |
| diffstat | 3 files changed, 25 insertions(+), 14 deletions(-) [+] |
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--- a/packages/hal/cortexm/kinetis/twr_k70f120m/current/ChangeLog +++ b/packages/hal/cortexm/kinetis/twr_k70f120m/current/ChangeLog @@ -1,3 +1,11 @@ +2012-11-30 Ilija Kocho <ilijak@siva.com.mk> + + * misc/redboot_K70_ROM_FPU.ecm: Add ECM file + * cdl/hal_cortexm_kinetis_twr_k70f120m.cdl: Sync with variant changes due to + hardware floating point support. Implements CYGINT_HAL_FPV4_SP_D16. + Changed maximum peripheral bus clocks to 75MHz. + [Bugzilla 1001607] + 2012-11-04 Ilija Kocho <ilijak@siva.com.mk> * twr_k70f120m/current/include/pkgconf/mlt_kinetis_flash_sram2s_extram_ram.ldi
--- a/packages/hal/cortexm/kinetis/twr_k70f120m/current/cdl/hal_cortexm_kinetis_twr_k70f120m.cdl +++ b/packages/hal/cortexm/kinetis/twr_k70f120m/current/cdl/hal_cortexm_kinetis_twr_k70f120m.cdl @@ -53,14 +53,26 @@ cdl_package CYGPKG_HAL_CORTEXM_KINETIS_T include_dir cyg/hal doc ref/kinetis-twr-k70f120m.html hardware + description " + The Freescale TWR K70F120M Platform HAL package provides the support + needed to run eCos on the TWR K70F120M development system. This package + can also be used for other boards that employ a controller from Kinetis + families." + + compile twr_k70f120m_misc.c + requires { CYGHWR_HAL_CORTEXM_SYSTICK_CLK_SOURCE == "INTERNAL" } requires { is_active(CYGPKG_DEVS_ETH_FREESCALE_ENET) implies CYGOPT_HAL_CORTEXM_KINETIS_MCG_REF_EXT_IS == "OSC" } implements CYGINT_HAL_CACHE - requires { CYGHWR_HAL_CORTEXM_KINETIS_SUBFAM == 70 } - requires { CYGHWR_HAL_CORTEXM_KINETIS_FLASH_NAME == "1M0" } + requires { CYGHWR_HAL_CORTEXM_KINETIS_FPU_DEFAULT == "F" } + requires { CYGHWR_HAL_CORTEXM_KINETIS_SUBFAM_DEFAULT == 70 } + requires { CYGHWR_HAL_CORTEXM_KINETIS_SUBFAM != 30 } + requires { CYGHWR_HAL_CORTEXM_KINETIS_SUBFAM != 40 } + requires { CYGHWR_HAL_CORTEXM_KINETIS_SUBFAM != 50 } + requires { CYGHWR_HAL_CORTEXM_KINETIS_FLASH_NAME_DEFAULT == "1M0" } requires { CYGHWR_HAL_CORTEXM_KINETIS_REV == 2 } requires { is_active(CYGPKG_DEVS_FLASH_KINETIS) implies CYGNUM_DEVS_KINETIS_FLASH_BLOCK_SIZE == 0x1000 } @@ -75,17 +87,9 @@ cdl_package CYGPKG_HAL_CORTEXM_KINETIS_T implements CYGINT_HAL_CORTEXM_KINETIS_HAS_OSC1 implements CYGINT_HAL_CORTEXM_KINETIS_150 - requires { CYGHWR_HAL_CORTEXM_KINETIS_CLK_PER_MAX == 60000000 } - requires { CYGHWR_HAL_CORTEXM_KINETIS_CLK_FLEX_BUS_MAX == 60000000 } - requires { CYGHWR_HAL_CORTEXM_KINETIS_CLK_FLASH_MAX == 30000000 } - - description " - The Freescale TWR K70F120M Platform HAL package provides the support - needed to run eCos on the TWR K70F120M development system. This package - can also be used for other boards that employ a controller from Kinetis - families." - - compile twr_k70f120m_misc.c + requires { CYGHWR_HAL_CORTEXM_KINETIS_CLK_PER_MAX == 75000000 } + requires { CYGHWR_HAL_CORTEXM_KINETIS_CLK_FLEX_BUS_MAX == 75000000 } + requires { CYGHWR_HAL_CORTEXM_KINETIS_CLK_FLASH_MAX == 25000000 } requires { is_active(CYGPKG_DEVS_ETH_PHY) implies (1 == CYGHWR_DEVS_ETH_PHY_KSZ8041) }
--- a/packages/hal/cortexm/kinetis/twr_k70f120m/current/include/pkgconf/mlt_kinetis_flash_unisram_extram_ram.ldi +++ b/packages/hal/cortexm/kinetis/twr_k70f120m/current/include/pkgconf/mlt_kinetis_flash_unisram_extram_ram.ldi @@ -37,4 +37,3 @@ SECTIONS hal_vsr_table = (0x20000000 - CYGHWR_HAL_KINETIS_SRAM_BANK_SIZE); hal_virtual_vector_table = hal_vsr_table + 128*4; hal_startup_stack = 0x20000000 + CYGHWR_HAL_KINETIS_SRAM_BANK_SIZE; -
