Mercurial > nand-ecoscentric
changeset 40:a3cc6665b684 ecos-sw-1999-10-01
Merge from eCos master repository on 1999-10-01-07:47:04-BST
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--- a/packages/hal/arm/arch/current/ChangeLog +++ b/packages/hal/arm/arch/current/ChangeLog @@ -1,3 +1,8 @@ +1999-09-23 Gary Thomas <gthomas@cygnus.co.uk> + + * src/vectors.S (call_exception_handler): Change on 09-19 messed up + status register wrt breakpoints, single stepping, etc. + 1999-09-21 Gary Thomas <gthomas@cygnus.co.uk> * include/hal_arch.h: Remove FIXME about GDB register layout.
--- a/packages/hal/arm/arch/current/src/vectors.S +++ b/packages/hal/arm/arch/current/src/vectors.S @@ -479,12 +479,12 @@ call_exception_handler: ldr sp,[sp,#armreg_sp] mrs r0,cpsr // move back to IRQ mode - bic r0,r0,#CPSR_MODE_BITS orr r0,r0,#CPSR_IRQ_DISABLE|CPSR_FIQ_DISABLE msr cpsr,r0 nop nop + bic r0,r0,#CPSR_MODE_BITS orr r0,r0,#CPSR_IRQ_MODE msr cpsr,r0
--- a/packages/hal/arm/cl7211/current/src/PKGconf.mak +++ b/packages/hal/arm/cl7211/current/src/PKGconf.mak @@ -29,6 +29,7 @@ #============================================================================== PACKAGE := hal_arm_cl7211 +include ../../../../../pkgconf/system.mak include ../../../../../pkgconf/pkgconf.mak LIBRARY := libtarget.a
--- a/packages/hal/arm/cl7211/current/src/hal_diag.c +++ b/packages/hal/arm/cl7211/current/src/hal_diag.c @@ -86,7 +86,6 @@ #endif #endif - /*---------------------------------------------------------------------------*/ // CL7211 Serial Port (UARTx) for Debug
--- a/packages/hal/arm/cl7211/current/src/plf_stub.c +++ b/packages/hal/arm/cl7211/current/src/plf_stub.c @@ -73,7 +73,6 @@ static cyg_interrupt gdb_interrupt; static cyg_handle_t gdb_interrupt_handle; #endif - //----------------------------------------------------------------------------- #ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT
--- a/packages/hal/powerpc/arch/current/ChangeLog +++ b/packages/hal/powerpc/arch/current/ChangeLog @@ -1,3 +1,7 @@ +1999-09-28 Jesper Skov <jskov@cygnus.co.uk> + + * tests/intr0.c: Added some more debug output. + 1999-09-23 Jonathan Larmour <jlarmour@cygnus.co.uk> * src/hal_misc.c (cyg_hal_exception_handler): Catch exceptions @@ -27,7 +31,8 @@ 1999-09-01 Gary Thomas <gthomas@cygnus * src/vectors.S: Exception and interrupt handling were enabling CPU interrupts when it wasn't safe nor warranted. -1999-08-16 Bob Koninckx <bob.koninckx@mail.mech.kuleuven.ac.be> +1999-08-16 Jesper Skov <jskov@cygnus.co.uk> + From Bob Koninckx <bob.koninckx@mail.mech.kuleuven.ac.be> * src/ppc_stub.c (__clear_single_step): Clear irq_state to prevent interrupt avalanche.
--- a/packages/hal/powerpc/arch/current/tests/PKGconf.mak +++ b/packages/hal/powerpc/arch/current/tests/PKGconf.mak @@ -30,8 +30,11 @@ PACKAGE := hal_powerpc include ../../../../../pkgconf/pkgconf.mak +include ../../../../../pkgconf/system.mak -TESTS := intr0 +TESTS := + +TESTS += intr0 include $(COMPONENT_REPOSITORY)/pkgconf/makrules.tst
--- a/packages/hal/powerpc/arch/current/tests/intr0.c +++ b/packages/hal/powerpc/arch/current/tests/intr0.c @@ -113,6 +113,10 @@ static cyg_uint32 isr_pit(CYG_ADDRWORD v verify_value = count_verify_table[pit_count++]; +#ifdef DEBUG_PRINTFS + diag_printf( "ISR_PIT executed %d of 5\n", pit_count ); +#endif + CYG_ASSERT (count == verify_value, "Count wrong!"); // End of test when count is 42. Mask interrupts and print PASS text. @@ -156,6 +160,10 @@ static cyg_uint32 isr_tba(CYG_ADDRWORD v count = count * 3; +#ifdef DEBUG_PRINTFS + diag_printf( "ISR_TBA executed\n" ); +#endif + return Cyg_InterruptHANDLED; } @@ -171,6 +179,10 @@ static cyg_uint32 isr_tbb(CYG_ADDRWORD v count = count * 8; +#ifdef DEBUG_PRINTFS + diag_printf( "ISR_TBB executed\n" ); +#endif + return Cyg_InterruptHANDLED; }
--- a/packages/hal/sparclite/arch/current/ChangeLog +++ b/packages/hal/sparclite/arch/current/ChangeLog @@ -1,3 +1,25 @@ +1999-09-29 Hugo Tyson <hmt@cygnus.co.uk> + + [src/vectors.S: needed no change!] + + * include/vectors.h: Potentially accept a register window count + from the platform HAL, or according to platform selection. Make + more of the dependent macros computed. + + * src/vec_ivsr.S (hal_default_interrupt_vsr): Handle other register + window sizes correctly; particularly when handling underflow trap + by hand. + + * src/vec_xvsr.S (hal_default_exception_vsr): Handle other register + window sizes correctly; particularly when handling underflow trap + by hand. + + * src/context.S (hal_thread_load_context): Handle other register + window sizes correctly. + + * src/icontext.c (cyg_hal_sparc_get_gdb_regs): Handle other register + window sizes correctly; set up initial context differently. + 1999-06-07 Hugo Tyson <hmt@cygnus.co.uk> * include/hal_arch.h (hal_jmp_buf): force this to be 64-bit
--- a/packages/hal/sparclite/arch/current/include/vectors.h +++ b/packages/hal/sparclite/arch/current/include/vectors.h @@ -45,11 +45,21 @@ //============================================================================= #define __WINSIZE 8 -#define __WINBITS 7 + +#if __WINSIZE <= 8 +# define __WINBITS 7 +#else +# error __WINSIZE window size probably not supported +#endif + +// These should be generic to all SPARCs: + #define __WINBITS_MAXIMAL 0x1f -#define __WIN_INIT 7 -#define __WIM_INIT 0x80 +#define __WIN_INIT (__WINSIZE - 1) +#define __WIM_INIT (1 << __WIN_INIT) + +// ------------------------------------------------------------------------ #define TRAP_WUNDER 6 // Window Underflow trap number #define TRAP_WOVER 5 // Window Overflow trap number
--- a/packages/hal/sparclite/arch/current/src/context.S +++ b/packages/hal/sparclite/arch/current/src/context.S @@ -128,8 +128,13 @@ hal_thread_load_context: save %sp, -16 * 4, %sp ! the linked list property... save %sp, -16 * 4, %sp save %sp, -16 * 4, %sp +#if 6 < __WINSIZE save %sp, -16 * 4, %sp +#if 7 < __WINSIZE save %sp, -16 * 4, %sp +#endif +#endif + ! Fewer saves if fewer register windows. For 8 register windows, ! six of these is correct; a seventh would force out the current ! set that was already saved manually above. Note that minimal ! space is allowed on stack for locals and ins in case this @@ -145,7 +150,14 @@ hal_thread_load_context: ! calculate a new WIM... add %g4, 1, %g3 ! required invalid window number +#if 8 == __WINSIZE and %g3, __WINBITS, %g3 ! modulo 8 +#else // expect 5 or 6 or 7 windows + cmp %g3, __WINSIZE + bge,a 567f ! taken: do delay slot, handle overflow + mov 0, %g3 ! only if .ge. above +567: +#endif mov 1, %g2 sll %g2, %g3, %g2 ! converted to a mask for the WIM @@ -248,8 +260,13 @@ hal_setjmp: save %sp, -16 * 4, %sp ! the linked list property... save %sp, -16 * 4, %sp save %sp, -16 * 4, %sp +#if 6 < __WINSIZE save %sp, -16 * 4, %sp +#if 7 < __WINSIZE save %sp, -16 * 4, %sp +#endif +#endif + ! Fewer saves if fewer register windows. For 8 register windows, ! six of these is correct; a seventh would force out the current ! set that was already saved manually above. Note that minimal ! space is allowed on stack for locals and ins in case this @@ -293,7 +310,14 @@ hal_longjmp: ! calculate a new WIM... add %g4, 1, %g3 ! required invalid window number +#if 8 == __WINSIZE and %g3, __WINBITS, %g3 ! modulo 8 +#else // expect 5 or 6 or 7 windows + cmp %g3, __WINSIZE + bge,a 567f ! taken: do delay slot, handle overflow + mov 0, %g3 ! only if .ge. above +567: +#endif mov 1, %g2 sll %g2, %g3, %g2 ! converted to a mask for the WIM
--- a/packages/hal/sparclite/arch/current/src/icontext.c +++ b/packages/hal/sparclite/arch/current/src/icontext.c @@ -139,7 +139,7 @@ hal_thread_init_context( CYG_WORD sparg // this is the initial CWP and interrupt state; CWP is quite arbitrary // really, the WIM is set up accordingly in hal_thread_load_context(). - regs->g[0] = 0x0e7; // PIL zero, ET, S, PS and CWP is 7. + regs->g[0] = 0x0e0 + __WIN_INIT; // PIL zero, ET, S, PS and CWP set. return (CYG_ADDRESS)sp; } @@ -268,11 +268,20 @@ cyg_hal_sparc_get_gdb_regs( void *gdb_re gdb[ Y ] = trapli->l[4]; scratch = trapli->l[0]; // the PSR in the trap handler +#if 8 == __WINSIZE scratch++; // back to interupted thread's window - scratch &=~ 0x38; // clear ET and any CWP overflow + scratch &=~ 0x38; // clear ET and any __WINSIZE overflow gdb[ PSR ] = scratch; gdb[ WIM ] = 1 << ((__WINBITS & (1 + scratch))); - +#else // 6 or 7 windows only + reg = (int)(scratch & __WINBITS); + scratch &=~ (__WINBITS_MAXIMAL | 0x20); // clear ET and CWP + if ( __WINSIZE <= ++reg ) reg = 0; // back to intr'd window + gdb[ PSR ] = scratch | reg; + if ( __WINSIZE <= ++reg ) reg = 0; // good index for WIM + gdb[ WIM ] = 1 << reg; +#endif // __WINSIZE + // Read _a_ TBR value and ignore the current trap details: asm volatile ( "rd %%tbr, %0" : "=r"(scratch) : ); gdb[ TBR ] = (scratch &~ 0xfff); @@ -331,7 +340,13 @@ cyg_hal_sparc_get_gdb_regs( void *gdb_re scratch = eCos_regset->g[ 0 ]; // the PSR in the saved context gdb[ PSR ] = scratch; // return it verbatim. +#if 8 == __WINSIZE gdb[ WIM ] = 1 << ((__WINBITS & (1 + scratch))); +#else // 6 or 7 windows only + reg = (int)(scratch & __WINBITS); + if ( __WINSIZE <= ++reg ) reg = 0; // good index for WIM + gdb[ WIM ] = 1 << reg; +#endif // __WINSIZE // Read _a_ TBR value and ignore the current trap details: asm volatile ( "rd %%tbr, %0" : "=r"(scratch) : );
--- a/packages/hal/sparclite/arch/current/src/vec_ivsr.S +++ b/packages/hal/sparclite/arch/current/src/vec_ivsr.S @@ -93,6 +93,7 @@ hal_default_interrupt_vsr: ! must establish a safe stack before re-enabling interrupts + traps and %l0, __WINBITS, %l7 ! CWP extracted + ! no inc/dec here, so no need for special measures for not-8-windows mov 1, %l6 sll %l6, %l7, %l6 ! 1 << CWP rd %wim, %l5 @@ -326,6 +327,14 @@ 1: add %l0, 1, %l7 ! interruptee~s CWP plus noise and %l7, __WINBITS, %l7 ! CWP only +#if 8 == __WINSIZE + ! it is in range already +#else // expect 5 or 6 or 7 windows + cmp %l7, __WINSIZE + bge,a 567f ! taken: do delay slot, handle overflow + mov 0, %l7 ! only if .ge. above +567: +#endif mov 1, %l6 sll %l6, %l7, %l6 ! 1 << CWP rd %wim, %l5
--- a/packages/hal/sparclite/arch/current/src/vec_xvsr.S +++ b/packages/hal/sparclite/arch/current/src/vec_xvsr.S @@ -82,6 +82,7 @@ hal_default_exception_vsr: ! must establish a safe stack before re-enabling interrupts + traps and %l0, __WINBITS, %l7 ! CWP extracted + ! no inc/dec here, so no need for special measures for not-8-windows mov 1, %l6 sll %l6, %l7, %l6 ! 1 << CWP rd %wim, %l5 @@ -236,6 +237,14 @@ 1: ! now save away the regs we must pres add %l0, 1, %l7 ! interruptee~s CWP plus noise and %l7, __WINBITS, %l7 ! CWP only +#if 8 == __WINSIZE + ! it is in range already +#else // expect 5 or 6 or 7 windows + cmp %l7, __WINSIZE + bge,a 567f ! taken: do delay slot, handle overflow + mov 0, %l7 ! only if .ge. above +567: +#endif mov 1, %l6 sll %l6, %l7, %l6 ! 1 << CWP rd %wim, %l5
--- a/packages/io/serial/current/ChangeLog +++ b/packages/io/serial/current/ChangeLog @@ -1,3 +1,13 @@ +1999-09-28 Hugo Tyson <hmt@cygnus.co.uk> + + * src/powerpc/quicc_smc_serial.c (quicc_smc_serial_init): Correct + value supplied for interrupt priority - it may be unused, but it + is asserted for range. Initialize the diagnostic channel if on an + MBX and if NOT using SMC1 ourselves, to ensure that diag output + and built-in stubs work correctly; otherwise reset the quicc and + ignore SMC1 as before. Fix various warnings, mostly about + casting/arg-passing/assigning away volatile. + 1999-08-31 Jesper Skov <jskov@cygnus.co.uk> * tests/ser_test_protocol.inl: Define dummy crash ID.
--- a/packages/io/serial/current/src/powerpc/quicc_smc_serial.c +++ b/packages/io/serial/current/src/powerpc/quicc_smc_serial.c @@ -88,9 +88,9 @@ typedef struct quicc_smc_serial_info { CYG_ADDRWORD channel; // Which channel SMC1/SMC2 CYG_WORD int_num; // Interrupt number cyg_uint32 *brg; // Which baud rate generator - struct smc_uart_pram *pram; // Parameter RAM pointer - struct smc_regs *ctl; // SMC control registers - struct cp_bufdesc *txbd, *rxbd; // Next Tx,Rx descriptor to use + volatile struct smc_uart_pram *pram; // Parameter RAM pointer + volatile struct smc_regs *ctl; // SMC control registers + volatile struct cp_bufdesc *txbd, *rxbd; // Next Tx,Rx descriptor to use struct cp_bufdesc *tbase, *rbase; // First Tx,Rx descriptor int txsize, rxsize; // Length of individual buffers cyg_interrupt serial_interrupt; @@ -249,8 +249,8 @@ quicc_smc_serial_config_port(serial_chan // Function to set up internal tables for device. static void quicc_smc_serial_init_info(quicc_smc_serial_info *smc_chan, - struct smc_uart_pram *uart_pram, - struct smc_regs *ctl, + volatile struct smc_uart_pram *uart_pram, + volatile struct smc_regs *ctl, int TxBD, int TxNUM, int TxSIZE, cyg_uint8 *TxBUF, int RxBD, int RxNUM, int RxSIZE, @@ -384,10 +384,10 @@ quicc_smc_serial_init(struct cyg_devtab_ if (first_init) { // Set up tables since many fields are dynamic [computed at runtime] first_init = 0; +#ifdef CYGPKG_IO_SERIAL_POWERPC_QUICC_SMC_SMC1 eppc->cp_cr = QUICC_SMC_CMD_Reset | QUICC_SMC_CMD_Go; // Totally reset CP while (eppc->cp_cr & QUICC_SMC_CMD_Reset) ; TxBD = 0x2800; // Note: this should be configurable -#ifdef CYGPKG_IO_SERIAL_POWERPC_QUICC_SMC_SMC1 RxBD = TxBD + CYGNUM_IO_SERIAL_POWERPC_QUICC_SMC_SMC1_TxNUM*8; quicc_smc_serial_init_info(&quicc_smc_serial_info1, &eppc->pram[2].scc.pothers.smc_modem.psmc.u, // PRAM @@ -405,6 +405,19 @@ quicc_smc_serial_init(struct cyg_devtab_ 12 // SI mask position ); TxBD = RxBD + CYGNUM_IO_SERIAL_POWERPC_QUICC_SMC_SMC1_RxNUM*8; +#else +#ifdef CYG_HAL_POWERPC_MBX + // Ensure the SMC1 side is initialized first and use shared mem + // above where it plays: + diag_init(); // (pull in constructor that inits diag channel) + TxBD = 0x2830; // Note: this should be inferred from the chip state +#else + // there is no diag device wanting to use the QUICC, so prepare it + // for SMC2 use only. + eppc->cp_cr = QUICC_SMC_CMD_Reset | QUICC_SMC_CMD_Go; // Totally reset CP + while (eppc->cp_cr & QUICC_SMC_CMD_Reset) ; + TxBD = 0x2800; // Note: this should be configurable +#endif #endif #ifdef CYGPKG_IO_SERIAL_POWERPC_QUICC_SMC_SMC2 RxBD = TxBD + CYGNUM_IO_SERIAL_POWERPC_QUICC_SMC_SMC2_TxNUM*8; @@ -428,7 +441,7 @@ quicc_smc_serial_init(struct cyg_devtab_ (chan->callbacks->serial_init)(chan); // Really only required for interrupt driven devices if (chan->out_cbuf.len != 0) { cyg_drv_interrupt_create(smc_chan->int_num, - 99, // Priority - unused + CYGARC_SIU_PRIORITY_HIGH, // Priority - unused (but asserted) (cyg_addrword_t)chan, // Data item passed to interrupt handler quicc_smc_serial_ISR, quicc_smc_serial_DSR, @@ -459,7 +472,7 @@ quicc_smc_serial_lookup(struct cyg_devta static void quicc_smc_serial_flush(quicc_smc_serial_info *smc_chan) { - struct cp_bufdesc *txbd = smc_chan->txbd; + volatile struct cp_bufdesc *txbd = smc_chan->txbd; if ((txbd->length > 0) && ((txbd->ctrl & QUICC_BD_CTL_Ready) == 0)) { txbd->ctrl |= QUICC_BD_CTL_Ready|QUICC_BD_CTL_Int; // Signal buffer ready if (txbd->ctrl & QUICC_BD_CTL_Wrap) { @@ -545,7 +558,6 @@ static void quicc_smc_serial_start_xmit(serial_channel *chan) { quicc_smc_serial_info *smc_chan = (quicc_smc_serial_info *)chan->dev_priv; - struct cp_bufdesc *txbd = smc_chan->txbd; if (smc_chan->txbd->length == 0) { // See if there is anything to put in this buffer, just to get it going cyg_drv_dsr_lock(); @@ -596,9 +608,9 @@ quicc_smc_serial_DSR(cyg_vector_t vector volatile struct cp_bufdesc *rxbd = smc_chan->rxbd; struct cp_bufdesc *rxlast; int i, cache_state; +#ifdef CYGDBG_DIAG_BUF int _time, _stime; externC cyg_tick_count_t cyg_current_time(void); -#ifdef CYGDBG_DIAG_BUF cyg_drv_isr_lock(); enable_diag_uart = 0; HAL_CLOCK_READ(&_time); @@ -642,7 +654,8 @@ quicc_smc_serial_DSR(cyg_vector_t vector while (ctl->smc_smce & QUICC_SMCE_RX) { // Receive interrupt ctl->smc_smce = QUICC_SMCE_RX; // Reset interrupt state; - rxlast = (char *)eppc_base() + smc_chan->pram->rbptr; + rxlast = (struct cp_bufdesc *) ( + (char *)eppc_base() + smc_chan->pram->rbptr ); #ifdef CYGDBG_DIAG_BUF enable_diag_uart = 0; HAL_CLOCK_READ(&_time); @@ -770,3 +783,5 @@ dump_buf(unsigned char *p, int s) } #endif // CYGPKG_IO_SERIAL_POWERPC_QUICC_SMC +// ------------------------------------------------------------------------ +// EOF powerpc/quicc_smc_serial.c
--- a/packages/kernel/current/ChangeLog +++ b/packages/kernel/current/ChangeLog @@ -1,3 +1,7 @@ +1999-09-25 Jesper Skov <jskov@cygnus.co.uk> + + * tests/stress_threads.c: Added date header and flush() calls. + 1999-09-16 Hugo Tyson <hmt@cygnus.co.uk> * tests/tm_basic.cxx (run_mutex_tests): Must unlock mutices before
--- a/packages/kernel/current/tests/stress_threads.c +++ b/packages/kernel/current/tests/stress_threads.c @@ -234,7 +234,7 @@ main(void) int i; CYG_TEST_INIT(); - CYG_TEST_INFO("# Entering stress's cyg_user_start() function"); + CYG_TEST_INFO("Stress threads test compiled on " __DATE__); cyg_mutex_init(&client_request_lock); cyg_mutex_init(&statistics_print_lock); @@ -689,8 +689,10 @@ void print_statistics(int print_full) // After the first day, only dump stat once per day. Do print // a . on the hour though. if ((minutes > MINS_DAY) && ((minutes % MINS_DAY) != 0)) { - if ((minutes % MINS_HOUR) == 0) + if ((minutes % MINS_HOUR) == 0) { printf("."); + fflush(stdout); + } return; } @@ -699,6 +701,7 @@ void print_statistics(int print_full) if ((minutes < MINS_DAY) && (minutes > MINS_HOUR) && ((minutes % MINS_HOUR) != 0)) { printf("."); + fflush(stdout); return; } }