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annotate packages/hal/arm/aeb/current/include/hal_platform_setup.h @ 44:41bd4f3a90de ecos-sw-1999-10-08

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Merge from eCos master repository on 1999-10-08-07:47:04-BST
author jlarmour
date Fri, 08 Oct 1999 13:16:25 +0000
parents 443894e2e912
children 797268ecc331
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1 #ifndef CYGONCE_HAL_PLATFORM_SETUP_H
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2 #define CYGONCE_HAL_PLATFORM_SETUP_H
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3
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4 /*=============================================================================
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5 //
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6 // hal_platform_setup.h
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7 //
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8 // Platform specific support for HAL (assembly code)
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9 //
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10 //=============================================================================
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11 //####COPYRIGHTBEGIN####
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12 //
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13 // -------------------------------------------
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14 // The contents of this file are subject to the Cygnus eCos Public License
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15 // Version 1.0 (the "License"); you may not use this file except in
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16 // compliance with the License. You may obtain a copy of the License at
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17 // http://sourceware.cygnus.com/ecos
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18 //
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19 // Software distributed under the License is distributed on an "AS IS"
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20 // basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the
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21 // License for the specific language governing rights and limitations under
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22 // the License.
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23 //
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24 // The Original Code is eCos - Embedded Cygnus Operating System, released
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25 // September 30, 1998.
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26 //
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27 // The Initial Developer of the Original Code is Cygnus. Portions created
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28 // by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved.
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29 // -------------------------------------------
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30 //
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31 //####COPYRIGHTEND####
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32 //=============================================================================
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33 //#####DESCRIPTIONBEGIN####
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34 //
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35 // Author(s): gthomas
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36 // Contributors: gthomas
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37 // Date: 1999-04-13
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38 // Purpose: ARM/AEB-1 platform specific support routines
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39 // Description:
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40 // Usage: #include <cyg/hal/hal_platform_setup.h>
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41 //
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42 //####DESCRIPTIONEND####
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43 //
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44 //===========================================================================*/
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45
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46 // From <cyg/hal/hal_cache.h> Need to make that file assembly safe.
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47 #define CYG_DEVICE_CCR 0xFFFFA400
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48 #define CCR_I 0x08 // Invalidate mode
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49
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50 #if CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE==4096
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51 // Override default to a more sensible value
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52 #undef CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE
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53 #define CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE 2048
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54 #endif
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55
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56 #ifdef CYGHWR_HAL_ARM_AEB_REVISION_C
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57 // AEB rev C has 256kB of memory. Cache is working (set cachable)
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58 #define AEB_SRAM .long 0xFFFFA008,0x00008000,0x00048000,0x00007c04
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59 #define AEB_BAD .long 0xFFFFA00C,0x00048000,0x01000000,0x00000000
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60 #else
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61 // AEB rev B has 128kB of memory. Cache is broken (clear cachable)
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62 #define AEB_SRAM .long 0xFFFFA008,0x00008000,0x00028000,0x00007804
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63 #define AEB_BAD .long 0xFFFFA00C,0x00028000,0x01000000,0x00000000
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64 #endif
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65
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66 #ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
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67 #define PLATFORM_SETUP1 \
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68 ldr r1,=CYG_DEVICE_CCR ;\
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69 mov r2,#CCR_I ;\
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70 strb r2,[r1,#0] /* invalidate... */ ;\
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71 mov r2,#0 ;\
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72 strb r2,[r1,#0] /* and disable the cache. */ ;\
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73 ldr r1,=segment_register_setups ;\
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74 10: ldr r2,[r1,#0] /* segment address */ ;\
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75 cmp r2,#0 ;\
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76 beq 20f ;\
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77 ldr r3,[r1,#4] /* segment start */ ;\
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78 str r3,[r2,#0x00] ;\
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79 ldr r3,[r1,#8] /* segment end */ ;\
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80 str r3,[r2,#0x20] ;\
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81 ldr r3,[r1,#12] /* segment flags */ ;\
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82 str r3,[r2,#0x40] ;\
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83 add r1,r1,#16 /* next segment */ ;\
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84 b 10b ;\
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85 segment_register_setups: ;\
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86 AEB_SRAM /* segment 2 */ ;\
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87 AEB_BAD /* segment 3 */ ;\
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88 .long 0 ;\
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89 20:
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90 #else
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91 #define PLATFORM_SETUP1
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92 #endif
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93
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94 /*---------------------------------------------------------------------------*/
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95 /* end of hal_platform_setup.h */
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96 #endif /* CYGONCE_HAL_PLATFORM_SETUP_H */