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annotate packages/devs/eth/arm/edb7xxx/current/src/if_edb7xxx.c @ 82:6736c52df507 ecos-sw-2000-04-14

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Merge from eCos master repository on 2000-04-14-13:35:46-BST
author jlarmour
date Tue, 18 Apr 2000 21:51:55 +0000
parents
children 6ed91473a1cd
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1 //==========================================================================
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2 //
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3 // dev/if_edb7xxx.c
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4 //
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5 // Ethernet device driver for Cirrus Logic EDB7xxx using CS8900
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6 //
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7 //==========================================================================
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8 //####COPYRIGHTBEGIN####
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9 //
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10 // -------------------------------------------
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11 // The contents of this file are subject to the Red Hat eCos Public License
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12 // Version 1.1 (the "License"); you may not use this file except in
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13 // compliance with the License. You may obtain a copy of the License at
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14 // http://www.redhat.com/
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15 //
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16 // Software distributed under the License is distributed on an "AS IS"
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17 // basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the
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18 // License for the specific language governing rights and limitations under
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19 // the License.
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20 //
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21 // The Original Code is eCos - Embedded Configurable Operating System,
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22 // released September 30, 1998.
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23 //
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24 // The Initial Developer of the Original Code is Red Hat.
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25 // Portions created by Red Hat are
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26 // Copyright (C) 1998, 1999, 2000 Red Hat, Inc.
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27 // All Rights Reserved.
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28 // -------------------------------------------
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29 //
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30 //####COPYRIGHTEND####
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31 //####BSDCOPYRIGHTBEGIN####
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32 //
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33 // -------------------------------------------
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34 //
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35 // Portions of this software may have been derived from OpenBSD or other sources,
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36 // and are covered by the appropriate copyright disclaimers included herein.
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37 //
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38 // -------------------------------------------
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39 //
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40 //####BSDCOPYRIGHTEND####
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41 //==========================================================================
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42 //#####DESCRIPTIONBEGIN####
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43 //
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44 // Author(s): gthomas
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45 // Contributors: gthomas
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46 // Date: 2000-01-10
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47 // Purpose:
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48 // Description: hardware driver for CS8900 ethernet
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49 //
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50 //
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51 //####DESCRIPTIONEND####
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52 //
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53 //==========================================================================
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54
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55 // Ethernet device driver for Cirrus Logic EDB7xxx
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56 // Based on CS8900A
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57
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58 #include <pkgconf/net.h>
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59 #include <cyg/infra/cyg_type.h>
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60 #include <cyg/hal/hal_arch.h>
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61 #include <cyg/infra/diag.h>
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62 #include <cyg/hal/drv_api.h>
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63 #include <netdev.h>
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64 #include <eth_drv.h>
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65
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66 #define INTS_DONT_WORK
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67 #undef INTS_DONT_WORK
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68
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69 #ifdef INTS_DONT_WORK
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70 #define STACK_SIZE CYGNUM_HAL_STACK_SIZE_MINIMUM
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71 static char cs8900_fake_int_stack[STACK_SIZE];
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72 static cyg_thread cs8900_fake_int_thread_data;
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73 static cyg_handle_t cs8900_fake_int_thread_handle;
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74 static void cs8900_fake_int(cyg_addrword_t);
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75 #endif
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76
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77 #define CS8900_BASE 0x20000000
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78 #include "cs8900.h"
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79 #define ETHER_ADDR_LEN 6
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80
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81 extern int net_debug; // FIXME
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82
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83 struct cs8900_priv_data {
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84 int txbusy; // A packet has been sent
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85 unsigned long txkey; // Used to ack when packet sent
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86 } _cs8900_priv_data;
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87
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88 ETH_DRV_SC(edb7xxx_sc,
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89 &_cs8900_priv_data, // Driver specific data
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90 "eth0", // Name for this interface
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91 cs8900_start,
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92 cs8900_stop,
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93 cs8900_control,
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94 cs8900_can_send,
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95 cs8900_send,
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96 cs8900_recv);
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97
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98 NETDEVTAB_ENTRY(edb7xxx_netdev,
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99 "edb7xxx",
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100 edb7xxx_cs8900_init,
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101 &edb7xxx_sc);
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102
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103 // FIXME
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104 static unsigned char enaddr[] = { 0x08, 0x88, 0x12, 0x34, 0x56, 0x78};
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105
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106 static void cs8900_int(struct eth_drv_sc *sc);
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107 static cyg_interrupt cs8900_interrupt;
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108 static cyg_handle_t cs8900_interrupt_handle;
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109
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110 // This ISR is called when the ethernet interrupt occurs
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111 static int
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112 cs8900_isr(cyg_vector_t vector, cyg_addrword_t data, HAL_SavedRegisters *regs)
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113 {
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114 cyg_drv_interrupt_mask(CYGNUM_HAL_INTERRUPT_EINT3);
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115 return (CYG_ISR_HANDLED|CYG_ISR_CALL_DSR); // Run the DSR
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116 }
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117
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118 // This DSR handles the ethernet [logical] processing
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119 static void
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120 cs8900_dsr(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data)
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121 {
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122 cs8900_int((struct eth_drv_sc *)data);
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123 // Allow interrupts to happen again
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124 cyg_drv_interrupt_acknowledge(CYGNUM_HAL_INTERRUPT_EINT3);
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125 cyg_drv_interrupt_unmask(CYGNUM_HAL_INTERRUPT_EINT3);
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126 }
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127
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128 static bool
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129 edb7xxx_cs8900_init(struct cyg_netdevtab_entry *tab)
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130 {
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131 struct eth_drv_sc *sc = (struct eth_drv_sc *)tab->device_instance;
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132 unsigned short chip_type, chip_rev, chip_status;
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133 int i;
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134
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135 diag_printf("cs8900 init\n");
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136
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137 // Initialize environment, setup interrupt handler
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138 cyg_drv_interrupt_create(CYGNUM_HAL_INTERRUPT_EINT3,
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139 99, // Priority - what goes here?
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140 (cyg_addrword_t)sc, // Data item passed to interrupt handler
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141 (cyg_ISR_t *)cs8900_isr,
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142 (cyg_DSR_t *)cs8900_dsr,
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143 &cs8900_interrupt_handle,
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144 &cs8900_interrupt);
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145 cyg_drv_interrupt_attach(cs8900_interrupt_handle);
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146 cyg_drv_interrupt_acknowledge(CYGNUM_HAL_INTERRUPT_EINT3);
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147 cyg_drv_interrupt_unmask(CYGNUM_HAL_INTERRUPT_EINT3);
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148
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149 #ifdef INTS_DONT_WORK
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150 cyg_thread_create(1, // Priority
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151 cs8900_fake_int, // entry
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152 0, // entry parameter
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153 "CS8900 int", // Name
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154 &cs8900_fake_int_stack[0], // Stack
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155 STACK_SIZE, // Size
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156 &cs8900_fake_int_thread_handle, // Handle
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157 &cs8900_fake_int_thread_data // Thread data structure
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158 );
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159 cyg_thread_resume(cs8900_fake_int_thread_handle); // Start it
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160 #endif
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161
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162 chip_type = get_reg(PP_ChipID);
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163 chip_rev = get_reg(PP_ChipRev);
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164
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165 diag_printf("CS8900 - type: %x, rev: %x\n", chip_type, chip_rev);
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166
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167 put_reg(PP_SelfCtl, PP_SelfCtl_Reset); // Reset chip
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168 while ((get_reg(PP_SelfStat) & PP_SelfStat_InitD) == 0) ;
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169
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170 chip_status = get_reg(PP_SelfStat);
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171 diag_printf("CS8900 - status: %x (%sEEPROM present)\n", chip_status,
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172 chip_status&PP_SelfStat_EEPROM ? "" : "no ");
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173
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174 // Set up hardware address - FIXME
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175 for (i = 0; i < ETHER_ADDR_LEN; i += 2) {
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176 put_reg(PP_LAF+i, 0xFFFF);
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177 put_reg(PP_IA+i, enaddr[i] | (enaddr[i+1] << 8));
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178 }
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179
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180 // Initialize upper level driver
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181 eth_drv_init(sc, enaddr);
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182
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183 return true;
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184 }
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185
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186 static void
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187 cs8900_stop(struct eth_drv_sc *sc)
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188 {
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189 put_reg(PP_SelfCtl, PP_SelfCtl_Reset); // Reset chip
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190 while ((get_reg(PP_SelfStat) & PP_SelfStat_InitD) == 0) ;
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191 }
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192
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193 //
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194 // This function is called to "start up" the interface. It may be called
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195 // multiple times, even when the hardware is already running. It will be
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196 // called whenever something "hardware oriented" changes and should leave
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197 // the hardware ready to send/receive packets.
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198 //
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199 static void
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200 cs8900_start(struct eth_drv_sc *sc, unsigned char *enaddr, int flags)
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201 {
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202 unsigned short stat;
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203 put_reg(PP_BusCtl, PP_BusCtl_MemoryE); // Disable interrupts, memory mode
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204 put_reg(PP_IntReg, PP_IntReg_IRQ0); // Only possibility
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205 put_reg(PP_RxCFG, PP_RxCFG_RxOK | PP_RxCFG_CRC |
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206 PP_RxCFG_RUNT | PP_RxCFG_EXTRA);
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207 put_reg(PP_RxCTL, PP_RxCTL_RxOK | PP_RxCTL_Broadcast |
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208 PP_RxCTL_IA);
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209 put_reg(PP_TxCFG, PP_TxCFG_TxOK | PP_TxCFG_Collision |
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210 PP_TxCFG_CRS | PP_TxCFG_SQE | PP_TxCFG_Late |
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211 PP_TxCFG_Jabber | PP_TxCFG_16Collisions);
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212 put_reg(PP_BufCFG, PP_BufCFG_TxRDY | PP_BufCFG_TxUE | PP_BufCFG_RxMiss |
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213 PP_BufCFG_TxCol | PP_BufCFG_Miss | PP_BufCFG_SWI);
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214 put_reg(PP_IntReg, PP_IntReg_IRQ0); // Only possibility
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215 put_reg(PP_LineCTL, PP_LineCTL_Rx | PP_LineCTL_Tx);
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216 // Clear Interrupt Status Queue before enabling interrupts
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217 while ((stat = CS8900_ISQ) != 0) ;
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218 put_reg(PP_BusCtl, PP_BusCtl_EnableIRQ);
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219 }
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220
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221 //
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222 // This routine is called to perform special "control" opertions
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223 //
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224 static int
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225 cs8900_control(struct eth_drv_sc *sc, unsigned long key,
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226 void *data, int data_length)
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227 {
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228 switch (key) {
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229 case ETH_DRV_SET_MAC_ADDRESS:
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230 return 0;
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231 break;
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232 default:
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233 return 1;
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234 break;
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235 }
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236 }
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237
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238 //
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239 // This routine is called to see if it is possible to send another packet.
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240 // It will return non-zero if a transmit is possible, zero otherwise.
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241 //
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242 static int
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243 cs8900_can_send(struct eth_drv_sc *sc)
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244 {
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245 struct cs8900_priv_data *cpd = (struct cs8900_priv_data *)sc->driver_private;
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246 return (cpd->txbusy == 0);
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247 }
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248
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249 //
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250 // This routine is called to send data to the hardware.
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251 static void
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252 cs8900_send(struct eth_drv_sc *sc, struct eth_drv_sg *sg_list, int sg_len,
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253 int total_len, unsigned long key)
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254 {
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255 struct cs8900_priv_data *cpd = (struct cs8900_priv_data *)sc->driver_private;
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256 int i;
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257 int len;
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258 unsigned char *data;
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259 unsigned short saved_data = 0, *sdata;
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260 unsigned short stat;
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261 bool odd_byte = false;
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262
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263 // Mark xmitter busy
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264 cpd->txbusy = 1;
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265 cpd->txkey = key;
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266 // Start the xmit sequence
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267 // Note: this can go back once the 'dump' is removed
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268 // CS8900_TxCMD = PP_TxCmd_TxStart_5; // Start more-or-less immediately
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269 CS8900_TxCMD = PP_TxCmd_TxStart_Full; // Start only when all data sent to chip
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270 CS8900_TxLEN = total_len;
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271 stat = get_reg(PP_BusStat); // This actually starts the xmit
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272
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273 // Put data into buffer
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274 for (i = 0; i < sg_len; i++) {
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275 data = (unsigned char *)sg_list[i].buf;
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276 len = sg_list[i].len;
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277 if (len > 0) {
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278 /* Finish the last word. */
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279 if (odd_byte) {
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280 saved_data |= (*data++ << 8);
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281 CS8900_RTDATA = saved_data;
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282 len--;
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283 odd_byte = false;
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284 }
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285 /* Output contiguous words. */
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286 sdata = (unsigned short *)data;
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287 while (len > 1) {
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288 CS8900_RTDATA = *sdata++;
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289 len -= sizeof(unsigned short);
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290 }
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291 /* Save last byte, if necessary. */
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292 if (len == 1) {
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293 data = (unsigned char *)sdata;
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294 saved_data = *data;
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295 odd_byte = true;
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296 }
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297 }
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298 }
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299 if (odd_byte) {
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300 CS8900_RTDATA = saved_data;
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301 }
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302 }
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303
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304 //
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305 // This function is called when a packet has been received. It's job is
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306 // to prepare to unload the packet from the hardware. Once the length of
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307 // the packet is known, the upper layer of the driver can be told. When
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308 // the upper layer is ready to unload the packet, the internal function
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309 // 'cs8900_recv' will be called to actually fetch it from the hardware.
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310 //
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311 static void
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312 cs8900_RxEvent(struct eth_drv_sc *sc)
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313 {
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314 unsigned short stat, len;
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315
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316 stat = CS8900_RTDATA;
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317 len = CS8900_RTDATA;
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318 if (net_debug) {
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319 diag_printf("RxEvent - stat: %x, len: %d\n", stat, len);
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320 }
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321 eth_drv_recv(sc, len);
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322 }
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323
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324 //
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325 // This function is called as a result of the "eth_drv_recv()" call above.
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326 // It's job is to actually fetch data for a packet from the hardware once
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327 // memory buffers have been allocated for the packet. Note that the buffers
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328 // may come in pieces, using a scatter-gather list. This allows for more
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329 // efficient processing in the upper layers of the stack.
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330 //
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331 static void
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332 cs8900_recv(struct eth_drv_sc *sc, struct eth_drv_sg *sg_list, int sg_len)
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333 {
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334 int i, mlen;
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335 unsigned short *data, val;
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336 unsigned char *cp, cval;
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337
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338 for (i = 0; i < sg_len; i++) {
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339 data = (unsigned short *)sg_list[i].buf;
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340 mlen = sg_list[i].len;
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341 while (mlen >= sizeof(*data)) {
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342 val = CS8900_RTDATA;
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343 if (data) {
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344 *data++ = val;
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345 }
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346 mlen -= sizeof(*data);
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347 }
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348 if (mlen) {
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349 // Fetch last odd byte
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350 cval = CS8900_RTDATA & 0xFF;
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351 if (cp = (unsigned char *)data) {
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352 *cp = cval;
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353 }
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354 }
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355 }
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356 }
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357
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358 static void
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359 cs8900_TxEvent(struct eth_drv_sc *sc, int stat)
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360 {
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361 struct cs8900_priv_data *cpd = (struct cs8900_priv_data *)sc->driver_private;
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362 stat = get_reg(PP_TER);
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363 if (net_debug) {
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364 diag_printf("Tx event: %x\n", stat);
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365 }
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366 cpd->txbusy = 0;
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367 eth_drv_tx_done(sc, cpd->txkey, 0);
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368 }
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369
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370 static void
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371 cs8900_BufEvent(struct eth_drv_sc *sc, int stat)
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372 {
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373 if (stat & PP_BufCFG_RxMiss) {
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374 }
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375 if (stat & PP_BufCFG_TxUE) {
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376 }
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377 }
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378
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379 static void
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380 cs8900_int(struct eth_drv_sc *sc)
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381 {
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382 unsigned short event;
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383 while ((event = CS8900_ISQ) != 0) {
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384 switch (event & ISQ_EventMask) {
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385 case ISQ_RxEvent:
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386 cs8900_RxEvent(sc);
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387 break;
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388 case ISQ_TxEvent:
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389 cs8900_TxEvent(sc, event);
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390 break;
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391 case ISQ_BufEvent:
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392 cs8900_BufEvent(sc, event);
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393 break;
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394 case ISQ_RxMissEvent:
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395 // Receive miss counter has overflowed
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396 break;
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397 case ISQ_TxColEvent:
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398 // Transmit collision counter has overflowed
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399 break;
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400 default:
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401 diag_printf("%s: Unknown event: %x\n", __FUNCTION__, event);
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402 break;
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403 }
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404 }
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405 }
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406
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407 #ifdef INTS_DONT_WORK
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408 void
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409 cs8900_fake_int(cyg_addrword_t param)
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410 {
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411 int s;
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412 while (true) {
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413 cyg_thread_delay(5);
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414 s = splnet();
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415 cs8900_int(&edb7xxx_sc);
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416 splx(s);
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417 }
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418 }
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419 #endif
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420