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annotate packages/devs/serial/arm/edb7xxx/current/src/edb7xxx_serial.c @ 115:6ed91473a1cd ecos-sw-2000-08-21

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Merge from eCos master repository on 2000-08-21-22:40:54-BST
author jlarmour
date Fri, 25 Aug 2000 17:32:38 +0000
parents 6736c52df507
children e0c0827131d1
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1 //==========================================================================
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2 //
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3 // io/serial/arm/edb7xxx_serial.c
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4 //
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5 // Cirrus Logic EDB7XXX Serial I/O Interface Module (interrupt driven)
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6 //
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7 //==========================================================================
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8 //####COPYRIGHTBEGIN####
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9 //
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10 // -------------------------------------------
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11 // The contents of this file are subject to the Red Hat eCos Public License
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12 // Version 1.1 (the "License"); you may not use this file except in
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13 // compliance with the License. You may obtain a copy of the License at
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14 // http://www.redhat.com/
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15 //
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16 // Software distributed under the License is distributed on an "AS IS"
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17 // basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the
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18 // License for the specific language governing rights and limitations under
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19 // the License.
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20 //
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21 // The Original Code is eCos - Embedded Configurable Operating System,
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22 // released September 30, 1998.
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23 //
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24 // The Initial Developer of the Original Code is Red Hat.
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25 // Portions created by Red Hat are
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26 // Copyright (C) 1998, 1999, 2000 Red Hat, Inc.
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27 // All Rights Reserved.
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28 // -------------------------------------------
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29 //
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30 //####COPYRIGHTEND####
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31 //==========================================================================
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32 //#####DESCRIPTIONBEGIN####
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33 //
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34 // Author(s): gthomas
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35 // Contributors: gthomas
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36 // Date: 1999-02-04
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37 // Purpose: EDB7XXX Serial I/O module (interrupt driven version)
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38 // Description:
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39 //
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40 //####DESCRIPTIONEND####
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41 //
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42 //==========================================================================
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43
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44 #include <pkgconf/system.h>
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45 #include <pkgconf/io_serial.h>
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46 #include <pkgconf/io.h>
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47 #include <cyg/io/io.h>
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48 #include <cyg/hal/hal_intr.h>
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49 #include <cyg/io/devtab.h>
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50 #include <cyg/io/serial.h>
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51 #include <cyg/infra/diag.h>
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52
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53 #ifdef CYGPKG_IO_SERIAL_ARM_EDB7XXX
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54
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55 #include "edb7xxx_serial.h"
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56
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57 typedef struct edb7xxx_serial_info {
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58 CYG_ADDRWORD data, // Pointer to data register
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59 control, // Pointer to baud rate/line control register
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60 stat, // Pointer to system flags for this port
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61 syscon; // Pointer to system control for this port
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62 CYG_WORD tx_int_num, // Transmit interrupt number
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63 rx_int_num, // Receive interrupt number
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64 ms_int_num; // Modem Status Change interrupt number
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65 cyg_interrupt serial_tx_interrupt,
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66 serial_rx_interrupt,
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67 serial_ms_interrupt;
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68 cyg_handle_t serial_tx_interrupt_handle,
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69 serial_rx_interrupt_handle,
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70 serial_ms_interrupt_handle;
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71 bool tx_enabled;
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72 } edb7xxx_serial_info;
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73
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74 static bool edb7xxx_serial_init(struct cyg_devtab_entry *tab);
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75 static bool edb7xxx_serial_putc(serial_channel *chan, unsigned char c);
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76 static Cyg_ErrNo edb7xxx_serial_lookup(struct cyg_devtab_entry **tab,
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77 struct cyg_devtab_entry *sub_tab,
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78 const char *name);
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79 static unsigned char edb7xxx_serial_getc(serial_channel *chan);
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80 static Cyg_ErrNo edb7xxx_serial_set_config(serial_channel *chan, cyg_uint32 key,
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81 const void *xbuf, cyg_uint32 *len);
82
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82 static void edb7xxx_serial_start_xmit(serial_channel *chan);
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83 static void edb7xxx_serial_stop_xmit(serial_channel *chan);
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84
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85 static cyg_uint32 edb7xxx_serial_tx_ISR(cyg_vector_t vector, cyg_addrword_t data);
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86 static void edb7xxx_serial_tx_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data);
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87 static cyg_uint32 edb7xxx_serial_rx_ISR(cyg_vector_t vector, cyg_addrword_t data);
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88 static void edb7xxx_serial_rx_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data);
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89 static cyg_uint32 edb7xxx_serial_ms_ISR(cyg_vector_t vector, cyg_addrword_t data);
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90 static void edb7xxx_serial_ms_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data);
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91
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92 static SERIAL_FUNS(edb7xxx_serial_funs,
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93 edb7xxx_serial_putc,
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94 edb7xxx_serial_getc,
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95 edb7xxx_serial_set_config,
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96 edb7xxx_serial_start_xmit,
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97 edb7xxx_serial_stop_xmit
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98 );
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99
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100 #ifdef CYGPKG_IO_SERIAL_ARM_EDB7XXX_SERIAL1
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101 static edb7xxx_serial_info edb7xxx_serial_info1 = {UARTDR1, // Data register
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102 UBLCR1, // Port control
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103 SYSFLG1, // Status
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104 SYSCON1, // System config
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105 CYGNUM_HAL_INTERRUPT_UTXINT1, // Tx interrupt
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106 CYGNUM_HAL_INTERRUPT_URXINT1, // Rx interrupt
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107 0 /*CYGNUM_HAL_INTERRUPT_UMSINT*/}; // Modem control
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108 #if CYGNUM_IO_SERIAL_ARM_EDB7XXX_SERIAL1_BUFSIZE > 0
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109 static unsigned char edb7xxx_serial_out_buf1[CYGNUM_IO_SERIAL_ARM_EDB7XXX_SERIAL1_BUFSIZE];
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110 static unsigned char edb7xxx_serial_in_buf1[CYGNUM_IO_SERIAL_ARM_EDB7XXX_SERIAL1_BUFSIZE];
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111
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112 static SERIAL_CHANNEL_USING_INTERRUPTS(edb7xxx_serial_channel1,
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113 edb7xxx_serial_funs,
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114 edb7xxx_serial_info1,
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115 CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_ARM_EDB7XXX_SERIAL1_BAUD),
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116 CYG_SERIAL_STOP_DEFAULT,
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117 CYG_SERIAL_PARITY_DEFAULT,
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118 CYG_SERIAL_WORD_LENGTH_DEFAULT,
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119 CYG_SERIAL_FLAGS_DEFAULT,
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120 &edb7xxx_serial_out_buf1[0], sizeof(edb7xxx_serial_out_buf1),
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121 &edb7xxx_serial_in_buf1[0], sizeof(edb7xxx_serial_in_buf1)
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122 );
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123 #else
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124 static SERIAL_CHANNEL(edb7xxx_serial_channel1,
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125 edb7xxx_serial_funs,
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126 edb7xxx_serial_info1,
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127 CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_ARM_EDB7XXX_SERIAL1_BAUD),
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128 CYG_SERIAL_STOP_DEFAULT,
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129 CYG_SERIAL_PARITY_DEFAULT,
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130 CYG_SERIAL_WORD_LENGTH_DEFAULT,
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131 CYG_SERIAL_FLAGS_DEFAULT
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132 );
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133 #endif
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134
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135 DEVTAB_ENTRY(edb7xxx_serial_io1,
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136 CYGDAT_IO_SERIAL_ARM_EDB7XXX_SERIAL1_NAME,
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137 0, // Does not depend on a lower level interface
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138 &cyg_io_serial_devio,
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139 edb7xxx_serial_init,
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140 edb7xxx_serial_lookup, // Serial driver may need initializing
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141 &edb7xxx_serial_channel1
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142 );
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143 #endif // CYGPKG_IO_SERIAL_ARM_EDB7XXX_SERIAL2
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144
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145 #ifdef CYGPKG_IO_SERIAL_ARM_EDB7XXX_SERIAL2
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146 static edb7xxx_serial_info edb7xxx_serial_info2 = {UARTDR2, // Data register
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147 UBLCR2, // Port control
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148 SYSFLG2, // Status
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149 SYSCON2, // System config
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150 CYGNUM_HAL_INTERRUPT_UTXINT2, // Tx interrupt
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151 CYGNUM_HAL_INTERRUPT_URXINT2, // Rx interrupt
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152 0}; // No modem control
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153 #if CYGNUM_IO_SERIAL_ARM_EDB7XXX_SERIAL2_BUFSIZE > 0
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154 static unsigned char edb7xxx_serial_out_buf2[CYGNUM_IO_SERIAL_ARM_EDB7XXX_SERIAL2_BUFSIZE];
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155 static unsigned char edb7xxx_serial_in_buf2[CYGNUM_IO_SERIAL_ARM_EDB7XXX_SERIAL2_BUFSIZE];
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156
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157 static SERIAL_CHANNEL_USING_INTERRUPTS(edb7xxx_serial_channel2,
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158 edb7xxx_serial_funs,
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159 edb7xxx_serial_info2,
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160 CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_ARM_EDB7XXX_SERIAL2_BAUD),
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161 CYG_SERIAL_STOP_DEFAULT,
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162 CYG_SERIAL_PARITY_DEFAULT,
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163 CYG_SERIAL_WORD_LENGTH_DEFAULT,
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164 CYG_SERIAL_FLAGS_DEFAULT,
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165 &edb7xxx_serial_out_buf2[0], sizeof(edb7xxx_serial_out_buf2),
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166 &edb7xxx_serial_in_buf2[0], sizeof(edb7xxx_serial_in_buf2)
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167 );
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168 #else
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169 static SERIAL_CHANNEL(edb7xxx_serial_channel2,
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170 edb7xxx_serial_funs,
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171 edb7xxx_serial_info2,
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172 CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_ARM_EDB7XXX_SERIAL2_BAUD),
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173 CYG_SERIAL_STOP_DEFAULT,
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174 CYG_SERIAL_PARITY_DEFAULT,
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175 CYG_SERIAL_WORD_LENGTH_DEFAULT,
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176 CYG_SERIAL_FLAGS_DEFAULT
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177 );
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178 #endif
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179
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180 DEVTAB_ENTRY(edb7xxx_serial_io2,
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181 CYGDAT_IO_SERIAL_ARM_EDB7XXX_SERIAL2_NAME,
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182 0, // Does not depend on a lower level interface
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183 &cyg_io_serial_devio,
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184 edb7xxx_serial_init,
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185 edb7xxx_serial_lookup, // Serial driver may need initializing
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186 &edb7xxx_serial_channel2
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187 );
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188 #endif // CYGPKG_IO_SERIAL_ARM_EDB7XXX_SERIAL2
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189
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190 // Internal function to actually configure the hardware to desired baud rate, etc.
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191 static bool
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192 edb7xxx_serial_config_port(serial_channel *chan, cyg_serial_info_t *new_config, bool init)
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193 {
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194 edb7xxx_serial_info *edb7xxx_chan = (edb7xxx_serial_info *)chan->dev_priv;
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195 volatile cyg_uint32 *syscon = (volatile cyg_uint32 *)edb7xxx_chan->syscon;
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196 volatile cyg_uint32 *blcfg = (volatile cyg_uint32 *)edb7xxx_chan->control;
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197 unsigned int baud_divisor = select_baud[new_config->baud];
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198 cyg_uint32 _lcr;
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199 if (baud_divisor == 0) return false;
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200 // Disable port interrupts while changing hardware
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201 _lcr = select_word_length[new_config->word_length - CYGNUM_SERIAL_WORD_LENGTH_5] |
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202 select_stop_bits[new_config->stop] |
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203 select_parity[new_config->parity] |
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204 UBLCR_FIFOEN | UART_BITRATE(baud_divisor);
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205 #ifdef CYGDBG_IO_INIT
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206 diag_printf("Set CTL: %x = %x\n", blcfg, _lcr);
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207 #endif
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208 *blcfg = _lcr;
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209 *syscon |= SYSCON1_UART1EN;
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210 if (new_config != &chan->config) {
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211 chan->config = *new_config;
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212 }
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213 return true;
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214 }
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215
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216 // Function to initialize the device. Called at bootstrap time.
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217 static bool
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218 edb7xxx_serial_init(struct cyg_devtab_entry *tab)
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219 {
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220 serial_channel *chan = (serial_channel *)tab->priv;
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221 edb7xxx_serial_info *edb7xxx_chan = (edb7xxx_serial_info *)chan->dev_priv;
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222 #ifdef CYGDBG_IO_INIT
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223 diag_printf("EDB7XXX SERIAL init - dev: %x.%d\n", edb7xxx_chan->control, edb7xxx_chan->tx_int_num);
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224 #endif
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225 (chan->callbacks->serial_init)(chan); // Really only required for interrupt driven devices
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226 if (chan->out_cbuf.len != 0) {
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227 cyg_drv_interrupt_create(edb7xxx_chan->tx_int_num,
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228 99, // Priority - unused
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229 (cyg_addrword_t)chan, // Data item passed to interrupt handler
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230 edb7xxx_serial_tx_ISR,
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231 edb7xxx_serial_tx_DSR,
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232 &edb7xxx_chan->serial_tx_interrupt_handle,
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233 &edb7xxx_chan->serial_tx_interrupt);
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234 cyg_drv_interrupt_attach(edb7xxx_chan->serial_tx_interrupt_handle);
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235 cyg_drv_interrupt_mask(edb7xxx_chan->tx_int_num);
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236 edb7xxx_chan->tx_enabled = false;
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237 }
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238 if (chan->in_cbuf.len != 0) {
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239 cyg_drv_interrupt_create(edb7xxx_chan->rx_int_num,
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240 99, // Priority - unused
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241 (cyg_addrword_t)chan, // Data item passed to interrupt handler
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242 edb7xxx_serial_rx_ISR,
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243 edb7xxx_serial_rx_DSR,
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244 &edb7xxx_chan->serial_rx_interrupt_handle,
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245 &edb7xxx_chan->serial_rx_interrupt);
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246 cyg_drv_interrupt_attach(edb7xxx_chan->serial_rx_interrupt_handle);
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247 cyg_drv_interrupt_unmask(edb7xxx_chan->rx_int_num);
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248 }
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249 edb7xxx_serial_config_port(chan, &chan->config, true);
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250 return true;
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251 }
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252
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253 // This routine is called when the device is "looked" up (i.e. attached)
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254 static Cyg_ErrNo
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255 edb7xxx_serial_lookup(struct cyg_devtab_entry **tab,
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256 struct cyg_devtab_entry *sub_tab,
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257 const char *name)
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258 {
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259 serial_channel *chan = (serial_channel *)(*tab)->priv;
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260 (chan->callbacks->serial_init)(chan); // Really only required for interrupt driven devices
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261 return ENOERR;
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262 }
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263
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264 // Send a character to the device output buffer.
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265 // Return 'true' if character is sent to device
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266 static bool
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267 edb7xxx_serial_putc(serial_channel *chan, unsigned char c)
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268 {
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269 edb7xxx_serial_info *edb7xxx_chan = (edb7xxx_serial_info *)chan->dev_priv;
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270 volatile cyg_uint8 *data = (volatile cyg_uint8 *)edb7xxx_chan->data;
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271 volatile cyg_uint32 *stat = (volatile cyg_uint32 *)edb7xxx_chan->stat;
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272 if ((*stat & SYSFLG1_UTXFF1) == 0) {
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273 // Transmit buffer/FIFO is not full
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274 *data = c;
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275 return true;
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276 } else {
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277 // No space
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278 return false;
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279 }
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280 }
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281
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282 // Fetch a character from the device input buffer, waiting if necessary
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283 static unsigned char
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284 edb7xxx_serial_getc(serial_channel *chan)
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285 {
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286 unsigned char c;
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287 edb7xxx_serial_info *edb7xxx_chan = (edb7xxx_serial_info *)chan->dev_priv;
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288 volatile cyg_uint32 *data = (volatile cyg_uint32 *)edb7xxx_chan->data;
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289 volatile cyg_uint32 *stat = (volatile cyg_uint32 *)edb7xxx_chan->stat;
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290 while (*stat & SYSFLG1_URXFE1) ; // Wait for char
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291 c = *data;
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292 return c;
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293 }
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294
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295 // Set up the device characteristics; baud rate, etc.
115
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296 static Cyg_ErrNo
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297 edb7xxx_serial_set_config(serial_channel *chan, cyg_uint32 key,
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298 const void *xbuf, cyg_uint32 *len)
82
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299 {
115
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300 switch (key) {
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301 case CYG_IO_SET_CONFIG_SERIAL_INFO:
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302 {
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303 cyg_serial_info_t *config = (cyg_serial_info_t *)xbuf;
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304 if ( *len < sizeof(cyg_serial_info_t) ) {
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305 return -EINVAL;
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306 }
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307 *len = sizeof(cyg_serial_info_t);
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308 if ( true != edb7xxx_serial_config_port(chan, config, false) )
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309 return -EINVAL;
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310 }
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311 break;
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312 default:
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313 return -EINVAL;
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314 }
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315 return ENOERR;
82
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316 }
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317
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318 // Enable the transmitter (interrupt) on the device
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319 static void
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320 edb7xxx_serial_start_xmit(serial_channel *chan)
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321 {
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322 edb7xxx_serial_info *edb7xxx_chan = (edb7xxx_serial_info *)chan->dev_priv;
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323 edb7xxx_chan->tx_enabled = true;
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324 cyg_drv_interrupt_unmask(edb7xxx_chan->tx_int_num);
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325 }
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326
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327 // Disable the transmitter on the device
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328 static void
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329 edb7xxx_serial_stop_xmit(serial_channel *chan)
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330 {
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331 edb7xxx_serial_info *edb7xxx_chan = (edb7xxx_serial_info *)chan->dev_priv;
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332 cyg_drv_interrupt_mask(edb7xxx_chan->tx_int_num);
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333 edb7xxx_chan->tx_enabled = false;
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334 }
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335
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336 // Serial I/O - low level Tx interrupt handler (ISR)
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337 static cyg_uint32
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338 edb7xxx_serial_tx_ISR(cyg_vector_t vector, cyg_addrword_t data)
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339 {
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340 serial_channel *chan = (serial_channel *)data;
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341 edb7xxx_serial_info *edb7xxx_chan = (edb7xxx_serial_info *)chan->dev_priv;
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342 cyg_drv_interrupt_mask(edb7xxx_chan->tx_int_num);
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343 cyg_drv_interrupt_acknowledge(edb7xxx_chan->tx_int_num);
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344 return CYG_ISR_CALL_DSR; // Cause DSR to be run
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345 }
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346
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347 // Serial I/O - high level Tx interrupt handler (DSR)
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348 static void
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349 edb7xxx_serial_tx_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data)
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350 {
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351 serial_channel *chan = (serial_channel *)data;
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352 edb7xxx_serial_info *edb7xxx_chan = (edb7xxx_serial_info *)chan->dev_priv;
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353 (chan->callbacks->xmt_char)(chan);
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354 if (edb7xxx_chan->tx_enabled) {
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355 cyg_drv_interrupt_unmask(edb7xxx_chan->tx_int_num);
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356 }
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357 }
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358
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359 // Serial I/O - low level Rx interrupt handler (ISR)
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360 static cyg_uint32
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361 edb7xxx_serial_rx_ISR(cyg_vector_t vector, cyg_addrword_t data)
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362 {
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363 serial_channel *chan = (serial_channel *)data;
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364 edb7xxx_serial_info *edb7xxx_chan = (edb7xxx_serial_info *)chan->dev_priv;
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365 cyg_drv_interrupt_mask(edb7xxx_chan->rx_int_num);
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366 cyg_drv_interrupt_acknowledge(edb7xxx_chan->rx_int_num);
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367 return CYG_ISR_CALL_DSR; // Cause DSR to be run
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368 }
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369
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370 // Serial I/O - high level Rx interrupt handler (DSR)
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371 static void
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372 edb7xxx_serial_rx_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data)
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373 {
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374 serial_channel *chan = (serial_channel *)data;
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375 edb7xxx_serial_info *edb7xxx_chan = (edb7xxx_serial_info *)chan->dev_priv;
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376 volatile cyg_uint32 *datreg = (volatile cyg_uint32 *)edb7xxx_chan->data;
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377 volatile cyg_uint32 *stat = (volatile cyg_uint32 *)edb7xxx_chan->stat;
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378 while (!(*stat & SYSFLG1_URXFE1))
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379 (chan->callbacks->rcv_char)(chan, *datreg);
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380 cyg_drv_interrupt_unmask(edb7xxx_chan->rx_int_num);
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381 }
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382
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383 // Serial I/O - low level Ms interrupt handler (ISR)
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384 static cyg_uint32
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385 edb7xxx_serial_ms_ISR(cyg_vector_t vector, cyg_addrword_t data)
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386 {
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387 serial_channel *chan = (serial_channel *)data;
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388 edb7xxx_serial_info *edb7xxx_chan = (edb7xxx_serial_info *)chan->dev_priv;
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389 cyg_drv_interrupt_mask(edb7xxx_chan->ms_int_num);
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390 cyg_drv_interrupt_acknowledge(edb7xxx_chan->ms_int_num);
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391 return CYG_ISR_CALL_DSR; // Cause DSR to be run
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392 }
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393
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394 // Serial I/O - high level Ms interrupt handler (DSR)
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395 static void
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396 edb7xxx_serial_ms_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data)
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397 {
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398 }
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399 #endif // CYGPKG_IO_SERIAL_ARM_EDB7XXX
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400