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annotate packages/hal/powerpc/arch/current/include/hal_io.h @ 66:bf00f99aec69 ecos-sw-2000-02-02

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Merge from eCos master repository on 2000-02-02-19:16:44-GMT
author jlarmour
date Wed, 02 Feb 2000 19:57:02 +0000
parents c38311975d4f
children e0c0827131d1
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1 #ifndef CYGONCE_HAL_IO_H
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2 #define CYGONCE_HAL_IO_H
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3
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4 //=============================================================================
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5 //
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6 // hal_io.h
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7 //
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8 // HAL device IO register support.
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9 //
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10 //=============================================================================
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11 //####COPYRIGHTBEGIN####
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12 //
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13 // -------------------------------------------
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14 // The contents of this file are subject to the Red Hat eCos Public License
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15 // Version 1.1 (the "License"); you may not use this file except in
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16 // compliance with the License. You may obtain a copy of the License at
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17 // http://www.redhat.com/
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18 //
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19 // Software distributed under the License is distributed on an "AS IS"
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20 // basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the
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21 // License for the specific language governing rights and limitations under
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22 // the License.
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23 //
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24 // The Original Code is eCos - Embedded Configurable Operating System,
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25 // released September 30, 1998.
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26 //
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27 // The Initial Developer of the Original Code is Red Hat.
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28 // Portions created by Red Hat are
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29 // Copyright (C) 1998, 1999, 2000 Red Hat, Inc.
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30 // All Rights Reserved.
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31 // -------------------------------------------
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32 //
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33 //####COPYRIGHTEND####
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34 //=============================================================================
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35 //#####DESCRIPTIONBEGIN####
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36 //
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37 // Author(s): nickg
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38 // Contributors: nickg
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39 // Date: 1998-02-17
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40 // Purpose: Define IO register support
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41 // Description: The macros defined here provide the HAL APIs for handling
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42 // device IO control registers.
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43 //
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44 // Usage:
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45 // #include <cyg/hal/hal_io.h>
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46 // ...
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47 //
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48 //
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49 //####DESCRIPTIONEND####
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50 //
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51 //=============================================================================
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52
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53 #include <cyg/infra/cyg_type.h>
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54
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55 //-----------------------------------------------------------------------------
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56 // Enforce in-order IO for all HAL reads/writes using this macro.
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57 #define HAL_IO_BARRIER() \
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58 asm volatile ( "eieio" : : : "memory" )
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59
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60 //-----------------------------------------------------------------------------
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61 // IO Register address.
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62 // This type is for recording the address of an IO register.
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63
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64 typedef volatile CYG_ADDRWORD HAL_IO_REGISTER;
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65
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66 //-----------------------------------------------------------------------------
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67 // BYTE Register access.
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68 // Individual and vectorized access to 8 bit registers.
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69
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70 #define HAL_READ_UINT8( _register_, _value_ ) \
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71 CYG_MACRO_START \
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72 ((_value_) = *((volatile CYG_BYTE *)(_register_))); \
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73 HAL_IO_BARRIER (); \
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74 CYG_MACRO_END
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75
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76 #define HAL_WRITE_UINT8( _register_, _value_ ) \
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77 CYG_MACRO_START \
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78 (*((volatile CYG_BYTE *)(_register_)) = (_value_)); \
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79 HAL_IO_BARRIER (); \
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80 CYG_MACRO_END
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81
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82 #define HAL_READ_UINT8_VECTOR( _register_, _buf_, _count_, _step_ ) \
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83 CYG_MACRO_START \
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84 cyg_count32 _i_,_j_; \
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85 for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) { \
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86 (_buf_)[_i_] = ((volatile CYG_BYTE *)(_register_))[_j_]; \
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87 HAL_IO_BARRIER (); \
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88 } \
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89 CYG_MACRO_END
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90
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91 #define HAL_WRITE_UINT8_VECTOR( _register_, _buf_, _count_, _step_ ) \
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92 CYG_MACRO_START \
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93 cyg_count32 _i_,_j_; \
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94 for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) { \
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95 ((volatile CYG_BYTE *)(_register_))[_j_] = (_buf_)[_i_]; \
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96 HAL_IO_BARRIER (); \
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97 } \
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98 CYG_MACRO_END
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99
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100
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101 //-----------------------------------------------------------------------------
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102 // 16 bit access.
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103 // Individual and vectorized access to 16 bit registers.
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104
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105 #define HAL_READ_UINT16( _register_, _value_ ) \
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106 CYG_MACRO_START \
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107 ((_value_) = *((volatile CYG_WORD16 *)(_register_))); \
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108 HAL_IO_BARRIER (); \
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109 CYG_MACRO_END
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110
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111 #define HAL_WRITE_UINT16( _register_, _value_ ) \
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112 CYG_MACRO_START \
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113 (*((volatile CYG_WORD16 *)(_register_)) = (_value_)); \
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114 HAL_IO_BARRIER (); \
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115 CYG_MACRO_END
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116
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117 #define HAL_READ_UINT16_VECTOR( _register_, _buf_, _count_, _step_ ) \
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118 CYG_MACRO_START \
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119 cyg_count32 _i_,_j_; \
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120 for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) { \
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121 (_buf_)[_i_] = ((volatile CYG_WORD16 *)(_register_))[_j_]; \
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122 HAL_IO_BARRIER (); \
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123 } \
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124 CYG_MACRO_END
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125
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126 #define HAL_WRITE_UINT16_VECTOR( _register_, _buf_, _count_, _step_ ) \
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127 CYG_MACRO_START \
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128 cyg_count32 _i_,_j_; \
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129 for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) { \
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130 ((volatile CYG_WORD16 *)(_register_))[_j_] = (_buf_)[_i_]; \
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131 HAL_IO_BARRIER (); \
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132 } \
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133 CYG_MACRO_END
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134
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135 //-----------------------------------------------------------------------------
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136 // 32 bit access.
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137 // Individual and vectorized access to 32 bit registers.
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138
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139 #define HAL_READ_UINT32( _register_, _value_ ) \
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140 CYG_MACRO_START \
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141 ((_value_) = *((volatile CYG_WORD32 *)(_register_))); \
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142 HAL_IO_BARRIER (); \
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143 CYG_MACRO_END
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144
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145 #define HAL_WRITE_UINT32( _register_, _value_ ) \
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146 CYG_MACRO_START \
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147 (*((volatile CYG_WORD32 *)(_register_)) = (_value_)); \
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148 HAL_IO_BARRIER (); \
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149 CYG_MACRO_END
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150
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151 #define HAL_READ_UINT32_VECTOR( _register_, _buf_, _count_, _step_ ) \
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152 CYG_MACRO_START \
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153 cyg_count32 _i_,_j_; \
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154 for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) { \
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155 (_buf_)[_i_] = ((volatile CYG_WORD32 *)(_register_))[_j_]; \
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156 HAL_IO_BARRIER (); \
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157 } \
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158 CYG_MACRO_END
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159
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160 #define HAL_WRITE_UINT32_VECTOR( _register_, _buf_, _count_, _step_ ) \
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161 CYG_MACRO_START \
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162 cyg_count32 _i_,_j_; \
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163 for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) { \
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164 ((volatile CYG_WORD32 *)(_register_))[_j_] = (_buf_)[_i_]; \
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165 HAL_IO_BARRIER (); \
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166 } \
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167 CYG_MACRO_END
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168
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169 //-----------------------------------------------------------------------------
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170 #endif // ifndef CYGONCE_HAL_IO_H
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171 // End of hal_io.h