Mercurial > ecos-v2_0-branch
changeset 153:5e8f3b328bb3
Merge from eCos master repository on 2001-02-19-15:48:12-GMT
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--- a/host/tools/configtool/ChangeLog +++ b/host/tools/configtool/ChangeLog @@ -1,3 +1,9 @@ +2001-02-14 Julian Smart <julians@redhat.com> + + * standalone/win32/configtool.cpp + + Added support for Cygwin 00r1 when searching for registry hints. + 2000-08-15 Jonathan Larmour <jlarmour@redhat.co.uk> * common/win32/memmap.cpp (export_files): In header file, wrap parts
--- a/host/tools/configtool/standalone/win32/Configtool.cpp +++ b/host/tools/configtool/standalone/win32/Configtool.cpp @@ -359,18 +359,36 @@ void CConfigToolApp::LoadStdProfileSetti } } } - - GetRepositoryRegistryClues(m_arstrUserToolPaths, _T("GNUPro unsupported")); - for(i=0;i<m_arstrUserToolPaths.GetSize();i++){ - CFileName str(m_arstrUserToolPaths[i]); - str+="H-i686-cygwin32\\bin"; - if(str.IsDir()){ - m_arstrUserToolPaths.SetAt(i,str); - } else { - m_arstrUserToolPaths.RemoveAt(i); - i--; + + // Look for Cygwin 00r1 first, since it's the latest and greatest user tools. + GetRepositoryRegistryClues(m_arstrUserToolPaths, _T("Cygwin 00r1")); + if (m_arstrUserToolPaths.GetSize() > 0) + { + for(i=0;i<m_arstrUserToolPaths.GetSize();i++){ + CFileName str(m_arstrUserToolPaths[i]); + str+="H-i686-pc-cygwin\\bin"; + if(str.IsDir()){ + m_arstrUserToolPaths.SetAt(i,str); + } else { + m_arstrUserToolPaths.RemoveAt(i); + i--; + } } } + else + { + GetRepositoryRegistryClues(m_arstrUserToolPaths, _T("GNUPro unsupported")); + for(i=0;i<m_arstrUserToolPaths.GetSize();i++){ + CFileName str(m_arstrUserToolPaths[i]); + str+="H-i686-cygwin32\\bin"; + if(str.IsDir()){ + m_arstrUserToolPaths.SetAt(i,str); + } else { + m_arstrUserToolPaths.RemoveAt(i); + i--; + } + } + } // Include the path in the set of potential user paths {
--- a/packages/ChangeLog +++ b/packages/ChangeLog @@ -1575,7 +1575,7 @@ 1998-07-23 Bart Veer <bartv@cygnus.co. // // The Initial Developer of the Original Code is Red Hat. // Portions created by Red Hat are -// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. // All Rights Reserved. // ------------------------------------------- //
new file mode 100644 --- /dev/null +++ b/packages/devs/serial/arm/iq80310/current/ChangeLog @@ -0,0 +1,30 @@ +2000-10-25 Mark Salter <msalter@redhat.com> + + * include/arm_iq80310_ser.inl: Initial checkin. + * cdl/ser_arm_iq80310.cdl: Ditto. + +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//===========================================================================
new file mode 100644 --- /dev/null +++ b/packages/devs/serial/arm/iq80310/current/cdl/ser_arm_iq80310.cdl @@ -0,0 +1,188 @@ +# ==================================================================== +# +# ser_arm_iq80310.cdl +# +# eCos serial IQ80310 configuration data +# +# ==================================================================== +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Red Hat eCos Public License +# Version 1.1 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://www.redhat.com/ +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Configurable Operating System, +# released September 30, 1998. +# +# The Initial Developer of the Original Code is Red Hat. +# Portions created by Red Hat are +# Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +# All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +# ==================================================================== +######DESCRIPTIONBEGIN#### +# +# Author(s): msalter +# Original data: msalter +# Contributors: +# Date: 2000-10-10 +# +#####DESCRIPTIONEND#### +# +# ==================================================================== + + +cdl_package CYGPKG_IO_SERIAL_ARM_IQ80310 { + display "XScale IQ80310 serial device drivers" + + parent CYGPKG_IO_SERIAL_DEVICES + active_if CYGPKG_IO_SERIAL + active_if CYGPKG_HAL_ARM_IQ80310 + + requires CYGPKG_ERROR + include_dir cyg/io + + description " + This option enables the serial device drivers for the + IQ80310 evaluation board." + doc redirect/ecos-device-drivers.html + + # FIXME: This really belongs in the GENERIC_16X5X package + cdl_interface CYGINT_IO_SERIAL_GENERIC_16X5X_REQUIRED { + display "Generic 16x5x serial driver required" + } + define_proc { + puts $::cdl_header "#define CYGPRI_IO_SERIAL_GENERIC_16X5X_STEP 1" + } + + + define_proc { + puts $::cdl_system_header "/***** serial driver proc output start *****/" + puts $::cdl_system_header "#define CYGDAT_IO_SERIAL_GENERIC_16X5X_INL <cyg/io/arm_iq80310_ser.inl>" + puts $::cdl_system_header "#define CYGDAT_IO_SERIAL_GENERIC_16X5X_CFG <pkgconf/io_serial_arm_iq80310.h>" + puts $::cdl_system_header "/***** serial driver proc output end *****/" + } + + cdl_component CYGPKG_IO_SERIAL_ARM_IQ80310_SERIAL0 { + display "ARM IQ80310 serial port 0 driver" + flavor bool + default_value 1 + + implements CYGINT_IO_SERIAL_GENERIC_16X5X_REQUIRED + implements CYGINT_IO_SERIAL_FLOW_CONTROL_HW + implements CYGINT_IO_SERIAL_LINE_STATUS_HW + + description " + This option includes the serial device driver for the Cyclone + IQ80310 port 0." + + cdl_option CYGDAT_IO_SERIAL_ARM_IQ80310_SERIAL0_NAME { + display "Device name for IQ80310 serial port 0 driver" + flavor data + default_value {"\"/dev/ser0\""} + description " + This option specifies the name of the serial device + for the Cyclone IQ80310 port 0." + } + + cdl_option CYGNUM_IO_SERIAL_ARM_IQ80310_SERIAL0_BAUD { + display "Baud rate for the Cyclone IQ80310 serial port 0 driver" + flavor data + legal_values { 50 75 110 "134_5" 150 200 300 600 1200 1800 2400 + 3600 4800 7200 9600 14400 19200 38400 + 57600 115200 } + default_value 38400 + description " + This option specifies the default baud rate (speed) + for the Cyclone IQ80310 port 0." + } + + cdl_option CYGNUM_IO_SERIAL_ARM_IQ80310_SERIAL0_BUFSIZE { + display "Buffer size for the Cyclone IQ80310 serial port 0 driver" + flavor data + legal_values 0 to 8192 + default_value 128 + description " + This option specifies the size of the internal buffers + used for the Cyclone IQ80310 port 0." + } + } + + cdl_component CYGPKG_IO_SERIAL_ARM_IQ80310_SERIAL1 { + display "ARM IQ80310 serial port 1 driver" + flavor bool + default_value 1 + + implements CYGINT_IO_SERIAL_GENERIC_16X5X_REQUIRED + implements CYGINT_IO_SERIAL_FLOW_CONTROL_HW + implements CYGINT_IO_SERIAL_LINE_STATUS_HW + + description " + This option includes the serial device driver for the Cyclone + IQ80310 port 1." + + cdl_option CYGDAT_IO_SERIAL_ARM_IQ80310_SERIAL1_NAME { + display "Device name for IQ80310 serial port 1 driver" + flavor data + default_value {"\"/dev/ser1\""} + description " + This option specifies the name of the serial device + for the Cyclone IQ80310 port 1." + } + + cdl_option CYGNUM_IO_SERIAL_ARM_IQ80310_SERIAL1_BAUD { + display "Baud rate for the Cyclone IQ80310 serial port 1 driver" + flavor data + legal_values { 50 75 110 "134_5" 150 200 300 600 1200 1800 2400 + 3600 4800 7200 9600 14400 19200 38400 + 57600 115200 } + default_value 38400 + description " + This option specifies the default baud rate (speed) + for the Cyclone IQ80310 port 1." + } + + cdl_option CYGNUM_IO_SERIAL_ARM_IQ80310_SERIAL1_BUFSIZE { + display "Buffer size for the Cyclone IQ80310 serial port 1 driver" + flavor data + legal_values 0 to 8192 + default_value 128 + description " + This option specifies the size of the internal buffers + used for the Cyclone IQ80310 port 1." + } + } + + cdl_component CYGPKG_IO_SERIAL_ARM_IQ80310_TESTING { + display "Testing parameters" + flavor bool + calculated 1 + active_if CYGPKG_IO_SERIAL_ARM_IQ80310_SERIAL0 + + implements CYGINT_IO_SERIAL_TEST_SKIP_9600 + implements CYGINT_IO_SERIAL_TEST_SKIP_115200 + implements CYGINT_IO_SERIAL_TEST_SKIP_PARITY_EVEN + + cdl_option CYGPRI_SER_TEST_SER_DEV { + display "Serial device used for testing" + flavor data + default_value { CYGDAT_IO_SERIAL_ARM_IQ80310_SERIAL1_NAME } + } + + define_proc { + puts $::cdl_header "#define CYGPRI_SER_TEST_CRASH_ID \"iq80310\"" + puts $::cdl_header "#define CYGPRI_SER_TEST_TTY_DEV \"/dev/tty0\"" + } + } +} + +# EOF ser_arm_iq80310.cdl
new file mode 100644 --- /dev/null +++ b/packages/devs/serial/arm/iq80310/current/include/arm_iq80310_ser.inl @@ -0,0 +1,153 @@ +//========================================================================== +// +// io/serial/arm/arm_iq80310_ser.inl +// +// Cyclone IQ80310 Serial I/O definitions +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): msalter +// Contributors: msalter +// Date: 2000-10-10 +// Purpose: IQ80310 Serial I/O module (interrupt driven version) +// Description: +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include <cyg/hal/hal_intr.h> + +//----------------------------------------------------------------------------- +// Baud rate specification + +static unsigned short select_baud[] = { + 0, // Unused + 0, // 50 + 0, // 75 + 1047, // 110 + 0, // 134.5 + 768, // 150 + 0, // 200 + 384, // 300 + 192, // 600 + 96, // 1200 + 24, // 1800 + 48, // 2400 + 0, // 3600 + 24, // 4800 + 16, // 7200 + 12, // 9600 + 8, // 14400 + 6, // 19200 + 3, // 38400 + 2, // 57600 + 1, // 115200 +}; + +#ifdef CYGPKG_IO_SERIAL_ARM_IQ80310_SERIAL0 +static pc_serial_info iq80310_serial_info0 = {0xFE800000, + CYGNUM_HAL_INTERRUPT_SERIALA}; +#if CYGNUM_IO_SERIAL_ARM_IQ80310_SERIAL0_BUFSIZE > 0 +static unsigned char iq80310_serial_out_buf0[CYGNUM_IO_SERIAL_ARM_IQ80310_SERIAL0_BUFSIZE]; +static unsigned char iq80310_serial_in_buf0[CYGNUM_IO_SERIAL_ARM_IQ80310_SERIAL0_BUFSIZE]; + +static SERIAL_CHANNEL_USING_INTERRUPTS(iq80310_serial_channel0, + pc_serial_funs, + iq80310_serial_info0, + CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_ARM_IQ80310_SERIAL0_BAUD), + CYG_SERIAL_STOP_DEFAULT, + CYG_SERIAL_PARITY_DEFAULT, + CYG_SERIAL_WORD_LENGTH_DEFAULT, + CYG_SERIAL_FLAGS_DEFAULT, + &iq80310_serial_out_buf0[0], sizeof(iq80310_serial_out_buf0), + &iq80310_serial_in_buf0[0], sizeof(iq80310_serial_in_buf0) + ); +#else +static SERIAL_CHANNEL(iq80310_serial_channel0, + pc_serial_funs, + iq80310_serial_info0, + CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_ARM_IQ80310_SERIAL0_BAUD), + CYG_SERIAL_STOP_DEFAULT, + CYG_SERIAL_PARITY_DEFAULT, + CYG_SERIAL_WORD_LENGTH_DEFAULT, + CYG_SERIAL_FLAGS_DEFAULT + ); +#endif + +DEVTAB_ENTRY(iq80310_serial_io0, + CYGDAT_IO_SERIAL_ARM_IQ80310_SERIAL0_NAME, + 0, // Does not depend on a lower level interface + &cyg_io_serial_devio, + pc_serial_init, + pc_serial_lookup, // Serial driver may need initializing + &iq80310_serial_channel0 + ); +#endif // CYGPKG_IO_SERIAL_ARM_IQ80310_SERIAL0 + +#ifdef CYGPKG_IO_SERIAL_ARM_IQ80310_SERIAL1 +static pc_serial_info iq80310_serial_info1 = {0xFE810000, + CYGNUM_HAL_INTERRUPT_SERIALB}; +#if CYGNUM_IO_SERIAL_ARM_IQ80310_SERIAL1_BUFSIZE > 0 +static unsigned char iq80310_serial_out_buf1[CYGNUM_IO_SERIAL_ARM_IQ80310_SERIAL1_BUFSIZE]; +static unsigned char iq80310_serial_in_buf1[CYGNUM_IO_SERIAL_ARM_IQ80310_SERIAL1_BUFSIZE]; + +static SERIAL_CHANNEL_USING_INTERRUPTS(iq80310_serial_channel1, + pc_serial_funs, + iq80310_serial_info1, + CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_ARM_IQ80310_SERIAL1_BAUD), + CYG_SERIAL_STOP_DEFAULT, + CYG_SERIAL_PARITY_DEFAULT, + CYG_SERIAL_WORD_LENGTH_DEFAULT, + CYG_SERIAL_FLAGS_DEFAULT, + &iq80310_serial_out_buf1[0], sizeof(iq80310_serial_out_buf1), + &iq80310_serial_in_buf1[0], sizeof(iq80310_serial_in_buf1) + ); +#else +static SERIAL_CHANNEL(iq80310_serial_channel1, + pc_serial_funs, + iq80310_serial_info1, + CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_ARM_IQ80310_SERIAL1_BAUD), + CYG_SERIAL_STOP_DEFAULT, + CYG_SERIAL_PARITY_DEFAULT, + CYG_SERIAL_WORD_LENGTH_DEFAULT, + CYG_SERIAL_FLAGS_DEFAULT + ); +#endif + +DEVTAB_ENTRY(iq80310_serial_io1, + CYGDAT_IO_SERIAL_ARM_IQ80310_SERIAL1_NAME, + 0, // Does not depend on a lower level interface + &cyg_io_serial_devio, + pc_serial_init, + pc_serial_lookup, // Serial driver may need initializing + &iq80310_serial_channel1 + ); +#endif // CYGPKG_IO_SERIAL_ARM_IQ80310_SERIAL1 + +// EOF arm_iq80310_ser.inl
--- a/packages/ecos.db +++ b/packages/ecos.db @@ -25,7 +25,7 @@ # # The Initial Developer of the Original Code is Red Hat. # Portions created by Red Hat are -# Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +# Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. # All Rights Reserved. # ------------------------------------------- #
--- a/packages/hal/arm/iq80310/current/src/diag/pci_bios.h +++ b/packages/hal/arm/iq80310/current/src/diag/pci_bios.h @@ -45,9 +45,9 @@ /* Use: mon960 */ /* */ /* $Source: /dev/shm/cvs2hg/cvs/ecos/packages/hal/arm/iq80310/current/src/diag/Attic/pci_bios.h,v $ */ -/* $Revision: 1.1 $ */ +/* $Revision: 1.2 $ */ /* Last $Author: jlarmour $ */ -/* $Date: 2001/02/15 18:18:15 $ */ +/* $Date: 2001/02/19 17:27:11 $ */ /* */ /* Purpose: PCI BIOS Routines */ /* */
--- a/packages/hal/mips/arch/current/ChangeLog +++ b/packages/hal/mips/arch/current/ChangeLog @@ -1,3 +1,8 @@ +2001-02-15 Nick Garnett <nickg@cygnus.co.uk> + + * src/hal_misc.c: Added option to call hal_ctrlc_isr() in default + ISR when in RedBoot. + 2001-02-12 Nick Garnett <nickg@cygnus.co.uk> * include/mips.inc: Added some extra CP0 register names. @@ -5,6 +10,131 @@ 2001-02-12 Nick Garnett <nickg@cygnus. 2001-02-09 Jesper Skov <jskov@redhat.com> * src/vectors.S: Small tweak of comments to work around tools problem + +2001-01-31 Nick Garnett <nickg@cygnus.co.uk> + + * include/mips-stub.h: Added prototypes for __is_bsp_syscall() and + hal_syscall_handler(). + + * include/hal_arch.h: + Reorganized HAL_SavedRegisters structure to work properly with a + 64 bit processor. Fields are now correctly sized, and aligned on + the right boundaries. + + * include/arch.inc: + Added option for variant and platform to supply extra bits to be + added to INITIAL_SR. + Reorganized register save area layout to match changes in + hal_arch.h. + Added macros sva, lva, mvatc0, mvafc0 to transfer 64 bit items to + and from memory/CP0 (*va* is used because most such values are + (virtual) addresses). + + * src/vectors.S: Added use of *va* macros where appropriate. + + * src/mips-stub.c: Added __is_bsp_syscall() function. + + * src/hal_syscall.c: Added this file to support GNUPro system + calls in RedBoot. + + * cdl/hal_mips.cdl: Added hal_syscall.c to compile list. + +2001-01-26 Jesper Skov <jskov@redhat.com> + + * include/hal_intr.h: Added extern for hal_delay_us. + +2001-01-26 Jesper Skov <jskov@redhat.com> + + * include/variant.inc: Make hal_intc_decode macro mask the cause + register with the status (interrupt mask) register. + +2001-01-25 Jesper Skov <jskov@redhat.com> + + * include/arch.inc: Allow hal_intc_decode to be defined by variant + or platform. + +2000-12-06 Jesper Skov <jskov@redhat.com> + + * include/hal_intr.h (HAL_DELAY_US): Added. + * src/hal_misc.c (hal_delay_us): Added. And fixed to work with an + incrementer that ticks at the pipeline clock rate. + +2000-12-05 Jonathan Larmour <jlarmour@redhat.com> + + * include/hal_cache.h: IWAY->_IWAY, DWAY->_DWAY for namespace + cleanliness + +2000-12-05 Jesper Skov <jskov@redhat.com> + + * include/hal_cache.h: Use variant specific method to select cache + WAY. + +2000-10-20 Jesper Skov <jskov@redhat.com> + + * src/hal_misc.c: Update __mem_fault_handler declaration. + +2000-09-15 Jesper Skov <jskov@redhat.com> + + * include/hal_intr.h (HAL_DEFAULT_ISR): Fix warning. + (HAL_DEFAULT_ISR): Undo that change. + +2000-09-14 Jesper Skov <jskov@redhat.com> + + * include/hal_intr.h: Only define _FPE when there's a FPU. + +2000-09-13 Jesper Skov <jskov@redhat.com> + + * include/hal_intr.h (HAL_VSR_SET_TO_ECOS_HANDLER): Fix compiler + warning. + + * src/vectors.S: Fully decode TLB related exceptions. + * src/hal_misc.c (cyg_hal_exception_handler): Undid below change. + + * src/hal_misc.c (cyg_hal_exception_handler): Base vector + calculation on cause register, not the provided vector value. + +2000-09-12 Jesper Skov <jskov@redhat.com> + + * include/hal_intr.h: Added definition for decoded FPU + exceptions. + + * src/hal_misc.c (cyg_hal_exception_handler): Decode FPU + exceptions. + +2000-09-07 Jesper Skov <jskov@redhat.com> + + * include/basetype.h: Removed change from yesterday. + + * include/hal_intr.h (CYGNUM_HAL_EXCEPTION_FPU): Associated to FPE + exceptions. + +2000-09-06 Jesper Skov <jskov@redhat.com> + + * include/basetype.h: Override the alignment macros for the MIPS + architecture. The MIPS compiler only alows a maximum of 4 bytes + of alignment where as the default is 8 + + * include/hal_cache.h (_HAL_ASM_DCACHE_ALL_WAYS): Force d-cache + selection. + +2000-09-01 Jonathan Larmour <jlarmour@redhat.com> + + * include/mips-stub.h: No longer need to define + CYGARC_REGSIZE_DIFFERS_FROM_TARGET_REGISTER_T + (CYGARC_SIGN_EXTEND_REGISTERS): + + * include/mips-stub.h: Change vr4300 register sizes to use 32-bit + target_register_t, and tell the generic stub to use sign extension. + Ditto for tx49 + * include/hal_cache.h (_HAL_ASM_SET_MIPS_ISA): Don't use pasting + when it doesn't result in a preprocessing token. Just use string + concatenation. + +2000-07-21 Drew Moseley <dmoseley@redhat.com> + + * src/vectors.S: Only jump uncached to _start if + CYGARC_START_FUNC_UNCACHED is defined. + 2000-07-14 Drew Moseley <dmoseley@redhat.com> * src/vectors.S: Added hal_reset_vector_first_code and
--- a/packages/hal/mips/arch/current/src/hal_misc.c +++ b/packages/hal/mips/arch/current/src/hal_misc.c @@ -221,6 +221,10 @@ externC cyg_uint32 hal_arch_default_isr( #endif // def CYGSEM_HAL_USE_ROM_MONITOR_CygMon #endif +#ifdef CYGPKG_REDBOOT + hal_ctrlc_isr( vector, data ); +#endif + return 0; }
--- a/packages/language/c/libc/stdlib/current/ChangeLog +++ b/packages/language/c/libc/stdlib/current/ChangeLog @@ -1,3 +1,7 @@ +2001-02-14 Jonathan Larmour <jlarmour@redhat.com> + + * src/rand.cxx: Fix typo + 2000-08-03 Jonathan Larmour <jlarmour@redhat.co.uk> * src/getenv.cxx: Revert nickg's change of 2000-06-07. environ is
--- a/packages/language/c/libc/stdlib/current/src/rand.cxx +++ b/packages/language/c/libc/stdlib/current/src/rand.cxx @@ -78,7 +78,7 @@ static int rand_trace = CYGNUM_LIBC_RAND #ifdef CYGSEM_LIBC_PER_THREAD_RAND static cyg_ucount32 rand_data_index=CYGNUM_KERNEL_THREADS_DATA_MAX; -static Cyg_Mutex rand_data_mutex CYGBLD_ATTRIB_INIT_PRIORITY(CYG_INIT_LIBC); +static Cyg_Mutex rand_data_mutex CYGBLD_ATTRIB_INIT_PRI(CYG_INIT_LIBC); #else static unsigned int cyg_libc_rand_seed = CYGNUM_LIBC_RAND_SEED; #endif
--- a/packages/redboot/current/ChangeLog +++ b/packages/redboot/current/ChangeLog @@ -1,3 +1,14 @@ +2001-02-16 Nick Garnett <nickg@cygnus.co.uk> + + * src/flash.c (load_flash_config): Move setting of config_ok to + true to before we look for a script to run. Otherwise scripts just + don't work. + +2001-02-14 Hugo Tyson <hmt@redhat.com> + + * src/load.c (do_load): Wrap the help message at < 80 cols and fix + a coupla warnings. + 2001-02-13 Hugo Tyson <hmt@redhat.com> * src/flash.c: Fix token/string pasting thinko: ## operators are
--- a/packages/redboot/current/src/flash.c +++ b/packages/redboot/current/src/flash.c @@ -1327,12 +1327,12 @@ load_flash_config(void) config_init(); return; } + config_ok = true; flash_get_config("boot_script", &use_boot_script, CONFIG_BOOL); if (use_boot_script) { flash_get_config("boot_script_data", &script, CONFIG_SCRIPT); flash_get_config("boot_script_timeout", &script_timeout, CONFIG_INT); } - config_ok = true; } RedBoot_init(load_flash_config, RedBoot_INIT_FIRST);
--- a/packages/redboot/current/src/load.c +++ b/packages/redboot/current/src/load.c @@ -49,7 +49,8 @@ // Buffer used by redboot_getc getc_info_t getc_info; -static char usage[] = "[-r] [-v] [-h <host>] [-m {TFTP | xyzMODEM}] [-b <base_address>] <file_name>"; +static char usage[] = "[-r] [-v] [-h <host>] [-m {TFTP | xyzMODEM}]\r\n" +" [-b <base_address>] <file_name>"; // Exported CLI function RedBoot_cmd("load", @@ -338,7 +339,9 @@ do_load(int argc, char *argv[]) printf("usage: load %s\n", usage); return; } - if (base_addr_set && ((base < ram_start) || (base > ram_end))) { + if (base_addr_set && + ((base < (unsigned long)ram_start) || + (base > (unsigned long)ram_end))) { printf("Specified address (%p) is not in RAM.\n", (void*)base); return; }