changeset 58:6e51d764f8f1 ecos-sw-1999-12-10

Merge from eCos master repository on 1999-12-10-07:47:04-GMT
author jlarmour
date Fri, 10 Dec 1999 15:30:44 +0000
parents 09b0e59c9997
children 19ba0f558903
files packages/ChangeLog packages/hal/arm/arch/current/ChangeLog packages/hal/arm/arch/current/src/arm.ld packages/hal/arm/arch/current/src/vectors.S packages/hal/arm/cma230/current/ChangeLog packages/hal/arm/cma230/current/include/hal_cache.h packages/hal/arm/cma230/current/include/hal_platform_extras.h packages/hal/arm/cma230/current/include/pkgconf/mlt_arm_cma222_ram.h packages/hal/arm/cma230/current/include/pkgconf/mlt_arm_cma222_ram.ldi packages/hal/arm/cma230/current/include/pkgconf/mlt_arm_cma222_ram.mlt packages/hal/arm/cma230/current/include/pkgconf/mlt_arm_cma222_rom.h packages/hal/arm/cma230/current/include/pkgconf/mlt_arm_cma222_rom.ldi packages/hal/arm/cma230/current/include/pkgconf/mlt_arm_cma222_rom.mlt packages/hal/arm/cma230/current/include/pkgconf/mlt_arm_cma222_stubs.h packages/hal/arm/cma230/current/include/pkgconf/mlt_arm_cma222_stubs.ldi packages/hal/arm/cma230/current/include/pkgconf/mlt_arm_cma222_stubs.mlt packages/hal/arm/pid/current/ChangeLog packages/hal/arm/pid/current/include/pkgconf/hal_arm_pid.h packages/hal/arm/pid/current/misc/prog_flash.c packages/io/serial/current/ChangeLog packages/io/serial/current/src/arm/pid_serial_with_ints.c packages/targets
diffstat 22 files changed, 579 insertions(+), 27 deletions(-) [+]
line wrap: on
line diff
--- a/packages/ChangeLog
+++ b/packages/ChangeLog
@@ -1,3 +1,7 @@
+1999-12-02  Mark Salter  <msalter@cygnus.com>
+
+	* targets: Added cma222 platform.
+
 1999-11-16  Gary Thomas  <gthomas@cygnus.co.uk>
 
 	* targets: Add aliases for Cirrus Logic platforms.
--- a/packages/hal/arm/arch/current/ChangeLog
+++ b/packages/hal/arm/arch/current/ChangeLog
@@ -1,3 +1,14 @@
+1999-12-08  Gary Thomas  <gthomas@cygnus.co.uk>
+
+	* src/arm.ld: Add ".sram" section support (used by platforms
+	that have separate SRAM and DRAM).
+
+1999-12-06  Gary Thomas  <gthomas@cygnus.co.uk>
+
+	* src/vectors.S (software_interrupt): Context save was incorrect
+	for this mode.  Note that when entering from supervisor mode, the
+	link register (LR) is destroyed.
+
 1999-11-22  Gary Thomas  <gthomas@cygnus.co.uk>
 
 	* src/arm.ld: Add section for definining static MMU tables.
--- a/packages/hal/arm/arch/current/src/arm.ld
+++ b/packages/hal/arm/arch/current/src/arm.ld
@@ -119,6 +119,11 @@ OUTPUT_FORMAT(elf32-bigarm)
     { FORCE_OUTPUT; *(.mmu_tables) } \
     > _region_
 
+#define SECTION_sram(_region_, _vma_, _lma_) \
+    .sram _vma_ : _lma_ \
+    { FORCE_OUTPUT; *(.sram) } \
+    > _region_
+
 #define SECTION_data(_region_,  _vma_, _lma_) \
     .data _vma_ : _lma_ \
     { __ram_data_start = ABSOLUTE (.); *(.data*) *(.data1) MERGE_IN_RODATA \
--- a/packages/hal/arm/arch/current/src/vectors.S
+++ b/packages/hal/arm/arch/current/src/vectors.S
@@ -384,28 +384,15 @@ 10:
 
 	.code	32
 software_interrupt:
-	ldr	sp,.__startup_stack	// get good stack
-	stmfd	sp!,{r0,ip,lr}		
-	mrs	r0,spsr
-	stmfd	sp!,{r0}
-	mov	ip,sp			// save SP which will vanish with
-                                        //   mode switch
-	mrs	r0,cpsr			// switch to Supervisor Mode
-	bic	r0,r0,#CPSR_MODE_BITS
-	orr	r0,r0,#CPSR_SUPERVISOR_MODE
-	msr	cpsr,r0			// sp,lr are now old values
-	mov	ip,sp
-	ldr	sp,.__startup_stack	// get good stack
 	sub	sp,sp,#ARMREG_SIZE+16	// make space for frame
 	stmea	sp,{r0-r10,fp}		// save immediately visible registers
-	ldmfd	ip,{r0-r3}		// saved registers
-	sub	r3,r3,#4		// PC at time of interrupt
+	mrs	r0,spsr
+	sub	r3,lr,#4		// PC at time of interrupt
 	str	r0,[sp,#armreg_cpsr]	// CPSR at time of interrupt
-	str	r1,[sp,#armreg_r0]	// saved R0
-	str	r2,[sp,#armreg_ip]	// saved IP
+	str	ip,[sp,#armreg_ip]	// saved IP
 	str	r3,[sp,#armreg_pc]	// PC at time of interrupt
 	str	lr,[sp,#armreg_lr]	// LR at time of interrupt
-	add	r0,ip,#ARMREG_SIZE
+	add	r0,sp,#ARMREG_SIZE+16
 	str	r0,[sp,#armreg_sp]	// SP at time of interrupt
 #ifdef  CYGHWR_HAL_ARM_DUMP_EXCEPTIONS
 	mov	r0,sp
--- a/packages/hal/arm/cma230/current/ChangeLog
+++ b/packages/hal/arm/cma230/current/ChangeLog
@@ -1,3 +1,9 @@
+1999-12-02  Mark Salter  <msalter@cygnus.com>
+
+	* include/hal_platform_setup.h: Add support for CMA222 (ARM710T).
+	* include/hal_cache.h: Add support for unified CMA222 caches.
+	* include/hal_platform_extras.h: New file with static MMU tables.
+
 1999-11-25  Jonathan Larmour  <jlarmour@cygnus.co.uk>
 
 	* src/hal_diag.c: Conditionalize def of diag_buffer for only when it's
--- a/packages/hal/arm/cma230/current/include/hal_cache.h
+++ b/packages/hal/arm/cma230/current/include/hal_cache.h
@@ -33,7 +33,7 @@
 //#####DESCRIPTIONBEGIN####
 //
 // Author(s):   nickg, gthomas
-// Contributors:        nickg, gthomas
+// Contributors:        nickg, gthomas, msalter
 // Date:        1998-09-28
 // Purpose:     Cache control API
 // Description: The macros defined here provide the HAL APIs for handling
@@ -49,6 +49,170 @@
 
 #include <cyg/infra/cyg_type.h>
 
+#ifdef __CMA222
+//-----------------------------------------------------------------------------
+// Cache dimensions
+
+#define HAL_UCACHE_SIZE                 0x2000   // Size of data cache in bytes
+#define HAL_UCACHE_LINE_SIZE            16       // Size of a data cache line
+#define HAL_UCACHE_WAYS                 4        // Associativity of the cache
+#define HAL_UCACHE_SETS (HAL_UCACHE_SIZE/(HAL_UCACHE_LINE_SIZE*HAL_UCACHE_WAYS))
+
+#define HAL_CACHE_UNIFIED   // Let programs know the caches are combined
+
+//-----------------------------------------------------------------------------
+// Global control of caches
+
+// Note: the 'mrc' doesn't seem to work.
+#if 0
+// Enable the data cache
+//    mrc  MMU_CP,0,r1,MMU_Control,c0
+//    orr  r1,r1,#MMU_Control_C|MMU_Control_B
+//    mcr  MMU_CP,0,r1,MMU_Control,c0    
+
+#define HAL_UCACHE_ENABLE()                     \
+{                                               \
+    asm volatile ("mrc  p15,0,r1,c1,c0;"        \
+                  "orr  r1,r1,#0x000C;"         \
+                  "mcr  p15,0,r1,c1,c0;"        \
+                  :                             \
+                  :                             \
+                  : "r1" /* Clobber list */     \
+        );                                      \
+                                                \
+}
+
+// Disable the data cache
+#define HAL_UCACHE_DISABLE()                     \
+{                                               \
+    asm volatile ("mrc  p15,0,r1,c1,c0;"        \
+                  "bic  r1,r1,#0x000C;"         \
+                  "mcr  p15,0,r1,c1,c0;"        \
+                  :                             \
+                  :                             \
+                  : "r1" /* Clobber list */     \
+        );                                      \
+                                                \
+}
+#else
+#define HAL_UCACHE_ENABLE()                     \
+{                                               \
+    asm volatile ("mov  r1,#0x7D;"              \
+                  "mcr  p15,0,r1,c1,c0;"        \
+                  :                             \
+                  :                             \
+                  : "r1" /* Clobber list */     \
+        );                                      \
+                                                \
+}
+
+// Disable the data cache
+#define HAL_UCACHE_DISABLE()                    \
+{                                               \
+    asm volatile ("mov  r1,#0x71;"              \
+                  "mcr  p15,0,r1,c1,c0;"        \
+                  :                             \
+                  :                             \
+                  : "r1" /* Clobber list */     \
+        );                                      \
+                                                \
+}
+#endif
+
+// Is the cache turned on?
+#define HAL_UCACHE_IS_ENABLED(_state_) _state_ = 1;
+
+// Invalidate the entire cache
+//    mcr  MMU_CP,0,r1,MMU_InvalidateCache,c0
+#define HAL_UCACHE_INVALIDATE_ALL()                             \
+{                                                               \
+    asm volatile ("mcr p15,0,r1,c7,c0,0;" );                      \
+                                                                \
+}
+
+// Synchronize the contents of the cache with memory.
+#define HAL_UCACHE_SYNC()                                               \
+{                                                                       \
+    cyg_uint32 *ROM = (cyg_uint32 *)0xE0000000;                         \
+    int i;                                                              \
+    volatile cyg_uint32 val;                                            \
+    for (i = 0;  i < HAL_UCACHE_SETS;  i++) {                           \
+        val = *ROM;                                                     \
+        ROM += HAL_UCACHE_LINE_SIZE;                                    \
+    }                                                                   \
+}
+
+// Purge contents of data cache
+#define HAL_UCACHE_PURGE_ALL()  HAL_UCACHE_INVALIDATE_ALL()
+
+//-----------------------------------------------------------------------------
+// Data cache line control
+
+// Write dirty cache lines to memory and invalidate the cache entries
+// for the given address range.
+#define HAL_UCACHE_FLUSH( _base_ , _size_ )  HAL_UCACHE_SYNC()
+
+// Write dirty cache lines to memory for the given address range.
+#define HAL_UCACHE_STORE( _base_ , _size_ )  HAL_UCACHE_SYNC()
+
+#endif // ifdef __CMA222
+
+#ifdef HAL_CACHE_UNIFIED
+//-----------------------------------------------------------------------------
+// Global control of data cache
+
+#define HAL_DCACHE_SIZE                 HAL_UCACHE_SIZE
+#define HAL_DCACHE_LINE_SIZE            HAL_UCACHE_LINE_SIZE
+#define HAL_DCACHE_WAYS                 HAL_UCACHE_WAYS
+#define HAL_DCACHE_SETS                 HAL_UCACHE_SETS
+
+// Enable the data cache
+#define HAL_DCACHE_ENABLE()             HAL_UCACHE_ENABLE()
+
+// Disable the data cache
+#define HAL_DCACHE_DISABLE()            HAL_UCACHE_DISABLE()
+
+// Invalidate the entire cache
+#define HAL_DCACHE_INVALIDATE_ALL()     HAL_UCACHE_INVALIDATE_ALL()
+
+// Synchronize the contents of the cache with memory.
+#define HAL_DCACHE_SYNC()               HAL_UCACHE_SYNC()
+
+// Query the state of the data cache
+#define HAL_DCACHE_IS_ENABLED(_state_)  HAL_UCACHE_IS_ENABLED(_state_)
+
+//-----------------------------------------------------------------------------
+// Data cache line control
+
+// Write dirty cache lines to memory and invalidate the cache entries
+// for the given address range.
+#define HAL_DCACHE_FLUSH( _base_ , _size_ )  HAL_UCACHE_FLUSH( _base_ , _size_ )
+
+// Write dirty cache lines to memory for the given address range.
+#define HAL_DCACHE_STORE( _base_ , _size_ )  HAL_UCACHE_STORE( _base_ , _size_ )
+
+//-----------------------------------------------------------------------------
+// Global control of Instruction cache - use Data cache controls since they
+// are not separatable.
+
+#define HAL_ICACHE_SIZE                 HAL_UCACHE_SIZE
+#define HAL_ICACHE_LINE_SIZE            HAL_UCACHE_LINE_SIZE
+#define HAL_ICACHE_WAYS                 HAL_UCACHE_WAYS
+#define HAL_ICACHE_SETS                 HAL_UCACHE_SETS
+
+// Enable the instruction cache
+#define HAL_ICACHE_ENABLE()      HAL_UCACHE_ENABLE()
+
+// Disable the instruction cache
+#define HAL_ICACHE_DISABLE()     HAL_UCACHE_DISABLE()
+
+// Invalidate the entire cache
+#define HAL_ICACHE_INVALIDATE_ALL()  HAL_UCACHE_INVALIDATE_ALL()
+
+// Synchronize the contents of the cache with memory.
+#define HAL_ICACHE_SYNC()        HAL_UCACHE_SYNC()
+
+#else
 //-----------------------------------------------------------------------------
 // Cache dimensions
 
@@ -65,6 +229,7 @@
 #define HAL_DCACHE_SETS (HAL_DCACHE_SIZE/(HAL_DCACHE_LINE_SIZE*HAL_DCACHE_WAYS))
 #define HAL_ICACHE_SETS (HAL_ICACHE_SIZE/(HAL_ICACHE_LINE_SIZE*HAL_ICACHE_WAYS))
 
+
 //-----------------------------------------------------------------------------
 // Global control of data cache
 
@@ -165,5 +330,6 @@
 //#define HAL_ICACHE_INVALIDATE( _base_ , _size_ )
 
 //-----------------------------------------------------------------------------
+#endif // ifndef HAL_CACHE_UNIFIED
 #endif // ifndef CYGONCE_HAL_CACHE_H
 // End of hal_cache.h
new file mode 100644
--- /dev/null
+++ b/packages/hal/arm/cma230/current/include/hal_platform_extras.h
@@ -0,0 +1,154 @@
+#ifndef CYGONCE_HAL_PLATFORM_EXTRAS_H
+#define CYGONCE_HAL_PLATFORM_EXTRAS_H
+
+/*=============================================================================
+//
+//      hal_platform_extras.h
+//
+//      Platform specific support for HAL (assembly code)
+//
+//=============================================================================
+//####COPYRIGHTBEGIN####
+//
+// -------------------------------------------
+// The contents of this file are subject to the Cygnus eCos Public License
+// Version 1.0 (the "License"); you may not use this file except in
+// compliance with the License.  You may obtain a copy of the License at
+// http://sourceware.cygnus.com/ecos
+// 
+// Software distributed under the License is distributed on an "AS IS"
+// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied.  See the
+// License for the specific language governing rights and limitations under
+// the License.
+// 
+// The Original Code is eCos - Embedded Cygnus Operating System, released
+// September 30, 1998.
+// 
+// The Initial Developer of the Original Code is Cygnus.  Portions created
+// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions.  All Rights Reserved.
+// -------------------------------------------
+//
+//####COPYRIGHTEND####
+//=============================================================================
+//#####DESCRIPTIONBEGIN####
+//
+// Author(s):    gthomas
+// Contributors: gthomas, msalter
+// Date:         1999-12-02
+// Purpose:      Cogent CMA222 platform extras, in particular MMU tables
+// Description: 
+// Usage:       #include <cyg/hal/hal_platform_extras.h>
+//
+//####DESCRIPTIONEND####
+//
+//===========================================================================*/
+
+        .section ".mmu_tables","aw"
+
+#define NEXT_PAGE                \
+        .long   PTE                     ; \
+        .set    PTE,PTE+MMU_PAGE_SIZE
+
+_PT_0x0:
+        .set    PTE,DRAM_PA_START|MMU_L2_TYPE_Small\
+                    |MMU_AP_Any|MMU_Bufferable|MMU_Cacheable
+        .rept   (0x2000000)/0x1000
+        NEXT_PAGE
+        .endr
+        .balign 0x0400
+
+// Too bad these macros don't work ['as' bug?] :-(
+
+#define NEXT_SECTION                                            \
+        .long   PTE+OFF                                        ;\
+        .set    OFF,OFF+(MMU_SECTION_SIZE/MMU_PAGE_SIZE)*4
+
+#define FILL_SEGMENT_(base)                     \
+        .set    PTE,base                        \
+        .set    OFF,0x00000000                  \
+        .rept   0x10000000/MMU_SECTION_SIZE     \
+            NEXT_SECTION                        \
+        .endr
+
+#define OFF     ((MMU_SECTION_SIZE/MMU_PAGE_SIZE)*4)
+
+#define FILL_8M_SEGMENT(base,seg)               \
+        .long   base+(OFF*(seg+0x00));          \
+        .long   base+(OFF*(seg+0x01));          \
+        .long   base+(OFF*(seg+0x02));          \
+        .long   base+(OFF*(seg+0x03));          \
+        .long   base+(OFF*(seg+0x04));          \
+        .long   base+(OFF*(seg+0x05));          \
+        .long   base+(OFF*(seg+0x06));          \
+        .long   base+(OFF*(seg+0x07));          \
+        .long   base+(OFF*(seg+0x08));
+
+#define FILL_16M_SEGMENT(base,seg)              \
+        .long   base+(OFF*(seg+0x00));          \
+        .long   base+(OFF*(seg+0x01));          \
+        .long   base+(OFF*(seg+0x02));          \
+        .long   base+(OFF*(seg+0x03));          \
+        .long   base+(OFF*(seg+0x04));          \
+        .long   base+(OFF*(seg+0x05));          \
+        .long   base+(OFF*(seg+0x06));          \
+        .long   base+(OFF*(seg+0x07));          \
+        .long   base+(OFF*(seg+0x08));          \
+        .long   base+(OFF*(seg+0x09));          \
+        .long   base+(OFF*(seg+0x0A));          \
+        .long   base+(OFF*(seg+0x0B));          \
+        .long   base+(OFF*(seg+0x0C));          \
+        .long   base+(OFF*(seg+0x0D));          \
+        .long   base+(OFF*(seg+0x0E));          \
+        .long   base+(OFF*(seg+0x0F));
+
+#define FILL_32M_SEGMENT(base,seg)              \
+        FILL_16M_SEGMENT(base,0x00);            \
+        FILL_16M_SEGMENT(base,0x10);
+
+#define FILL_256M_SEGMENT(base)                 \
+        FILL_16M_SEGMENT(base,0x00);            \
+        FILL_16M_SEGMENT(base,0x10);            \
+        FILL_16M_SEGMENT(base,0x20);            \
+        FILL_16M_SEGMENT(base,0x30);            \
+        FILL_16M_SEGMENT(base,0x40);            \
+        FILL_16M_SEGMENT(base,0x50);            \
+        FILL_16M_SEGMENT(base,0x60);            \
+        FILL_16M_SEGMENT(base,0x70);            \
+        FILL_16M_SEGMENT(base,0x80);            \
+        FILL_16M_SEGMENT(base,0x90);            \
+        FILL_16M_SEGMENT(base,0xA0);            \
+        FILL_16M_SEGMENT(base,0xB0);            \
+        FILL_16M_SEGMENT(base,0xC0);            \
+        FILL_16M_SEGMENT(base,0xD0);            \
+        FILL_16M_SEGMENT(base,0xE0);            \
+        FILL_16M_SEGMENT(base,0xF0);
+
+        .balign 0x4000
+_MMU_table:     
+        FILL_32M_SEGMENT(_PT_0x0+MMU_L1_TYPE_Page,0x00)
+        FILL_32M_SEGMENT(MMU_L1_TYPE_Fault,0x00)
+        FILL_32M_SEGMENT(PCIMEM_PA|MMU_L1_TYPE_Section|MMU_AP_Any)
+        FILL_32M_SEGMENT(MMU_L1_TYPE_Fault,0x00)
+        FILL_32M_SEGMENT(MMU_L1_TYPE_Fault,0x00)
+        FILL_32M_SEGMENT(MMU_L1_TYPE_Fault,0x00)
+        FILL_32M_SEGMENT(MMU_L1_TYPE_Fault,0x00)
+        FILL_8M_SEGMENT(ROM_PA|MMU_L1_TYPE_Section|MMU_AP_Any)
+        FILL_16M_SEGMENT(MBIO_PA|MMU_L1_TYPE_Section|MMU_AP_Any)
+        FILL_8M_SEGMENT(FLASH_PA|MMU_L1_TYPE_Section|MMU_AP_Any)
+        FILL_256M_SEGMENT(MMU_L1_TYPE_Fault)
+        FILL_256M_SEGMENT(MMU_L1_TYPE_Fault)
+        FILL_256M_SEGMENT(MMU_L1_TYPE_Fault)
+        FILL_256M_SEGMENT(MMU_L1_TYPE_Fault)
+        FILL_256M_SEGMENT(MMU_L1_TYPE_Fault)
+        FILL_256M_SEGMENT(MMU_L1_TYPE_Fault)
+        FILL_256M_SEGMENT(MMU_L1_TYPE_Fault)
+        FILL_256M_SEGMENT(MMU_L1_TYPE_Fault)
+        FILL_256M_SEGMENT(MMU_L1_TYPE_Fault)
+        FILL_256M_SEGMENT(MMU_L1_TYPE_Fault)
+        FILL_256M_SEGMENT(MMU_L1_TYPE_Fault)
+        FILL_256M_SEGMENT(MMU_L1_TYPE_Fault)
+        FILL_256M_SEGMENT(MMU_L1_TYPE_Fault)
+        FILL_256M_SEGMENT(MMU_L1_TYPE_Fault)
+        FILL_256M_SEGMENT(MMU_L1_TYPE_Fault)
+
+#endif // CYGONCE_HAL_PLATFORM_EXTRAS_H
new file mode 100644
--- /dev/null
+++ b/packages/hal/arm/cma230/current/include/pkgconf/mlt_arm_cma222_ram.h
@@ -0,0 +1,13 @@
+// eCos memory layout - Tue Nov 09 08:15:25 1999
+
+// This is a generated file - changes will be lost if ConfigTool(MLT) is run
+
+#include <cyg/infra/cyg_type.h>
+#include <stddef.h>
+
+#define CYGMEM_REGION_ram (0)
+#define CYGMEM_REGION_ram_SIZE (0x200000)
+#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
+extern char CYG_LABEL_NAME (_reserved) [];
+#define CYGMEM_SECTION_reserved (CYG_LABEL_NAME (_reserved))
+#define CYGMEM_SECTION_reserved_SIZE (0x8000)
new file mode 100644
--- /dev/null
+++ b/packages/hal/arm/cma230/current/include/pkgconf/mlt_arm_cma222_ram.ldi
@@ -0,0 +1,24 @@
+// eCos memory layout - Tue Nov 09 08:15:25 1999
+
+// This is a generated file - do not edit
+
+MEMORY
+{
+    ram : ORIGIN = 0, LENGTH = 0x200000
+}
+
+SECTIONS
+{
+    SECTIONS_BEGIN
+    __reserved = 0; . = __reserved + 0x8000;
+    SECTION_rom_vectors (ram, ALIGN (0x1), LMA_EQ_VMA)
+    SECTION_text (ram, ALIGN (0x1), LMA_EQ_VMA)
+    SECTION_fini (ram, ALIGN (0x1), LMA_EQ_VMA)
+    SECTION_rodata (ram, ALIGN (0x1), LMA_EQ_VMA)
+    SECTION_rodata1 (ram, ALIGN (0x1), LMA_EQ_VMA)
+    SECTION_fixup (ram, ALIGN (0x1), LMA_EQ_VMA)
+    SECTION_gcc_except_table (ram, ALIGN (0x1), LMA_EQ_VMA)
+    SECTION_data (ram, ALIGN (0x1), LMA_EQ_VMA)
+    SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA)
+    SECTIONS_END
+}
new file mode 100644
--- /dev/null
+++ b/packages/hal/arm/cma230/current/include/pkgconf/mlt_arm_cma222_ram.mlt
@@ -0,0 +1,12 @@
+version 0
+region ram 0 200000 0 !
+section reserved 8000 1 0 0 1 1 1 1 0 0 rom_vectors rom_vectors !
+section rom_vectors 0 1 0 1 0 1 0 1 text text !
+section text 0 1 0 1 0 1 0 1 fini fini !
+section fini 0 1 0 1 0 1 0 1 rodata rodata !
+section rodata 0 1 0 1 0 1 0 1 rodata1 rodata1 !
+section rodata1 0 1 0 1 0 1 0 1 fixup fixup !
+section fixup 0 1 0 1 0 1 0 1 gcc_except_table gcc_except_table !
+section gcc_except_table 0 1 0 1 0 1 0 1 data data !
+section data 0 1 0 1 0 1 0 1 bss bss !
+section bss 0 4 0 1 0 0 0 0 !
new file mode 100644
--- /dev/null
+++ b/packages/hal/arm/cma230/current/include/pkgconf/mlt_arm_cma222_rom.h
@@ -0,0 +1,16 @@
+// eCos memory layout - Tue Nov 09 08:31:08 1999
+
+// This is a generated file - changes will be lost if ConfigTool(MLT) is run
+
+#include <cyg/infra/cyg_type.h>
+#include <stddef.h>
+
+#define CYGMEM_REGION_ram (0)
+#define CYGMEM_REGION_ram_SIZE (0x200000)
+#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
+#define CYGMEM_REGION_rom (0xe000000)
+#define CYGMEM_REGION_rom_SIZE (0x40000)
+#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R)
+extern char CYG_LABEL_NAME (_reserved) [];
+#define CYGMEM_SECTION_reserved (CYG_LABEL_NAME (_reserved))
+#define CYGMEM_SECTION_reserved_SIZE (0x1000)
new file mode 100644
--- /dev/null
+++ b/packages/hal/arm/cma230/current/include/pkgconf/mlt_arm_cma222_rom.ldi
@@ -0,0 +1,25 @@
+// eCos memory layout - Tue Nov 09 08:31:08 1999
+
+// This is a generated file - do not edit
+
+MEMORY
+{
+    ram : ORIGIN = 0, LENGTH = 0x200000
+    rom : ORIGIN = 0xe000000, LENGTH = 0x40000
+}
+
+SECTIONS
+{
+    SECTIONS_BEGIN
+    SECTION_rom_vectors (rom, 0xe000000, LMA_EQ_VMA)
+    SECTION_text (rom, ALIGN (0x1), LMA_EQ_VMA)
+    SECTION_fini (rom, ALIGN (0x1), LMA_EQ_VMA)
+    SECTION_rodata (rom, ALIGN (0x1), LMA_EQ_VMA)
+    SECTION_rodata1 (rom, ALIGN (0x1), LMA_EQ_VMA)
+    SECTION_fixup (rom, ALIGN (0x1), LMA_EQ_VMA)
+    SECTION_gcc_except_table (rom, ALIGN (0x1), LMA_EQ_VMA)
+    __reserved = 0; . = __reserved + 0x1000;
+    SECTION_data (ram, ALIGN (0x1), FOLLOWING (.gcc_except_table))
+    SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA)
+    SECTIONS_END
+}
new file mode 100644
--- /dev/null
+++ b/packages/hal/arm/cma230/current/include/pkgconf/mlt_arm_cma222_rom.mlt
@@ -0,0 +1,13 @@
+version 0
+region ram 0 200000 0 !
+region rom e000000 40000 1 !
+section reserved 1000 1 0 0 1 1 1 0 0 0 data !
+section data 0 1 1 1 0 1 0 0 bss !
+section bss 0 4 0 1 0 0 0 0 !
+section rom_vectors 0 1 0 1 1 1 1 1 e000000 e000000 text text !
+section text 0 1 0 1 0 1 0 1 fini fini !
+section fini 0 1 0 1 0 1 0 1 rodata rodata !
+section rodata 0 1 0 1 0 1 0 1 rodata1 rodata1 !
+section rodata1 0 1 0 1 0 1 0 1 fixup fixup !
+section fixup 0 1 0 1 0 1 0 1 gcc_except_table gcc_except_table !
+section gcc_except_table 0 1 0 1 0 0 0 1 data !
new file mode 100644
--- /dev/null
+++ b/packages/hal/arm/cma230/current/include/pkgconf/mlt_arm_cma222_stubs.h
@@ -0,0 +1,13 @@
+// eCos memory layout - Wed Nov 24 10:44:28 1999
+
+// This is a generated file - changes will be lost if ConfigTool(MLT) is run
+
+#include <cyg/infra/cyg_type.h>
+#include <stddef.h>
+
+#define CYGMEM_REGION_ram (0x1000)
+#define CYGMEM_REGION_ram_SIZE (0x7000)
+#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
+#define CYGMEM_REGION_rom (0xe000000)
+#define CYGMEM_REGION_rom_SIZE (0x40000)
+#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R)
new file mode 100644
--- /dev/null
+++ b/packages/hal/arm/cma230/current/include/pkgconf/mlt_arm_cma222_stubs.ldi
@@ -0,0 +1,52 @@
+//===========================================================================
+//
+// MLT linker script export
+//
+//===========================================================================
+//####COPYRIGHTBEGIN####
+//
+// -------------------------------------------
+// The contents of this file are subject to the Cygnus eCos Public License
+// Version 1.0 (the "License"); you may not use this file except in
+// compliance with the License.  You may obtain a copy of the License at
+// http://sourceware.cygnus.com/ecos
+// 
+// Software distributed under the License is distributed on an "AS IS"
+// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied.  See the
+// License for the specific language governing rights and limitations under
+// the License.
+// 
+// The Original Code is eCos - Embedded Cygnus Operating System, released
+// September 30, 1998.
+// 
+// The Initial Developer of the Original Code is Cygnus.  Portions created
+// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions.  All Rights Reserved.
+// -------------------------------------------
+//
+//####COPYRIGHTEND####
+//===========================================================================
+
+// eCos memory layout - Thu May 20 11:01:10 1999
+
+// This is a generated file - do not edit
+
+MEMORY
+{
+    ram : ORIGIN = 0x1000, LENGTH = 0x7000
+    rom : ORIGIN = 0xe000000, LENGTH = 0x40000
+}
+
+SECTIONS
+{
+    SECTIONS_BEGIN
+    SECTION_rom_vectors (rom, 0xe000000, LMA_EQ_VMA)
+    SECTION_text (rom, ALIGN (0x1), LMA_EQ_VMA)
+    SECTION_fini (rom, ALIGN (0x1), LMA_EQ_VMA)
+    SECTION_rodata (rom, ALIGN (0x1), LMA_EQ_VMA)
+    SECTION_rodata1 (rom, ALIGN (0x1), LMA_EQ_VMA)
+    SECTION_fixup (rom, ALIGN (0x1), LMA_EQ_VMA)
+    SECTION_gcc_except_table (rom, ALIGN (0x1), LMA_EQ_VMA)
+    SECTION_data (ram, 0x1000, FOLLOWING (.gcc_except_table))
+    SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA)
+    SECTIONS_END
+}
new file mode 100644
--- /dev/null
+++ b/packages/hal/arm/cma230/current/include/pkgconf/mlt_arm_cma222_stubs.mlt
@@ -0,0 +1,12 @@
+version 0
+region ram 1000 7000 0 !
+region rom e000000 40000 1 !
+section data 0 1 1 1 1 1 0 0 1000 bss !
+section bss 0 4 0 1 0 0 0 0 !
+section rom_vectors 0 1 0 1 1 1 1 1 e000000 e000000 text text !
+section text 0 1 0 1 0 1 0 1 fini fini !
+section fini 0 1 0 1 0 1 0 1 rodata rodata !
+section rodata 0 1 0 1 0 1 0 1 rodata1 rodata1 !
+section rodata1 0 1 0 1 0 1 0 1 fixup fixup !
+section fixup 0 1 0 1 0 1 0 1 gcc_except_table gcc_except_table !
+section gcc_except_table 0 1 0 1 0 0 0 1 data !
--- a/packages/hal/arm/pid/current/ChangeLog
+++ b/packages/hal/arm/pid/current/ChangeLog
@@ -1,3 +1,12 @@
+1999-12-06  Gary Thomas  <gthomas@cygnus.co.uk>
+
+	* include/pkgconf/hal_arm_pid.h (HAL_PLATFORM_BOARD):
+	(HAL_PLATFORM_CPU): 
+	(HAL_PLATFORM_EXTRA): Add - used by CygMon.
+
+	* misc/prog_flash.c: Increase flash image size (needed to
+	build CygMon image).
+
 1999-11-25  Jonathan Larmour  <jlarmour@cygnus.co.uk>
 
 	* include/pkgconf/hal_arm_pid.h:
--- a/packages/hal/arm/pid/current/include/pkgconf/hal_arm_pid.h
+++ b/packages/hal/arm/pid/current/include/pkgconf/hal_arm_pid.h
@@ -196,6 +196,13 @@
 #define CYGNUM_HAL_RTC_DENOMINATOR   100
 #define CYGNUM_HAL_RTC_PERIOD        12500
 
+//---------------------------------------------------------------------------
+// Platform information - descriptive only
+
+#define HAL_PLATFORM_CPU    "ARM 7TDMI"
+#define HAL_PLATFORM_BOARD  "ARM PID"
+#define HAL_PLATFORM_EXTRA  ""
+
 /* -------------------------------------------------------------------*/
 #endif  /* CYGONCE_PKGCONF_HAL_ARM_PID_H */
 /* EOF hal_arm_pid.h */
--- a/packages/hal/arm/pid/current/misc/prog_flash.c
+++ b/packages/hal/arm/pid/current/misc/prog_flash.c
@@ -59,8 +59,8 @@ extern void diag_printf(const char *, ..
 int identify_FLASH(void);
 void write_sector(int, char *);
 
-char *flash_buffer = (char *)0x60000;
-char *flash_buffer_end = (char *)0x64000;
+char *flash_buffer =     (char *)0x60000;
+char *flash_buffer_end = (char *)0x80000;
 
 #ifdef BE_IMAGE
 #define BUF(x) buf[x^3]
--- a/packages/io/serial/current/ChangeLog
+++ b/packages/io/serial/current/ChangeLog
@@ -1,3 +1,8 @@
+1999-12-06  Gary Thomas  <gthomas@cygnus.co.uk>
+
+	* src/arm/pid_serial_with_ints.c (pid_serial_DSR): Add loop to handle
+	case where an interrupt represents multiple events.
+
 1999-11-19  Gary Thomas  <gthomas@cygnus.co.uk>
 
 	* src/powerpc/quicc_smc_serial.c: Channel select for SMC2 was wrong.
--- a/packages/io/serial/current/src/arm/pid_serial_with_ints.c
+++ b/packages/io/serial/current/src/arm/pid_serial_with_ints.c
@@ -302,13 +302,14 @@ pid_serial_DSR(cyg_vector_t vector, cyg_
     pid_serial_info *pid_chan = (pid_serial_info *)chan->dev_priv;
     volatile struct serial_port *port = (volatile struct serial_port *)pid_chan->base;
     unsigned char isr;
-    isr = port->isr & 0x0E;
-    if (isr == ISR_Tx) {
-        (chan->callbacks->xmt_char)(chan);
-    } else if (isr == ISR_RxTO) {
-        (chan->callbacks->rcv_char)(chan, port->rhr);
-    } else if (isr == ISR_Rx) {
-        (chan->callbacks->rcv_char)(chan, port->rhr);
+    while ((isr = port->isr & 0x0E) != 0) {
+        if (isr == ISR_Tx) {
+            (chan->callbacks->xmt_char)(chan);
+        } else if (isr == ISR_RxTO) {
+            (chan->callbacks->rcv_char)(chan, port->rhr);
+        } else if (isr == ISR_Rx) {
+            (chan->callbacks->rcv_char)(chan, port->rhr);
+        }
     }
     cyg_drv_interrupt_unmask(pid_chan->int_num);
 }
--- a/packages/targets
+++ b/packages/targets
@@ -353,6 +353,23 @@ target arm {
             LDLANGFLAGS      "-Wl,--gc-sections -Wl,-static"
         }
     }
+    platform cma222 {
+        alias		{ "Cogent CMA222" }
+	startup		{ ram rom stubs }
+	packages	{
+	    CYGPKG_HAL_ARM_CMA230
+	}
+	base_platform cma230
+        cflags {
+            ARCHFLAGS        "-mcpu=arm7tdmi -D__CMA222"
+            ERRFLAGS         "-Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef"
+            CXXERRFLAGS      "-Woverloaded-virtual"
+            DBGFLAGS         "-g -O2"
+            LANGFLAGS        "-ffunction-sections -fdata-sections -mno-sched-prolog"
+            CXXLANGFLAGS     "-fno-rtti -fno-exceptions -fvtable-gc -finit-priority"
+            LDLANGFLAGS      "-Wl,--gc-sections -Wl,-static"
+        }
+    }
 }
 
 target sparclite {