Mercurial > ecos-v2_0-branch
changeset 96:b15c60e34c84
Merge from eCos master repository on 2000-06-06-05:24:42-BST
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--- a/host/libcdl/ChangeLog +++ b/host/libcdl/ChangeLog @@ -1,3 +1,10 @@ +2000-06-02 Bart Veer <bartv@redhat.com> + + * config.cxx (load_package): + Diagnostic function pointers were not being installed at the + package level, so error messages due to invalid CDL were + disappearing. + 2000-05-11 Bart Veer <bartv@redhat.com> * value.cxx (implements_update_handler):
--- a/host/libcdl/config.cxx +++ b/host/libcdl/config.cxx @@ -812,7 +812,8 @@ CdlConfigurationBody::load_package(CdlTr CdlInterpreter interp = package->get_interpreter(); CYG_ASSERT_CLASSC(interp); - interp->add_command("unknown", &CdlParse::unknown_command); + interp->add_command("unknown", &CdlParse::unknown_command); + CdlInterpreterBody::DiagSupport diag_support(interp, error_fn, warn_fn); // Next figure out the script name, and make sure that it exists. std::string actual_script = package->find_absolute_file(script, "cdl");
--- a/host/tools/ecostest/common/eCosTestDownloadFilter.cpp +++ b/host/tools/ecostest/common/eCosTestDownloadFilter.cpp @@ -53,7 +53,7 @@ #include "eCosStd.h" #include "eCosTrace.h" -#define DL_FILTER_VER "$Id: eCosTestDownloadFilter.cpp,v 1.10 2000/06/02 17:35:00 jlarmour Exp $" +#define DL_FILTER_VER "$Id: eCosTestDownloadFilter.cpp,v 1.11 2000/06/06 05:12:17 jlarmour Exp $" #include "eCosTestDownloadFilter.h" CeCosTestDownloadFilter::CeCosTestDownloadFilter():
--- a/host/tools/ecostest/common/eCosTestMonitorFilter.cpp +++ b/host/tools/ecostest/common/eCosTestMonitorFilter.cpp @@ -45,7 +45,7 @@ #include "eCosStd.h" -#define SER_FILTER_VER "$Id: eCosTestMonitorFilter.cpp,v 1.9 2000/06/02 17:35:00 jlarmour Exp $" +#define SER_FILTER_VER "$Id: eCosTestMonitorFilter.cpp,v 1.10 2000/06/06 05:12:17 jlarmour Exp $" #include "eCosTestMonitorFilter.h" CeCosTestMonitorFilter::CeCosTestMonitorFilter():
--- a/host/tools/ecostest/common/eCosTestSerialFilter.cpp +++ b/host/tools/ecostest/common/eCosTestSerialFilter.cpp @@ -51,7 +51,7 @@ #include "eCosStd.h" -#define SER_FILTER_VER "$Id: eCosTestSerialFilter.cpp,v 1.10 2000/06/02 17:35:00 jlarmour Exp $" +#define SER_FILTER_VER "$Id: eCosTestSerialFilter.cpp,v 1.11 2000/06/06 05:12:17 jlarmour Exp $" #include "eCosTestSerialFilter.h" #include "eCosThreadUtils.h"
--- a/packages/ChangeLog +++ b/packages/ChangeLog @@ -1,3 +1,9 @@ +2000-06-05 John Dallaway <jld@redhat.com> + + * ecos.db: + + Tidy CqREEK-related display strings. + 2000-05-31 Jesper Skov <jskov@redhat.com> * ecos.db: Added CqREEK platform HAL (contributed by Haruki @@ -14,6 +20,18 @@ 2000-05-26 Jesper Skov <jskov@redhat.c * ecos.db: Added dallas 1742 wallclock driver package. +2000-05-25 John Dallaway <jld@redhat.com> + + * ecos.db: Tidy V850-related display strings. + +2000-04-26 Jesper Skov <jskov@redhat.com> + + * ecos.db: ceb_v850 - include serial driver. + +2000-04-20 Gary Thomas <gthomas@redhat.com> + + * ecos.db: Rename hal/nec to hal/v85x for NEC/V85x architecture. + 2000-04-11 Hugo Tyson <hmt@cygnus.co.uk> * ecos.db: CYGPKG_IO_SERIAL should not be "hardware" now that it @@ -86,6 +104,10 @@ 2000-03-22 John Dallaway <jld@cygnus.c Don't invoke 'cygpath' on DOS-style paths to workaround erratic behaviour when invoked from the GUI admin tool. +2000-03-20 Gary Thomas <gthomas@redhat.com> + + * ecos.db: Add support for NEC/V850 HAL and CEB platform. + 2000-03-16 Jesper Skov <jskov@redhat.com> * ecos.db: Make edk7708 target select the appropriate CPU.
--- a/packages/NEWS +++ b/packages/NEWS @@ -1,3 +1,7 @@ +* NEC V85x architecture support added +* NEC Cosmo CEB-V850/SA1 evaluation board platform HAL added +* Serial device drivers added for systems based on NEC V850 SA1 (70F3017) + or SB1 (70F3033) processors * Hitachi SH3 CqREEK (cq7708) platform HAL support added Contributed by Haruki Kashiwaya [Still untested, serial not imported] * Watchdog reworked much like wallclock.
new file mode 100644 --- /dev/null +++ b/packages/devs/serial/v85x/v850/current/ChangeLog @@ -0,0 +1,31 @@ +2000-05-28 Gary Thomas <gthomas@redhat.com> + + * src/v85x_v850_serial.h: + * src/v85x_v850_serial.c: + * cdl/ser_v85x_v850.cdl: New file(s). + +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//===========================================================================
new file mode 100644 --- /dev/null +++ b/packages/devs/serial/v85x/v850/current/cdl/ser_v85x_v850.cdl @@ -0,0 +1,106 @@ +# ==================================================================== +# +# ser_v85x_v850.cdl +# +# eCos serial NEC/V850 configuration data +# +# ==================================================================== +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Red Hat eCos Public License +# Version 1.1 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://www.redhat.com/ +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Configurable Operating System, +# released September 30, 1998. +# +# The Initial Developer of the Original Code is Red Hat. +# Portions created by Red Hat are +# Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +# All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +# ==================================================================== +######DESCRIPTIONBEGIN#### +# +# Author(s): gthomas +# Original data: gthomas +# Contributors: +# Date: 2000-05-26 +# +#####DESCRIPTIONEND#### +# +# ==================================================================== + +cdl_package CYGPKG_IO_SERIAL_V85X_V850 { + display "NEC V850 serial device drivers" + + parent CYGPKG_IO_SERIAL_DEVICES + active_if CYGPKG_IO_SERIAL + active_if CYGPKG_HAL_V85X_V850 + + requires CYGPKG_ERROR + include_dir cyg/io +# include_files ; # none _exported_ whatsoever + description " + This option enables the serial device drivers for the + NEC CEB/V850SA1." + doc redirect/ecos-device-drivers.html + + compile -library=libextras.a v85x_v850_serial.c + + define_proc { + puts $::cdl_system_header "/***** serial driver proc output start *****/" + puts $::cdl_system_header "#define CYGDAT_IO_SERIAL_DEVICE_HEADER <pkgconf/io_serial_v85x_v850.h>" + puts $::cdl_system_header "/***** serial driver proc output end *****/" + } + + cdl_component CYGPKG_IO_SERIAL_V85X_V850_SERIAL0 { + display "NEC V850 serial port 0 driver" + flavor bool + default_value 0 + description " + This option includes the serial device driver for the NEC V850 + SA1 (70F3017) and SB1 (70F3033) devices, port 0." + + cdl_option CYGDAT_IO_SERIAL_V85X_V850_SERIAL0_NAME { + display "Device name for NEC V850 serial port 0 driver" + flavor data + default_value {"\"/dev/ser0\""} + description " + This option specifies the name of the serial device for the + NEC V850, port 0." + } + + cdl_option CYGNUM_IO_SERIAL_V85X_V850_SERIAL0_BAUD { + display "Baud rate for the NEC V850 serial port 0 driver" + flavor data + legal_values { 50 75 110 "134_5" 150 200 300 600 1200 1800 2400 3600 + 4800 7200 9600 14400 19200 38400 57600 115200 + } + default_value 38400 + description " + This option specifies the default baud rate (speed) for the + NEC V850, port 0." + } + + cdl_option CYGNUM_IO_SERIAL_V85X_V850_SERIAL0_BUFSIZE { + display "Buffer size for the NEC V850 serial port 0 driver" + flavor data + legal_values 0 to 8192 + default_value 128 + description " + This option specifies the size of the internal buffers used + for the NEC V850, port 0." + } + } + +}
new file mode 100644 --- /dev/null +++ b/packages/devs/serial/v85x/v850/current/src/v85x_v850_serial.c @@ -0,0 +1,313 @@ +//========================================================================== +// +// io/serial/v85x/v85x_v850_serial.c +// +// NEC V850 Serial I/O Interface Module (interrupt driven) +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 2000-03-31 +// Purpose: V850 Serial I/O module (interrupt driven version) +// Description: +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include <pkgconf/system.h> +#include <pkgconf/io_serial.h> +#include <pkgconf/io.h> +#include <pkgconf/kernel.h> + +#include <cyg/io/io.h> +#include <cyg/hal/hal_intr.h> +#include <cyg/io/devtab.h> +#include <cyg/io/serial.h> +#include <cyg/infra/diag.h> + +#ifdef CYGVAR_KERNEL_COUNTERS_CLOCK +#include <cyg/kernel/kapi.h> +#endif + +#ifdef CYGPKG_IO_SERIAL_V85X_V850 + +#include "v85x_v850_serial.h" + +typedef struct v850_serial_info { + CYG_ADDRWORD base; + CYG_WORD int_num; + cyg_interrupt serial_interrupt[3]; + cyg_handle_t serial_interrupt_handle[3]; + cyg_bool tx_busy; +#ifdef CYGVAR_KERNEL_COUNTERS_CLOCK + cyg_alarm tx_timeout; + cyg_handle_t tx_timeout_handle; +#endif +} v850_serial_info; + +static bool v850_serial_init(struct cyg_devtab_entry *tab); +static bool v850_serial_putc(serial_channel *chan, unsigned char c); +static Cyg_ErrNo v850_serial_lookup(struct cyg_devtab_entry **tab, + struct cyg_devtab_entry *sub_tab, + const char *name); +static unsigned char v850_serial_getc(serial_channel *chan); +static bool v850_serial_set_config(serial_channel *chan, cyg_serial_info_t *config); +static void v850_serial_start_xmit(serial_channel *chan); +static void v850_serial_stop_xmit(serial_channel *chan); + +static cyg_uint32 v850_serial_ISR(cyg_vector_t vector, cyg_addrword_t data); +static void v850_serial_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data); + +static SERIAL_FUNS(v850_serial_funs, + v850_serial_putc, + v850_serial_getc, + v850_serial_set_config, + v850_serial_start_xmit, + v850_serial_stop_xmit + ); + +#ifdef CYGPKG_IO_SERIAL_V85X_V850_SERIAL0 +static v850_serial_info v850_serial_info0 = {V850_REG_ASIM0, + CYGNUM_HAL_VECTOR_INTSER0}; +#if CYGNUM_IO_SERIAL_V85X_V850_SERIAL0_BUFSIZE > 0 +static unsigned char v850_serial_out_buf0[CYGNUM_IO_SERIAL_V85X_V850_SERIAL0_BUFSIZE]; +static unsigned char v850_serial_in_buf0[CYGNUM_IO_SERIAL_V85X_V850_SERIAL0_BUFSIZE]; + +static SERIAL_CHANNEL_USING_INTERRUPTS(v850_serial_channel0, + v850_serial_funs, + v850_serial_info0, + CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_V85X_V850_SERIAL0_BAUD), + CYG_SERIAL_STOP_DEFAULT, + CYG_SERIAL_PARITY_DEFAULT, + CYG_SERIAL_WORD_LENGTH_DEFAULT, + CYG_SERIAL_FLAGS_DEFAULT, + &v850_serial_out_buf0[0], sizeof(v850_serial_out_buf0), + &v850_serial_in_buf0[0], sizeof(v850_serial_in_buf0) + ); +#else +static SERIAL_CHANNEL(v850_serial_channel0, + v850_serial_funs, + v850_serial_info0, + CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_V85X_V850_SERIAL0_BAUD), + CYG_SERIAL_STOP_DEFAULT, + CYG_SERIAL_PARITY_DEFAULT, + CYG_SERIAL_WORD_LENGTH_DEFAULT, + CYG_SERIAL_FLAGS_DEFAULT + ); +#endif + +DEVTAB_ENTRY(v850_serial_io0, + CYGDAT_IO_SERIAL_V85X_V850_SERIAL0_NAME, + 0, // Does not depend on a lower level interface + &cyg_io_serial_devio, + v850_serial_init, + v850_serial_lookup, // Serial driver may need initializing + &v850_serial_channel0 + ); +#endif // CYGPKG_IO_SERIAL_V85X_V850_SERIAL0 + +// Internal function to actually configure the hardware to desired baud rate, etc. +static bool +v850_serial_config_port(serial_channel *chan, cyg_serial_info_t *new_config, bool init) +{ + v850_serial_info *v850_chan = (v850_serial_info *)chan->dev_priv; + volatile struct serial_port *port = (volatile struct serial_port *)v850_chan->base; + unsigned char parity = select_parity[new_config->parity]; + unsigned char word_length = select_word_length[new_config->word_length-CYGNUM_SERIAL_WORD_LENGTH_5]; + unsigned char stop_bits = select_stop_bits[new_config->stop]; + if ((select_baud[new_config->baud].count == 0) || + (word_length == 0xFF) || + (parity == 0xFF) || + (stop_bits == 0xFF)) { + return false; // Unsupported configuration + } + port->asim = ASIM_TxRx_Tx | ASIM_TxRx_Rx | parity | word_length | stop_bits; + port->brgc = select_baud[new_config->baud].count; + port->brgm = select_baud[new_config->baud].mode + 1; + if (new_config != &chan->config) { + chan->config = *new_config; + } + return true; +} + +#ifdef CYGVAR_KERNEL_COUNTERS_CLOCK +// +// The serial ports on the V850 are incredibly stupid. There is no +// interface status register which can tell you if it is possible to +// read or write a character! The only way to discern this is by using +// interrupts [or at least an interrupt register and polling it]. Thus +// the serial transmit code has a problem in that it will be required by +// upper layers to "send until full". The only way to decide "not full" is +// that an interrupt has happened. If the serial driver is being mixed +// with diagnostic I/O, then serial transmit interrupts will possibly be +// lost. +// +// This code attempts to compenstate by using a kernel alarm to reset the +// "device is busy" flag after some timeout. The timeout period will be +// sufficiently long so as to not interfere with normal interrupt handling. +// +static void +v850_serial_tx_timeout(cyg_addrword_t p) +{ + v850_serial_info *v850_chan = (v850_serial_info *)p; + v850_chan->tx_busy = false; +} +#endif + +// Function to initialize the device. Called at bootstrap time. +static bool +v850_serial_init(struct cyg_devtab_entry *tab) +{ + int i; + serial_channel *chan = (serial_channel *)tab->priv; + v850_serial_info *v850_chan = (v850_serial_info *)chan->dev_priv; +#ifdef CYGVAR_KERNEL_COUNTERS_CLOCK + cyg_handle_t h; +#endif +#ifdef CYGDBG_IO_INIT + diag_printf("V850 SERIAL init - dev: %x.%d\n", v850_chan->base, v850_chan->int_num); +#endif + (chan->callbacks->serial_init)(chan); // Really only required for interrupt driven devices + if (chan->out_cbuf.len != 0) { + for (i = 0; i < 3; i++) { + cyg_drv_interrupt_create(v850_chan->int_num+i, + 99, // Priority - unused + (cyg_addrword_t)chan, // Data item passed to interrupt handler + v850_serial_ISR, + v850_serial_DSR, + &v850_chan->serial_interrupt_handle[i], + &v850_chan->serial_interrupt[i]); + cyg_drv_interrupt_attach(v850_chan->serial_interrupt_handle[i]); + cyg_drv_interrupt_unmask(v850_chan->int_num+i); +#ifdef CYGVAR_KERNEL_COUNTERS_CLOCK + cyg_clock_to_counter(cyg_real_time_clock(), &h); + cyg_alarm_create(h, v850_serial_tx_timeout, (cyg_addrword_t)v850_chan, + &v850_chan->tx_timeout_handle, &v850_chan->tx_timeout); +#endif + } + } + v850_chan->tx_busy = false; + return v850_serial_config_port(chan, &chan->config, true); +} + +// This routine is called when the device is "looked" up (i.e. attached) +static Cyg_ErrNo +v850_serial_lookup(struct cyg_devtab_entry **tab, + struct cyg_devtab_entry *sub_tab, + const char *name) +{ + serial_channel *chan = (serial_channel *)(*tab)->priv; + (chan->callbacks->serial_init)(chan); // Really only required for interrupt driven devices + return ENOERR; +} + +// Send a character to the device output buffer. +// Return 'true' if character is sent to device +static bool +v850_serial_putc(serial_channel *chan, unsigned char c) +{ + v850_serial_info *v850_chan = (v850_serial_info *)chan->dev_priv; + volatile struct serial_port *port = (volatile struct serial_port *)v850_chan->base; + if (!v850_chan->tx_busy) { + v850_chan->tx_busy = true; + port->txs = c; +#ifdef CYGVAR_KERNEL_COUNTERS_CLOCK + cyg_alarm_initialize(v850_chan->tx_timeout_handle, cyg_current_time()+10, 0); +#endif + } else { + return false; // Couldn't send, tx was busy + } +} + +// Fetch a character from the device input buffer, waiting if necessary +static unsigned char +v850_serial_getc(serial_channel *chan) +{ + v850_serial_info *v850_chan = (v850_serial_info *)chan->dev_priv; + volatile struct serial_port *port = (volatile struct serial_port *)v850_chan->base; + return port->rxs; +} + +// Set up the device characteristics; baud rate, etc. +static bool +v850_serial_set_config(serial_channel *chan, cyg_serial_info_t *config) +{ + return v850_serial_config_port(chan, config, false); +} + +// Enable the transmitter on the device +static void +v850_serial_start_xmit(serial_channel *chan) +{ + v850_serial_info *v850_chan = (v850_serial_info *)chan->dev_priv; + (chan->callbacks->xmt_char)(chan); // Kick transmitter (if necessary) + cyg_drv_interrupt_unmask(v850_chan->int_num+INT_Tx); // Enable Tx interrupt +} + +// Disable the transmitter on the device +static void +v850_serial_stop_xmit(serial_channel *chan) +{ + v850_serial_info *v850_chan = (v850_serial_info *)chan->dev_priv; + cyg_drv_interrupt_mask(v850_chan->int_num+INT_Tx); // Disable Tx interrupt +} + +// Serial I/O - low level interrupt handler (ISR) +static cyg_uint32 +v850_serial_ISR(cyg_vector_t vector, cyg_addrword_t data) +{ + cyg_drv_interrupt_mask(vector); + cyg_drv_interrupt_acknowledge(vector); + return CYG_ISR_CALL_DSR; // Cause DSR to be run +} + +// Serial I/O - high level interrupt handler (DSR) +static void +v850_serial_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data) +{ + serial_channel *chan = (serial_channel *)data; + v850_serial_info *v850_chan = (v850_serial_info *)chan->dev_priv; + volatile struct serial_port *port = (volatile struct serial_port *)v850_chan->base; + switch (vector-(v850_chan->int_num)) { + case INT_ERR: + case INT_Rx: + (chan->callbacks->rcv_char)(chan, port->rxs); + break; + case INT_Tx: + v850_chan->tx_busy = false; +#ifdef CYGVAR_KERNEL_COUNTERS_CLOCK + cyg_alarm_initialize(v850_chan->tx_timeout_handle, 0, 0); +#endif + (chan->callbacks->xmt_char)(chan); + break; + } + cyg_drv_interrupt_unmask(vector); +} +#endif
new file mode 100644 --- /dev/null +++ b/packages/devs/serial/v85x/v850/current/src/v85x_v850_serial.h @@ -0,0 +1,147 @@ +#ifndef CYGONCE_V85X_V850_SERIAL_H +#define CYGONCE_V85X_V850_SERIAL_H + +// ==================================================================== +// +// v850_ceb_serial.h +// +// Device I/O - Description of NEC V850 serial hardware +// +// ==================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +// ==================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 2000-03-31 +// Purpose: Internal interfaces for serial I/O drivers +// Description: +// +//####DESCRIPTIONEND#### +// +// ==================================================================== + +// Description of serial ports on NEC CEB/V850SA1 + +#include <cyg/hal/v850_common.h> + +struct serial_port { + unsigned char asim; // Serial interface mode + unsigned char _filler0; + unsigned char asis; // Serial interface status + unsigned char _filler1; + unsigned char brgc; // Baud rate control + unsigned char _filler2; + unsigned char txs; // Transmit shift register + unsigned char _filler3; + unsigned char rxs; // Receive shift register + unsigned char _filler4; + unsigned char brgm; // Baud rate mode + unsigned char _filler5; +}; + +// Relative interrupt numbers +#define INT_ERR 0 // Receive error condition +#define INT_Rx 1 // Receive data +#define INT_Tx 2 // Transmit data + +// Serial interface mode +#define ASIM_TxRx_MASK (3<<6) // Receive & Transmit enables +#define ASIM_TxRx_Rx (1<<6) // Receive enable +#define ASIM_TxRx_Tx (2<<6) // Transmit enable +#define ASIM_Parity_MASK (3<<4) // Parity mode bits +#define ASIM_Parity_none (0<<4) // No parity +#define ASIM_Parity_space (1<<4) // Send zero bit, ignore errors +#define ASIM_Parity_odd (2<<4) // Odd parity +#define ASIM_Parity_even (3<<4) // Even parity +#define ASIM_Length_MASK (1<<3) // Character length select +#define ASIM_Length_7 (0<<3) // 7 bit chars +#define ASIM_Length_8 (1<<3) // 8 bit chars +#define ASIM_Stop_MASK (1<<2) // Stop bit select +#define ASIM_Stop_1 (0<<2) // 1 stop bit +#define ASIM_Stop_2 (1<<2) // 2 stop bits +#define ASIM_Error_MASK (1<<1) // Receive error select +#define ASIM_Error_enable (0<<1) // Issue interrupt on receive error +#define ASIM_Error_disable (1<<1) // No interrupts on receive error + +// Serial interface status (errors only) +#define ASIS_OVE (1<<0) // Overrun error +#define ASIS_FE (1<<1) // Framing error +#define ASIS_PE (1<<2) // Parity error + +static unsigned char select_word_length[] = { + 0xFF, // 5 bits / word (char) + 0xFF, + ASIM_Length_7, + ASIM_Length_8 +}; + +static unsigned char select_stop_bits[] = { + 0, + ASIM_Stop_1, // 1 stop bit + 0xFF, // 1.5 stop bit + ASIM_Stop_2 // 2 stop bits +}; + +static unsigned char select_parity[] = { + ASIM_Parity_none, // No parity + ASIM_Parity_even, // Even parity + ASIM_Parity_odd, // Odd parity + 0xFF, // Mark parity + ASIM_Parity_space, // Space parity +}; + +// Baud rate values, based on raw 17MHz clock + +static struct v850_baud { + unsigned char count; + unsigned char mode; +} select_baud[] = { + {0, 0}, // Unused + {0, 0}, // 50 + {0, 0}, // 75 + {0, 0}, // 110 + {0, 0}, // 134.5 + {0, 0}, // 150 + {0, 0}, // 200 + {0, 0}, // 300 + {0, 0}, // 600 + {221, 5}, // 1200 + {0, 0}, // 1800 + {221, 4}, // 2400 + {0, 0}, // 3600 + {221, 3}, // 4800 + {0, 0}, // 7200 + {221, 2}, // 9600 + {0, 0}, // 14400 + {221, 1}, // 19200 + {221, 0}, // 38400 + {0, 0}, // 57600 + {0, 0}, // 115200 + {0, 0}, // 230400 +}; + +#endif // CYGONCE_V85X_V850_SERIAL_H
--- a/packages/ecos.db +++ b/packages/ecos.db @@ -209,6 +209,16 @@ package CYGPKG_IO_SERIAL_SH_EDK7708 { } +package CYGPKG_IO_SERIAL_V85X_V850 { + alias { "NEC V850 serial device drivers" + devs_serial_v85x_v850 v850_serial_driver } + hardware + directory devs/serial/v85x/v850 + script ser_v85x_v850.cdl + description "Serial device drivers for systems based on NEC V850 + SA1 (70F3017) or SB1 (70F3033) processors." +} + package CYGPKG_DEVS_ETH_ARM_EDB7XXX { alias { "Cirrus Logic ethernet driver" edb7xxx_eth_driver } hardware @@ -472,13 +482,13 @@ package CYGPKG_HAL_SH_EDK7708 { } package CYGPKG_HAL_SH_SH7708_CQ7708 { - alias { "CqREEK Hitachi SH7708 board" hal_sh_cq sh_cq_hal } + alias { "CqREEK SH7708 board" hal_sh_cq sh_cq_hal } directory hal/sh/cq7708 script hal_sh_sh7708_cq7708.cdl hardware description " The cq HAL package provides the support needed to run - eCos on a Hitachi SH3 CqREEK board." + eCos on a CqREEK SH7708 board." } @@ -789,6 +799,38 @@ package CYGPKG_HAL_MN10300_AM33_STB { actual hardware for the AM33 STB evaluation board." } +# -------------------------------------------------------------------------- +# NEC packages +package CYGPKG_HAL_V85X { + alias { "NEC V85x common HAL" hal_v85x nec_arch_hal } + directory hal/v85x/arch + script hal_v85x.cdl + hardware + description " +The NEC V85x architecture HAL package provides generic support for this +processor architecture. It is also necessary to select a specific +target platform HAL package." +} + +package CYGPKG_HAL_V85X_V850 { + alias { "NEC V850 variant HAL" hal_v85x_v850 nec_v850_hal } + directory hal/v85x/v850 + script hal_v85x_v850.cdl + hardware + description " +The V850 HAL package provides the support needed to run eCos on a NEC V850 +processor." +} + +package CYGPKG_HAL_V85X_V850_CEB { + alias { "Cosmo CEB-V850/SA1 board" hal_v85x_v850_ceb nec_v850_ceb_hal } + directory hal/v85x/ceb_v850 + script hal_v85x_ceb_v850.cdl + hardware + description " +The CEB-V850/SA1 HAL package provides the support needed to run eCos on a Cosmo CEB-V850/SA1 +evaluation board." +} # ========================================================================== # -------------------------------------------------------------------------- # ARM targets @@ -868,14 +910,14 @@ target sh7708 { } target cq7708 { - alias { "CqREEK SH7708 Evaluation board" cq7708 } + alias { "CqREEK SH7708 board" cq7708 } packages { CYGPKG_HAL_SH CYGPKG_HAL_SH_SH7708_CQ7708 } enable { CYGPKG_HAL_SH_7708 } description " The cq7708 target provides the packages needed to run - eCos on a CqREEK Hitachi SH7708 board." + eCos on a CqREEK SH7708 board." } # -------------------------------------------------------------------------- @@ -1064,3 +1106,18 @@ target stb { eCos on a Matsushita STB board." } +# -------------------------------------------------------------------------- +# NEC targets + +target ceb_v850 { + alias { "Cosmo CEB-V850/SA1 board" CEB } + packages { CYGPKG_HAL_V85X + CYGPKG_HAL_V85X_V850 + CYGPKG_HAL_V85X_V850_CEB + CYGPKG_IO_SERIAL_V85X_V850 + } + description " +The ceb target provides the packages needed to run eCos on a Cosmo CEB-V850/SA1 +evaluation board." +} +# --------------------------------------------------------------------------
--- a/packages/ecosadmin.tcl +++ b/packages/ecosadmin.tcl @@ -1,15 +1,14 @@ #!/bin/sh # these lines restart using the tcl shell \ exec sh -c "if ( echo | tclsh ) 2>/dev/null ; then \ - exec tclsh \"$0\" ${1+\"$@\"} ; \ + exec tclsh "${0}" ${1+"${@}"} ; \ elif ( echo | cygtclsh80 ) 2>/dev/null ; then \ - exec cygtclsh80 \"$0\" ${1+\"$@\"} ; \ + exec cygtclsh80 "${0}" ${1+"${@}"} ; \ else \ echo Could not find TCL interpreter ; \ exit 1 ; \ fi" - # {{{ Banner #===============================================================================
--- a/packages/hal/arm/aeb/current/ChangeLog +++ b/packages/hal/arm/aeb/current/ChangeLog @@ -1,3 +1,7 @@ +2000-06-06 Jonathan Larmour <jlarmour@redhat.co.uk> + + * src/flash_cksum.tcl: Make sure it invokes the interpreter correctly + 2000-05-22 Jesper Skov <jskov@redhat.com> * src/flash_cksum.tcl: Use correct intepreter.
--- a/packages/hal/arm/aeb/current/src/flash_cksum.tcl +++ b/packages/hal/arm/aeb/current/src/flash_cksum.tcl @@ -1,9 +1,9 @@ #!/bin/sh # the next line restarts using tclsh \ exec sh -c "if ( echo | tclsh ) 2>/dev/null ; then \ - exec tclsh \"$0\" ${1+\"$@\"} ; \ + exec tclsh "${0}" ${1+"${@}"} ; \ elif ( echo | cygtclsh80 ) 2>/dev/null ; then \ - exec cygtclsh80 \"$0\" ${1+\"$@\"} ; \ + exec cygtclsh80 "${0}" ${1+"${@}"} ; \ else \ echo Could not find TCL interpreter ; \ exit 1 ; \
--- a/packages/hal/arm/arch/current/ChangeLog +++ b/packages/hal/arm/arch/current/ChangeLog @@ -1,3 +1,13 @@ +2000-06-04 Gary Thomas <gthomas@redhat.com> + + * src/vectors.S: Add support for platform specific "vectors" + which may need to end up in predefined memory locations. + * src/arm.ld: Add separate 'fixed_vectors' section. + +2000-06-01 Gary Thomas <gthomas@redhat.com> + + * include/hal_mmu.h (MMU_Control_I): Added for StrongARM support. + 2000-04-10 Hugo Tyson <hmt@cygnus.co.uk> * include/arm_stub.h (CYG_HAL_GDB_ENTER_CRITICAL_IO_REGION): Only
--- a/packages/hal/arm/arch/current/include/hal_mmu.h +++ b/packages/hal/arm/arch/current/include/hal_mmu.h @@ -97,6 +97,7 @@ #define MMU_Control_B 0x080 // Enable Big-Endian #define MMU_Control_S 0x100 // Enable system protection #define MMU_Control_R 0x200 // Enable ROM protection +#define MMU_Control_I 0x1000 // Enable Instruction cache #define MMU_Control_Init (MMU_Control_P|MMU_Control_D|MMU_Control_L) //-----------------------------------------------------------------------------
--- a/packages/hal/arm/arch/current/src/arm.ld +++ b/packages/hal/arm/arch/current/src/arm.ld @@ -79,6 +79,11 @@ OUTPUT_FORMAT(elf32-bigarm) .debug_loc 0 : { *(.debug_loc) } \ .debug_macinfo 0 : { *(.debug_macinfo) } +#define SECTION_fixed_vectors(_region_, _vma_, _lma_) \ + .fixed_vectors _vma_ : _lma_ \ + { FORCE_OUTPUT; KEEP (*(.fixed_vectors)) } \ + > _region_ + #define SECTION_rom_vectors(_region_, _vma_, _lma_) \ .rom_vectors _vma_ : _lma_ \ { FORCE_OUTPUT; KEEP (*(.vectors)) } \
--- a/packages/hal/arm/arch/current/src/vectors.S +++ b/packages/hal/arm/arch/current/src/vectors.S @@ -170,10 +170,13 @@ PTR(start) // This is copied to 0x28 for // location 0x40 is used for storing DRAM size if known // for some platforms. -// Other vectors - .balign 16 // Should be at 0x50 .balign 32 - + +// Other vectors - this may include "fixed" locations +#ifdef PLATFORM_VECTORS + PLATFORM_VECTORS +#endif + .text // Startup code which will get the machine into supervisor mode .global reset_vector
--- a/packages/hal/common/current/ChangeLog +++ b/packages/hal/common/current/ChangeLog @@ -1,3 +1,9 @@ +2000-06-04 Gary Thomas <gthomas@redhat.com> + + * cdl/hal.cdl: Support variant 'pkgconf' headers. This will allow + [variant] common symbols to be defined, rather than duplicating + them over all platforms using that variant. + 2000-05-25 Jesper Skov <jskov@redhat.com> * cdl/debugging.cdl: Allow thread support to included for ROM
--- a/packages/hal/common/current/cdl/hal.cdl +++ b/packages/hal/common/current/cdl/hal.cdl @@ -165,6 +165,9 @@ cdl_package CYGPKG_HAL { puts $::cdl_header "#include <pkgconf/system.h>" puts $::cdl_header "#include CYGBLD_HAL_TARGET_H" + puts $::cdl_header "#ifdef CYGBLD_HAL_VARIANT_H" + puts $::cdl_header "#include CYGBLD_HAL_VARIANT_H" + puts $::cdl_header "#endif" puts $::cdl_header "#include CYGBLD_HAL_PLATFORM_H" puts $::cdl_header "/****** proc output end ******/"
--- a/packages/hal/sh/cq7708/current/ChangeLog +++ b/packages/hal/sh/cq7708/current/ChangeLog @@ -1,3 +1,9 @@ +2000-06-05 John Dallaway <jld@redhat.com> + + * cdl/hal_sh_sh7708_cq7708.cdl: + + Tidy display strings. + 2000-05-31 Jesper Skov <jskov@redhat.com> * Munging sources to matches post-1.3.1 changes.
--- a/packages/hal/sh/cq7708/current/cdl/hal_sh_sh7708_cq7708.cdl +++ b/packages/hal/sh/cq7708/current/cdl/hal_sh_sh7708_cq7708.cdl @@ -41,13 +41,13 @@ # ==================================================================== cdl_package CYGPKG_HAL_SH_SH7708_CQ7708 { - display "Hitachi SH3 CQ7708 evaluation board" + display "CqREEK SH7708 board" parent CYGPKG_HAL_SH define_header hal_sh_sh7708_cq7708.h include_dir cyg/hal description " The cq HAL package provides the support needed to run - eCos on a Hitachi SH3 CQ7708 board." + eCos on a CqREEK SH7708 board." compile hal_diag.c plf_stub.c plf_misc.c
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/arch/current/ChangeLog @@ -0,0 +1,109 @@ +2000-05-26 Gary Thomas <gthomas@redhat.com> + + * src/vectors.S: Slight reorg of trap vectors (more readable). + +2000-05-25 John Dallaway <jld@redhat.com> + + * cdl/hal_v85x.cdl: Tidy display strings. + +2000-05-25 Gary Thomas <gthomas@redhat.com> + + * src/vectors.S: Handle different chips (number of interrupt + sources differs, exception table is altered, etc). + + * include/hal_intr.h: Actual interrupt layout now defined by + variant/platform since these differ depending on the chip. + +2000-05-03 Gary Thomas <gthomas@redhat.com> + + * include/hal_arch.h: New breakpoint instruction ("br *"). + +2000-04-14 Gary Thomas <gthomas@redhat.com> + + * src/hal_misc.c (exception_handler): Proper handling of nested + [watchdog] interrupts - don't corrupt GDB registers. + + * src/hal_mk_defs.c: Add some symbols required for NMI handling. + + * src/vectors.S (return_from_exception_or_interrupt): + Properly handle different cases for exception, NMI and ISR. + + * include/hal_intr.h (HAL_TRANSLATE_VECTOR): Ignore interrupt + chaining - doesn't happen on this hardware. + +2000-04-11 Gary Thomas <gthomas@redhat.com> + + * src/vectors.S (exception): Handle NMI. In particular, need to + have appropriate bits set so they clear and also get the state + from the proper save registers. + (exception): Register save was wrong - ROM only. + +2000-03-31 Gary Thomas <gthomas@redhat.com> + + * src/hal_mk_defs.c: Add definition for 'ep' register. + + * include/hal_intr.h: + * cdl/hal_nec.cdl: Add config option to choose between inline and + real functions for interrupt macros. + + * src/vectors.S: Tune up - use SLD/SST for smaller, faster code + in context load/save routines. Also remove IRQ trace/debug code. + +2000-03-30 Gary Thomas <gthomas@redhat.com> + + * src/vectors.S (do_interrupt): Can't use R13 across function calls. + This caused instability when turning on kernel instrumentation. + + * include/hal_intr.h: Use out-of-line code for interrupt functions + for tracing/testing. + + * src/vectors.S: Working support for separate interrupt stack. + Some debug/trace code left in. + + * src/hal_mk_defs.c: + * include/hal_arch.h: Documented API does not match actual GCC + register usage. Need to save R1/R2/R4/R5 for setjmp/longjmp. + +2000-03-27 Gary Thomas <gthomas@redhat.com> + + * src/vectors.S (do_interrupt): Pass regs to ISR & DSR. + + * include/basetype.h: Endian-ness was incorrect. + + * include/hal_arch.h: + * src/hal_mk_defs.c: Complete setjmp/longjmp support. + + * src/vectors.S: Add interrupt stack. + +2000-03-21 Gary Thomas <gthomas@redhat.com> + + * src/vectors.S (_hal_plf_reset_board): Add board reset function. + + * include/hal_arch.h (CYGHWR_TEST_PROGRAM_EXIT): Define RESET for ROM + based programs. + +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//===========================================================================
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/arch/current/cdl/hal_v85x.cdl @@ -0,0 +1,102 @@ +# ==================================================================== +# +# hal_v85x.cdl +# +# NEC architectural HAL package configuration data +# +# ==================================================================== +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Red Hat eCos Public License +# Version 1.1 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://www.redhat.com/ +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Configurable Operating System, +# released September 30, 1998. +# +# The Initial Developer of the Original Code is Red Hat. +# Portions created by Red Hat are +# Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +# All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +# ==================================================================== +######DESCRIPTIONBEGIN#### +# +# Author(s): gthomas +# Contributors: +# Date: 2000-03-09 +# +#####DESCRIPTIONEND#### +# +# ==================================================================== + +cdl_package CYGPKG_HAL_V85X { + display "NEC V85x architecture" + parent CYGPKG_HAL + hardware + include_dir cyg/hal + define_header hal_v85x.h + description " + The NEC architecture HAL package provides generic support + for this processor architecture. It is also necessary to + select a CPU variant and a specific target platform HAL + package." + + cdl_interface CYGINT_HAL_V85X_VARIANT { + display "Number of variant implementations in this configuration" + requires 1 == CYGINT_HAL_V85X_VARIANT + } + + compile hal_misc.c + + make -priority 1 { + <PREFIX>/include/cyg/hal/nec_offsets.inc : <PACKAGE>/src/hal_mk_defs.c + $(CC) $(CFLAGS) $(INCLUDE_PATH) -Wp,-MD,nec_offsets.tmp -o hal_mk_defs.tmp -S $< + fgrep .equ hal_mk_defs.tmp | sed s/#// > $@ + @echo $@ ": \\" > $(notdir $@).deps + @tail +2 nec_offsets.tmp >> $(notdir $@).deps + @echo >> $(notdir $@).deps + @rm nec_offsets.tmp hal_mk_defs.tmp + } + + make { + <PREFIX>/lib/vectors.o : <PACKAGE>/src/vectors.S + $(CC) -Wp,-MD,vectors.tmp $(INCLUDE_PATH) $(CFLAGS) -c -o $@ $< + @echo $@ ": \\" > $(notdir $@).deps + @tail +2 vectors.tmp >> $(notdir $@).deps + @echo >> $(notdir $@).deps + @rm vectors.tmp + } + + cdl_option CYGHWR_HAL_V85X_CPU_FREQ { + display "CPU frequency in MHz" + flavor data + legal_values 5 10 17 + default_value 17 + description " + This option contains the frequency of the CPU in MegaHertz. + Choose the frequency to match the processor you have. This + may affect thing like serial device, interval clock and + memory access speed settings." + } + + cdl_option CYGSEM_HAL_V85X_INLINE_INTERRUPT_FUNCTIONS { + display "In-line interrupt functions" + flavor bool + default_value 1 + description " + This option allows for the HAL interrupt functions, + e.g. HAL_ENABLE_INTERRUPTS() to be coded as either in-line + assembly code or real functions. The primary motivations + for the latter would be debugging, tracing, etc." + } +}
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/arch/current/include/basetype.h @@ -0,0 +1,67 @@ +#ifndef CYGONCE_HAL_BASETYPE_H +#define CYGONCE_HAL_BASETYPE_H + +//============================================================================= +// +// basetype.h +// +// Standard types for this architecture. +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg +// Contributors: nickg, gthomas +// Date: 1998-02-05 +// Purpose: Define architecture base types. +// Usage: Included by <cyg/infra/cyg_types.h>, do not use directly +// +//####DESCRIPTIONEND#### +// + +#include <pkgconf/hal.h> + +//----------------------------------------------------------------------------- +// Characterize the architecture + +#define CYG_BYTEORDER CYG_LSBFIRST // Little endian + +//----------------------------------------------------------------------------- +// NEC does not usually use labels with undersores. Some labels generated +// by the linker do, so add an underscore where required. + +#define CYG_LABEL_NAME(_name_) _##_name_ + +//----------------------------------------------------------------------------- +// Define the standard variable sizes + +// The NEC architecture uses the default definitions of the base types, +// so we do not need to define any here. + +//----------------------------------------------------------------------------- +#endif // CYGONCE_HAL_BASETYPE_H +// End of basetype.h
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/arch/current/include/hal_arch.h @@ -0,0 +1,269 @@ +#ifndef CYGONCE_HAL_HAL_ARCH_H +#define CYGONCE_HAL_HAL_ARCH_H + +//========================================================================== +// +// hal_arch.h +// +// Architecture specific abstractions +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg +// Contributors: nickg +// Date: 1999-02-17 +// Purpose: Define architecture abstractions +// Usage: #include <cyg/hal/hal_arch.h> +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include <pkgconf/hal.h> +#include <cyg/infra/cyg_type.h> + +#include <cyg/hal/var_arch.h> + +//-------------------------------------------------------------------------- +// Processor saved states: +// The layout of this structure is also defined in "arch.inc", for assembly +// code. Do not change this without changing that (or vice versa). + +#define CYG_HAL_NEC_REG CYG_WORD32 +#define CYG_HAL_NEC_REG_SIZE 4 + +typedef struct +{ + // These are common to all saved states + CYG_HAL_NEC_REG d[32]; /* Data regs */ + CYG_ADDRWORD pc; /* Program Counter */ + CYG_ADDRWORD psw; /* Status Reg */ + + // These are only saved for exceptions and interrupts + CYG_ADDRWORD cause; /* Exception cause register */ + CYG_ADDRWORD vector; /* Exception/interrupt number */ +} HAL_SavedRegisters; + +// +// Processor state register +// +#define CYGARC_PSW_ID 0x20 // Interrupt disable +#define CYGARC_PSW_EP 0x40 // Exception in progress +#define CYGARC_PSW_NP 0x80 // NMI in progress + +//-------------------------------------------------------------------------- +// Exception handling function. +// This function is defined by the kernel according to this prototype. It is +// invoked from the HAL to deal with any CPU exceptions that the HAL does +// not want to deal with itself. It usually invokes the kernel's exception +// delivery mechanism. + +externC void cyg_hal_deliver_exception( CYG_WORD code, CYG_ADDRWORD data ); + +//-------------------------------------------------------------------------- +// Bit manipulation macros + +externC cyg_uint32 hal_lsbit_index(cyg_uint32 mask); +externC cyg_uint32 hal_msbit_index(cyg_uint32 mask); + +#define HAL_LSBIT_INDEX(index, mask) index = hal_lsbit_index(mask); + +#define HAL_MSBIT_INDEX(index, mask) index = hal_msbit_index(mask); + +//-------------------------------------------------------------------------- +// Context Initialization + +#define CYG_HAL_NEC_INIT_PSW 0x00000000 + +// Initialize the context of a thread. +// Arguments: +// _sparg_ name of variable containing current sp, will be written with new sp +// _thread_ thread object address, passed as argument to entry point +// _entry_ entry point address. +// _id_ bit pattern used in initializing registers, for debugging. +#define HAL_THREAD_INIT_CONTEXT( _sparg_, _thread_, _entry_, _id_ ) \ +{ \ + register CYG_WORD _sp_ = ((CYG_WORD)_sparg_)-56; \ + register HAL_SavedRegisters *_regs_; \ + int _i_; \ + _sp_ = _sp_ & 0xFFFFFFF0; \ + _regs_ = (HAL_SavedRegisters *)(((_sp_) - sizeof(HAL_SavedRegisters))&0xFFFFFFF0); \ + for( _i_ = 0; _i_ < 32; _i_++ ) (_regs_)->d[_i_] = (_id_)|_i_; \ + (_regs_)->d[03] = (CYG_HAL_NEC_REG)(_sp_); /* SP = top of stack */ \ + (_regs_)->d[04] = (CYG_HAL_NEC_REG)(_sp_); /* GP = top of stack */ \ + (_regs_)->d[29] = (CYG_HAL_NEC_REG)(_sp_); /* FP = top of stack */ \ + (_regs_)->d[06] = (CYG_HAL_NEC_REG)(_thread_); /* R6 = arg1 = thread ptr */ \ + (_regs_)->d[31] = (CYG_HAL_NEC_REG)(_entry_); /* RA(d[31]) = entry point*/ \ + (_regs_)->pc = (CYG_WORD)(_entry_); /* PC = entry point */ \ + (_regs_)->psw = CYG_HAL_NEC_INIT_PSW; \ + _sparg_ = (CYG_ADDRESS)_regs_; \ +} + +//-------------------------------------------------------------------------- +// Context switch macros. +// The arguments are pointers to locations where the stack pointer +// of the current thread is to be stored, and from where the sp of the +// next thread is to be fetched. + +externC void hal_thread_switch_context( CYG_ADDRESS to, CYG_ADDRESS from ); +externC void hal_thread_load_context( CYG_ADDRESS to ) + __attribute__ ((noreturn)); + +#define HAL_THREAD_SWITCH_CONTEXT(_fspptr_,_tspptr_) \ + hal_thread_switch_context( (CYG_ADDRESS)_tspptr_, \ + (CYG_ADDRESS)_fspptr_); + +#define HAL_THREAD_LOAD_CONTEXT(_tspptr_) \ + hal_thread_load_context( (CYG_ADDRESS)_tspptr_ ); + +//-------------------------------------------------------------------------- +// Execution reorder barrier. +// When optimizing the compiler can reorder code. In multithreaded systems +// where the order of actions is vital, this can sometimes cause problems. +// This macro may be inserted into places where reordering should not happen. +// The "memory" keyword is potentially unnecessary, but it is harmless to +// keep it. + +#define HAL_REORDER_BARRIER() asm volatile ( "" : : : "memory" ) + +//-------------------------------------------------------------------------- +// Breakpoint support +// HAL_BREAKPOINT() is a code sequence that will cause a breakpoint to +// happen if executed. +// HAL_BREAKINST is the value of the breakpoint instruction and +// HAL_BREAKINST_SIZE is its size in bytes. + +#define HAL_BREAKPOINT(_label_) \ +asm volatile (" .globl _" #_label_ ";" \ + "_"#_label_":" \ + " br _"#_label_ \ + ); + +#define HAL_BREAKINST 0x0585 +#define HAL_BREAKINST_SIZE 2 + +//-------------------------------------------------------------------------- +// Thread register state manipulation for GDB support. + +// Default to a 32 bit register size for GDB register dumps. +#ifndef CYG_HAL_GDB_REG +#define CYG_HAL_GDB_REG CYG_WORD32 +#endif + +// Translate a stack pointer as saved by the thread context macros above into +// a pointer to a HAL_SavedRegisters structure. +#define HAL_THREAD_GET_SAVED_REGISTERS( _sp_, _regs_ ) \ + (_regs_) = (HAL_SavedRegisters *)(_sp_) + + +//-------------------------------------------------------------------------- +// HAL setjmp + +typedef struct { + cyg_uint32 sp; + cyg_uint32 gp; + cyg_uint32 tp; + cyg_uint32 r1,r2,r4,r5; + cyg_uint32 r20, r21, r22, r23; + cyg_uint32 r24, r25, r26, r27, r28; + cyg_uint32 fp; + cyg_uint32 ep; + cyg_uint32 lp; +} hal_jmp_buf_t; + +typedef cyg_uint32 hal_jmp_buf[sizeof(hal_jmp_buf_t) / sizeof(cyg_uint32)]; + +externC int hal_setjmp(hal_jmp_buf env); +externC void hal_longjmp(hal_jmp_buf env, int val); + +//------------------------------------------------------------------------- +// Idle thread code. +// This macro is called in the idle thread loop, and gives the HAL the +// chance to insert code. Typical idle thread behaviour might be to halt the +// processor. + +externC void hal_idle_thread_action(cyg_uint32 loop_count); + +#define HAL_IDLE_THREAD_ACTION(_count_) hal_idle_thread_action(_count_) + +//-------------------------------------------------------------------------- +// Hardware specific test exit code. This is defined here simply to make +// setting a breakpoint on this function viable. +// +#define CYGHWR_TEST_PROGRAM_EXIT() \ +{ \ + static volatile int ctr; \ + while (1) ctr++; \ +} + +//-------------------------------------------------------------------------- +// Minimal and sensible stack sizes: the intention is that applications +// will use these to provide a stack size in the first instance prior to +// proper analysis. Idle thread stack should be this big. + +// THESE ARE NOT INTENDED TO BE MICROMETRICALLY ACCURATE FIGURES. +// THEY ARE HOWEVER ENOUGH TO START PROGRAMMING. +// YOU MUST MAKE YOUR STACKS LARGER IF YOU HAVE LARGE "AUTO" VARIABLES! + +// This is not a config option because it should not be adjusted except +// under "enough rope" sort of disclaimers. + +// Typical case stack frame size: return link + 4 pushed registers + some locals. +#define CYGNUM_HAL_STACK_FRAME_SIZE (48) + +// Stack needed for a context switch: +#define CYGNUM_HAL_STACK_CONTEXT_SIZE (((32+12)*CYG_HAL_NEC_REG_SIZE)+(32*4)) + + +// Interrupt + call to ISR, interrupt_end() and the DSR +#define CYGNUM_HAL_STACK_INTERRUPT_SIZE (4+2*CYGNUM_HAL_STACK_CONTEXT_SIZE) + +#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK + +// An interrupt stack which is large enough for all possible interrupt +// conditions (and only used for that purpose) exists. "User" stacks +// can be much smaller + +#define CYGNUM_HAL_STACK_SIZE_MINIMUM (CYGNUM_HAL_STACK_CONTEXT_SIZE+ \ + CYGNUM_HAL_STACK_INTERRUPT_SIZE*2+ \ + CYGNUM_HAL_STACK_FRAME_SIZE*8) +#define CYGNUM_HAL_STACK_SIZE_TYPICAL (CYGNUM_HAL_STACK_SIZE_MINIMUM+1024) + +#else // CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK + +// No separate interrupt stack exists. Make sure all threads contain +// a stack sufficiently large. + +#define CYGNUM_HAL_STACK_SIZE_MINIMUM (4096) +#define CYGNUM_HAL_STACK_SIZE_TYPICAL (4096) + +#endif + +//-------------------------------------------------------------------------- +#endif // CYGONCE_HAL_HAL_ARCH_H +// End of hal_arch.h
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/arch/current/include/hal_cache.h @@ -0,0 +1,59 @@ +#ifndef CYGONCE_HAL_CACHE_H +#define CYGONCE_HAL_CACHE_H + +//============================================================================= +// +// hal_cache.h +// +// HAL cache control API +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg +// Contributors: nickg +// Date: 1998-02-17 +// Purpose: Cache control API +// Description: The macros defined here provide the HAL APIs for handling +// cache control operations. +// Usage: +// #include <cyg/hal/hal_cache.h> +// ... +// +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include <pkgconf/hal.h> +#include <cyg/infra/cyg_type.h> + +#include <cyg/hal/var_cache.h> + +//----------------------------------------------------------------------------- +#endif // ifndef CYGONCE_HAL_CACHE_H +// End of hal_cache.h
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/arch/current/include/hal_intr.h @@ -0,0 +1,253 @@ +#ifndef CYGONCE_HAL_HAL_INTR_H +#define CYGONCE_HAL_HAL_INTR_H + +//========================================================================== +// +// hal_intr.h +// +// HAL Interrupt and clock support +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg +// Contributors: nickg, jskov, +// gthomas, jlarmour +// Date: 1999-02-16 +// Purpose: Define Interrupt support +// Description: The macros defined here provide the HAL APIs for handling +// interrupts and the clock. +// +// Usage: +// #include <cyg/hal/hal_intr.h> +// ... +// +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include <pkgconf/hal.h> +#include <pkgconf/hal_v85x.h> + +#include <cyg/infra/cyg_type.h> +#include <cyg/hal/hal_io.h> + +#include <cyg/hal/var_intr.h> + +//-------------------------------------------------------------------------- +// Static data used by HAL + +// ISR tables +externC volatile CYG_ADDRESS hal_interrupt_handlers[CYGNUM_HAL_ISR_COUNT]; +externC volatile CYG_ADDRWORD hal_interrupt_data[CYGNUM_HAL_ISR_COUNT]; +externC volatile CYG_ADDRESS hal_interrupt_objects[CYGNUM_HAL_ISR_COUNT]; + +// VSR table +externC volatile CYG_ADDRESS hal_vsr_table[CYGNUM_HAL_VSR_COUNT]; + +//-------------------------------------------------------------------------- +// Default ISR +// The #define is used to test whether this routine exists, and to allow +// us to call it. + +externC cyg_uint32 hal_default_isr(CYG_ADDRWORD vector, CYG_ADDRWORD data); + +#define HAL_DEFAULT_ISR hal_default_isr + +//-------------------------------------------------------------------------- +// Interrupt state storage + +typedef cyg_uint32 CYG_INTERRUPT_STATE; + +//-------------------------------------------------------------------------- +// Interrupt control macros + +externC cyg_uint32 hal_disable_interrupts(void); +externC void hal_enable_interrupts(void); +externC void hal_restore_interrupts(cyg_uint32); +externC cyg_uint32 hal_query_interrupts(void); + +#ifdef CYGSEM_HAL_NEC_INLINE_INTERRUPT_FUNCTIONS +#define HAL_DISABLE_INTERRUPTS(_old_) \ + CYG_MACRO_START \ + asm volatile ( \ + "stsr PSW,%0;" \ + "di" \ + : "=r"(_old_)); \ + CYG_MACRO_END + +#define HAL_ENABLE_INTERRUPTS() \ + CYG_MACRO_START \ + asm volatile ( \ + "ei" \ + : ); \ + CYG_MACRO_END + +#define HAL_RESTORE_INTERRUPTS(_old_) \ + CYG_MACRO_START \ + asm volatile ( \ + "ldsr %0,PSW" \ + : \ + : "r" (_old_)); \ + CYG_MACRO_END +#else +#define HAL_DISABLE_INTERRUPTS(_old_) _old_ = hal_disable_interrupts() +#define HAL_ENABLE_INTERRUPTS() hal_enable_interrupts() +#define HAL_RESTORE_INTERRUPTS(_old_) hal_restore_interrupts(_old_) +#endif + +#define HAL_QUERY_INTERRUPTS( _state_ ) _state_ = hal_query_interrupts() + +//-------------------------------------------------------------------------- +// Routine to execute DSRs using separate interrupt stack + +#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK +externC void hal_interrupt_stack_call_pending_DSRs(void); +#define HAL_INTERRUPT_STACK_CALL_PENDING_DSRS() \ + hal_interrupt_stack_call_pending_DSRs() + +// these are offered solely for stack usage testing +// if they are not defined, then there is no interrupt stack. +#define HAL_INTERRUPT_STACK_BASE cyg_interrupt_stack_base +#define HAL_INTERRUPT_STACK_TOP cyg_interrupt_stack +// use them to declare these extern however you want: +// extern char HAL_INTERRUPT_STACK_BASE[]; +// extern char HAL_INTERRUPT_STACK_TOP[]; +// is recommended +#endif + +//-------------------------------------------------------------------------- +// Vector translation. +// For chained interrupts we only have a single vector though which all +// are passed. For unchained interrupts we have a vector per interrupt. +// Note: this hardware does not have/support chained interrupts. + +#ifndef HAL_TRANSLATE_VECTOR +#define HAL_TRANSLATE_VECTOR(_vector_,_index_) (_index_) = (_vector_-CYGNUM_HAL_ISR_MIN) +#endif + +//-------------------------------------------------------------------------- +// Interrupt and VSR attachment macros + +#define HAL_INTERRUPT_IN_USE( _vector_, _state_) \ + CYG_MACRO_START \ + cyg_uint32 _index_; \ + HAL_TRANSLATE_VECTOR ((_vector_), _index_); \ + \ + if( hal_interrupt_handlers[_index_] == (CYG_ADDRESS)HAL_DEFAULT_ISR ) \ + (_state_) = 0; \ + else \ + (_state_) = 1; \ + CYG_MACRO_END + +#define HAL_INTERRUPT_ATTACH( _vector_, _isr_, _data_, _object_ ) \ +{ \ + cyg_uint32 _index_; \ + HAL_TRANSLATE_VECTOR( _vector_, _index_ ); \ + \ + if( hal_interrupt_handlers[_index_] == (CYG_ADDRESS)HAL_DEFAULT_ISR ) \ + { \ + hal_interrupt_handlers[_index_] = (CYG_ADDRESS)_isr_; \ + hal_interrupt_data[_index_] = (CYG_ADDRWORD)_data_; \ + hal_interrupt_objects[_index_] = (CYG_ADDRESS)_object_; \ + } \ +} + +#define HAL_INTERRUPT_DETACH( _vector_, _isr_ ) \ +{ \ + cyg_uint32 _index_; \ + HAL_TRANSLATE_VECTOR( _vector_, _index_ ); \ + \ + if( hal_interrupt_handlers[_index_] == (CYG_ADDRESS)_isr_ ) \ + { \ + hal_interrupt_handlers[_index_] = (CYG_ADDRESS)HAL_DEFAULT_ISR; \ + hal_interrupt_data[_index_] = 0; \ + hal_interrupt_objects[_index_] = 0; \ + } \ +} + +#define HAL_VSR_GET( _vector_, _pvsr_ ) \ + *(_pvsr_) = (void (*)())hal_vsr_table[_vector_]; + + +#define HAL_VSR_SET( _vector_, _vsr_, _poldvsr_ ) CYG_MACRO_START \ + if( _poldvsr_ != NULL) \ + *(CYG_ADDRESS *)_poldvsr_ = (CYG_ADDRESS)hal_vsr_table[_vector_]; \ + hal_vsr_table[_vector_] = (CYG_ADDRESS)_vsr_; \ +CYG_MACRO_END + +// This is an ugly name, but what it means is: grab the VSR back to eCos +// internal handling, or if you like, the default handler. But if +// cooperating with GDB and CygMon, the default behaviour is to pass most +// exceptions to CygMon. This macro undoes that so that eCos handles the +// exception. So use it with care. + +externC void __default_exception_vsr(void); +externC void __default_interrupt_vsr(void); + +#define HAL_VSR_SET_TO_ECOS_HANDLER( _vector_, _poldvsr_ ) CYG_MACRO_START \ + HAL_VSR_SET( _vector_, _vector_ == CYGNUM_HAL_VECTOR_INTERRUPT \ + ? (CYG_ADDRESS)__default_interrupt_vsr \ + : (CYG_ADDRESS)__default_exception_vsr, \ + _poldvsr_ ); \ +CYG_MACRO_END + +//-------------------------------------------------------------------------- +// Interrupt controller access + +externC void hal_interrupt_mask(int); +externC void hal_interrupt_unmask(int); +externC void hal_interrupt_acknowledge(int); + +#define HAL_INTERRUPT_MASK( _vector_ ) hal_interrupt_mask(_vector_) +#define HAL_INTERRUPT_UNMASK( _vector_ ) hal_interrupt_unmask(_vector_) +#define HAL_INTERRUPT_ACKNOWLEDGE( _vector_ ) hal_interrupt_acknowledge(_vector_) + +#define HAL_INTERRUPT_CONFIGURE( _vector_, _level_, _up_ ) +#define HAL_INTERRUPT_SET_LEVEL( _vector_, _level_ ) + +//-------------------------------------------------------------------------- +// Clock control. + +externC CYG_WORD32 cyg_hal_clock_period; +externC void hal_clock_initialize(cyg_int32); +externC void hal_clock_reset(int, cyg_uint32); +externC cyg_uint32 hal_clock_read(void); + +#define HAL_CLOCK_INITIALIZE( _period_ ) hal_clock_initialize(_period_) +#define HAL_CLOCK_RESET( _vector_, _period_ ) hal_clock_reset(_vector_,_period_) +#define HAL_CLOCK_READ( _pvalue_ ) *(_pvalue_) = hal_clock_read() + +#if defined(CYGVAR_KERNEL_COUNTERS_CLOCK_LATENCY) && \ + !defined(HAL_CLOCK_LATENCY) +#define HAL_CLOCK_LATENCY( _pvalue_ ) HAL_CLOCK_READ(_pvalue_) +#endif + +//-------------------------------------------------------------------------- +#endif // ifndef CYGONCE_HAL_HAL_INTR_H +// End of hal_intr.h
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/arch/current/include/hal_io.h @@ -0,0 +1,140 @@ +#ifndef CYGONCE_HAL_HAL_IO_H +#define CYGONCE_HAL_HAL_IO_H + +//============================================================================= +// +// hal_io.h +// +// HAL device IO register support. +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg +// Contributors: nickg +// Date: 1998-02-17 +// Purpose: Define IO register support +// Description: The macros defined here provide the HAL APIs for handling +// device IO control registers. +// +// Usage: +// #include <cyg/hal/hal_io.h> +// ... +// +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include <pkgconf/hal.h> + +#include <cyg/infra/cyg_type.h> + +#include <cyg/hal/plf_io.h> + +//----------------------------------------------------------------------------- +// IO Register address. +// This type is for recording the address of an IO register. + +typedef volatile CYG_ADDRWORD HAL_IO_REGISTER; + +//----------------------------------------------------------------------------- +// BYTE Register access. +// Individual and vectorized access to 8 bit registers. + +#define HAL_READ_UINT8( _register_, _value_ ) \ + ((_value_) = *((volatile CYG_BYTE *)(_register_))) + +#define HAL_WRITE_UINT8( _register_, _value_ ) \ + (*((volatile CYG_BYTE *)(_register_)) = (_value_)) + +#define HAL_READ_UINT8_VECTOR( _register_, _buf_, _count_, _step_ ) \ +{ \ + cyg_count32 _i_,_j_; \ + for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \ + (_buf_)[_i_] = ((volatile CYG_BYTE *)(_register_))[_j_]; \ +} + +#define HAL_WRITE_UINT8_VECTOR( _register_, _buf_, _count_, _step_ ) \ +{ \ + cyg_count32 _i_,_j_; \ + for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \ + ((volatile CYG_BYTE *)(_register_))[_j_] = (_buf_)[_i_]; \ +} + + +//----------------------------------------------------------------------------- +// 16 bit access. +// Individual and vectorized access to 16 bit registers. + +#define HAL_READ_UINT16( _register_, _value_ ) \ + ((_value_) = *((volatile CYG_WORD16 *)(_register_))) + +#define HAL_WRITE_UINT16( _register_, _value_ ) \ + (*((volatile CYG_WORD16 *)(_register_)) = (_value_)) + +#define HAL_READ_UINT16_VECTOR( _register_, _buf_, _count_, _step_ ) \ +{ \ + cyg_count32 _i_,_j_; \ + for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \ + (_buf_)[_i_] = ((volatile CYG_WORD16 *)(_register_))[_j_]; \ +} + +#define HAL_WRITE_UINT16_VECTOR( _register_, _buf_, _count_, _step_ ) \ +{ \ + cyg_count32 _i_,_j_; \ + for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \ + ((volatile CYG_WORD16 *)(_register_))[_j_] = (_buf_)[_i_]; \ +} + +//----------------------------------------------------------------------------- +// 32 bit access. +// Individual and vectorized access to 32 bit registers. + +#define HAL_READ_UINT32( _register_, _value_ ) \ + ((_value_) = *((volatile CYG_WORD32 *)(_register_))) + +#define HAL_WRITE_UINT32( _register_, _value_ ) \ + (*((volatile CYG_WORD32 *)(_register_)) = (_value_)) + +#define HAL_READ_UINT32_VECTOR( _register_, _buf_, _count_, _step_ ) \ +{ \ + cyg_count32 _i_,_j_; \ + for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \ + (_buf_)[_i_] = ((volatile CYG_WORD32 *)(_register_))[_j_]; \ +} + +#define HAL_WRITE_UINT32_VECTOR( _register_, _buf_, _count_, _step_ ) \ +{ \ + cyg_count32 _i_,_j_; \ + for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \ + ((volatile CYG_WORD32 *)(_register_))[_j_] = (_buf_)[_i_]; \ +} + +//----------------------------------------------------------------------------- +#endif // ifndef CYGONCE_HAL_HAL_IO_H +// End of hal_io.h
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/arch/current/include/nec-stub.h @@ -0,0 +1,111 @@ +#ifndef CYGONCE_HAL_NEC_STUB_H +#define CYGONCE_HAL_NEC_STUB_H +//======================================================================== +// +// nec-stub.h +// +// NEC-specific definitions for generic stub +// +//======================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//======================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): Red Hat, nickg +// Contributors: Red Hat, nickg +// Date: 1998-06-08 +// Purpose: +// Description: NEC-specific definitions for generic stub +// Usage: +// +//####DESCRIPTIONEND#### +// +//======================================================================== + + +#include <pkgconf/system.h> + +#ifdef __cplusplus +extern "C" { +#endif + +#define NUMREGS 66 +#define REGSIZE(X) 4 +typedef unsigned long target_register_t; + +enum regnames { + R0, R1, SP, R3, R4, R5, R6, R7, + R8, R9 , R10, R11, R12, R13, R14, R15, + R16, R17, R18, R19, R20, R21, R22, R23, + R24, R25, R26, R27, R28, R29, R30, R31, + EIPC, EIPSW, FEPC, FEPSW, ECR, PSW, SR6, SR7, + SR8, SR9 , SR10, SR11, SR12, SR13, SR14, SR15, + SR16, SR17, SR18, SR19, SR20, SR21, SR22, SR23, + SR24, SR25, SR26, SR27, SR28, SR29, SR30, SR31, + PC, FP +}; + +typedef enum regnames regnames_t; + +/* Given a trap value TRAP, return the corresponding signal. */ +extern int __computeSignal (unsigned int trap_number); + +/* Return the SPARC trap number corresponding to the last-taken trap. */ +extern int __get_trap_number (void); + +/* Return the currently-saved value corresponding to register REG. */ +extern target_register_t get_register (regnames_t reg); + +/* Store VALUE in the register corresponding to WHICH. */ +extern void put_register (regnames_t which, target_register_t value); + +/* Set the currently-saved pc register value to PC. This also updates NPC + as needed. */ +extern void set_pc (target_register_t pc); + +/* Set things up so that the next user resume will execute one instruction. + This may be done by setting breakpoints or setting a single step flag + in the saved user registers, for example. */ +void __single_step (void); + +/* Clear the single-step state. */ +void __clear_single_step (void); + +/* If the breakpoint we hit is in the breakpoint() instruction, return a + non-zero value. */ +extern int __is_breakpoint_function (void); + +/* Skip the current instruction. */ +extern void __skipinst (void); + +extern void __install_breakpoints (void); + +extern void __clear_breakpoints (void); + +#ifdef __cplusplus +} /* extern "C" */ +#endif + +#endif // ifndef CYGONCE_HAL_NEC_STUB_H
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/arch/current/src/hal_misc.c @@ -0,0 +1,211 @@ +/*========================================================================== +// +// hal_misc.c +// +// HAL miscellaneous functions +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg, gthomas +// Contributors: nickg, gthomas +// Date: 1999-02-20 +// Purpose: HAL miscellaneous functions +// Description: This file contains miscellaneous functions provided by the +// HAL. +// +//####DESCRIPTIONEND#### +// +//=========================================================================*/ + +#include <pkgconf/hal.h> +#include <pkgconf/hal_v85x.h> +#ifdef CYGPKG_KERNEL +#include <pkgconf/kernel.h> +#endif +#ifdef CYGPKG_CYGMON +#include <pkgconf/cygmon.h> +#endif + +#include <cyg/infra/cyg_type.h> +#include <cyg/infra/cyg_trac.h> // tracing macros +#include <cyg/infra/cyg_ass.h> // assertion macros +#include <cyg/infra/diag.h> + +#include <cyg/hal/hal_arch.h> // HAL header +#include <cyg/hal/hal_intr.h> // HAL header + +/*------------------------------------------------------------------------*/ +/* First level C exception handler. */ + +externC void __handle_exception (void); + +externC HAL_SavedRegisters *_hal_registers; +extern void *__mem_fault_handler; + +void +exception_handler(HAL_SavedRegisters *regs) +{ +#if defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS) && !defined(CYGPKG_CYGMON) +// diag_printf("Exception! Frame: %x\n", regs); +// show_regs(regs); + static int gdb_active; + if (gdb_active == 0) { + gdb_active = 1; + _hal_registers = regs; + __handle_exception(); + gdb_active = 0; + } + +#elif defined(CYGPKG_KERNEL_EXCEPTIONS) + + // We should decode the vector and pass a more appropriate + // value as the second argument. For now we simply pass a + // pointer to the saved registers. We should also divert + // breakpoint and other debug vectors into the debug stubs. + + cyg_hal_deliver_exception( regs->vector, (CYG_ADDRWORD)regs ); + +#else + + CYG_FAIL("Exception!!!"); + +#endif + + return; +} + +/*------------------------------------------------------------------------*/ +/* C++ support - run initial constructors */ + +#ifdef CYGSEM_HAL_STOP_CONSTRUCTORS_ON_FLAG +cyg_bool cyg_hal_stop_constructors; +#endif + +typedef void (*pfunc) (void); +extern pfunc __CTOR_LIST__[]; +extern pfunc __CTOR_END__[]; + +void +cyg_hal_invoke_constructors (void) +{ + +#ifdef CYGSEM_HAL_STOP_CONSTRUCTORS_ON_FLAG + static pfunc *p = &__CTOR_END__[-1]; + + cyg_hal_stop_constructors = 0; + for (; p >= __CTOR_LIST__; p--) { + (*p) (); + if (cyg_hal_stop_constructors) { + p--; + break; + } + } +#else + pfunc *p; + + for (p = &__CTOR_END__[-1]; p >= __CTOR_LIST__; p--) { + (*p) (); + } +#endif +} + +/*------------------------------------------------------------------------*/ +/* default ISR */ + +externC cyg_uint32 +hal_default_isr(CYG_ADDRWORD vector, CYG_ADDRWORD data) +{ + CYG_TRACE1(true, "Interrupt: %d", vector); + +#ifndef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS +#ifdef CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT +#ifdef CYGDBG_HAL_CTRLC_ISR + // then see if it is an incoming character interrupt and break + // into the stub ROM if the char is a ^C. + if ( CYGDBG_HAL_CTRLC_ISR( vector, data ) ) + return 1; // interrupt handled +#endif +#endif +#endif + + diag_printf("Spurious Interrupt!!! - vector: %d, data: %x\n", vector, + data); + CYG_FAIL("Spurious Interrupt!!!"); + return 0; +} + +/*------------------------------------------------------------------------*/ +/* Idle thread action */ + +void +hal_idle_thread_action( cyg_uint32 count ) +{ +} + +/*-------------------------------------------------------------------------*/ +/* Misc functions */ + +cyg_uint32 +hal_lsbit_index(cyg_uint32 mask) +{ + int i; + for (i = 0; i < 32; i++) { + if (mask & (1<<i)) return ((cyg_uint32)i); + } + return ((cyg_uint32)-1); +} + +cyg_uint32 +hal_msbit_index(cyg_uint32 mask) +{ + int i; + for (i = 32; i >= 0; i++) { + if (mask & (1<<i)) return ((cyg_uint32)i); + } + return ((cyg_uint32)-1); +} + +void +show_regs(HAL_SavedRegisters *regs) +{ + int i; + diag_printf("Regs\n"); + for (i = 0; i < 32; i++) { + if ((i % 8) == 0) { + diag_printf("R%2d: ", i); + } + diag_printf("0x%08x ", regs->d[i]); + if ((i % 8) == 7) { + diag_printf("\n"); + } + } + diag_printf("PC = %x, PSW = %x\n", regs->pc, regs->psw); +} + +/*------------------------------------------------------------------------*/ +// EOF hal_misc.c
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/arch/current/src/hal_mk_defs.c @@ -0,0 +1,161 @@ +//========================================================================== +// +// hal_mk_defs.c +// +// HAL (architecture) "make defs" program +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas, jskov +// Date: 2000-02-21 +// Purpose: SH architecture dependent definition generator +// Description: This file contains code that can be compiled by the target +// compiler and used to generate machine specific definitions +// suitable for use in assembly code. +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include <pkgconf/hal.h> + +#include <cyg/hal/hal_arch.h> // HAL header +#include <cyg/hal/hal_intr.h> // HAL header +#ifdef CYGPKG_KERNEL +# include <pkgconf/kernel.h> +# include <cyg/kernel/instrmnt.h> +#endif + +/* + * This program is used to generate definitions needed by + * assembly language modules. + * + * This technique was first used in the OSF Mach kernel code: + * generate asm statements containing #defines, + * compile this file to assembler, and then extract the + * #defines from the assembly-language output. + */ + +#define DEFINE(sym, val) \ + asm volatile("\n\t.equ\t" #sym ",%0" : : "i" (val)) + +int +main(void) +{ + // setjmp/longjmp buffer + DEFINE(CYGARC_JMPBUF_SP, offsetof(hal_jmp_buf_t, sp)); + DEFINE(CYGARC_JMPBUF_GP, offsetof(hal_jmp_buf_t, gp)); + DEFINE(CYGARC_JMPBUF_TP, offsetof(hal_jmp_buf_t, tp)); + DEFINE(CYGARC_JMPBUF_R1, offsetof(hal_jmp_buf_t, r1)); + DEFINE(CYGARC_JMPBUF_R2, offsetof(hal_jmp_buf_t, r2)); + DEFINE(CYGARC_JMPBUF_R4, offsetof(hal_jmp_buf_t, r4)); + DEFINE(CYGARC_JMPBUF_R5, offsetof(hal_jmp_buf_t, r5)); + DEFINE(CYGARC_JMPBUF_R20, offsetof(hal_jmp_buf_t, r20)); + DEFINE(CYGARC_JMPBUF_R21, offsetof(hal_jmp_buf_t, r21)); + DEFINE(CYGARC_JMPBUF_R22, offsetof(hal_jmp_buf_t, r22)); + DEFINE(CYGARC_JMPBUF_R23, offsetof(hal_jmp_buf_t, r23)); + DEFINE(CYGARC_JMPBUF_R24, offsetof(hal_jmp_buf_t, r24)); + DEFINE(CYGARC_JMPBUF_R25, offsetof(hal_jmp_buf_t, r25)); + DEFINE(CYGARC_JMPBUF_R26, offsetof(hal_jmp_buf_t, r26)); + DEFINE(CYGARC_JMPBUF_R27, offsetof(hal_jmp_buf_t, r27)); + DEFINE(CYGARC_JMPBUF_R28, offsetof(hal_jmp_buf_t, r28)); + DEFINE(CYGARC_JMPBUF_FP, offsetof(hal_jmp_buf_t, fp)); + DEFINE(CYGARC_JMPBUF_EP, offsetof(hal_jmp_buf_t, ep)); + DEFINE(CYGARC_JMPBUF_LP, offsetof(hal_jmp_buf_t, lp)); + + DEFINE(CYGARC_JMPBUF_SIZE, sizeof(hal_jmp_buf_t)); + + // Exception/interrupt/context save buffer + DEFINE(CYGARC_REG_R1, offsetof(HAL_SavedRegisters, d[1])); + DEFINE(CYGARC_REG_R2, offsetof(HAL_SavedRegisters, d[2])); + DEFINE(CYGARC_REG_R3, offsetof(HAL_SavedRegisters, d[3])); + DEFINE(CYGARC_REG_SP, offsetof(HAL_SavedRegisters, d[3])); + DEFINE(CYGARC_REG_R4, offsetof(HAL_SavedRegisters, d[4])); + DEFINE(CYGARC_REG_R5, offsetof(HAL_SavedRegisters, d[5])); + DEFINE(CYGARC_REG_R6, offsetof(HAL_SavedRegisters, d[6])); + DEFINE(CYGARC_REG_R7, offsetof(HAL_SavedRegisters, d[7])); + DEFINE(CYGARC_REG_R8, offsetof(HAL_SavedRegisters, d[8])); + DEFINE(CYGARC_REG_R9, offsetof(HAL_SavedRegisters, d[9])); + DEFINE(CYGARC_REG_R10, offsetof(HAL_SavedRegisters, d[10])); + DEFINE(CYGARC_REG_R11, offsetof(HAL_SavedRegisters, d[11])); + DEFINE(CYGARC_REG_R12, offsetof(HAL_SavedRegisters, d[12])); + DEFINE(CYGARC_REG_R13, offsetof(HAL_SavedRegisters, d[13])); + DEFINE(CYGARC_REG_R14, offsetof(HAL_SavedRegisters, d[14])); + DEFINE(CYGARC_REG_R15, offsetof(HAL_SavedRegisters, d[15])); + DEFINE(CYGARC_REG_R16, offsetof(HAL_SavedRegisters, d[16])); + DEFINE(CYGARC_REG_R17, offsetof(HAL_SavedRegisters, d[17])); + DEFINE(CYGARC_REG_R18, offsetof(HAL_SavedRegisters, d[18])); + DEFINE(CYGARC_REG_R19, offsetof(HAL_SavedRegisters, d[19])); + DEFINE(CYGARC_REG_R20, offsetof(HAL_SavedRegisters, d[20])); + DEFINE(CYGARC_REG_R21, offsetof(HAL_SavedRegisters, d[21])); + DEFINE(CYGARC_REG_R22, offsetof(HAL_SavedRegisters, d[22])); + DEFINE(CYGARC_REG_R23, offsetof(HAL_SavedRegisters, d[23])); + DEFINE(CYGARC_REG_R24, offsetof(HAL_SavedRegisters, d[24])); + DEFINE(CYGARC_REG_R25, offsetof(HAL_SavedRegisters, d[25])); + DEFINE(CYGARC_REG_R26, offsetof(HAL_SavedRegisters, d[26])); + DEFINE(CYGARC_REG_R27, offsetof(HAL_SavedRegisters, d[27])); + DEFINE(CYGARC_REG_R28, offsetof(HAL_SavedRegisters, d[28])); + DEFINE(CYGARC_REG_R29, offsetof(HAL_SavedRegisters, d[29])); + DEFINE(CYGARC_REG_R30, offsetof(HAL_SavedRegisters, d[30])); + DEFINE(CYGARC_REG_R31, offsetof(HAL_SavedRegisters, d[31])); + DEFINE(CYGARC_REG_EP, offsetof(HAL_SavedRegisters, d[30])); + DEFINE(CYGARC_REG_LP, offsetof(HAL_SavedRegisters, d[31])); + DEFINE(CYGARC_REG_PSW, offsetof(HAL_SavedRegisters, psw)); + DEFINE(CYGARC_REG_PC, offsetof(HAL_SavedRegisters, pc)); + + // Below only saved on exceptions/interrupts + DEFINE(CYGARC_REG_CAUSE, offsetof(HAL_SavedRegisters, cause)); + DEFINE(CYGARC_REG_VECTOR, offsetof(HAL_SavedRegisters, vector)); + + DEFINE(CYGARC_EXCEPTION_FRAME_SIZE, sizeof(HAL_SavedRegisters)); + + // Some other exception related definitions + DEFINE(CYGNUM_HAL_ISR_MIN, CYGNUM_HAL_ISR_MIN); + DEFINE(CYGNUM_HAL_ISR_COUNT, CYGNUM_HAL_ISR_COUNT); + DEFINE(CYGNUM_HAL_VSR_MAX, CYGNUM_HAL_VSR_MAX); + DEFINE(CYGNUM_HAL_VSR_COUNT, CYGNUM_HAL_VSR_COUNT); + DEFINE(CYGNUM_HAL_EXCEPTION_COUNT, CYGNUM_HAL_EXCEPTION_COUNT); + DEFINE(CYGNUM_HAL_VECTOR_WATCHDOG_TIMER, CYGNUM_HAL_VECTOR_WATCHDOG_TIMER); + DEFINE(CYGNUM_HAL_VECTOR_TRAP0, CYGNUM_HAL_VECTOR_TRAP0); + DEFINE(CYGNUM_HAL_VECTOR_TRAP1, CYGNUM_HAL_VECTOR_TRAP1); + DEFINE(CYGNUM_HAL_VECTOR_ILLEGAL_OPCODE, CYGNUM_HAL_VECTOR_ILLEGAL_OPCODE); + + DEFINE(CYGARC_PSW_ID, CYGARC_PSW_ID); + DEFINE(CYGARC_PSW_EP, CYGARC_PSW_EP); + DEFINE(CYGARC_PSW_NP, CYGARC_PSW_NP); + +#ifdef CYGPKG_KERNEL + DEFINE(RAISE_INTR, CYG_INSTRUMENT_CLASS_INTR|CYG_INSTRUMENT_EVENT_INTR_RAISE); +#endif + + // Variant definitions - want these to be included instead. +} + +//-------------------------------------------------------------------------- +// EOF hal_mk_defs.c
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/arch/current/src/v85x.ld @@ -0,0 +1,123 @@ +//============================================================================= +// +// MLT linker script for NEC +// adapted from packages/hal/arm/pid/v1_1/src/pid.ld +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= + +#include <pkgconf/system.h> + +STARTUP(vectors.o) +ENTRY(reset_vector) +#ifdef EXTRAS +INPUT(extras.o) +#endif +GROUP(libtarget.a libgcc.a) + +#define ALIGN_LMA 4 +#define FOLLOWING(_section_) AT ((LOADADDR (_section_) + SIZEOF (_section_) + ALIGN_LMA - 1) & ~ (ALIGN_LMA - 1)) +#define LMA_EQ_VMA +#define FORCE_OUTPUT . = . + +#define SECTIONS_BEGIN \ + /* Debug information */ \ + .debug_aranges 0 : { *(.debug_aranges) } \ + .debug_pubnames 0 : { *(.debug_pubnames) } \ + .debug_info 0 : { *(.debug_info) } \ + .debug_abbrev 0 : { *(.debug_abbrev) } \ + .debug_line 0 : { *(.debug_line) } \ + .debug_frame 0 : { *(.debug_frame) } \ + .debug_str 0 : { *(.debug_str) } \ + .debug_loc 0 : { *(.debug_loc) } \ + .debug_macinfo 0 : { *(.debug_macinfo) } + +#define SECTION_rom_vectors(_region_, _vma_, _lma_) \ + .rom_vectors _vma_ : _lma_ \ + { FORCE_OUTPUT; KEEP (*(.vectors)) } \ + > _region_ + +#define SECTION_text(_region_, _vma_, _lma_) \ + .text _vma_ : _lma_ \ + { stext = ABSOLUTE(.); \ + PROVIDE (__stext = ABSOLUTE(.)); \ + *(.text*) *(.gnu.warning) *(.gnu.linkonce*) *(.init) \ + *(.glue_7) *(.glue_7t) \ + } > _region_ \ + etext = .; PROVIDE (__etext = .); + +#define SECTION_fini(_region_, _vma_, _lma_) \ + .fini _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.fini) } \ + > _region_ + +#define SECTION_rodata(_region_, _vma_, _lma_) \ + .rodata _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.rodata*) } \ + > _region_ + +#define SECTION_rodata1(_region_, _vma_, _lma_) \ + .rodata1 _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.rodata1) } \ + > _region_ + +#define SECTION_fixup(_region_, _vma_, _lma_) \ + .fixup _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.fixup) } \ + > _region_ + +#define SECTION_gcc_except_table(_region_, _vma_, _lma_) \ + .gcc_except_table _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.gcc_except_table) } \ + > _region_ + +#define SECTION_data(_region_, _vma_, _lma_) \ + .data _vma_ : _lma_ \ + { __ram_data_start = ABSOLUTE (.); *(.data*) *(.data1) MERGE_IN_RODATA \ + _GOT1_START_ = ABSOLUTE (.); *(.got1) _GOT1_END_ = ABSOLUTE (.); \ + _GOT2_START_ = ABSOLUTE (.); *(.got2) _GOT2_END_ = ABSOLUTE (.); \ + . = ALIGN (4); \ + __DEVTAB__ = ABSOLUTE (.); KEEP (*(SORT (.devtab*))) __DEVTAB_END__ = ABSOLUTE (.); \ + __NETDEVTAB__ = ABSOLUTE (.); KEEP (*(SORT (.netdevtab*))) __NETDEVTAB_END__ = ABSOLUTE (.); \ + __CTOR_LIST__ = ABSOLUTE (.); KEEP (*(SORT (.ctors*))) __CTOR_END__ = ABSOLUTE (.); \ + __DTOR_LIST__ = ABSOLUTE (.); KEEP (*(SORT (.dtors*))) __DTOR_END__ = ABSOLUTE (.); \ + *(.dynamic) *(.sdata*) *(.sbss*) } \ + > _region_ \ + __rom_data_start = LOADADDR (.data); \ + __ram_data_end = .; PROVIDE (__ram_data_end = .); _edata = .; PROVIDE (edata = .); \ + PROVIDE (__rom_data_end = LOADADDR (.data) + SIZEOF(.data)); + +#define SECTION_bss(_region_, _vma_, _lma_) \ + .bss _vma_ : _lma_ \ + { __bss_start = ABSOLUTE (.); \ + *(.scommon) *(.dynbss) *(.bss*) *(COMMON) \ + __bss_end = ABSOLUTE (.); } \ + > _region_ + +#define SECTIONS_END . = ALIGN(4); _end = .; PROVIDE (end = .); \ + +#include <pkgconf/hal_v85x.h> +#include CYGHWR_MEMORY_LAYOUT_LDI
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/arch/current/src/vectors.S @@ -0,0 +1,518 @@ +// #======================================================================== +// # +// # vectors.S +// # +// # NEC/V85x exception/interrupt vectors +// # +// #======================================================================== +// ####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +// ####COPYRIGHTEND#### +// #======================================================================== +// ######DESCRIPTIONBEGIN#### +// # +// # Author(s): gthomas +// # Contributors: gthomas +// # Date: 2000-03-10 +// # Purpose: NEC/V85x exception vectors +// # Description: This file defines the code placed into the exception +// # vectors. It also contains the first level default VSRs +// # that save and restore state for both exceptions and +// # interrupts. +// # +// #####DESCRIPTIONEND#### +// # +// #======================================================================== + +#include <pkgconf/hal.h> +#include <pkgconf/hal_v85x.h> +#ifdef CYGPKG_KERNEL // no CDL yet +#include <pkgconf/kernel.h> +#else +# undef CYGFUN_HAL_COMMON_KERNEL_SUPPORT +# undef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK +#endif +#include <cyg/hal/hal_platform_setup.h> + +#include <cyg/hal/nec_offsets.inc> + +// Two different macros in case we ever decide to differentiate +// between exceptions and interrupts. + .macro EXCEPTION + .org reset_vector+(0x0010*VECTOR) + addi -CYGARC_EXCEPTION_FRAME_SIZE,sp,sp + st.w r1,CYGARC_REG_R1[sp] + movea VECTOR,r0,r1 + .set VECTOR, VECTOR+1 + jr exception + .endm + + .macro INTERRUPT + .org reset_vector+(0x0010*VECTOR) + addi -CYGARC_EXCEPTION_FRAME_SIZE,sp,sp + st.w r1,CYGARC_REG_R1[sp] + movea VECTOR,r0,r1 + jr exception + .set VECTOR, VECTOR+1 + .endm + + .text + .globl reset_vector +reset_vector: + +#ifdef CYG_HAL_STARTUP_ROM +// +// These are the hardware exception vectors. +// +__ROM_vsr: + // 0x000 + jr start + + .set VECTOR, 1 + .rept CYGNUM_HAL_EXCEPTION_COUNT-1 + EXCEPTION + .endr + .set VECTOR, 8 + .rept CYGNUM_HAL_ISR_COUNT + INTERRUPT + .endr +#endif // CYG_HAL_STARTUP_ROM + + .globl start +start: + // Perform hardware initialization + PLATFORM_SETUP1 + +#ifdef CYG_HAL_STARTUP_ROM + // Relocate [copy] data from ROM to RAM + lea ___rom_data_start,r6 + lea ___ram_data_start,r7 + lea ___ram_data_end,r8 +1: ld.w 0[r6],r1 + st.w r1,0[r7] + addi 4,r6,r6 + addi 4,r7,r7 + cmp r7,r8 + bne 1b +#endif + // Initialize stack + lea __startup_stack,r1 + mov r1,sp + + // Clear BSS + lea ___bss_start,r6 + lea ___bss_end,r7 +1: st.w r0,0[r6] + addi 4,r6,r6 + cmp r6,r7 + bne 1b + +#ifdef CYG_HAL_STARTUP_ROM + // Built initial trap VSR tables + lea __vsr_table,r6 + lea __vsr_table_end,r9 +#if 0 + lea __ROM_vsr,r7 + mov r6,r8 + sub r7,r8 + lea 0x003FFFFF,r7 + and r7,r8 + lea 0x07800000,r7 + or r7,r8 +#else + lea 0x00000794,r8 // jr 0x0100xx0 +#endif +10: st.w r8,0[r6] + addi 16,r6,r6 + cmp r6,r9 + bne 10b +#else +// Set up VSR pointers into this application/image + lea _hal_vsr_table+(CYGNUM_HAL_EXCEPTION_COUNT*4),r6 + movea CYGNUM_HAL_ISR_COUNT,r0,r7 + lea do_interrupt,r8 +10: st.w r8,0[r6] + addi 4,r6,r6 + addi -1,r7,r7 + bne 10b +#endif + + // Initialize hardware + jarl _cyg_hal_hardware_init,r31 + +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS +#ifndef CYG_HAL_STARTUP_ROM +// Need to handle exceptions as well + lea _hal_vsr_table,r6 + movea CYGNUM_HAL_EXCEPTION_COUNT,r0,r7 + lea do_exception,r8 +10: st.w r8,0[r6] + addi 4,r6,r6 + addi -1,r7,r7 + bne 10b +#endif + jarl _initialize_stub,r31 +#endif + + // Run through static constructors + jarl _cyg_hal_invoke_constructors,r31 + + // Ready to start the eCos kernel + jarl _cyg_start,r31 + + // If we get here, something is _very_ wrong +_start_hang: + br _start_hang + +#ifdef CYG_HAL_STARTUP_ROM + // Handle exception +exception: + // save exception context + st.w ep,CYGARC_REG_EP[sp] + mov sp,ep + st.w r1,CYGARC_REG_VECTOR[ep] + addi CYGARC_EXCEPTION_FRAME_SIZE,ep,r1 + sst.w r2,CYGARC_REG_R2[ep] + sst.w r1,CYGARC_REG_SP[ep] + sst.w r4,CYGARC_REG_R4[ep] + sst.w r5,CYGARC_REG_R5[ep] + sst.w r6,CYGARC_REG_R6[ep] + sst.w r7,CYGARC_REG_R7[ep] + sst.w r8,CYGARC_REG_R8[ep] + sst.w r9,CYGARC_REG_R9[ep] + sst.w r10,CYGARC_REG_R10[ep] + sst.w r11,CYGARC_REG_R11[ep] + sst.w r12,CYGARC_REG_R12[ep] + sst.w r13,CYGARC_REG_R13[ep] + sst.w r14,CYGARC_REG_R14[ep] + sst.w r15,CYGARC_REG_R15[ep] + sst.w r16,CYGARC_REG_R16[ep] + sst.w r17,CYGARC_REG_R17[ep] + sst.w r18,CYGARC_REG_R18[ep] + sst.w r19,CYGARC_REG_R19[ep] + sst.w r20,CYGARC_REG_R20[ep] + sst.w r21,CYGARC_REG_R21[ep] + sst.w r22,CYGARC_REG_R22[ep] + sst.w r23,CYGARC_REG_R23[ep] + sst.w r24,CYGARC_REG_R24[ep] + sst.w r25,CYGARC_REG_R25[ep] + sst.w r26,CYGARC_REG_R26[ep] + sst.w r27,CYGARC_REG_R27[ep] + sst.w r28,CYGARC_REG_R28[ep] + sst.w r29,CYGARC_REG_R29[ep] + ld.w CYGARC_REG_VECTOR[ep],r8 + sst.w lp,CYGARC_REG_LP[ep] + cmp CYGNUM_HAL_VECTOR_TRAP0,r8 // NMI? + bge 05f + stsr FEPC,r6 // saved state differs + stsr FEPSW,r7 + br 20f +05: stsr EIPC,r6 + cmp CYGNUM_HAL_VECTOR_ILLEGAL_OPCODE,r8 // Illegal opcode? + bne 10f + addi -4,r6,r6 // yes, adjust PC +10: stsr EIPSW,r7 +20: st.w r6,CYGARC_REG_PC[ep] + st.w r7,CYGARC_REG_PSW[ep] + stsr ECR,r6 + st.w r6,CYGARC_REG_CAUSE[ep] + // Reenable exception processing + stsr PSW,r6 + andi ~(CYGARC_PSW_EP|CYGARC_PSW_NP),r6,r6 + ldsr r6,PSW + shl 2,r8 + lea _hal_vsr_table,r1 + add r1,r8 + ld.w 0[r8],r1 + jmp [r1] +#endif + +do_exception: + mov sp,r6 + jarl _exception_handler,r31 + +return_from_exception_or_interrupt: + mov sp,ep + ld.w CYGARC_REG_PSW[ep],r7 + sld.w CYGARC_REG_R1[ep],r1 + ld.w CYGARC_REG_PC[ep],r6 + sld.w CYGARC_REG_R2[ep],r2 + // disable interrupts while restoring context + ld.w CYGARC_REG_VECTOR[ep],r4 + stsr PSW,r8 + cmp CYGNUM_HAL_VECTOR_TRAP0,r4 + bge 10f + ori CYGARC_PSW_NP,r8,r8 // returning from NMI + ori CYGARC_PSW_ID,r8,r8 // disable interrupt + ldsr r8,PSW + ldsr r7,FEPSW + ldsr r6,FEPC + br 30f +10: cmp CYGNUM_HAL_ISR_MIN,r4 // exception or interrupt + bge 20f + ori CYGARC_PSW_EP,r8,r8 // returning from exception +20: ori CYGARC_PSW_ID,r8,r8 // disable interrupt + ldsr r8,PSW + ldsr r7,EIPSW // Avoid pipline bubbles + ldsr r6,EIPC +30: sld.w CYGARC_REG_R4[ep],r4 + sld.w CYGARC_REG_R5[ep],r5 + sld.w CYGARC_REG_R6[ep],r6 + sld.w CYGARC_REG_R7[ep],r7 + sld.w CYGARC_REG_R8[ep],r8 + sld.w CYGARC_REG_R9[ep],r9 + sld.w CYGARC_REG_R10[ep],r10 + sld.w CYGARC_REG_R11[ep],r11 + sld.w CYGARC_REG_R12[ep],r12 + sld.w CYGARC_REG_R13[ep],r13 + sld.w CYGARC_REG_R14[ep],r14 + sld.w CYGARC_REG_R15[ep],r15 + sld.w CYGARC_REG_R16[ep],r16 + sld.w CYGARC_REG_R17[ep],r17 + sld.w CYGARC_REG_R18[ep],r18 + sld.w CYGARC_REG_R19[ep],r19 + sld.w CYGARC_REG_R20[ep],r20 + sld.w CYGARC_REG_R21[ep],r21 + sld.w CYGARC_REG_R22[ep],r22 + sld.w CYGARC_REG_R23[ep],r23 + sld.w CYGARC_REG_R24[ep],r24 + sld.w CYGARC_REG_R25[ep],r25 + sld.w CYGARC_REG_R26[ep],r26 + sld.w CYGARC_REG_R27[ep],r27 + sld.w CYGARC_REG_R28[ep],r28 + sld.w CYGARC_REG_R29[ep],r29 + sld.w CYGARC_REG_LP[ep],lp + sld.w CYGARC_REG_SP[ep],sp + sld.w CYGARC_REG_EP[ep],ep + reti + + // Handle interrupt - these are typically vectored into user code +do_interrupt: + mov sp,ep // save pointer to regs frame + +#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK + // Switch to interrupt stack + lea irq_level,r6 // current number of nested interrupts + ld.w 0[r6],r7 + addi 1,r7,r8 + st.w r8,0[r6] + cmp 0,r7 // if was zero, switch stacks + bne 10f + mov sp,r1 // save old stack pointer + lea __interrupt_stack-4,r2 + mov r2,sp + st.w r1,0[sp] +10: +#endif // CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK + + // The entire CPU state is now stashed on the stack, + // increment the scheduler lock and handle the interrupt + +#ifdef CYGFUN_HAL_COMMON_KERNEL_SUPPORT + .extern cyg_scheduler_sched_lock + lea cyg_scheduler_sched_lock,r7 + ld.w 0[r7],r8 + addi 1,r8,r8 + st.w r8,0[r7] +#endif + +#if defined(CYGPKG_KERNEL_INSTRUMENT) && \ + defined(CYGDBG_KERNEL_INSTRUMENT_INTR) + lea RAISE_INTR,r6 // arg0 = type = INTR,RAISE + ld.w CYGARC_REG_VECTOR[ep],r7 // args = vector + mov r0,r8 // arg2 = 0 + jarl _cyg_instrument,r31 +#endif + + ld.w CYGARC_REG_VECTOR[ep],r6 // vector # + addi -CYGNUM_HAL_ISR_MIN,r6,r8 + shl 2,r8 + lea _hal_interrupt_objects,r1 + add r8,r1 + ld.w 0[r1],r29 // save object handle + lea _hal_interrupt_data,r1 + add r8,r1 + ld.w 0[r1],r7 // handler data + lea _hal_interrupt_handlers,r1 + add r8,r1 + mov ep,r8 // pointer to saved registers + ld.w 0[r1],r1 // handler routine + jarl call_via_r1,r31 + +#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK + // If we are returning from the last nested interrupt, move back + // to the thread stack. interrupt_end() must be called on the + // thread stack since it potentially causes a context switch. + lea irq_level,r6 + ld.w 0[r6],r7 + addi -1,r7,r8 + st.w r8,0[r6] + cmp 0,r8 + bne 10f + ld.w 0[sp],sp // Restore non-interrupt stack at last interrupt +10: +#endif // CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK + +#ifdef CYGFUN_HAL_COMMON_KERNEL_SUPPORT + // The return value from the handler (in r10) will indicate whether a + // DSR is to be posted. Pass this together with a pointer to the + // interrupt object we have just used to the interrupt tidy up routine. + + mov r10,r6 // interrupt handler return code + mov r29,r7 // object handle + mov ep,r8 // register frame + jarl _interrupt_end,r31 // post any bottom layer handle + +#endif + br return_from_exception_or_interrupt + +#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK + .globl _hal_interrupt_stack_call_pending_DSRs +_hal_interrupt_stack_call_pending_DSRs: + stsr PSW,r9 + di // disable interrupts while changing stack + // Switch to interrupt stack + lea irq_level,r6 // current number of nested interrupts + mov 1,r7 // note: this can never be non-zero at this point + st.w r7,0[r6] + mov sp,r1 // save old stack pointer + lea __interrupt_stack-(4*4),r8 + mov r8,sp + st.w r1,0[sp] + st.w r9,4[sp] + st.w lp,8[sp] + ei + jarl _cyg_interrupt_call_pending_DSRs,lp + di + ld.w 8[sp],lp // restore state + ld.w 4[sp],r6 + ld.w 0[sp],sp + lea irq_level,r7 + st.w r0,0[r7] + ldsr r6,PSW + jmp [lp] +#endif // CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK + +// +// Indirect subroutine call, via R1 + +call_via_r1: + jmp [r1] + +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS +// +// Reset the board +// + .globl _hal_plf_reset_board +_hal_plf_reset_board: + di // Turn off interrupts + jmp [r0] // Restart machine +#endif + +#if !defined(CYGSEM_HAL_NEC_INLINE_INTERRUPT_FUNCTIONS) + .globl _hal_disable_interrupts +_hal_disable_interrupts: + stsr PSW,r10 + di + jmp [lp] + + .globl _hal_enable_interrupts +_hal_enable_interrupts: + stsr PSW,r6 + ei + jmp [lp] + + .globl _hal_restore_interrupts +_hal_restore_interrupts: + ldsr r6,PSW + jmp [lp] +#endif + +// ------------------------------------------------------------------------- + .data +#ifdef CYG_HAL_STARTUP_ROM +// Trap jump table - used by builtin ROM +__vsr_table: + .rept CYGNUM_HAL_VSR_COUNT + .word 0,0,0,0 + .endr +__vsr_table_end: + +_hal_vsr_table: + .rept CYGNUM_HAL_EXCEPTION_COUNT + .word do_exception + .endr + .rept CYGNUM_HAL_ISR_COUNT + .word do_interrupt + .endr +#endif + +// Initial stack + .rept 1024 + .byte 0 + .endr +__startup_stack: + +#ifndef CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE +#define CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE 4096 +#endif +#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK + .balign 16 + .global _cyg_interrupt_stack_base +_cyg_interrupt_stack_base: +__interrupt_stack_base: + .rept CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE + .byte 0 + .endr + .balign 16 + .global _cyg_interrupt_stack +_cyg_interrupt_stack: +__interrupt_stack: +irq_level: + .long 0 +#endif // CYG_HAL_STARTUP == ROM + +// Interrupt vector tables. +// These tables contain the isr, data and object pointers used to deliver +// interrupts to user code. + + .extern _hal_default_isr + + .globl _hal_interrupt_handlers +_hal_interrupt_handlers: + .rept CYGNUM_HAL_ISR_COUNT + .long _hal_default_isr + .endr + + .globl _hal_interrupt_data +_hal_interrupt_data: + .rept CYGNUM_HAL_ISR_COUNT + .long 0 + .endr + + .globl _hal_interrupt_objects +_hal_interrupt_objects: + .rept CYGNUM_HAL_ISR_COUNT + .long 0 + .endr + \ No newline at end of file
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/ceb_v850/current/ChangeLog @@ -0,0 +1,90 @@ +2000-05-25 John Dallaway <jld@redhat.com> + + * cdl/hal_v85x_ceb_v850.cdl: Tidy display strings. + +2000-05-25 Gary Thomas <gthomas@redhat.com> + + * include/plf_intr.h: Interrupt mappings now are in this file. + +2000-05-24 Gary Thomas <gthomas@redhat.com> + + * include/plf_sections.h: + * include/v850_regs.h: New file(s). + +2000-05-03 Gary Thomas <gthomas@redhat.com> + + * src/hal_diag.c (hal_diag_write_char): Work around which fixes ^C + handling - GCC function __builtin_return_address() doesn't work. + +2000-04-25 John Dallaway <jld@cygnus.co.uk> + + * cdl/hal_nec_ceb_v850.cdl: Parent this package under the + V85X architecture package. + +2000-04-14 Gary Thomas <gthomas@redhat.com> + + * src/plf_stub.c (hal_plf_stub_init): Use watchdog timer to + emulate a breakpoint since this hardware doesn't have one. + +2000-04-11 Gary Thomas <gthomas@redhat.com> + + * src/plf_stub.c (hal_plf_get_char): Use LED for "interesting" + display during GDB I/O. + + * src/hal_diag.c (hal_diag_write_char): Disable interrupts + while sending character - necessary because there is no way to + determine that a character has been sent other than to see that + there is an interrupt pending. + + * cdl/hal_nec_ceb_v850.cdl: Add implementation of "GDB protocol + suppressed" functionality. + +2000-03-30 Gary Thomas <gthomas@redhat.com> + + * src/hal_diag.c (hal_diag_write_char): GDB break support only + present if GDB stubs in place. + +2000-03-27 Gary Thomas <gthomas@redhat.com> + + * src/plf_stub.c: + * include/plf_stub.h: Adding GDB break support. + + * include/plf_intr.h: Remove garbage left over from cut&paste. + + * include/plf_cache.h: Add missing INVALIDATE macros. + +2000-03-21 Gary Thomas <gthomas@redhat.com> + + * src/hal_diag.c: Remove ROM startup messages. + + * include/pkgconf/mlt_nec_v850_ceb_rom.mlt: + * include/pkgconf/mlt_nec_v850_ceb_rom.ldi: + * include/pkgconf/mlt_nec_v850_ceb_rom.h: Use proper RAM layout. + + * include/plf_stub.h (HAL_STUB_PLATFORM_RESET): Add board reset. + +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//===========================================================================
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/ceb_v850/current/cdl/hal_v85x_ceb_v850.cdl @@ -0,0 +1,241 @@ +# ==================================================================== +# +# hal_v85x_v850_ceb.cdl +# +# V850/CEB board HAL package configuration data +# +# ==================================================================== +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Red Hat eCos Public License +# Version 1.1 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://www.redhat.com/ +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Configurable Operating System, +# released September 30, 1998. +# +# The Initial Developer of the Original Code is Red Hat. +# Portions created by Red Hat are +# Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +# All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +# ==================================================================== +######DESCRIPTIONBEGIN#### +# +# Author(s): gthomas +# Original data: bartv, jskov +# Contributors: +# Date: 2000-03-10 +# +#####DESCRIPTIONEND#### +# +# ==================================================================== + +cdl_package CYGPKG_HAL_V85X_V850_CEB { + display "Cosmo CEB-V850/SA1 board" + parent CYGPKG_HAL_V85X + requires CYGPKG_HAL_V85X_V850 + define_header hal_v85x_v850_ceb.h + include_dir cyg/hal + description " + The CEB HAL package should be used when targetting the + actual hardware." + + compile hal_diag.c plf_misc.c plf_stub.c + + implements CYGINT_HAL_DEBUG_GDB_STUBS + implements CYGINT_HAL_DEBUG_GDB_STUBS_BREAK + implements CYGINT_HAL_DIAG_DISABLE_GDB_PROTOCOL_SUPPORTED + + define_proc { + puts $::cdl_system_header "#define CYGBLD_HAL_TARGET_H <pkgconf/hal_v85x_v850.h>" + puts $::cdl_system_header "#define CYGBLD_HAL_PLATFORM_H <pkgconf/hal_v85x_v850_ceb.h>" + } + + cdl_component CYG_HAL_STARTUP { + display "Startup type" + flavor data + legal_values {"RAM" "ROM"} + default_value {"RAM"} + no_define + define -file system.h CYG_HAL_STARTUP + description " + When targetting the CEB board it is possible to build + the system for either RAM bootstrap or ROM bootstrap." + } + + cdl_option CYGHWR_HAL_V85X_V850_CEB_DIAG_BAUD { + display "Diagnostic serial port baud rate" + flavor data + legal_values 9600 19200 38400 + default_value 38400 + description " + This option selects the baud rate used for the diagnostic port. + Note: this should match the value chosen for the GDB port if the + diagnostic and GDB port are the same." + } + + # Real-time clock/counter specifics + cdl_component CYGNUM_HAL_RTC_CONSTANTS { + display "Real-time clock constants." + flavor none + + cdl_option CYGNUM_HAL_RTC_NUMERATOR { + display "Real-time clock numerator" + flavor data + calculated 1000000000 + } + cdl_option CYGNUM_HAL_RTC_DENOMINATOR { + display "Real-time clock denominator" + flavor data + calculated 100 + } + cdl_option CYGNUM_HAL_RTC_PERIOD { + display "Real-time clock period" + flavor data + calculated 42500 + } + } + + cdl_component CYGBLD_GLOBAL_OPTIONS { + display "Global build options" + flavor none + parent CYGPKG_NONE + description " + Global build options including control over + compiler flags, linker flags and choice of toolchain." + + + cdl_option CYGBLD_GLOBAL_COMMAND_PREFIX { + display "Global command prefix" + flavor data + no_define + default_value { "v850-elf" } + description " + This option specifies the command prefix used when + invoking the build tools." + } + + cdl_option CYGBLD_GLOBAL_CFLAGS { + display "Global compiler flags" + flavor data + no_define + default_value { "-Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef -Woverloaded-virtual -g -O2 -ffunction-sections -fdata-sections -fno-rtti -fno-exceptions -fvtable-gc -finit-priority" } + description " + This option controls the global compiler flags which + are used to compile all packages by + default. Individual packages may define + options which override these global flags." + } + + cdl_option CYGBLD_GLOBAL_LDFLAGS { + display "Global linker flags" + flavor data + no_define + default_value { "-g -nostdlib -Wl,--gc-sections -Wl,-static" } + description " + This option controls the global linker flags. Individual + packages may define options which override these global flags." + } + + cdl_option CYGBLD_BUILD_GDB_STUBS { + display "Build GDB stub ROM image" + default_value 0 + requires { CYG_HAL_STARTUP == "ROM" } + requires CYGSEM_HAL_ROM_MONITOR + requires CYGBLD_BUILD_COMMON_GDB_STUBS + requires CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + requires ! CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT + requires ! CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT + requires ! CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT + requires ! CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM + no_define + description " + This option enables the building of the GDB stubs for the + board. The common HAL controls takes care of most of the + build process, but the final conversion from ELF image to + binary data is handled by the platform CDL, allowing + relocation of the data if necessary." + + make -priority 320 { + <PREFIX>/bin/gdb_module.bin : <PREFIX>/bin/gdb_module.img + $(OBJCOPY) -O binary $< $@ + } + } + } + + cdl_component CYGHWR_MEMORY_LAYOUT { + display "Memory layout" + flavor data + no_define + calculated { CYG_HAL_STARTUP == "RAM" ? "v85x_v850_ceb_ram" : \ + CYG_HAL_STARTUP == "ROM" ? "v85x_v850_ceb_rom" : \ + "v85x_v850_ceb_romram" } + + cdl_option CYGHWR_MEMORY_LAYOUT_LDI { + display "Memory layout linker script fragment" + flavor data + no_define + define -file system.h CYGHWR_MEMORY_LAYOUT_LDI + calculated { CYG_HAL_STARTUP == "RAM" ? "<pkgconf/mlt_v85x_v850_ceb_ram.ldi>" : \ + CYG_HAL_STARTUP == "ROM" ? "<pkgconf/mlt_v85x_v850_ceb_rom.ldi>" : \ + "<pkgconf/mlt_v85x_v850_ceb_romram.ldi>" } + } + + cdl_option CYGHWR_MEMORY_LAYOUT_H { + display "Memory layout header file" + flavor data + no_define + define -file system.h CYGHWR_MEMORY_LAYOUT_H + calculated { CYG_HAL_STARTUP == "RAM" ? "<pkgconf/mlt_v85x_v850_ceb_ram.h>" : \ + CYG_HAL_STARTUP == "ROM" ? "<pkgconf/mlt_v85x_v850_ceb_rom.h>" : \ + "<pkgconf/mlt_v85x_v850_ceb_romram.h>" } + } + } + + cdl_option CYGSEM_HAL_USE_ROM_MONITOR { + display "Work with a ROM monitor" + flavor booldata + legal_values { "Generic" "GDB_stubs" "PMON" } + default_value { CYG_HAL_STARTUP == "RAM" ? "GDB_stubs" : 0 } + parent CYGPKG_HAL_ROM_MONITOR + requires { CYG_HAL_STARTUP == "RAM" } + description " + Support can be enabled for three different varieties of ROM monitor. + This support changes various eCos semantics such as the encoding + of diagnostic output, or the overriding of hardware interrupt + vectors. + Firstly there is \"Generic\" support which prevents the HAL + from overriding the hardware vectors that it does not use, to + instead allow an installed ROM monitor to handle them. This is + the most basic support which is likely to be common to most + implementations of ROM monitor. + \"GDB_stubs\" provides support when GDB stubs are included in + the ROM monitor or boot ROM. + And finally, \"PMON\" allows the program to co-operate with + the PMON ROM monitor when fitted to the board." + } + + cdl_option CYGSEM_HAL_ROM_MONITOR { + display "Behave as a ROM monitor" + flavor bool + default_value 0 + parent CYGPKG_HAL_ROM_MONITOR + requires { CYG_HAL_STARTUP == "ROM" } + description " + Enable this option if this program is to be used as a ROM monitor, + i.e. applications will be loaded into RAM on the board, and this + ROM monitor may process exceptions or interrupts generated from the + application. This enables features such as utilizing a separate + interrupt stack when exceptions are generated." + } +}
new file mode 100644 index 0000000000000000000000000000000000000000..d825c44dc60db0364f6877fe4ea6f9e1276031c4 GIT binary patch literal 18952 zc%1Efdwf*Y)#y4iIddi_IeB1)yk^1)L&7V;NlKn%!URJ=M4XwLnM_JDc|ZaY5D_fx z<#FVSRjzuetzOG*tsj+YvGr5FqDYm2SP%xpKnsSH;3T&|GCYi61To><wa%H4L7{%P z_jhmqXeYltXRp22UVE>{UVE*5CK6Ytfv}G@ZK>QC%YqogfW*~mhhYuEbHZRP!lhww z1j3WTU>4!DFj$9hOc=}|d|fjP>k+;f21g=%Dh%ckJ{$%|A-pRLjz;+PFjzqN#V|Mq z;b+3&ScKPv!Ep#L34`N_|1fw2@gD}?LHvio3B-RGY#{!_;E}|C7@SD_GsAEa@gD{! z6aQgw3h^HXrxO2Ru#xx=gH6PL7@S7@hry$W|1el2{=?vO;y(-?P5g(!X5v2#9z*<x z!5PFqW6K9%_=?zhePYb@wN0^g_<VIjQ*1*YVC(Ka>TAWeEU1VbjZYb$nfN@9PmO{z zS@}-DwoYt|xU5Ae=CT;GA0fc!41A9JjKkL1eW$0|;71h_^xP=|javFyMeOpvvjpAv z*z)5bGk@b$Tj>CdEk(Fu0LE3U<TGO#XvU(;j{vST0?w9Q>$k-WKzhto9g}3sAHY#7 zd3BV{+{CGvXNq<Xs(nal&H#*`Q>U?208;!Z*EEB0;^55PI|n8C^(aYx-YCh1_*}}Y zXB)5l0JME;VxNYzn2o?1I3Y44DqF~lwZ>1s<6c8$Vomb=)WxP1qgJP{H$R>6+}K}? z-!k!c+1u}YFK6#}KFm8-&{=eP%7xMyPs7x~dDAYk-32!IU&#M+LI7(`({{4D`~kTO zTh<gj3TvjWhrbq3{Yf~D&wcq*<ufRk)@dq_b(%e8<B<D$&{`z9h1d3#;s}jUien=T zrDLCl(=%)^Z}ef|36$>>6`~^Jv!g^flPJP5VZrEK>=PBX;htFR;Y849@Y&IMG1j>0 zBkoP899fezKV`9TMcQg{{phF1JeT>4aa$(*E^GUw_bhvJKb(9lzq9ak@rBYsovEZh zz}XmFMZwdctGFr;t+R*QADR9s11hwXps7R9Ro(u`G+R1yA;~)E|3y6nxH_f|B=`Po zNlr<X<V&MY4@&N%S+?2%nCPz8N3{hUTQd~>T`c5nt^t_fTFM7|j~bW`K45hVU_xm` zK>4*62sm2V)t@B8c6K$F45o`l80furfpPv2=}6r3S(3XUJJTHr6Wk2q`dQJHFF$7p zlwD%SDJ?r$a6TstVGL1~xWa77JuWno{nn9e*vRWR=fy0wJu-ac-Iv($-xwJgHu8@+ z^7o;U!nckT!bWbukw46`xfqnx0$;GGgAL?tV}0^(ucP<CzS=BXDFaOI*wO_)pL|@F zxGHSjF;UlJb*CfUt$9{=4nChXt>&h~YVK|<_k!t+4U8!1tD-5t5R8R5U%HC-I(wIM zvvajO53KGQgf9uJxrcDf3LLXY8S_URGfx@QCNhXgerxVT$z48S+*t-PKQI8dKk4Ea z9FqZsJ_bzr=qcr&iiJoYwju8(qutvbaQtYo@whA}pJE`%k~|fl0OjyOsSIKI?@!%t zw5J3D4&R06DkWJj2D(0&Zbh9~y#nw}44kXq%0hz`r53EemZ7eu0Ogl-!-`ZXToSDA z@wk!%IO$l8HAzkrspVY-vbr-6XY(;y@oFv|jN6_wr0Gq4ni{C|b|*gwaL_Rezsvk( z)!G{Ee5P;jdpFM_$*V@Ge7-emq#boIUUDxV&jm6+F#sIZ?@qmFSL89}qak@bHfjpW z7j_059i~F$oH-hN=bd|tkhjzuROh;J&hA1l11a{hqvsqy?%!g)vBsTS@+A3-G#VRx z=RmgA8wn(tpy!gZcBqV~Iq2Y#0#S*m)YX(Z*~*AYrmw8~99r9IE)vR)?iEy-kz^#9 zAEinn_@P4eNY^n*emPBD@2Rvz<m=sWlKao&z@K>*wOlG+FZq}OBkFoy@qe%q_XM-2 z*yf6Z3ALZ=4;GEZd7}#bMa{s&9Ef9n4jnKac@bTA;41%uJ0OVGTFsQ8B-8ZzKBlt7 z9S>UkHUNv?$-q^X6qpb{0V4C5zJ;`lxp9nD*+DyTJ|m;9tuRfJ&zne}TW;c~IE~tn zpZ;O#Z0JY3HL2tHw7rW<Pzy%XPQcMU-*n2TNWaG<$v-!#ma|!*m=U6wkVdjEaaY1B zw+D_*A0EB#CcN{e60~-b3{tR$_Z&5C$x}J#&K{a?CC-;+8eU_oV6;%J*c%V4Z}^c1 z;8rVIXQCBJ@_>;j6`HoQ;^Cm2jJhfxE4kapW)`3Y1~V18KgtA)b{fXt$0#xl-rcI` z;FvHG=g=1pSzWzz8!KK6$|j`oD$*z)s|%EPv!Ub@200(Ea250%wOa8Upq*#5_=`B) zzf-=sf30MR;kFl5cRpl$Dle@DqG0v1aLDnR<GkY)_O}iza(&M61xtLXJicrkmQBar zDQG3eukY_L?4?GDdpT2CcU_u3x^F^FbiN%jado(hah+w=6Kf_^PO4%0Xdf)%DzQ(c z(S$T~3XLqJ5jQr|YXHW{Havi1A82M_Eo2s;ha-tPo2Eu0EV-Y_(5AgBbM1-FMlPQA zdLZ*71C*e=i+qv51kW9La=Lb30;GB|)^AFHgOA8i*3q);nsDL+fL6hb+zKu2o_o;0 zP`#|W5x=Q+uzvRU)i$wdYN-9Z=O|m!%)t5HO@>5^wlo2>6>;E`zqpEiRiQ<_2anKN zOjTvU^PW9>SK%Jjrj^tAHAZr~##E(n`}MmsKQ#dDa_c9N0Nuf^cUCjow7U{Pdpr(o zuVeXj95lWikM^l8O$^QAze;EFO7!ym^ONmbZz6irS;&_aWmDGO`AG!$D-XJ4XmNID ze8etrt`oLQU+lbO5Np?>M*Y^>?m*Wr7P_CC-uZC^bX&E~MmNonSL!TDvH4`n)xCL# zTpHMf-wd>}yz?%1A`tFTLnlgWo1h7em|W^oMqIzLUQkz=SV-{2D<==oy1?o2$}+8V zi-E?ky9sOm6~(`GJ^CDBfOBSw#5I^D_lS(lX3}j|K_rN^jOJXC-#{L#x%!~8Q~HIh z2U*BM3G1sD;P(QA7GnQ)Jdb;>VD^CWJv=6y#-m7Mld|I$%u;vTUSZsQER4fQbrBV; z)9AnA=$FPQ_B4j<3pFY;PKkR8DXtpBS=w`V<Vx~047IJqwgqG6rfBmqBa$)WaNhxb zlzKUGF&F!0kD-X$R!UKKQ_0xUmJ&RD(`aNV_U<#=E)L+Xd73ASAy4wO5{I=Ej8B*3 z4cuz(X<p*qKxr&DEAiRI<zaE!n*v2?!_m~-;6U$_gE%kZ|Jkgwb2c^FUtPkZKS@gi zoOQohTrvX`8ckxPSeph}NWoi8Cu(^^z_V$P_<r8(lRIQd?nXO(-c0=33UrsnS_!~C z?z4Lw#NoC<s{37Q!G_PZ0M+2m{7h_;aQ8lLP-3Jd_V>%GFL)@L!hY<Xt&HsM2e<xm z1)fOY&HRjU9z=_@VGX~P$n<BCcuE+Uh6kE|7Ad;+BYn(tT%GugxNK|2?8k*1AT=8| z<}-C}$$kH5T~B*(NAUDnn-cf><hNv##V1$D19wtxH*>V)u0kAYtCDf&pq#3(t$eh2 zQB>mG80DMtaNB5A#;YRzIif3WtPXdT*J<-6^z9rJU6vI#E}_rs>_AEF%Z~-+jCCC= z@#p9Y0CaX*jcc^6X#gc_K)rs<j;dbdHSpV6Jhw+kT*c^p`7-ESzm(@Y53)MfZ{)QI zwaE*eKM`~;U#Rr}wvIxnY10nLjdBj$h1o=7K{DFn%d#KGYtf=4IS$W<YyH|Z;_za+ z<jzdzdQ9#(;M)Tyt_h+G&xV|>c;b=g-}qgQW!O<pEqea-dG#GzGenn}`UTbN3*?bG z0FATXWNjAkR04glesj%G{Ibu%R37r&gFHr~ZaJiKOlaun5QrO}JW2i|S}zM)XARDe z(ew1i4!>3H8zIw~!h6V8S7VKA;GCnI74x%^hh6dOv&H<0So?jv75AymtHHU8@pRd0 zB8ghhQUv~j+E+l<{#1Nw)qv*@%DOSCYNk_UR`Z}d;JMt-IQOzOTpY?y;<7}H^GE60 z6b&6dRwCwOmM+hUhmI7a3*GxJ%5X^_try4trMIj*#ePzW(K=7b;K#n5{bD}m`LZ!S z)$&;G2}QqXC-Hwltq(yEkNjPyT_Dy@M6QA#qFs%W+$E#trYJj^OXd|@@TMF2_UQcq z&)F5WGXoIarr4M}+lbjfMwUC>*y#L~P~y%o(jM@;w9vsu1osLA6=5$E9CZANJ@~;G z<5pG^)Z)ILI5op)vf&=RW4$ttR?Y<PLg`O&C!^hMoenL73t!LEK92t9kpb0C*BmQJ zeL}FeDSS@yjyL+7WQevu=KM%$xrbuh>Kq)u1p5Mx4H<`Au`t{>r8$|8LhUbcV{iQ? zLmAHSd}lH8Mk`3Ed(ZPjtamzAAr$b)Pm>p%l_t60N+UiVm^$95dbbSqIU`+t-j{8R z3Iy(c)<E76^Gn`}EAYwhUZ<y3;pV84k@@6TuVd6>Bs-<2#4SbYFQv^*furA$_Dj)m z0gn$OQ=U=%iYlY1-2un8)wb7BB8O2AI}+Z=Q?$@+P_^)1g(9R(8raE3bng{Llk~d> z9GBS>AB;2lSxxsAmgxrcwJ+w`P7R>6kuKUone)G3O|^J&Am5wJ|Iz6`E<?cMpI&$a zXXOo?fv+YbPKrat*_vmvYpeX8D2xSXeLNtSA^o?GsVjR{Abl61^o*$Qgb~MBTH&mZ z0rC~u_zeZfFSRAsz3cft)=xTqKpOH~VGBcCV`igh;{_Au+ol^@2-nKDXk*jYv~dhi z%Ezy(S_m33|Hrslj3tVU^8xo@B%VV!*H4Ym!39>)eNoRbfg-W8jz3nbzF-wW=ru6z z!F^5pDUfrCRi$(4TEOw*g;b1sn~dNL6m3FpW&t`gDiB|To>5=Rq1<+{`q~(Xvi)k> z=4|nK8EntQfqscB3svt|b9LvMB@m>YZ2hziCTD$gm2PEOZq6geN?xu$xFi-1FFaI> z-=1ks0ewgmdineCS%J^8+&EjH%-^{d)+%x3;Z)Uv;(3Zp={cNh{xFe84^olH_h3Ge zjJAb-z9$(o^JJgA56{paCTlTTXo#in+*q=hKyRx+KA^<S@ZmQs8wSz0B~Nh+$}IF8 zzImuimE1ik+O(6ht_M2Eaw#?}a%ZG7-DDxDmXsSg10OieQvP9!ruZz-wM|H|m<l7N z!7QKr$N=Ayin;oFgXmg`CmvU=E7b$FkZj9xz13^0cMftr(e0wE41y=Fe5g&MyUoW^ zB=-v`_owJ^_cvlT2-V`5X~4CS)<l;b&ykL7ZGI9^6zr4v>$oO^8S!|Orr2afJ=3W3 zo*-++I6mqO1IG-u+Bk@EpD9TxoLGCN1V>n-a1ApQA4IjX;(+5?|LN?g9^0un80dY* zM3J-^PeD5URDLE8ny1DqC-=N4ny)N4Q<-U?_tzIv3RB&|k}0)8q`ghJ73~@5M`q)$ zIG!xIcP4AoY%=<h(gB#ki3z%Z5%I*@DZsV!u08TO2W8cD+#V;bdt%e9q(hDg$X&Gk zprZv=LIr1G%5}MH1xJ6&H1~5Ap}%6S+LFXnaJlSId!e?1`}$uH$DahMjbYT5OkD*h zY1Dc&Q*wj8`nL=1?^*)c-@XK~_Pg*sub9ABp>?BO+nVAatLa$DA&(z@_#wxXCNW_) zr&a8nJi=_;eY4&4USpGP%0)53WD!e2FII@Czl{SXi$A9Vr6X~xbgG^%ln{l9wHHd% ze7{&na-2OZ(FT&J#EsS&^XZh{pvOomRDTw|!DQW(d@;c%7h~i#PG?l_+0bWnhv)}G z^n)S#9qg^?x3WaDvEW|NUYw1)U?zxXvd{uj3VrgkU!fnjn%(y*c1JdMFAR7(@=TaF zl_Ouvs6YD~{Tb$|cSE4)lEGXs9asCfjxP)ptrN^Rhk3@`Kz4TMn%R9f=70Bs-{JQ( z;&X@!j%QU$r{7cB6mPr9bZf36Zo}322o*oos^X_wRs26k+#3Jg2%}|6Dao^CK;qgX zRGE~aOl&~hmLRu}p$}b$(kKh<!Yqa3GTen7*@RPwICY5AonbDpf?@-O<{3r6Ais02 zDxQp66I$0Os|k1MDC^(aNfKwj4Hq%D;o=J|b5vb<9<F?{vT_UMwqL5_UT4hiyqi{^ zhpVS`{gffxEW~{=gu9M0BNd&pXN%F35zTW74-1&Uk#(!h?rgf_m`+a!27ABE5Z9~* z@evWkB^YNn*-^WBFtpBg=ME=j`FZfEW2?e(jDy;v6#tip9Fzqw^!|k<YM6<g*5>2* zsX0Iq*)o0*v$-_Awr^xjQssM|#F|b=GRDhz%I{TIaXafcqq()54r_+ApyH1T$@Q(< z;J>J$wU}pQE4qxkN;l58o^knYD9pXhjODk%&kEt2L-^(pe!^|=2N<Iw$?-s5wvo#K zzDji6MK`9HnSU3w`Qzw*$)LSBPO*wHsOjHdF?+`&6xB>;&J+mNqmKwt(Uy|mdiDy% zCguXVgX>dH+#pBaJ2`Vf21XaHCiNVT<jIcdIehx=WN8&<<<51T5Q+AaLEe=i%Q7mb z+{1Xv9aUBr%(*5&F5MImJvCd*N`Jte!Be)dmt}J4UV~<CQRXk^C?6?d)R>>WF)Q5z zWHORGTZfWj)SX~L-i^pl67tjf1+FvC>^9xB2TZsJHe?TZFuIc^x#7u*C!-{f)Ex`e z^tbS=&rZLUK2GO-bKkaR-wN}&40V+TTxEiC4*O&yu5v@jzQ%?qjJ@G0zD{8_dW!7^ z^=2Yi;*)DHnG51^wTHFq1=XjC6<H_~JExu(rI)~|P1}v$#WDip$q~vsNX1u4@+6k> zdE+ICdkXtjj!@-GS@$lCPX8>c@3zEf!rIYC-zl^g1}E5miIT4xL9yM|5k9%RUy^?v zp=P0zv=X-&sXaS_G6~UDg&bfsV1L<3=csb_*B&c5=%C#HU`|%8m~aoCs^s-47P<$| zwR;LQ5QTF+_8HAV7BUJW;`M5D%{>}=<`{=<=LzEj?nu*6>}=v`UF+hx9+e*xuM3cU z(w&Cr8Uews|87w47t}EmYo9PiFL=$->7W}Lic>IG%BGxe63!az>JC{w&WxjiU2h4r z_Z~pF)tOamF=G6J@ww4H1Z8_8O-s(MH@0Aekd1Trdl!EiX~MHBUUJWio13C*=K}g3 zm1a6`duD)c^)qPY={z`XkAq~Z-4ii!&D-j{FGiavGUuz>tMx5>U26mX2m?{}Jx;r4 zGkd3lukyBR8vIlJB9vT={gUJT3lCw=5x-yI{dlygUocheucmvo7lL$iFrl|K*wJhK zlro8lz25G%-P;7ZeM>E5rb+UjBZ`y^rTetWPWjHESjin1SC!IOFdlA1cBm_|AdKtk zl)Y2GVZIJ|z0Vo+?5xpYOvDGycLghTUTx?mVnbzlE>R$_q(->oE(aW&Ys~0*!guC) z+?m(zRk3JiXb|htbTjT2ic&{S^U1rfD>A{%4`U3^CBx9ZGg;JKr|y}G;XRW}dxj#h z?HMNAd1`#tcj<d)DPp4-je*k`w~P;+e6#6hMewoi>g}vpYext(i5q+Bb1mJjCZJ4y zA4|7dqH8H~_pG44*B`<<iaX$?Sk?A2_}1Kg4ti(17Q$OvrZP%qv?vxmo`88c(yR;B z=fzTwGgh@xA)O)&^t}evV#f1cw3P9vBcJI3ZahyIOzx0JeC`HTnSxdC+#nDJ<PPUT z5jfZ9G30-LF4LNLX~H8}=`jmzYX;y>_xN<NNrVZgPjACw{4Q@PcLwS=3{uYo?|N9` zeGYq{#OIIk`6yVLveK0u*_^>I@iOS|UyeaP6QfY`j#v6r`b0OIZcCMS5are7EkkrC zA<Y(~Jqc;HAni#=hskY0>OT4Eb%}Gv&<&`%-|4onWeo0jei%NAFdGK%Fh77f<}jRu z{et2Z1_V_;*(kpa0`0kMJWb9-N%BvlFb@|bcZcAU^#O@HB?LH$TMNqFtCPm+g{l-? zK$FY$_~bFyDK`{d_d^ZZjnVQlN^|nL8sy7}o@)ZuG!TJpBGzyhC~v5J@(6??Ks;3p zHJ`9h5u~<`!A7@w8Vu!_BQEki;+ZK>a~AD4NP6lB(kx{`4b~5b>NTGL(7lGKlnLc> z9T)f>8dHNdO?J8{nsGMfzGes(>{k75)2@s|IhmAmSq|nj0gr!rEX3W{F?(){X<I^G zcClN%DN^P8V&)=u4j;<#(}ktcE29=rCJ|Mag>a+uKMWtZw6MXjkM89JdVAGO7Enys z<+*cF3-Re&G6=U`!DSR&M!^Nd1(;TxjlI)yYjNiI^u2;^D2C3ZQDwzm=OUW9iYNvg z9ebCc4}6fzQFOjCN*_?}V$Q~=>+GC`$4sY0wj$=w9TK-BN^-lxFi>YV`kYZi+E*>W z6{Yf+oUTS^Hi+su-K^f2Td_4w&-d{)(bm=8<aB{OPrn?>(@)o7>^l60kH&6eeVkvG zxRD`xRx|BZtC{B5%+pHfo`dPOVq3kFPOiu0)tuElMHzjRU47PS_Hlnj3QzFl+em-p z^B7#E3e$JfR95jZFY!9G*cW8RNtR>6Qt!NmG;?LOzHQJaZwRBMeoO8Jy!uX{CFo}b zw7ipNDFQftR^n=T$vq2uP0F3qW}z%d?>NvlWwm7k=BUMp^9(;Xh3*_g^yXs4M9c&w z`LD{m9SM8K@!GV2tZU=i#a$vsjt_zURr4z=ATo|5B<`}P*7epzEBM8xQJ~!y2T4^? z_7jd-KKlK_`2(*Ef<MKc>e!G$w_8;t0sk?RAppS?OKPFfW|}F<n_`mcPSlUA@_Wks z)JmrU^-x?T$q78)7S&EPI!=H2Z?CWk`$ZRKB=OgTBztnLEUUjdxZ>E#M(t0cnG*rF z2wwksA<3fNVSD{3lk0&4&kU;X5gv(@+|Ng%r?5k{xj7pe?~4ch%*JK|aCN*TsxaE- zlXWuf&sC9(GmxXc-O()&aJL0K&t`~^10${p$l@cl5LMUSu%kh!`n9Le^9tg%G;9_Y zH>?w)t3L7^td-%S=U3QT)<QO+j=y%AH1{}1o{HP=lV6h6Jamp$jTlR;KDpvL`JH*! z)fNY~OunAnV>)95F`rIH{dKxe^vTn%mj?%W&-SZ$_ak03`r<gPY89d@12ea7C4xMT z`VMN~s5oaLlyy_I4=tn-T@PZsjW(yepZSA9tZkE1?C(1}9R4GnM^wy%N6?P!2bDKl z3!Ojd7hQ{xu3u1li9(Q7>r9KThi++1uD^tClNM-(Zj)Y^5Pq9fu9@?9{-tP2m{;L% zVa#HNYS(Uo_kT7%u<(+h2xVP_J9VZ%P;{NejE5yF5$9wpZ>$?XHUN)t&z}eA7b%2W z?hoV~W~Cej<KuYXiz96#XZqx)PzOy+VBu!N&^WOo4u+_cW@e(LK818_42>JwlY}vH zW;yoFLJDJ;WRx^P8pIsQ6k(hQ9ncCpabDDfVhb1D)-5K|`?NvywV_<37VYEwSJcW6 zs8~y_qAMAKN8V;rj-Qobn@RZv5M_sD9VYu<9O_Na*1^D$R`%M7SJ;&Hz?-dX%I-hx z+0Lfy_`^F%c5iFqaTzW6e+a5&F8PYu0*+q}lAl?B!|%AhQvFUV>+M+E(b1o1PuUT0 ze2}e<D*P(Z?%heFwr3QbWgu{5Co3KoA?2bh8|{Pcm%xu_jhH_PHnVpjHT_rK;NE^Q zKZD*fTw5=wwM*BCxAWIjTU36x#$6qteOwqJx!+~!O(We|BoAs`c-qgO;2o4B=a)Mt zG!M#AHTXnW2*I%-IDY;ep&CVq6!RKt67jUatZhK`CRMEDo{2g0^0C9emNRyv4zb;W zd9ql#e5_ACh2DD-Tc5kx(2%>;pvIXLtvw18G1q6EV(ohNTz$9VY3S~sbq+<Nh~<7- z@%G&jx<WDEhMZRSOI!eXvPI|uCCIDMz7HkUSu1frs(!GV_T6%Z@(*?AjhGa^^F%N* zLw}QQ{1t-w9L<>QVr?DV<2dKow7N5Y6wcQ1Ia!@5<HMhKJ_A>u*w9(K6dtRNdXlgD zx9Wqn4Dbs!w|uw+pLM@#IMjp|xvUejq)yBr{cBL4kG8VtHRZS`AI$xq_wLEHJrW0# z9^X2tEhqE)0CASX7{Q1z3C2Mdl)@UwhhnGz7tDeCVL8;o0$2+5E!~K_B|CQM`s~>H z`UZlwXJmV}v)P_lPkprln*s~z*>CuF%)s^<V(SC-3M}wTUtV??+qMW7Jk)Yp85L0K zfrnbzc>58@X_L{VfxV_qR~_aVQ!%r6pEbH7Fqb#k?{SoPHPGhlM0-WQE=M`YmTk4W zv6i;Z?l_6D$UcqaKCYn?Q`OSu%VKSSYxLqSM$I&OM}YQX9PntPGnE|a0e7Afp=qiY zdDGJ=YMY?^x`lqFFT!H4F}(%r)6gEV6=%<0VoYD$tikwOxwY0P@%#7F(_^K;L(eL2 zye2f~@ldVQ5ci_zu#m0fS&Jw>Yq`^%o<6N1=sDBBluJ(^dh_#?MqTaam(<Mv)ELaK z=;Y<rAU`^dsNA=rf4f90e`e66L}%@nB<>nR<7aDpa_cFHvm>@m1MY;rxheFvcqdD5 zs`ohQ)Y#yXz=l1P#iI3oLRjkWDzFXnUWzy3G@R4sUUyk^ZN&D+F5`(?C)Gz|G$`c+ z>Vqf)UDa<r80P`*;j}->+P=sOQKyB@*kkb@-m%y4UgGxT-=%Ib4KjT#Do&sN0)INX zGv-*_ha>hTyf<=t((h8X7%>JY0j6(=&Y@e;`CBw_{N%9lZQmTPjK0NK9BENT(zy1U z$K7fS;*Yz5e=;2ZR_hz2w^+mL3Jl|aowgDM5vDfnuX5w3coLm8K%<-tMAMA08DTTR z+B74qRsLtBN5zv3!#G&irX|79e7kR_55uV2$wSqLAr04K3$5q8+$hJZbKp~(mM}!W zkIB<o+3DQ9M9b%f>s2ZG-H`#^tK5!27e!BxYp(3Myh8a+4(?9=rE`1!n;@d)1^1jo zTYlfUMX<Smp+3=-1n2g=##T9lGo;XM*HhMmW%?O(%OOH^)&2?@{AI6tT7`2T?1po` z-SAqy!G7K?0sqdqf8PyB?HfBLAC~2+1Bn=|O7a>#-=o$xY5BGkOET7es&5M#sy0?f z^#*%?CU}pw_g?Ki!UlWaVX3~g*QDT=>-m6MtJCs5CS_!`zO8#QuJfMX7`lR8PYT{( zd)L*jJ#4V+H>@|9vcJu5Iv{aL+CW(lPZubb<S|-)_boZcJ@bA;h;tWm-jsx`$azDO z!p#ldm2+NPB7#swyY-M`tH;moc!$}xw^FEkt)8Ti*na*KNs+}(l4#p_RF#DKc6K?( z_o%gv8ooVM;b#Na7EBzLL`Rq;I#fvzelbUqpqfiFBndkglEgcSD2bniB!OeQa4gnS z-)P%rdegXL>pNf9$a&q6M)aB?jcB<4j7GNUhBR`R8Cu7F-G4?SPcT=y-e<v&o|y^L zMpsB1UANRm7iq)zt=iZi47~FP_Udnbe2nqa?~oO(oJIMoy6C#ShK&0+`X|37%X8mU zwQ-as4N>hPkcLKLt%to?LnnI&ZfNMFA{oMef#uuO+V6oRLnB{j+m41bbR>9$G<5RF zz!4mKgfw*W$krpNigaiN$vv*#WYkkqz}024(C_(|VrH_jHK~x_A<6TUbx~_In`*(f z0P3HmRUPc5^&G&nmVQxds@vG$$6T?-(^j2mcRBo?YxM_NKiiLame&v48b3lm^)~u1 zH~p&B05em3+!tRm4d6Uebi!a;0#cypdBdLKJq-v8f%>BY_rkqDTQ}Ixp3QlaeI+N_ z@o2-N#esVIm7vf4!k6SD(bK#^Z!Ng}TGtq8q+jp8Nj_(s=F2^Qvi{vZr!?eqYDI{8 zHRN-CLw6PyrXTg$|Iu#P?x8m$=4KO|BaI&DZ{7`!&GesN(ag~P_sL`A+w6ag6W*^5 zv$)#O{;y856Fv3)`BSBbREs0u_bOT3LC02H$BqNrE6MW;^P}zC9YQ6oDLD{4D=90B zsf@0PnLoU$*!fJKvI{XAs5)X)c2E=gG^+XJb=P@iZ?Dm|1(QRT_9aU@5O-1UZ`k4e zm#bCxpHH3>8Z%29+I<I-arfb<8+)(4%ea5*f#F$`6$*XmKav#+(IE<Yt=VgWw&35I zcc*4(-s6MnsH2*;ZjwCBJ=+uYjk&jWHJ(M?D8J?2sbsn|OTSkF`sFk<(0u~^2jQ1* zUKSb)&?-L~w#r6#24aoJ{#;F%=H3ix?#)|j?oHC%$ZyqLN5&Ti=&h{@t~!ng^nB|8 zt!xKI^hEcy1C5GJ;kxT--ET02L#w0v(xDYf+(zam?Y~XlCb~wo0>uJU?Y|jQc@Ayj zW=j}J=fW;ocD-X%WI2~1OQ7E`tQ_D2MoS{LEn|jl0X;|e@!l_nybjif&V|to->&}h zp>%+}4vj2i+B!lOaUytvyw33xU!1_PC&=p@Ke6?M(cb1XIa2rYJ)M{rB?V5N!Eam> z`5k`8#+{P<x$=7o{v}Bc0-Y7)c><6~ZRmN9L&7&b&w`CD{)HjQPtEc&kYGod%jAjt zo-Y@kV>=XS2R%O#qU<{yZ!HYTdm&$?N_%q#Ni=4D>i*vyh^c(7K3GqFV(Woql4~=` za5qFdA}jkpk|63srf*0WG@9NWE%LI;+go}^OtG1dGxpz~(kMql<5U(Jl^da?ugqAd z-^+{uGqybLFk}Dh6uKXUW#Z$bfLpL{&06?TZcN>WwQJ$isvotS_wGjiW;FEGU+JH* ztnZ;K7uLd^^X5Nt=Ysl0^A^@OtHAQ*KTrU@s0V?+86o3g9zu2R!}FJW8y{TKw6Gbz zyL82}g%7THSiF15^7+e_tysD|Jw08_79W}4xctFo#bU<1EOB1_@_MYT<iR<=8Ob;^ za_1F`U|E@ADO@Q65B9r6EB0rJ_V2ot8V{D7-0w`z%P%M_s&8nVH@^w&mK?b69+-dE zgAa={%BP7BFJIB{FizC4V&S6YV%gGVV$NhS*J81VcZxZA#os9`&YKL=anN+jcd+Eb zG^`I(Et_^%`Sc1XnN~kfY<h6n;`-%CaoNHp&A2eJ7)p64S+Zi$qEaZC^Wbu^{zj)| zC1$U<?kdE~u;f;Oi1;9`f{aF3#RD)JjTS!<p%44DkM3JO-2dfA{}2BBv-2;@@UPFm zKL1ZYBO>DdW_j@+RQ~n(*XLiKf8I}fOx!=D{4;*qb#c(c#ldcU94zAFU>?G6;B!G# z92~~7COQr_32|@=iv?v=j-@V4RvYyLupG-1`~ZwVm<hG(|9>q0Gg;PPiNK=6qQ}Bx ziN+FxB@W97ED2afVoAc1g2jj>4U33nG?p<~GO>)qG672#mPuGFSaPvU#*&Yv5KHlA zYGfu^Zd!?Rs_uLDH7#Dvt!+kVCYJB7Dysd#Lw_e@suT~6LOF{!+odeu92sV%4}4?v q^pZFz#3G?yev3NXg=H15;(1C`dh@U^Eu_bn^=jW7)cvaLIQZY89Ijvh
new file mode 100644 index 0000000000000000000000000000000000000000..a8c226c477419103b7adf47a2c65ad2e98d1f411 GIT binary patch literal 118796 zc%1Bg3tUvy_WwRJb7o**01cGK3=Z<h2N;qdA|M#zBQ+ppfRu+QDw?m<tb9yfwe(ik zEW2ed^JbZql{d@GL`_Z6OifKmZRF-_G&A2BIRCZwnK^rbaO?N_|NftU4xeGZXV2bi zuf6u#Yp=D>-e+d@>Ypu167#$?%)U^$3SeE}zt<AwstdC+Eo;a8nJ<%+uigIwSZoi* z-v)OQ|2_x*)j@gyn`UJEtta14E5fuo{>ImqVDbI!*X`Hs*X`Hs*X`Hs*X`Hs*X`Hs z*X`Hs*X`Hs*MINJZYb5zYi;-hSGm8;tbP)FSF9D+8n_-vuC;KTPOf!u-HBYwa2-yr z^>FP+t_^T~QzNdu;QBnd_J-?Y<k|?=yUDc=TyG%PzHq&YT$|wfHFE6-*Uyk^f4H7W zt^?qD9Jy|R?I+hQvHj%w4s1WU4#f78>mY1Dxo(B+C)cg9{gSv2#`crz5NtoW4#oD9 z>o9CTxi(|_$+ZRBPp-qU{p7k0wx3*EvHj#a0^3in+hY64btJZ*Tt{L1$#pcgU&=^g zOfqKs55HjbyE&`EzZ5=Kbg1wjc7Z|a#tZn}W=M-=+5T<e(*>U~@OchCH9Suj{yz}X zjzXI5k`}J~E?NDy!xe+i-tgJ(7XzgBzi^^Q274mg&Q9NDWmsy$FWLT+FPy?F^_7tn zz+#eOdt{{7u{+b@I=haw%bsS8@t4?0c<YmN%#f~Qr!sF`$?&UV5q{V8QgB969h918 zR7#~rRv46=C%dhySH1&E1M67(fu)*^Yz7pcH&pb-JOS)v-*xqN*GwO~tHNw|dBJDC zG*>Ra_6XBnnCbsC3-?>d<RF8|JK87Cl<1$<qSqY*f(Ex98Zsj6LCcgjGa}|jJ{`UI z&R5$n@A!V)n!CQ}y!Gy{6AyGf+U-R5pVE6j&3e?A_dGAxcFkb_g7z;qIRI7kTqo<3 z>RiVmWoFmM*~}hu*^gZj&u1s#b6Zjm*GZ7e=AKF$OEsG^+d=Egm^R+-$}ws$q~G~8 z&pE2?26<jm2Ah{;WmqB|C}~XTKvNfV${*4UR^}CLjPp(OOAF}LazNnVRzrhFgg$7V z5<bH^x9!tWi(_7Gx4gsqv1>Yg5x+Iz>n;b9jwYW-`6<0#Z%Mu4Fl0zjSJ$VRKKr`M z!_8^KcJGLvC8k_Wz^fjftLysh-r*S$z^mP*XItMdV-7>9RLbnOnQ?ZPF3j#a(&j|H z-S%W`MsXeMXe;yb+2hDv8O?j?e6lekzm9dtpI~&J*%u_$7#(Rg6SF{@bu8;fC3EC% zmS_AB!q&($3?a;N-puOG-1te#dlcx{4gF*7w&1uJn>XuVlOS)kY|T${Ee>*IUX<JM zlyx%8TWs>=@KA-34JD7oD(Uj?mXt}!kD=t7?vmcLWZ#Q&`&&wSlah}@$x3%g)9;ov zk&+ouGCnpVUjj*us&aO#ksX~^%T=!TZrTk|@LgbRM!LkLggetmRaLnTy1=qQ>bQ>j z(`mK{pt~|L&DI${7g=T)da)UXzVIHvEGILV86;h6wIn4obF$ra-m2tVCEt^`EN_M_ zk)_#&!u3Vd48ueyGX=_w<z-eunc=+5I;#XZ(K@y4Xt&*H-|m#eV!jGuhV8-Uqo7PQ zORkcbB?;`IYo;|B=(E+(c8fWuq}Gx9#DnI8E?3Agi3P`p^kA$j$l<GW7bE?DC2YGn zC)DA{t@>&4V7u#L8^`gldZj_1q?MSMu|i^J%T~&4SQ<#pS#~2@;ifCdFId$gMG6;9 zX}0#jNgz9tI|C4meJiG{=T~XAXvnkd0CGIT5W&o=7YBuVSuSXXvcV;_A>$d_ncENk zXI5txX@_b@NEfz#(XbY<CvB8=E^X5)2l}AB-PWPK!4dOA5M%qiHin(g;qvJIjYl5i z+H?o`vUQH!8cQ;?T-xXS?6U#gplx9))gd;hvo^UzVxc*i`_AS*du4f=%Hz7_iFTJG z9LqXC+Yy&m;>}Pp&cchFcQ#lzbZ4#+C?FNxVExd{JbAEguyi4__AF@I41+hz+_%-F z$P6W8cU=xwB;ov;Q{8*~fZg>>xWe!D@Yc|-N$u>m1?^aM%qi&Qbl1()?<8i1z8;?P zPuXsGQreV~ksrW16xVp|>~<&A>yupFZ6q_Yfh<6Jh1Ib3&=za{9l+)HFan&QtwmBQ zNHW~Z>w+{m)z*S(;eQa5;eQA-3{LH8f&78YJ5jnY8b`6Aos`B$&^oBkEGfLT4Y#`v zTChKtH)u~(IHo~+t_bNYxB_}>QOaGmY<(~ldch36<H)TYVL4{z(%)yXyXILG%~{4N zM!PBAw4m%$ZG+i#TOm8pOO&47Am2etDrh@O1}LP_Z`NCuCn_zdjq}tu4C-rT5j<`- znd1?ql(b+oR68<;HO0|b&XL`9(u|baTGq(c-A-2s^wo_RyX~1fW4eL{I%BxpAD5in z)&;e{PvSCl_T9|;;DD(k)Zvxv(Yms{)w1=x(`5k~#dpHEj?p_(OX67S4-&MzJ#Uq> za9>&)%mX;`%<<LT3^0DX-#UKNP!p-{`IMe>>z>k<%|S>Ztwd(Ka^KB8m;1K-UTzw+ z`fTo18QZ0_@fov_P0iNspe5$U<D29zGJ{sdaK1~!y?ifp80wpp!(xCt7{$P6W>LqX z9R_zADqX;FFxD^_zEfya01Z8-(F$m6i-{=-Vp5(wYz&kgGg4-=SWH*2a46BdiXPr@ zZMS7bYs1&O42N3hl^a^%Sa-yH6U0(M-rcIandCgXcYZJJwm=qE0v>%uAlo_B#WHIu zC*3d|{)(~9rbuY5sq#?ay<lGuXBL&ie?&XW`ai6sSu1+D)6W&|lT$}Z?A)0pL9OGp z>48j}9l)wwSFeLz<+SkIoqLfNOF^ddT;Zmz(_xHi!?SSyin7~$qY6R|+r2i%{2at^ zl&AgR%~-AT_-8Yu)!GfMnf71+%UA{Pw*pxCr!7D~wdt+hwNzinIe8jb`70wra<nC_ z!J77icBO%AGHZ|ipkvj8cjmiTWnOLcH}a^w*{0>a9?ZKKWG$WrJzAYsT<bW#L1wj! zdma5w$7<8GdF3{&Au;`Y_t1<gSN!#@iM#SOYzh3A*k;+7caN<#!@T=~j)JsSn>6kc zUD7Y|5;w2SH7Q)SPR8r=*N*H!zF1yiiOYqYE)T-;vm4~vevR9=<Bu=K94xO-sNE18 zX}4{UiW!N08{5^JS&Jpj*>2TAXt72X?c^iniYa!y%wj>pUPYte|0uW`4d1VU`S|oT zyWx3|@0<oS9tRpr_=p?TPZ@1nP3`WJSv&AY$Ko3>mi`e+=SOjUibDN@9(751c0*5~ zm=I-%Ka{XG!S0$SVOl3h3y&HSs!f8p$MvM7wcWw0LF!r1ik9%5CJO!PjCAy^HK})| z>r-L&4abs~p^ZOAqSsZ~H97)poWX8zKw1V*>u`QD@yI?hp+6@4rXkL{GxO`g{zCqx zk@_4%hT^@4q#D6;goiVr|9qr%TyMr{R9L;O#o;U#D3lc8+?h4ZQMjZYTR1GT%2ne6 z-vcyqSR}SAqpSXswb;&>t=%v8=3-k`*CVdZpT#oZa~5Mo%og*DwZabLbY2kmhQ{T5 znOXExA^J`5J$&1rm#n?QY+jeLVeVliF~3N8J3;p{0KtFmgTCYq^Ffd_Y|O})ysi1$ zfj&eo`A6YXcPV2eL^Ju&0-%;*i26mT+itVA)t^4(T<bh>Dua8tRjyB5miQ`HwyW+g zjMW0$+HFyg2h$2%Fh)R5QIHnU)_UH`Jz78hALDA@wu+3Wdslb1<_FxVhw)RAmr)XU zVO_m7KYmJvA@D*;UJXcUTarKHvuXas)auUqu8iq(kejw`Gb-vpvOz{i?ssyVqOm1G z#x=6tb*v@yf7@+IE~d|a-8CX_r>xI^$2AMC_P9ppJ!jJASGiMnKx!M1nl^lwtK8L@ z-2-t$dDjrox;I_bP+kkVV|N9>OmO3hHXK{HF2ZiRXf>R+*aDdGkmK+TlQkb^fzB&o zZbKWt@P30V$!+qqVB_Z|mes6`w&q9T_a?=@o6z<e7}Mlkv80VO!TiI#oMp>~dOVeF zxzgZWh4(@meW7m+K;?jGSWS%yTT|ug<k|u=p3Jm)L!o}~lY5odRHrH5wRGX^VJt*l zodF1S;B0QKY)y)THf(4yH_n>W5zxmi(qKgDOEge-3d|!bEhy2nQ|N2IsC?HIwf(6U zVFh)CpL4#!e;SGNMZb~tuDZfYSERhH@=!wn$j)xK-o|dTx6$w6J+ymbsx=9sZr8vT ztR@ubvf6FuUF@O>dp)Ja_h&L|LvxOBZ|vwX7psQv)?KkCLEP>#w+M@$lW>^#FX%~& z@1fT{SF8oJ?<S4{YjH<tmGf)RE2!72&5%$&iVYz~t_vj=v+<Dcc1Pi<DH$j0nC~90 zW488Y@cW}<Z5DHR-akyKwg@whf$DrMtC4littPzc2H#4~`rL2jonKkaD`kyS3*)+D zj|j6R1IFkbb9p)BTyow6((i5y0liz<i&fT-UX`ew2bN}Poua2RC#HryY0BBd+u5lk z+FV`XV!k<Z^1k6I_o6pj)EUZ;gYO)<3!-=B`!n%f_mLq+AL#vYHu$z|Nl+%#@WRm) zXd7}6TKYxdqkxa*PKPT;q3db1cdf$hw%Os>jxjx=&5C7<P(FKGl+XLxn|&OPzKen~ z&ewtG9AZoZ4ys)1Z{lYfZ_Pd)dsVqs+)RbKQBU#HZb${{W5b7pvVFHmd#P`Lqp%8m zP@|;S6-7oq8y&f;XJo7biR^}cSR43ZBJYLTAf*@nV(JEzu?N=4y4tO#wkZADy4*|h z;jg01)v~5`xh&N(u(huxW*n;nX#-u*h0MIi04W-8txGBiF>cALKImeO!s=ehYMyCo zp1R+<K%UTCCC|!4OOCdny3hx_zJA};xiW$NCkGVH7MZZWyMgq~(BFYA56H-2zwa1J z;<Bj@>I&_}wAQ8T3m*o2B=-^Qp~7o&vb)s~!|>i1Zn4`gi(a6;@;kk;q)~4ifH`sA zO{Et;G23mOz(cnBBSk51jIG`q<{_x7)XZuOj_J7mbNYY@eXh)!Ek%kgn2uLqHNeAx zagF22(fOjRNaxrMNA7Dsg@J#YU}kxaZcD(L#WS2UvLU|)ETdPk0pzwp_A2&cJ{kY$ zxh&55f{SH56TrO2xm>1#FN+MNXGhwZ$-Yi5>$$*^SLR!wpO%@>dFsT}H;Z<T^Jlw9 z?<$7>g+233U_*Ss%HIc{+3=Z}5Rl=>tUfx6&Eg*9k}ySsS{Ts>#ZM7c=C?M21<7u0 zJPmPo2<R5r`7I$3WrkF_w!s{lAEE`nV3<GtPw+>Lah%y~LK~23lZ<pNWkJ2&H7caL z&BSZLPqD@j8)mnC9I6dJ;?kdHHK@7h1$MJVL`b!$Az|^MYII<9oRBfn$nZr^%yE3R zDKy@atn118Rk^0t8Bd2nR6aMznm-L@JVTK_-HTxg$~H5hq-a*rx_ZND-$T~?Oy)d% z?Q3l~u2trQ+HJ!_2Zick^p`{2$BL{cdosfw>@{nC4$LDpaoVI{hW>7q%Xkxb3W|h$ zMv$hpA`SW(OPwop%8}r)`<#^6fuM}y0On(xof?|lv3PbWlt}Xd9(r>dgeWt`k$dCH zi8!Cr8OH)x-I-@B=rc#cEQqt8(w;8$kv&@QnR~bo)|ct*!)vNL^VUzH$zis6sojg` z0qxbMrfByDJJKIU#j+5)ZC;2rJi`TcB)yLHHkbqT4m0Gl7I$ZcL&p3~uCuuqKbIOd z<ssi4D?)>J<#vG9`R44*tz^?!wjo~1(kIB-2K<|(8Dz+I|D|Y^lwc{_kRW@~leO7~ z#(z#Ie}o~5l9ZGfeYU}_QLwL+s?t~fHeehZi2AoJ&{}*yd!WP|Xe<Ej2EERx2w<@l z6H|8;R)Y=SmD|0-9N6EW<$8`5p+Ahi{x-Z%u|(hfygASkZ%t=j)@&>E-@-aee0Aq+ z1K#nNu2=eLekxMvSUf*fiR@GKD98RnqQg+4c0*geISFU!1zvVTh8r&eYtTjCJ;@wc z<w`*hRc}^S)WBxcy6Mkz)1T+2Un4h7f3u7<%exL>+VlNk6!c-%ld+%yp~+RQMZbX^ zPm8n-;ChETH-Oa@)+AaWLdt@6O~UWvZuvesvPWO$=yowEvTHBkcAnmt?C3Vz6bW@i z_U_A2&vxC2wDpBZZvd;#tu8EwPY)F+FDsNze8JPWwOwLqx>dSnT6IpR<p0#2|5JDV z{ko>}uh*I5yQiZ(E9>lrLpnt!nIMx4hOJG7*3JPNIvb>s=^ll#yv3O?3TxspPcq~w zg*>&<kzLam*Ma27-rbl4?HzcXTQb8;H(#HpT40oZ{%=PTSczs@;nz$nu4<)y3g?Ny zc^A%kJVvp<D&<y5k+#GJ+$RF}$k+1{=8c8CuetNimLh?Qo{!lSuw+Q{EN{ao$+36# zj7VD?u4eSYPv&%<`8C=)a|W|cwKD5C@Uts&pm!6QhtETKYx6LkPh>ymuH-HD%f)mb zZvPUY1)0vD&U`N;HHgGcXp^9PkIoD|vPs5zi1fp~v=>?p4IcbOVe6qsb3?#ihFN~A z!bNl1aZ=N?oOWwGy`bd(+@1fEX7azLL0%$z$ML=lxQ=VfP1iWN845$1sWGdW{ITx* zRqp&%?)-tx<gb&=T$1e>TG?_#G&2@h^Y6j6QHa6sXWFE8xRMm4J>QONMHKY($JZiD z+QXI4NSt%JGiMpt2sagNI@+y8*U&eK?24;xyZDUjG~oYrhRCkb;9YFCDD$|t5%m~9 z#q7IIMlK@x>gsHhH|S3^P`M$YW|{dc_Yll-`#5*b&Noaf0oMeOo)Rs#ix^{z271>6 zw#rfhu3%uzmAw8G1I8n%lH&8rYONUY$4GWpe?3S_QbvLW+HQvS1Vei^Uj;rBBW;!j zW55DqU_qS6g5l~b$_-{#m>KP^R{8^O<kf^_UDT_o{y33%>$u$<*Hq5M(F&JAz-1tx zhpSv>;BtXmzrJ)+_)@hLjVbg8OR*+MS(%uZTIDLf7}>Q2aJySO*QD4qYj!NiB*&o4 z7wH#So;G|VSeLpM;7_*X_Y}FUvb#FT7|)w8+6@IQ?Y69zihMEZ-T>a|ewT6=%j}D} z)?UE>p*R-mJLJ3$l8<VMzTMQ8Rj#ZncGp`vB?|4NwHw9(wc?f-Nm%m>patL!<h+@O z^C+MDizlY;%*EJ$XXn^rbKt!&tD@CMU+7+#*Y54AVLnjToL{gG)Q~pd5kIbY*M=GH z&p5NtojK+)Hre9woh?S>YhVk*X{9|Dquzn~iEA3x{Fcml{BJ?Z`hrrXWAPlb@2Gck zkLKbE4f-h%E5%{V*9mHM9<Oz4J=6@PoX0;g;n*7k*PHWVi(}2;zkq*k&hcEumB^NH zrye&~f`<?XbyS~u@Mqa#H|z<p+u{R;gz66&9A2m0F_kgnnL1p*k4DZTj4Ur>9<yf@ zZ_;&~`KeOxYhD)g%#8(yio7a~rJIKtr%KExXH#BI;WGKITw_5=<&yeu%f^D_{Bkbl ze)-cxh&ftp=WRdeWw~Oq6l^cT6|@(fxN^|p%w}iJnY5oVlIVD*q;^*AY7?%rg(XWp z?XLa0ZahM%Jz>egc;`ibyX}a7L1=l`_DuEcps!Gaz^^OiW2bDv2tBm*zC35)x}kdT ziHweO$DM=qC0h4N#Dc+D2}l90lH%dEyX44SHZ&3}4;`89VPxJIpya}lp@Cc%dqu)% zK`*sU&nnl(n_MOk`GJp7crnN`?kw@js8hyFwiq)BIA+ijTN7=8k*D})7cM?<3OzRT z(Ij>P{Fe6anXf;tteC1~ThSWXTATw{5J{+G>arHsQ5}AEo82E*wXFFQpmmE(%6)oI zu6-~9#`-I|7j4{}uq_ww&dy>qrLu>_Bco)0uz0>;+d$5-ZXEBA--P=sI_e#P9tPOn zAVp)^8%sb_+Cv{zS;iRJ8!?BJ;IW8{)m)i8S6SWy6XswEA{N>M{BQI_`}>Luc{18N zOl=q8H!5Rh9lOgG9bv7ovJTLnCBq(s|5=q;d5*FL_4rMPlDTYL$zu3+K72k4pO3Tn zigpovM2?I$jw_MC-cJDfrGA`RNi_dXp^tRqaJ7`*ZOAIhs`Sw91T-swb|;`&3A8%_ z9Vwv_s8_kJ-?SUT{cr_T8Sl7Sm=ZMx<{ojq46bEz{bb}Ah%v?WX}C6VtFYaq$R`fu zx4?vBE)Hgs%|3S51RwAROm^E_rYcvs!){n<av1D}S&Xl}=3&|Wz6GIrhbF;ry2=%G z6JtYb{vb9K^u`?jCP=f(*`d%bGgz(;fHX`8X;wfm3i!R~DpyOm(lP6?6gKn+nPodM zt){-*rpyMO7_;Sh<7w;3?ri8O&|fF^Q;idA$#iM}?{?#%KQM;t8kTg)9n01HWIT;! zhJsF`o+kTBdF2W3206QKRP1iWGts*`$6(AAzq4}%Gs2%2ys>qSbFOVRXT~_RvJcvn zl_EvH<6_3zIvW+qnj%aSe5d)0!brlWG#0MQ^Zpt1Rlb%j2-=40awfb_H4-%-1#@R5 z41r!SMJ$iTyk$JE#Pdo#FN3^{^-PI_Z+j*bL(Qg$ttP$4hfcs!nJFcCW3lD}r0B@4 z**Xqv;CMr4-sf39UJkw%bIKH<&oRUsA<{{8r9sYDav=`$vD?~`9MEU#ci}#s-d8lB zt&h^ipa{h~%V0jIPmEMn%+nw>+{<{uIMg?7MoCbFNj`@=ffBuX>A`mu_wumpYPrf# z?Xnwc-7@PIiKDe!B-Sy`h@9X$hg6#eX=QmhbIo(jFm#LT&P(r;XPoL5S!MVUC=4>9 zZNvUUn<oL6$~FG4=pl0(GuEgFjeXH2<)P+S;9Zt?1863=6ui2=%C&&dQvTa*U5v^- zfl6n!Yy!<Yatb|wgQx6<4o17J6?|*qYfj5dnNGaN0lMi@QWijrs)sy9#v!4&=3oVD zZq4opk)Yl6BfpE&AHKcptqpg$^m`14tQ)N0IZk9=D<a>X!n^}eLe>rOigtbSRVu5t zR<vQ-Z2>H}z$fQ$Zoewrsc>$`+x4tEG$$-~K{T#z6`%yF4_Ja6%o!RVmTb<j^s&1t z{DMmlm$fRWF3haPRGby?8}zH}E{C^qkIx~bQFG$gH{O;5w_EceB585M6r2-M>~bml z3$Ep^lzp}bW6iA@TW%_;o@)w@SJtpgszD|<9Xp<>SMDS9^tRiEd4r|MVMUQ6<5>B9 zEtprI@{vKzP-=|#N%qaCa_L<-KKpn}d5+G?-5vcX6O1-T;i72kJSJIZI$YMN#muMl z(6F_`Oa*ThUMPGU@>LF7W_obgY?E)nH-$TkUF>|}KOi-;5_Li;f8zx9T%G|fm0^38 zYpF|#LkDUVkMR(AjM+EQ?hL=Fr2GUaU2cY)wwyFGYZA_mUN><)vC7r+W|p(=%&99% zz6+4g7i@8WR?!M;el$dGwcLX|2>tEUuzl8n9a&~Adi$&rdqjU4a(oIp$M4U49%L=v z;|k6BGOs4LdhgM_O3s~oL635F@;h6j^Pan6%^wSNt4+$cNWm#9SgO>Y##I_i{`c<H zq){5rYSO3<bTuhUGw?t87ph5>R<M7Uqo3qKH=4-zA1m(|eKDvT$hsSh)IQaYZZ~DS zD_KS@u?~#m_omCg3t~p_d-m7i-V@B5Rqg1!Tef%RIlgPbj49q3t@>2Co`OE8kQ}3z z1$oL@vjdoiI`&K-(A1}ZPKJc#JYy1bwCa-u-}S?LdQu2T8m}~vvz62h{6tp6HnVk5 zFZ2Z0h4YtEms_ykd)9-kb;lw%KtIm?hN;FnC6{lSH9v$o_kJpe9z5k@t1W!54@QTX zHI|(3bCs2zmGzFjo8=pa-<CrUIX>Dfhi?3Q(;7K+?dP8b=ag)2eb5CO{CAV0nd5%L zG)M01^=N12s&*&;H^uI3mP=}8)zn;RofEp&k^5DgQY!hk);T5Xu+*C9Zl@&X*t<@) z9<;L1^DdV;r{1=dRl{6kP3pv!$@c&?uir|XTd!D?qVX=njkzWTUA%#9J9k6TMZQDL zaJ>%4u}){VJt^azMqIN9sn_PiY(JtyNxjQ^L{?shk@YU0q3{XUCik_!`?|%5JKP98 zMD%%shPH;;0;0A$#hOIPc3U9C%#-gF`{K;Cc7rdZ*Xg7LYx?9nt6ayxdf(8=d1VPJ zWn9~Ldzuj)Y)^AbzE7u5wkBmjD`s8+{}1?$*XbRp&<=CXHju*6V!PpqqVYvIrY1`m zTPUMyLmVAdR%Vtwf1T97WTt$!l`J{d;!<{R?%CWWGma*;f!c0fMvZdI@AA=S*!3qD z94(%}<`ntNHx|56w6j=Z#!<^Eza9slrT-YVs{*ub(ou+jjzV-;Jrnxs@y#+=L|4H4 z@d+;v*p!elHGp-Rm)~hm=a`2X3y9wh-ieiUV(nNgOJ_4#5=&v(ET0WzgV<zN%to;Z ztgNyY@-C0_pD;JhzpQK+Uag6aD_kST75W#J74d6}V>EtV3Hkt{tF1x)WsWj_Z8A=H zbJA`|TW<QP5K~U@QVxzC6F18(a`xt)u$c2TY^&vHeksHdJs@iMQa0!7AWpaB+?$(P zqG5aTj)E?N&35_ZqMl|HZv+%RJ16%@F0Mn_ZQC?B8!ElD?UJ?FVJI(w5ehw1Uec0j z&j&Cg=wBZm|BSIEa_>u1G`7SNfgV{0zDEUj)LYquCBYGufO~?jK`PW9H!e8h!I2v9 zt#OrctcLsM4_hMq?T(3yEL>YgCK_20N09e?;cinLkD<n*?^Su1%@Wabn6vQYl?et* zgy*i#bdADo@FgXxUlj$h6V9rJanPQtl9jKef(L&QIe(_!!ac9Li!fJ6SUy!#<vMu` z>=ERS*Dzb)g(0DMCwQHVccC}s;f$~#-_A1N8;npvdw;-O%AN^GgP0b538sPhv(#SZ z3%;Gbv!l!jt=1R3S2&Bocnsg-(q8cX$>)UWsQ-Z$U*EAc=!@2CLf#KsZmE|pRKi4s zW7g{@;|brReg^`+Zn-t^i&krb-w$1GhWR{|Nf%}*d0=!mLFeDmfbv~P`8~Im=cSt{ z3nk-uNi27$VY#NtK>l`W{v$MhQ~cHA9Vx+=L*#Evn|m~vQyc!HtNdq}RZa!5a#sjL znvrlF3D=QutqnJ`S^PZ5X(gX4NaO*m4G(6X`ZhM#A3<%JlZVnDLE*qphMS*ru5wok zr4IPih6j4+Uyu^DX>u>a0HjrAV>b&zy*7F~^eYT&9mmlVny0z8>CzOwzXnF5ap~Dj ze>GV_)0~^mg6@8qx7?JG&m{cLnjg&0ZhBWP$aD6#yH~E-rR~i0>WwQFR_0r<J=?{q zGglODHl6)yBRgBQk-b|MlylBzXU5OYez1`RA6i(`Ww*;!u%k72o_5zvFXL$iEzuhH zgvN&edfsb~GpJx;k<S_DnU_o@`wpGCerB)iJoA~1c;y)j&!6RGbSS7)Ydme?C5ycF z)OG<r?|moexbygYQ;GA?@$1Jo$<E{N$R*Cu?R%;%JM4yFts~PZO9?E+?uybHH#XUF z7%^WCbGJMnT3!(hsnGIa!MrtU+xeVr9cN{x0vw&Ya#t2s%WFTAR&O0_Dt)&MrO^7& zxgYFY77Zk^XW>3Y63U&{$p+(T1ufJV4~6meEHLbGwic48A(E(3B!T%;3@8ai`5KQT zatv-seAXHy@se8-Q1&>K1swL_p4FC*%xhPE*0@K`={-H-rSbHL#_&gaWVPPYBfBLJ zAKUeRq(`2Vt{wkUX4Q7XbcyuFad&SVZ?ZRzV{e#$w>K7;>OT8izW&a$2c&A;J<NOM z6v$uci{s7rka_#U>MozSTthxmdSjoAJ%s2y!yak{=(OChhmM@7Q+wzLmkj2AQ8w;T z(8mlVgC$qVd-l0|Xs>fG_Rx{Nb$g-gUhJVGdspra<I+J6LQdzO34wkJcH|$o#N#gf z2@qv0+#H;2Tx)j?=X_ymksKBeX%6Ur8M)ed2Km_mb1UwHwUjO#Rt<6A(84`Mt#k5o zs|#<G?UbwKD-bi4RI}CP-+-O^6zrD`_o4=|KA}~HtG`OaSl-EQhl4W4F}tJN3qhMw zHVuPolcQ{($?)QUmuA;rkxzC0NPfGsZ|>v69#3(U;f}v5+l#-VjRZ^cA>M&7Y}e*T zv2xsV`w`llcA8%|eVg{5wmIo;n^SCMJ}cZd=N(*sh?lNFe_r`!BU@95cR3<QTG(0a z(H&PtZe-;n@l=+t<Qe}}t|(VC;~)HjFN=uA6}!iOQE(2@Q|^VgOW&nv9NNAWsBt@U zR{|evcdQwVme(}GH)l<*X)y8>;&7g_bI$w*`wsORA-M7%Azk335Ip;Wy=FdwD!`^8 zs&dV~Y2;&jrgo1r#I0$+$~XdH6rFiT7UM5LtBk)Y*Fblfep>hF+Ythz4@#+H@6d7c z_LVzCts$Jk1+X6>oPw{Lf|oY3#KQJC|6RT7G@g17)+?p<Y4+5j<gxDlg+8~`z4CbZ zDd-!%1A85hTCtWZC3c4Uo!Ky48^F_jzkYPdRNfV|@*AO*<+f<Z)gHc2(2$<{$lY@v zHQ93?Vb8Vt-JYw7zPbbNz*^Y#+`T6J{A34mwiY~ir2FoUa;{UrcNy~ip@eymJ6!wp zaA-Fylp6H@r)X__hbmgYH9+b8kNgIo1)XT939WEm*x+*Ie`e;g93r76;9i7jbw-Cd zzBQyxl7udR<)}S)=Bmf)0QSraZ6)I&Wfwzw9a<eMnJn$8acjh3=V7!u2M=F83}p|a z)j4>0<zaKqo;*u#*mmRTqYwuLJC2-$|G*R49pl=C>+G(}d~bwtsomvdI9H(Maj@2y z2A1a_3%u3xj9OS(J=!h#9<e173(NtTyU-F<7ydf>tX#vT?JRuG<dd^D_mk0Xd5<<0 zDAHaQjS}@65w`vP9e#t~EpwKkomjae1m!vsWw?>~=6Vml@{OJOd@Wt@^aYm2`#@t$ zWPT?W@Asl_R%I|>85COX@@C~dWLC~scY=S51dMxMTCzw;nU@<0-}ev2wN5t4I<E~g zjM_GH7JDMWuk`EUS?uS6Co0dCY=rjp9(JMZ+LhjuE=;`k(=2w^@DWq*8dWxS_~^2c z%Ejc#kMIjGs~0mF8)k@p$jIEd<e?FhOUlQOs~A0!-9KT<q|xK2JY?-VZt{pplcr3V z91#&=jk8W2Q9gP6q!erP@L22cvdLwDrWsk@h><`hFFIj(ij~Dri;hp8W@Sc}bB{F* zzK^x$+;8K^$l^OE+}$NHscUk#vSH=JM^vz!_|ELUd)bJ4#y@23oz>I&(Bvt@9)gO7 zO&L9QvNdzUBx~o+)`a-@c<Wu(&UdHWotToC#Ck!YUh#LsJAw5CEU0GoyeF$yHcRbU zHr!e<e$s<wlY!!-(c?w}W7ZUwZe*$Bri>k%&Qb@CpKL8tzl@&-(JJs=0QsWh6AG9W z@-ypn7G2J!8yS-{8ZEqZ?w8!?rT?9m;lKFu`d@zi+1u}O{f`{Kzx}%X`v3aXQWx-V z-*f(#-nU=3U$<X>-q#Ahfd7^EpYgRpAHa4S0@zz#0W8lL!1}@U3-CG6CxCqn@8P}y z%x(%`Tj1RaWYhuP*+f<gz3SLxct2^ZV=bBc`NHt>`oF>aFD{n`-a2^e;q3))BfNd# z?Fa7wc(;UiAiP__I~d-f@HWFc9Nt!Vw}p2Uykp?q4&EK$9SiSH@Q#Of0=&DxI|<&& z@J{(f@iy)84LHf`p?~1MiU(&HW{rfaKJb2cdbi?7CjKWIrbzLXHUVr;n}&Mnay9gJ z+eOsfQu=uJ0Jb0AcIcNy(1&lrd%F8s&R4oC^oGNCI(I+5>7{(v1^T{!oTt8lEy~6- z+{MI(yHoBW7@L{u##7;KcjM&*R}p-P;Es~OqX_<(V5Si`hTt56rxN@!!D|TKL+}NH z+iL~xPw)hSUn2N@z_a1=^>C1{8{;cLCvZ=|%iQ=LlKxmTc_?1>2l6<Z$rCOs=|NLK z5#6{geEFmsUkhYxuZ(S(%JZM$cqPX-IaX9EP>(oRYD~X9PoKwecaA^g_<oK*;<%FI ze{wvV<Bt^?a{LL$A94IC$J;snjAIAK>o~r~@p_K^@RSGplH+z9Z{awT<82%d;rJ_# zr*gc5<7YXp=J;KXcX7Op<FA!^Io{9l4UP{ea_~Z2!*NHBzgJ|=@ez(6;P@!VlQ}-d z@zWeTIDVVs<G1wJX0N9E@hZ=s&GFy75pU)AUq;bJn&00C)6+PP^bs^|ZX9Z7?5{je zvLXi`q0i5mL|x74+xsSk&c~e?J7FSY)(`Poj-T=q{YcAx<R|i9<JfqMUIqFy7RBOO zHTe9Pp2gx-I$11%;4XYVK^z62es1isMbt*c`2Trr6qU&!B8O>zVwo)WZ+fhK>rP+g zt=RC*?sT;69()f;e~jQ&1f#u0?6J3q(cU^q9{k+|tm^~#{_cRL`57L7Jl}Uq`gES2 zaZCCeZaS}4Ft*Q)-+zrUxdrAQ$@4^VJc{EU9FOLB2*;HiKg{tMju&$LAjcnaJb~lA z98c$1-xBeBj%_W4oWt%wyp-dVI~wYwhv&z5dM}QX0!5y{AjE~Y<WCL~vZ@SfT5d19 z)4PFee{^FV7>iD=kfwY~{(E`)iCfYs9@Yx&jAB=(0nUICgTH?<$Bpr~G#0wC$1Y{L z^D8)=;2zvBR&Y;dRq;LC!YQ~HOHpw)x5^6c&HAah9~-FRds)7UGgy&|2M|1v6*FNo zhrxR}Z&x8Zq}tm;!e<e|LkJ#9_%CA}R6LB^5e1iX4OQ?6Xr(AC+A@mpKbj2!{2A~Q z1ND}I|GACJ^8sdY=h;a5#Q~p#NLvcveVDgpGSBlfFZ&QP1Fm=DFtx79q%G43o=n;` zjkQwoBfJg;KSugxI%&%c(w3PlPsNX`d}gt~a6T3M1h>Bmev)&c;HUVgQt;D!Jb2P) zlk|Cn&nH#9kiDqlXZgsxqc!UG6#g?UW;cdm#$sBdOs4XAGJ&T*%z~Sd^HL&b#P_sD z{1S_o16Tp4^CBM$6>f}U;ZZjhW8ozt=T``RmGh?HH;Bxav9>CH6Li9Zm#gw`%x4PW z6Y<lW&-YoS%IABW&o|r{`Fzif1)uK|-aaJwBf{qz!sjQ1&$Wcl&;Br<YdN2r*qbV! z8#$l*+}NP<ypi+yo*R3sb!{SiZXtLp;duw)xtj32i}3vQALjWe=lK9Trt-X>@VuY% ze9eso&-)3_2MC{s2tG`BK1z5#MtF7*o{#@wo)Hgs=b^rkHu%rw3*8+oa6f{J34Wen zk6-kh*MHqFLOK^-6>;d7K-&-^;?VFA5r-y(G#z_VKPo#!#Gb_=BKDjTB4W>{LqzQP zW{8MA*N2GM^V<*+vz!ePv8N_f#Gb*SBKAxO6|v{Np(6II2o-UeJygV=FNccQb4{p- zJ@<r)*wYy*VozO|h&{u@MC_RuCSuS2VIuY%5hh~KnPDRK{Ck*)JwFO-I`+f?hw}9J zq8{1q3j6nd=DptwKXYX_i8;fBpXp^5erA+e_?ekz;b#sp3qNy;S@@ZY&BD+8#4P;G zj^V=3{HhJ&MI4(WL?2N;heinB^2JEuOB<t`_ANW{^e!A92iy)U0sh|E)o8RKsVrC@ zz}m$K-!DBz_<o8lN>yoQu_QjvD!41b$?80d`J0+^5eGJbu@{4z!Dc3G9paoAg=bv9 zYs?$13(K}5Wj(klJNbIdpUY0tm=R+Q&$ysAkjiQ|k<Z0Hv8*t@_Q>a3H~zmBQ#WPD z-f&}2T#Ojw;ydqDY*#**-vT#I9wf29-r00qx#>>P#=7>xp0w>i<jk=WE4@O}6FVXv z!Er%Hk$$wJuzPZ>;-5FJ_isEsiQ_7cyK;Pn<4lgH#38nEZ0jWGhutMGrI}3hnd<h- zZtRJj5o7H9Ezq&L>;0KyrC$Gdv>Sc+J)+2Xw1>UbcrA<H^zh)m+-54cpSoU$F{$wJ z?qi`U&SBvy&LzHI9*b4+{ah*v9!z4fLK2G=kyz{j5+e^`r7AAwGm?T!_{`(6hZrd) z^EQ_A`(lc(JB+twK)iy{{tt6w5l57hwht$GB*7y{{!z?V#g#-p50aR)g2-wdk=1x2 zpE1NY9uISv2Tvq&n?&ODhlorjllXKBk<V1VR-oXAfeR6P3b{Q39EtQvBz>xiA0@Hv zV{DF!XRrk-o=IX@yBd399Q`IqUqRAWsdzS9t>QV{BT(=>?x`vG3ASCuPjW9z!SmT} z6+gxHsQ4Kkop{n~RQxn^s(2wgr{ZVX1r;x1H&y&R(?}k?n6G>*_yraKcna5_5qwUc z&2a?-RbvY|9?9qQS2!NUz&&Lja6Fpp%;y|e@^Poc^<z{$*+|B|13m*Jq1%Y}a@}6S z@AoRY{Sw#h6Y&a0-TuXmh2OG-=<sU<ze2|N>wIm&lV9leQli`M5Z!*2==MsY+wT(H zeuL=tyF|C&C%V0g*n|(rTG@w0&#Q@^@8s56!Mljge@%4$BeGVrntQbh{-<gyvLL<? zy1fRpMx?(;(qB>WCq$n=WpAl?Ez#|bM7Ou|s71kh*aj8v<&lSikMIaX!AIFX6(8d| ztmxP)d>u^Du~)e+)pPtB*D*!kUgz@n?u>XT(W^JOPBx`io-q>T#;rOduH}0O6uml5 z)(4Jry^8OwU@uk2j+6C)TB27c3I37jn3L$(X`)xBh+a8~UY+BsunPW(=*G`vj<`T< z*U!XuT_9_8zkrqU;LBuP?h5Jmt1z-X_!=KE3cgNk+OMSFZ;-zJjnBIZt|R?hPi&MV z2^+<v{Ulx3D~)tS#aij4igl8(U9xmh#d_(wiVYG|ZIrj9Q?ak)tKt@tpNa#dmL$EE zid#ydD!xOqsyI+;r{Y!w2T8FcJzmAFr7kKCmQqw4D)m&cMaoifxYS?8ZKQk^Tcsiu zx0NbX93hP&>0?Ry1d={k#Zl696-P^RR2(BMQ1PA8A{DonUQlrdX^DzEN=sE7CoNO) zUD8`Bj+fq3=ZGKqI90~uNj`p+ae9i6Q)OJAR_$lwarz#y|A<rhIPD_gJ|AVA-Yto7 zdbfn*G{3Wg#W=lN663Usx;~S|5((}q=}5ZpbCM-7X1hyb%%(|VoTf{{=4VL4&Sy(v z?Y)mA#&TaNOO;8YWKnHhSKbyyCdradGcw5{whM7Nm&pJL_dGqu+umO?t91<^ZM<I+ zw&*_6uKP*521+eSx@hAdNz8GBNqYxLQ6yd5TgfNwwMkhdJ)5Kpn^qu+Ij%@5Rq+GT zSQQVEgsmGYJ*whjN!YjHlDO9}LRzHa3Q5?pk&>9RMoI6fxKjF9)z5*F(9ioMoP(a^ z>A9-h8u!b`q+f7n!D8Mo<0RaNru55$68aVIyRle@8AtkPBI%>?k}pXY>&%lR5o<go z314EC)J4U1DOtsjOBpJj&HF-W<9M~M-_tR~!`*r4y1}QNZ?7BR>rCf{`>E)9izkMq zYYYD`tS5vgC_E<wE9(iE?paUplpUCW?G<Zr|JitaS%Q$;xdgmt+LQ0?yP1Ho`Mo^- zj=NFc9^w1_BJW21oJM@7M^qj#E)#er6LxzR$v>0Cs<VhcZzuO_9_M~nGOz1V)||cd z*uy9{9>Dp0g6~Nz<z?sadM9%{m-~uyIG#s%c!Kc!B*F6uexBrin)r&(6JK#L=YJ8W zKc6)>egg>4h+pSCzs&c;e#FZz;bp7b7<u0B#$xVxneeuZ;C~R_mJ`{&O=SCWgIGzd zC$AuJ*=wY(6=Yw*JLDeyO4f;_Cy;bu-`*ql>sOIj=|d9xuOhMkha?VKP2!+`lDPg; z;v27Ji%9wlBwfTx>qxBhIf<3lllbThe&<K&J0+Gmb+;1BV4QO4ZX6@8a~a;eTZwCM z4r<j!#5kS0V4kI1o&&llF%IfRKF7;=tTdWq(MOGS<3pkwh^KT>?&sn@X+<}b`?>SF zC>Z%%<i?`!=snyoi9YNiy1Iqvz)lj^>>_l&CjGmc^zS!Np9k+z=OBz9`>6O^5)<tw z@$$E156ONKFCQQ=@*xrv9p<)4!8K%^=X<hm;Rw-(qc9>p_y-an9p|G&!6!(+pCqx8 zQ}q+F*jawpPQmARKPmVp5<{IQaq-Vg#7!5-I?p8@eJc10c+(<X#7&ohlE@=ssB7?z z2VaM%&Vzp?Ye6@em+ITQ)HNCC6Dd%|l4O=Vy8R{BTSd3GaGiXO>#cHs{~fMN+xXa5 zboDE)KWliN?ajvQW)ce^{(|eREaBdMMQ?T7pV{9<!D!QdaAPl3hjk<tkcr>rO|XH) z0^TGR@FG65AMu$3h@aeo_-0|mH#QSLEllb}(#86Zg~SVOB(dfhLHxJ2+<#N#Y~cQ( zB4;n&c151v&HAXGaTMjoPA<b3X^SeuXd=UCE<-6%!9s@7M20a$ZgB*+BQlI5GHg#| zco&gjXClJ{BEv33hKa<#?Mmd<jmRy9#~q4%+7bD*C-RAFRz9AXCCZIWiFjYNA3uA5 z>BHUmsSn&S@wN|)FZ6*unEJr~ulc=qy8T<veYB?h-v6k7Tb9`LJ-Ee*=<BBNGe#>p zzK5Sx`7#mx-u^t#p+wZTe5UaWV3+w=8%+Gze3fRF`+k{6KcU;0cM{?U_&FHGXD%XT zA0TDve#laS%ZUFrOr5VclD0V5tv;}Y*E^D*r&40u3SRH~ZY*M3djDt?!J}0_0coN? z)0xv8$IoZE<7Lv8air{cf+r9>k@y~y`23Qcgt|JO-O)_D8t+56kMl5<pAS=bn8JA& zoupvVuBoKnhY6mh`Zh=t?U+3YZAedkzKq(Cg-IliPWtoO5NZ>s-T3da56+~9d$2v} z)~@b-K@e;V?%MQyXNr^mjU7Nbd0^jmayqx}*$#K}hUc5`?2L!bFK!;XLt1pQg8f0s zY{`P>=;Wqti>K_r<9U8E^3&s%^c95Wk!I*q9MBEvEV?B<p__6)eK?Gl{@s-O>0->% z`|14&9-!JB&)6^H^cDLsubW~AruhXlG4`huJd@yA<R08ia^Gz>KasPN^ESQNz1i`E zAH?f95A*q%+HZN;C%KPW>&C*Lq4E3QN&1oo`;^eO{LE=8lJiSZVmBeHhVeBcWzo)u zr66|iGvsC8A!S#RvhNZ6KFRYQiN!u3@z;l(w{%YP-DYFP#&)td=jUU>&p%0B9}^xv zA^20WR`Us2EBK7WhU<7gD*UWzmY-0<58`6Z&jy}n0x$ao*+0L5@UW5axrxYRGr4d3 zCAn9-mBggm$o;sl$UgZ^B*v^J_gi;zo1(O(s#)E$leT!UXD*nLBJi6jx913a{ZGvi zP5FB`M<B*I;ukme*lNTcTkXjoo!rp2d+-X9euUsdDNWm6|L*83rZTH{9lNhP>V{$) zE4wTED})X=^r-}{BzO!NYh$@jGOfF^AEUYTLr?q_<;HV34-XL@CJ`PUB6ZQTDpLra zN_cpf@G$ug^Y8}eVJ6{WMuYWUQP(Vj?F2tgc$iIinDvKw_>%K5k8M%srg?-uUE`(m z!U9t7e6kk$S7P_(llkjuZi^JV@dRI&R``6fS$o))@QL_)&gb*&q{`>>grCI(ztG@Z zs)tXHo%yx9z)`8U?GL{Gx9rcq^CADc?Gnbb9!z8B_uX>9X9(bVZBHJX8{>IxJadg0 z&s?K@^W=FT6?IJ6Q#vXY^?5jnr<8OBQ~Nfa#B>w+7@U-f@l=JHf1{gzb7OWMuXhTm zcQUD$+Ng&c*b`B&ozr=q*E?19VScaPcX+*X*;N>WyHdq{B8BE$Qty1?7yXs^kWUdm z?P=AgZCq~*sTc79UhlKa>>t2>;q@*g^*&4LZD<EHD*ijMOD~f9GB1&RYfG3|i+h>e zi&;X>8@^2L%e(?_#(v}cEN=E*TNY^xVq+TOH(05^$Bw;0c&0w{I|Q#JYZ~toAMZV4 zW8WwK-YOC=d_e9;d`Nu1kN7@4YZ}UU8GF&Yu1Wrr2>&RPSkC`?_M*Q>2R<kJjn@;N zH;{WMRfOklq%XcA_sh2PI{Kt3zOE;|F+Wj+AAAqu{On}wRo$p2{OlzB>{4|G%X#Lk zrsjq5X}9MEeEk{b1!~XV;=0s>?NP_3SZBa9-2!J4+>_YVdzwANOV`j4f6eRa&GY=g zbv~QuZEr%q53zN9i5=)i{H}W&#Irc|ot%CSp?@D4YdM5|9-)6f+4Db$+rv6;A9B_F zjoa0Q)Qi|Z9dUuu7wK59jnrE}>TS5LYb5D@Bwg5zA;fMBB{Yl4+3*r_pS@JIU5$CB zHVtt~I=1ma_6pd*63+i2b{ceG0_Xob!e_&CvI2ik@DalQ_k{l=q`$r=^WZUJ!+#+1 zr{`^t^Z5M{&QDFVK65+LF2u8WTh8)4uk*4_(w4J?=U)iENapTKWbVF9+I5Ar>niD& zYouSU|Ka)lea@%yyelOR`i=9sHC@5Nx2Yq1)~gulAaCDtIy!RCj$(RmRNvs<Xmj#3 z68ebGaQc3{talIO%|!OL`4O7_1P2lvr0#!fTo+wGL>$-yaWJW?HLokljfG5t3H=a) z+YoI1!}Z?N1MlOUQuBD`LHazO(jI@_`EhX%vA#iLhyTjFN#{p8_cb@4(mC;u#4Om4 zo^_Zndo;a1bFBxC#f7X6Y@jg%b>Kyw-hpG~*%7@sR?eQ3bFA#AvU99FQ{p*}U*-6n z45ax6o0uBFzRo}$TfqVX0@#rZ)Zw>@En1=SL;YUVNwh5|I8Eg&`87`GQx+58nWH}? zW!DnCj;v99PVjnSuf8C5xQgJ7YK*Xv$O^HCj)OHk|Le&g<;K35h_|t9;4>^!*&ia> z`xW7HJF&Mr$oyVSZ0s&FM|@4@h20HoKE^UJyxwowB&au;*ZVE0cR#6@KL6o6f)5cM z8a@jG>G#gWv2Z|5r}A;Qd7%6Z=KLIIuK_<3GsQWS$2hJfKF_}h5A=-5Ny5Wv(nn`V z9Ooo5IZOP3pUArR1rqCBRPT@Aye4A3E94C0RkAPZSF$gwp6tuIN!H2h)o1%)`Y;tU zNu0~mlKtMYB+j<zr8z1#NMg^PQ4)K!e97K#leCnize&=?9xZ?ALlw7>)~Yy25__~- zOPf_3B8h!jVFZUr2T8g(e`l7CsW_aRXK5o{An7+qdL2m@XIre~Y)b^e(URDs6+_Ov z+^L>(@#x+nu1g{OjKJ$0hc-BC;Aso$r-wdb51lACUcq%WPWrHgXY9n0GXkB+eA<P~ z`$=TaPgk<%Cq)vvnoQ0wq>#NpsglsuG;-D;o$RgZLH1Uqkv&2^$R43gvY)D_B=q(k zN$6^}G+f2KB|J;Dp11KXeilHHVLa#aYmPfh&E4PeoWqK8<3pKf^9FMHoaHjyDYa|q zvClh++;$PXkKk{K4EGb69FW8~Jw(n~942i%CgqWIaS!W=B*vpdDpm1uG9LdWiG8!R z(lnAT&SIP(XE9EbvlwTj*M$9%-XiHMNxIl4c~;s$(l?WIu{ZK3Nt_=%PtKA3M9z_& zmwqJth`o`&NMb+aMRKO>l5~~ixlZ!jBzeTRyUfR(t|!|0Z}=IF{ykA2_Hcbr*6{a8 zre<`*i;OAsh;2O)OPZuR0@!FyN7CTfnZmI~gMRGe9BVZgYdpiTPDA!IYJ{HX2{vfN zJmsYkv6Z(*j5QyP&?S>bj4wZp(4`g{VcYM}h;!>f8ZmZSX^NX@FX9fQ?G)4Jydi#_ z%OO<r{2iWg5lY$;MzEFOwi*$CMQX%67^M;GkkN$yJ2hfHYNrwUAFCNo(#0O~4jQ5V zoit)@x=S-z#R(cQPj%7QRh+1Kfut`X=}T4IRr98blQru|`UaA|Ma3za?WA5Y@1$vj z{-<k%{%2^!Uf-S?F~4MKgg*Duh<PMiBj%ATjUUMqNb-pDlD#z@0I%g^AzUNILK}_P zW6(x}<3h2SR!wu~{yLCxfoCe&J%|Tswgd*a$HE{!E|f7cn2d{jGA?XnToe#JDI~av zjEe`zxEMmlMKKu{rDR-`k#RAc=v4(77bDei@khskCx4V1x8!XfqX`Z2jD<0T|FHx= zsG;}raBl6u%Ra1$hq9^npiHK6`RBN?Xye0#&NPA_)`+?LF*3d$CUTph5%bYs$hezB z<oOqknCs_hLP>f!Nf&<U6B^-*&eD)`Z5pvJ`f*K$isuu&fcML2-o|MfoUb3@_z_KW zYZsn=jB?}oTyD>4rh?pF=4BUgIlS%0sBdfCSjgl#BDd!WenF#A@ry*BFA=#d(U9{p zL{_h9#J!278Zp1Wp%Hsg{z3HcO^ulAmutj1h_^JQB+oFCr-Gzcl5{ceuORmA9b(_! z)rfijJ<W7g=Fi_E=dXDBQVm^K@w5fyKbc_9d7LOW-oyK1i{>Kq#d%KWOCrN9M9x2` z7|Y_t4PN$Nn#=0g`4`E5^_KjhS%`0FuB!QOko><9?5!2ps1-VYhgOWK5UtSRP_5{@ z2(8fPD6NR6qP0S|W3@t`<FulGduscuI7=)1w|-jDcm1`Z?*?c^e+|^4KbDxq*9kSv z`KunEEy|7W;W8Pbo!-hb79P-wICKb+Ly1<bOAphEu|JOB5!zsqPM!&)6?R~vR`~Fb z5&29YvFAjBrx84x<ex+ETq4_fT4AfF^VNL?&meoc>?Ce|oIGb^4io2*|Ed-EX(ICy zf}hda0he)^57m11q<LgMJ`3kcMOKSAF6X-R8qYsMOYiH^XRIav4tD$w{(#e8!25BN z8`BsNW%6}a!#y^hbPt`e&ERna+lekAKF)P%k+u$W$;IhEt3~>Ly%a3;VG+@*=LlY` z^&@$NUj1E5?pbTaJhFt~SG2-5zDmZ?Yg(ZLuWK<r!nMjd@R`@zV+XDheYix<mt7^g z@hgw-aJ?7HPFBk<)rweYnO4}$Hwj*@oulG4TJenBPqgBU;acr7QuZy9zJjE$BK)sX zdALNLHFTAnLA%7(lJxbYE#j<M9lw*~Y1e+0=6Wrrhxfw1eU6Xo_PigT=X#aE@nWu5 zsczi(K6N%P`=XZWHul&3Jpb!joM(r+G1bq!CNS#Tv}Q2Mc^t26xt6ZQ%^`W_sP%r% z>wV0PX}znPz*zRs?_kt_T>qKd3-Ly64ao3SPQQxG7aNJ5Zz6azv8x-k!cW*j^nbfn z^y3b#h?lFiB1Yb+Jwo!-s(6?7B+2h2`OlN|izHpd$X{#4n$>Qth>;Hx{2jrEwBr2W zVQsLAYqVw+ALZDi!#9G(7!=QAxx}JWe3gl3u>8vUNJ3ZJhIq;z)AmvG{HPVrS~;N| zq~bH$0u?*8r7AwJ9j@Y^3BI5e&t3UNE1tV@h2U%2X)3<1ole?S6e8MXC+(U;+VvD^ z*9y|E*=pHewJX#-b=vn-Tu-n|yI#eTZlj9zx|=HY(&1`>g1vPCD)!L@s@SA!t71Q0 zf{FtOZlOz8acf<cii368Dh|=*X@neNLxqjPbWa;adc*wjp~NO@gxrcWLT<w}LT)n& z%>qJmrkW>AH=EEeCG_VJ`U?pCMTGt;LjOs%Y`AWfnkQ1XTE)=>$LQ9p_)gtM6~_`B zNAO*`?JB-ocT>elx=^j)|1yy$rh9l3=?(K=C+!W_iuShEiuShCiuPs@n&DxdvR!pq zYMySoK7@Wun4sUE(9a?C3kdzmg#JLaY>IBOny0&Nnu>c6oTYnI#k~mbqnoYb0lH%< zzE4-H;#{3m#d$iN&V%pQh3iC~coh%UWvIA7m#5-FT>(iiBI(5{F47HC@dLV1DjuSn zpc8T%XclsttP^sZrW10r>xA51(FwUtRm%?1y`ttR)-5IUXA=5v68b9${SOKKU4;Hy zYS|LqE;Y|E-5wQ}>uO0|>&-$ZYY82Z-Z1}0!rMv0o0IT%k?`gx3!0}1O-xtt2wh8A z(7!<Fw~__@P+8D#D+~JRgnqEaQ+A{-UClFE*OSn<S_J)ULcbrOpGWAABlP>IWh-^# z)I4K!lT<vJ;Ay%?RXkNUlcdj9@uRvIRs5LlEfr7KtyS?X-9{DLb-Psjq;9{87wBqK z{It%Y;%9Z2RlG>2(|hn@otKLLt_x7{i@H`Sen}Uq;uX4Z6|dAKsCbnwS;Zgf`l$FL zU4IpStQ)A}&vk=Tyk1wN;woLKiZ|*iRJ?`Yt-7fy-maUj;vG7>iudd0sQ4hk-|3!G z@nPL+71!w2tN44}78M`W?N;$I-9f$3pO3?Z{?w>>F0o@OhH;_dU)fE)(4RwU*&lQ_ z)jYL2+!*Ace~i%A83cVVgP<Q^5cKi4%RKZoZ9HXv)U{LdoX~Yp@fm{85`0dVpyKno zo`fHB8(|-MlDb5C!~E7ZWPB0+`w{;02>+FYW*@ce&$@AHo{PE(f{t#wiZAQtsQ8L* zo{Fy#T&H_p#r3*ZRD4tS7U1`|pT9}lc&%GmhuN;BYh@lE9%F}_B>g5yN8eb9Q;uqV z)i~v7gE+<GOH+(x`!s<u&v24HL8X74(7)b*{xs=UjAd6e!e8*1tB%LrJKZ>od1A(T zH3mmI@2T~A=?o;@<Ch{$^fQ$_Av(cZh^|3wsJRtm*_n;7LMM#S32Q)Sw&qrhWmo+U z#{8>EI{I(Q+D@zv*PssfQgE^=hd5mZsduBwTar%1p-ByR3)S9=v963pSfSI6w6R+Q zI(@XaVk|qk8H~P`(v~b;yxNv5U98%cUOHUcJmto?uA<!c$=1>J#z$4&h7jI{G~f+= zp~e__c%>0m=oAw=#SQ2z)!mA*?5;*wp;J!ilsBMLtGg9rS&xt5!3v!bgwBWtbXv-{ zVl1292rG0(6FQ?C(CI1Pim~jtW-$5;N*_(u;kvZak5hD39Anvtr|O~z{Yj)O&W}p| z{kmYauMg_zdJfKm3eU#~&&L|@d{BQYM*24!VTDdDp;Oy{4l~?}v243$FwQ}Nyp3o0 zud^%spViTIC(NVNd!E#LzM;$ww_>DU*$kdX@LO&i<;GFjh&8eu=A)Esey?8^_cb*9 zAp#2460DQyvp7)xeK;MH{EAA)m(VehvMmU1DT{j+fwEXf3X;WoR4ZAmowk<6y^Ii9 z?6<MVINr;6y?%0Y_tzTldmqnvj^O+(;AO3Z=Lo`QTY@7A&ryW8wuHB6!ds*qPx5ym z>B%Hr+!u(EGYFq}kKjelXBW=H2b|BlWt_*?yD{45YBv`50lN^MyAhm1`0pZ%`ykzA zvF@EJi~D_PGTGxKi?c{QR6es<hAh^xGi9-k-BTV!((_5W*u#(|i+e-8<k=*B9!Y;n z#o6-ngwAUu&r*{9CP{yblzorn5qs_W%3>|LpDfle@0GWyxWA0gj{c61-$bsf%D#dm zS?sY%lJVZkWuB+2+}!hCJkOwxa^pJQzd5{*TKDGXK8POXkiN?$c#tgaeGevmY9swv zK=jilN0I#PNO}j7F7A01k-i>6baklQQ^mzHu6sxH#`flN9(r*8bGc0J<v34n?wp-x z%{<DD2lYl=&f8eY%MO#pJ-%|%_TfZ66-4Jp5;=@&V59K9-c(M10;lsVr$3(S|Eq2+ z?%hlvbxoDUy7wcpxbHJv7Hi-$i0zt1<ZLHn|8XM2zsTa=-&}&{$>g^V<w}x1mZVQ0 zG@m5t3rM=ygF2s#mj$xe|MOQ_+|zlAjGd>+czH$^`{Mp4<GqFtdgD2jN%B+1I`@5+ zhj<?;V_~w~IKKFX%XXGb?>VA;99(Dq(qN2u<bb+C@0&bNu;+e9lpCMsefpfdM~$bR zBYn46#h4#&od3r2zr@pn`XFyF5?y+UlwH!GtPb_O58|aH55;dZ$d9^_!t=i^?^Ahu zo8(_X@cTrEKTyXt(n0;q<8;>W{K`K3j|tCf2%S$F@PK+dnwR}tcB=F8I#Tv?Qg%JT zUyyOMf!L7s#BNlPIqnOh=Nrfz_XW}U4P=hnc*`7T?}O(Ks%10i)$^R^-EtSJM{c_b zZ{HBShm6g=WIXO8Ht<{3zF}Rs7xzO>|Bze>^sBiJe8>HbgKjKr&LL9Q_e5@oh#mNz z$m%Gu0}e8`{!147WKI(Md0G~Gw4Aco`*&8ZQ1MT)*yDFzwv+TZD*lDofs16Wyey0T z=U4dHKhE2DxLF^`V;`d2_$Mx_U%4C<SzVX$S*%`t6)fcZE0I+l(dT+HPq~P!Bt6<& z&svJmF(wHtk$uHl{wzw*`iambjb30Kh7fLS&<nddi3$H?GTCb}h1^4*M)p*A>BkbD z1vcujFBH3XLvFl}Lh;)*dMaCNV-S~>bW3_0p3Wq5qjXPSq&C9sczy$?qwJS3=;;~- zwl|UInZ(bwXL3BT!P!G<W1HJML9s{oupiJ*8_<`Zr^BJZMsfNky%;Y_x`O=)_S5^4 zbTM{X=*5`5LoepvKz$6U7yXcFebGLI=&fKM=5rp}>RChpdx7)NR*!wLjN?c>%JY4W zqX=)&gr69~PkX(HHDU>l(+fSki|AN9(W|@k!l&)5FCt}2ReZNzjO9dvlk{SK@1Yky zaEAUFlD<&InR+pnQ}kl)?yi4R#c6ut-x7R}-s9hTbX7TX(Vpwl+P(_L{o$K9?x1h5 zjz{zX`LFJab9b_y&fQZ<o<#)H-y=Z0pZ8r~{m0OE&c68D$bIx;PU%bfsGnZg_Wndq z`Vl?puNU@b5E=Ug1Q+VX*dMAF@kKF_?NB1mV!hZGU8=|ULfwbcR;&+Wy2loY^oIHK z+luw!Wh%`}<o9c?GSNrB^55I?(44N8Ez^tr)x-5-AH@j0*lS&(7iWA%>uXh9ssB;M z4-!0{;E8(iJ6tpL;`g@fda>8~aTR;?=PK8ML3*6;l=Zj4dbI60I5Jp%1G|KMq1eV! zJ$CS8ZcKITwI(p?&z2@I=BXy>6l1%BI1djtu(v;wJbu!x81)nPleg)I_zC@XkpJDB z&OE)C_n#p8IiKLa>cxEbyk5+4FX*i*{<}V^(HQjb;7N~i;~xFc$L=ecee2j5j{8aG zz&iF9j<-l=a~*qu<E@ev@CrAM0=$mnZBjeHd-~xSp8~#z2Y=oG(&bo4Z_n{p@^rvy z9B-HHfCqEDL!JZJ?#4Px9s3){!Fn%C!)J%m^TnUu`{zAh{9idoOwS|#PoF71eXlr2 zZ0Rp>UjN^J_9n&u6VLQ`qCe_tZ;qGs$8m5!I|pO%)Bb!7p~3Smn2HCf7{?9H5nuAM z53rk1_7E?tJhS4Y8ynQJO+S~|L+3K5Glm63dd@yq5+25ovJ)GWMZdy(0OCiPInrap z>2HPDZ^>`r`RB8CkUwz%*7YQ*i$25cZv;Q5;*F$_D0Vc1v0jXYGkLu~vkp+Njn{jg z)cZ53>mtFI$l2b@<oOs^h!202Jj>`BdA`T5WRLU>@{Fe6$hqA*;;Y{z{<({v$r?TY z{lE*Xow4a>A2mM1HJi85M|x823m<ZZ(U;%=@=W*^Qh$;z)@1IIN*l@fA6#w${4C^p zH*W5^4P6K>C43_Oiu2h;I<4|ae<Li3;AHYUR!QW1Wit64t8P+WBOXq0-jWEPNzL*Z zOK{^gx~rVeo>EFw01F(5bTY}g+Ma~ZEEQu}_+V`ZBJL-pM|s-VkL2%9@O|WWrg9~# ziu2U7rF_nWcM7LjD%n+<rG!oy!Q})GC-ldV^S|TC+2LvA%<m&SCcSSU>Ry=?+l=nD zCA=XX#(A45EmL`$NqCq|@Vr0#tdB{Y<|1j8N^=pR^IQX&W53Mh`ClS=C|=SaKkEO> zJpb#`$3Xv|ynkOO{rmbYeY%n7Un;Ft^Dia&m)?^9d!GL-X?>JuJ!(0Re=iSIu!z^* zB7D9}e!Jl<GEUzmzfJbOBy7<ta(4Rz@>_V{N@7iWKlyEo17z$RB<GR8Bj=G1ku%6O z<lOQ1<T(IGBoR{_mBhO1F>=<}LCzW<=fCxaKZ$K;Z*%^A??XAP;BpA&>F=nz+E_Ol z$5w6cLwr`65FNnMI2|YHi?c+Y=LkM8X;ge!5_Vfl&c5mRdBgsk=DB8{y+ha85EpWO zjG84XKi=fblu;vi@FCbl&Z*r&&YeXNe%ca#e40H^*O;FN??WHsPF~luoVU)JEx_B` zoK8IF?Q=I4enMx$TUUa+X@nl8lCy+q8gUOLOC#3$dXux6y)<He>7&UZ>Ec{`UyYb| za>zNj`^nk2T#eAfL7M3#U7UX(tP%Q|uMzjuY?_56{dtlu?hzDf#P3Nxpb<J;tPwg~ zqVe2EYb^i9zwz`Hm-#5o<d^_<jLUf>m!Z>*QRd3|*^%T-=qMud(L{enk#mcc<h<t? z4SjAK+Tp9b-YJ?FpkAe}$(+tHHx~6yCiPAs^-d-AK1}MJrfGa1+%E_5EX``DD>esd z&g5m2-5Bf2a%1w_aB5v1JDJDn%+`FO(s`WFd7RT3=f;B0>|5we=XB<3)~R&n5IS=R zojHWg+*|0p%<24<r+>!tFW_{PduI#Cc=;=l+tUO;L(b~{jr7+--d|fe&8M0@57_uw zeEV~7EcfDhZg8B%ad0l;Y>qqSD!-fK6;a0qavZ1ejc7iGEy?}!#;`PQ{UgtW{Ez;I z&L4S(WP{&@B=PV6^z$VDmWz6&JTGx+F6v<piG##*6dV2yP62t&UJ-eQ-UH<MMaAU# zMP+;)`;%NHo^9@)xW_+<a^tT!Z^PM!7>~a<obWJ$;E^O28%>^<^&r9H$+HS4ka%q( z;dugy*CvtY&`u`LUz$puyZbO7c?y0^J-g~@*J0k?(R`f!oU6pq22~DY81;MUy$^~# zG^5<Oj>}{=X*<P#Q8DI6`cZj^m1hp8<YB!}^ZxD2@iUyCe2y2AKBdnnUPAC|M9xcZ zd4A&<Ue|V#pW+<^e@*aSQty6l-{$<E_Pzy7&Z0{6?@53VLox)^$Yte`7(%v_bpQRF z9ziBElZQ+)<MbqisQl^a?wRSNr@Q&Pdon>*QIU&}Rjv<2*B4waF8KIZMZm|pu8Ybd zy1v$BS#-e%D66ihtEgGH=bU<-`v2}^M)&T$_j5->pHp?})TyddRj2B&Iz{sQZCAgM z!SV3TlrQ&b$>E0?{2k^K@_S4-zR&!XJr;Uv<3q&%C(i2g^jT=ell!9ldFb8G&r{mp zI_K)Nzh(4KG1y@~g?iY!>;$$hJBh(3vo+c(2A|68*wxHO(`n2v(|?Nu``RNU=edyy zkn<?j|2fQlK9||d&tvd;ng;nG{ER%p!uOQmvx)KHKB?jiPH4Lt`5=5g@#&B3*Ye~T zpMIA1B5U1!Vt~&O@wu4E^FqewVwQG{!4r&T&w|&dla$v>A|);Jiy5DnbX}VV>+luC z=Ma<mAmek0rM=u*W1_+FZb~~JIS4Y`mB+M)DXrjhnEBzHXMA49;433bHT?2WyL^fG zUqked6aUvR*{)%HUd!Ouu{G=)w4NhRgnvam-yUg!%!23jY%TnD#^>GEdfco*Ze)8J zw=zFwx3RVG2if=Z4{LvA7>4kv6A0fGd7qZyPL|hQOomS|_*0>_+eCam7r90Axrg!j z97}sIgYOIR86iFo63y%c^7$IkTuJcPsU826;BQdfzLVg;r*|RWKY`yCze#m+2f_b9 z>+3HP{Ew`D9%M3ni|r?To4rB*&unkuVKy#3!uWiLjZ5EUb^b4GT>3GMOAnBo-z0x` z-zWGVDBoWY{EwEtA$?>I!v98cp1TKWe!=SV-<bSQGWa)<VBbs<A6o89J`P*gM3}A4 z*Su+3p9<M}G(8^&f@8v12Y8)?_mB)1Fd3fDWVnFkTV(JIli|YOTZTE3q26Qks>Wof zTkAdp&-VoD^KE;?TF>x#IpgyRmi9Fa{_i0^cM_jBF+Oi(eBQ*;zRg;fVcLf%?M*E0 zdnhfMsuwx$rFGd#f^TH&yPFu#4_Q1BdCp#hKgxK1gn0Jt6|fmUKg#(0Wr)vq;`2EQ zuTa{1h|ipa4WG|3K3@p&dG%hjtzO{t!rJXUdvSd?KyCeT3LkV%53K3#+iT#*_x@q6 z=@M%U{6Yp_#^ATE>Adb+?3#|R<J6k*r|&jv#=lu*uNjZ`c3}n-^z=(mHabd1ZF-ZW z$Mqo6tj|TP^`J}iV!c0dDZ-y4_~e%&{Dlx7^<H6)y>+;9f$PUU;@SBf!%pkUeMBFA zuaLiMa|O{{Oz^JDQ0FgqK6svbr{i+wYu9{d#I=~2_YX6B{$-Yb9!3AK6Mh$_OnJSU z@#OH;8V>St9J_BGCO)ro?gN?s$7Qq^#AJRQ<N120)3}X1*D;>>?`GmD>g|)n^UZ8M z{$|G0emlm@*Ei6*<{nD>7QMC#<{MnQeU<Wkuk#Zq%MU2+ds)8kWqG}?YyAZ4`3d5A zyR%|LuXBorJa4CU*0UrGs_(3oFxF?xL;K`*dQtX52^+s>w=)?&%6vZG&c4Zhl<h^_ zq3afXZkxS`PcWa!f62bRewux6{S1Tu+A(L<KFj3!YiFK?U&+F+V&PY7`1AT~7_NoQ znX4~SjSBdF<|F9K%oosC9piuUYgF$evfi*S?3Xa=|BQ!y>My8HuA%UcICy6DEd<}8 z*SxZ=b%{T<+k1Mr)>!0Ig4ItkzEA^ec@=mw=%50PF89e9Y^ajk^WcKr;4g$_K# z+U_By1K(osLu^d=78?^DV*TP<Z13VB=9l|hq?7xZJe_nq_&w#zRIcwkz32BjKc=+b zXZ_{-OtwcE{6o@n0sjk=`NuG?EBFa^e&9*A@AU8N{J>N2Pr(lR4&FoG?|x14JWBje zI)LzFPAC7j2qVp@MDt^->`I=8nQkCF!Qh~u%rg!kyeu*Wb+UzcE~B+Tzl5Ko<y^*W z^^@5;ZaG_DtYGjd^bK0TE7>>ARqQ?bQ<;D1)sd|lK8=0fJUwE*H$5|Ae9x|l9MJF? z3_de5rQzqY@1AEf_#EbYc^&h;d@lPox}N!AUdQ~UuaB7X>KmB9^o`6{^B*%G=^L4U z=09fs(l;|-%`xVm*^PWz!%5~NJ;8i6Cz+4*Ec4sk7r9NJfqXuLFJSNsA|KZ9K;&)> zZ;jlm;lap*8XjWsaO7bPZ;L#x;T@4DHM}cwRKvR&JQl%@B;audk409n@Y7lN8Ww(r zhVv2QPica|d#v!yEZk+`Nfw^g@FkI)hF=mfzL;Lh;L9S$FOwJ9q2W?wM8jnUPesNw zJRKQlG{*l@C9+S$2P0D&u0|Rfo{e0o;acQX8m>o-Z>2`$dJVTDH)!~9<aP}oiF`uC zS48g7@RbqcAL-?h?`ilIk;gUs%1Dp)^YiM+85+Jea;An~%iz~X&ergsMvNb%H%6iw zzAmy&!*6Bq+akL)d_%<eJ9<aN_&a)M<ba0X!{8euRdzR@kC`0id-Vqbuozd*u>8^= z2*6?<Ka0k?F`_@4_EIi8AogH!9z00!xt0&}c?LhkVAVG}!AFSC3-ta8hO7RIGGm{; znrMbBng<!p<6YpREUzFe@*T5ysy_R$gx^Fo6Bf<6jHVl``qXC_jN#aK-bp;mRR1>< zJVkE@+)nT`?O%OL!p~;;jxau`heEd3(p>hp1i#K|Q>Cj&zm35Meh*mb-a3GNfWLMC z;aejQMAh7SE87RVmCdJjGWcU`AMZ}KkM}XQcXt=tySp=TwubL!bM9Si&iy$1rf@fV z@8A>ce9^}vSr%^Q<xjG6N1tMI^k<k2^GP;ee~O(&{7eMzi#>V(?b{E~-saK**29Oo zp2<=3`#K4)EFk<C)lZJnK1TX*v4pXG_Y~0Pe2l%<@EEJlAF@5t$Jw6qk61nbnAPV` zSRMY9)z!~fo&21gvHS(INq))RUU`z)7{6v`t9}zP>xJL4H&c#AKBM7(XZFBT?7fDk z**hr_=A(W|k9nhEX^(ju<%AyNbMnL<<4^LW9()@`+yVaq^^3`ZfcZTL-Y&|g{W=LB zqINk2O=IVkl=c+bE4x_2X0J@p2zaH2gZzWv7hYe$HLiH4`<Ktd@YOxZO});B^~irU z<#nNiO<t>6Uc1;D^F<8Kvo*y`$NdL{dpp1==jmPG;P=fBQ2op}Bb$14Ufs&h&*Uh$ zBx(3t_TMP{VeJj_^B(+M$A9+yg;z-$Y?qrPyx6-8|0m9YESp4~+2&jZI(F71_Jv`# zp53Np9+LZY0^ZKnvpY3C>K=~CF7X_9X0+apv$T6OtorH2ME_!E4(Ruj4BhW6@VrpZ z%ai!MXvRq{Kk8gXd>YQRz~?&RQ)l}^4aVnkRz{z#$1i95OD)#l=a>)b!|cthc?KV0 z`$g9|=IrA2`ko-}(Os?KcRFSb_-Bq8+u!Aw^M~(t%zE(c>^|K)*nPTpJLX*CdzgRe z_c_Lg@Qsdnf8-X&jOXun%sV@`I>w*yZH~DU_YuduQSwoGky5}PbIf}scj`B)@NGNu zM#;w=^G3<19ph*Cub4mKzot_L0{*Oie+1v2GrooIrJDf)zK?DO2>6SzLRIjWoC`Jl z7037-{;Feq4u6fl_6zvyxPp}MH=Vs2{<dR$5kKr0pTm#PI49um!b(fQ-*Z|le4d5B zT*KdoRgQumg%yl~f56}$(y8`8n>2giw-W4kJP(7g(!GZzeAlEn&x7=zCHQ*hRDi!s z@Y_k}A0YS!I*auP!S8TZ0sJ_@@1*^rUl9Cf)EAy2_+5H##eBJ+d8|W`*LN*BRsA5% z8yWm&W&<F+s)+E9oHMqlvEoOppZ=J^|H}H~PuafN&)I(OFWEV+U$HmDpJaFEe+~b% z?ZozhpJaD%e$DR7|AzJb-?IJTC)qoCzhUFRZymFDbd>7qc}1+BpHTgzi#Q*Nvb>nW zf9iBQ|EcPEorG&tSCPoIx~?M3M(ts+{hqAZ7d?sXt)0l$0w+aGeJ*3?B~D`Y|1xI( zpTun1Wo$3*B=+vxa%Ss3BVv3(tcY9$@aw4TJ!DtEO~R;q!k%0b>2_A|B335|-$-?` zI&!bBlhv&3=1p6q$2se-i2m7;`!xNt8U1rY^#4TkYa{n-`n8OHokfq|K7LE|n<9^E z`b~_UpM%=M+9k%;XmQ;Z!Lpyt@<MoJ3GLg8v*w(mPKMxv&Y6Ml!u-AX@zNiz?f3u7 zebvR-b=(fbziu`j|Mtqy8}m2iUt2=G@|@){?O&S01#Iqqs($gmO2XD!5mR?X>&&LI zZ7l=)UB9yg&xd@P_#bxGXn77ZKJyIb_e@{Lz5!jy=8HdJ--BMx)^1m^^PjI|XM<nG z=8;!BW=y-9#vI|t>4<~AAii0`vR~2l%<4s~TnK-M%Jq6@pDx$ynfz}E)idwQM`i!r z4{4uMHt-)>U*1|a>!}e2A1)vNPWJ~H%_9tcRKo38#91?C!iT4h&$BgUWcwb2N2U#Y zJ%c~V;N>$2qnCN8+Zhx7Lk1tLu(EfNp&NYTK_S0?gX4VhV3#+w4;ubc)y{eSs@gg2 zIkO@h$2xZw)6P-&3kklBV2|LZ32qZ?-hx+rUPs~kgv<nAO7NWo?<e?vg2j695rV}X z_FoZv8NsL25Ef(CT7t!%Nq^0h%O_a$yW48m*KVeM^vN3b(f?_!F_pc9eXRjBst-0? z(+3g$L+pcU?igY4VFrJY!H+QbQ3<QQrox9AjCzZ((pwdddZ=L3JvGn%-_oDY)jIc! zf34xZ#I2DH7xX&Mtkap^9@LZb>U7?f_8#LB=5I&3OO3wWls5YIK-%aV!vCdj;_nYp z-;_LB$1d!3`bo#W)PuUQi}dP#(y>b<%ymq?IfA-$Wq+^JY_%u-`t0VSv*mEzKeS~o zn~HfD*xWKxsBS6NXJ_lREycF)musypg2>%cE*9xu2a={=+#;E7G0dlnMb`t$Mx|OV zZFVZPR<5-n7LA{OflojEv6vgve}Kg^`mf(9&J=v2cLlu*^!;%cVygAp^x2AAVqx6c zwPt0yRxasuNtP~VrAzR1lvgNmY7vPoY11ZQJl5&2KbGnA$9aXM$#jz@-i23lrtY_N z@~lXnJ->fb!p)?!{rF!^70RtokoRG8q*JLx3Md7IZn1bwN)!X0aW^ZPO>;7IN)=G_ zem4cIrmFRVR1;ShD+#eqsotKfmPM3l^ejeEwea|)9gjL#Ezj#B#G(C~S-)JU=7=f^ zYUK7;W((62Pq-Lh5;Cb&3#O%5iiBsc8YC0QKP0EDdiWKDbM;C|#6T^JpKuqg)S9hA zwF<w*YP(e4QamzEeG>i=#papgr)eCTF4k*Pm}W8L%_GfLc@|PEDhIDtE_z71NXanW z?~sJD@`~jJRfMX%$wIT-I?^aFCJp9S@QX7GO;f2&`2~bLl~cXZ5{X*%dbPQwTAADe zgXSju#o$fl>eLo@bKfRJD#h|9=+%jMOfzk^N~Q7?Flw~?Qe|q&LmiFN2upel9rKE^ z3UnzjdA@TP`=1I;P-p@|p>wFfq#~UJu^_0=a75|bK$@js!80zyb+BLxy<d~Z(-a{X z_i1t&oTA{YAy2pzo>p>5av7Wn3X@J!c$UI5np_5pu9OzRrbID|OR?To(#PXGTOQ$t zlgJXp6QMLJCK*m7%Mnk75~-MUIFT$(Ji|+A#bkLw3$6NWr6?l$bTbWJy4@R?7~QpV zP_$pnin(NTd`N_26=3~S@YYKwhDEST!LFf}g>(}Xku(vqAa0T~!U!p>o1%!U6lrK^ zd^n#MF=?IzV~kiC6}8|#ItQvQ`{<5=5iehuE0@O0(-j!U{3bBXl4@sBlbi8mvXlcD z3R6%MYJVc$FUk=`jdqj$jbcuSLMYA?jpkt!luBbzvCwXoO<*>Qfpg_ztM2R2xEm9* z42~lQXB*yRTlC;8^^+`ii)JR>Y~-lSVv?Fxn3$qk3QdzFeq5q`B!%xv6y{*UlL}80 zGe4#9K3CAkWPmG5=DUiao01$AOIMW1cN1D5!P8ZlBvO*8$|aGNOw%$T8JA2mDj+GD zW>r9zm`<r;rsBl2tnnnVtZF=y4%I2uXqsv?!&^3<?H9_VN1S*xzGww&RHqg^>#8&` zNo|s8S_OZ)-12;>l41l-$niFHz5@}p!fd&jo4{bu((-sL7mJR^bMa_?EayhY6S+im zJef;I$5XjfbUd9)N5?a{OmsY(%SOlha(zG?%f&GbB#Oh2n}b>$k0)}#aXg;P#UX7x zm5W1a=+Dq5<MB)`4jkgyTpW1B`*LyM0?GkRJPs=10vAvO7q~$4yTAn+9W-Vfn%V^} z(7-Nmfo64q3p6IE-?-bCbAd}DmP-JaL_C*>M~8Qg4dy_T;WvLtE|G|C8^(Yn{$fBX zIy^X@OQfTOWukc~ULp%WnOvd|ezLh_41W4@NvI7hX41vqcrKa1UpEKpk;jrIQ}_$D zl*ZpwE{VLLut{VFrA;C?C~gYbL3vZi4+@+@eo*2R@`EC$kROyeh5Vq<DdY#GP9Z-i zb_)4Hxl_mw3Z6!OQ1UeLgQBOAACx_vh(bZ3({3BfrBl&<-Ofq@a6qL7U$|CHmuqFe zqBU!}H0d=8#Y5#5>P`|>s_DjxGv(r;W_vbA$}Yx~`PoXVXu`zE0v1&ZmUhh?rUkv* zNJ}s|&Q!~_>DG*-7h?^`)GFr$5e_$5=!Bj(wrwYtCn?I4#DQ%i{=(2UB_=qe*(+$$ zf+izrvXTbOg|o2;r2T^fgFA-3-J_#p&<g}IynA5l$T0K=fe!7=6YffU+sK~$4(KCb zh8Ljp9u~~6S4Bk&xv-jX&V(}ft=u+lcprD!TWZhF9_h4_uGEjWkPcHI!%7{j?2Zh( zn7x(yf(_96B8bbrU-v=4Qn|SpBb<^!f<dUyVc*|f$7+t-24tn~%@k^-s<2I6igcBd zEqKiXr74x?T7^Xoy(NFnD>N#Qgp8z8$%m9Bp$ti73rORN$te1OAfdR1U#a_*))5t( zpp??~5)-|OO7bYQKUGAE*U8TOxC%G@V9F#MGVxgv-)H&<5@5+@+pY4vE=){Hj6FYI ztrrjFgslg?9($)s1kGkDK$S9qE9Aq4N{go<_B0^GRY!(Q%xYPf-Jk*Oh8lFxhH<mX z@}b%ggN~}eoTxp?q|y{rXaH{%bs>kGl8Q0IgB*EEg;pUanoSuxweoz+(<!n_)|9q< zAWqoMIkF0r0Te8QsFOZfCn?iXe!1DMwwj`lXhoONSjCtf1G|SthKF!Ck|BcwBO};+ zFe1rHFV8^_0L4|xCFXlEzc=IQ!%#0Ul!{qkBmO3_spDqE_RED55u_wR+7O6}M56-x zV`ZA?GLkN9=tQ+PZMr^5hq|K(`_iUrM2GWWtn!ZtlZ3R(&En)m9O7oK5H($Hcsx?d zC;FD(6v3*TTC7S9H4j6QDk>$qgBGY-uODhR1W{TMWsKNT6+qACax}WAw#S*O-OQ1F zWj8!8oo<<|Xc}B2En<~lsuZRdGi*|-|ClWSuqgin7|j(n$t@eto36Es-dw?}f{lu` zlGP)&!$LDci?eK$$BnOoU(Sh!b87M2m{bF&<{G%s@&SoaN7|?YB@5C7H6;sduNXC3 zIocMEt29}iMykd(p$QJDpUzBZp2&}M)fLPHFQ=&?=;M%sVd0^e0qI0nRT*j4#1fYt zluN=)Y+yKvFj8whxC1BZ(u$EtN)^mfC{ot9Rf0q1BS6LZHN!+qpoN+uSl^qA^Ydya zNbF2r)PydxDV}B<mU1Tnen4N$4wGn~g>2A!-dt<4igir8V<Ih%hglE$Wfg~b+#<qN zc)H&MMJVA^L_x4(p|HkOEywEH)l-w?;7WQ31p0n!*DTv%(=5yO%+&5!HfrtksI9P! zN^Wn3Wz-H?a4Re$*#x%2GIED3xD}R(T3baX*xn~ndtRBSwMk@xtsNrSq#3zE7TO8R zs6DdaPFO~5k%f1{GHR17v=f$5dt~9Au#DOy3+;qu)E-%QCoH2j$wE6}8MQ|i+zHF5 zEwa!~SSGkfCbyh2La(v<`A%3yY>;82+dE+yu|<ZhYwv_*#1@%mq<6wHVv7u0EU*)n z5qo4h3EK(Fh)ptz3ft4l*v4)iHgbinK^#IxZbBHjiOxo@Sd{8axsgj2iit8tZla5k zn-E5BLKwL^;gE@!)2=jf-B?E>R~RbFxTW?bL)G&N&0J2ICu=2PRM{u%t$>8Fd7{eX zSg%Zu<M7TQ=6Q+DUTl02|J&~lZ0?8OoHk6>1~RjM!5kLF>(2$*D1)Xu11llr+|L4! zBUrcmEOs3h3Bn{&ivv?HYH=WBQv<KAt3FkbtSA6>to2p^o5)3gYAHAIJLPApAWnsh z%PNQq3hZ}l0|MB;ZlH=88;VaIi-DD}TibLKtXqB-yWo0Dbl|kT;7W8_a3z8Zt^{qZ z%aw$+;DVT}UOQL|E*e5QEVv+rT1B|&P7AIK+i^AxmH>TNOVyc(t9DOAU5yXM6IMZ~ z@OIG!16MOhnEbmiAhIM&(4S+K%2#+|;7k3UD?HlcU`so>+kv~;v|=$|q2<!fm0M-5 z*eZ*&&(hY?&W)xeUB=LLSlYSKtfcERbfP&`8@M!>t`)*Y=|{AL!IjVoPpJ50sC1#y zbd$cDw4J0gJ;$ZK;mV%lN{UoKemC$N95fjhiccRSy_K$8hwdg;x9lu-9ah*vbuxU3 z?aB>}j!SHc3@@=o5v--POG7fXrW?~cNx`+XtA=HlhGV5T*4mmZjbkmYO%viszLsj( zO)AyNh(4MQ7GC#rt40KylxCx}|CnruGQ-kXy*<3@cWKa*Z23aeD^?55CN_&$!ZqWv zY%wKMj6_;5;z^=RD7_iMEUv^QqqwLxJ|-6==rbvFu{^$b&db%Khx^;DN|8b<g=*yr z!0I&*)CB6F+49>(!ecpQae0OmR=>1%q#b)bm8g*IBcodfM!d~CHz)gGZMWH@)ujh3 zOZq2v0$_FN$<?I?t4q(UE-yKlxMIAhvt8iY)T2F?&O7hTvR}dd`tCdL0SaU(a}hBM z*@2h4&@#coH{nHsMeW;*q0xhNKJLcT_mDKsDL5<b-m}Zg50CGJ7T7wlXUI#%#M~4N z&!q69NH{zmkL3~_BN9n3l}mPvf=p7KB4CN1OLvM$Kt!ffL>eNp9rHk5eH~-6G5Vz0 zDgPu!bu51ZbBcGYf+R8QSP2=FBHpnQ`iNo2YKSLEj*c|}!y?9Ytc*mK(sitlREF~F zTqE%mGIcxGNg{?^-MBPQg#LMxg?7pF3oU7*q{ZqF)k-N?BBWsXiP14H9?~xn?1dGK zB3$wL&E(u{)f?VqrPWk9Cq>Q)opUOb^Vq=n&WTIC-J`pQbHP%|xZ%CSyF;SMxY41Z zkZ>|;*TDG2p$;J9@?!&o!_WmR@f!uRDo%@)EK00o&xB;hb-On*ynFk^4lfnzH#{~S z>O4F)6Y4=c7C-n~a?+|_e5+N$W`(eFT9b5@+EiT;^hq6v(dS}Rk(^MCsGQ&HjhtvP zX=aGZ$cdVeHU`T$CvugB#Z<L0-OSNOr7|M=9VtZ-43=6Mx1^v;(N=N_HFCZgh*$Je z?OIb1Cj@bl5mTh*3<K(9p?FBDTZ%R%;0M=AaaUIY*+nV&tt7?1KdaB=Esu__3L;s2 zzc^<?`()BMv#3OkK)a~pJs2;GhX!>snG_2u#MM@@S`9SXE$c`sSkDsIAL1ph47bDH zVd&Am43%{(*3RPl9$9MXWWU(gke~4Iyib<MDz)jH_{<`Y{1hhZeoF<3LqCmjtt9C( z`ruEf9VcW1LKP>eIjDq5Sw#t1LftkZIwhl1s>EQOdF&gGD7IcGpuS?!p-j@S<)YWy z&|<jjE$dv!pF$hh4o@dz6y9&?)`V0l=m*daMM0fbO`Or+qhhjUBt=$Hs1LNd^{h2c zN`3A~k&P{R$;A*JMDXxjhEg_l$O6Vq9<2M2-t{N(Y5keo&bIPQoT>2bqM{w%0rVGT zXhi-^CPh2ra#*2dp8U?{c>1$Kyu)`6*L>$dj=nVUsD6E^5VYeC7-|!Jr114FK5oG~ zxVez?<u0O*SBexjg3)R-Aea3S#kDf9xG5%VfvQ-|GgfK_>q;d*BMCA+W^}4or`aeJ z%c^9m3~D^lDTI|B?_?KuH)30@&WBREo+0rTZN)+sWWv&cW|$87ED{&92z|f7IP8gX z>^El_MItL)9VNgh?Dc4zAYbT<LKR^!!4ZMNL`G2>%`i}Ye%p{V9Z7H!-61cJZ&0>k z^?+S~4hV=q(E<91s4&TtTAZSAXdLpjT8l=+lybd1CH4+XV)Z2oo3}mbF{b*XWKw(q zWt@ql?qja?VKHg<xMYVOM<Zw->v2i-Q7cDhr=7_ot#Z?Awu{AbvpLnS0ttl|imf&@ zv&g$uuBmX+Yq_vBrzg{iesL7INOZhoWrPH-{)FnPYF8c9WyMHZ9TYzV(4<BskOKpW zA&%V&K6W2<%@<Hg#rPs|Gfd1XFr;ciG4fs4qTT!4OrhF!NqUSc1oEhWOf9CKytIZ@ zpqx`<A|h@gD)pFAVofa;iw&H(yA9|z7pD0tjHbLm7)^3h>N}@A8l+>bil%fDGc!RP zzcxBv4Qd%}p1c_PI^II7m5W>O<n}S|p@oRBIj~Y^E6w79m+<CZhF@6FjT1Xnq1jaD z$<X|i`!n7Zc)w^u9)2s6xlPw+Jm`L{+@^RGgKG6!8J065^U54(R!&4*-mZXs=8Bk^ zx?gWk&%h!DQJ4<>GK?O$DhVIX5U1G8q0L3#A*$3`{$j7eEPO9RotdT-cqD)4s5d^m zeP@1Rc-)*VNz);`MV<0rtk@)kNJIPhyFq~QJ!2EFWF4Tdyz)Q`E^D0fe6if1-7&eV zs*j}jWthBzhEfAMaZw+C;1fo|KC~z5d#-+n&ZUYyxVqoe+#Af+5%UI(80D!#yV~;b z<IOf9p#0!7CTos*mqI8L`p7$j1F%=1eLkIs_$)If_#kby2}^T%!a}m2Ei?})l8Ule zsGo&tn=`Nop=#+=N8LL+1|7GvTSVB|iP2(uJLwDE5Tj8WnqPkz(r1HxeM3af18m~k z6z}K8uB->cgQ`lETsMm_URzalW+{-UU9*zekzlOX>W8c4(sWr<&_1vxY371T1r}uK zaKSIz=cl^XeX%_0EvWuOglfQ*GvBs>og+HCSu~o_3UsCl6*AA8pm%#^*uco}_=Kh{ zRB_}CkSNB&93s0|+Nnl+g<>&U(s4~i^ITC2(yGjs!5HN#Y-T`Sx$2Zz2N5(~y;?%^ zCTY=8_7>S<suD*fsm-b>8`VN<s_xHrX;bQMGv)cDQ93C27=3}!k#VD1&{6m5;fiXG zh_cv^LGMk2luCYwbzO<}?L@zD!~KF*W5^FE*(fGEz(HQ`Mcjd4Ul<HIv|YVK!%c>h zf;Cxgb)rh!RCJI|hsr^(TE}L=OAYgeN2@LdNt?8JxY8=lgovm7`m82bjU)1uvTVo5 z<U(%_SobxG3rsXw2PII`+;OQzfi^V`wVE`}sj4n1%L~8d)Nvi)nHdhoEU`6^u;W2L zbX1y0fmwr_3SAQ7rSC#8l7=sv8<_otTDxI|g0f;y>NE_;)BQqwJ+D=tq1h)UmLpQv z+O_GrTzqdAAy^kf<;nK+pk7~}PreXTavUjU^l}@FU3q^-4X&_km?~qZpp7j@#>zS0 z!-H00h-%f<%^RC*Qm0`{%akybaSryy!O@BWJT$^NC$i(^1s-3S;WHZayjd_W$u>}B zrXUvz2%|t1)Kr&cPF#M+KHN^?#dJ@Gq~z+HmWk>-CA$yV&-W+$Y31ez^1>6RR6~I4 z+7fFn0V|V(lFb&5NSXBqM&RLMQM$;SJig4SW67*D(1PO9rG%=1OMr&4T!?a_zOyD8 zAj!@utBpVx=Zn_fLbWXq6{`yhxX5qM4wC+=VXr(d2z8A?(uw*GsehV%h^=O~6$f8g zPjiY5jX`Sg0tG3xtE|=zfpum&#j$BUbskU;2WFnBOk-`U-74rd9?nXI7PFR^!B<l% z3dSg2ks2z9gVovK<yz{sG}*{fLSk&!N=fG>jHW&_4at20S%)G%5i=GUN!M<aa7`bU zu2S=OHRIkC$Hg&k0_U{|zJkgc!a~-S&~i7^Rmaj3aXr1xQ5&kwCl$*^NPDc%BZO3f zCQP`sf`3G1Tkxl8gGBHHtVTEY2-BZjl4_R&Gqa{?bj2a3ebJzbxX>>7bcIhAsEh~x zyub)3(@1R!%^hY?rBfiLg^(G|ATmZPl|XgJ$BiAlxLB#-mk(JZcsN1#f!V^m+AKn; z=_`gpWO>8m6_mD=Q_}^sH!#PJ?TMz*dZ9B>oRS@t6&1v{G$bj<YMNd0EuWRo=#|bH z3kVVT1!bG6FJI>^Vmw|*kOob*ggvPB^(lF%jo3h3lw~c|y;{9BgBj@tlyh}33T(4> z?T~2*X#>GbhJDGhjOBR{D;y@<a?8xEX81f*fy_Wprv1XKF)jV+CYb;&Zi!6!<+396 zkc6?psg*_HMjq8Ez<R<LHReXm)eTwgIJkG@3&@-r%;hM9JyZ8^Qam~K@Nov<5`(8Z z@kf>@-56_HIuN*1oyoz5@{0)<3PVDxnFX1$)(09@tb@uhC~9CvZNjO(czL@FV})vN zu>5ijHOJvcC7kr6H1)RcA#=mZm-?hEH`eiyky2#8JPWqw&e~RC4q;gm*50riOR7Oe z(2llSHZjhGyUMeJWC!H+<Oo4|kSH%R5+Os)mJZRjf;U?)m9_3*3*g?J8STB9di@X? zL5YkQi4$3U=a@CtoRFx`8X}=%$*I5)7FA}|Lepw)70xxFB?_91bsl+vq(LOo8bU1) zr$t4wxK){{RKIAUh1vYt4bURDq3L$?Vm8ol({0g-aDA&1v8fpw%G~}U+grz?k(Q7X zuDHepO9&iC8G%sJ!!s4Kv<1nWvYjZg8lA22DLiPY@j{=C(X@0FLiS0$@lwGy(_<@L zf!9N**`4v4?IwORhtW>&D%e(*TKyP93<?JY@Yo%<K5>e#;+aKsfQj`5H^{;4Cs+$J zJp~DjNly(Ju!k{+9da9@!=#|g=LHt)lVEQiYSb$=c9+kiK(F4wJLVLe(zPET*Sis- zEs^_deXiVr4!E`}Rc5(p3B>Xv$*j$U8g+dc-fZM_4wafY5lITGa`4MA#5To-X+kx+ zwsdgg)uv~QGQD|B>dyA(J)Dn=^~MpTHTvWi?F)oBB{f_64xcCXnvi|7Fr_opBran? z6QS6`3ep=xR5~LOQ;0H054Ci?;l`PQ!44a3vn5-AN7ERzKv_QqrEUG9f_5>Jj5#Hn z$W*;>l)}dn%W_M@2r3iJ6so~tCnXLVppsQv!N{c5ld-$2O=9sqIYEnDHIIo*7U(!a zdLk$~je1jDo|w`d%Dxcms@+EVU?I;<K!+wnuIV@JgzQ$V%QpCNnl~2$)rL2+kjHuO z1_STuiUwj$Xw!!pYLP*bwgqLo{H__u)%_t%NVdA-M2kXG6h<c2sAj`MMwNmbctn>p z;;NXnT`H~(jmcXJ0ZKXsT|d%=kIaJZWCU-c`A3csdray4G7SCAawwK=Tv?)H2pbT@ zseYS2Q~;L5rlccb9rNV#LNIR9uNO*1uz*6*Os8N}V)Lf{1VXn!9Cmh`ZojBcRpP@u ze$g6}cOx9^5)E|<Umk&IY|ux4T)9W$i@=yj;0F?@(><nZ#5xIGf>vmi!`d&TaXTd` zv|2FEAEP2l<>L@o-+aQ+fsaBRB<S#As6%_uNBB0Iu&d>{a#fTJbhX{kU^uZL?T|2G z3<{{b${d*7;XNao+3Da^TsJgb#h`(tRB0B(fZE3VVEm*Js?;HByNROj+<9r!bg(<= zt9-X}|5hxG!t~i{e!jzpbm5mqbe)dA<HTKB={8PWo(=96*ly$Gl{xM<P6b(R<5ZyS zHcp00w{h&|oVtc6ZXfE~s{&2wu{bKP-L9ASZn@z98B!kSN@~_FM#}n0AN!hYU)Qw1 z`xV)2=NqzpfeW%h=Y8r<vT)p&(Oc8g3Nw!T2sMuT2sMuT2xX4@1a2JnW!McXa@<D& z+;N`>V2=Al0CU_Y1u~BNL;!Q#Cjyw`J__KD`$Pb9+$REz<37Tf<352K$9)3Nq-}lq zy)SP6R|EXs4RD-`%8S3<9=OrG@Z0T+yFsllR)+JlZ&2G_BIC^4PhZeeByI9`IIkqm zx(a^^UCt4uBndilzzG&DUvui<ceqpNrn>T>f_2a3Sa%GM!*xTKyM~<(N02dQ9jnkG zf|9N4Fs9MGLT!DjuO^JRR4!^t+!oD<qoLEd-%U<RII;c|tcg=rJbgCAPbM}Io{L2* zd`xmA_6liCT~YSyU}n<k#lw|SYlaXO=kquvmimkk@Aw&E64rf!6pf?GG=ABmO=Y)J zC2)~to?{|Uc|f#WJS3~t^R|r*;yF!<ZnAA<aj9JiYxc8?YU`JH&4G<xYfb6wre<53 z1MP1ULZh$HdsgbWZW-c7wOwzh9MuQJv;h+aOlgtiiC|wifPpnb*}(N?OCuG6R09XZ zCQ&y8zv5(MS1xGZPLvkZUd-W#E3Fx?J~f5gP*9J1ihC*(=0>bI$&yHkveS3JF<A+u zJ`E8oD>TU5G@!jE3v{{q<Uw<3*IccQ<C6iKgWXL@wy5)Ra(~z(2VJlV&0AZ6xaEiX zHd*%7u?0_UvFix6ZHPNKMRO>pXue}Ly(U`B7_E+Ppj!8d3mq7&Yqh915kS;RO=tlT z9&Qx%strw1sVA^LXejk5>dMY5V7~%J_bO=cQr#qVSjHA=>f8kFBtfsK;;2+^*jtt! z%bxEx$}JW)Mf3}a8I4Xyo4bC;Oc;CB3)IDHvHfcJ@y}s`VdpsfV5}qXG&wu%No74$ zX&`sAsiqo=wmdtW>{4a32|fA<&rfhK;)t76KykcnN~nF{V4sS^tw8HIor<7K0BqwP zPn@ZfFp7o_0(3h9NsjS0OTTy1Ahs$-sXSNr0)Fu@zFL{YH%&nBmRMAqgIL{?Oc!d+ z3QS<t<CAXQtiP5lJduz?bo2RH<+86eySSA6afaijXwLb`1rwJh=gU=mqM$j8>O5PX zt@}sRm7cU%Kc|KBiZpXGOtz~$I6;?Bh0#7+AfImuWwkeEjx;MpJcg_zl($MNKk_Iy zu|ZsD&hJ8ZExU$yjgDXHO$-g>Vo@t74?%G|Xg>tGb`a*65RRLb1-F6jF_(9fftUxj z+lO}#kHg?iXgrFk33Q_)J9i=I4UP=t^TT;@Ke{cxCn6tQz$9z>IFmWLbT&nUIanSV zm>BQ|#)k*I-J|0m8RTbzL>UY|K?N{476|jCen8(W3NU7Xu}Zg><&koXYxsrf*@E0^ z$E?9-Ebqmbu{>J1;}ejt#&?YF85#1n4tqm*OFOP3whrLsYlZC^xD-h8!-Eq$M|XR> z2X+mEEGlw%-xx;h-tG;*XwSe%K9}qerP2<J>>SAFQUT6`qq}wu<kG5mvItrS`g92< zygj=w-aUHBZe4~6W4~+hCscO22os{@Iy|Anhj$O@P`sY8eMcU~HSraR&S8<#qrX^; zQN_4;CnOsh-Zrpj1gkR?H8H#o#R(^Y_5`6q;p3welL*Ib&0~dzg7ZY5>cmMzr8@{k z5t(qreu~I;VkV;cqJyJ*c29Vt+q@u69=$sBA8%}#Efi<)`~UGrAx&8-PdSKGYGrYB zU_!iVQr<hdbBF?B(XkipBq$!0fEyj#A)rK50?FuDUO=g+1k%y5ApvEg639j;1ke{9 zl{{n77i|+zJi0?dZgfHgCZc%>C8I+UN=5fcC>@=UP$v4KK>=l>J0#Q>%?rqdAwWX$ z=spQSCK5_S2UWq6(Lq@tHx(U}1##2SL0JGd6CIRAaI?@{66}j^9l2OkNGv)i*e2r9 zT?6}|>jB5z!``mZp<#6C-|t|o9vbPbm@-Cs;{&^gMt4Dd69)YaDxAP=BclToQ0at> zK?g$z2N<6aL4$)({Q?@@H8wK5k0MickYJJ)GEoE$vCuTf)hc<bMx2yB)&o0gV>r$q z*l{~Pu;X@mV8=BN?Cg2bPUG#=JjRk|p*pWUJXB{k!~zq_?d2XGnpAEw^V>|Ibjt_} ztsxdF-HD>K<S<f4=qGoEc8bs9;zBMt0<6{#OM6&MQZtq585N-J^A7E7*U$=W$z24w z)^BH<@=&O_#apc^cT$AnN!?m`x>Rw+$_eCZ>y^{-Y&BSU;y-d=T&!L}mv8f-)wsOP zLpFE2RGBMP5+bjp*clK|Nkc#ddd;cYI&Mxw&gSNkS;!E6TfX?6QIKDsmA*5Z&Stz| z;B1}(3l$@9B38d~44!W{oXykdMTtJGh%-XYW<fXEY$AV=OJNfDJB#@HZ}2Z7|2a;t zGr!-CkI3H*5<XGV;s3wUZ|IiF-_4BQH~PEtOG<c&r2EFjj<at`nBVgmzvv6P^BZ0u z-N*vzE@SdJ&QZr1bDa6*VfpYa#buIie)&=2ch8zIU4`++Kcu_k?;PhDj1J$wuIoI- zUvy){Db&OAof@F~(|1JV>)19O{`Ro&1MiABUpdpE_p*N_^TqeFPY&>leLUhk^sF$y z&VRl1-zAz#;UZ^jUx6<P;G%Z09Rz+t06#H+pCtJomH0CH#d;U`$(B@0oaF)h83BAn z06!&wue8d&)Oq6RL;w%QR|EKM$B7T7e<XnSMvfgn5{SP#a_snE`n!%3AC&KhmLfdy z^lu_Y#}R)<k0V<};Ai$Ytd^g6dQ*?m4uM|?_~{HE1$+&|4*-59!+pTdX86@T;%!rf zU*99fDuw?!;8BKu0`M5a@9z;~k;1<Xc$VS#cJ1>S-m^r!=dSS6mf-vC244sG4u+?e zh%rauJC@k>wReeKU!^5>efa_WswH;)y>W?MfA3mi*WYbR?E1TViCur6Ut-taH<sA- z_uVCS{rzl-U4N0KcK!7(wd?P!rFQ*oUTW9h1xxMv8(C`C-;0;p^>=V74aFKi0{8^O zuLXP`!`}}0OBj9&;0GA~G5H>@!tVimhT&fayvp$J0N!Bu6M(lEjzicy!&d=*CBvT^ zh>r&1bAVsX@SP{Hx0wOI1n_GaJ_Gn07=8ud*D?J16Kwsu74YXW{L_FxkKtcE0pAuj z_@jaJkrQqGS#_e_o_}<rE$<)G5Uw<~$4LQx#S(+R0PrVIJSy>J&M46v{KbGD=rQ;q zz~@=|!-4o~0AIb-#J>gbH4MKK@T(dAH-LYZ;eU6c!~ULl`tKQz<KI6A@W%r9zoI<L zj#3|wfILBdzX{NvaFUq6giUg?a~j}lPVA*V+XMf*5bz}6&yskM-!&)M{H_b&?*RPM zkRIm|O#gnszkE`!^MK@c2jI6X>vcXT<G%p-`0`%rlZZbE_zNL@OX80Kem%tBE%7G- z-~9|jAC&LpWwt!40KW?Ar&rd`8Gzpb>2H_mp9gqp1(aXPvjyo-G5lWu_&tDMDDhFi z-wf$jOZ-y6Zw9<q;$^_Eg!)|}>o+Lhl>zy#0sK0U?{q2OTLFL8%3i{e-%WsTTxr_p zcEGm*{#=RQgZV@HD`om`0)Fjsr4J`N4+Fk*rIGh1fcF62Bk?6C+wuhET^Wc!1Mss? zK1yQ>=9dBd9^iLwm-g5ZNS_D%hLgMN>tzA@3gGVo`U73)n*sV)0e+P6e-oxZtC!{s zs!zbba+WFohXKF*`MqS{Mj+MQfUocEr7?%}6L25!sKmbp_=eTJ&Pu5--vj*2GfjOz zf%U`iqe##26<{K+WB9WHf9q+zPE7JUAMl?&)5v!b;J;w_rGTG#`cWDrG5tZn?>Gna zMW#Oj_`T=$(j1HUHGm&HyVtp1;_m?bs<Vtf{W<bmVfft*_!~ffu8Ro#vlzeJ)aO?) zJ(K@CfM3b*p8_5Qd`#j`0lxH)O#F#p5?>ARS4sR?fS=9ypMxedl;;j9-v+>!L3$+U z)Spt!#K!i&2=EPz-%A1CxVD$pSIDo5{LV4*yaw=VA^w1je=p!a0DN5HcLE+|{O$$( zp68kI;~xND!T1H`dn6#=zW{zZqyIO+KfS(}YzpLu14r*M_&sxl&F{HLe}1pCSEk4D zJh`ctY%;_%5I?fX^#35gO9TAMfG1gbeZa4U^lz5>^)kTEWb$1H_?lzL`@R7G4+QX! z0p5t2`S4SL`2W}OV0k_d_=XF5X#tDl36}4sboco_$S)Y*k^hA@|10|!&i{D%Dd>gp zZ#CLyK!3}5y|gl34g7z&!q`u}pdS%f!hUL<=&u-m+9_sz+zaW?1^lfsF+X5@0`RBK z75a$y0N@{9XZY^|{DxIx{6c&Z@H3t%?2*-MXJMt3PvOs%coXOw&_6c@=v^6qEyUj) zH~GIE@cpqcf5q=ch+iT5!>Lf-4*{M7d6!E1&jEh>sl7BGBK|eNe*p4tkoZG@-vsn4 zB>sKCf5giFbHMKddvK-1p8|Z{IV!)Cos|%=jOD)$@H4jbI<<hjXGnPyEA9Fp0DPTm z>QnuFMbf_r;;)MfdjsPS0RDrMO#7<8_XX-(<#!n9pNxt51k+yw`0De7J=Cc_Z-Dsw z&I`-aBjY~+@pI7LSIYRi0RQuqhX1{R@_iHV$G3?28soo%73rAxUjTmZmR`xf$9cvo z&<|F=vsQ`zqx5CtDlr}@eeDDM+b8roxq!UmQr;1WZ!Ht{9=1;z@ZMgdPc^`Q8aM6x z3cxq4HS%1C`9G_d=0n8a5BT%f8u?XzSF!q6>rEcNT*iL{(tl*V(a-w;e*ngxo0r=1 zuL!i~SO8b;@%LDswMKux3;5l!UfG_8-<+iX8N@&M>|W=VlaAeAmAtqVIv4c8mHgHK z-T-}drM!@}lV$C_8So3CKW&xtVymuK#`icQn4ZzUq}S}{AzriSpLn{}YwMGe?@TG* zD+B!S_jXqQZ-w{?SMWo5ZUk@x^xtI>(SJV(_!_9Mi=58-?yx`P_i3QNkLl~z0e_%F zeQ%KIzX$QxuQ&Z8*uKAn_}IBdo)f^({n}Z=K0x|s0lpvVf4Rgro@(|>QJxs!y=?q> z0pNGD@lXA&>C(OvK!4^cv7SQugMi=9#@}FlzwA`IJzfv^&1`&n7vM40A8!M^w9>@? zCE$;4F#Y*Ur;7PS>Bm2wYPaVP0KayNX`g=w{C#Y`TMdHVzs1yl6!7_Yc)mzW`7eO@ zo0)uLfPZC`sqe;Wq0eW^`ur2XABgtSo)PD#>hE<Bp9K3oE#uz{_zu^!*KMoq{-M&V z@%Ao=Z>=}uSx`Ujh4_6jqi^a@jR*e};QuJ#?}71cb)+-DqYys@_9*TnV*K*cApi5k z`U&wr0{ke9ci)zH67XNbcz=z=cL09RQqx{91^jF_A07t$s&(P=sPeuB;vF{Mz2&rU z|HVJS?}?{xg7^chJ^upmhuL`j8Nk;u{l6dZcQX6pL6rA&VSm&74)_{IuXJ0@mp_B} zGue0=lt<y~B|R#34C-f_q+fwJ<9`m|*|nyA)Snt3au8o)`aA~sa@O8u!0%-9#mlfG zG5&7_{2<fk8v&nS{DSrWF^GS3rJ4WlH=D&YM}O;dTc3V-y4~M@3i!5Oqc6Wcz4Lsi z^zA8#e;mfM7fSk-&lL8y>Mzd${2&|O)L(EuQv9Mof7vEOe*xh0P@b5?_XEC^)lUuZ z1JJ*-0sg`9UGe`Dr0+5M{c6B}a$b0RUmr-X_`L<_cf`$jax>sDh6nRg_(uYGaJ)`R z{G-6{Q>)B)`USv0$mDwf@H^P}|2W_?n@oTC_h;JeyBs>!FQNX{%lP$xuYmFSL5cSR z{s8p%eG=aR_~~&opIr+01RF1>08gJL*7Ll)t9g0kHzUmda-hEj=CjRR+UI2uf50{R zdM(Nq3-?de9`8i?So_}s_}nHlpM4nclH6~^_`d=C6RdwN*qgBYR=+vFa3>eQM;;+> zZicwU`Qgy+9wB+Vu_%WemRHjS`+lEUnAdkk?qLB%Zsp0}HSO<^ZZS!OuVvxfcVK+b zd*QCJt$Vh4`LRI2_F%w7Fkn0$3~+-1$zVV#lq41k39}9HbrYeGP*!d@uXHFR6AH-& zLbe5qJsb=e2?peM?jKe`c$n2x6k)D~B{*hUf#Q-Dma?$4g=H)(Yhiu1EHN9kWsBRw z#S=Da3lz5{irXT^ZJFY>P;px-*Otl+)R--mYfI(YQn|KNt}T^oOXb>9xwcdZTdIU5 z)v(o8BNjH6zr;cZIW{=3CvWM;-r>QC(Qy?ryl-%Lj1GQo8z0y;thEUrH==uX`EhU8 z&fUQvIy%Y&_afcEzF<&@&g7?~Pz)%7w{wVNrof2p9&<czd~}yL*Yu4WaN&K#hXERY zi-+*}@}@7(XE7L^XE=fsoxe;A2PB5HR5!Qg9UlgKzviKzS?1KI?wjlQNN*6~bhT3O z{J67mU~7IO`8|Zxn~TD|2K-j)Fc8vJAG%}Vd1;5e>hAG}0s&j-3xPoTAM)g%V_xyo zukLyLl^KnpryGr!=O1)XGaMw!6nKcmFqH4CIO3%gPrnl)K$*LGv_e2UU;AYV$5Ri8 z2uM5#BH+;D66(PO%$C3UU@&}p!C?66g28yE!RI0Hyrg(q!NdunIy?>Guy+!;7j@fp zgzXRA@dA#=wcl%zkW>uDE#}7BQ$C}efWu?v`Wfms<V(_FJ_;RAc>;Dk%Zo3$eiI&q zP<?G*x0FhGnNvvKhn#IUaw=-5Nla|#vyRu%W2)nIaixj^S}yNQ(a5ioL7PJ6fNMj? zvpjDqcFNlxy_y24`k<}38$}Q^;Fr$fNYTRPC~c$VTcLP>)YC2s9gp17$sajfG2e1t zX9s84{7I%l6)_-ocA?~iyv-^<XdPmN9y6T*u1VB*?mNrzls6{F_*e3j+YraoE|VOu zg9j4FcmwHjsn#0!I$p?htP7Ux5~SnFYmY3{T%-#II_#F5xpp>ErUSzwAP!3sPoHfT zZ@z{d^*EmWn1Ff}7?awr(lBHQCTMSDXMV!-$h{a%NWL5Md@u?;?sSh|hZK1PE5Zvn zRTgRx@T!IrDU=%W$cjAFiElwIyo8Igg?-l{jrNcY`ANU?7)<Wxgkwk}F}=Zpb20fj zwuZG%{>o`WG?zAY{oo}Zt9qp5vLG3O+SOj4JP7N^rlCp*s-Sl(#|zz(m)(clM9Z2s z?|)$AAQwvC@1$CQo=vyARH-}ND-DV&rVnw@y;(^Zkz+<=dN0h(LtS2&LoVc;omW<$ zYG=#MqT_Y+C{0?5vqG)J+lV`=Q=*noRPN=`2(B6^;BncmeKDRBH*pWZ@wSgn#HnI= z%?Vv5{gUVSNil}^P7G`{t$;QhtNAANTUi+07`ulj0_jvOp}4FPf>&NezYp92=9R2V zY`gq}alhIM&gRUYuc;B^@ysbJ*_nra(ZvEj7}+qu-r(S3={~L%Q#7n5$XF^Sjj+(; zJ60#DwP%$tNu~CK)+iRfejOMq&0x~`?lc!LZ3#FX=mXuK>yQSbGypy3uK@E6xjxpq zi<yBMy7I=MsCVY{(ddT0>MRo|y$!!gAhVxS`G@?%$<7#bpiah7U|Kf$iylGmQy6yv zL65vb<CF(c(?gYBm>%Jo$h1AassY53%lO@7CY&@0g{eoA0UsQ+Yk!MO>ljTI%BmBP z9HBco_cQgt?y`3nvZT@1@zo8jR$|2wc4BChETCKL?J<05hYd(jjb$;Q%ZDx;HI{PE z+-lUL;XdSmkopjJ6k+7(@OG75JT-w^5A8T|1hn0@@NSl}n>=NvRQrt`Cv0^DJ;-86 zz<Grn*;SY7{>qTWUU`mj0*huXbV5t1p5|j~5(3**KB0nM_ZhuWehzSDp<XT#HdLb+ OoMGicwTmxR=YInqDF7+}
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/ceb_v850/current/include/hal_diag.h @@ -0,0 +1,71 @@ +#ifndef CYGONCE_HAL_HAL_DIAG_H +#define CYGONCE_HAL_HAL_DIAG_H + +/*============================================================================= +// +// hal_diag.h +// +// HAL Support for Kernel Diagnostic Routines +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg +// Contributors: nickg +// Date: 1998-03-02 +// Purpose: HAL Support for Kernel Diagnostic Routines +// Description: Diagnostic routines for use during kernel development. +// Usage: #include <cyg/hal/hal_diag.h> +// +//####DESCRIPTIONEND#### +// +//===========================================================================*/ + +#include <pkgconf/hal.h> + +#include <cyg/infra/cyg_type.h> + +/*---------------------------------------------------------------------------*/ +/* functions implemented in hal_diag.c */ + +externC void hal_diag_init(void); + +externC void hal_diag_write_char(char c); + +externC void hal_diag_read_char(char *c); + +/*---------------------------------------------------------------------------*/ + +#define HAL_DIAG_INIT() hal_diag_init() + +#define HAL_DIAG_WRITE_CHAR(_c_) hal_diag_write_char(_c_) + +#define HAL_DIAG_READ_CHAR(_c_) hal_diag_read_char(&_c_) + +/*---------------------------------------------------------------------------*/ +/* end of hal_diag.h */ +#endif /* CYGONCE_HAL_HAL_DIAG_H */
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/ceb_v850/current/include/hal_platform_setup.h @@ -0,0 +1,129 @@ +#ifndef CYGONCE_HAL_PLATFORM_SETUP_H +#define CYGONCE_HAL_PLATFORM_SETUP_H + +/*============================================================================= +// +// hal_platform_setup.h +// +// Platform specific support for HAL (assembly code) +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 2000-03-10 +// Purpose: NEC CEB/V850 platform specific support routines +// Description: +// Usage: #include <cyg/hal/hal_platform_setup.h> +// +//####DESCRIPTIONEND#### +// +//===========================================================================*/ + +#include <pkgconf/system.h> // System-wide configuration info +#include <pkgconf/hal.h> // Architecture independent configuration +#include <cyg/hal/v850_common.h> +#include CYGBLD_HAL_PLATFORM_H // Platform specific configuration + + .macro lea addr,reg + movhi hi(\addr),r0,\reg + movea lo(\addr),\reg,\reg + .endm + + .macro PLATFORM_SETUP1 +#ifdef CYG_HAL_STARTUP_ROM + movhi hi(V850_REGS),r0,r6 + + mov 0x01,r1 + st.b r1,lo(V850_REG_SYC)[r6] + + // Internal RAM, I/O - 1 wait state + // Externam ROM - 3 wait states + movea 0x7FFE,r0,r1 + st.h r1,lo(V850_REG_DWC)[r6] + + // Internal RAM, I/O - 0 idle + // Externam ROM - 0 idle + movea 0x2AA8,r0,r1 + st.h r1,lo(V850_REG_BCC)[r6] + + mov 0x00,r1 + st.b r1,lo(V850_REG_EGP0)[r6] + + mov 0x01,r1 + st.b r1,lo(V850_REG_EGN0)[r6] + + movea 0x2C,r0,r1 + st.b r1,lo(V850_REG_PM1)[r6] + + movea 0xFF,r0,r1 + st.b r1,lo(V850_REG_PM3)[r6] + + movea 0xEC,r0,r1 + st.b r1,lo(V850_REG_P1)[r6] + + mov 0x00,r1 + st.b r1,lo(V850_REG_PM10)[r6] + + mov 0x00,r1 + st.b r1,lo(V850_REG_P10)[r6] + + movea 0xDD,r0,r1 + st.b r1,lo(V850_REG_BRGC0)[r6] + + mov 0x03,r1 + st.b r1,lo(V850_REG_BRGM0)[r6] + + movea 0xC8,r0,r1 + st.b r1,lo(V850_REG_ASIM0)[r6] + + movea 0x47,r0,r1 + st.b r1,lo(V850_REG_STIC0)[r6] + + mov 0x07,r1 + st.b r1,lo(V850_REG_MM)[r6] + + // Setting the PCC register is tricky + stsr PSW,r7 + ori CYGARC_PSW_NP,r7,r8 + ldsr r8,PSW + mov 0x00,r1 + st.b r1,lo(V850_REG_PRCMD)[r6] + st.b r1,lo(V850_REG_PCC)[r6] + ldsr r7,PSW + nop + nop + nop + nop + nop +#endif + .endm + +/*---------------------------------------------------------------------------*/ +/* end of hal_platform_setup.h */ +#endif /* CYGONCE_HAL_PLATFORM_SETUP_H */
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/ceb_v850/current/include/pkgconf/mlt_v85x_v850_ceb_ram.h @@ -0,0 +1,13 @@ +// eCos memory layout - Fri Mar 17 13:07:05 2000 + +// This is a generated file - do not edit + +#include <cyg/infra/cyg_type.h> +#include <stddef.h> + +#define CYGMEM_REGION_ram (0xfc0000) +#define CYGMEM_REGION_ram_SIZE (0x40000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) +extern char CYG_LABEL_NAME (_reserved) []; +#define CYGMEM_SECTION_reserved (CYG_LABEL_NAME (_reserved)) +#define CYGMEM_SECTION_reserved_SIZE (0x4000)
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/ceb_v850/current/include/pkgconf/mlt_v85x_v850_ceb_ram.ldi @@ -0,0 +1,23 @@ +// eCos memory layout - Fri Mar 17 13:07:05 2000 + +// This is a generated file - do not edit + +MEMORY +{ + ram : ORIGIN = 0xfc0000, LENGTH = 0x40000 +} + +SECTIONS +{ + SECTIONS_BEGIN + __reserved = 0xfc0000; . = __reserved + 0x4000; + SECTION_text (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fini (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_rodata (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_rodata1 (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fixup (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_gcc_except_table (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_data (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTIONS_END +}
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/ceb_v850/current/include/pkgconf/mlt_v85x_v850_ceb_ram.mlt @@ -0,0 +1,11 @@ +version 0 +region ram fc0000 40000 0 ! +section reserved 4000 1 0 0 1 1 1 1 fc0000 fc0000 text text ! +section text 0 4 0 1 0 1 0 1 fini fini ! +section fini 0 4 0 1 0 1 0 1 rodata rodata ! +section rodata 0 4 0 1 0 1 0 1 rodata1 rodata1 ! +section rodata1 0 4 0 1 0 1 0 1 fixup fixup ! +section fixup 0 4 0 1 0 1 0 1 gcc_except_table gcc_except_table ! +section gcc_except_table 0 4 0 1 0 1 0 1 data data ! +section data 0 4 0 1 0 1 0 1 bss bss ! +section bss 0 4 0 1 0 0 0 0 !
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/ceb_v850/current/include/pkgconf/mlt_v85x_v850_ceb_rom.h @@ -0,0 +1,13 @@ +// eCos memory layout - Tue Mar 21 04:31:59 2000 + +// This is a generated file - do not edit + +#include <cyg/infra/cyg_type.h> +#include <stddef.h> + +#define CYGMEM_REGION_rom (0x100000) +#define CYGMEM_REGION_rom_SIZE (0x80000) +#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R) +#define CYGMEM_REGION_ram (0xfc0000) +#define CYGMEM_REGION_ram_SIZE (0x40000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/ceb_v850/current/include/pkgconf/mlt_v85x_v850_ceb_rom.ldi @@ -0,0 +1,24 @@ +// eCos memory layout - Tue Mar 21 04:31:59 2000 + +// This is a generated file - do not edit + +MEMORY +{ + rom : ORIGIN = 0x100000, LENGTH = 0x80000 + ram : ORIGIN = 0xfc0000, LENGTH = 0x40000 +} + +SECTIONS +{ + SECTIONS_BEGIN + SECTION_rom_vectors (rom, 0x100000, LMA_EQ_VMA) + SECTION_text (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fini (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_rodata (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_rodata1 (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fixup (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_gcc_except_table (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_data (ram, 0xfc0000, FOLLOWING (.gcc_except_table)) + SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTIONS_END +}
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/ceb_v850/current/include/pkgconf/mlt_v85x_v850_ceb_rom.mlt @@ -0,0 +1,12 @@ +version 0 +region rom 100000 80000 1 ! +region ram fc0000 40000 0 ! +section rom_vectors 0 1 0 1 1 1 1 1 100000 100000 text text ! +section text 0 4 0 1 0 1 0 1 fini fini ! +section fini 0 4 0 1 0 1 0 1 rodata rodata ! +section rodata 0 4 0 1 0 1 0 1 rodata1 rodata1 ! +section rodata1 0 4 0 1 0 1 0 1 fixup fixup ! +section fixup 0 4 0 1 0 1 0 1 gcc_except_table gcc_except_table ! +section gcc_except_table 0 4 0 1 0 0 0 1 data ! +section data 0 4 1 1 1 1 0 0 fc0000 bss ! +section bss 0 4 0 1 0 0 0 0 !
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/ceb_v850/current/include/plf_cache.h @@ -0,0 +1,71 @@ +#ifndef CYGONCE_PLF_CACHE_H +#define CYGONCE_PLF_CACHE_H + +//============================================================================= +// +// plf_cache.h +// +// HAL cache control API +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg +// Contributors: nickg +// Date: 1998-02-17 +// Purpose: Cache control API +// Description: The macros defined here provide the HAL APIs for handling +// cache control operations. +// Usage: +// #include <cyg/hal/plf_cache.h> +// ... +// +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include <pkgconf/hal.h> +#include <cyg/infra/cyg_type.h> + +//============================================================================= + +// No caches defined on this platform +#define HAL_ICACHE_ENABLE() +#define HAL_ICACHE_DISABLE() +#define HAL_ICACHE_SYNC() +#define HAL_ICACHE_INVALIDATE_ALL() + +#define HAL_DCACHE_ENABLE() +#define HAL_DCACHE_DISABLE() +#define HAL_DCACHE_SYNC() +#define HAL_DCACHE_INVALIDATE_ALL() + +//----------------------------------------------------------------------------- +#endif // ifndef CYGONCE_PLF_CACHE_H +// End of plf_cache.h +
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/ceb_v850/current/include/plf_intr.h @@ -0,0 +1,153 @@ +#ifndef CYGONCE_HAL_PLF_INTR_H +#define CYGONCE_HAL_PLF_INTR_H + +//========================================================================== +// +// plf_intr.h +// +// NEC/V85x Interrupt and clock support +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg +// Contributors: nickg, jskov, +// gthomas, jlarmour +// Date: 1999-02-16 +// Purpose: Define Interrupt support +// Description: The macros defined here provide the HAL APIs for handling +// interrupts and the clock for the VRC4373 board. +// +// Usage: +// #include <cyg/hal/plf_intr.h> +// ... +// +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include <pkgconf/hal.h> + +#include <cyg/infra/cyg_type.h> + +//-------------------------------------------------------------------------- +// NEC (70F3017) vectors. + +// These are the exception codes presented in the Cause register and +// correspond to VSRs. These values are the ones to use for HAL_VSR_GET/SET + +#define CYGNUM_HAL_VECTOR_RESET 0x00 +#define CYGNUM_HAL_VECTOR_NMI 0x01 +#define CYGNUM_HAL_VECTOR_WATCHDOG_TIMER 0x02 +#define CYGNUM_HAL_VECTOR_TRAP0 0x04 +#define CYGNUM_HAL_VECTOR_TRAP1 0x05 +#define CYGNUM_HAL_VECTOR_ILLEGAL_OPCODE 0x06 +#define CYGNUM_HAL_VECTOR_WATCHDOG_TIMER_M 0x08 +#define CYGNUM_HAL_VECTOR_INTP0 0x09 +#define CYGNUM_HAL_VECTOR_INTP1 0x0A +#define CYGNUM_HAL_VECTOR_INTP2 0x0B +#define CYGNUM_HAL_VECTOR_INTP3 0x0C +#define CYGNUM_HAL_VECTOR_INTP4 0x0D +#define CYGNUM_HAL_VECTOR_INTP5 0x0E +#define CYGNUM_HAL_VECTOR_INTP6 0x0F +#define CYGNUM_HAL_VECTOR_INTWTI 0x10 +#define CYGNUM_HAL_VECTOR_INTTM00 0x11 +#define CYGNUM_HAL_VECTOR_INTTM01 0x12 +#define CYGNUM_HAL_VECTOR_INTTM10 0x13 +#define CYGNUM_HAL_VECTOR_INTTM11 0x14 +#define CYGNUM_HAL_VECTOR_INTTM2 0x15 +#define CYGNUM_HAL_VECTOR_INTTM3 0x16 +#define CYGNUM_HAL_VECTOR_INTTM4 0x17 +#define CYGNUM_HAL_VECTOR_INTTM5 0x18 +#define CYGNUM_HAL_VECTOR_INTCSI0 0x19 +#define CYGNUM_HAL_VECTOR_INTSER0 0x1A +#define CYGNUM_HAL_VECTOR_INTCSI1 0x1B +#define CYGNUM_HAL_VECTOR_INTST0 0x1C +#define CYGNUM_HAL_VECTOR_INTCSI2 0x1D +#define CYGNUM_HAL_VECTOR_INTSER1 0x1E +#define CYGNUM_HAL_VECTOR_INTSR1 0x1F +#define CYGNUM_HAL_VECTOR_INTST1 0x20 +#define CYGNUM_HAL_VECTOR_INTAD 0x21 +#define CYGNUM_HAL_VECTOR_INTDMA0 0x22 +#define CYGNUM_HAL_VECTOR_INTDMA1 0x23 +#define CYGNUM_HAL_VECTOR_INTDMA2 0x24 +#define CYGNUM_HAL_VECTOR_INTWT 0x25 + +#define CYGNUM_HAL_VSR_MIN 0 +#define CYGNUM_HAL_VSR_MAX 0x25 +#define CYGNUM_HAL_VSR_COUNT 0x26 + +// Min/Max exception numbers and how many there are +#define CYGNUM_HAL_EXCEPTION_MIN 0 +#define CYGNUM_HAL_EXCEPTION_MAX 7 +#define CYGNUM_HAL_EXCEPTION_COUNT ((CYGNUM_HAL_EXCEPTION_MAX-CYGNUM_HAL_EXCEPTION_MIN)+1) + +// Min/Max ISR numbers and how many there are +#define CYGNUM_HAL_ISR_MIN 0x08 +#define CYGNUM_HAL_ISR_MAX 0x25 +#define CYGNUM_HAL_ISR_COUNT ((CYGNUM_HAL_ISR_MAX-CYGNUM_HAL_ISR_MIN)+1) + +// The vector used by the Real time clock. +#define CYGNUM_HAL_INTERRUPT_RTC CYGNUM_HAL_VECTOR_INTTM10 + +// Mapping from interrupt numbers to hardware registers +#define CYG_HAL_V85X_INTERRUPT_CONTROL_REGISTERS \ + (volatile unsigned char *)V850_REG_WDTIC, \ + (volatile unsigned char *)V850_REG_PIC0, \ + (volatile unsigned char *)V850_REG_PIC1, \ + (volatile unsigned char *)V850_REG_PIC2, \ + (volatile unsigned char *)V850_REG_PIC3, \ + (volatile unsigned char *)V850_REG_PIC4, \ + (volatile unsigned char *)V850_REG_PIC5, \ + (volatile unsigned char *)V850_REG_PIC6, \ + (volatile unsigned char *)V850_REG_WTIIC, \ + (volatile unsigned char *)V850_REG_TMIC00, \ + (volatile unsigned char *)V850_REG_TMIC01, \ + (volatile unsigned char *)V850_REG_TMIC10, \ + (volatile unsigned char *)V850_REG_TMIC11, \ + (volatile unsigned char *)V850_REG_TMIC2, \ + (volatile unsigned char *)V850_REG_TMIC3, \ + (volatile unsigned char *)V850_REG_TMIC4, \ + (volatile unsigned char *)V850_REG_TMIC5, \ + (volatile unsigned char *)V850_REG_CSIC0, \ + (volatile unsigned char *)V850_REG_SERIC0, \ + (volatile unsigned char *)V850_REG_SRIC0, \ + (volatile unsigned char *)V850_REG_STIC0, \ + (volatile unsigned char *)V850_REG_CSIC2, \ + (volatile unsigned char *)V850_REG_SERIC1, \ + (volatile unsigned char *)V850_REG_SRIC1, \ + (volatile unsigned char *)V850_REG_STIC1, \ + (volatile unsigned char *)V850_REG_ADIC, \ + (volatile unsigned char *)V850_REG_DMAIC0, \ + (volatile unsigned char *)V850_REG_DMAIC1, \ + (volatile unsigned char *)V850_REG_DMAIC2, \ + (volatile unsigned char *)V850_REG_WTIC + +//-------------------------------------------------------------------------- +#endif // ifndef CYGONCE_HAL_PLF_INTR_H +// End of plf_intr.h
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/ceb_v850/current/include/plf_io.h @@ -0,0 +1,211 @@ +#ifndef CYGONCE_PLF_IO_H +#define CYGONCE_PLF_IO_H + +//============================================================================= +// +// plf_io.h +// +// Platform specific IO support +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): hmt, jskov, nickg +// Contributors: hmt, jskov, nickg +// Date: 1999-08-09 +// Purpose: VRC4373 PCI IO support macros +// Description: +// Usage: #include <cyg/hal/plf_io.h> +// +// Note: Based on information in +// "VRC4373 System Controller Data Sheet" +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include <pkgconf/hal.h> + +#include <cyg/hal/hal_io.h> // IO macros +#include <cyg/hal/hal_intr.h> // Interrupt vectors + +//----------------------------------------------------------------------------- +// PCI access registers + +#define HAL_PCI_ADDRESS_WINDOW_1 0xAF000014 +#define HAL_PCI_ADDRESS_WINDOW_2 0xAF000018 +#define HAL_PCI_IO_WINDOW 0xAF000024 +#define HAL_PCI_CONFIG_SPACE_DATA 0xAF000028 +#define HAL_PCI_CONFIG_SPACE_ADDR 0xAF00002C +#define HAL_PCI_ENABLE_REG 0xAF000074 + +//----------------------------------------------------------------------------- +// Mappings for PCI memory and IO spaces + +// This is where the PCI spaces are mapped in the CPU's (virtual) +// address space. +#define HAL_PCI_PHYSICAL_MEMORY_BASE 0xC0000000 +#define HAL_PCI_PHYSICAL_IO_BASE 0xAC000000 + +//----------------------------------------------------------------------------- + +// Initialize the PCI bus. +// This has actually already been done by the HAL. +#define HAL_PCI_INIT() + +// Compute address necessary to access PCI config space for the given +// bus and device. +#define HAL_PCI_CONFIG_ADDRESS( __bus, __devfn, __offset ) \ + ({ \ + cyg_uint32 __addr; \ + cyg_uint32 __dev = CYG_PCI_DEV_GET_DEV(__devfn); \ + if (0 == __bus) { \ + __addr = (1 << (__dev+16)); \ + } else { \ + /* We need better info about how to form type 1 addresses */ \ + __addr = 0x800000000 | (__bus << 16) | (__dev << 11); \ + } \ + __addr |= CYG_PCI_DEV_GET_FN(__devfn) << 8; \ + __addr |= (__offset)&~3; \ + __addr; \ + }) + +// The following function allows us to read locations in the PCI config +// space that we are not sure contains a valid device. Support in platform.S +// catches and fixes any bus errors caused. +externC CYG_WORD32 hal_pci_config_read(CYG_ADDRESS addr); +#define HAL_PCI_CONFIG_READ( __addr, __val ) __val = hal_pci_config_read(__addr) + +// Read a value from the PCI configuration space of the appropriate +// size at an address composed from the bus, devfn and offset. +// We can only make 32 bit accesses to the PCI config data register, hence +// all the shifing and masking in these macros. +// Note that we may only use HAL_PCI_CONFIG_READ() here. +#define HAL_PCI_CFG_READ_UINT8( __bus, __devfn, __offset, __val ) \ +CYG_MACRO_START \ + CYG_WORD32 _val_; \ + CYG_WORD32 _offset_ = __offset & 3; \ + HAL_WRITE_UINT32(HAL_PCI_CONFIG_SPACE_ADDR, \ + HAL_PCI_CONFIG_ADDRESS(__bus, __devfn, __offset)); \ + HAL_PCI_CONFIG_READ(HAL_PCI_CONFIG_SPACE_DATA, _val_); \ + __val = (CYG_BYTE)((_val_>>(_offset_*8))&0xFF); \ +CYG_MACRO_END + +#define HAL_PCI_CFG_READ_UINT16( __bus, __devfn, __offset, __val ) \ +CYG_MACRO_START \ + CYG_WORD32 _val_; \ + CYG_WORD32 _offset_ = __offset & 2; \ + HAL_WRITE_UINT32(HAL_PCI_CONFIG_SPACE_ADDR, \ + HAL_PCI_CONFIG_ADDRESS(__bus, __devfn, __offset)); \ + HAL_PCI_CONFIG_READ(HAL_PCI_CONFIG_SPACE_DATA, _val_); \ + __val = (CYG_WORD16)((_val_>>(_offset_*8))&0xFFFF); \ +CYG_MACRO_END + +#define HAL_PCI_CFG_READ_UINT32( __bus, __devfn, __offset, __val ) \ +CYG_MACRO_START \ + CYG_WORD32 _val_; \ + HAL_WRITE_UINT32(HAL_PCI_CONFIG_SPACE_ADDR, \ + HAL_PCI_CONFIG_ADDRESS(__bus, __devfn, __offset)); \ + HAL_PCI_CONFIG_READ(HAL_PCI_CONFIG_SPACE_DATA, _val_); \ + __val = (CYG_WORD32)_val_; \ +CYG_MACRO_END + +// Write a value to the PCI configuration space of the appropriate +// size at an address composed from the bus, devfn and offset. +// We can only make 32 bit accesses to the PCI config data register, hence +// all the shifing and masking in these macros. +// Note that we do not need to use HAL_PCI_CONFIG_READ() here since we +// should not be writing to config space locations that we do not already +// know are valid. +#define HAL_PCI_CFG_WRITE_UINT8( __bus, __devfn, __offset, __val ) \ +CYG_MACRO_START \ + CYG_WORD32 _val_; \ + CYG_WORD32 _offset_ = __offset & 3; \ + HAL_WRITE_UINT32(HAL_PCI_CONFIG_SPACE_ADDR, \ + HAL_PCI_CONFIG_ADDRESS(__bus, __devfn, __offset)); \ + HAL_READ_UINT32(HAL_PCI_CONFIG_SPACE_DATA, _val_); \ + _val_ &= ~(0xFF<<(_offset_*8)); \ + _val_ |= (__val)<<(_offset_*8); \ + HAL_WRITE_UINT32(HAL_PCI_CONFIG_SPACE_DATA, _val_); \ +CYG_MACRO_END + +#define HAL_PCI_CFG_WRITE_UINT16( __bus, __devfn, __offset, __val ) \ +CYG_MACRO_START \ + CYG_WORD32 _val_; \ + CYG_WORD32 _offset_ = __offset & 2; \ + HAL_WRITE_UINT32(HAL_PCI_CONFIG_SPACE_ADDR, \ + HAL_PCI_CONFIG_ADDRESS(__bus, __devfn, __offset)); \ + HAL_READ_UINT32(HAL_PCI_CONFIG_SPACE_DATA, _val_); \ + _val_ &= ~(0xFFFF<<(_offset_*8)); \ + _val_ |= (__val)<<(_offset_*8); \ + HAL_WRITE_UINT32(HAL_PCI_CONFIG_SPACE_DATA, _val_); \ +CYG_MACRO_END + +#define HAL_PCI_CFG_WRITE_UINT32( __bus, __devfn, __offset, __val ) \ +CYG_MACRO_START \ + HAL_WRITE_UINT32(HAL_PCI_CONFIG_SPACE_ADDR, \ + HAL_PCI_CONFIG_ADDRESS(__bus, __devfn, __offset)); \ + HAL_WRITE_UINT32(HAL_PCI_CONFIG_SPACE_DATA, __val); \ +CYG_MACRO_END + + +//----------------------------------------------------------------------------- +// Resources + +// Map PCI device resources starting from these addresses in PCI space. +#define HAL_PCI_ALLOC_BASE_MEMORY 0 +#define HAL_PCI_ALLOC_BASE_IO 0 + +// Translate the PCI interrupt requested by the device (INTA#, INTB#, +// INTC# or INTD#) to the associated CPU interrupt (i.e., HAL vector). +// We don't actually know what the mappings are at present for this +// board. The following is therefore just a temporary guess until +// we can find out. + +#define HAL_PCI_TRANSLATE_INTERRUPT( __bus, __devfn, __vec, __valid) \ + CYG_MACRO_START \ + cyg_uint8 __req; \ + HAL_PCI_CFG_READ_UINT8(__bus, __devfn, CYG_PCI_CFG_INT_PIN, __req); \ + if (0 != __req) { \ + CYG_ADDRWORD __translation[4] = { \ + CYGNUM_HAL_INTERRUPT_PCI_INTA, /* INTA# */ \ + CYGNUM_HAL_INTERRUPT_PCI_INTB, /* INTB# */ \ + CYGNUM_HAL_INTERRUPT_PCI_INTC, /* INTC# */ \ + CYGNUM_HAL_INTERRUPT_PCI_INTD };/* INTD# */ \ + \ + __vec = __translation[(((__req-1)+CYG_PCI_DEV_GET_DEV(__devfn))&3)]; \ + \ + __valid = true; \ + } else { \ + /* Device will not generate interrupt requests. */ \ + __valid = false; \ + } \ + CYG_MACRO_END + + +//----------------------------------------------------------------------------- +// end of plf_io.h +#endif // CYGONCE_PLF_IO_H
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/ceb_v850/current/include/plf_sections.h @@ -0,0 +1,45 @@ +//========================================================================== +// +// plf_sections.h +// +// V85x layout definitions - hardwired sections +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 2000-05-24 +// Purpose: Hardwired layout definitions +// Description: Used only in linker scripts +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#define SECTIONS_END . = ALIGN(4); _end = .; PROVIDE (end = .); \ + PROVIDE(_hal_vsr_table = 0x00FC0260);
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/ceb_v850/current/include/plf_stub.h @@ -0,0 +1,85 @@ +#ifndef CYGONCE_HAL_PLF_STUB_H +#define CYGONCE_HAL_PLF_STUB_H + +//============================================================================= +// +// plf_stub.h +// +// Platform header for GDB stub support. +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jskov +// Contributors:jskov, gthomas +// Date: 2000-03-10 +// Purpose: Platform HAL stub support for NEC/CEB-V850 +// Usage: #include <cyg/hal/plf_stub.h> +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include <pkgconf/hal.h> + +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + +#include <cyg/infra/cyg_type.h> // CYG_UNUSED_PARAM + +#include <cyg/hal/nec-stub.h> // architecture stub support + +//---------------------------------------------------------------------------- +// Define serial stuff. +extern void hal_plf_init_serial( void ); +extern int hal_plf_get_char( void ); +extern void hal_plf_put_char( int c ); +extern int hal_plf_interruptible( int ); + +#define HAL_STUB_PLATFORM_INIT_SERIAL() hal_plf_init_serial() +#define HAL_STUB_PLATFORM_GET_CHAR() hal_plf_get_char() +#define HAL_STUB_PLATFORM_PUT_CHAR(c) hal_plf_put_char((c)) +#define HAL_STUB_PLATFORM_SET_BAUD_RATE(baud) CYG_UNUSED_PARAM(int, (baud)) +#define HAL_STUB_PLATFORM_INTERRUPTIBLE hal_plf_interruptible +#define HAL_STUB_PLATFORM_INIT_BREAK_IRQ() CYG_EMPTY_STATEMENT + +//---------------------------------------------------------------------------- +// Stub initializer. + +extern void hal_plf_stub_init(void); + +#define HAL_STUB_PLATFORM_INIT() hal_plf_stub_init(); + +//---------------------------------------------------------------------------- +// Reset. + +#define HAL_STUB_PLATFORM_RESET() hal_plf_reset_board() + +#endif // ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + +//----------------------------------------------------------------------------- +#endif // CYGONCE_HAL_PLF_STUB_H +// End of plf_stub.h
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/ceb_v850/current/include/v850_regs.h @@ -0,0 +1,247 @@ +#ifndef CYGONCE_V850_REGS_H +#define CYGONCE_V850_REGS_H + +/*============================================================================= +// +// v850_regs.h +// +// NEC/V850 platform register definitions +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 2000-03-10 +// Purpose: NEC/V850 CPU family hardware description +// Description: +// Usage: #include <cyg/hal/v850_regs.h> +// +//####DESCRIPTIONEND#### +// +//===========================================================================*/ + +// These definitions are for the SA1 (70F3017) + +#define V850_REGS 0xFFFFF000 + +#define V850_REG_P0 0xFFFFF000 +#define V850_REG_P1 0xFFFFF002 +#define V850_REG_P2 0xFFFFF004 +#define V850_REG_P3 0xFFFFF006 +#define V850_REG_P4 0xFFFFF008 +#define V850_REG_P5 0xFFFFF00A +#define V850_REG_P6 0xFFFFF00C +#define V850_REG_P7 0xFFFFF00E +#define V850_REG_P8 0xFFFFF010 +#define V850_REG_P9 0xFFFFF012 +#define V850_REG_P10 0xFFFFF014 +#define V850_REG_P11 0xFFFFF016 +#define V850_REG_P12 0xFFFFF018 + +#define V850_REG_PM0 0xFFFFF020 +#define V850_REG_PM1 0xFFFFF022 +#define V850_REG_PM2 0xFFFFF024 +#define V850_REG_PM3 0xFFFFF026 +#define V850_REG_PM4 0xFFFFF028 +#define V850_REG_PM5 0xFFFFF02A +#define V850_REG_PM6 0xFFFFF02C +#define V850_REG_PM7 0xFFFFF02E +#define V850_REG_PM8 0xFFFFF030 +#define V850_REG_PM9 0xFFFFF032 +#define V850_REG_PM10 0xFFFFF034 +#define V850_REG_PM11 0xFFFFF036 +#define V850_REG_PM12 0xFFFFF038 + +#define V850_REG_MM 0xFFFFF04C + +#define V850_REG_PMC12 0xFFFFF058 + +#define V850_REG_DWC 0xFFFFF060 +#define V850_REG_BCC 0xFFFFF062 +#define V850_REG_SYC 0xFFFFF064 +#define V850_REG_MAM 0xFFFFF068 + +#define V850_REG_PSC 0xFFFFF070 +#define V850_REG_PCC 0xFFFFF074 +#define V850_REG_SYS 0xFFFFF078 + +#define V850_REG_PU0 0xFFFFF080 +#define V850_REG_PU1 0xFFFFF082 +#define V850_REG_PU2 0xFFFFF084 +#define V850_REG_PU3 0xFFFFF086 +#define V850_REG_PU10 0xFFFFF094 +#define V850_REG_PU11 0xFFFFF096 + +#define V850_REG_PF1 0xFFFFF0A2 +#define V850_REG_PF2 0xFFFFF0A4 +#define V850_REG_PF10 0xFFFFF0B4 + +#define V850_REG_EGP0 0xFFFFF0C0 +#define V850_REG_EGN0 0xFFFFF0C2 + +#define V850_REG_WDTIC 0xFFFFF100 +#define V850_REG_PIC0 0xFFFFF102 +#define V850_REG_PIC1 0xFFFFF104 +#define V850_REG_PIC2 0xFFFFF106 +#define V850_REG_PIC3 0xFFFFF108 +#define V850_REG_PIC4 0xFFFFF10A +#define V850_REG_PIC5 0xFFFFF10C +#define V850_REG_PIC6 0xFFFFF10E +#define V850_REG_WTIIC 0xFFFFF110 +#define V850_REG_TMIC00 0xFFFFF112 +#define V850_REG_TMIC01 0xFFFFF114 +#define V850_REG_TMIC10 0xFFFFF116 +#define V850_REG_TMIC11 0xFFFFF118 +#define V850_REG_TMIC2 0xFFFFF11A +#define V850_REG_TMIC3 0xFFFFF11C +#define V850_REG_TMIC4 0xFFFFF11E +#define V850_REG_TMIC5 0xFFFFF120 +#define V850_REG_CSIC0 0xFFFFF122 +#define V850_REG_SERIC0 0xFFFFF124 +#define V850_REG_CSIC1 0xFFFFF126 // Is this correct? +#define V850_REG_SRIC0 0xFFFFF126 +#define V850_REG_STIC0 0xFFFFF128 +#define V850_REG_CSIC2 0xFFFFF12A +#define V850_REG_SERIC1 0xFFFFF12C +#define V850_REG_SRIC1 0xFFFFF12E +#define V850_REG_STIC1 0xFFFFF130 +#define V850_REG_ADIC 0xFFFFF132 +#define V850_REG_DMAIC0 0xFFFFF134 +#define V850_REG_DMAIC1 0xFFFFF136 +#define V850_REG_DMAIC2 0xFFFFF138 +#define V850_REG_WTIC 0xFFFFF13A + +#define V850_REG_ISPR 0xFFFFF166 +#define V850_REG_PRCMD 0xFFFFF170 + +#define V850_REG_DIOA0 0xFFFFF180 +#define V850_REG_DRA0 0xFFFFF182 +#define V850_REG_DBC0 0xFFFFF184 +#define V850_REG_DCHC0 0xFFFFF186 + +#define V850_REG_DIOA1 0xFFFFF190 +#define V850_REG_DRA1 0xFFFFF192 +#define V850_REG_DBC1 0xFFFFF194 +#define V850_REG_DCHC1 0xFFFFF196 + +#define V850_REG_DIOA2 0xFFFFF1A0 +#define V850_REG_DRA2 0xFFFFF1A2 +#define V850_REG_DBC2 0xFFFFF1A4 +#define V850_REG_DCHC2 0xFFFFF1A6 + +#define V850_REG_TM0 0xFFFFF200 +#define V850_REG_CR00 0xFFFFF202 +#define V850_REG_CR01 0xFFFFF204 +#define V850_REG_PRM0 0xFFFFF206 +#define V850_REG_TMC0 0xFFFFF208 +#define V850_REG_CRC0 0xFFFFF20A +#define V850_REG_TOC0 0xFFFFF20C + +#define V850_REG_TM1 0xFFFFF210 +#define V850_REG_CR10 0xFFFFF212 +#define V850_REG_CR11 0xFFFFF214 +#define V850_REG_PRM1 0xFFFFF216 +#define V850_REG_TMC1 0xFFFFF218 +#define V850_REG_CRC1 0xFFFFF21A +#define V850_REG_TOC1 0xFFFFF21C + +#define V850_REG_TM2 0xFFFFF240 +#define V850_REG_CR20 0xFFFFF242 +#define V850_REG_TCL2 0xFFFFF244 +#define V850_REG_TMC2 0xFFFFF246 +#define V850_REG_TM23 0xFFFFF24A +#define V850_REG_CR23 0xFFFFF24C + +#define V850_REG_TM3 0xFFFFF250 +#define V850_REG_CR30 0xFFFFF252 +#define V850_REG_TCL3 0xFFFFF254 +#define V850_REG_TMC3 0xFFFFF256 + +#define V850_REG_TM4 0xFFFFF260 +#define V850_REG_CR40 0xFFFFF262 +#define V850_REG_TCL4 0xFFFFF264 +#define V850_REG_TMC4 0xFFFFF266 +#define V850_REG_TM45 0xFFFFF26A +#define V850_REG_CR45 0xFFFFF26C + +#define V850_REG_TM5 0xFFFFF270 +#define V850_REG_CR50 0xFFFFF272 +#define V850_REG_TCL5 0xFFFFF274 +#define V850_REG_TMC5 0xFFFFF276 + +#define V850_REG_SIO0 0xFFFFF2A0 +#define V850_REG_CSIM0 0xFFFFF2A2 +#define V850_REG_CSIS0 0xFFFFF2A4 + +#define V850_REG_SIO1 0xFFFFF2B0 +#define V850_REG_CSIM1 0xFFFFF2B2 +#define V850_REG_CSIS1 0xFFFFF2B4 + +#define V850_REG_SIO2 0xFFFFF2C0 +#define V850_REG_CSIM2 0xFFFFF2C2 +#define V850_REG_CSIS2 0xFFFFF2C4 + +#define V850_REG_ASIM0 0xFFFFF300 +#define V850_REG_ASIS0 0xFFFFF302 +#define V850_REG_BRGC0 0xFFFFF304 +#define V850_REG_TXS0 0xFFFFF306 +#define V850_REG_RXS0 0xFFFFF308 +#define V850_REG_BRGM0 0xFFFFF30E +#define V850_REG_BRGX0 0xFFFFF320 + +#define V850_REG_ASIM1 0xFFFFF310 +#define V850_REG_ASIS1 0xFFFFF312 +#define V850_REG_BRGC1 0xFFFFF314 +#define V850_REG_TXS1 0xFFFFF316 +#define V850_REG_RXS1 0xFFFFF318 +#define V850_REG_BRGM1 0xFFFFF31E + +#define V850_REG_IICC0 0xFFFFF340 +#define V850_REG_IICS0 0xFFFFF342 +#define V850_REG_IICCL0 0xFFFFF344 +#define V850_REG_SVA0 0xFFFFF346 +#define V850_REG_IIC0 0xFFFFF348 + +#define V850_REG_WTM 0xFFFFF360 +#define V850_REG_OSTS 0xFFFFF380 +#define V850_REG_WDCS 0xFFFFF382 +#define V850_REG_WDTM 0xFFFFF384 + +#define V850_REG_RTBL 0xFFFFF3A0 +#define V850_REG_RTBH 0xFFFFF3A2 +#define V850_REG_RTPM 0xFFFFF3A4 +#define V850_REG_RTPC 0xFFFFF3A6 + +#define V850_REG_ADM 0xFFFFF3C0 +#define V850_REG_ADS 0xFFFFF3C2 +#define V850_REG_ADCR 0xFFFFF3C4 +#define V850_REG_ADCRH 0xFFFFF3C6 + +/*---------------------------------------------------------------------------*/ +/* end of v850_regs.h */ +#endif /* CYGONCE_V850_REGS_H */
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/ceb_v850/current/src/hal_diag.c @@ -0,0 +1,320 @@ +/*============================================================================= +// +// hal_diag.c +// +// HAL diagnostic output code +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg, gthomas +// Contributors:nickg, gthomas +// Date: 1998-03-02 +// Purpose: HAL diagnostic output +// Description: Implementations of HAL diagnostic output support. +// +//####DESCRIPTIONEND#### +// +//===========================================================================*/ + +#include <pkgconf/hal.h> +#include <pkgconf/system.h> +#include CYGBLD_HAL_PLATFORM_H + +#include <cyg/infra/cyg_type.h> // base types +#include <cyg/infra/cyg_trac.h> // tracing macros +#include <cyg/infra/cyg_ass.h> // assertion macros + +#include <cyg/hal/hal_arch.h> // basic machine info +#include <cyg/hal/hal_intr.h> // interrupt macros +#include <cyg/hal/hal_io.h> // IO macros +#include <cyg/hal/hal_diag.h> +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS +#include <cyg/hal/drv_api.h> +#include <cyg/hal/hal_stub.h> // cyg_hal_gdb_interrupt +#define CYG_DEVICE_SERIAL_INT CYGNUM_HAL_VECTOR_INTCSI1 +#endif + +#include <cyg/hal/v850_common.h> // hardware registers, etc. + +// Assumption: all diagnostic output must be GDB packetized unless this is a ROM (i.e. +// totally stand-alone) system. + +#ifdef CYGSEM_HAL_ROM_MONITOR +#define CYG_HAL_STARTUP_ROM +#undef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS +#endif + +#if defined(CYG_HAL_STARTUP_ROM) && !defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS) +#define HAL_DIAG_USES_HARDWARE +#else +#if defined(CYGDBG_HAL_DIAG_DISABLE_GDB_PROTOCOL) +#define HAL_DIAG_USES_HARDWARE +#endif +#endif + +#if (CYGHWR_HAL_V85X_V850_CEB_DIAG_BAUD == 9600) +#define BAUD_COUNT 0xDD +#define BAUD_DIVISOR 3 +#endif +#if (CYGHWR_HAL_V85X_V850_CEB_DIAG_BAUD == 19200) +#define BAUD_COUNT 0xDD +#define BAUD_DIVISOR 2 +#endif +#if (CYGHWR_HAL_V85X_V850_CEB_DIAG_BAUD == 38400) +#define BAUD_COUNT 0xDD +#define BAUD_DIVISOR 1 +#endif +#ifndef BAUD_COUNT +#error Unsupported BAUD rate +#endif + +/*---------------------------------------------------------------------------*/ +// CEB-v850 + +void +FAIL(char *m) +{ + static char *fail_reason; + fail_reason = m; +#if 0 + while (1) { + show_led('~'); + show_hex4(m); + show_led('/'); + } +#else + diag_printf("FAIL: %s\n", m); +#endif +} + +void +ALERT(char *m) +{ + static char *alert_reason; + alert_reason = m; +#if 0 + show_led('~'); + show_led('~'); + show_hex4(m); + show_led('/'); +#else + diag_printf("ALERT: %s\n", m); +#endif +} + +// Actually send character down the wire +void +hal_diag_write_char_serial(char c) +{ + volatile unsigned char *TxDATA = (volatile unsigned char *)V850_REG_TXS0; + volatile unsigned char *TxSTAT = (volatile unsigned char *)V850_REG_STIC0; + // Send character + *TxDATA = (unsigned char)c; + // Wait for Tx not busy + while ((*TxSTAT & 0x80) == 0x00) ; + *TxSTAT &= ~0x80; +} + +bool +hal_diag_read_serial(char *c) +{ + volatile unsigned char *RxDATA = (volatile unsigned char *)V850_REG_RXS0; + volatile unsigned char *RxSTAT = (volatile unsigned char *)V850_REG_SRIC0; + volatile unsigned char *RxERR = (volatile unsigned char *)V850_REG_SERIC0; + int timeout = 0; + while ((*RxSTAT & 0x80) == 0x00) { + if (++timeout == 50000) return false; + } + *c = (char)*RxDATA; + *RxSTAT &= ~0x80; + return true; +} + +#ifdef HAL_DIAG_USES_HARDWARE + +void hal_diag_init(void) +{ + static int init = 0; + volatile unsigned char *mode = (volatile unsigned char *)V850_REG_ASIM0; + volatile unsigned char *brgc = (volatile unsigned char *)V850_REG_BRGC0; + volatile unsigned char *brgm = (volatile unsigned char *)V850_REG_BRGM0; + volatile unsigned char *rxstat = (volatile unsigned char *)V850_REG_SRIC0; + volatile unsigned char *rxerr = (volatile unsigned char *)V850_REG_SERIC0; + volatile unsigned char *txstat = (volatile unsigned char *)V850_REG_STIC0; + if (init) return; + init++; + *mode = 0xC8; + *brgc = BAUD_COUNT; + *brgm = BAUD_DIVISOR; + *rxstat = 0x47; + *rxerr = 0; + *txstat = 0x47; +} + +#ifdef DEBUG_DIAG +#ifndef CYG_HAL_STARTUP_ROM +#define DIAG_BUFSIZE 2048 +static char diag_buffer[DIAG_BUFSIZE]; +static int diag_bp = 0; +#endif +#endif + +void hal_diag_write_char(char c) +{ + CYG_INTERRUPT_STATE old; + HAL_DISABLE_INTERRUPTS(old); + hal_diag_init(); +#ifdef DEBUG_DIAG +#ifndef CYG_HAL_STARTUP_ROM + diag_buffer[diag_bp++] = c; + if (diag_bp == sizeof(diag_buffer)) diag_bp = 0; +#endif +#endif + hal_diag_write_char_serial(c); + HAL_RESTORE_INTERRUPTS(old); +} + +void hal_diag_read_char(char *c) +{ + while (!hal_diag_read_serial(c)) ; +} + +#else // HAL_DIAG relies on GDB + +// Initialize diag port +void hal_diag_init(void) +{ + char *msg = "eCos 1.3.x - " __DATE__ "\n\r"; + static int init = 0; + if (init) return; + init++; + while (*msg) hal_diag_write_char(*msg++); +} + +void +hal_diag_read_char(char *c) +{ + while (!hal_diag_read_serial(c)) ; +} + +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS +static void hal_diag_write_char_break(void) +{ +} +#endif + +void +hal_diag_write_char(char c) +{ + static char line[100]; + static int pos = 0; + + // No need to send CRs + if( c == '\r' ) return; + + line[pos++] = c; + + if( c == '\n' || pos == sizeof(line) ) + { + CYG_INTERRUPT_STATE old; + + // Disable interrupts. This prevents GDB trying to interrupt us + // while we are in the middle of sending a packet. The serial + // receive interrupt will be seen when we re-enable interrupts + // later. + +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + CYG_HAL_GDB_ENTER_CRITICAL_IO_REGION(old); +#else + HAL_DISABLE_INTERRUPTS(old); +#endif + + while(1) + { + static char hex[] = "0123456789ABCDEF"; + cyg_uint8 csum = 0; + int i; + char c1; + + hal_diag_write_char_serial('$'); + hal_diag_write_char_serial('O'); + csum += 'O'; + for( i = 0; i < pos; i++ ) + { + char ch = line[i]; + char h = hex[(ch>>4)&0xF]; + char l = hex[ch&0xF]; + hal_diag_write_char_serial(h); + hal_diag_write_char_serial(l); + csum += h; + csum += l; + } + hal_diag_write_char_serial('#'); + hal_diag_write_char_serial(hex[(csum>>4)&0xF]); + hal_diag_write_char_serial(hex[csum&0xF]); + + // Wait for the ACK character '+' from GDB here and handle + // receiving a ^C instead. This is the reason for this clause + // being a loop. + if (!hal_diag_read_serial(&c1)) + continue; // No response - try sending packet again + + if( c1 == '+' ) + break; // a good acknowledge + +#if defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS) && \ + defined(CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT) + cyg_drv_interrupt_acknowledge(CYG_DEVICE_SERIAL_INT); + if( c1 == 3 ) { + // Ctrl-C: breakpoint. +#if 0 // FIXME - __builtin_return_address() doesn't work + cyg_hal_gdb_interrupt (__builtin_return_address(0)); +#else + cyg_hal_gdb_interrupt (hal_diag_write_char_break); +#endif + break; + } +#endif + // otherwise, loop round again + } + + pos = 0; + + // And re-enable interrupts +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + CYG_HAL_GDB_LEAVE_CRITICAL_IO_REGION(old); + hal_diag_write_char_break(); // FIXME +#else + HAL_RESTORE_INTERRUPTS(old); +#endif + } +} +#endif + +/*---------------------------------------------------------------------------*/ +/* End of hal_diag.c */
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/ceb_v850/current/src/plf_misc.c @@ -0,0 +1,289 @@ +//========================================================================== +// +// plf_misc.c +// +// HAL platform miscellaneous functions +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg +// Contributors: nickg, gthomas +// Date: 2000-03-10 +// Purpose: HAL miscellaneous functions +// Description: This file contains miscellaneous functions provided by the +// HAL. +// +//####DESCRIPTIONEND#### +// +//========================================================================*/ + +#include <pkgconf/hal.h> + +#include <cyg/infra/cyg_type.h> // Base types +#include <cyg/infra/cyg_trac.h> // tracing macros +#include <cyg/infra/cyg_ass.h> // assertion macros + +#include <cyg/hal/hal_arch.h> // architectural definitions + +#include <cyg/hal/hal_intr.h> // Interrupt handling +#include <cyg/hal/v850_common.h> // Hardware definitions + +extern void show_hex4(unsigned long val); +extern void show_hex1(unsigned long val); +extern void show_8bit_reg(void *addr); +extern void show_led(int p); + +void +cyg_hal_platform_hardware_init(void) +{ + int i; + show_led(' '); + show_led(' '); +} + +void +show_hex4(unsigned long val) +{ + show_hex1(val>>24); + show_hex1(val>>16); + show_hex1(val>>8); + show_hex1(val); +} + +void +show_hex1(unsigned long val) +{ + static char *hex = "0123456789ABCDEF"; + show_led(hex[(val & 0xF0) >> 4]); + show_led(hex[val & 0x0F]); +} + +void +show_8bit_reg(void *addr) +{ + unsigned char *reg = (unsigned char *)addr; + unsigned char val = *reg; + show_led(' '); + show_hex4(reg); + show_led('='); + show_hex1(val); + show_led('/'); +} + +#define SEG_0 0x00 +#define SEG_A 0x01 +#define SEG_B 0x02 +#define SEG_C 0x04 +#define SEG_D 0x08 +#define SEG_E 0x10 +#define SEG_F 0x20 +#define SEG_G 0x40 +#define SEG_H 0x80 +#define LED(a,b,c,d,e,f,g,h) SEG_##a|SEG_##b|SEG_##c|SEG_##d|SEG_##e|SEG_##f|SEG_##g|SEG_##h + +static unsigned char led_bits[] = { + LED(H,0,0,0,0,0,0,0), // 0x20 + 0x30, // 0x21 ! + 0x00, // 0x22 @ + 0x00, // 0x23 + 0x00, // 0x24 + 0x00, // 0x25 + 0x00, // 0x26 + 0x00, // 0x27 + 0x00, // 0x28 + 0x00, // 0x29 + 0x00, // 0x2A + 0x00, // 0x2B + 0x00, // 0x2C + 0x00, // 0x2D + 0x00, // 0x2E + LED(E,G,B,0,0,0,0,0), // 0x2F + LED(A,B,C,D,E,F,0,0), // 0x30 + LED(0,B,C,0,0,0,0,0), // 0x31 + LED(A,B,G,E,D,0,0,0), // 0x32 + LED(A,B,G,C,D,0,0,0), // 0x33 + LED(F,G,B,C,0,0,0,0), // 0x34 + LED(A,F,G,C,D,0,0,0), // 0x35 + LED(A,F,G,C,D,E,0,0), // 0x36 + LED(A,B,C,0,0,0,0,0), // 0x37 + LED(A,B,C,D,E,F,G,0), // 0x38 + LED(A,F,G,B,C,0,0,0), // 0x39 + LED(0,0,0,0,0,0,0,0), // 0x3A + LED(0,0,0,0,0,0,0,0), // 0x3B + LED(0,0,0,0,0,0,0,0), // 0x3C + LED(D,G,0,0,0,0,0,0), // 0x3D - = + LED(0,0,0,0,0,0,0,0), // 0x3E + LED(0,0,0,0,0,0,0,0), // 0x3F + LED(0,0,0,0,0,0,0,0), // 0x40 + LED(A,F,G,B,E,C,0,0), // 0x41 - A + LED(F,G,E,D,C,0,0,0), // 0x42 - B + LED(A,F,E,D,0,0,0,0), // 0x43 - C + LED(B,G,E,D,C,0,0,0), // 0x44 - D + LED(A,F,G,E,D,0,0,0), // 0x45 - E + LED(A,F,G,E,0,0,0,0), // 0x46 - F + LED(0,0,0,0,0,0,0,0), // 0x47 + LED(0,0,0,0,0,0,0,0), // 0x48 + LED(0,0,0,0,0,0,0,0), // 0x49 + LED(0,0,0,0,0,0,0,0), // 0x4A + LED(0,0,0,0,0,0,0,0), // 0x4B + LED(0,0,0,0,0,0,0,0), // 0x4C + LED(0,0,0,0,0,0,0,0), // 0x4D + LED(0,0,0,0,0,0,0,0), // 0x4E + LED(0,0,0,0,0,0,0,0), // 0x4F + LED(0,0,0,0,0,0,0,0), // 0x50 + LED(0,0,0,0,0,0,0,0), // 0x51 + LED(0,0,0,0,0,0,0,0), // 0x52 + LED(0,0,0,0,0,0,0,0), // 0x53 + LED(0,0,0,0,0,0,0,0), // 0x54 + LED(0,0,0,0,0,0,0,0), // 0x55 + LED(0,0,0,0,0,0,0,0), // 0x56 + LED(0,0,0,0,0,0,0,0), // 0x57 + LED(0,0,0,0,0,0,0,0), // 0x58 + LED(0,0,0,0,0,0,0,0), // 0x59 + LED(0,0,0,0,0,0,0,0), // 0x5A + LED(0,0,0,0,0,0,0,0), // 0x5B + LED(0,0,0,0,0,0,0,0), // 0x5C + LED(0,0,0,0,0,0,0,0), // 0x5D + LED(0,0,0,0,0,0,0,0), // 0x5E + LED(0,0,0,0,0,0,0,0), // 0x5F + LED(0,0,0,0,0,0,0,0), // 0x60 + LED(0,0,0,0,0,0,0,0), // 0x61 + LED(0,0,0,0,0,0,0,0), // 0x62 + LED(0,0,0,0,0,0,0,0), // 0x63 + LED(0,0,0,0,0,0,0,0), // 0x64 + LED(0,0,0,0,0,0,0,0), // 0x65 + LED(0,0,0,0,0,0,0,0), // 0x66 + LED(0,0,0,0,0,0,0,0), // 0x67 + LED(0,0,0,0,0,0,0,0), // 0x68 + LED(0,0,0,0,0,0,0,0), // 0x69 + LED(0,0,0,0,0,0,0,0), // 0x6A + LED(0,0,0,0,0,0,0,0), // 0x6B + LED(0,0,0,0,0,0,0,0), // 0x6C + LED(0,0,0,0,0,0,0,0), // 0x6D + LED(0,0,0,0,0,0,0,0), // 0x6E + LED(0,0,0,0,0,0,0,0), // 0x6F + LED(0,0,0,0,0,0,0,0), // 0x70 + LED(0,0,0,0,0,0,0,0), // 0x71 + LED(0,0,0,0,0,0,0,0), // 0x72 + LED(0,0,0,0,0,0,0,0), // 0x73 + LED(0,0,0,0,0,0,0,0), // 0x74 + LED(0,0,0,0,0,0,0,0), // 0x75 + LED(0,0,0,0,0,0,0,0), // 0x76 + LED(0,0,0,0,0,0,0,0), // 0x77 + LED(0,0,0,0,0,0,0,0), // 0x78 + LED(0,0,0,0,0,0,0,0), // 0x79 + LED(0,0,0,0,0,0,0,0), // 0x7A + LED(0,0,0,0,0,0,0,0), // 0x7B + LED(0,0,0,0,0,0,0,0), // 0x7C + LED(0,0,0,0,0,0,0,0), // 0x7D + LED(A,0,0,0,0,0,0,0), // 0x7E - ~ + LED(0,0,0,0,0,0,0,0), // 0x7F +}; + +#ifdef CYG_HAL_STARTUP_ROM +#define DELAY 10000 +#else +#define DELAY 100000 +#endif + +void +show_led(int p) +{ + volatile unsigned char *led = (volatile unsigned char *)0xFFFFF014; + int j; + for (j = 0; j < DELAY; j++) { + *led = led_bits[p-0x20]; + } + for (j = 0; j < DELAY*3; j++) { + *led = 0; + } +} + +// +// Clock support, using 16 bit timer TM1 +// + +CYG_WORD32 cyg_hal_clock_period; + +void +hal_clock_initialize(cyg_int32 period) +{ + volatile unsigned char *tmc = (volatile unsigned char *)V850_REG_TMC1; + volatile unsigned char *crc = (volatile unsigned char *)V850_REG_CRC1; + volatile unsigned char *prm = (volatile unsigned char *)V850_REG_PRM1; + volatile unsigned short *cmp0 = (volatile unsigned short *)V850_REG_CR10; + volatile unsigned short *cmp1 = (volatile unsigned short *)V850_REG_CR11; + *tmc = 0x00; // Halt timer + *crc = 0x00; // Select simple compare mode + *prm = 0x01; // System clock / 4 = 4250KHz + *cmp0 = period; + *cmp1 = period; + *tmc = 0x0C; // Continuous, reset mode (interval timer) + cyg_hal_clock_period = period; +} + +void +hal_clock_reset(int vector, cyg_uint32 period) +{ + hal_clock_initialize(period); +} + +// +// Return the number of clock "ticks" since last interrupt +// +cyg_uint32 hal_clock_read(void) +{ + volatile unsigned short *timer = (volatile unsigned short *)V850_REG_TM1; + return (cyg_uint32)*timer; +} + + +extern void _hal_thread_load_context(HAL_SavedRegisters **to); +extern void _hal_thread_switch_context(HAL_SavedRegisters **to, HAL_SavedRegisters **from); + +void hal_thread_load_context(CYG_ADDRESS to) +{ + HAL_SavedRegisters **new_context = to; +#if 0 + diag_printf("Load context: %x\n", *new_context); + show_regs(*new_context); +#endif + _hal_thread_load_context(new_context); +} + +void hal_thread_switch_context(CYG_ADDRESS to, CYG_ADDRESS from) +{ + HAL_SavedRegisters **old_context = from; + HAL_SavedRegisters **new_context = to; +#if 0 + diag_printf("Switch context - old: %x, new: %x\n", *old_context, *new_context); + show_regs(*new_context); +#endif + _hal_thread_switch_context(new_context, old_context); +} +
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/ceb_v850/current/src/plf_stub.c @@ -0,0 +1,149 @@ +//============================================================================= +// +// plf_stub.c +// +// Platform specific code for GDB stub support. +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg, jskov (based on the old tx39 hal_stub.c) +// Contributors:nickg, jskov, gthomas +// Date: 2000-03-10 +// Purpose: Platform specific code for GDB stub support. +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include <pkgconf/hal.h> + +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + +#include <cyg/hal/hal_stub.h> + +#include <cyg/hal/hal_io.h> // HAL IO macros +#include <cyg/hal/hal_diag.h> // diag output. FIXME +#include <cyg/hal/drv_api.h> + +#include <cyg/hal/hal_intr.h> + +#include <cyg/hal/v850_common.h> + +/*---------------------------------------------------------------------------*/ +#ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT +static cyg_interrupt gdb_interrupt; +static cyg_handle_t gdb_interrupt_handle; +#define CYG_DEVICE_SERIAL_INT CYGNUM_HAL_VECTOR_INTCSI1 + +// This ISR is called only for serial receive interrupts. +int +cyg_hal_gdb_isr(cyg_vector_t vector, cyg_addrword_t data, HAL_SavedRegisters *regs) +{ + volatile unsigned char *RxDATA = (volatile unsigned char *)V850_REG_RXS0; + cyg_uint8 c; + + c = *RxDATA; // Fetch the character + if( 3 == c ) { // ^C + // Ctrl-C: set a breakpoint at PC so GDB will display the + // correct program context when stopping rather than the + // interrupt handler. + cyg_hal_gdb_interrupt (regs->pc); + cyg_drv_interrupt_acknowledge(CYG_DEVICE_SERIAL_INT); + } + return 0; // No need to run DSR +} + +int +hal_plf_interruptible(int state) +{ + if (state) { + cyg_drv_interrupt_unmask(CYG_DEVICE_SERIAL_INT); + } else { + cyg_drv_interrupt_mask(CYG_DEVICE_SERIAL_INT); + } + + return 0; +} +#endif + +void hal_plf_init_serial() +{ +#ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT + cyg_drv_interrupt_create(CYG_DEVICE_SERIAL_INT, + 99, // Priority - what goes here? + 0, // Data item passed to interrupt handler + cyg_hal_gdb_isr, + 0, + &gdb_interrupt_handle, + &gdb_interrupt); + cyg_drv_interrupt_attach(gdb_interrupt_handle); + cyg_drv_interrupt_unmask(CYG_DEVICE_SERIAL_INT); +#endif +} + +/*---------------------------------------------------------------------------*/ + +void hal_plf_put_char( int c) +{ + hal_diag_write_char_serial(c); +} + +/*---------------------------------------------------------------------------*/ + +int hal_plf_get_char( void ) +{ + volatile unsigned char *LED = (volatile unsigned char *)V850_REG_P10; + char c; + unsigned char led = *LED & 0x7F; + if (led == 0) { + led = 0x01; + } else { + led <<= 1; + } + *LED = 0x80 | led; + hal_diag_read_char(&c); + *LED &= 0x7F; + return c; +} + + +//----------------------------------------------------------------------------- +// Stub init + +void hal_plf_stub_init(void) +{ + // Set up watchdog timer since we have to use it to emulate a breakpoint + volatile unsigned char *wdcs = (volatile unsigned char *)V850_REG_WDCS; + volatile unsigned char *wdtm = (volatile unsigned char *)V850_REG_WDTM; + *wdcs = 0x07; // 246.7ms - lowest possible overhead + *wdtm = 0x90; // Start watchdog +} + +#endif // ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS +//----------------------------------------------------------------------------- +// End of plf_stub.c
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/v850/current/ChangeLog @@ -0,0 +1,73 @@ +2000-05-25 Gary Thomas <gthomas@redhat.com> + + * src/v85x_v850.ld: Add platform specifics. In particular the + special, hardwired symbol "hal_vsr_table" needs to be platform + specific. + +2000-05-24 Gary Thomas <gthomas@redhat.com> + + * include/v850_common.h: Split into platform specific files. + +2000-04-25 Gary Thomas <gthomas@redhat.com> + + * src/v85x_v850.ld: Fix linking problem with "_etext". + +2000-04-14 Gary Thomas <gthomas@redhat.com> + + * src/v850_stub.c: Use 'br *' with a watchdog to emulate a + breakpoint since the hardware does not support them directly. + +2000-04-11 Gary Thomas <gthomas@redhat.com> + + * src/v850_stub.c (next_pc): Instruction "jmp [Rn]" was being + decoded incorrectly, leading to erroneous single step behaviour. + +2000-03-31 Gary Thomas <gthomas@redhat.com> + + * src/context.S: Use SLD/SST for smaller, faster code in context + save/restore functions. + +2000-03-30 Gary Thomas <gthomas@redhat.com> + + * src/context.S (_hal_longjmp): + (_hal_setjmp): Need to save R1/R2/R4/R5 since GCC seems to use them. + +2000-03-27 Gary Thomas <gthomas@redhat.com> + + * include/var_intr.h: Remove extra junk left over from cut&paste. + + * src/context.S: Add setjmp/longjmp support. + +2000-03-21 Gary Thomas <gthomas@redhat.com> + + * src/v850_stub.c (__skipinst): Use single step code properly. + +2000-03-20 Gary Thomas <gthomas@redhat.com> + + * src/v850_stub.c: Add single step support. + +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//===========================================================================
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/v850/current/cdl/hal_v85x_v850.cdl @@ -0,0 +1,76 @@ +# ==================================================================== +# +# hal_v85x_v850.cdl +# +# NEC/V850 variant architectural HAL package configuration data +# +# ==================================================================== +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Red Hat eCos Public License +# Version 1.1 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://www.redhat.com/ +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Configurable Operating System, +# released September 30, 1998. +# +# The Initial Developer of the Original Code is Red Hat. +# Portions created by Red Hat are +# Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +# All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +# ==================================================================== +######DESCRIPTIONBEGIN#### +# +# Author(s): gthomas +# Contributors: +# Date: 2000-03-09 +# +#####DESCRIPTIONEND#### +# +# ==================================================================== + +cdl_package CYGPKG_HAL_V85X_V850 { + display "V850 variant" + parent CYGPKG_HAL_V85X + implements CYGINT_HAL_V85X_VARIANT + hardware + include_dir cyg/hal + define_header hal_v85x_v850.h + description " + The V850 variant HAL package provides generic support + for this processor architecture. It is also necessary to + select a specific target platform HAL package." + + define_proc { + puts $::cdl_header "#include <pkgconf/hal_v85x.h>" + } + + compile v850_stub.c v850_misc.c context.S + + make { + <PREFIX>/lib/target.ld: <PACKAGE>/src/v85x_v850.ld + $(CC) -E -P -Wp,-MD,target.tmp -DEXTRAS=1 -xc $(INCLUDE_PATH) $(CFLAGS) -o $@ $< + @echo $@ ": \\" > $(notdir $@).deps + @tail +2 target.tmp >> $(notdir $@).deps + @echo >> $(notdir $@).deps + @rm target.tmp + } + + cdl_option CYGBLD_LINKER_SCRIPT { + display "Linker script" + flavor data + no_define + calculated { "src/v85x_v850.ld" } + } + +}
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/v850/current/include/v850_common.h @@ -0,0 +1,56 @@ +#ifndef CYGONCE_V850_COMMON_H +#define CYGONCE_V850_COMMON_H + +/*============================================================================= +// +// v850_common.h +// +// NEC/V850 common definitions +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 2000-03-10 +// Purpose: NEC/V850 CPU family hardware description +// Description: +// Usage: #include <cyg/hal/v850_common.h> +// +//####DESCRIPTIONEND#### +// +//===========================================================================*/ + +// Note: these defintions match the documentation, thus no attempt is made +// to sanitize (mangle) the names. Also, care should be taken to keep this +// clean for use in assembly code (no "C" constructs). + +#include <cyg/hal/v850_regs.h> + +/*---------------------------------------------------------------------------*/ +/* end of v850_common.h */ +#endif /* CYGONCE_V850_COMMON_H */
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/v850/current/include/var_arch.h @@ -0,0 +1,85 @@ +#ifndef CYGONCE_HAL_VAR_ARCH_H +#define CYGONCE_HAL_VAR_ARCH_H + +//========================================================================== +// +// var_arch.h +// +// Architecture specific abstractions +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg +// Contributors: nickg, gthomas +// Date: 1999-02-17 +// Purpose: Define architecture abstractions +// Description: This file contains any extra or modified definitions for +// this variant of the architecture. +// Usage: #include <cyg/hal/var_arch.h> +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include <pkgconf/hal.h> +#include <cyg/infra/cyg_type.h> + +#define CYG_HAL_GDB_REG CYG_WORD32 + +// Copy a set of registers from a HAL_SavedRegisters structure into a +// GDB ordered array. +#define HAL_GET_GDB_REGISTERS( _aregval_ , _regs_ ) \ +{ \ + CYG_HAL_GDB_REG *_regval_ = (CYG_HAL_GDB_REG *)(_aregval_); \ + int _i_; \ + \ + for( _i_ = 0; _i_ < 32; _i_++ ) \ + _regval_[_i_] = (_regs_)->d[_i_]; \ + \ + _regval_[37] = (_regs_)->psw; \ + _regval_[36] = (_regs_)->cause; \ + _regval_[64] = (_regs_)->pc; \ +} + +// Copy a GDB ordered array into a HAL_SavedRegisters structure. +#define HAL_SET_GDB_REGISTERS( _regs_ , _aregval_ ) \ +{ \ + CYG_HAL_GDB_REG *_regval_ = (CYG_HAL_GDB_REG *)(_aregval_); \ + int _i_; \ + \ + for( _i_ = 0; _i_ < 32; _i_++ ) \ + (_regs_)->d[_i_] = _regval_[_i_]; \ + \ + (_regs_)->psw = _regval_[37]; \ + (_regs_)->cause = _regval_[36]; \ + (_regs_)->pc = _regval_[64]; \ +} + +//-------------------------------------------------------------------------- +#endif // CYGONCE_HAL_VAR_ARCH_H +// End of var_arch.h
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/v850/current/include/var_cache.h @@ -0,0 +1,59 @@ +#ifndef CYGONCE_VAR_CACHE_H +#define CYGONCE_VAR_CACHE_H + +//============================================================================= +// +// var_cache.h +// +// HAL cache control API +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg +// Contributors: nickg +// Date: 1998-02-17 +// Purpose: Cache control API +// Description: The macros defined here provide the HAL APIs for handling +// cache control operations. +// Usage: +// #include <cyg/hal/var_cache.h> +// ... +// +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include <pkgconf/hal.h> +#include <cyg/infra/cyg_type.h> + +#include <cyg/hal/plf_cache.h> + +//----------------------------------------------------------------------------- +#endif // ifndef CYGONCE_VAR_CACHE_H +// End of var_cache.h
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/v850/current/include/var_intr.h @@ -0,0 +1,71 @@ +#ifndef CYGONCE_HAL_VAR_INTR_H +#define CYGONCE_HAL_VAR_INTR_H + +//========================================================================== +// +// var_intr.h +// +// VR4300 Interrupt and clock support +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg +// Contributors: nickg, jskov, +// gthomas, jlarmour +// Date: 1999-02-16 +// Purpose: VR4300 Interrupt support +// Description: The macros defined here provide the HAL APIs for handling +// interrupts and the clock for variants of the NEC VR4300 +// architecture. +// +// Usage: +// #include <cyg/hal/var_intr.h> +// ... +// +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include <pkgconf/hal.h> + +#include <cyg/infra/cyg_type.h> + +#include <cyg/hal/plf_intr.h> + +//-------------------------------------------------------------------------- +// Interrupt controller access. + +//-------------------------------------------------------------------------- +// Clock control + +// This is handled by the default code + +//-------------------------------------------------------------------------- +#endif // ifndef CYGONCE_HAL_VAR_INTR_H +// End of var_intr.h
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/v850/current/src/context.S @@ -0,0 +1,205 @@ +// #============================================================================= +// # +// # context.S +// # +// # NEC/V850 context switch code +// # +// #============================================================================= +// ####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +// ####COPYRIGHTEND#### +// #============================================================================= +// ######DESCRIPTIONBEGIN#### +// # +// # Author(s): nickg, gthomas +// # Contributors: nickg, gthomas +// # Date: 1998-09-15 +// # Purpose: NEC/V850 context switch code +// # Description: This file contains implementations of the thread context +// # switch routines. It also contains the longjmp() and setjmp() routines. +// # +// #####DESCRIPTIONEND#### +// # +// #============================================================================= + +#include <pkgconf/hal.h> + +#include <cyg/hal/nec_offsets.inc> + + .text + +// ------------------------------------------------------------------------------ +// hal_thread_switch_context +// Switch thread contexts +// R6 = address of sp of next thread to execute +// R7 = address of sp save location of current thread + .globl __hal_thread_switch_context +__hal_thread_switch_context: + addi -CYGARC_EXCEPTION_FRAME_SIZE,sp,sp + st.w ep,CYGARC_REG_EP[sp] + mov sp,ep + sst.w r1,CYGARC_REG_R1[ep] + sst.w r2,CYGARC_REG_R2[ep] + addi CYGARC_EXCEPTION_FRAME_SIZE,ep,r1 + sst.w r1,CYGARC_REG_SP[ep] // sp + sst.w r4,CYGARC_REG_R4[ep] + sst.w r5,CYGARC_REG_R5[ep] + sst.w r6,CYGARC_REG_R6[ep] + sst.w r7,CYGARC_REG_R7[ep] + sst.w r8,CYGARC_REG_R8[ep] + sst.w r9,CYGARC_REG_R9[ep] + sst.w r10,CYGARC_REG_R10[ep] + sst.w r11,CYGARC_REG_R11[ep] + sst.w r12,CYGARC_REG_R12[ep] + sst.w r13,CYGARC_REG_R13[ep] + sst.w r14,CYGARC_REG_R14[ep] + sst.w r15,CYGARC_REG_R15[ep] + sst.w r16,CYGARC_REG_R16[ep] + sst.w r17,CYGARC_REG_R17[ep] + sst.w r18,CYGARC_REG_R18[ep] + sst.w r19,CYGARC_REG_R19[ep] + sst.w r20,CYGARC_REG_R20[ep] + sst.w r21,CYGARC_REG_R21[ep] + sst.w r22,CYGARC_REG_R22[ep] + sst.w r23,CYGARC_REG_R23[ep] + sst.w r24,CYGARC_REG_R24[ep] + sst.w r25,CYGARC_REG_R25[ep] + sst.w r26,CYGARC_REG_R26[ep] + sst.w r27,CYGARC_REG_R27[ep] + sst.w r28,CYGARC_REG_R28[ep] + sst.w r29,CYGARC_REG_R29[ep] + sst.w lp,CYGARC_REG_LP[ep] + sst.w lp,CYGARC_REG_PC[ep] + stsr PSW,r1 + st.w r1,CYGARC_REG_PSW[ep] + st.w sp,0[r7] // return new stack pointer + + # Now load the destination thread by dropping through + # to hal_thread_load_context +// ------------------------------------------------------------------------------ +// hal_thread_load_context +// Load thread context +// R6 = address of sp of next thread to execute +// Note that this function is also the second half of hal_thread_switch_context +// and is simply dropped into from it. + + .globl __hal_thread_load_context +__hal_thread_load_context: + di // disable interrupts while updating state + ld.w 0[r6],ep // get pointer to saved state + ld.w CYGARC_REG_PSW[ep],r6 + sld.w CYGARC_REG_LP[ep],r7 + sld.w CYGARC_REG_R1[ep],r1 // restore volatile registers + sld.w CYGARC_REG_R2[ep],r2 + ldsr r6,EIPSW // avoids pipline bubble + ldsr r7,EIPC + sld.w CYGARC_REG_R4[ep],r4 + sld.w CYGARC_REG_R5[ep],r5 + sld.w CYGARC_REG_R6[ep],r6 + sld.w CYGARC_REG_R7[ep],r7 + sld.w CYGARC_REG_R8[ep],r8 + sld.w CYGARC_REG_R9[ep],r9 + sld.w CYGARC_REG_R10[ep],r10 + sld.w CYGARC_REG_R11[ep],r11 + sld.w CYGARC_REG_R12[ep],r12 + sld.w CYGARC_REG_R13[ep],r13 + sld.w CYGARC_REG_R14[ep],r14 + sld.w CYGARC_REG_R15[ep],r15 + sld.w CYGARC_REG_R16[ep],r16 + sld.w CYGARC_REG_R17[ep],r17 + sld.w CYGARC_REG_R18[ep],r18 + sld.w CYGARC_REG_R19[ep],r19 + sld.w CYGARC_REG_R20[ep],r20 + sld.w CYGARC_REG_R21[ep],r21 + sld.w CYGARC_REG_R22[ep],r22 + sld.w CYGARC_REG_R23[ep],r23 + sld.w CYGARC_REG_R24[ep],r24 + sld.w CYGARC_REG_R25[ep],r25 + sld.w CYGARC_REG_R26[ep],r26 + sld.w CYGARC_REG_R27[ep],r27 + sld.w CYGARC_REG_R28[ep],r28 + sld.w CYGARC_REG_R29[ep],r29 + sld.w CYGARC_REG_LP[ep],lp + sld.w CYGARC_REG_SP[ep],sp + sld.w CYGARC_REG_EP[ep],ep + reti + +// ------------------------------------------------------------------------------ +// HAL longjmp, setjmp implementations + +#define fp r29 + + .globl _hal_setjmp +_hal_setjmp: + st.w r1,CYGARC_JMPBUF_R1[r6] + st.w r2,CYGARC_JMPBUF_R2[r6] + st.w r4,CYGARC_JMPBUF_R4[r6] + st.w r5,CYGARC_JMPBUF_R5[r6] + st.w sp,CYGARC_JMPBUF_SP[r6] + st.w gp,CYGARC_JMPBUF_GP[r6] + st.w tp,CYGARC_JMPBUF_TP[r6] + st.w r20,CYGARC_JMPBUF_R20[r6] + st.w r21,CYGARC_JMPBUF_R21[r6] + st.w r22,CYGARC_JMPBUF_R22[r6] + st.w r23,CYGARC_JMPBUF_R23[r6] + st.w r24,CYGARC_JMPBUF_R24[r6] + st.w r25,CYGARC_JMPBUF_R25[r6] + st.w r26,CYGARC_JMPBUF_R26[r6] + st.w r27,CYGARC_JMPBUF_R27[r6] + st.w r28,CYGARC_JMPBUF_R28[r6] + st.w fp,CYGARC_JMPBUF_FP[r6] + st.w ep,CYGARC_JMPBUF_EP[r6] + st.w lp,CYGARC_JMPBUF_LP[r6] + mov r0,r10 + jmp [lp] + +// hal_longjmp loads state from [arg0] and returns arg1 + + .globl _hal_longjmp +_hal_longjmp: + ld.w CYGARC_JMPBUF_SP[r6],sp + ld.w CYGARC_JMPBUF_GP[r6],gp + ld.w CYGARC_JMPBUF_TP[r6],tp + ld.w CYGARC_JMPBUF_R1[r6],r1 + ld.w CYGARC_JMPBUF_R2[r6],r2 + ld.w CYGARC_JMPBUF_R4[r6],r4 + ld.w CYGARC_JMPBUF_R5[r6],r5 + ld.w CYGARC_JMPBUF_R20[r6],r20 + ld.w CYGARC_JMPBUF_R21[r6],r21 + ld.w CYGARC_JMPBUF_R22[r6],r22 + ld.w CYGARC_JMPBUF_R23[r6],r23 + ld.w CYGARC_JMPBUF_R24[r6],r24 + ld.w CYGARC_JMPBUF_R25[r6],r25 + ld.w CYGARC_JMPBUF_R26[r6],r26 + ld.w CYGARC_JMPBUF_R27[r6],r27 + ld.w CYGARC_JMPBUF_R28[r6],r28 + ld.w CYGARC_JMPBUF_FP[r6],fp + ld.w CYGARC_JMPBUF_EP[r6],ep + ld.w CYGARC_JMPBUF_LP[r6],lp + mov r7,r10 + jmp [lp] + +// ------------------------------------------------------------------------------ +// end of context.S + +
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/v850/current/src/nec.ld @@ -0,0 +1,124 @@ +//============================================================================= +// +// MLT linker script for NEC +// adapted from packages/hal/arm/pid/v1_1/src/pid.ld +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= + +#include <pkgconf/system.h> + +STARTUP(vectors.o) +ENTRY(reset_vector) +#ifdef EXTRAS +INPUT(extras.o) +#endif +GROUP(libtarget.a libgcc.a) + +#define ALIGN_LMA 4 +#define FOLLOWING(_section_) AT ((LOADADDR (_section_) + SIZEOF (_section_) + ALIGN_LMA - 1) & ~ (ALIGN_LMA - 1)) +#define LMA_EQ_VMA +#define FORCE_OUTPUT . = . + +#define SECTIONS_BEGIN \ + /* Debug information */ \ + .debug_aranges 0 : { *(.debug_aranges) } \ + .debug_pubnames 0 : { *(.debug_pubnames) } \ + .debug_info 0 : { *(.debug_info) } \ + .debug_abbrev 0 : { *(.debug_abbrev) } \ + .debug_line 0 : { *(.debug_line) } \ + .debug_frame 0 : { *(.debug_frame) } \ + .debug_str 0 : { *(.debug_str) } \ + .debug_loc 0 : { *(.debug_loc) } \ + .debug_macinfo 0 : { *(.debug_macinfo) } + +#define SECTION_rom_vectors(_region_, _vma_, _lma_) \ + .rom_vectors _vma_ : _lma_ \ + { FORCE_OUTPUT; KEEP (*(.vectors)) } \ + > _region_ + +#define SECTION_text(_region_, _vma_, _lma_) \ + .text _vma_ : _lma_ \ + { stext = ABSOLUTE(.); \ + PROVIDE (__stext = ABSOLUTE(.)); \ + *(.text*) *(.gnu.warning) *(.gnu.linkonce*) *(.init) \ + *(.glue_7) *(.glue_7t) \ + } > _region_ \ + etext = .; PROVIDE (__etext = .); + +#define SECTION_fini(_region_, _vma_, _lma_) \ + .fini _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.fini) } \ + > _region_ + +#define SECTION_rodata(_region_, _vma_, _lma_) \ + .rodata _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.rodata*) } \ + > _region_ + +#define SECTION_rodata1(_region_, _vma_, _lma_) \ + .rodata1 _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.rodata1) } \ + > _region_ + +#define SECTION_fixup(_region_, _vma_, _lma_) \ + .fixup _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.fixup) } \ + > _region_ + +#define SECTION_gcc_except_table(_region_, _vma_, _lma_) \ + .gcc_except_table _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.gcc_except_table) } \ + > _region_ + +#define SECTION_data(_region_, _vma_, _lma_) \ + .data _vma_ : _lma_ \ + { __ram_data_start = ABSOLUTE (.); *(.data*) *(.data1) MERGE_IN_RODATA \ + _GOT1_START_ = ABSOLUTE (.); *(.got1) _GOT1_END_ = ABSOLUTE (.); \ + _GOT2_START_ = ABSOLUTE (.); *(.got2) _GOT2_END_ = ABSOLUTE (.); \ + . = ALIGN (4); \ + __DEVTAB__ = ABSOLUTE (.); KEEP (*(SORT (.devtab*))) __DEVTAB_END__ = ABSOLUTE (.); \ + __NETDEVTAB__ = ABSOLUTE (.); KEEP (*(SORT (.netdevtab*))) __NETDEVTAB_END__ = ABSOLUTE (.); \ + __CTOR_LIST__ = ABSOLUTE (.); KEEP (*(SORT (.ctors*))) __CTOR_END__ = ABSOLUTE (.); \ + __DTOR_LIST__ = ABSOLUTE (.); KEEP (*(SORT (.dtors*))) __DTOR_END__ = ABSOLUTE (.); \ + *(.dynamic) *(.sdata*) *(.sbss*) } \ + > _region_ \ + __rom_data_start = LOADADDR (.data); \ + __ram_data_end = .; PROVIDE (__ram_data_end = .); _edata = .; PROVIDE (edata = .); \ + PROVIDE (__rom_data_end = LOADADDR (.data) + SIZEOF(.data)); + +#define SECTION_bss(_region_, _vma_, _lma_) \ + .bss _vma_ : _lma_ \ + { __bss_start = ABSOLUTE (.); \ + *(.scommon) *(.dynbss) *(.bss*) *(COMMON) \ + __bss_end = ABSOLUTE (.); } \ + > _region_ + +#define SECTIONS_END . = ALIGN(4); _end = .; PROVIDE (end = .); + +#include <pkgconf/hal_nec.h> +#include <pkgconf/hal_nec_v850.h> +#include CYGHWR_MEMORY_LAYOUT_LDI
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/v850/current/src/v850_misc.c @@ -0,0 +1,125 @@ +//========================================================================== +// +// v850_misc.c +// +// HAL CPU variant miscellaneous functions +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 2000-03-15 +// Purpose: HAL miscellaneous functions +// Description: This file contains miscellaneous functions provided by the +// HAL. +// +//####DESCRIPTIONEND#### +// +//========================================================================*/ + +#include <pkgconf/hal.h> + +#include <cyg/infra/cyg_type.h> // Base types +#include <cyg/infra/cyg_trac.h> // tracing macros +#include <cyg/infra/cyg_ass.h> // assertion macros + +#include <cyg/hal/hal_intr.h> +#include <cyg/hal/v850_common.h> + +externC void cyg_hal_platform_hardware_init(void); + +// +// Interrupt management functions +// + +static volatile unsigned char *interrupt_control_registers[] = { + CYG_HAL_V85X_INTERRUPT_CONTROL_REGISTERS // Defined in <plf_intr.h> +}; + +#define INT_CONTROL_PENDING 0x80 +#define INT_CONTROL_DISABLE 0x40 +#define INT_CONTROL_LEVEL(n) n + +#define INT_CONTROL_DEFAULT INT_CONTROL_DISABLE|INT_CONTROL_LEVEL(7) + +// +// Mask, i.e. disable, interrupt #vector from occurring +// +void +hal_interrupt_mask(int vector) +{ + volatile unsigned char *ctl; + ctl = interrupt_control_registers[vector-CYGNUM_HAL_ISR_MIN]; + *ctl |= INT_CONTROL_DISABLE; +} + +// +// Unmask, i.e. enable, interrupt #vector +// +void +hal_interrupt_unmask(int vector) +{ + volatile unsigned char *ctl; + ctl = interrupt_control_registers[vector-CYGNUM_HAL_ISR_MIN]; + *ctl &= ~INT_CONTROL_DISABLE; +} + +// +// Acknowledge, i.e. clear, interrupt #vector +// +void +hal_interrupt_acknowledge(int vector) +{ + volatile unsigned char *ctl; + ctl = interrupt_control_registers[vector-CYGNUM_HAL_ISR_MIN]; + *ctl &= ~INT_CONTROL_PENDING; +} + +static void +init_interrupts(void) +{ + int i; + volatile unsigned char *ctl; + for (i = CYGNUM_HAL_ISR_MIN; i <= CYGNUM_HAL_ISR_MAX; i++) { + ctl = interrupt_control_registers[i-CYGNUM_HAL_ISR_MIN]; + *ctl = INT_CONTROL_DEFAULT; + } +} + +// +// Initialize the hardware. This may involve platform specific code. +// +void +cyg_hal_hardware_init(void) +{ + init_interrupts(); + cyg_hal_platform_hardware_init(); +} + +/*------------------------------------------------------------------------*/ +/* End of v850_misc.c */
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/v850/current/src/v850_stub.c @@ -0,0 +1,315 @@ +//======================================================================== +// +// nec_stub.c +// +// Helper functions for stub, generic to all NEC processors +// +//======================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//======================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): Red Hat, gthomas +// Contributors: Red Hat, gthomas, jskov +// Date: 1998-11-26 +// Purpose: +// Description: Helper functions for stub, generic to all NEC processors +// Usage: +// +//####DESCRIPTIONEND#### +// +//======================================================================== + +#include <stddef.h> + +#include <pkgconf/hal.h> +#ifdef CYGPKG_CYGMON +#include <pkgconf/cygmon.h> +#endif + +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + +#include <cyg/hal/hal_stub.h> +#include <cyg/hal/hal_arch.h> +#include <cyg/hal/hal_intr.h> + +#ifndef FALSE +#define FALSE 0 +#define TRUE 1 +#endif + +#ifdef CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT +#include <cyg/hal/dbg-threads-api.h> // dbg_currthread_id +#endif + +/* Given a trap value TRAP, return the corresponding signal. */ + +int __computeSignal (unsigned int trap_number) +{ + unsigned short curins, *pc; + switch (trap_number) { + case CYGNUM_HAL_VECTOR_WATCHDOG_TIMER: + pc = (unsigned short *)_hal_registers->pc; + curins = *pc; + if (curins == 0x0585) { + // "br *" - used for breakpoint + return SIGTRAP; + } else { + // Anything else - just ignore it happened + return 0; + } + case CYGNUM_HAL_VECTOR_NMI: + return SIGINT; + default: + return SIGTRAP; + } +} + + +/* Return the trap number corresponding to the last-taken trap. */ +int __get_trap_number (void) +{ + // The vector is not not part of the GDB register set so get it + // directly from the save context. + return _hal_registers->vector; +} + +/* Set the currently-saved pc register value to PC. */ + +void set_pc (target_register_t pc) +{ + put_register (PC, pc); +} + + +/*---------------------------------------------------------------------- + * Single-step support + */ + +/* Set things up so that the next user resume will execute one instruction. + This may be done by setting breakpoints or setting a single step flag + in the saved user registers, for example. */ + +static unsigned short *ss_saved_pc = 0; +static unsigned short ss_saved_instr[2]; +static int ss_saved_instr_size; + +#define FIXME() {diag_printf("FIXME - %s\n", __FUNCTION__); } + +static unsigned short * +next_pc(unsigned short *pc) +{ + unsigned short curins = *pc; + unsigned short *newpc = pc; + + switch ((curins & 0x0780) >> 7) { + case 0x0: + if ((curins & 0x60) == 0x60) { + int Rn = curins & 0x1F; + newpc = (unsigned short *)get_register(Rn); + } else { + newpc = pc+1; + } + break; + case 0x1: + case 0x2: + case 0x3: + case 0x4: + case 0x5: + // Arithmetic - no branch opcodes + newpc = pc+1; + break; + case 0x6: + case 0x7: + case 0x8: + case 0x9: + case 0xA: + // Load and store - no branch opcodes + newpc = pc+2; + break; + case 0xB: + // Conditional branch + if (1) { + unsigned long psw = get_register(PSW); +#define PSW_SAT 0x10 +#define PSW_CY 0x08 +#define PSW_OV 0x04 +#define PSW_S 0x02 +#define PSW_Z 0x01 + long disp = ((curins & 0xF800) >> 8) | ((curins & 0x70) >> 4); + int cc = curins & 0x0F; + int S = (psw & PSW_S) != 0; + int Z = (psw & PSW_Z) != 0; + int OV = (psw & PSW_OV) != 0; + int CY = (psw & PSW_CY) != 0; + int do_branch = 0; + if (curins & 0x8000) disp |= 0xFFFFFF00; + switch (cc) { + case 0x0: // BV + do_branch = (OV == 1); + break; + case 0x1: // BL + do_branch = (CY == 1); + break; + case 0x2: // BE + do_branch = (Z == 1); + break; + case 0x3: // BNH + do_branch = ((CY | Z) == 1); + break; + case 0x4: // BN + do_branch = (S == 1); + break; + case 0x5: // - always + do_branch = 1; + break; + case 0x6: // BLT + do_branch = ((S ^ OV) == 1); + break; + case 0x7: // BLE + do_branch = (((S ^ OV) | Z) == 1); + break; + case 0x8: // BNV + do_branch = (OV == 0); + break; + case 0x9: // BNL + do_branch = (CY == 0); + break; + case 0xA: // BNE + do_branch = (Z == 0); + break; + case 0xB: // BH + do_branch = ((CY | Z) == 0); + break; + case 0xC: // BP + do_branch = (S == 0); + break; + case 0xD: // BSA + do_branch = ((psw & PSW_SAT) != 0); + break; + case 0xE: // BGE + do_branch = ((S ^ OV) == 0); + break; + case 0xF: // BGT + do_branch = (((S ^ OV) | Z) == 0); + break; + } + if (do_branch) { + newpc = pc + disp; + } else { + newpc = pc + 1; + } + } + break; + case 0xC: + case 0xD: + case 0xE: + // Arithmetic & load/store - no branch opcodes + newpc = pc+2; + break; + case 0xF: + if ((curins & 0x60) >= 0x40) { + // Bitfield and extended instructions - no branch opcodes + newpc = pc+2; + } else { + // JR/JARL + long disp = ((curins & 0x3F) << 16) | *(pc+1); + if (curins & 0x20) disp |= 0xFFC00000; + newpc = pc + (disp>>1); + } + } + return newpc; +} + +void __single_step (void) +{ + unsigned short *pc = (unsigned short *)get_register(PC); + unsigned short *break_pc; + unsigned short _breakpoint[] = {0x07E0, 0x0780}; + unsigned short *breakpoint = _breakpoint; + // If the current instruction is a branch, decide if the branch will + // be taken to determine where to set the breakpoint. + break_pc = next_pc(pc); + // Now see what kind of breakpoint can be used. + // Note: since this is a single step, always use the 32 bit version. + ss_saved_pc = break_pc; + ss_saved_instr_size = 2; + ss_saved_instr[0] = *break_pc; + *break_pc++ = *breakpoint++; + ss_saved_instr[1] = *break_pc; + *break_pc++ = *breakpoint++; +} + +/* Clear the single-step state. */ + +void __clear_single_step (void) +{ + unsigned short *pc, *val; + int i; + if (ss_saved_instr_size != 0) { + pc = ss_saved_pc; + val = ss_saved_instr; + for (i = 0; i < ss_saved_instr_size; i++) { + *pc++ = *val++; + } + ss_saved_instr_size = 0; + } +} + +#if !defined(CYGPKG_CYGMON) +void __install_breakpoints (void) +{ +// FIXME(); +} + +void __clear_breakpoints (void) +{ +// FIXME(); +} +#endif // !CYGPKG_CYGMON + +/* If the breakpoint we hit is in the breakpoint() instruction, return a + non-zero value. */ + +int +__is_breakpoint_function () +{ + return get_register (PC) == (target_register_t)&CYG_LABEL_NAME(breakinst); +} + + +/* Skip the current instruction. Since this is only called by the + stub when the PC points to a breakpoint or trap instruction, +*/ + +void __skipinst (void) +{ + unsigned short *pc = (unsigned short *)get_register(PC); + pc = next_pc(pc); + put_register(PC, (unsigned long)pc); +} + + +#endif // CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
new file mode 100644 --- /dev/null +++ b/packages/hal/v85x/v850/current/src/v85x_v850.ld @@ -0,0 +1,124 @@ +//============================================================================= +// +// MLT linker script for NEC +// adapted from packages/hal/arm/pid/v1_1/src/pid.ld +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= + +#include <pkgconf/system.h> + +STARTUP(vectors.o) +ENTRY(reset_vector) +#ifdef EXTRAS +INPUT(extras.o) +#endif +GROUP(libtarget.a libgcc.a) + +#define ALIGN_LMA 4 +#define FOLLOWING(_section_) AT ((LOADADDR (_section_) + SIZEOF (_section_) + ALIGN_LMA - 1) & ~ (ALIGN_LMA - 1)) +#define LMA_EQ_VMA +#define FORCE_OUTPUT . = . + +#define SECTIONS_BEGIN \ + /* Debug information */ \ + .debug_aranges 0 : { *(.debug_aranges) } \ + .debug_pubnames 0 : { *(.debug_pubnames) } \ + .debug_info 0 : { *(.debug_info) } \ + .debug_abbrev 0 : { *(.debug_abbrev) } \ + .debug_line 0 : { *(.debug_line) } \ + .debug_frame 0 : { *(.debug_frame) } \ + .debug_str 0 : { *(.debug_str) } \ + .debug_loc 0 : { *(.debug_loc) } \ + .debug_macinfo 0 : { *(.debug_macinfo) } + +#define SECTION_rom_vectors(_region_, _vma_, _lma_) \ + .rom_vectors _vma_ : _lma_ \ + { FORCE_OUTPUT; KEEP (*(.vectors)) } \ + > _region_ + +#define SECTION_text(_region_, _vma_, _lma_) \ + .text _vma_ : _lma_ \ + { stext = ABSOLUTE(.); \ + PROVIDE (__stext = ABSOLUTE(.)); \ + *(.text*) *(.gnu.warning) *(.gnu.linkonce*) *(.init) \ + *(.glue_7) *(.glue_7t) \ + } > _region_ \ + etext = .; PROVIDE (__etext = .); + +#define SECTION_fini(_region_, _vma_, _lma_) \ + .fini _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.fini) } \ + > _region_ + +#define SECTION_rodata(_region_, _vma_, _lma_) \ + .rodata _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.rodata*) } \ + > _region_ + +#define SECTION_rodata1(_region_, _vma_, _lma_) \ + .rodata1 _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.rodata1) } \ + > _region_ + +#define SECTION_fixup(_region_, _vma_, _lma_) \ + .fixup _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.fixup) } \ + > _region_ + +#define SECTION_gcc_except_table(_region_, _vma_, _lma_) \ + .gcc_except_table _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.gcc_except_table) } \ + > _region_ + +#define SECTION_data(_region_, _vma_, _lma_) \ + .data _vma_ : _lma_ \ + { ___ram_data_start = ABSOLUTE (.); *(.data*) *(.data1); \ + _GOT1_START_ = ABSOLUTE (.); *(.got1) _GOT1_END_ = ABSOLUTE (.); \ + _GOT2_START_ = ABSOLUTE (.); *(.got2) _GOT2_END_ = ABSOLUTE (.); \ + . = ALIGN (4); \ + ___DEVTAB__ = ABSOLUTE (.); KEEP (*(SORT (.devtab*))) ___DEVTAB_END__ = ABSOLUTE (.); \ + ___NETDEVTAB__ = ABSOLUTE (.); KEEP (*(SORT (.netdevtab*))) ___NETDEVTAB_END__ = ABSOLUTE (.); \ + ___CTOR_LIST__ = ABSOLUTE (.); KEEP (*(SORT (.ctors*))) ___CTOR_END__ = ABSOLUTE (.); \ + ___DTOR_LIST__ = ABSOLUTE (.); KEEP (*(SORT (.dtors*))) ___DTOR_END__ = ABSOLUTE (.); \ + *(.dynamic) *(.sdata*) *(.sbss*) } \ + > _region_ \ + ___rom_data_start = LOADADDR (.data); \ + ___ram_data_end = .; PROVIDE (___ram_data_end = .); _edata = .; PROVIDE (edata = .); \ + PROVIDE (___rom_data_end = LOADADDR (.data) + SIZEOF(.data)); + +#define SECTION_bss(_region_, _vma_, _lma_) \ + .bss _vma_ : _lma_ \ + { ___bss_start = ABSOLUTE (.); \ + *(.scommon) *(.dynbss) *(.bss*) *(COMMON) \ + ___bss_end = ABSOLUTE (.); } \ + > _region_ + +#include <cyg/hal/plf_sections.h> + +#include <pkgconf/hal_v85x.h> +#include <pkgconf/hal_v85x_v850.h> +#include CYGHWR_MEMORY_LAYOUT_LDI
--- a/packages/io/serial/current/ChangeLog +++ b/packages/io/serial/current/ChangeLog @@ -1,3 +1,7 @@ +2000-05-28 Gary Thomas <gthomas@redhat.com> + + * tests/ser_test_protocol.inl: Rename NEC V85x drivers. + 2000-05-08 Jesper Skov <jskov@redhat.com> * cdl/io_serial.cdl: active_if CYGPKG_IO
--- a/packages/io/serial/current/tests/ser_test_protocol.inl +++ b/packages/io/serial/current/tests/ser_test_protocol.inl @@ -205,6 +205,15 @@ # define TEST_TTY_DEV CYGDAT_IO_SERIAL_TTY_TTY0_DEV # endif #endif +#if defined(CYGPKG_HAL_V85X_V850) \ + && defined(CYGPKG_IO_SERIAL_V85X_V850) \ + && defined(CYGPKG_IO_SERIAL_V85X_V850_SERIAL0) +# define TEST_CRASH_ID "v85x/v850" +# define TEST_SER_DEV CYGDAT_IO_SERIAL_V85X_V850_SERIAL0_NAME +# if defined(CYGPKG_IO_SERIAL_TTY_TTY0) +# define TEST_TTY_DEV CYGDAT_IO_SERIAL_TTY_TTY0_DEV +# endif +#endif // We can't rely on haldiag for ser_filter detection - it may not define // a working character reading function.
--- a/packages/kernel/current/ChangeLog +++ b/packages/kernel/current/ChangeLog @@ -1,3 +1,8 @@ +2000-05-30 Gary Thomas <gthomas@redhat.com> + + * tests/dhrystone.c: Increase number of test loops for faster + StrongARM platforms. + 2000-05-15 Jonathan Larmour <jlarmour@redhat.co.uk> * cdl/counters.cdl (CYGVAR_KERNEL_COUNTERS_CLOCK_DSR_LATENCY):
--- a/packages/kernel/current/tests/dhrystone.c +++ b/packages/kernel/current/tests/dhrystone.c @@ -62,6 +62,8 @@ dtime(void) // Number of loops to run. #if defined(CYGPKG_HAL_ARM_AEB) || defined(CYGPKG_HAL_ARM_PID) #define PASSES 100000 +#elif defined(CYGPKG_HAL_ARM_EBSA285) +#define PASSES 1000000 #elif defined(CYGPKG_HAL_ARM_CMA230) #define PASSES 100000 #elif defined(CYGPKG_HAL_POWERPC_MPC8xx)