Mercurial > ecos-v2_0-branch
changeset 432:cc4df9225149
Add Adder platform from Analogue & Micro
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--- a/packages/ChangeLog +++ b/packages/ChangeLog @@ -1,3 +1,8 @@ +2002-11-25 Gary Thomas <gthomas@ecoscentric.com> + + * ecos.db: Add support for A&M "Adder" (PowerPC 850) + Split PowerPC QUICC ethernet driver into generic+platform. + 2002-11-14 Gary Thomas <gthomas@ecoscentric.com> * ecos.db: Add application profiling package.
--- a/packages/NEWS +++ b/packages/NEWS @@ -1,3 +1,4 @@ +* Add support for Analogue & Micro Adder (PowerPC 850) boards * Update MN10300 ASB2303 HAL to support RedBoot * New package for application level profiling (histogram only) * Support for NPWR Linux Engine (Xscale IOP310) from Team ASA
new file mode 100644 --- /dev/null +++ b/packages/devs/eth/powerpc/adder/current/cdl/adder_eth_drivers.cdl @@ -0,0 +1,71 @@ +#==================================================================== +# +# adder_eth_drivers.cdl +# +# Hardware specifics for A&M Adder ethernet +# +#==================================================================== +#####ECOSGPLCOPYRIGHTBEGIN#### +## ------------------------------------------- +## This file is part of eCos, the Embedded Configurable Operating System. +## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +## Copyright (C) 2002 Gary Thomas +## +## eCos is free software; you can redistribute it and/or modify it under +## the terms of the GNU General Public License as published by the Free +## Software Foundation; either version 2 or (at your option) any later version. +## +## eCos is distributed in the hope that it will be useful, but WITHOUT ANY +## WARRANTY; without even the implied warranty of MERCHANTABILITY or +## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +## for more details. +## +## You should have received a copy of the GNU General Public License along +## with eCos; if not, write to the Free Software Foundation, Inc., +## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +## +## As a special exception, if other files instantiate templates or use macros +## or inline functions from this file, or you compile this file and link it +## with other works to produce a work based on this file, this file does not +## by itself cause the resulting work to be covered by the GNU General Public +## License. However the source code for this file must still be made available +## in accordance with section (3) of the GNU General Public License. +## +## This exception does not invalidate any other reasons why a work based on +## this file might be covered by the GNU General Public License. +## +## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +## at http://sources.redhat.com/ecos/ecos-license/ +## ------------------------------------------- +#####ECOSGPLCOPYRIGHTEND#### +# ==================================================================== +######DESCRIPTIONBEGIN#### +# +# Author(s): gthomas, hmt +# Original data: gthomas +# Contributors: gthomas +# Date: 2001-02-14 +# +#####DESCRIPTIONEND#### +# +#==================================================================== + +cdl_package CYGPKG_DEVS_ETH_POWERPC_ADDER { + display "A&M Adder (MPC8xxT) ethernet support" + description "Hardware specifics for A&M Adder ethernet" + + parent CYGPKG_IO_ETH_DRIVERS + active_if CYGPKG_IO_ETH_DRIVERS + active_if CYGPKG_HAL_POWERPC + active_if CYGPKG_HAL_POWERPC_MPC8xx + active_if CYGPKG_HAL_POWERPC_ADDER + + requires CYGPKG_DEVS_ETH_POWERPC_QUICC + + compile adder_eth.c + + include_dir cyg/io + define_proc { + puts $::cdl_system_header "#define CYGDAT_DEVS_QUICC_ETH_INL <cyg/io/adder_eth.inl>" + } +}
new file mode 100644 --- /dev/null +++ b/packages/devs/eth/powerpc/adder/current/include/adder_eth.inl @@ -0,0 +1,97 @@ +#ifndef CYGONCE_DEVS_ADDER_ETH_INL +#define CYGONCE_DEVS_ADDER_ETH_INL +//========================================================================== +// +// adder_eth.inl +// +// Hardware specifics for A&M Adder ethernet support +// +//========================================================================== +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// Copyright (C) 2002 Gary Thomas +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 2002-11-19 +// Purpose: +// Description: +// +//####DESCRIPTIONEND#### +// +//========================================================================== + + +extern int _adder_get_leds(void); +extern void _adder_set_leds(int); +extern bool _adder_reset_phy(void); + +#define _get_led() _adder_get_leds() +#define _set_led(v) _adder_set_leds(v) + +#define LED_TxACTIVE 2 +#define LED_RxACTIVE 1 + +// Reset the PHY - analagous to hardware reset +#define QUICC_ETH_RESET_PHY() \ + if (!_adder_reset_phy()) { \ + diag_printf("Can't reset PHY or get link\n"); \ + } + +// Port layout - uses SCC2 +#define QUICC_ETH_INT CYGNUM_HAL_INTERRUPT_CPM_SCC2 +#define QUICC_ETH_SCC 1 // SCC2 +#define QUICC_CPM_SCCx QUICC_CPM_SCC2 + +// Fixed bits +#define QUICC_ETH_PA_RXD 0x0004 // Rx Data on Port A +#define QUICC_ETH_PA_TXD 0x0008 // Tx Data on Port A +#define QUICC_ETH_PC_COLLISION 0x0040 // Collision detect +#define QUICC_ETH_PC_Rx_ENABLE 0x0080 // Rx Enable (RENA) + +// These depend on how the PHY is wired to the CPU +#define QUICC_ETH_PA_Tx_CLOCK 0x0200 // Tx Clock = CLK2 +#define QUICC_ETH_PA_Rx_CLOCK 0x0800 // Rx Clock = CLK4 +#define QUICC_ETH_SICR_MASK 0xFF00 // SI Clock Route - important bits +#define QUICC_ETH_SICR_ENET (7<<11)|(5<<8) // Rx=CLK4, Tx=CLK2 +#define QUICC_ETH_SICR_ENABLE 0x4000 // Enable SCC2 to use NMSI + +// The TENA signal can appear on either port B or C +//#define QUICC_ETH_PC_Tx_ENABLE 0x0002 // Tx Enable (TENA) +#define QUICC_ETH_PB_Tx_ENABLE 0x2000 // Tx Enable (TENA) + + +#endif // CYGONCE_DEVS_ADDER_ETH_INL +// ------------------------------------------------------------------------
new file mode 100644 --- /dev/null +++ b/packages/devs/eth/powerpc/adder/current/src/adder_eth.c @@ -0,0 +1,279 @@ +//========================================================================== +// +// adder_eth.c +// +// Ethernet device driver specifics for Analogue & Micro Adder (PPC850) +// +//========================================================================== +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// Copyright (C) 2002 Gary Thomas +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//####BSDCOPYRIGHTBEGIN#### +// +// ------------------------------------------- +// +// Portions of this software may have been derived from OpenBSD or other sources, +// and are covered by the appropriate copyright disclaimers included herein. +// +// ------------------------------------------- +// +//####BSDCOPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 2002-11-25 +// Purpose: +// Description: platform driver specifics for A&M Adder +// +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +// Ethernet device driver support for PHY on Adder/MPC850 + +#include <pkgconf/system.h> +#include <cyg/infra/cyg_type.h> +#include <cyg/infra/diag.h> + +#include <cyg/hal/hal_arch.h> +#include <cyg/hal/hal_cache.h> +#include <cyg/hal/hal_if.h> +#include <cyg/hal/drv_api.h> + +#include CYGDAT_DEVS_QUICC_ETH_INL // Platform specifics +#include <cyg/hal/quicc/ppc8xx.h> // QUICC structure definitions + +// MII interface +#define MII_Start 0x40000000 +#define MII_Read 0x20000000 +#define MII_Write 0x10000000 +#define MII_Cmd 0x30000000 +#define MII_Phy(phy) (phy << 23) +#define MII_Reg(reg) (reg << 18) +#define MII_TA 0x00020000 + +// Transceiver mode +#define PHY_BMCR 0x00 // Register number +#define PHY_BMCR_RESET 0x8000 +#define PHY_BMCR_LOOPBACK 0x4000 +#define PHY_BMCR_100MB 0x2000 +#define PHY_BMCR_AUTO_NEG 0x1000 +#define PHY_BMCR_POWER_DOWN 0x0800 +#define PHY_BMCR_ISOLATE 0x0400 +#define PHY_BMCR_RESTART 0x0200 +#define PHY_BMCR_FULL_DUPLEX 0x0100 +#define PHY_BMCR_COLL_TEST 0x0080 + +#define PHY_BMSR 0x01 // Status register +#define PHY_BMSR_AUTO_NEG 0x0020 +#define PHY_BMSR_LINK 0x0004 + +// Bits in port D - used for 2 wire MII interface +#define MII_DATA 0x1000 +#define MII_CLOCK 0x0800 + +#define MII_SET_DATA(val) \ + if (val) { \ + eppc->pio_pddat |= MII_DATA; \ + } else { \ + eppc->pio_pddat &= ~MII_DATA; \ + } + +#define MII_GET_DATA() \ + ((eppc->pio_pddat & MII_DATA) != 0) + +#define MII_SET_CLOCK(val) \ + if (val) { \ + eppc->pio_pddat |= MII_CLOCK; \ + } else { \ + eppc->pio_pddat &= ~MII_CLOCK; \ + } + +static cyg_uint32 +phy_cmd(cyg_uint32 cmd) +{ + volatile EPPC *eppc = (volatile EPPC *)eppc_base(); + cyg_uint32 retval; + int i, off; + bool is_read = ((cmd & MII_Cmd) == MII_Read); + + // Set both bits as output + eppc->pio_pddir |= MII_DATA | MII_CLOCK; + + // Preamble + for (i = 0; i < 32; i++) { + MII_SET_CLOCK(0); + MII_SET_DATA(1); + CYGACC_CALL_IF_DELAY_US(1); + MII_SET_CLOCK(1); + CYGACC_CALL_IF_DELAY_US(1); + } + + // Command/data + for (i = 0, off = 31; i < (is_read ? 14 : 32); i++, --off) { + MII_SET_CLOCK(0); + MII_SET_DATA((cmd >> off) & 0x00000001); + CYGACC_CALL_IF_DELAY_US(1); + MII_SET_CLOCK(1); + CYGACC_CALL_IF_DELAY_US(1); + } + + retval = cmd; + + // If read, fetch data register + if (is_read) { + retval >>= 16; + + MII_SET_CLOCK(0); + eppc->pio_pddir &= ~MII_DATA; // Data bit is now input + CYGACC_CALL_IF_DELAY_US(1); + MII_SET_CLOCK(1); + CYGACC_CALL_IF_DELAY_US(1); + MII_SET_CLOCK(0); + CYGACC_CALL_IF_DELAY_US(1); + + for (i = 0, off = 15; i < 16; i++, off--) { + MII_SET_CLOCK(1); + retval <<= 1; + retval |= MII_GET_DATA(); + CYGACC_CALL_IF_DELAY_US(1); + MII_SET_CLOCK(0); + CYGACC_CALL_IF_DELAY_US(1); + } + } + + // Set both bits as output + eppc->pio_pddir |= MII_DATA | MII_CLOCK; + + // Postamble + for (i = 0; i < 32; i++) { + MII_SET_CLOCK(0); + MII_SET_DATA(1); + CYGACC_CALL_IF_DELAY_US(1); + MII_SET_CLOCK(1); + CYGACC_CALL_IF_DELAY_US(1); + } + + return retval; +} + +// +// PHY unit access (via MII channel) +// +static void +phy_write(int reg, int addr, unsigned short data) +{ + phy_cmd(MII_Start | MII_Write | MII_Phy(addr) | MII_Reg(reg) | MII_TA | data); +} + +static bool +phy_read(int reg, int addr, unsigned short *val) +{ + cyg_uint32 ret; + + ret = phy_cmd(MII_Start | MII_Read | MII_Phy(addr) | MII_Reg(reg) | MII_TA); + *val = ret; + return true; +} + +bool +_adder_reset_phy(void) +{ + volatile EPPC *eppc = (volatile EPPC *)eppc_base(); + int phy_timeout = 5*1000; // Wait 5 seconds max for link to clear + bool phy_ok; + unsigned short phy_state = 0; + int phy_unit = -1; + int i; + + // Reset PHY (transceiver) + eppc->pip_pbdat &= ~0x00004000; // Reset PHY chip + CYGACC_CALL_IF_DELAY_US(15000); // > 10ms + eppc->pip_pbdat |= 0x00004000; // Enable PHY chip + + phy_ok = false; + + // Try and discover how this PHY is wired + for (i = 0; i < 0x20; i++) { + phy_read(PHY_BMCR, i, &phy_state); + if ((phy_state & PHY_BMCR_RESET) == 0) { + phy_unit = i; + break; + } + } + if (phy_unit < 0) { + diag_printf("QUICC ETH - Can't locate PHY\n"); + return false; + } else { +#if 0 + diag_printf("QUICC ETH - using PHY %d\n", phy_unit); +#endif + } + if (phy_read(PHY_BMSR, phy_unit, &phy_state)) { + if ((phy_state & PHY_BMSR_LINK) != PHY_BMSR_LINK) { + unsigned short reset_mode; + phy_write(PHY_BMCR, phy_unit, PHY_BMCR_RESET); + for (i = 0; i < 10; i++) { + phy_ok = phy_read(PHY_BMCR, phy_unit, &phy_state); + if (!phy_ok) break; + if (!(phy_state & PHY_BMCR_RESET)) break; + } + if (!phy_ok || (phy_state & PHY_BMCR_RESET)) { + diag_printf("QUICC/ETH: Can't get PHY unit to soft reset: %x\n", phy_state); + return false; + } + reset_mode = PHY_BMCR_RESTART | PHY_BMCR_AUTO_NEG | PHY_BMCR_FULL_DUPLEX; + phy_write(PHY_BMCR, phy_unit, reset_mode); + while (phy_timeout-- >= 0) { + phy_ok = phy_read(PHY_BMSR, phy_unit, &phy_state); + if (phy_ok && (phy_state & PHY_BMSR_LINK)) { + break; + } else { + CYGACC_CALL_IF_DELAY_US(10000); // 10ms + } + } + if (phy_timeout <= 0) { + diag_printf("** QUICC/ETH Warning: PHY LINK UP failed\n"); + } + } + else { + diag_printf("** QUICC/ETH Info: PHY LINK already UP \n"); + } + } + + return phy_ok; +} +
new file mode 100644 --- /dev/null +++ b/packages/devs/flash/powerpc/adder/current/ChangeLog @@ -0,0 +1,41 @@ +2002-11-25 Gary Thomas <gthomas@ecoscentric.com> + + * src/adder_flash.c: + * cdl/flash_adder.cdl: New package - platform specific support + for Analogue & Micro Adder (PowerPC 850) boards. + +//=========================================================================== +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// Copyright (C) 2002 Gary Thomas +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//===========================================================================
new file mode 100644 --- /dev/null +++ b/packages/devs/flash/powerpc/adder/current/cdl/flash_adder.cdl @@ -0,0 +1,74 @@ +# ==================================================================== +# +# flash_adder.cdl +# +# FLASH memory - Hardware support on A&M PowerPC/8xx Adder +# +# ==================================================================== +#####ECOSGPLCOPYRIGHTBEGIN#### +## ------------------------------------------- +## This file is part of eCos, the Embedded Configurable Operating System. +## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +## Copyright (C) 2002 Gary Thomas +## +## eCos is free software; you can redistribute it and/or modify it under +## the terms of the GNU General Public License as published by the Free +## Software Foundation; either version 2 or (at your option) any later version. +## +## eCos is distributed in the hope that it will be useful, but WITHOUT ANY +## WARRANTY; without even the implied warranty of MERCHANTABILITY or +## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +## for more details. +## +## You should have received a copy of the GNU General Public License along +## with eCos; if not, write to the Free Software Foundation, Inc., +## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +## +## As a special exception, if other files instantiate templates or use macros +## or inline functions from this file, or you compile this file and link it +## with other works to produce a work based on this file, this file does not +## by itself cause the resulting work to be covered by the GNU General Public +## License. However the source code for this file must still be made available +## in accordance with section (3) of the GNU General Public License. +## +## This exception does not invalidate any other reasons why a work based on +## this file might be covered by the GNU General Public License. +## +## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +## at http://sources.redhat.com/ecos/ecos-license/ +## ------------------------------------------- +#####ECOSGPLCOPYRIGHTEND#### +# ==================================================================== +######DESCRIPTIONBEGIN#### +# +# Author(s): gthomas +# Original data: gthomas +# Contributors: +# Date: 2001-01-19 +# +#####DESCRIPTIONEND#### +# +# ==================================================================== + +cdl_package CYGPKG_DEVS_FLASH_POWERPC_ADDER { + display "A&M Adder (PowerPC/860) FLASH memory support" + + parent CYGPKG_IO_FLASH + active_if CYGPKG_IO_FLASH + requires CYGPKG_HAL_POWERPC_ADDER + + implements CYGHWR_IO_FLASH_DEVICE + + compile adder_flash.c + + # Arguably this should do in the generic package + # but then there is a logic loop so you can never enable it. + cdl_interface CYGINT_DEVS_FLASH_AMD_AM29XXXXX_REQUIRED { + display "Generic AMD flash driver required" + } + + implements CYGINT_DEVS_FLASH_AMD_AM29XXXXX_REQUIRED + requires CYGHWR_DEVS_FLASH_AMD_AM29LV320D + +} +
new file mode 100644 --- /dev/null +++ b/packages/devs/flash/powerpc/adder/current/src/adder_flash.c @@ -0,0 +1,74 @@ +//========================================================================== +// +// adder_flash.c +// +// Flash programming support +// +//========================================================================== +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// Copyright (C) 2002 Gary Thomas +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 2000-10-20 +// Purpose: +// Description: +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include <cyg/infra/cyg_type.h> + +//-------------------------------------------------------------------------- +// Device properties + +#define CYGNUM_FLASH_INTERLEAVE (1) +#define CYGNUM_FLASH_SERIES (1) +#define CYGNUM_FLASH_WIDTH (16) +#define CYGNUM_FLASH_BASE (0xFE000000) +#define CYGNUM_FLASH_16AS8 (0) + +//-------------------------------------------------------------------------- +// Platform specific extras +#define CYGHWR_FLASH_AM29XXXXX_NO_WRITE_PROTECT // This feature fails :-( + +//-------------------------------------------------------------------------- +// Now include the driver code. +#include "cyg/io/flash_am29xxxxx.inl" + +// ------------------------------------------------------------------------ +// EOF adder_flash.c
--- a/packages/ecos.db +++ b/packages/ecos.db @@ -483,6 +483,16 @@ package CYGPKG_DEVS_FLASH_VIPER { on the A&M PowerPC/8xx VIPER platform." } +package CYGPKG_DEVS_FLASH_POWERPC_ADDER { + alias { "FLASH memory support for A&M Adder PowerPC/85x" flash_adder } + directory devs/flash/powerpc/adder + script flash_adder.cdl + hardware + description " + This package contains hardware support for FLASH memory + on the A&M PowerPC/8xx ADDER platform." +} + package CYGPKG_DEVS_FLASH_MN10300_STB { alias { "FLASH memory support for Matsushita MN10300 STB" flash_stb } directory devs/flash/mn10300/stb @@ -1171,6 +1181,14 @@ package CYGPKG_DEVS_ETH_POWERPC_QUICC { description "Ethernet driver for PowerPC QUICC (MPC8xx) based boards." } +package CYGPKG_DEVS_ETH_POWERPC_MBX { + alias { "MBX ethernet driver specifics" mbx_eth_driver } + hardware + directory devs/eth/powerpc/mbx + script mbx_eth_drivers.cdl + description "Ethernet driver specifics for Motorola MBX PowerPC (MPC8xx) based boards." +} + package CYGPKG_DEVS_ETH_POWERPC_FEC { alias { "FEC ethernet driver" fec_eth_driver } hardware @@ -1187,6 +1205,14 @@ package CYGPKG_DEVS_ETH_POWERPC_VIPER { description "Ethernet driver specifics for A&M Viper (MPC8xxT) based boards." } +package CYGPKG_DEVS_ETH_POWERPC_ADDER { + alias { "A&M Adder ethernet driver" adder_eth_driver } + hardware + directory devs/eth/powerpc/adder + script adder_eth_drivers.cdl + description "Ethernet driver specifics for A&M Adder (MPC85x) based boards." +} + package CYGPKG_DEVS_ETH_INTEL_I82559 { alias { "Intel 82559 ethernet driver" devs_eth_intel_i82559 i82559_eth_driver } @@ -2491,6 +2517,16 @@ package CYGPKG_HAL_POWERPC_VIPER { eCos on a A&M VIPER board equipped with a PowerPC processor." } +package CYGPKG_HAL_POWERPC_ADDER { + alias { "A&M Adder PPC85x board" hal_powerpc_adder powerpc_adder_hal } + directory hal/powerpc/adder + script hal_powerpc_adder.cdl + hardware + description " + The ADDER HAL package provides the support needed to run + eCos on a A&M ADDER board equipped with a PowerPC processor." +} + package CYGPKG_HAL_QUICC { alias { "Motorola MBX860/821 QUICC support" hal_quicc quicc_hal quicc } directory hal/powerpc/quicc @@ -3680,6 +3716,7 @@ target mbx { CYGPKG_HAL_QUICC CYGPKG_IO_SERIAL_POWERPC_QUICC_SMC CYGPKG_DEVS_ETH_POWERPC_QUICC + CYGPKG_DEVS_ETH_POWERPC_MBX CYGPKG_DEVS_FLASH_MBX CYGPKG_DEVS_FLASH_AMD_AM29XXXXX } @@ -3705,6 +3742,23 @@ target viper { eCos on a A&M Viper PPC860 board." } +target adder { + alias { "A&M Adder PPC850 board" adder850 } + packages { CYGPKG_HAL_POWERPC + CYGPKG_HAL_POWERPC_MPC8xx + CYGPKG_HAL_POWERPC_ADDER + CYGPKG_HAL_QUICC + CYGPKG_DEVS_FLASH_POWERPC_ADDER + CYGPKG_DEVS_FLASH_AMD_AM29XXXXX + CYGPKG_DEVS_ETH_POWERPC_QUICC + CYGPKG_DEVS_ETH_POWERPC_ADDER + } +# CYGPKG_IO_SERIAL_POWERPC_QUICC_SMC + description " + The adder target provides the packages needed to run + eCos on a A&M Adder PPC850 board." +} + target psim { alias { "PowerPC simulator" ppc_sim powerpc_sim } packages { CYGPKG_HAL_POWERPC
new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/adder/current/ChangeLog @@ -0,0 +1,59 @@ +2002-11-25 Gary Thomas <gthomas@ecoscentric.com> + + * src/redboot_linux_exec.c: + * src/hal_diag.c: + * src/hal_aux.c: + * src/adder.S: + * misc/redboot_ROMRAM.ecm: + * include/pkgconf/mlt_powerpc_adder_romram.mlt: + * include/pkgconf/mlt_powerpc_adder_romram.ldi: + * include/pkgconf/mlt_powerpc_adder_romram.h: + * include/pkgconf/mlt_powerpc_adder_rom.mlt: + * include/pkgconf/mlt_powerpc_adder_rom.ldi: + * include/pkgconf/mlt_powerpc_adder_rom.h: + * include/pkgconf/mlt_powerpc_adder_ram.mlt: + * include/pkgconf/mlt_powerpc_adder_ram.ldi: + * include/pkgconf/mlt_powerpc_adder_ram.h: + * include/plf_stub.h: + * include/plf_regs.h: + * include/plf_intr.h: + * include/plf_cache.h: + * include/hal_diag.h: + * cdl/hal_powerpc_adder.cdl: New package - platform specifics for + Analogue & Micro Adder (PowerPC 850) boards. + +//=========================================================================== +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// Copyright (C) 2002 Gary Thomas +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//===========================================================================
new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/adder/current/cdl/hal_powerpc_adder.cdl @@ -0,0 +1,323 @@ +# ==================================================================== +# +# hal_powerpc_adder.cdl +# +# PowerPC/ADDER board HAL package configuration data +# +# ==================================================================== +#####ECOSGPLCOPYRIGHTBEGIN#### +## ------------------------------------------- +## This file is part of eCos, the Embedded Configurable Operating System. +## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +## Copyright (C) 2002 Gary Thomas +## +## eCos is free software; you can redistribute it and/or modify it under +## the terms of the GNU General Public License as published by the Free +## Software Foundation; either version 2 or (at your option) any later version. +## +## eCos is distributed in the hope that it will be useful, but WITHOUT ANY +## WARRANTY; without even the implied warranty of MERCHANTABILITY or +## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +## for more details. +## +## You should have received a copy of the GNU General Public License along +## with eCos; if not, write to the Free Software Foundation, Inc., +## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +## +## As a special exception, if other files instantiate templates or use macros +## or inline functions from this file, or you compile this file and link it +## with other works to produce a work based on this file, this file does not +## by itself cause the resulting work to be covered by the GNU General Public +## License. However the source code for this file must still be made available +## in accordance with section (3) of the GNU General Public License. +## +## This exception does not invalidate any other reasons why a work based on +## this file might be covered by the GNU General Public License. +## +## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +## at http://sources.redhat.com/ecos/ecos-license/ +## ------------------------------------------- +#####ECOSGPLCOPYRIGHTEND#### +# ==================================================================== +######DESCRIPTIONBEGIN#### +# +# Author(s): jskov +# Original data: hmt +# Contributors: gthomas +# Date: 1999-11-02 +# +#####DESCRIPTIONEND#### +# +# ==================================================================== + +cdl_package CYGPKG_HAL_POWERPC_ADDER { + display "A&M ADDER PowerPC evaluation board" + parent CYGPKG_HAL_POWERPC + requires CYGPKG_HAL_POWERPC_MPC8xx + define_header hal_powerpc_adder.h + include_dir cyg/hal + description " + The ADDER HAL package provides the support needed to run + eCos on a A&M ADDER board equipped with a PowerPC processor." + + compile hal_diag.c hal_aux.c adder.S + + implements CYGINT_HAL_DEBUG_GDB_STUBS + implements CYGINT_HAL_DEBUG_GDB_STUBS_BREAK + implements CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT + implements CYGNUM_HAL_QUICC_SMC2 + implements CYGNUM_HAL_QUICC_SCC3 + + define_proc { + puts $::cdl_system_header "#define CYGBLD_HAL_TARGET_H <pkgconf/hal_powerpc_mpc8xx.h>" + puts $::cdl_system_header "#define CYGBLD_HAL_VARIANT_H <pkgconf/hal_powerpc_quicc.h>" + puts $::cdl_system_header "#define CYGBLD_HAL_PLATFORM_H <pkgconf/hal_powerpc_adder.h>" + + puts $::cdl_header "#define HAL_PLATFORM_CPU \"PowerPC 850\"" + puts $::cdl_header "#define HAL_PLATFORM_BOARD \"A&M ADDER\"" + puts $::cdl_header "#define HAL_PLATFORM_EXTRA \"\"" + } + + cdl_component CYG_HAL_STARTUP { + display "Startup type" + flavor data + legal_values {"RAM" "ROM" "ROMRAM"} + default_value {"RAM"} + no_define + define -file system.h CYG_HAL_STARTUP + description " + This option is used to control where the application program will + run, either from RAM or ROM (flash) memory. ROM based applications + must be self contained, while RAM applications will typically assume + the existence of a debug environment, such as GDB stubs." + } + + cdl_option CYGHWR_HAL_POWERPC_BOARD_SPEED { + display "Development board clock speed (MHz)" + flavor data + legal_values { 47 } + default_value 47 + description " + ADDER Development Boards have various system clock speeds + depending on the processor fitted. Select the clock speed + appropriate for your board so that the system can set the serial + baud rate correctly, amongst other things." + } + + # Real-time clock/counter specifics + cdl_component CYGNUM_HAL_RTC_CONSTANTS { + display "Real-time clock constants." + description " + Period is busclock/16/100." + flavor none + + cdl_option CYGNUM_HAL_RTC_NUMERATOR { + display "Real-time clock numerator" + flavor data + calculated 1000000000 + } + cdl_option CYGNUM_HAL_RTC_DENOMINATOR { + display "Real-time clock denominator" + flavor data + calculated 100 + } + cdl_option CYGNUM_HAL_RTC_PERIOD { + display "Real-time clock period" + flavor data + calculated { ((((CYGHWR_HAL_POWERPC_BOARD_SPEED*1000000)/4)/16)/100) } + } + } + + cdl_component CYGBLD_GLOBAL_OPTIONS { + display "Global build options" + flavor none + description " + Global build options including control over + compiler flags, linker flags and choice of toolchain." + + + parent CYGPKG_NONE + + cdl_option CYGBLD_GLOBAL_COMMAND_PREFIX { + display "Global command prefix" + flavor data + no_define + default_value { "powerpc-eabi" } + description " + This option specifies the command prefix used when + invoking the build tools." + } + + cdl_option CYGBLD_GLOBAL_CFLAGS { + display "Global compiler flags" + flavor data + no_define + default_value { "-msoft-float -mcpu=860 -Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef -Woverloaded-virtual -g -O2 -ffunction-sections -fdata-sections -fno-rtti -fno-exceptions -fvtable-gc -finit-priority" } + description " + This option controls the global compiler flags which + are used to compile all packages by + default. Individual packages may define + options which override these global flags." + } + + cdl_option CYGBLD_GLOBAL_LDFLAGS { + display "Global linker flags" + flavor data + no_define + default_value { "-msoft-float -mcpu=860 -g -nostdlib -Wl,--gc-sections -Wl,-static" } + description " + This option controls the global linker flags. Individual + packages may define options which override these global flags." + } + + cdl_option CYGBLD_BUILD_GDB_STUBS { + display "Build GDB stub ROM image" + default_value 0 + requires { CYG_HAL_STARTUP == "ROM" } + requires CYGSEM_HAL_ROM_MONITOR + requires CYGBLD_BUILD_COMMON_GDB_STUBS + requires CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + requires CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT + requires CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT + requires ! CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT + requires ! CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM + no_define + description " + This option enables the building of the GDB stubs for the + board. The common HAL controls takes care of most of the + build process, but the platform CDL takes care of creating + an S-Record data file suitable for programming using + the board's EPPC-Bug firmware monitor." + + make -priority 320 { + <PREFIX>/bin/gdb_module.bin : <PREFIX>/bin/gdb_module.img + $(OBJCOPY) -O srec --change-address=0x02000000 $< $(@:.bin=.srec) + $(OBJCOPY) -O binary $< $@ + } + } + } + + cdl_component CYGPKG_HAL_POWERPC_ADDER_OPTIONS { + display "ADDER build options" + flavor none + description " + Package specific build options including control over + compiler flags used only in building this package, + and details of which tests are built." + + + cdl_option CYGPKG_HAL_POWERPC_ADDER_CFLAGS_ADD { + display "Additional compiler flags" + flavor data + no_define + default_value { "" } + description " + This option modifies the set of compiler flags for + building the ADDER HAL. These flags are used in addition + to the set of global flags." + } + + cdl_option CYGPKG_HAL_POWERPC_ADDER_CFLAGS_REMOVE { + display "Suppressed compiler flags" + flavor data + no_define + default_value { "" } + description " + This option modifies the set of compiler flags for + building the ADDER HAL. These flags are removed from + the set of global flags if present." + } + + cdl_option CYGPKG_HAL_POWERPC_ADDER_TESTS { + display "ADDER tests" + flavor data + no_define + calculated { "tests/addertime" } + description " + This option specifies the set of tests for the ADDER HAL." + } + } + + cdl_component CYGHWR_MEMORY_LAYOUT { + display "Memory layout" + flavor data + no_define + calculated { CYG_HAL_STARTUP == "RAM" ? "powerpc_adder_ram" : \ + CYG_HAL_STARTUP == "ROMRAM" ? "powerpc_adder_romram" : \ + "powerpc_adder_rom" } + + cdl_option CYGHWR_MEMORY_LAYOUT_LDI { + display "Memory layout linker script fragment" + flavor data + no_define + define -file system.h CYGHWR_MEMORY_LAYOUT_LDI + calculated { CYG_HAL_STARTUP == "RAM" ? "<pkgconf/mlt_powerpc_adder_ram.ldi>" : \ + CYG_HAL_STARTUP == "ROMRAM" ? "<pkgconf/mlt_powerpc_adder_romram.ldi>" : \ + "<pkgconf/mlt_powerpc_adder_rom.ldi>" } + } + + cdl_option CYGHWR_MEMORY_LAYOUT_H { + display "Memory layout header file" + flavor data + no_define + define -file system.h CYGHWR_MEMORY_LAYOUT_H + calculated { CYG_HAL_STARTUP == "RAM" ? "<pkgconf/mlt_powerpc_adder_ram.h>" : \ + CYG_HAL_STARTUP == "ROMRAM" ? "<pkgconf/mlt_powerpc_adder_romram.h>" : \ + "<pkgconf/mlt_powerpc_adder_rom.h>" } + } + } + + cdl_option CYGSEM_HAL_ROM_MONITOR { + display "Behave as a ROM monitor" + flavor bool + default_value 0 + parent CYGPKG_HAL_ROM_MONITOR + requires { CYG_HAL_STARTUP == "ROM" || CYG_HAL_STARTUP == "ROMRAM" } + description " + Enable this option if this program is to be used as a ROM monitor, + i.e. applications will be loaded into RAM on the board, and this + ROM monitor may process exceptions or interrupts generated from the + application. This enables features such as utilizing a separate + interrupt stack when exceptions are generated." + } + + cdl_component CYGPKG_REDBOOT_HAL_OPTIONS { + display "Redboot HAL options" + flavor none + no_define + parent CYGPKG_REDBOOT + active_if CYGPKG_REDBOOT + description " + This option lists the target's requirements for a valid Redboot + configuration." + + cdl_option CYGSEM_REDBOOT_HAL_LINUX_BOOT { + active_if CYGBLD_BUILD_REDBOOT_WITH_EXEC + display "Support booting Linux via RedBoot" + flavor bool + default_value 1 + description " + This option enables RedBoot to support booting of a Linux kernel." + + compile -library=libextras.a redboot_linux_exec.c + } + + cdl_option CYGBLD_BUILD_REDBOOT_BIN { + display "Build Redboot ROM binary image" + active_if CYGBLD_BUILD_REDBOOT + default_value 1 + no_define + description "This option enables the conversion of the Redboot ELF + image to a binary image suitable for ROM programming." + +# compile -library=libextras.a redboot_cmds.c + + make -priority 325 { + <PREFIX>/bin/redboot.bin : <PREFIX>/bin/redboot.elf + $(OBJCOPY) --strip-debug $< $(@:.bin=.img) + $(OBJCOPY) -O srec $< $(@:.bin=.srec) + $(OBJCOPY) -O binary $< $@ + } + } + } +}
new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/adder/current/include/hal_diag.h @@ -0,0 +1,70 @@ +#ifndef CYGONCE_HAL_HAL_DIAG_H +#define CYGONCE_HAL_HAL_DIAG_H + +//============================================================================= +// +// hal_diag.h +// +// HAL Support for Kernel Diagnostic Routines +// +//============================================================================= +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// Copyright (C) 2002 Gary Thomas +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg +// Contributors:nickg +// Date: 1998-03-02 +// Purpose: HAL Support for Kernel Diagnostic Routines +// Description: Diagnostic routines for use during kernel development. +// Usage: #include <cyg/hal/hal_diag.h> +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include <pkgconf/hal.h> + +#include <cyg/infra/cyg_type.h> + +#include <cyg/hal/hal_if.h> + +#define HAL_DIAG_INIT() hal_if_diag_init() +#define HAL_DIAG_WRITE_CHAR(_c_) hal_if_diag_write_char(_c_) +#define HAL_DIAG_READ_CHAR(_c_) hal_if_diag_read_char(&_c_) + +//----------------------------------------------------------------------------- +// end of hal_diag.h +#endif // CYGONCE_HAL_HAL_DIAG_H
new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/adder/current/include/pkgconf/mlt_powerpc_adder_ram.h @@ -0,0 +1,37 @@ +// eCos memory layout - Thu May 30 10:27:39 2002 + +// This is a generated file - do not edit + +#ifndef __ASSEMBLER__ +#include <cyg/infra/cyg_type.h> +#include <stddef.h> + +#endif +#define CYGMEM_REGION_ram (0) +#define CYGMEM_REGION_ram_SIZE (0x800000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__reserved_vectors) []; +#endif +#define CYGMEM_SECTION_reserved_vectors (CYG_LABEL_NAME (__reserved_vectors)) +#define CYGMEM_SECTION_reserved_vectors_SIZE (0x3000) +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__reserved_vsr_table) []; +#endif +#define CYGMEM_SECTION_reserved_vsr_table (CYG_LABEL_NAME (__reserved_vsr_table)) +#define CYGMEM_SECTION_reserved_vsr_table_SIZE (0x200) +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__reserved_virtual_table) []; +#endif +#define CYGMEM_SECTION_reserved_virtual_table (CYG_LABEL_NAME (__reserved_virtual_table)) +#define CYGMEM_SECTION_reserved_virtual_table_SIZE (0x100) +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__reserved_for_rom) []; +#endif +#define CYGMEM_SECTION_reserved_for_rom (CYG_LABEL_NAME (__reserved_for_rom)) +#define CYGMEM_SECTION_reserved_for_rom_SIZE (0x3cd00) +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__heap1) []; +#endif +#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1)) +#define CYGMEM_SECTION_heap1_SIZE (0x800000 - (size_t) CYG_LABEL_NAME (__heap1))
new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/adder/current/include/pkgconf/mlt_powerpc_adder_ram.ldi @@ -0,0 +1,31 @@ +// eCos memory layout - Thu May 30 10:27:39 2002 + +// This is a generated file - do not edit + +#include <cyg/infra/cyg_type.inc> + +MEMORY +{ + ram : ORIGIN = 0, LENGTH = 0x800000 +} + +SECTIONS +{ + SECTIONS_BEGIN + CYG_LABEL_DEFN(__reserved_vectors) = 0; . = CYG_LABEL_DEFN(__reserved_vectors) + 0x3000; + CYG_LABEL_DEFN(__reserved_vsr_table) = ALIGN (0x10); . = CYG_LABEL_DEFN(__reserved_vsr_table) + 0x200; + CYG_LABEL_DEFN(__reserved_virtual_table) = ALIGN (0x10); . = CYG_LABEL_DEFN(__reserved_virtual_table) + 0x100; + CYG_LABEL_DEFN(__reserved_for_rom) = ALIGN (0x10); . = CYG_LABEL_DEFN(__reserved_for_rom) + 0x3cd00; + SECTION_vectors (ram, ALIGN (0x10), LMA_EQ_VMA) + SECTION_text (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fini (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_rodata1 (ram, ALIGN (0x8), LMA_EQ_VMA) + SECTION_rodata (ram, ALIGN (0x8), LMA_EQ_VMA) + SECTION_fixup (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_gcc_except_table (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_data (ram, ALIGN (0x8), LMA_EQ_VMA) + SECTION_sbss (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_bss (ram, ALIGN (0x10), LMA_EQ_VMA) + CYG_LABEL_DEFN(__heap1) = ALIGN (0x8); + SECTIONS_END +}
new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/adder/current/include/pkgconf/mlt_powerpc_adder_ram.mlt @@ -0,0 +1,17 @@ +version 0 +region ram 0 800000 0 ! +section reserved_vectors 3000 1 0 0 1 1 1 1 0 0 reserved_vsr_table reserved_vsr_table ! +section reserved_vsr_table 200 10 0 0 0 1 0 1 reserved_virtual_table reserved_virtual_table ! +section reserved_virtual_table 100 10 0 0 0 1 0 1 reserved_for_rom reserved_for_rom ! +section reserved_for_rom 3cd00 10 0 0 0 1 0 1 vectors vectors ! +section vectors 0 10 0 1 0 1 0 1 text text ! +section text 0 4 0 1 0 1 0 1 fini fini ! +section fini 0 4 0 1 0 1 0 1 rodata1 rodata1 ! +section rodata1 0 8 0 1 0 1 0 1 rodata rodata ! +section rodata 0 8 0 1 0 1 0 1 fixup fixup ! +section fixup 0 4 0 1 0 1 0 1 gcc_except_table gcc_except_table ! +section gcc_except_table 0 1 0 1 0 1 0 1 data data ! +section data 0 8 0 1 0 1 0 1 sbss sbss ! +section sbss 0 4 0 1 0 1 0 1 bss bss ! +section bss 0 10 0 1 0 1 0 1 heap1 heap1 ! +section heap1 0 8 0 0 0 0 0 0 !
new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/adder/current/include/pkgconf/mlt_powerpc_adder_rom.h @@ -0,0 +1,35 @@ +// eCos memory layout - Thu May 30 10:21:41 2002 + +// This is a generated file - do not edit + +#ifndef __ASSEMBLER__ +#include <cyg/infra/cyg_type.h> +#include <stddef.h> + +#endif +#define CYGMEM_REGION_ram (0) +#define CYGMEM_REGION_ram_SIZE (0x800000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) +#define CYGMEM_REGION_rom (0xfe000000) +#define CYGMEM_REGION_rom_SIZE (0x800000) +#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R) +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__reserved_vectors) []; +#endif +#define CYGMEM_SECTION_reserved_vectors (CYG_LABEL_NAME (__reserved_vectors)) +#define CYGMEM_SECTION_reserved_vectors_SIZE (0x3000) +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__reserved_vsr_table) []; +#endif +#define CYGMEM_SECTION_reserved_vsr_table (CYG_LABEL_NAME (__reserved_vsr_table)) +#define CYGMEM_SECTION_reserved_vsr_table_SIZE (0x200) +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__reserved_virtual_table) []; +#endif +#define CYGMEM_SECTION_reserved_virtual_table (CYG_LABEL_NAME (__reserved_virtual_table)) +#define CYGMEM_SECTION_reserved_virtual_table_SIZE (0x100) +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__heap1) []; +#endif +#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1)) +#define CYGMEM_SECTION_heap1_SIZE (0x800000 - (size_t) CYG_LABEL_NAME (__heap1))
new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/adder/current/include/pkgconf/mlt_powerpc_adder_rom.ldi @@ -0,0 +1,31 @@ +// eCos memory layout - Thu May 30 10:21:41 2002 + +// This is a generated file - do not edit + +#include <cyg/infra/cyg_type.inc> + +MEMORY +{ + ram : ORIGIN = 0, LENGTH = 0x800000 + rom : ORIGIN = 0xfe000000, LENGTH = 0x800000 +} + +SECTIONS +{ + SECTIONS_BEGIN + SECTION_vectors (rom, 0xfe000000, LMA_EQ_VMA) + SECTION_text (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fini (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_rodata1 (rom, ALIGN (0x8), LMA_EQ_VMA) + SECTION_rodata (rom, ALIGN (0x8), LMA_EQ_VMA) + SECTION_fixup (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_gcc_except_table (rom, ALIGN (0x1), LMA_EQ_VMA) + CYG_LABEL_DEFN(__reserved_vectors) = 0; . = CYG_LABEL_DEFN(__reserved_vectors) + 0x3000; + CYG_LABEL_DEFN(__reserved_vsr_table) = ALIGN (0x1); . = CYG_LABEL_DEFN(__reserved_vsr_table) + 0x200; + CYG_LABEL_DEFN(__reserved_virtual_table) = ALIGN (0x1); . = CYG_LABEL_DEFN(__reserved_virtual_table) + 0x100; + SECTION_data (ram, ALIGN (0x10), FOLLOWING (.gcc_except_table)) + SECTION_sbss (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_bss (ram, ALIGN (0x10), LMA_EQ_VMA) + CYG_LABEL_DEFN(__heap1) = ALIGN (0x8); + SECTIONS_END +}
new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/adder/current/include/pkgconf/mlt_powerpc_adder_rom.mlt @@ -0,0 +1,17 @@ +version 0 +region ram 0 800000 0 ! +region rom fe000000 800000 1 ! +section reserved_vectors 3000 1 0 0 1 1 1 1 0 0 reserved_vsr_table reserved_vsr_table ! +section reserved_vsr_table 200 1 0 0 0 1 0 1 reserved_virtual_table reserved_virtual_table ! +section reserved_virtual_table 100 1 0 0 0 1 0 0 data ! +section data 0 10 1 1 0 1 0 0 sbss ! +section sbss 0 4 0 1 0 1 0 1 bss bss ! +section bss 0 10 0 1 0 1 0 1 heap1 heap1 ! +section heap1 0 8 0 0 0 0 0 0 ! +section vectors 0 1 0 1 1 1 1 1 fe000000 fe000000 text text ! +section text 0 4 0 1 0 1 0 1 fini fini ! +section fini 0 4 0 1 0 1 0 1 rodata1 rodata1 ! +section rodata1 0 8 0 1 0 1 0 1 rodata rodata ! +section rodata 0 8 0 1 0 1 0 1 fixup fixup ! +section fixup 0 4 0 1 0 1 0 1 gcc_except_table gcc_except_table ! +section gcc_except_table 0 1 0 1 0 0 0 1 data !
new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/adder/current/include/pkgconf/mlt_powerpc_adder_romram.h @@ -0,0 +1,17 @@ +// eCos memory layout - Thu May 30 10:05:45 2002 + +// This is a generated file - do not edit + +#ifndef __ASSEMBLER__ +#include <cyg/infra/cyg_type.h> +#include <stddef.h> + +#endif +#define CYGMEM_REGION_ram (0) +#define CYGMEM_REGION_ram_SIZE (0x800000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__heap1) []; +#endif +#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1)) +#define CYGMEM_SECTION_heap1_SIZE (0x800000 - (size_t) CYG_LABEL_NAME (__heap1))
new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/adder/current/include/pkgconf/mlt_powerpc_adder_romram.ldi @@ -0,0 +1,27 @@ +// eCos memory layout - Thu May 30 10:05:45 2002 + +// This is a generated file - do not edit + +#include <cyg/infra/cyg_type.inc> + +MEMORY +{ + ram : ORIGIN = 0, LENGTH = 0x800000 +} + +SECTIONS +{ + SECTIONS_BEGIN + SECTION_vectors (ram, 0, LMA_EQ_VMA) + SECTION_text (ram, 0x3400, LMA_EQ_VMA) + SECTION_fini (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_rodata1 (ram, ALIGN (0x8), LMA_EQ_VMA) + SECTION_rodata (ram, ALIGN (0x8), LMA_EQ_VMA) + SECTION_fixup (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_gcc_except_table (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_data (ram, ALIGN (0x8), LMA_EQ_VMA) + SECTION_sbss (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_bss (ram, ALIGN (0x10), LMA_EQ_VMA) + CYG_LABEL_DEFN(__heap1) = ALIGN (0x8); + SECTIONS_END +}
new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/adder/current/include/pkgconf/mlt_powerpc_adder_romram.mlt @@ -0,0 +1,13 @@ +version 0 +region ram 0 800000 0 ! +section vectors 0 1 0 1 1 0 1 0 0 0 ! +section text 0 1 0 1 1 1 1 1 3400 3400 fini fini ! +section fini 0 4 0 1 0 1 0 1 rodata1 rodata1 ! +section rodata1 0 8 0 1 0 1 0 1 rodata rodata ! +section rodata 0 8 0 1 0 1 0 1 fixup fixup ! +section fixup 0 4 0 1 0 1 0 1 gcc_except_table gcc_except_table ! +section gcc_except_table 0 1 0 1 0 1 0 1 data data ! +section data 0 8 0 1 0 1 0 1 sbss sbss ! +section sbss 0 4 0 1 0 1 0 1 bss bss ! +section bss 0 10 0 1 0 1 0 1 heap1 heap1 ! +section heap1 0 8 0 0 0 0 0 0 !
new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/adder/current/include/plf_cache.h @@ -0,0 +1,65 @@ +#ifndef CYGONCE_PLF_CACHE_H +#define CYGONCE_PLF_CACHE_H + +//============================================================================= +// +// plf_cache.h +// +// Platform HAL cache details +// +//============================================================================= +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// Copyright (C) 2002 Gary Thomas +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jskov +// Contributors:jskov +// Date: 2000-01-26 +// Purpose: Platform cache control API +// Description: The macros defined here provide the platform specific +// cache control operations / behavior. +// Usage: Is included via the architecture cache header: +// #include <cyg/hal/hal_cache.h> +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +//--------------------------------------------------------------------------- +// Initial cache enabling - controlled by common CDL + +//----------------------------------------------------------------------------- +#endif // ifndef CYGONCE_PLF_CACHE_H +// End of plf_cache.h
new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/adder/current/include/plf_intr.h @@ -0,0 +1,83 @@ +#ifndef CYGONCE_HAL_PLF_INTR_H +#define CYGONCE_HAL_PLF_INTR_H + +//========================================================================== +// +// plf_intr.h +// +// A&M Adder platform specific interrupt definitions +// +//========================================================================== +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// Copyright (C) 2002 Gary Thomas +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jskov +// Contributors: jskov +// Date: 2000-06-13 +// Purpose: Define platform specific interrupt support +// +// Usage: +// #include <cyg/hal/plf_intr.h> +// ... +// +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include <pkgconf/hal.h> + +#include <cyg/infra/cyg_type.h> + +//-------------------------------------------------------------------------- +// Control-C support. + +// Defined by the quicc driver +#include <cyg/hal/quicc/quicc_smc1.h> + + +//---------------------------------------------------------------------------- +// Reset. + +// The ADDER does not have a watchdog (not one we can easily use for this +// purpose anyway). +#define HAL_PLATFORM_RESET() CYG_EMPTY_STATEMENT + +#define HAL_PLATFORM_RESET_ENTRY 0xfe000100 + +//-------------------------------------------------------------------------- +#endif // ifndef CYGONCE_HAL_PLF_INTR_H +// End of plf_intr.h
new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/adder/current/include/plf_regs.h @@ -0,0 +1,60 @@ +#ifndef CYGONCE_HAL_PLF_REGS_H +#define CYGONCE_HAL_PLF_REGS_H + +//========================================================================== +// +// plf_regs.h +// +// PowerPC 8xx platform CPU definitions +// +//========================================================================== +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 2002 Gary Thomas +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 2002-06-27 +// Purpose: +// Description: Possibly override any platform assumptions +// +// Usage: Included via the variant+architecture register headers: +// ... +// +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#endif // CYGONCE_HAL_PLF_REGS_H
new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/adder/current/include/plf_stub.h @@ -0,0 +1,88 @@ +#ifndef CYGONCE_HAL_PLF_STUB_H +#define CYGONCE_HAL_PLF_STUB_H + +//============================================================================= +// +// plf_stub.h +// +// Platform header for GDB stub support. +// +//============================================================================= +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// Copyright (C) 2002 Gary Thomas +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jskov +// Contributors:jskov +// Date: 1999-02-12 +// Purpose: Platform HAL stub support for PowerPC/ADDER board. +// Usage: #include <cyg/hal/plf_stub.h> +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include <pkgconf/hal.h> + +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + +#include <cyg/infra/cyg_type.h> // CYG_UNUSED_PARAM + +#include <cyg/hal/ppc_stub.h> // architecture stub support + +//---------------------------------------------------------------------------- +// Define some platform specific communication details. This is mostly +// handled by hal_if now, but we need to make sure the comms tables are +// properly initialized. + +externC void cyg_hal_plf_comms_init(void); + +#define HAL_STUB_PLATFORM_INIT_SERIAL() cyg_hal_plf_comms_init() + +#define HAL_STUB_PLATFORM_SET_BAUD_RATE(baud) CYG_UNUSED_PARAM(int, (baud)) +#define HAL_STUB_PLATFORM_INIT_BREAK_IRQ() CYG_EMPTY_STATEMENT +#define HAL_STUB_PLATFORM_INTERRUPTIBLE 0 +//---------------------------------------------------------------------------- +// Stub initializer. +externC void hal_adder_set_led( int val ); +#ifdef CYG_HAL_STARTUP_ROM +//# define HAL_STUB_PLATFORM_INIT() hal_adder_set_led( 4 ) +// to distinguish eCos stub ROM ready state from either CygMon or app. +#endif + +#endif // ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS +//----------------------------------------------------------------------------- +#endif // CYGONCE_HAL_PLF_STUB_H +// End of plf_stub.h
new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/adder/current/misc/redboot_ROMRAM.ecm @@ -0,0 +1,106 @@ +cdl_savefile_version 1; +cdl_savefile_command cdl_savefile_version {}; +cdl_savefile_command cdl_savefile_command {}; +cdl_savefile_command cdl_configuration { description hardware template package }; +cdl_savefile_command cdl_package { value_source user_value wizard_value inferred_value }; +cdl_savefile_command cdl_component { value_source user_value wizard_value inferred_value }; +cdl_savefile_command cdl_option { value_source user_value wizard_value inferred_value }; +cdl_savefile_command cdl_interface { value_source user_value wizard_value inferred_value }; + +cdl_configuration eCos { + description "" ; + hardware adder ; + template redboot ; + package -hardware CYGPKG_HAL_POWERPC current ; + package -hardware CYGPKG_HAL_POWERPC_MPC8xx current ; + package -hardware CYGPKG_HAL_POWERPC_ADDER current ; + package -hardware CYGPKG_HAL_QUICC current ; + package -hardware CYGPKG_DEVS_FLASH_POWERPC_ADDER current ; + package -hardware CYGPKG_DEVS_FLASH_AMD_AM29XXXXX current ; + package -template CYGPKG_HAL current ; + package -template CYGPKG_INFRA current ; + package -template CYGPKG_REDBOOT current ; + package -template CYGPKG_ISOINFRA current ; + package -template CYGPKG_LIBC_STRING current ; + package -template CYGPKG_NS_DNS current ; + package -template CYGPKG_CRC current ; + package CYGPKG_IO_FLASH current ; +}; + +cdl_option CYGFUN_LIBC_STRING_BSD_FUNCS { + inferred_value 0 +}; + +cdl_option CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE { + user_value 4096 +}; + +cdl_option CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT { + user_value 0 +}; + +cdl_option CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM { + inferred_value 0 +}; + +cdl_option CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS { + inferred_value 1 +}; + +cdl_option CYGSEM_HAL_ROM_MONITOR { + inferred_value 1 +}; + +cdl_component CYG_HAL_STARTUP { + user_value ROMRAM +}; + +cdl_component CYGBLD_BUILD_REDBOOT { + user_value 1 +}; + +cdl_option CYGBLD_REDBOOT_MIN_IMAGE_SIZE { + user_value 0x00030000 +}; + +cdl_option CYGOPT_REDBOOT_FIS_REDBOOT_BACKUP { + user_value 0 +}; + +cdl_option CYGSEM_REDBOOT_FLASH_COMBINED_FIS_AND_CONFIG { + user_value 1 +}; + +cdl_option CYGBLD_ISO_STRTOK_R_HEADER { + inferred_value 1 <cyg/libc/string/string.h> +}; + +cdl_option CYGBLD_ISO_STRING_LOCALE_FUNCS_HEADER { + inferred_value 1 <cyg/libc/string/string.h> +}; + +cdl_option CYGBLD_ISO_STRING_BSD_FUNCS_HEADER { + inferred_value 1 <cyg/libc/string/bsdstring.h> +}; + +cdl_option CYGBLD_ISO_STRING_MEMFUNCS_HEADER { + inferred_value 1 <cyg/libc/string/string.h> +}; + +cdl_option CYGBLD_ISO_STRING_STRFUNCS_HEADER { + inferred_value 1 <cyg/libc/string/string.h> +}; + +cdl_option CYGBLD_ISO_DNS_HEADER { + inferred_value 1 <cyg/ns/dns/dns.h> +}; + +cdl_option CYGPKG_NS_DNS_BUILD { + inferred_value 0 +}; + +cdl_option CYGHWR_DEVS_FLASH_AMD_AM29LV320D { + inferred_value 1 +}; + +
new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/adder/current/src/adder.S @@ -0,0 +1,471 @@ +##============================================================================= +## +## adder.S +## +## ADDER board hardware setup +## +##============================================================================= +#####ECOSGPLCOPYRIGHTBEGIN#### +## ------------------------------------------- +## This file is part of eCos, the Embedded Configurable Operating System. +## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +## Copyright (C) 2002 Gary Thomas +## +## eCos is free software; you can redistribute it and/or modify it under +## the terms of the GNU General Public License as published by the Free +## Software Foundation; either version 2 or (at your option) any later version. +## +## eCos is distributed in the hope that it will be useful, but WITHOUT ANY +## WARRANTY; without even the implied warranty of MERCHANTABILITY or +## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +## for more details. +## +## You should have received a copy of the GNU General Public License along +## with eCos; if not, write to the Free Software Foundation, Inc., +## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +## +## As a special exception, if other files instantiate templates or use macros +## or inline functions from this file, or you compile this file and link it +## with other works to produce a work based on this file, this file does not +## by itself cause the resulting work to be covered by the GNU General Public +## License. However the source code for this file must still be made available +## in accordance with section (3) of the GNU General Public License. +## +## This exception does not invalidate any other reasons why a work based on +## this file might be covered by the GNU General Public License. +## +## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +## at http://sources.redhat.com/ecos/ecos-license/ +## ------------------------------------------- +#####ECOSGPLCOPYRIGHTEND#### +##============================================================================= +#######DESCRIPTIONBEGIN#### +## +## Author(s): hmt +## Contributors:hmt, gthomas +## Date: 1999-06-08 +## Purpose: ADDER board hardware setup +## Description: This file contains any code needed to initialize the +## hardware on a ADDER PPC860 board. +## +######DESCRIPTIONEND#### +## +##============================================================================= + +#include <pkgconf/hal.h> + +#include <cyg/hal/arch.inc> /* register symbols et al */ +#include <cyg/hal/ppc_regs.h> /* on-chip resource layout, special */ + /* registers, IMM layout... */ +#include <cyg/hal/quicc/ppc8xx.h> /* more of the same */ + +#------------------------------------------------------------------------------ +# this is controlled with one define for tidiness: +# (and it is undefined by default) + +//#define CYGPRI_RAM_START_PROGRAMS_UPMS + +#if defined(CYG_HAL_STARTUP_ROM) \ + || defined(CYG_HAL_STARTUP_ROMRAM) \ + || defined(CYGPRI_RAM_START_PROGRAMS_UPMS) +# define CYGPRI_DO_PROGRAM_UPMS +#endif + +/* The intention is that we only set up the UPMs in ROM start, be it actual + * ROM application start or Stub ROMs that we built from the same sources. + * + * The alternative approach - in which we have reliability doubts - is to + * program the UPMs with *old* timing data in StubROM start, then + * *reprogram* them with *new* timing data in RAM start - and of course + * program with *new* timing data in plain ROM application start. + * (Re-programming from new to new timing data fails - hence the suspicion + * of reprogramming _at_all_, hence this private configuration) + * + * With CYGPRI_RAM_START_PROGRAMS_UPMS left undefined, the former behaviour + * - programming the UPMs exactly once - is obtained. Define it to get the + * latter, untrusted behaviour. + */ + +#------------------------------------------------------------------------------ + +FUNC_START( hal_hardware_init ) + + # Throughout this routine, r4 is the base address of the control + # registers. r3 and r5 are scratch in general. + + lwi r4,CYGARC_REG_IMM_BASE # base address of control registers + mtspr CYGARC_REG_IMMR,r4 + +#define CACHE_UNLOCKALL 0x0a00 +#define CACHE_DISABLE 0x0400 +#define CACHE_INVALIDATEALL 0x0c00 +#define CACHE_ENABLE 0x0200 +#define CACHE_ENABLEBIT 0x8000 + +#define CACHE_FORCEWRITETHROUGH 0x0100 +#define CACHE_NOWRITETHROUGH 0x0300 +#define CACHE_CLEAR_LE_SWAP 0x0700 + + # DATA CACHE + mfspr r3,CYGARC_REG_DC_CST /* clear error bits */ + lis r3,CACHE_UNLOCKALL + sync + mtspr CYGARC_REG_DC_CST,r3 /* unlock all lines */ + + lis r3,CACHE_INVALIDATEALL + sync + mtspr CYGARC_REG_DC_CST,r3 /* invalidate all lines */ + + lis r3,CACHE_DISABLE + sync + mtspr CYGARC_REG_DC_CST,r3 /* disable */ + + lis r3,CACHE_FORCEWRITETHROUGH + sync + mtspr CYGARC_REG_DC_CST,r3 /* set force-writethrough mode */ + + lis r3,CACHE_CLEAR_LE_SWAP + sync + mtspr CYGARC_REG_DC_CST,r3 /* clear little-endian swap mode */ + /* (dunno what this is, but it sounds like a bad thing) */ + + # INSTRUCTION CACHE (no writeback modes) + mfspr r3,CYGARC_REG_IC_CST /* clear error bits */ + lis r3,CACHE_UNLOCKALL + mtspr CYGARC_REG_IC_CST,r3 /* unlock all lines */ + isync + lis r3,CACHE_INVALIDATEALL + mtspr CYGARC_REG_IC_CST,r3 /* invalidate all lines */ + isync + lis r3,CACHE_DISABLE + mtspr CYGARC_REG_IC_CST,r3 /* disable */ + isync + + sync + + /* + * SIU Initialization. + */ + lwi r3,0x00610400 + stw r3,SIUMCR(r4) + +#ifdef CYG_HAL_STARTUP_ROMRAM +// Need to set the PC into the FLASH (ROM) before the address map changes + lwi r3,10f + lwi r5,0xFE000000 + or r3,r3,r5 + mtctr r3 + bctr +10: +#endif + + /* + * Enable bus monitor. Disable Watchdog timer. + */ + lwi r3,0xffffff88 + stw r3,SYPCR(r4) + + /* + * Clear REFA & REFB. Enable but freeze timebase. + */ + lwi r3,0x0000 // FIXME: should this be 0x0000 or 0x00C2 + sth r3,TBSCR(r4) + + /* + * Unlock some RTC registers (see section 5.11.2) + */ + lwi r3,0x55ccaa33 + stw r3,RTCSCK(r4) + stw r3,RTCK(r4) + stw r3,RTSECK(r4) + stw r3,RTCALK(r4) + + /* + * Clear SERC & ALR. RTC runs on freeze. Enable RTC. + */ + li r3,0x0000 // FIXME: should this be 0x0000 or 0x00C3 + sth r3,RTCSC(r4) + + /* + * Clear periodic timer interrupt status. + * Enable periodic timer and stop it on freeze. + */ + li r3,0x0001 // FIXME: should this be 0x0001 or 0x0083 + sth r3,PISCR(r4) + +#ifdef CYGPRI_DO_PROGRAM_UPMS + /* + * Perform UPM programming by writing to its 64 RAM locations. + * Note that UPM initialization must be done before the Bank Register + * initialization. Otherwise, system may hang when writing to Bank + * Registers in certain cases. + */ + lis r5,__upmtbl_start@h + ori r5,r5,__upmtbl_start@l + lis r6,__upmtbl_end@h + ori r6,r6,__upmtbl_end@l + sub r7,r6,r5 /* size of table */ + srawi r7,r7,2 /* in words */ + + li r6,0x00000000 /* Command - OP=Write, UPMA, MAD=0 */ + 1: + lwz r3,0(r5) /* get data from table */ + stw r3,MDR(r4) /* store the data to MD register */ + stw r6,MCR(r4) /* issue command to MCR register */ + addi r5,r5,4 /* next entry in the table */ + addi r6,r6,1 /* next MAD address */ + cmpw r6,r7 /* done yet ? */ + blt 1b +#endif // CYGPRI_DO_PROGRAM_UPMS + + /* + * Set refresh timer prescaler to divide by 8. + */ + li r3,PTP_DIV32 + sth r3,MPTPR(r4) + + /* + * See Table 15-16 MPC860 User's Manual. + * +// Set the value of Machine A Mode Register (MAMR) to $5E802114. +// Field PTA (bits 0-7) = 94 +// Field PTAE (bit 8) = 1 +// Field AMA (bits 9-11) = 0 +// Field Reserved (bit 12) = 0 +// Field DSA (bits 13-14) = 0 +// Field Reserved (bit 15) = 0 +// Field G0CLA (bits 16-18) = 1 +// Field GPL_A4DIS (bit 19) = 0 +// Field RLFA (bits 20-23) = 1 +// Field WLFA (bits 24-27) = 1 +// Field TLFA (bits 28-31) = 4 + */ + +// +// PTA field is (System Clock in MHz * Refresh rate in us) / Prescale +// e.g. ((14*3.6864)*62.5)/32 => 100.8 => 101 +// +#if (CYGHWR_HAL_POWERPC_BOARD_SPEED == 47) +#define PLPRCR_PTX 0x00C // (47MHz/3.6864MHz)-1 +#define MAMR_PTA 94 +#endif +#if (CYGHWR_HAL_POWERPC_BOARD_SPEED == 51) +#define PLPRCR_PTX 0x00D // (51.6MHz/3.6864MHz)-1 +#define MAMR_PTA 101 +#endif +#if (CYGHWR_HAL_POWERPC_BOARD_SPEED == 55) +#define PLPRCR_PTX 0x00E // (55.3MHz/3.6864MHz)-1 +#define MAMR_PTA 108 +#endif +#if (CYGHWR_HAL_POWERPC_BOARD_SPEED == 59) +#define PLPRCR_PTX 0x00F // (58.9MHz/3.6864MHz)-1 +#define MAMR_PTA 116 +#endif +#if (CYGHWR_HAL_POWERPC_BOARD_SPEED == 63) +#define PLPRCR_PTX 0x010 // (62.7MHz/3.6864MHz)-1 +#define MAMR_PTA 123 +#endif +//#define MAMR_PTA (((((((PLPRCR_PTX+1)*3686400)*625)/10000000)+31)/32)&0xFF) + lwi r3,0x00802114|(MAMR_PTA<<24) + stw r3,MAMR(r4) + stw r3,MBMR(r4) + + /* + * Base Register initialization. + */ + + /* BOOT ROM */ + lwi r3,0xFE000801 # 16-bit, GPCM + lwi r5,0xFF800774 # 7 wait states, up to 8MB + stw r3,BR0(r4) + stw r5,OR0(r4) + + /* Misc I/O, 16 bit port */ + lwi r3,0xFA100801 + lwi r5,0xFFFF8730 + stw r3,BR2(r4) + stw r5,OR2(r4) + + /* ONBOARD DRAM */ + lwi r3,0x00000081 # 32-bit, UPMA + lwi r5,0xFF800E00 + stw r3,BR1(r4) + stw r5,OR1(r4) + + /* DRAM DIMM BANK1 */ + lwi r3,0x00000080 # 32-bit, UPMA, INVALID + lwi r5,0xFFFF87FC + stw r3,BR3(r4) + stw r5,OR3(r4) + +#if 0 + /* NVRAM */ + lwi r3,0xfa000401 # 8-bit, GPCM + lwi r5,0xffe00930 + stw r3,BR4(r4) + stw r5,OR4(r4) + + /* PCI BRIDGE MEM/IO */ + lwi r3,0x80000001 # 32-bit, GPCM + lwi r5,0xa0000108 + stw r3,BR5(r4) + stw r5,OR5(r4) + + /* PCI BRIDGE REGISTERS */ + lwi r3,0xfa210001 # 32-bit, GPCM + lwi r5,0xffff0108 + stw r3,BR6(r4) + stw r5,OR6(r4) + + /* FLASH */ + lwi r3,0xfc000001 # 32-bit, GPCM + lwi r5,0xff800940 + stw r3,BR7(r4) + stw r5,OR7(r4) +#endif + + /* + * SYSTEM CLOCK CONTROL REGISTER +// Set the value of System Clock and Reset Control Register (SCCR) to $00400000. +// Field Reserved (bit 0) = 0 +// Field COM (bits 1-2) = 0 +// Field Reserved (bits 3-5) = 0 +// Field TBS (bit 6) = 0 +// Field RTDIV (bit 7) = 0 +// Field RTSEL (bit 8) = 0 +// Field CRQEN (bit 9) = 1 +// Field PRQEN (bit 10) = 0 +// Field Reserved (bits 11-12) = 0 +// Field EBDF (bits 13-14) = 0 +// Field Reserved (bits 15-16) = 0 +// Field DFSYNC (bits 17-18) = 0 +// Field DFBRG (bits 19-20) = 0 +// Field DFNL (bits 21-23) = 0 +// Field DFNH (bits 24-26) = 0 +// Field Reserved (bits 27-31) = 0 + */ + lwi r3,0x00400000 + stw r3,SCCR(r4) + + /* + * PLL, LOW POWER, AND RESET CONTROL REGISTER +// Set the value of PLL, Low Power and Reset Control Register (PLPRCR) to $00C04000. +// Field MF (bits 0-11) = 12 +// Field Reserved (bits 12-15) = 0 +// Field SPLSS (bit 16) = 0 +// Field TEXPS (bit 17) = 1 +// Field Reserved (bit 18) = 0 +// Field TMIST (bit 19) = 0 +// Field Reserved (bit 20) = 0 +// Field CSRC (bit 21) = 0 +// Field LPM (bits 22-23) = 0 +// Field CSR (bit 24) = 0 +// Field LOLRE (bit 25) = 0 +// Field FIOPD (bit 26) = 0 +// Field Reserved (bits 27-31) = 0 + */ + lwi r3,0x04000|(PLPRCR_PTX<<20) + stw r3,PLPRCR(r4) + + lwi r3,0x40000 + mtctr r3 +10: nop + bdnz 10b + + /* SDRAM Initialization Sequence, UPMA, CS1 */ + li r3,0 + stw r3,MAR(r4) + + lwi r3,0x80002115; /* run precharge from loc 21 (0x15) */ + stw r3,MCR(r4) + + lwi r3,0x80002830; /* run refresh 8 times */ + stw r3,MCR(r4) + + lwi r3,0x88; /* MR 88 for high range */ + stw r3,MAR(r4) + + lwi r3,0x80002116; /* run MRS pattern from loc 22 (0x16) */ + stw r3,MCR(r4) + + # mask interrupt sources in the SIU + lis r2,0 + lwi r3,CYGARC_REG_IMM_SIMASK + stw r2,0(r3) + + # set the decrementer to maxint + lwi r2,0 + not r2,r2 + mtdec r2 + + # and enable the timebase and decrementer to make sure + li r2,1 # TBEnable and not TBFreeze + lwi r3,CYGARC_REG_IMM_TBSCR + sth r2,0(r3) + +#ifdef CYG_HAL_STARTUP_ROM + # move return address to where the ROM is + mflr r3 + lwi r4,0x00FFFFFF // CAUTION!! Assumes only low 16M for ROM + and r3,r3,r4 + oris r3,r3,CYGMEM_REGION_rom>>16 + mtlr r3 +#endif + +#ifdef CYG_HAL_STARTUP_ROMRAM + // Copy image from ROM to RAM + mflr r3 + lwi r4,0xFE000000 + lwi r5,0x01FFFFFF // ROM/FLASH base + and r3,r3,r5 // segment relative + lwi r6,_hal_hardware_init_done + mtlr r6 + sub r6,r3,r6 // Absolute address + add r6,r6,r4 // FLASH address + lwi r7,0 // where to copy to + lwi r8,__ram_data_end +10: lwz r5,0(r6) + stw r5,0(r7) + addi r6,r6,4 + addi r7,r7,4 + cmplw r7,r8 + bne 10b +#endif + + blr +FUNC_END( hal_hardware_init ) + + +#ifdef CYGPRI_DO_PROGRAM_UPMS +# ------------------------------------------------------------------------- +# this table initializes the User Programmable Machine (UPM) nastiness +# in the QUICC to control DRAM timing. + +__upmtbl_start: +// single read (offset 0x00 in upm ram) + .long 0x1f07fc24, 0xe0aefc04, 0x10adfc04, 0xe0bbbc00 + .long 0x10f77c44, 0xf3fffc07, 0xfffffc04, 0xfffffc04 +// burst read (offset 0x08 in upm ram) + .long 0x1f07fc24, 0xe0aefc04, 0x10adfc04, 0xf0affc00 + .long 0xf0affc00, 0xf0affc00, 0xf0affc00, 0x10a77c44 + .long 0xf7bffc47, 0xfffffc35, 0xfffffc34, 0xfffffc35 + .long 0xfffffc35, 0x1ff77c35, 0xfffffc34, 0x1fb57c35 +// single write (offset 0x18 in upm ram) + .long 0x1f27fc24, 0xe0aebc04, 0x00b93c00, 0x13f77c47 + .long 0xfffdfc04, 0xfffffc04, 0xfffffc04, 0xfffffc04 +// burst write (offset 0x20 in upm ram) + .long 0x1f07fc24, 0xeeaebc00, 0x10ad7c00, 0xf0affc00 + .long 0xf0affc00, 0xe0abbc00, 0x1fb77c47, 0xfffffc04 + .long 0xfffffc04, 0xfffffc04, 0xfffffc04, 0xfffffc04 + .long 0xfffffc04, 0xfffffc04, 0xfffffc04, 0xfffffc04 +// refresh (offset 0x30 in upm ram) + .long 0x1ff5fca4, 0xfffffc04, 0xfffffc04, 0xfffffc04 + .long 0xfffffc84, 0xfffffc07, 0xfffffc04, 0xfffffc04 + .long 0xfffffc04, 0xfffffc04, 0xfffffc04, 0xfffffc04 +// exception (offset 0x3C in upm ram) + .long 0xfffffc27, 0xfffffc04, 0xfffffc04, 0xfffffc04 +__upmtbl_end: +#endif // CYGPRI_DO_PROGRAM_UPMS + +#------------------------------------------------------------------------------ +# end of adder.S
new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/adder/current/src/hal_aux.c @@ -0,0 +1,114 @@ +//============================================================================= +// +// hal_aux.c +// +// HAL auxiliary objects and code; per platform +// +//============================================================================= +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// Copyright (C) 2002 Gary Thomas +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): hmt +// Contributors:hmt +// Date: 1999-06-08 +// Purpose: HAL aux objects: startup tables. +// Description: Tables for per-platform initialization +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include <pkgconf/hal.h> +#include <pkgconf/hal_powerpc_quicc.h> + +#include <cyg/infra/cyg_type.h> +#include <cyg/hal/hal_mem.h> // HAL memory definitions +#define CYGARC_HAL_COMMON_EXPORT_CPU_MACROS +#include <cyg/hal/ppc_regs.h> +#include <cyg/hal/quicc/ppc8xx.h> +#include <cyg/hal/hal_if.h> // hal_if_init +#include <cyg/hal/hal_io.h> +#include CYGHWR_MEMORY_LAYOUT_H + +// The memory map is weakly defined, allowing the application to redefine +// it if necessary. The regions defined below are the minimum requirements. +CYGARC_MEMDESC_TABLE CYGBLD_ATTRIB_WEAK = { + // Mapping for the Adder 85x development boards + CYGARC_MEMDESC_CACHE( 0xfe000000, 0x00800000 ), // ROM region + CYGARC_MEMDESC_NOCACHE( 0xff000000, 0x00100000 ), // MCP registers + CYGARC_MEMDESC_NOCACHE( 0xfa000000, 0x00400000 ), // Control/Status+LEDs + CYGARC_MEMDESC_CACHE( CYGMEM_REGION_ram, CYGMEM_REGION_ram_SIZE ), // Main memory + + CYGARC_MEMDESC_TABLE_END +}; + +//-------------------------------------------------------------------------- +// Platform init code. +void +hal_platform_init(void) +{ + volatile EPPC *eppc = (volatile EPPC *)eppc_base(); + + // Special routing information for CICR + eppc->cpmi_cicr &= 0xFF0000; // Routing bits + eppc->cpmi_cicr |= 0x240000; // SCC2, SCC3 on "normal" bit positions + + eppc->pip_pbpar &= ~0x0000400E; // PB29..30 AS GPIO + eppc->pip_pbdir |= 0x0000400E; + eppc->pip_pbdat = 0x00004000; + + hal_if_init(); + + _adder_set_leds(0x1); +} + +void +_adder_set_leds(int pat) +{ + volatile EPPC *eppc = (volatile EPPC *)eppc_base(); + + eppc->pip_pbdat = (eppc->pip_pbdat & ~0x0000000E) | (pat << 1); +} + +int +_adder_get_leds(void) +{ + volatile EPPC *eppc = (volatile EPPC *)eppc_base(); + + return ((eppc->pip_pbdat & 0x0000000E) >> 1); +} + +// EOF hal_aux.c
new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/adder/current/src/hal_diag.c @@ -0,0 +1,84 @@ +//============================================================================= +// +// hal_diag.c +// +// HAL diagnostic output code +// +//============================================================================= +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// Copyright (C) 2002 Gary Thomas +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): hmt +// Contributors:hmt +// Date: 1999-06-08 +// Purpose: HAL diagnostic output +// Description: Implementations of HAL diagnostic output support. +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include <pkgconf/hal.h> + +#include <cyg/infra/cyg_type.h> // base types +#include <cyg/infra/cyg_trac.h> // tracing macros +#include <cyg/infra/cyg_ass.h> // assertion macros + +#include <cyg/hal/hal_io.h> // IO macros +#include <cyg/hal/hal_diag.h> +#include <cyg/hal/hal_intr.h> // Interrupt macros + +#if defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS) +#include <cyg/hal/hal_stub.h> // hal_output_gdb_string +#endif + +#include <cyg/hal/ppc_regs.h> +#include <cyg/hal/quicc/quicc_smc1.h> + + +void +cyg_hal_plf_comms_init(void) +{ + static int initialized = 0; + + if (initialized) + return; + initialized = 1; + + cyg_hal_plf_serial_init(); // Defined in hal/powerpc/quicc/... +} + +// EOF hal_diag.c
new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/adder/current/src/redboot_linux_exec.c @@ -0,0 +1,273 @@ +//========================================================================== +// +// redboot_linux_boot.c +// +// RedBoot command to boot Linux +// +//========================================================================== +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// Copyright (C) 2002 Gary Thomas +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//####OTHERCOPYRIGHTBEGIN#### +// +// The structure definitions below are taken from include/ppc/platforms/am860.h in +// the Linux kernel, Copyright (c) 2002 Gary Thomas, Copyright (c) 1997 Dan Malek. +// Their presence here is for the express purpose of communication with the Linux +// kernel being booted and is considered 'fair use' by the original author and +// are included with their permission. +// +//####OTHERCOPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): msalter +// Contributors: gthomas,msalter +// Date: 2002-01-14 +// Purpose: +// Description: +// +// This code is part of RedBoot (tm). +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include <redboot.h> +#include <pkgconf/hal_powerpc_quicc.h> + +#include <cyg/hal/hal_arch.h> +#include <cyg/hal/hal_if.h> +#include <cyg/hal/hal_intr.h> +#include <cyg/hal/hal_cache.h> + +#ifdef CYGPKG_REDBOOT_NETWORKING +#include <net/net.h> +#endif + +#ifdef CYGSEM_REDBOOT_HAL_LINUX_BOOT + +#include CYGHWR_MEMORY_LAYOUT_H + +//========================================================================= + +// Exported CLI function(s) +static void do_exec(int argc, char *argv[]); +RedBoot_cmd("exec", + "Execute a Linux image - with MMU off", + "[-w timeout]\n" + " [-c \"kernel command line\"] [<entry_point>]", + do_exec + ); + +//========================================================================= +// Imported from Linux kernel include/asm-ppc/am860.h +// Copyright (c) 2002 Gary Thomas (gary@chez-thomas.org) +// Copyright (c) 1997 Dan Malek (dmalek@jlc.net) +// Used with permission of author(s). + + +/* A Board Information structure that is given to a program when + * RedBoot starts it up. + */ +typedef struct bd_info { + unsigned int bi_tag; /* Should be 0x42444944 "BDID" */ + unsigned int bi_size; /* Size of this structure */ + unsigned int bi_revision; /* revision of this structure */ + unsigned int bi_bdate; /* EPPCbug date, i.e. 0x11061997 */ + unsigned int bi_memstart; /* Memory start address */ + unsigned int bi_memsize; /* Memory (end) size in bytes */ + unsigned int bi_intfreq; /* Internal Freq, in Hz */ + unsigned int bi_busfreq; /* Bus Freq, in Hz */ + unsigned int bi_clun; /* Boot device controller */ + unsigned int bi_dlun; /* Boot device logical dev */ + unsigned char bi_enetaddr[6]; + unsigned int bi_baudrate; + unsigned char *bi_cmdline; +} bd_t; + +// +// Execute a Linux kernel - this is a RedBoot CLI command +// +static void +do_exec(int argc, char *argv[]) +{ + unsigned long entry; + bool wait_time_set, cmd_line_set; + int wait_time; + char *cmd_line; + char *cline; + struct option_info opts[2]; + hal_virtual_comm_table_t *__chan; + int baud_rate; + + bd_t *board_info; + CYG_INTERRUPT_STATE oldints; + unsigned long sp = CYGMEM_REGION_ram+CYGMEM_REGION_ram_SIZE; + + init_opts(&opts[0], 'w', true, OPTION_ARG_TYPE_NUM, + (void **)&wait_time, (bool *)&wait_time_set, "wait timeout"); + init_opts(&opts[1], 'c', true, OPTION_ARG_TYPE_STR, + (void **)&cmd_line, (bool *)&cmd_line_set, "kernel command line"); + entry = entry_address; // Default from last 'load' operation + if (!scan_opts(argc, argv, 1, opts, 2, (void *)&entry, OPTION_ARG_TYPE_NUM, + "[physical] starting address")) { + return; + } + + // Determine baud rate on current console + __chan = CYGACC_CALL_IF_CONSOLE_PROCS(); + baud_rate = CYGACC_COMM_IF_CONTROL(*__chan, __COMMCTL_GETBAUD); + if (baud_rate <= 0) { + baud_rate = CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_BAUD; + } + + // Make a little space at the top of the stack, and align to + // 64-bit boundary. + sp = (sp-128) & ~7; // The Linux boot code uses this space for FIFOs + + // Copy the commandline onto the stack, and set the SP to just below it. + if (cmd_line_set) { + int len,i; + + // get length of string + for( len = 0; cmd_line[len] != '\0'; len++ ); + + // decrement sp by length of string and align to + // word boundary. + sp = (sp-(len+1)) & ~3; + + // assign this SP value to command line start + cline = (char *)sp; + + // copy command line over. + for( i = 0; i < len; i++ ) + cline[i] = cmd_line[i]; + cline[len] = '\0'; + + } else { + cline = (char *)NULL; + } + + // Set up parameter struct at top of stack + sp = sp-sizeof(bd_t); + board_info = (bd_t *)sp; + memset(board_info, sizeof(*board_info), 0); + + board_info->bi_tag = 0x42444944; + board_info->bi_size = sizeof(board_info); + board_info->bi_revision = 1; + board_info->bi_bdate = 0x06012002; + board_info->bi_memstart = CYGMEM_REGION_ram; + board_info->bi_memsize = CYGMEM_REGION_ram_SIZE; + board_info->bi_intfreq = CYGHWR_HAL_POWERPC_BOARD_SPEED*1000000; + board_info->bi_busfreq = 66*1000000; + board_info->bi_clun = 0; // ???? + board_info->bi_dlun = 0; // ???? + board_info->bi_baudrate = baud_rate; + board_info->bi_cmdline = cline; +#ifdef CYGPKG_REDBOOT_NETWORKING + memcpy(board_info->bi_enetaddr, __local_enet_addr, sizeof(enet_addr_t)); +#endif + + // adjust SP to 64 bit boundary, and leave a little space + // between it and the commandline for PowerPC calling + // conventions. + + sp = (sp-32)&~7; + + if (wait_time_set) { + int script_timeout_ms = wait_time * 1000; +#ifdef CYGFUN_REDBOOT_BOOT_SCRIPT + unsigned char *hold_script = script; + script = (unsigned char *)0; +#endif + diag_printf("About to start execution at %p - abort with ^C within %d seconds\n", + (void *)entry, wait_time); + while (script_timeout_ms >= CYGNUM_REDBOOT_CLI_IDLE_TIMEOUT) { + int res; + char line[80]; + res = _rb_gets(line, sizeof(line), CYGNUM_REDBOOT_CLI_IDLE_TIMEOUT); + if (res == _GETS_CTRLC) { +#ifdef CYGFUN_REDBOOT_BOOT_SCRIPT + script = hold_script; // Re-enable script +#endif + return; + } + script_timeout_ms -= CYGNUM_REDBOOT_CLI_IDLE_TIMEOUT; + } + } + + // Disable interrupts + HAL_DISABLE_INTERRUPTS(oldints); + + // Put the caches to sleep. + HAL_DCACHE_SYNC(); + HAL_ICACHE_DISABLE(); + HAL_DCACHE_DISABLE(); + HAL_DCACHE_SYNC(); + HAL_ICACHE_INVALIDATE_ALL(); + HAL_DCACHE_INVALIDATE_ALL(); + +// diag_printf("entry %08x, sp %08x, info %08x, cmd line %08x, baud %d\n", +// entry, sp, board_info, cline, baud_rate); +// breakpoint(); + + // Call into Linux + __asm__ volatile ( + // Start by disabling MMU - the mappings are + // 1-1 so this should not cause any problems + "mfmsr 3\n" + "li 4,0xFFFFFFCF\n" + "and 3,3,4\n" + "sync\n" + "mtmsr 3\n" + "sync\n" + + // Now set up parameters to jump into linux + + "mtlr %0\n" // set entry address in LR + "mr 1,%1\n" // set stack pointer + "mr 3,%2\n" // set board info in R3 + "mr 4,%3\n" // set command line in R4 + "blr \n" // jump into linux + : + : "r"(entry),"r"(sp),"r"(board_info),"r"(cline) + : "r3", "r4" + + ); +} + +#endif // CYGSEM_REDBOOT_HAL_LINUX_BOOT + +//========================================================================= +// EOF redboot_linux_exec.c