Mercurial > ecos-v2_0-branch
changeset 54:f10165814f1e ecos-sw-1999-11-19
Merge from eCos master repository on 1999-11-19-22:24:39-GMT
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--- a/packages/ChangeLog +++ b/packages/ChangeLog @@ -1,3 +1,7 @@ +1999-11-16 Gary Thomas <gthomas@cygnus.co.uk> + + * targets: Add aliases for Cirrus Logic platforms. + 1999-10-27 Jesper Skov <jskov@cygnus.co.uk> * targets: Reenabled stubs startup for pid9.
--- a/packages/compat/uitron/current/ChangeLog +++ b/packages/compat/uitron/current/ChangeLog @@ -1,3 +1,8 @@ +1999-11-09 Jonathan Larmour <jlarmour@cygnus.co.uk> + + * src/uit_objs.cxx: Make the stack size failsafe be tested against + the minimum stack size, not the typical one. + 1999-09-06 Jonathan Larmour <jlarmour@cygnus.co.uk> * include/uit_objs.hxx (CYG_UITRON_OBJS_INIT_PRIORITY): Revert the
--- a/packages/compat/uitron/current/src/uit_objs.cxx +++ b/packages/compat/uitron/current/src/uit_objs.cxx @@ -141,17 +141,17 @@ Cyg_Counting_Semaphore2 *CYG_UITRON_DECL (cyg_ucount32)(_ss_) ) #endif -#ifdef CYGNUM_HAL_STACK_SIZE_TYPICAL +#ifdef CYGNUM_HAL_STACK_SIZE_MINIMUM # ifdef CYGNUM_UITRON_STACK_SIZE -# if CYGNUM_UITRON_STACK_SIZE < CYGNUM_HAL_STACK_SIZE_TYPICAL +# if CYGNUM_UITRON_STACK_SIZE < CYGNUM_HAL_STACK_SIZE_MINIMUM // then override the configured stack size # undef CYGNUM_UITRON_STACK_SIZE -# define CYGNUM_UITRON_STACK_SIZE CYGNUM_HAL_STACK_SIZE_TYPICAL +# define CYGNUM_UITRON_STACK_SIZE CYGNUM_HAL_STACK_SIZE_MINIMUM -# endif // CYGNUM_UITRON_STACK_SIZE < CYGNUM_HAL_STACK_SIZE_TYPICAL +# endif // CYGNUM_UITRON_STACK_SIZE < CYGNUM_HAL_STACK_SIZE_MINIMUM # endif // CYGNUM_UITRON_STACK_SIZE -#endif // CYGNUM_HAL_STACK_SIZE_TYPICAL +#endif // CYGNUM_HAL_STACK_SIZE_MINIMUM // declare the symbols used in the initializer CYGDAT_UITRON_TASK_EXTERNS
--- a/packages/hal/arm/aeb/current/ChangeLog +++ b/packages/hal/arm/aeb/current/ChangeLog @@ -1,3 +1,21 @@ +1999-11-09 Gary Thomas <gthomas@cygnus.co.uk> + + * include/pkgconf/mlt_arm_aebC_ram.h: + * include/pkgconf/mlt_arm_aebC_rom.h: + * include/pkgconf/mlt_arm_aeb_ram.h: + * include/pkgconf/mlt_arm_aeb_rom.h: New files. + + * include/pkgconf/mlt_arm_aebC_ram.ldi: + * include/pkgconf/mlt_arm_aebC_ram.mlt: + * include/pkgconf/mlt_arm_aebC_rom.ldi: + * include/pkgconf/mlt_arm_aebC_rom.mlt: + * include/pkgconf/mlt_arm_aeb_ram.ldi: + * include/pkgconf/mlt_arm_aeb_ram.mlt: + * include/pkgconf/mlt_arm_aeb_rom.ldi: + * include/pkgconf/mlt_arm_aeb_rom.mlt: Correct memory layout. + + * src/hal_diag.c: Honor GDB_DISABLE option. + 1999-10-28 Jesper Skov <jskov@cygnus.co.uk> * misc/PKGconf.mak: Don't strip symbols when making .img.
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/aeb/current/include/pkgconf/mlt_arm_aebC_ram.h @@ -0,0 +1,19 @@ +// eCos memory layout - Tue Nov 09 07:03:07 1999 + +// This is a generated file - do not edit + +#include <cyg/infra/cyg_type.h> +#include <stddef.h> + +#define CYGMEM_REGION_ram (0) +#define CYGMEM_REGION_ram_SIZE (0x48000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) +extern char CYG_LABEL_NAME (_reserved_vectors) []; +#define CYGMEM_SECTION_reserved_vectors (CYG_LABEL_NAME (_reserved_vectors)) +#define CYGMEM_SECTION_reserved_vectors_SIZE (0x1000) +extern char CYG_LABEL_NAME (_reserved_not_mapped) []; +#define CYGMEM_SECTION_reserved_not_mapped (CYG_LABEL_NAME (_reserved_not_mapped)) +#define CYGMEM_SECTION_reserved_not_mapped_SIZE (0x7000) +extern char CYG_LABEL_NAME (_reserved_rom_usage) []; +#define CYGMEM_SECTION_reserved_rom_usage (CYG_LABEL_NAME (_reserved_rom_usage)) +#define CYGMEM_SECTION_reserved_rom_usage_SIZE (0x4000)
--- a/packages/hal/arm/aeb/current/include/pkgconf/mlt_arm_aebC_ram.ldi +++ b/packages/hal/arm/aeb/current/include/pkgconf/mlt_arm_aebC_ram.ldi @@ -1,40 +1,19 @@ -//=========================================================================== -// -// MLT linker script export -// -//=========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//=========================================================================== +// eCos memory layout - Tue Nov 09 07:03:07 1999 + +// This is a generated file - do not edit MEMORY { - ram : ORIGIN = 0xc000, LENGTH = 0x3c000 + ram : ORIGIN = 0, LENGTH = 0x48000 } SECTIONS { SECTIONS_BEGIN - SECTION_rom_vectors (ram, 0xc000, LMA_EQ_VMA) + __reserved_vectors = 0; . = __reserved_vectors + 0x1000; + __reserved_not_mapped = ALIGN (0x1); . = __reserved_not_mapped + 0x7000; + __reserved_rom_usage = ALIGN (0x1); . = __reserved_rom_usage + 0x4000; + SECTION_rom_vectors (ram, ALIGN (0x1), LMA_EQ_VMA) SECTION_text (ram, ALIGN (0x1), LMA_EQ_VMA) SECTION_fini (ram, ALIGN (0x1), LMA_EQ_VMA) SECTION_rodata (ram, ALIGN (0x1), LMA_EQ_VMA)
--- a/packages/hal/arm/aeb/current/include/pkgconf/mlt_arm_aebC_ram.mlt +++ b/packages/hal/arm/aeb/current/include/pkgconf/mlt_arm_aebC_ram.mlt @@ -1,6 +1,9 @@ version 0 -region ram c000 3c000 0 ! -section rom_vectors 0 1 0 1 1 1 1 1 c000 c000 text text ! +region ram 0 48000 0 ! +section reserved_vectors 1000 1 0 0 1 1 1 1 0 0 reserved_not_mapped reserved_not_mapped ! +section reserved_not_mapped 7000 1 0 0 0 1 0 1 reserved_rom_usage reserved_rom_usage ! +section reserved_rom_usage 4000 1 0 0 0 1 0 1 rom_vectors rom_vectors ! +section rom_vectors 0 1 0 1 0 1 0 1 text text ! section text 0 1 0 1 0 1 0 1 fini fini ! section fini 0 1 0 1 0 1 0 1 rodata rodata ! section rodata 0 1 0 1 0 1 0 1 rodata1 rodata1 !
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/aeb/current/include/pkgconf/mlt_arm_aebC_rom.h @@ -0,0 +1,19 @@ +// eCos memory layout - Mon Nov 08 10:19:24 1999 + +// This is a generated file - do not edit + +#include <cyg/infra/cyg_type.h> +#include <stddef.h> + +#define CYGMEM_REGION_ram (0) +#define CYGMEM_REGION_ram_SIZE (0x48000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) +#define CYGMEM_REGION_rom (0x4018000) +#define CYGMEM_REGION_rom_SIZE (0x8000) +#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R) +extern char CYG_LABEL_NAME (_reserved_vectors) []; +#define CYGMEM_SECTION_reserved_vectors (CYG_LABEL_NAME (_reserved_vectors)) +#define CYGMEM_SECTION_reserved_vectors_SIZE (0x1000) +extern char CYG_LABEL_NAME (_reserved_not_mapped) []; +#define CYGMEM_SECTION_reserved_not_mapped (CYG_LABEL_NAME (_reserved_not_mapped)) +#define CYGMEM_SECTION_reserved_not_mapped_SIZE (0x7000)
--- a/packages/hal/arm/aeb/current/include/pkgconf/mlt_arm_aebC_rom.ldi +++ b/packages/hal/arm/aeb/current/include/pkgconf/mlt_arm_aebC_rom.ldi @@ -1,35 +1,11 @@ -//=========================================================================== -// -// MLT linker script export -// -//=========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//=========================================================================== +// eCos memory layout - Mon Nov 08 10:19:24 1999 + +// This is a generated file - do not edit MEMORY { - rom : ORIGIN = 0x04018000, LENGTH = 0x08000 - ram : ORIGIN = 0x00008000, LENGTH = 0x40000 + ram : ORIGIN = 0, LENGTH = 0x48000 + rom : ORIGIN = 0x4018000, LENGTH = 0x8000 } SECTIONS @@ -42,7 +18,9 @@ SECTIONS SECTION_rodata1 (rom, ALIGN (0x1), LMA_EQ_VMA) SECTION_fixup (rom, ALIGN (0x1), LMA_EQ_VMA) SECTION_gcc_except_table (rom, ALIGN (0x1), LMA_EQ_VMA) - SECTION_data (ram, 0x8000, FOLLOWING (.gcc_except_table)) + __reserved_vectors = 0; . = __reserved_vectors + 0x1000; + SECTION_data (ram, ALIGN (0x1), FOLLOWING (.gcc_except_table)) SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA) + __reserved_not_mapped = ALIGN (0x1); . = __reserved_not_mapped + 0x7000; SECTIONS_END }
--- a/packages/hal/arm/aeb/current/include/pkgconf/mlt_arm_aebC_rom.mlt +++ b/packages/hal/arm/aeb/current/include/pkgconf/mlt_arm_aebC_rom.mlt @@ -1,8 +1,10 @@ version 0 -region ram 8000 40000 0 ! +region ram 0 48000 0 ! region rom 4018000 8000 1 ! -section data 0 1 1 1 1 1 0 0 8000 bss ! +section reserved_vectors 1000 1 0 0 1 1 1 1 0 0 reserved_not_mapped reserved_not_mapped ! +section data 0 1 1 1 0 1 0 0 bss ! section bss 0 4 0 1 0 0 0 0 ! +section reserved_not_mapped 7000 1 0 0 0 1 0 0 data ! section rom_vectors 0 1 0 1 1 1 1 1 4018000 4018000 text text ! section text 0 1 0 1 0 1 0 1 fini fini ! section fini 0 1 0 1 0 1 0 1 rodata rodata !
--- a/packages/hal/arm/aeb/current/include/pkgconf/mlt_arm_aebC_stubs.mlt +++ b/packages/hal/arm/aeb/current/include/pkgconf/mlt_arm_aebC_stubs.mlt @@ -1,4 +1,4 @@ -version 0 +!version 0 region ram 8000 4000 0 ! region rom 4018000 8000 1 ! section data 0 1 1 1 1 1 0 0 8000 bss !
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/aeb/current/include/pkgconf/mlt_arm_aeb_ram.h @@ -0,0 +1,19 @@ +// eCos memory layout - Mon Nov 08 07:44:09 1999 + +// This is a generated file - do not edit + +#include <cyg/infra/cyg_type.h> +#include <stddef.h> + +#define CYGMEM_REGION_ram (0) +#define CYGMEM_REGION_ram_SIZE (0x28000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) +extern char CYG_LABEL_NAME (_reserved_vectors) []; +#define CYGMEM_SECTION_reserved_vectors (CYG_LABEL_NAME (_reserved_vectors)) +#define CYGMEM_SECTION_reserved_vectors_SIZE (0x1000) +extern char CYG_LABEL_NAME (_reserved_not_mapped) []; +#define CYGMEM_SECTION_reserved_not_mapped (CYG_LABEL_NAME (_reserved_not_mapped)) +#define CYGMEM_SECTION_reserved_not_mapped_SIZE (0x7000) +extern char CYG_LABEL_NAME (_reserved_for_rom) []; +#define CYGMEM_SECTION_reserved_for_rom (CYG_LABEL_NAME (_reserved_for_rom)) +#define CYGMEM_SECTION_reserved_for_rom_SIZE (0x4000)
--- a/packages/hal/arm/aeb/current/include/pkgconf/mlt_arm_aeb_ram.ldi +++ b/packages/hal/arm/aeb/current/include/pkgconf/mlt_arm_aeb_ram.ldi @@ -1,40 +1,19 @@ -//=========================================================================== -// -// MLT linker script export -// -//=========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//=========================================================================== +// eCos memory layout - Mon Nov 08 07:44:09 1999 + +// This is a generated file - do not edit MEMORY { - ram : ORIGIN = 0xc000, LENGTH = 0x1c000 + ram : ORIGIN = 0, LENGTH = 0x28000 } SECTIONS { SECTIONS_BEGIN - SECTION_rom_vectors (ram, 0xc000, LMA_EQ_VMA) + __reserved_vectors = 0; . = __reserved_vectors + 0x1000; + __reserved_not_mapped = ALIGN (0x1); . = __reserved_not_mapped + 0x7000; + __reserved_for_rom = ALIGN (0x1); . = __reserved_for_rom + 0x4000; + SECTION_rom_vectors (ram, ALIGN (0x1), LMA_EQ_VMA) SECTION_text (ram, ALIGN (0x1), LMA_EQ_VMA) SECTION_fini (ram, ALIGN (0x1), LMA_EQ_VMA) SECTION_rodata (ram, ALIGN (0x1), LMA_EQ_VMA)
--- a/packages/hal/arm/aeb/current/include/pkgconf/mlt_arm_aeb_ram.mlt +++ b/packages/hal/arm/aeb/current/include/pkgconf/mlt_arm_aeb_ram.mlt @@ -1,6 +1,9 @@ version 0 -region ram c000 1c000 0 ! -section rom_vectors 0 1 0 1 1 1 1 1 c000 c000 text text ! +region ram 0 28000 0 ! +section reserved_vectors 1000 1 0 0 1 1 1 1 0 0 reserved_not_mapped reserved_not_mapped ! +section reserved_not_mapped 7000 1 0 0 0 1 0 1 reserved_for_rom reserved_for_rom ! +section reserved_for_rom 4000 1 0 0 0 1 0 1 rom_vectors rom_vectors ! +section rom_vectors 0 1 0 1 0 1 0 1 text text ! section text 0 1 0 1 0 1 0 1 fini fini ! section fini 0 1 0 1 0 1 0 1 rodata rodata ! section rodata 0 1 0 1 0 1 0 1 rodata1 rodata1 !
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/aeb/current/include/pkgconf/mlt_arm_aeb_rom.h @@ -0,0 +1,19 @@ +// eCos memory layout - Mon Nov 08 07:49:32 1999 + +// This is a generated file - do not edit + +#include <cyg/infra/cyg_type.h> +#include <stddef.h> + +#define CYGMEM_REGION_ram (0) +#define CYGMEM_REGION_ram_SIZE (0x28000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) +#define CYGMEM_REGION_rom (0x4018000) +#define CYGMEM_REGION_rom_SIZE (0x8000) +#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R) +extern char CYG_LABEL_NAME (_reserved_vectors) []; +#define CYGMEM_SECTION_reserved_vectors (CYG_LABEL_NAME (_reserved_vectors)) +#define CYGMEM_SECTION_reserved_vectors_SIZE (0x1000) +extern char CYG_LABEL_NAME (_reserved_not_mapped) []; +#define CYGMEM_SECTION_reserved_not_mapped (CYG_LABEL_NAME (_reserved_not_mapped)) +#define CYGMEM_SECTION_reserved_not_mapped_SIZE (0x7000)
--- a/packages/hal/arm/aeb/current/include/pkgconf/mlt_arm_aeb_rom.ldi +++ b/packages/hal/arm/aeb/current/include/pkgconf/mlt_arm_aeb_rom.ldi @@ -1,35 +1,11 @@ -//=========================================================================== -// -// MLT linker script export -// -//=========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//=========================================================================== +// eCos memory layout - Mon Nov 08 07:49:32 1999 + +// This is a generated file - do not edit MEMORY { - rom : ORIGIN = 0x04018000, LENGTH = 0x08000 - ram : ORIGIN = 0x00008000, LENGTH = 0x20000 + ram : ORIGIN = 0, LENGTH = 0x28000 + rom : ORIGIN = 0x4018000, LENGTH = 0x8000 } SECTIONS @@ -42,7 +18,9 @@ SECTIONS SECTION_rodata1 (rom, ALIGN (0x1), LMA_EQ_VMA) SECTION_fixup (rom, ALIGN (0x1), LMA_EQ_VMA) SECTION_gcc_except_table (rom, ALIGN (0x1), LMA_EQ_VMA) - SECTION_data (ram, 0x8000, FOLLOWING (.gcc_except_table)) + __reserved_vectors = 0; . = __reserved_vectors + 0x1000; + SECTION_data (ram, ALIGN (0x1), FOLLOWING (.gcc_except_table)) SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA) + __reserved_not_mapped = ALIGN (0x1); . = __reserved_not_mapped + 0x7000; SECTIONS_END }
--- a/packages/hal/arm/aeb/current/include/pkgconf/mlt_arm_aeb_rom.mlt +++ b/packages/hal/arm/aeb/current/include/pkgconf/mlt_arm_aeb_rom.mlt @@ -1,8 +1,10 @@ version 0 -region ram 8000 20000 0 ! +region ram 0 28000 0 ! region rom 4018000 8000 1 ! -section data 0 1 1 1 1 1 0 0 8000 bss ! +section reserved_vectors 1000 1 0 0 1 1 1 1 0 0 reserved_not_mapped reserved_not_mapped ! +section data 0 1 1 1 0 1 0 0 bss ! section bss 0 4 0 1 0 0 0 0 ! +section reserved_not_mapped 7000 1 0 0 0 1 0 0 data ! section rom_vectors 0 1 0 1 1 1 1 1 4018000 4018000 text text ! section text 0 1 0 1 0 1 0 1 fini fini ! section fini 0 1 0 1 0 1 0 1 rodata rodata !
--- a/packages/hal/arm/aeb/current/src/hal_diag.c +++ b/packages/hal/arm/aeb/current/src/hal_diag.c @@ -57,7 +57,7 @@ // Assumption: all diagnostic output must be GDB packetized unless this is a ROM (i.e. // totally stand-alone) system. -#ifdef CYG_HAL_STARTUP_ROM +#if defined(CYG_HAL_STARTUP_ROM) || defined(CYGDBG_HAL_DIAG_DISABLE_GDB_PROTOCOL) #define HAL_DIAG_USES_HARDWARE #endif
--- a/packages/hal/arm/arch/current/ChangeLog +++ b/packages/hal/arm/arch/current/ChangeLog @@ -1,3 +1,8 @@ +1999-11-12 Gary Thomas <gthomas@cygnus.co.uk> + + * src/vectors.S (reset_platform): New function used to reset board + in the absense of real hardware reset (not possible on all boards). + 1999-11-01 Jonathan Larmour <jlarmour@cygnus.co.uk> * src/hal_misc.c (exception_handler): Check for CYGDAT_CYGMON_ENABLE
--- a/packages/hal/arm/arch/current/src/arm.ld +++ b/packages/hal/arm/arch/current/src/arm.ld @@ -85,8 +85,8 @@ OUTPUT_FORMAT(elf32-bigarm) .text _vma_ : _lma_ \ { stext = ABSOLUTE(.); \ PROVIDE (__stext = ABSOLUTE(.)); \ - *(.text*) *(.gnu.warning) *(.gnu.linkonce*) *(.init) }\ - > _region_ \ + *(.text*) *(.gnu.warning) *(.gnu.linkonce*) *(.init) \ + } > _region_ \ etext = .; PROVIDE (__etext = .); #define SECTION_fini(_region_, _vma_, _lma_) \
--- a/packages/hal/arm/arch/current/src/arm_stub.c +++ b/packages/hal/arm/arch/current/src/arm_stub.c @@ -85,10 +85,8 @@ void set_pc (target_register_t pc) This may be done by setting breakpoints or setting a single step flag in the saved user registers, for example. */ -#define NULL_PTR (unsigned long *)0 -static unsigned long *ss_saved_pc = NULL_PTR; -static unsigned long ss_saved_instr; - +static unsigned long ss_saved_pc = 0; +static unsigned long ss_saved_instr; #define FIXME() {diag_printf("FIXME - %s\n", __FUNCTION__); } @@ -349,29 +347,32 @@ target_ins(unsigned long *pc, unsigned l } } + void __single_step (void) { - unsigned long *pc = (unsigned long *)get_register(PC); - unsigned long curins = *pc; - if (ins_will_execute(curins)) { - // Decode instruction to decide what the next PC will be - ss_saved_pc = target_ins(pc, curins); - } else { - // The current instruction will not execute (the conditions don't hold) - ss_saved_pc = (pc+1); - } - // For now - ss_saved_instr = *ss_saved_pc; - *ss_saved_pc = 0xE7FFDEFF; // As used by ARM + unsigned long pc = get_register(PC); + unsigned long curins = *(unsigned long*)pc; + if (ins_will_execute(curins)) { + // Decode instruction to decide what the next PC will be + ss_saved_pc = (unsigned long) target_ins((unsigned long*)pc, + curins); + } else { + // The current instruction will not execute (the conditions + // don't hold) + ss_saved_pc = pc+4; + } + ss_saved_instr = *(unsigned long*)ss_saved_pc; + *(unsigned long*)ss_saved_pc = HAL_BREAKINST_ARM; } /* Clear the single-step state. */ void __clear_single_step (void) { - if (ss_saved_pc != NULL_PTR) { - *ss_saved_pc = ss_saved_instr; - ss_saved_pc = NULL_PTR; + if (ss_saved_pc != 0) { + // ARM instruction + *(unsigned long*)ss_saved_pc = ss_saved_instr; + ss_saved_pc = 0; } } @@ -401,7 +402,10 @@ int void __skipinst (void) { - put_register (PC, get_register (PC) + 4); + unsigned long pc = get_register(PC); + pc += 4; + + put_register(PC, pc); }
--- a/packages/hal/arm/arch/current/src/vectors.S +++ b/packages/hal/arm/arch/current/src/vectors.S @@ -139,6 +139,9 @@ reset_vector: // which can set DRAM size at 0x40 // see <cyg/hal/hal_platform_setup.h> + // Come here to reset board +warm_reset: + #if defined(CYG_HAL_STARTUP_RAM) && \ !defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS) mrs r7,cpsr // move back to IRQ mode @@ -225,6 +228,11 @@ 10: LED 4 #if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_STUBS) + // Set up reset vector + ldr r2,[r1,#0x00] // reset vector intstruction + str r2,[r0,#0x00] + ldr r2,=warm_reset + str r2,[r0,#0x20] // Relocate [copy] data from ROM to RAM ldr r3,.__rom_data_start ldr r4,.__ram_data_start @@ -310,6 +318,19 @@ 2: _start_hang: b _start_hang .code 32 + + .global reset_platform + .type reset_platform,function +reset_platform: +#ifdef CYG_HAL_STARTUP_STUBS + // initialize CPSR (machine state register) + mov r0,#(CPSR_IRQ_DISABLE|CPSR_FIQ_DISABLE|CPSR_SUPERVISOR_MODE) + msr cpsr,r0 + b warm_reset +#else + mov r0,#0 + mov pc,r0 // Jump to reset vector +#endif init_done: .long 0xDEADB00B @@ -321,7 +342,6 @@ init_done: .code 32 undefined_instruction: ldr sp,.__undef_exception_stack // get good stack - sub lr,lr,#4 // PC at time of interrupt stmfd sp!,{r0,fp,ip,lr} mrs r0,spsr stmfd sp!,{r0} @@ -346,6 +366,7 @@ 10: sub sp,sp,#ARMREG_SIZE // make space for frame stmea sp,{r0-r10,fp} // save immediately visible registers ldmfd ip,{r0-r4} // saved registers + sub r4,r4,#4 // PC at time of interrupt str r0,[sp,#armreg_cpsr] // CPSR at time of interrupt str r1,[sp,#armreg_r0] // saved R0 str r2,[sp,#armreg_fp] // saved FP @@ -364,7 +385,6 @@ 10: .code 32 software_interrupt: ldr sp,.__startup_stack // get good stack - sub lr,lr,#4 // PC at time of interrupt stmfd sp!,{r0,ip,lr} mrs r0,spsr stmfd sp!,{r0} @@ -379,6 +399,7 @@ software_interrupt: sub sp,sp,#ARMREG_SIZE+16 // make space for frame stmea sp,{r0-r10,fp} // save immediately visible registers ldmfd ip,{r0-r3} // saved registers + sub r3,r3,#4 // PC at time of interrupt str r0,[sp,#armreg_cpsr] // CPSR at time of interrupt str r1,[sp,#armreg_r0] // saved R0 str r2,[sp,#armreg_ip] // saved IP
deleted file mode 100644 --- a/packages/hal/arm/cl7211/current/ChangeLog +++ /dev/null @@ -1,249 +0,0 @@ -1999-11-03 Gary Thomas <gthomas@cygnus.co.uk> - - * include/pkgconf/hal_arm_cl7211.h: Change default clock speed - to 36MHz with no software DRAM refresh (hardware is stable with - this combo). - -1999-10-27 Gary Thomas <gthomas@cygnus.co.uk> - - * src/cl7211_misc.c (enable_FIQ): New function. Used to re-enable - FIQ interrupts during DRAM refresh code. - - * include/pkgconf/mlt_arm_eb7211_stubs.h: - * include/pkgconf/mlt_arm_eb7211_rom.h: - * include/pkgconf/mlt_arm_eb7211_ram.h: New files. - - * include/pkgconf/mlt_arm_eb7211_rom.ldi: - * include/pkgconf/mlt_arm_eb7211_ram.ldi: - * include/pkgconf/mlt_arm_eb7211_stubs.ldi: - * include/pkgconf/mlt_arm_eb7211_ram.mlt: - * include/pkgconf/mlt_arm_eb7211_rom.mlt: - * include/pkgconf/mlt_arm_eb7211_stubs.mlt: Update for new layout - which describes physical regions completely. - -1999-10-27 Jesper Skov <jskov@cygnus.co.uk> - - * src/hal_diag.c: Fixed conditional include. - -1999-10-26 Hugo Tyson <hmt@cygnus.co.uk> - - * src/hal_diag.c (hal_diag_write_char): Use new macro - CYG_HAL_GDB_ENTER_CRITICAL_IO_REGION and its mate to control - stepping through gdb $O packet output. - -1999-10-25 Gary Thomas <gthomas@cygnus.co.uk> - - * tests/PKGconf.mak: Add DRAM test program. - - * tests/dram_test.c: New file. - - * include/hal_platform_setup.h: Fix DRAM mapping (was slightly - incorrect at end of first DRAM chip). - -1999-10-04 Gary Thomas <gthomas@cygnus.co.uk> - * include/hal_platform_setup.h: Allow ROM applications to be linked - at "ram" addresses and be automatically relocated at startup time. - -1999-09-15 Gary Thomas <gthomas@cygnus.co.uk> - - * misc/nand_test.c (nand_exercise): Check "read ID" function. - - * misc/lcd_panel_support.c (lcd_panel_server): Reorg sampling - loop to use a weighted average (try and avoid bad results). - - * misc/kbd_test.c (kbd_exercise): Use new kbd_getc() function. - - * misc/kbd_support.c (kbd_getc): New function. - - * misc/lcd_support.c: Add simple printf() code. - -1999-09-13 Gary Thomas <gthomas@cygnus.co.uk> - - * include/pkgconf/mlt_arm_eb7211_ram.ldi: - * include/pkgconf/mlt_arm_eb7211_ram.mlt: Fix DRAM limits. - -1999-09-12 Gary Thomas <gthomas@cygnus.co.uk> - - * misc/kbd_support.c: New file. Also change to more or less - ignore interrupts since they don't work for many keys! - - * misc/kbd_test.c: Move keyboard support routines to separate - file. - -1999-09-10 Gary Thomas <gthomas@cygnus.co.uk> - - * include/hal_platform_setup.h: Fix spelling error. - -1999-09-08 Gary Thomas <gthomas@cygnus.co.uk> - - * misc/panel_test.c: Trick for these interrupts is that they - only happen when the drive is 0x70. - - * misc/kbd_test.c: Found trick to get interrupts - need to leave - columns hot! - - * include/pkgconf/mlt_arm_eb7211_rom.mlt: - * include/pkgconf/mlt_arm_eb7211_rom.ldi: Change RAM layout. - - * include/hal_platform_setup.h: Made ROM segment #1 non-cacheable. - - * misc/kbd_test.c: New test for ASCII keyboard. Interrupts - not yet working. - - * misc/panel_test.c: Fix panel driving code. Can now read - panel samples, but no interrupts. - - * src/cl7211_misc.c: Add missing clear for keyboard interrupt. - -1999-09-06 Gary Thomas <gthomas@cygnus.co.uk> - - * misc/PKGconf.mak (PROGS): Add new test. - - * misc/panel_test.c: New file. Test code for LCD touch panel. - - * misc/lcd_support.c: New file. - - * misc/lcd_test.c: Move LCD driving code to 'lcd_support.c' so it - can be shared. - -1999-09-03 Gary Thomas <gthomas@cygnus.co.uk> - - * misc/lcd_test.c (lcd_drawc): Correct drawing of larger characters. - - * misc/PKGconf.mak: Make LCD test program for all platforms. - - * include/pkgconf/mlt_arm_cl7211_rom.mlt: - * include/pkgconf/mlt_arm_cl7211_rom.ldi: - * include/pkgconf/mlt_arm_cl7211_ram.mlt: - * include/pkgconf/mlt_arm_cl7211_ram.ldi: 72xx has 16M by default. - - * misc/PKGconf.mak: Remove extra [left over] step in make. - -1999-09-02 Jonathan Larmour <jlarmour@cygnus.co.uk> - - * misc/PKGconf.mak: Use correct EXEEXT for gdb_module program. - -1999-09-02 Gary Thomas <gthomas@cygnus.co.uk> - - * support/io.c (uspin): Change timing - ugly. - - * src/cl7211_misc.c: Disable out BATLOW testing code. - - * include/hal_platform_setup.h: Better setup when LCD is installed. - - * include/pkgconf/hal_arm_cl7211.h: Make LCD installed by default. - - * misc/lcd_test.c: Rework for larger ALPS unit. Also make characters - twice as big (so there's a chance at seeing them!) - -1999-08-16 John Dallaway <jld@cygnus.co.uk> - - * include/pkgconf/hal_arm_cl7211.h: - - Proper case various display strings. - -1999-07-28 Gary Thomas <gthomas@cygnus.co.uk> - - * misc/STUBS_config: Update for latest hal.h. Also add way to - specify platform (second parameter). - -1999-07-14 Hugo Tyson <hmt@cygnus.co.uk> - - * include/hal_cache.h (HAL_UCACHE_LINE_SIZE): Correct the comment - and the value: this is supposed to be in bytes. - -1999-06-22 Gary Thomas <gthomas@cygnus.co.uk> - - * src/cl7211_misc.c (hal_IRQ_handler): Remove some debug code. - Add simple handler for battery low to test FIQ support. - -1999-06-18 Gary Thomas <gthomas@cygnus.co.uk> - - * src/plf_stub.c: - * src/hal_diag.c: Use pkgconf derived platform include file. - - * src/cl7211_misc.c (hal_hardware_init): - * include/pkgconf/hal_arm_cl7211.h: Add configuration control for - CPU processor speed. Default to 73.728 MHz. - -1999-06-17 Gary Thomas <gthomas@cygnus.co.uk> - - * include/hal_platform_setup.h (MAP_DRAM): 16M layout was wrong. - -1999-06-16 Gary Thomas <gthomas@cygnus.co.uk> - - * src/hal_diag.c: Clean up. - - * include/hal_platform_setup.h (PLATFORM_SETUP1): - Better MMU initialization for IO segments. - (PLATFORM_SETUP1): Add mappings for expansion I/O. - - * src/cl7211_misc.c (hal_hardware_init): Turn on DIAG LED. - - * include/hal_cl7211.h: Add LED flasher definitions. - -1999-06-15 Gary Thomas <gthomas@cygnus.co.uk> - - * misc/prog_flash.c: Massive rewrite/upgrade to handle Intel - parts that are on the 7211, as well as the ATMEL parts on 7111. - This program should work for either and gives a good example - of how to access/program/erase the FLASH. - - * include/hal_platform_setup.h (CYGHWR_HAL_ARM_HAS_MMU): Define. - - * misc/PKGconf.mak (gdb_module.img): - * include/pkgconf/mlt_arm_cl7211_stubs.mlt: - * include/pkgconf/mlt_arm_cl7211_stubs.ldi: Support to allow - stubs to be the startup application (GDB on board). - -1999-06-14 Gary Thomas <gthomas@cygnus.co.uk> - - * include/hal_cache.h: Turn on FLUSH macros. - -1999-06-11 Gary Thomas <gthomas@cygnus.co.uk> - - * include/hal_cache.h: Update with new unified cache support. - -1999-06-09 Gary Thomas <gthomas@cygnus.co.uk> - - * include/hal_platform_setup.h (PLATFORM_SETUP1): Remove debug code. - - * include/pkgconf/hal_arm_cl7211.h: Add new configuration options. - DRAM size (currently 2M and 16M supported). - LCD installed? - - * include/hal_platform_setup.h: Reorganize to support configuration - of DRAM size and LCD installed. - -1999-05-21 Gary Thomas <gthomas@cygnus.co.uk> - - * include/pkgconf/hal_arm_cl7211.h: New configury to support - multiple versions of CLxx11. - -1999-05-20 Gary Thomas <gthomas@cygnus.co.uk> - - * include/pkgconf/hal_arm_cl7211.h: Move RTC setup here. - -//=========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//===========================================================================
deleted file mode 100644 index c351918bfd42489822bc4a76d77b6bed0941b2e6..0000000000000000000000000000000000000000 GIT binary patch literal 0 Hc$@<O00001
deleted file mode 100644 index 5e1c5b52d9d67547ac347786cb61d1febcbac39a..0000000000000000000000000000000000000000 GIT binary patch literal 0 Hc$@<O00001
deleted file mode 100644 --- a/packages/hal/arm/cl7211/current/include/hal_cache.h +++ /dev/null @@ -1,307 +0,0 @@ -#ifndef CYGONCE_HAL_CACHE_H -#define CYGONCE_HAL_CACHE_H - -//============================================================================= -// -// hal_cache.h -// -// HAL cache control API -// -//============================================================================= -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//============================================================================= -//#####DESCRIPTIONBEGIN#### -// -// Author(s): nickg, gthomas -// Contributors: nickg, gthomas -// Date: 1998-09-28 -// Purpose: Cache control API -// Description: The macros defined here provide the HAL APIs for handling -// cache control operations. -// Usage: -// #include <cyg/hal/hal_cache.h> -// ... -// -// -//####DESCRIPTIONEND#### -// -//============================================================================= - -#include <cyg/infra/cyg_type.h> -#include <cyg/hal/hal_mmu.h> - -//----------------------------------------------------------------------------- -// Cache dimensions - -#define HAL_UCACHE_SIZE 0x2000 // Size of data cache in bytes -#define HAL_UCACHE_LINE_SIZE 16 // Size of a data cache line -#define HAL_UCACHE_WAYS 4 // Associativity of the cache -#define HAL_UCACHE_SETS (HAL_UCACHE_SIZE/(HAL_UCACHE_LINE_SIZE*HAL_UCACHE_WAYS)) - -#define HAL_CACHE_UNIFIED // Let programs know the caches are combined - -//----------------------------------------------------------------------------- -// Global control of caches - -// Note: the 'mrc' doesn't seem to work. -#if 0 -// Enable the data cache -// mrc MMU_CP,0,r1,MMU_Control,c0 -// orr r1,r1,#MMU_Control_C|MMU_Control_B -// mcr MMU_CP,0,r1,MMU_Control,c0 - -#define HAL_UCACHE_ENABLE() \ -{ \ - asm volatile ("mrc p15,0,r1,c1,c0;" \ - "orr r1,r1,#0x000C;" \ - "mcr p15,0,r1,c1,c0;" \ - : \ - : \ - : "r1" /* Clobber list */ \ - ); \ - \ -} - -// Disable the data cache -#define HAL_UCACHE_DISABLE() \ -{ \ - asm volatile ("mrc p15,0,r1,c1,c0;" \ - "bic r1,r1,#0x000C;" \ - "mcr p15,0,r1,c1,c0;" \ - : \ - : \ - : "r1" /* Clobber list */ \ - ); \ - \ -} -#else -#define HAL_UCACHE_ENABLE() \ -{ \ - asm volatile ("mov r1,#0x7D;" \ - "mcr p15,0,r1,c1,c0;" \ - : \ - : \ - : "r1" /* Clobber list */ \ - ); \ - \ -} - -// Disable the data cache -#define HAL_UCACHE_DISABLE() \ -{ \ - asm volatile ("mov r1,#0x71;" \ - "mcr p15,0,r1,c1,c0;" \ - : \ - : \ - : "r1" /* Clobber list */ \ - ); \ - \ -} -#endif - -// Is the cache turned on? -#define HAL_UCACHE_IS_ENABLED(_state_) _state_ = 1; - -// Invalidate the entire cache -// mcr MMU_CP,0,r1,MMU_InvalidateCache,c0 -#define HAL_UCACHE_INVALIDATE_ALL() \ -{ \ - asm volatile ("mcr p15,0,r1,c7,c0,0;" ); \ - \ -} - -// Synchronize the contents of the cache with memory. -#define HAL_UCACHE_SYNC() \ -{ \ - cyg_uint32 *ROM = (cyg_uint32 *)0xE0000000; \ - int i; \ - volatile cyg_uint32 val; \ - for (i = 0; i < HAL_UCACHE_SETS; i++) { \ - val = *ROM; \ - ROM += HAL_UCACHE_LINE_SIZE; \ - } \ -} - -// Purge contents of data cache -#define HAL_UCACHE_PURGE_ALL() HAL_UCACHE_INVALIDATE_ALL() - -// Set the data cache refill burst size -//#define HAL_UCACHE_BURST_SIZE(_size_) - -// Set the data cache write mode -//#define HAL_UCACHE_WRITE_MODE( _mode_ ) - -//#define HAL_UCACHE_WRITETHRU_MODE 0 -//#define HAL_UCACHE_WRITEBACK_MODE 1 - -// Load the contents of the given address range into the data cache -// and then lock the cache so that it stays there. -//#define HAL_UCACHE_LOCK(_base_, _size_) - -// Undo a previous lock operation -//#define HAL_UCACHE_UNLOCK(_base_, _size_) - -// Unlock entire cache -//#define HAL_UCACHE_UNLOCK_ALL() - -//----------------------------------------------------------------------------- -// Data cache line control - -// Allocate cache lines for the given address range without reading its -// contents from memory. -//#define HAL_UCACHE_ALLOCATE( _base_ , _size_ ) - -// Write dirty cache lines to memory and invalidate the cache entries -// for the given address range. -#define HAL_UCACHE_FLUSH( _base_ , _size_ ) HAL_UCACHE_SYNC() - -// Invalidate cache lines in the given range without writing to memory. -//#define HAL_UCACHE_INVALIDATE( _base_ , _size_ ) - -// Write dirty cache lines to memory for the given address range. -#define HAL_UCACHE_STORE( _base_ , _size_ ) HAL_UCACHE_SYNC() - -// Preread the given range into the cache with the intention of reading -// from it later. -//#define HAL_UCACHE_READ_HINT( _base_ , _size_ ) - -// Preread the given range into the cache with the intention of writing -// to it later. -//#define HAL_UCACHE_WRITE_HINT( _base_ , _size_ ) - -// Allocate and zero the cache lines associated with the given range. -//#define HAL_UCACHE_ZERO( _base_ , _size_ ) - -//----------------------------------------------------------------------------- -// Global control of data cache - -#define HAL_DCACHE_SIZE HAL_UCACHE_SIZE -#define HAL_DCACHE_LINE_SIZE HAL_UCACHE_LINE_SIZE -#define HAL_DCACHE_WAYS HAL_UCACHE_WAYS -#define HAL_DCACHE_SETS HAL_UCACHE_SETS - -// Enable the data cache -#define HAL_DCACHE_ENABLE() HAL_UCACHE_ENABLE() - -// Disable the data cache -#define HAL_DCACHE_DISABLE() HAL_UCACHE_DISABLE() - -// Invalidate the entire cache -#define HAL_DCACHE_INVALIDATE_ALL() HAL_UCACHE_INVALIDATE_ALL() - -// Synchronize the contents of the cache with memory. -#define HAL_DCACHE_SYNC() HAL_UCACHE_SYNC() - -// Query the state of the data cache -#define HAL_DCACHE_IS_ENABLED(_state_) HAL_UCACHE_IS_ENABLED(_state_) - -// Set the data cache refill burst size -//#define HAL_DCACHE_BURST_SIZE(_size_) - -// Set the data cache write mode -//#define HAL_DCACHE_WRITE_MODE( _mode_ ) - -//#define HAL_DCACHE_WRITETHRU_MODE 0 -//#define HAL_DCACHE_WRITEBACK_MODE 1 - -// Load the contents of the given address range into the data cache -// and then lock the cache so that it stays there. -//#define HAL_DCACHE_LOCK(_base_, _size_) - -// Undo a previous lock operation -//#define HAL_DCACHE_UNLOCK(_base_, _size_) - -// Unlock entire cache -//#define HAL_DCACHE_UNLOCK_ALL() - -//----------------------------------------------------------------------------- -// Data cache line control - -// Allocate cache lines for the given address range without reading its -// contents from memory. -//#define HAL_DCACHE_ALLOCATE( _base_ , _size_ ) - -// Write dirty cache lines to memory and invalidate the cache entries -// for the given address range. -#define HAL_DCACHE_FLUSH( _base_ , _size_ ) HAL_UCACHE_FLUSH( _base_ , _size_ ) - -// Invalidate cache lines in the given range without writing to memory. -//#define HAL_DCACHE_INVALIDATE( _base_ , _size_ ) - -// Write dirty cache lines to memory for the given address range. -#define HAL_DCACHE_STORE( _base_ , _size_ ) HAL_UCACHE_STORE( _base_ , _size_ ) - -// Preread the given range into the cache with the intention of reading -// from it later. -//#define HAL_DCACHE_READ_HINT( _base_ , _size_ ) - -// Preread the given range into the cache with the intention of writing -// to it later. -//#define HAL_DCACHE_WRITE_HINT( _base_ , _size_ ) - -// Allocate and zero the cache lines associated with the given range. -//#define HAL_DCACHE_ZERO( _base_ , _size_ ) - -//----------------------------------------------------------------------------- -// Global control of Instruction cache - use Data cache controls since they -// are not separatable. - -#define HAL_ICACHE_SIZE HAL_UCACHE_SIZE -#define HAL_ICACHE_LINE_SIZE HAL_UCACHE_LINE_SIZE -#define HAL_ICACHE_WAYS HAL_UCACHE_WAYS -#define HAL_ICACHE_SETS HAL_UCACHE_SETS - -// Enable the instruction cache -#define HAL_ICACHE_ENABLE() HAL_UCACHE_ENABLE() - -// Disable the instruction cache -#define HAL_ICACHE_DISABLE() HAL_UCACHE_DISABLE() - -// Invalidate the entire cache -#define HAL_ICACHE_INVALIDATE_ALL() HAL_UCACHE_INVALIDATE_ALL() - -// Synchronize the contents of the cache with memory. -#define HAL_ICACHE_SYNC() HAL_UCACHE_SYNC() - -// Set the instruction cache refill burst size -//#define HAL_ICACHE_BURST_SIZE(_size_) - -// Load the contents of the given address range into the instruction cache -// and then lock the cache so that it stays there. -//#define HAL_ICACHE_LOCK(_base_, _size_) - -// Undo a previous lock operation -//#define HAL_ICACHE_UNLOCK(_base_, _size_) - -// Unlock entire cache -//#define HAL_ICACHE_UNLOCK_ALL() - -//----------------------------------------------------------------------------- -// Instruction cache line control - -// Invalidate cache lines in the given range without writing to memory. -//#define HAL_ICACHE_INVALIDATE( _base_ , _size_ ) - -//----------------------------------------------------------------------------- -#endif // ifndef CYGONCE_HAL_CACHE_H -// End of hal_cache.h
deleted file mode 100644 --- a/packages/hal/arm/cl7211/current/include/hal_cl7211.h +++ /dev/null @@ -1,260 +0,0 @@ -#ifndef CYGONCE_HAL_CL7211_H -#define CYGONCE_HAL_CL7211_H - -/*============================================================================= -// -// hal_cl7211.h -// -// HAL Support for Kernel Diagnostic Routines -// -//============================================================================= -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//============================================================================= -//#####DESCRIPTIONBEGIN#### -// -// Author(s): gthomas -// Contributors: gthomas -// Date: 1999-04-19 -// Purpose: Cirrus Logic CL7211 hardware description -// Description: -// Usage: #include <cyg/hal/hal_cl7211.h> -// -//####DESCRIPTIONEND#### -// -//===========================================================================*/ - -// Note: these defintions match the documentation, thus no attempt is made -// to sanitize (mangle) the names. Also, care should be taken to keep this -// clean for use in assembly code (no "C" constructs). - -#define PADR 0x80000000 // Port A data register -#define PBDR 0x80000001 // Port B data register -#define PDDR 0x80000003 // Port D data register -#define PADDR 0x80000040 // Port A data direction register -#define PBDDR 0x80000041 // Port B data direction register -#define PDDDR 0x80000043 // Port D data direction register -#define PEDR 0x80000080 // Port E data register -#define PEDDR 0x800000C0 // Port E data direction register - -#define SYSCON1 0x80000100 // System control register #1 -#define SYSCON1_KBD_CTL 0xF // Keyboard scan - mask -#define SYSCON1_KBD_HIGH 0 // Keyboard scan - all columns high -#define SYSCON1_KBD_LOW 1 // Keyboard scan - all columns low -#define SYSCON1_KBD_TRISTATE 2 // Keyboard scan - all columns tri-state -#define SYSCON1_KBD_COL(n) (n+8)// Keyboard scan - select column 'n' -#define SYSCON1_TC1M (1<<4) // Timer/counter #1 - prescale mode -#define SYSCON1_TC1S (1<<5) // Timer/counter #1 - source (1=512KHz,0=2KHz) -#define SYSCON1_TC2M (1<<6) // Timer/counter #2 - prescale mode -#define SYSCON1_TC2S (1<<7) // Timer/counter #2 - source (1=512KHz,0=2KHz) -#define SYSCON1_UART1EN (1<<8) // UART #1 enable -#define SYSCON1_BZTOG (1<<9) // Buzzer bit -#define SYSCON1_BZMOD (1<<10) // Buzzer mode (0=direct,1=TC1) -#define SYSCON1_DBGEN (1<<11) // Enable debug mode -#define SYSCON1_LCDEN (1<<12) // Enable LCD -#define SYSCON1_CDENTX (1<<13) // Enable Tx on CODEC -#define SYSCON1_CDENRX (1<<14) // Enable Rx on CODEC -#define SYSCON1_SIREN (1<<15) // Enable SIR protocol on UART #1 -#define SYSCON1_ADCKSEL (3<<16) // Microwire clock -#define SYSCON1_ADC_CLOCK_4kHZ (0<<16) -#define SYSCON1_ADC_CLOCK_16kHZ (1<<16) -#define SYSCON1_ADC_CLOCK_64kHZ (2<<16) -#define SYSCON1_ADC_CLOCK_128kHZ (3<<16) -#define SYSCON1_EXCKEN (1<<18) // External expansion clock enable -#define SYSCON1_WAKEDIS (1<<19) // Disable wakeup from snooze (do not disturb) -#define SYSCON1_IRTXM (1<<20) // IrDA Tx mode - -#define SYSCON2 0x80001100 // System control register #2 -#define SYSCON2_SERSEL (1<<0) // 0=master/slave SSI, 1=CODEC -#define SYSCON2_KBD6 (1<<1) // 0=8 bit keyboard, 1=6 bit -#define SYSCON2_DRAMSZ (1<<2) // DRAM width 0=32, 1=16 -#define SYSCON2_KBWEN (1<<3) // 1=allow wake up from keyboard -#define SYSCON2_SS2TXEN (1<<4) // Enable Tx on SS2 -#define SYSCON2_PCMCIA1 (1<<5) // Enable PCMCIA slot #1 -#define SYSCON2_PCMCIA2 (1<<6) // Enable PCMCIA slot #2 -#define SYSCON2_SS2RXEN (1<<7) // Enable Rx on SS2 -#define SYSCON2_UART2EN (1<<8) // Enable UART #2 -#define SYSCON2_SS2MAEN (1<<9) // Enable master mode on SS2 -#define SYSCON2_SNZPOL (1<<10) // Polarity of LCD during snooze -#define SYSCON2_LCDSNZE (1<<11) -#define SYSCON2_OSTB (1<<12) // Operating system timing 0=512KHz, 1=500KHz -#define SYSCON2_CLKENSL (1<<13) // Source of run/clken signal 0=CLKEN, 1=RUN -#define SYSCON2_BUZFREQ (1<<14) // Buzzer frequency 0=timer, 1=fixed PLL/xtal - -#define SYSCON3 0x80002200 // System control #3 -#define SYSCON3_ADCCON (1<<0) // ADC enable -#define SYSCON3_CLKCTL(n) (n<<1) // Processor block speed ((n+1)*18.432)MHz - -#define SYSFLG1 0x80000140 // System flags #1 -#define SYSFLG1_MCDR (1<<0) // Media changed - direct read -#define SYSFLG1_DCDET (1<<1) // 0=mains power, 1=battery -#define SYSFLG1_WUDR (1<<2) // Wakeup direct -#define SYSFLG1_WUON (1<<3) // Woken up -#define SYSFLG1_DID (0xF<<4) // Display ID -#define SYSFLG1_CTS (1<<8) // UART1 CTS -#define SYSFLG1_DSR (1<<9) // UART1 DSR -#define SYSFLG1_DCD (1<<10) // UART1 DCD -#define SYSFLG1_UBUSY1 (1<<11) // UART1 Tx busy -#define SYSFLG1_NBFLG (1<<12) // New battery flag -#define SYSFLG1_RSTFLG (1<<13) // Reset (button) flag -#define SYSFLG1_PFFLG (1<<14) // Power fail flag -#define SYSFLG1_CLDFLG (1<<15) // Cold start flag -#define SYSFLG1_RTCDIV (0x3F<<16) // Real time clock divider (counter) -#define SYSFLG1_URXFE1 (1<<22) // UART1 Rx FIFO empty -#define SYSFLG1_UTXFF1 (1<<23) // UART1 Tx FIFO full -#define SYSFLG1_CRXFE (1<<24) // CODEC Rx FIFO empty -#define SYSFLG1_CTXFF (1<<25) // CODEC Tx FIFO full -#define SYSFLG1_SSIBUSY (1<<26) // Synchronous serial interface busy -#define SYSFLG1_BOOTBITS (3<<27) // Boot mode (0=32,1=8,2=16,3=XX) -#define SYSFLG1_ID (1<<29) // ID=1 -#define SYSFLG1_VERID (3<<30) // Board version - -#define SYSFLG2 0x80001140 // System flags #2 - -#define INTSR1 0x80000240 // Interrupt status register #1 -#define INTSR1_EXTFIQ (1<<0) // External fast interrupt -#define INTSR1_BLINT (1<<1) // Battery low interrupt -#define INTSR1_WEINT (1<<2) // Watchdog expired interrupt -#define INTSR1_MCINT (1<<3) // Media changed interrupt -#define INTSR1_CSINT (1<<4) // CODEC sound interrupt -#define INTSR1_EINT1 (1<<5) // External interrupt #1 -#define INTSR1_EINT2 (1<<6) // External interrupt #2 -#define INTSR1_EINT3 (1<<7) // External interrupt #3 -#define INTSR1_TC1OI (1<<8) // Timer/counter #1 underflow -#define INTSR1_TC2OI (1<<9) // Timer/counter #2 underflow -#define INTSR1_RTCMI (1<<10) // Real time clock match -#define INTSR1_TINT (1<<11) // 64Hz tick -#define INTSR1_UTXINT1 (1<<12) // UART1 Tx interrupt -#define INTSR1_URXINT1 (1<<13) // UART1 Rx interrupt -#define INTSR1_UMSINT (1<<14) // UART1 modem line change -#define INTSR1_SSEOTI (1<<15) // Synchronous serial end of transfer -#define INTMR1 0x80000280 // Interrupt mask register #1 - -#define INTSR2 0x80001240 // Interrupt status #2 -#define INTSR2_KBDINT (1<<0) // Keyboard interrupt -#define INTSR2_SS2RX (1<<1) // Synchronous serial #2 Rx -#define INTSR2_SS2TX (1<<2) // Synchronous serial #2 Tx -#define INTSR2_UTXINT2 (1<<12) // UART #2 Tx interrupt -#define INTSR2_URXINT2 (1<<13) // UART #2 Rx interrupt -#define INTMR2 0x80001280 // Interrupt mask #2 - -#define INTSR3 0x80002240 // Interrupt status #3 -#if defined(__CL7211) -#define INTSR3_MCPINT (1<<0) // MCP interrupt -#endif -#define INTMR3 0x80002280 // Interrupt mask #3 - -#define UARTDR1 0x80000480 // UART #1 data register -#define UARTDR2 0x80001480 // UART #2 data register -#define UBLCR1 0x800004C0 // UART #1 baud rate / line control -#define UBLCR2 0x800014C0 // UART #2 baud rate / line control -#define UBLCR_BRDV 0xFFF // Baud rate -#define UBLCR_BREAK (1<<12) // Generate break signal -#define UBLCR_PRTEN (1<<13) // Enable parity -#define UBLCR_EVENPRT (1<<14) // 1=even parity, 0=odd -#define UBLCR_XSTOP (1<<15) // 0=1 stop bit, 1=2 stop bits -#define UBLCR_FIFOEN (1<<16) // Enable Tx/Rx FIFOs -#define UBLCR_WRDLEN (3<<17) // Word (character) length field -#define UBLCR_WRDLEN5 (0<<17) -#define UBLCR_WRDLEN6 (1<<17) -#define UBLCR_WRDLEN7 (2<<17) -#define UBLCR_WRDLEN8 (3<<17) -#define UART_DIVISOR 230400 -#define UART_BITRATE(baud) ((UART_DIVISOR/(baud))-1) - -#define MEMCFG1 0x80000180 // Memory configuration register #1 -#define MEMCFG2 0x800001C0 // Memory configuration register #2 - -#define DRFPR 0x80000200 // DRAM refresh period - -#define LCDCON 0x800002C0 // LDC control -#define LCDCON_BUFSIZ 0x00001FFF // Video buffer size -#define LCDCON_BUFSIZ_S 0 // Position of buffer size -#define LCDCON_LINE_LENGTH 0x0007E000 // Line length -#define LCDCON_LINE_LENGTH_S 13 // Position of line length -#define LCDCON_PIX_PRESCALE 0x01F80000 // Pixel prescale value -#define LCDCON_PIX_PRESCALE_S 19 // Position of prescale value -#define LCDCON_AC_PRESCALE 0x3E000000 // LCD AC bias frequency -#define LCDCON_AC_PRESCALE_S 25 // Position to AC bias -#define LCDCON_GSEN 0x40000000 // Enable greyscale -#define LCDCON_GSMD 0x80000000 // Greyscale mode - // 00 - 1bpp, 01 - 2bpp, 11 - 4 bpp - -#define TC1D 0x80000300 // Timer/Counter #1 register -#define TC2D 0x80000340 // Timer/Counter #2 register -#define RTCDR 0x80000380 // Real time clock data register -#define RTCMR 0x800003C0 // Real time clock match register - -#define PMPCON 0x80000400 // DC-DC pump control - -#define CODR 0x80000440 // CODEC data register - -#define SYNCIO 0x80000500 // Synchronous I/O data register - -#define PALLSW 0x80000540 // LCD palette - LSW (Pixel values 0..7) -#define PALMSW 0x80000580 // LCD palette - MSW (Pixel values 8..15) - -#define STFCLR 0x800005C0 // Clear startup reason flags -#define BLEOI 0x80000600 // Clear battery low interrupt -#define MCEOI 0x80000640 // Clear media changed interrupt -#define TEOI 0x80000680 // Clear tick/watchdog interrupt -#define TC1EOI 0x800006C0 // Clear timer/counter #1 interrupt -#define TC2EOI 0x80000700 // Clear timer/counter #2 interrupt -#define RTCEOI 0x80000740 // Clear real time clock interrupt -#define UMSEOI 0x80000780 // Clear UART modem status change interrupt -#define COEOI 0x800007C0 // Clear CODEC sound interrupt - -#define HALT 0x80000800 // Enter 'idle' state -#define STDBY 0x80000840 // Enter 'standby' state - -#define FRBADDR 0x80001000 // LCD frame buffer start - -#define SNZDISP 0x800012C0 // Snooze display size - -#define SS2DR 0x80001500 // Master/slave SSI2 register - -#define SRXEOF 0x80001600 // Clear Rx FIFO overflow flag -#define SS2POP 0x800016C0 // Pop SSI2 residual byte into FIFO - -#define KBDEOI 0x80001700 // Clear keyboard interrupt - -#define SNOOZE 0x80001800 // Enter 'snooze' state - -#if defined(__CL7211) -#define MCCR 0x80002000 // MCP control register -#define MCDR0 0x80002040 // MCP data register #0 -#define MCDR1 0x80002080 // MCP data register #1 -#define MCDR2 0x800020C0 // MCP data register #2 -#define MCSR 0x80002100 // MCP status register -#endif - - -#define LEDFLSH 0x800022C0 // LED flash control -#define LEDFLSH_ENABLE (1<<6) // LED enabled -#define LEDFLSH_DUTY(n) ((n-1)<<2) // LED on ratio -#define LEDFLSH_PERIOD(n) (n-1) // LED active time (1..4) - -#define KBD_PORT 0x30010000 // Extra 8 bits of keyboard data - -/*---------------------------------------------------------------------------*/ -/* end of hal_cl7211.h */ -#endif /* CYGONCE_HAL_CL7211_H */
deleted file mode 100644 --- a/packages/hal/arm/cl7211/current/include/hal_diag.h +++ /dev/null @@ -1,67 +0,0 @@ -#ifndef CYGONCE_HAL_DIAG_H -#define CYGONCE_HAL_DIAG_H - -/*============================================================================= -// -// hal_diag.h -// -// HAL Support for Kernel Diagnostic Routines -// -//============================================================================= -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//============================================================================= -//#####DESCRIPTIONBEGIN#### -// -// Author(s): nickg, gthomas -// Contributors: nickg, gthomas -// Date: 1998-09-11 -// Purpose: HAL Support for Kernel Diagnostic Routines -// Description: Diagnostic routines for use during kernel development. -// Usage: #include <cyg/hal/hal_diag.h> -// -//####DESCRIPTIONEND#### -// -//===========================================================================*/ - -#include <pkgconf/hal.h> - -#include <cyg/infra/cyg_type.h> - -/*---------------------------------------------------------------------------*/ -/* functions implemented in hal_diag.c */ - -externC void hal_diag_init(void); -externC void hal_diag_write_char(char c); -externC void hal_diag_read_char(char *c); - -/*---------------------------------------------------------------------------*/ - -#define HAL_DIAG_INIT() hal_diag_init() - -#define HAL_DIAG_WRITE_CHAR(_c_) hal_diag_write_char(_c_) - -#define HAL_DIAG_READ_CHAR(_c_) hal_diag_read_char(&_c_) - -/*---------------------------------------------------------------------------*/ -/* end of hal_diag.h */ -#endif /* CYGONCE_HAL_DIAG_H */
deleted file mode 100644 --- a/packages/hal/arm/cl7211/current/include/hal_platform_ints.h +++ /dev/null @@ -1,85 +0,0 @@ -#ifndef CYGONCE_HAL_PLATFORM_INTS_H -#define CYGONCE_HAL_PLATFORM_INTS_H -//========================================================================== -// -// hal_platform_ints.h -// -// HAL Interrupt and clock support -// -//========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//========================================================================== -//#####DESCRIPTIONBEGIN#### -// -// Author(s): gthomas -// Contributors: gthomas -// Date: 1999-04-21 -// Purpose: Define Interrupt support -// Description: The interrupt details for the CL7xxx are defined here. -// Usage: -// #include <cyg/hal/hal_platform_ints.h> -// ... -// -// -//####DESCRIPTIONEND#### -// -//========================================================================== - -#define CYGNUM_HAL_INTERRUPT_unused 0 -#define CYGNUM_HAL_INTERRUPT_EXTFIQ 1 -#define CYGNUM_HAL_INTERRUPT_BLINT 2 -#define CYGNUM_HAL_INTERRUPT_WEINT 3 -#define CYGNUM_HAL_INTERRUPT_MCINT 4 -#define CYGNUM_HAL_INTERRUPT_CSINT 5 -#define CYGNUM_HAL_INTERRUPT_EINT1 6 -#define CYGNUM_HAL_INTERRUPT_EINT2 7 -#define CYGNUM_HAL_INTERRUPT_EINT3 8 -#define CYGNUM_HAL_INTERRUPT_TC1OI 9 -#define CYGNUM_HAL_INTERRUPT_TC2OI 10 -#define CYGNUM_HAL_INTERRUPT_RTCMI 11 -#define CYGNUM_HAL_INTERRUPT_TINT 12 -#define CYGNUM_HAL_INTERRUPT_UTXINT1 13 -#define CYGNUM_HAL_INTERRUPT_URXINT1 14 -#define CYGNUM_HAL_INTERRUPT_UMSINT 15 -#define CYGNUM_HAL_INTERRUPT_SSEOTI 16 -#define CYGNUM_HAL_INTERRUPT_KBDINT 17 -#define CYGNUM_HAL_INTERRUPT_SS2RX 18 -#define CYGNUM_HAL_INTERRUPT_SS2TX 19 -#define CYGNUM_HAL_INTERRUPT_UTXINT2 20 -#define CYGNUM_HAL_INTERRUPT_URXINT2 21 -#if defined(__CL7211) -#define CYGNUM_HAL_INTERRUPT_MCPINT 22 -#endif - -#define CYGNUM_HAL_ISR_MIN 0 -#if defined(__CL7111) -#define CYGNUM_HAL_ISR_MAX 21 -#else -#define CYGNUM_HAL_ISR_MAX 22 -#endif -#define CYGNUM_HAL_ISR_COUNT (CYGNUM_HAL_ISR_MAX+1) - -// The vector used by the Real time clock -#define CYGNUM_HAL_INTERRUPT_RTC CYGNUM_HAL_INTERRUPT_TC2OI - -#endif // CYGONCE_HAL_PLATFORM_INTS_H
deleted file mode 100644 --- a/packages/hal/arm/cl7211/current/include/hal_platform_setup.h +++ /dev/null @@ -1,421 +0,0 @@ -#ifndef CYGONCE_HAL_PLATFORM_SETUP_H -#define CYGONCE_HAL_PLATFORM_SETUP_H - -/*============================================================================= -// -// hal_platform_setup.h -// -// Platform specific support for HAL (assembly code) -// -//============================================================================= -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//============================================================================= -//#####DESCRIPTIONBEGIN#### -// -// Author(s): gthomas -// Contributors: gthomas -// Date: 1999-04-21 -// Purpose: Cirrus CL7211 platform specific support routines -// Description: -// Usage: #include <cyg/hal/hal_platform_setup.h> -// -//####DESCRIPTIONEND#### -// -//===========================================================================*/ - -#include <pkgconf/system.h> // System-wide configuration info -#include CYGBLD_HAL_PLATFORM_H // Platform specific configuration -#include <cyg/hal/hal_cl7211.h> // Platform specific hardware definitions -#include <cyg/hal/hal_mmu.h> // MMU definitions - -#define CYGHWR_HAL_ARM_HAS_MMU // This processor has an MMU - -#if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_STUBS) - -// -// Memory map - set up by ROM (GDB stubs) -// -// Region Logical Address Physical Address -// DRAM 0x00000000..0x00xFFFFF 0xC00x0000 (see below) -// Expansion 2 0x20000000 0x20000000 -// Expansion 3 0x30000000 0x30000000 -// PCMCIA 0 0x40000000 0x40000000 -// PCMCIA 1 0x50000000 0x50000000 -// SRAM 0x60000000..0x600007FF 0x60000000 -// I/O 0x80000000 0x80000000 -// MMU Tables 0xC00y0000 -// LCD buffer 0xC0000000..0xC001FFFF 0xC0000000 -// ROM 0xE0000000..0xEFFFFFFF 0x00000000 -// ROM 0xF0000000..0xFFFFFFFF 0x10000000 - -#ifdef CYGHWR_HAL_ARM_CL7211_LCD_INSTALLED -#define LCD_BUFFER_SIZE 0x00020000 -#else -#define LCD_BUFFER_SIZE 0x00000000 -#endif -#define DRAM_PA_START 0xC0000000 -#define MMU_BASE DRAM_PA_START+LCD_BUFFER_SIZE -#define PTE_BASE DRAM_PA_START+0x4000+LCD_BUFFER_SIZE -#if (CYGHWR_HAL_ARM_CL7211_DRAM_SIZE == 2) -#define MMU_TABLES_SIZE 0x4000+0x1000+0x1000 // RAM used for PTE entries -#define DRAM_LA_END 0x00200000-MMU_TABLES_SIZE -#elif (CYGHWR_HAL_ARM_CL7211_DRAM_SIZE == 16) -#define MMU_TABLES_SIZE 0x4000+0x4000+0x1000 // RAM used for PTE entries -#define DRAM_LA_END 0x01000000-MMU_TABLES_SIZE -#endif -#define DRAM_LA_START 0x00000000 -#define DRAM_PA MMU_BASE+MMU_TABLES_SIZE -#define LCD_LA_START 0xC0000000 -#define LCD_LA_END 0xC0020000 -#define LCD_PA 0xC0000000 -#define ROM0_LA_START 0xE0000000 -#define ROM0_PA 0x00000000 -#define ROM0_LA_END 0xF0000000 -#define ROM1_LA_START 0xF0000000 -#define ROM1_LA_END 0x00000000 -#define ROM1_PA 0x10000000 -#define EXPANSION2_LA_START 0x20000000 -#define EXPANSION2_PA 0x20000000 -#define EXPANSION3_LA_START 0x30000000 -#define EXPANSION3_PA 0x30000000 -#define PCMCIA0_LA_START 0x40000000 -#define PCMCIA0_PA 0x40000000 -#define PCMCIA1_LA_START 0x50000000 -#define PCMCIA1_PA 0x50000000 -#define SRAM_LA_START 0x60000000 -#define SRAM_LA_END 0x60001000 -#define SRAM_PA 0x60000000 -#define IO_LA_START 0x80000000 -#define IO_LA_END 0x80003000 -#define IO_PA 0x80000000 - -#if (CYGHWR_HAL_ARM_CL7211_DRAM_SIZE == 2) -// Note: The DRAM on this board is very irregular in that every -// other 256K piece is missing. E.g. only these [physical] -// addresses are valid: -// 0xC0000000..0xC003FFFF -// 0xC0080000..0xC00BFFFF -// 0xC0200000..0xC023FFFF Note the additional GAP! -// etc. -// 0xC0800000..0xC083FFFF Note the additional GAP! -// 0xC0880000..0xC08CFFFF -// 0xC0A00000..0xC0A3FFFF -// etc. -// The MMU mapping code takes this into consideration and creates -// a continuous logical map for the DRAM. -#define MAP_DRAM \ -/* Map DRAM */ ;\ - ldr r3,=DRAM_LA_START ;\ - ldr r4,=DRAM_LA_END ;\ - ldr r5,=DRAM_PA ;\ -/* 0x00000000..0x000FFFFF */ ;\ - mov r6,r2 /* Set up page table descriptor */ ;\ - ldr r7,=MMU_L1_TYPE_Page ;\ - orr r6,r6,r7 ;\ - str r6,[r1],#4 /* Store PTE, update pointer */ ;\ -10: mov r6,r5 /* Build page table entry */ ;\ - ldr r7,=MMU_L2_TYPE_Small|MMU_AP_Any|MMU_Bufferable|MMU_Cacheable ;\ - orr r6,r6,r7 ;\ - ldr r7,=MMU_PAGE_SIZE ;\ - str r6,[r2],#4 /* Next page */ ;\ - add r3,r3,r7 ;\ - add r5,r5,r7 ;\ - ldr r8,=DRAM_LA_START+MMU_SECTION_SIZE ;\ - cmp r3,r8 /* Done with first 1M? */ ;\ - beq 20f ;\ - ldr r7,=0x40000 /* Special check for 256K boundary */ ;\ - and r7,r7,r5 ;\ - cmp r7,#0 ;\ - beq 10b ;\ - add r5,r5,r7 /* Skip 256K hole */ ;\ - ldr r7,=0x100000 ;\ - and r7,r5,r7 ;\ - beq 10b ;\ - add r5,r5,r7 /* Nothing at 0xC0100000 */ ;\ - ldr r7,=0x400000 /* Also nothing at 0xC0400000 */ ;\ - and r7,r5,r7 ;\ - beq 10b ;\ - add r5,r5,r7 ;\ - b 10b ;\ -20: ;\ -/* 0x00100000..0x001FFFFF */ ;\ - mov r6,r2 /* Set up page table descriptor */ ;\ - ldr r7,=MMU_L1_TYPE_Page ;\ - orr r6,r6,r7 ;\ - str r6,[r1],#4 /* Store PTE, update pointer */ ;\ -10: mov r6,r5 /* Build page table entry */ ;\ - ldr r7,=MMU_L2_TYPE_Small|MMU_AP_Any|MMU_Bufferable|MMU_Cacheable ;\ - orr r6,r6,r7 ;\ - ldr r7,=MMU_PAGE_SIZE ;\ - str r6,[r2],#4 /* Next page */ ;\ - add r3,r3,r7 ;\ - cmp r3,r4 /* Done with first DRAM? */ ;\ - beq 20f ;\ - add r5,r5,r7 ;\ - ldr r7,=0x40000 /* Special check for 256K boundary */ ;\ - and r7,r7,r5 ;\ - cmp r7,#0 ;\ - beq 10b ;\ - add r5,r5,r7 /* Skip 256K hole */ ;\ - ldr r7,=0x100000 ;\ - and r7,r5,r7 ;\ - beq 10b ;\ - add r5,r5,r7 /* Nothing at 0xC0300000 */ ;\ - ldr r7,=0x400000 /* Also nothing at 0xC0400000 */ ;\ - and r7,r5,r7 ;\ - beq 10b ;\ - add r5,r5,r7 ;\ - b 10b ;\ -20: ; -#elif (CYGHWR_HAL_ARM_CL7211_DRAM_SIZE == 16) -// The 16M board is arranged as: -// 0xC0000000..0xC07FFFFF -// 0xC1000000..0xC17FFFFF -#define MAP_DRAM \ -/* Map DRAM */ ;\ - ldr r3,=DRAM_LA_START ;\ - ldr r4,=DRAM_LA_END ;\ - ldr r5,=DRAM_PA ;\ -/* 0xXXX00000..0xXXXFFFFF */ ;\ -10: mov r6,r2 /* Set up page table descriptor */ ;\ - ldr r7,=MMU_L1_TYPE_Page ;\ - orr r6,r6,r7 ;\ - str r6,[r1],#4 /* Store PTE, update pointer */ ;\ - ldr r8,=MMU_SECTION_SIZE/MMU_PAGE_SIZE ;\ - ldr r9,=DRAM_PA_START+0x00800000 /* Need to skip at 8M boundary */ ;\ -12: cmp r5,r9 ;\ - bne 15f ;\ - ldr r5,=DRAM_PA_START+0x01000000 /* Next chunk of DRAM */ ;\ -15: mov r6,r5 /* Build page table entry */ ;\ - ldr r7,=MMU_L2_TYPE_Small|MMU_AP_Any|MMU_Bufferable|MMU_Cacheable ;\ - orr r6,r6,r7 ;\ - ldr r7,=MMU_PAGE_SIZE ;\ - str r6,[r2],#4 /* Next page */ ;\ - add r3,r3,r7 ;\ - add r5,r5,r7 ;\ - cmp r3,r4 /* End of DRAM? */ ;\ - beq 20f ;\ - sub r8,r8,#1 /* End of 1M section? */ ;\ - cmp r8,#0 ;\ - bne 12b /* Next page */ ;\ - b 10b /* Next section */ ;\ -20: -#else -#err Invalid DRAM size selected -#endif - -#ifdef CYG_HAL_ARM_CL7111 // CL7111, 710 processor -#define MMU_INITIALIZE \ - ldr r1,=MMU_Control_Init ;\ - mcr MMU_CP,0,r1,MMU_Control,c0 /* MMU off */ ;\ - ldr r1,=MMU_BASE ;\ - mcr MMU_CP,0,r1,MMU_Base,c0 ;\ - mcr MMU_CP,0,r1,MMU_FlushTLB,c0,0 /* Invalidate TLB */ ;\ - mcr MMU_CP,0,r1,MMU_FlushIDC,c0,0 /* Invalidate Caches */ ;\ - ldr r1,=0xFFFFFFFF ;\ - mcr MMU_CP,0,r1,MMU_DomainAccess,c0 ;\ - ldr r2,=10f ;\ - ldr r1,=MMU_Control_Init|MMU_Control_M ;\ - mcr MMU_CP,0,r1,MMU_Control,c0 ;\ - mov pc,r2 /* Change address spaces */ ;\ - nop ;\ - nop ;\ - nop ;\ -10: -#else // EP7211, 720T processor -#define MMU_INITIALIZE ;\ - ldr r1,=MMU_Control_Init ;\ - mcr MMU_CP,0,r1,MMU_Control,c0 /* MMU off */ ;\ - ldr r1,=MMU_BASE ;\ - mcr MMU_CP,0,r1,MMU_Base,c0 ;\ - mcr MMU_CP,0,r1,MMU_TLB,c7,0 /* Invalidate TLB - 720 style */ ;\ - mcr MMU_CP,0,r1,MMU_FlushIDC,c0,0 /* Invalidate Caches */ ;\ - ldr r1,=0xFFFFFFFF ;\ - mcr MMU_CP,0,r1,MMU_DomainAccess,c0 ;\ - ldr r2,=10f ;\ - ldr r3,=__exception_handlers ;\ - sub r2,r2,r3 ;\ - ldr r3,=ROM0_LA_START ;\ - add r2,r2,r3 ;\ - ldr r1,=MMU_Control_Init|MMU_Control_M ;\ - mcr MMU_CP,0,r1,MMU_Control,c0 ;\ - mov pc,r2 /* Change address spaces */ ;\ - nop ;\ - nop ;\ - nop ;\ -10: -#endif - -#define PLATFORM_SETUP1 \ -/* Initialize memory configuration */ ;\ - ldr r1,=MEMCFG1 ;\ - ldr r2,=0x8200A080 /* FIXME - what is this? */ ;\ - str r2,[r1] ;\ - ldr r1,=MEMCFG2 ;\ - ldr r2,=0xFEFC0000 ;\ - str r2,[r1] ;\ - ldr r1,=DRFPR ;\ - ldr r2,=0x81 /* DRAM refresh = 64KHz */ ;\ - strb r2,[r1] ;\ -/* Initialize MMU to create new memory map */ ;\ - ldr r1,=MMU_BASE ;\ - ldr r2,=PTE_BASE ;\ - MAP_DRAM ;\ -/* Nothing until PCMCIA0 */ ;\ - ldr r3,=0x3FF /* Page tables need 2K boundary */ ;\ - add r2,r2,r3 ;\ - ldr r3,=~0x3FF ;\ - and r2,r2,r3 ;\ - ldr r3,=(DRAM_LA_END+0x000FFFFF)&0xFFF00000 ;\ - ldr r4,=EXPANSION2_LA_START ;\ - ldr r5,=MMU_L1_TYPE_Fault ;\ - ldr r7,=MMU_SECTION_SIZE ;\ -10: str r5,[r1],#4 ;\ - add r3,r3,r7 ;\ - cmp r3,r4 ;\ - bne 10b ;\ -/* EXPANSION2, EXPANSION3, PCMCIA0, PCMCIA1 */ ;\ - ldr r3,=EXPANSION2_LA_START ;\ - ldr r4,=SRAM_LA_START ;\ - ldr r5,=EXPANSION2_PA ;\ - ldr r6,=MMU_L1_TYPE_Section|MMU_AP_Any ;\ - ldr r7,=MMU_SECTION_SIZE ;\ -10: orr r0,r5,r6 ;\ - str r0,[r1],#4 ;\ - add r5,r5,r7 ;\ - add r3,r3,r7 ;\ - cmp r3,r4 ;\ - bne 10b ;\ -/* SRAM */ ;\ - ldr r3,=SRAM_LA_START ;\ - ldr r4,=MMU_L1_TYPE_Page|MMU_DOMAIN(0) ;\ - orr r4,r4,r2 ;\ - str r4,[r1],#4 ;\ - ldr r4,=MMU_L2_TYPE_Small|MMU_AP_Any|MMU_Bufferable|MMU_Cacheable ;\ - orr r4,r3,r4 ;\ - str r4,[r2],#4 ;\ - ldr r3,=SRAM_LA_START+MMU_PAGE_SIZE ;\ - ldr r4,=SRAM_LA_START+MMU_SECTION_SIZE ;\ - ldr r5,=MMU_L2_TYPE_Fault ;\ - ldr r7,=MMU_PAGE_SIZE ;\ -10: str r5,[r2],#4 ;\ - add r3,r3,r7 ;\ - cmp r3,r4 ;\ - bne 10b ;\ - ldr r4,=IO_LA_START ;\ - ldr r5,=MMU_L1_TYPE_Fault ;\ - ldr r7,=MMU_SECTION_SIZE ;\ -20: str r5,[r1],#4 ;\ - add r3,r3,r7 ;\ - cmp r3,r4 ;\ - bne 20b ;\ -/* I/O */ ;\ - ldr r3,=0x3FF /* Page tables need 2K boundary */ ;\ - add r2,r2,r3 ;\ - ldr r3,=~0x3FF ;\ - and r2,r2,r3 ;\ - ldr r4,=MMU_L1_TYPE_Page|MMU_DOMAIN(0) ;\ - orr r4,r4,r2 ;\ - str r4,[r1],#4 ;\ - ldr r3,=IO_LA_START ;\ - ldr r4,=IO_LA_END ;\ - ldr r7,=MMU_PAGE_SIZE ;\ - ldr r5,=IO_PA|MMU_L2_TYPE_Small|MMU_AP_All ;\ -10: str r5,[r2],#4 ;\ - add r5,r5,r7 ;\ - add r3,r3,r7 ;\ - cmp r3,r4 ;\ - bne 10b ;\ - ldr r4,=IO_LA_START+MMU_SECTION_SIZE ;\ - ldr r5,=MMU_L2_TYPE_Fault ;\ - ldr r7,=MMU_PAGE_SIZE ;\ -10: str r5,[r2],#4 ;\ - add r3,r3,r7 ;\ - cmp r3,r4 ;\ - bne 10b ;\ - ldr r4,=LCD_LA_START ;\ - ldr r5,=MMU_L1_TYPE_Fault ;\ - ldr r7,=MMU_SECTION_SIZE ;\ -20: str r5,[r1],#4 ;\ - add r3,r3,r7 ;\ - cmp r3,r4 ;\ - bne 20b ;\ -/* LCD Buffer & Unmapped DRAM (holes and all) */ ;\ - ldr r3,=LCD_LA_START ;\ - ldr r4,=ROM0_LA_START ;\ - ldr r5,=LCD_PA ;\ - ldr r6,=MMU_L1_TYPE_Section|MMU_AP_Any|MMU_Bufferable|MMU_Cacheable ;\ - ldr r7,=MMU_SECTION_SIZE ;\ -10: orr r0,r5,r6 ;\ - str r0,[r1],#4 ;\ - add r5,r5,r7 ;\ - add r3,r3,r7 ;\ - cmp r3,r4 ;\ - bne 10b ;\ -/* ROM0 */ ;\ - ldr r3,=ROM0_LA_START ;\ - ldr r4,=ROM0_LA_END ;\ - ldr r5,=ROM0_PA ;\ - ldr r6,=MMU_L1_TYPE_Section|MMU_AP_Any|MMU_Cacheable ;\ - ldr r7,=MMU_SECTION_SIZE ;\ -10: orr r0,r5,r6 ;\ - str r0,[r1],#4 ;\ - add r5,r5,r7 ;\ - add r3,r3,r7 ;\ - cmp r3,r4 ;\ - bne 10b ;\ -/* ROM1 */ ;\ - ldr r3,=ROM1_LA_START ;\ - ldr r4,=ROM1_LA_END ;\ - ldr r5,=ROM1_PA ;\ - ldr r6,=MMU_L1_TYPE_Section|MMU_AP_Any ;\ - ldr r7,=MMU_SECTION_SIZE ;\ -10: orr r0,r5,r6 ;\ - str r0,[r1],#4 ;\ - add r5,r5,r7 ;\ - add r3,r3,r7 ;\ - cmp r3,r4 ;\ - bne 10b ;\ -/* Now initialize the MMU to use this new page table */ ;\ - MMU_INITIALIZE ;\ - ldr r2,=__exception_handlers ;\ - ldr r3,=ROM0_LA_START ;\ - cmp r2,r3 ;\ - beq 20f ;\ - ldr r4,=__rom_data_end ;\ -15: ;\ - ldr r0,[r3],#4 ;\ - str r0,[r2],#4 ;\ - cmp r2,r4 ;\ - bne 15b ;\ -20: - -#else - -#define PLATFORM_SETUP1 -#endif - - -/*---------------------------------------------------------------------------*/ -/* end of hal_platform_setup.h */ -#endif /* CYGONCE_HAL_PLATFORM_SETUP_H */
deleted file mode 100644 --- a/packages/hal/arm/cl7211/current/include/pkgconf/hal_arm_cl7211.h +++ /dev/null @@ -1,226 +0,0 @@ -#ifndef CYGONCE_PKGCONF_HAL_ARM_CL7211_H -#define CYGONCE_PKGCONF_HAL_ARM_CL7211_H -// ==================================================================== -// -// pkgconf/hal_arm_cl7211.h -// -// HAL configuration file -// -// ==================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -// ==================================================================== -//#####DESCRIPTIONBEGIN#### -// -// Author(s): gthomas -// Contributors: gthomas -// Date: 1999-04-21 -// Purpose: To allow the user to edit HAL configuration options. -// Description: -// -//####DESCRIPTIONEND#### -// -// ==================================================================== - - -/* --------------------------------------------------------------------- - {{CFG_DATA - - cdl_package CYGPKG_HAL_ARM_CL7211 { - display "Cirrus Logic CLxx11 evaluation boards" - type radio - parent CYGPKG_HAL_ARM - description " - The CLxx11 HAL package provides the support needed to run - eCos on a Cirrus Logic CLxx11-1 eval board." - } - - cdl_option CYGHWR_HAL_ARM_CLxx11_CL7111 { - display "CL7111-1 variant" - parent CYGPKG_HAL_ARM_CL7211 - platform cl7111 - type radio - description " - Cirrus Logic CL7111 board with ARM710C processor." - } - - cdl_option CYGHWR_HAL_ARM_CLxx11_EB7211 { - display "EB7211-1 variant" - parent CYGPKG_HAL_ARM_CL7211 - platform eb7211 - type radio - description " - Cirrus Logic EB7211 board with CL7211 (ARM720) processor." - } - - cdl_option CYGHWR_HAL_ARM_CL7211_STARTUP { - display "Startup type" - parent CYGPKG_HAL_ARM_CL7211 - type enum - legal_values ram rom stubs - startup - description " - When targetting the CLxx11 eval boards it is possible to build - the system for either RAM bootstrap or ROM bootstrap(s). Select - 'ram' when building programs to load into RAM using onboard - debug software such as Angel or eCos GDB stubs. Select 'rom' - when building a stand-alone application which will be put - into ROM. Selection of 'stubs' is for the special case of - building the eCos GDB stubs themselves." - } - - }}CFG_DATA */ - -#define CYGHWR_HAL_ARM_CL7211_STARTUP ram - -/* --------------------------------------------------------------------- - {{CFG_DATA - cdl_option CYGHWR_HAL_ARM_CL7211_DIAG_PORT { - display "Diagnostic serial port" - parent CYGPKG_HAL_ARM_CL7211 - type enum - legal_values 0 1 - description " - The CLxx11 boards have two separate serial ports. This option - chooses which of these ports will be used." - } - - }}CFG_DATA */ -#define CYGHWR_HAL_ARM_CL7211_DIAG_PORT 0 - -/* --------------------------------------------------------------------- - {{CFG_DATA - cdl_option CYGHWR_HAL_ARM_CL7211_DIAG_BAUD { - display "Diagnostic serial port baud rate" - parent CYGPKG_HAL_ARM_CL7211 - type enum - legal_values 9600 19200 38400 115200 - description " - This option selects the baud rate used for the diagnostic port. - Note: this should match the value chosen for the GDB port if the - diagnostic and GDB port are the same." - } - - }}CFG_DATA */ -#define CYGHWR_HAL_ARM_CL7211_DIAG_BAUD 38400 - -/* --------------------------------------------------------------------- - {{CFG_DATA - cdl_option CYGHWR_HAL_ARM_CL7211_GDB_PORT { - display "GDB serial port" - parent CYGPKG_HAL_ARM_CL7211 - type enum - legal_values 0 1 - description " - The CLxx11 boards have two separate serial ports. This option - chooses which of these ports will be used to connect to a host - running GDB." - } - - }}CFG_DATA */ -#define CYGHWR_HAL_ARM_CL7211_GDB_PORT 0 - -/* --------------------------------------------------------------------- - {{CFG_DATA - cdl_option CYGHWR_HAL_ARM_CL7211_GDB_BAUD { - display "GDB serial port baud rate" - parent CYGPKG_HAL_ARM_CL7211 - type enum - legal_values 9600 19200 38400 115200 - description " - This option controls the baud rate used for the GDB connection." - } - - }}CFG_DATA */ -#define CYGHWR_HAL_ARM_CL7211_GDB_BAUD 38400 - -/* --------------------------------------------------------------------- - {{CFG_DATA - cdl_option CYGHWR_HAL_ARM_CL7211_PROCESSOR_CLOCK { - display "Processor clock rate" - parent CYGPKG_HAL_ARM_CL7211 - type enum - legal_values 18432 36864 49152 73728 - description " - The processor on the CL7211 can run at various frequencies." - } - - }}CFG_DATA */ -#define CYGHWR_HAL_ARM_CL7211_PROCESSOR_CLOCK 36864 - -/* --------------------------------------------------------------------- - {{CFG_DATA - cdl_option CYGHWR_HAL_ARM_CL7211_DRAM_SIZE { - display "DRAM size" - parent CYGPKG_HAL_ARM_CL7211 - type enum - legal_values 2 16 - description " - The CLxx11 boards can have various amounts of DRAM installed. - The machine needs to be initialized differently, depending - upon the amount installed." - } - - }}CFG_DATA */ -#define CYGHWR_HAL_ARM_CL7211_DRAM_SIZE 16 - -/* ---------------------------------------------------------------------------- - {{CFG_DATA - - cdl_option CYGHWR_HAL_ARM_CL7211_SOFTWARE_DRAM_REFRESH { - display "Perform DRAM refresh in software" - type bool - parent CYGPKG_HAL_ARM_CL7211 - description " - This option will add code that refreshes the DRAM by - touching all of DRAM during the system clock interrupt - processing." - } - - }}CFG_DATA */ - -#undef CYGHWR_HAL_ARM_CL7211_SOFTWARE_DRAM_REFRESH - -/* ---------------------------------------------------------------------------- - {{CFG_DATA - - cdl_option CYGHWR_HAL_ARM_CL7211_LCD_INSTALLED { - display "LCD panel" - type bool - parent CYGPKG_HAL_ARM_CL7211 - description " - If an LCD panel is installed, 128K of DRAM will be dedicated to the - LCD buffer by the system intialization." - } - - }}CFG_DATA */ -#define CYGHWR_HAL_ARM_CL7211_LCD_INSTALLED - -// Real-time clock/counter specifics - -#define CYGNUM_HAL_RTC_NUMERATOR 1000000000 -#define CYGNUM_HAL_RTC_DENOMINATOR 100 -#define CYGNUM_HAL_RTC_PERIOD 5120 // Assumes 512KHz clock - -/* -------------------------------------------------------------------*/ -#endif /* CYGONCE_PKGCONF_HAL_ARM_CL7211_H */ -/* EOF hal_arm_cl7211.h */
deleted file mode 100644 --- a/packages/hal/arm/cl7211/current/include/pkgconf/mlt_arm_cl7111_ram.ldi +++ /dev/null @@ -1,51 +0,0 @@ -//=========================================================================== -// -// MLT linker script export -// -//=========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//=========================================================================== - -// eCos memory layout - Mon May 17 08:04:39 1999 - -// This is a generated file - do not edit - -MEMORY -{ - ram : ORIGIN = 0x8000, LENGTH = 0x1b8000 -} - -SECTIONS -{ - SECTIONS_BEGIN - SECTION_rom_vectors (ram, 0x8000, LMA_EQ_VMA) - SECTION_text (ram, ALIGN (0x1), LMA_EQ_VMA) - SECTION_fini (ram, ALIGN (0x1), LMA_EQ_VMA) - SECTION_rodata (ram, ALIGN (0x1), LMA_EQ_VMA) - SECTION_rodata1 (ram, ALIGN (0x1), LMA_EQ_VMA) - SECTION_fixup (ram, ALIGN (0x1), LMA_EQ_VMA) - SECTION_gcc_except_table (ram, ALIGN (0x1), LMA_EQ_VMA) - SECTION_data (ram, ALIGN (0x1), LMA_EQ_VMA) - SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA) - SECTIONS_END -}
deleted file mode 100644 --- a/packages/hal/arm/cl7211/current/include/pkgconf/mlt_arm_cl7111_ram.mlt +++ /dev/null @@ -1,11 +0,0 @@ -version 0 -region ram 8000 1b8000 0 ! -section rom_vectors 0 1 0 1 1 1 1 1 8000 8000 text text ! -section text 0 1 0 1 0 1 0 1 fini fini ! -section fini 0 1 0 1 0 1 0 1 rodata rodata ! -section rodata 0 1 0 1 0 1 0 1 rodata1 rodata1 ! -section rodata1 0 1 0 1 0 1 0 1 fixup fixup ! -section fixup 0 1 0 1 0 1 0 1 gcc_except_table gcc_except_table ! -section gcc_except_table 0 1 0 1 0 1 0 1 data data ! -section data 0 1 0 1 0 1 0 1 bss bss ! -section bss 0 4 0 1 0 0 0 0 !
deleted file mode 100644 --- a/packages/hal/arm/cl7211/current/include/pkgconf/mlt_arm_cl7111_rom.ldi +++ /dev/null @@ -1,53 +0,0 @@ -//=========================================================================== -// -// MLT linker script export -// -//=========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//=========================================================================== - - -// eCos memory layout - Mon May 17 08:14:13 1999 - -// This is a generated file - do not edit - -MEMORY -{ - ram : ORIGIN = 0xc0000000, LENGTH = 0x200000 - rom : ORIGIN = 0xe0000000, LENGTH = 0x40000 -} - -SECTIONS -{ - SECTIONS_BEGIN - SECTION_rom_vectors (rom, 0xe0000000, LMA_EQ_VMA) - SECTION_text (rom, ALIGN (0x1), LMA_EQ_VMA) - SECTION_fini (rom, ALIGN (0x1), LMA_EQ_VMA) - SECTION_rodata (rom, ALIGN (0x1), LMA_EQ_VMA) - SECTION_rodata1 (rom, ALIGN (0x1), LMA_EQ_VMA) - SECTION_fixup (rom, ALIGN (0x1), LMA_EQ_VMA) - SECTION_gcc_except_table (rom, ALIGN (0x1), LMA_EQ_VMA) - SECTION_data (ram, 0xc0000000, FOLLOWING (.gcc_except_table)) - SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA) - SECTIONS_END -}
deleted file mode 100644 --- a/packages/hal/arm/cl7211/current/include/pkgconf/mlt_arm_cl7111_rom.mlt +++ /dev/null @@ -1,12 +0,0 @@ -version 0 -region ram c0000000 200000 0 ! -region rom e0000000 40000 1 ! -section data 0 1 1 1 1 1 0 0 c0000000 bss ! -section bss 0 4 0 1 0 0 0 0 ! -section rom_vectors 0 1 0 1 1 1 1 1 e0000000 e0000000 text text ! -section text 0 1 0 1 0 1 0 1 fini fini ! -section fini 0 1 0 1 0 1 0 1 rodata rodata ! -section rodata 0 1 0 1 0 1 0 1 rodata1 rodata1 ! -section rodata1 0 1 0 1 0 1 0 1 fixup fixup ! -section fixup 0 1 0 1 0 1 0 1 gcc_except_table gcc_except_table ! -section gcc_except_table 0 1 0 1 0 0 0 1 data !
deleted file mode 100644 --- a/packages/hal/arm/cl7211/current/include/pkgconf/mlt_arm_cl7111_stubs.ldi +++ /dev/null @@ -1,52 +0,0 @@ -//=========================================================================== -// -// MLT linker script export -// -//=========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//=========================================================================== - -// eCos memory layout - Mon May 17 08:06:28 1999 - -// This is a generated file - do not edit - -MEMORY -{ - ram : ORIGIN = 0x1000, LENGTH = 0x7000 - rom : ORIGIN = 0xf0028000, LENGTH = 0x40000 -} - -SECTIONS -{ - SECTIONS_BEGIN - SECTION_rom_vectors (rom, 0xf0028000, LMA_EQ_VMA) - SECTION_text (rom, ALIGN (0x1), LMA_EQ_VMA) - SECTION_fini (rom, ALIGN (0x1), LMA_EQ_VMA) - SECTION_rodata (rom, ALIGN (0x1), LMA_EQ_VMA) - SECTION_rodata1 (rom, ALIGN (0x1), LMA_EQ_VMA) - SECTION_fixup (rom, ALIGN (0x1), LMA_EQ_VMA) - SECTION_gcc_except_table (rom, ALIGN (0x1), LMA_EQ_VMA) - SECTION_data (ram, 0x1000, FOLLOWING (.gcc_except_table)) - SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA) - SECTIONS_END -}
deleted file mode 100644 --- a/packages/hal/arm/cl7211/current/include/pkgconf/mlt_arm_cl7111_stubs.mlt +++ /dev/null @@ -1,12 +0,0 @@ -version 0 -region ram 1000 7000 0 ! -region rom f0028000 40000 1 ! -section data 0 1 1 1 1 1 0 0 1000 bss ! -section bss 0 4 0 1 0 0 0 0 ! -section rom_vectors 0 1 0 1 1 1 1 1 f0028000 f0028000 text text ! -section text 0 1 0 1 0 1 0 1 fini fini ! -section fini 0 1 0 1 0 1 0 1 rodata rodata ! -section rodata 0 1 0 1 0 1 0 1 rodata1 rodata1 ! -section rodata1 0 1 0 1 0 1 0 1 fixup fixup ! -section fixup 0 1 0 1 0 1 0 1 gcc_except_table gcc_except_table ! -section gcc_except_table 0 1 0 1 0 0 0 1 data !
deleted file mode 100644 --- a/packages/hal/arm/cl7211/current/include/pkgconf/mlt_arm_eb7211_ram.h +++ /dev/null @@ -1,41 +0,0 @@ -//=========================================================================== -// -// MLT linker script export -// -//=========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//=========================================================================== - -// eCos memory layout - Wed Oct 27 13:28:21 1999 - -// This is a generated file - do not edit - -#include <cyg/infra/cyg_type.h> -#include <stddef.h> - -#define CYGMEM_REGION_ram (0) -#define CYGMEM_REGION_ram_SIZE (0x1000000) -#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) -extern char CYG_LABEL_NAME (_Reserved) []; -#define CYGMEM_SECTION_Reserved (CYG_LABEL_NAME (_Reserved)) -#define CYGMEM_SECTION_Reserved_SIZE (0x8000 - (size_t) CYG_LABEL_NAME (_Reserved))
deleted file mode 100644 --- a/packages/hal/arm/cl7211/current/include/pkgconf/mlt_arm_eb7211_ram.ldi +++ /dev/null @@ -1,52 +0,0 @@ -//=========================================================================== -// -// MLT linker script export -// -//=========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//=========================================================================== - -// eCos memory layout - Wed Oct 27 13:28:21 1999 - -// This is a generated file - do not edit - -MEMORY -{ - ram : ORIGIN = 0, LENGTH = 0x1000000 -} - -SECTIONS -{ - SECTIONS_BEGIN - __Reserved = 0; - SECTION_rom_vectors (ram, 0x8000, LMA_EQ_VMA) - SECTION_text (ram, ALIGN (0x1), LMA_EQ_VMA) - SECTION_fini (ram, ALIGN (0x1), LMA_EQ_VMA) - SECTION_rodata (ram, ALIGN (0x1), LMA_EQ_VMA) - SECTION_rodata1 (ram, ALIGN (0x1), LMA_EQ_VMA) - SECTION_fixup (ram, ALIGN (0x1), LMA_EQ_VMA) - SECTION_gcc_except_table (ram, ALIGN (0x1), LMA_EQ_VMA) - SECTION_data (ram, ALIGN (0x1), LMA_EQ_VMA) - SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA) - SECTIONS_END -}
deleted file mode 100644 --- a/packages/hal/arm/cl7211/current/include/pkgconf/mlt_arm_eb7211_ram.mlt +++ /dev/null @@ -1,40 +0,0 @@ -//=========================================================================== -// -// MLT linker script export -// -//=========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//=========================================================================== - -version 0 -region ram 0 1000000 0 !DRAM -section Reserved 0 1 0 0 1 0 1 0 0 0 ! -section rom_vectors 0 1 0 1 1 1 1 1 8000 8000 text text ! -section text 0 1 0 1 0 1 0 1 fini fini ! -section fini 0 1 0 1 0 1 0 1 rodata rodata ! -section rodata 0 1 0 1 0 1 0 1 rodata1 rodata1 ! -section rodata1 0 1 0 1 0 1 0 1 fixup fixup ! -section fixup 0 1 0 1 0 1 0 1 gcc_except_table gcc_except_table ! -section gcc_except_table 0 1 0 1 0 1 0 1 data data ! -section data 0 1 0 1 0 1 0 1 bss bss ! -section bss 0 4 0 1 0 0 0 0 !
deleted file mode 100644 --- a/packages/hal/arm/cl7211/current/include/pkgconf/mlt_arm_eb7211_rom.h +++ /dev/null @@ -1,44 +0,0 @@ -//=========================================================================== -// -// MLT linker script export -// -//=========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//=========================================================================== - -// eCos memory layout - Wed Oct 27 13:34:16 1999 - -// This is a generated file - do not edit - -#include <cyg/infra/cyg_type.h> -#include <stddef.h> - -#define CYGMEM_REGION_ram (0) -#define CYGMEM_REGION_ram_SIZE (0x1000000) -#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) -#define CYGMEM_REGION_rom (0xe0000000) -#define CYGMEM_REGION_rom_SIZE (0x800000) -#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R) -extern char CYG_LABEL_NAME (_Reserved) []; -#define CYGMEM_SECTION_Reserved (CYG_LABEL_NAME (_Reserved)) -#define CYGMEM_SECTION_Reserved_SIZE (0x1000 - (size_t) CYG_LABEL_NAME (_Reserved))
deleted file mode 100644 --- a/packages/hal/arm/cl7211/current/include/pkgconf/mlt_arm_eb7211_rom.ldi +++ /dev/null @@ -1,53 +0,0 @@ -//=========================================================================== -// -// MLT linker script export -// -//=========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//=========================================================================== - -// eCos memory layout - Wed Oct 27 13:34:16 1999 - -// This is a generated file - do not edit - -MEMORY -{ - ram : ORIGIN = 0, LENGTH = 0x1000000 - rom : ORIGIN = 0xe0000000, LENGTH = 0x800000 -} - -SECTIONS -{ - SECTIONS_BEGIN - SECTION_rom_vectors (rom, 0xe0000000, LMA_EQ_VMA) - SECTION_text (rom, ALIGN (0x1), LMA_EQ_VMA) - SECTION_fini (rom, ALIGN (0x1), LMA_EQ_VMA) - SECTION_rodata (rom, ALIGN (0x1), LMA_EQ_VMA) - SECTION_rodata1 (rom, ALIGN (0x1), LMA_EQ_VMA) - SECTION_fixup (rom, ALIGN (0x1), LMA_EQ_VMA) - SECTION_gcc_except_table (rom, ALIGN (0x1), LMA_EQ_VMA) - __Reserved = 0; - SECTION_data (ram, 0x1000, FOLLOWING (.gcc_except_table)) - SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA) - SECTIONS_END -}
deleted file mode 100644 --- a/packages/hal/arm/cl7211/current/include/pkgconf/mlt_arm_eb7211_rom.mlt +++ /dev/null @@ -1,41 +0,0 @@ -//=========================================================================== -// -// MLT linker script export -// -//=========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//=========================================================================== - -version 0 -region ram 0 1000000 0 ! -region rom e0000000 800000 1 !This is ROM bank 0, physical address 0x00000000.When running eCos, this space is remapped to 0xE0000000. -section Reserved 0 1 0 0 1 0 1 0 0 0 ! -section data 0 1 1 1 1 1 0 0 1000 bss ! -section bss 0 4 0 1 0 0 0 0 ! -section rom_vectors 0 1 0 1 1 1 1 1 e0000000 e0000000 text text ! -section text 0 1 0 1 0 1 0 1 fini fini ! -section fini 0 1 0 1 0 1 0 1 rodata rodata ! -section rodata 0 1 0 1 0 1 0 1 rodata1 rodata1 ! -section rodata1 0 1 0 1 0 1 0 1 fixup fixup ! -section fixup 0 1 0 1 0 1 0 1 gcc_except_table gcc_except_table ! -section gcc_except_table 0 1 0 1 0 0 0 1 data !
deleted file mode 100644 --- a/packages/hal/arm/cl7211/current/include/pkgconf/mlt_arm_eb7211_stubs.h +++ /dev/null @@ -1,44 +0,0 @@ -//=========================================================================== -// -// MLT linker script export -// -//=========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//=========================================================================== - -// eCos memory layout - Wed Oct 27 13:37:57 1999 - -// This is a generated file - do not edit - -#include <cyg/infra/cyg_type.h> -#include <stddef.h> - -#define CYGMEM_REGION_ram (0) -#define CYGMEM_REGION_ram_SIZE (0x1000000) -#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) -#define CYGMEM_REGION_rom (0xe0000000) -#define CYGMEM_REGION_rom_SIZE (0x800000) -#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R) -extern char CYG_LABEL_NAME (_Reserved) []; -#define CYGMEM_SECTION_Reserved (CYG_LABEL_NAME (_Reserved)) -#define CYGMEM_SECTION_Reserved_SIZE (0x1000 - (size_t) CYG_LABEL_NAME (_Reserved))
deleted file mode 100644 --- a/packages/hal/arm/cl7211/current/include/pkgconf/mlt_arm_eb7211_stubs.ldi +++ /dev/null @@ -1,53 +0,0 @@ -//=========================================================================== -// -// MLT linker script export -// -//=========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//=========================================================================== - -// eCos memory layout - Wed Oct 27 13:37:57 1999 - -// This is a generated file - do not edit - -MEMORY -{ - ram : ORIGIN = 0, LENGTH = 0x1000000 - rom : ORIGIN = 0xe0000000, LENGTH = 0x800000 -} - -SECTIONS -{ - SECTIONS_BEGIN - SECTION_rom_vectors (rom, 0xe0000000, LMA_EQ_VMA) - SECTION_text (rom, ALIGN (0x1), LMA_EQ_VMA) - SECTION_fini (rom, ALIGN (0x1), LMA_EQ_VMA) - SECTION_rodata (rom, ALIGN (0x1), LMA_EQ_VMA) - SECTION_rodata1 (rom, ALIGN (0x1), LMA_EQ_VMA) - SECTION_fixup (rom, ALIGN (0x1), LMA_EQ_VMA) - SECTION_gcc_except_table (rom, ALIGN (0x1), LMA_EQ_VMA) - __Reserved = 0; - SECTION_data (ram, 0x1000, FOLLOWING (.gcc_except_table)) - SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA) - SECTIONS_END -}
deleted file mode 100644 --- a/packages/hal/arm/cl7211/current/include/pkgconf/mlt_arm_eb7211_stubs.mlt +++ /dev/null @@ -1,41 +0,0 @@ -//=========================================================================== -// -// MLT linker script export -// -//=========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//=========================================================================== - -version 0 -region ram 0 1000000 0 ! -region rom e0000000 800000 1 !This is ROM bank 0, physical address 0x00000000.When running eCos, this space is remapped to 0xE0000000. -section Reserved 0 1 0 0 1 0 1 0 0 0 ! -section data 0 1 1 1 1 1 0 0 1000 bss ! -section bss 0 4 0 1 0 0 0 0 ! -section rom_vectors 0 1 0 1 1 1 1 1 e0000000 e0000000 text text ! -section text 0 1 0 1 0 1 0 1 fini fini ! -section fini 0 1 0 1 0 1 0 1 rodata rodata ! -section rodata 0 1 0 1 0 1 0 1 rodata1 rodata1 ! -section rodata1 0 1 0 1 0 1 0 1 fixup fixup ! -section fixup 0 1 0 1 0 1 0 1 gcc_except_table gcc_except_table ! -section gcc_except_table 0 1 0 1 0 0 0 1 data !
deleted file mode 100644 --- a/packages/hal/arm/cl7211/current/include/plf_stub.h +++ /dev/null @@ -1,82 +0,0 @@ -#ifndef CYGONCE_HAL_PLF_STUB_H -#define CYGONCE_HAL_PLF_STUB_H - -//============================================================================= -// -// plf_stub.h -// -// Platform header for GDB stub support. -// -//============================================================================= -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998, 1999 Cygnus Solutions. -// All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//============================================================================= -//#####DESCRIPTIONBEGIN#### -// -// Author(s): jskov -// Contributors:jskov, gthomas -// Date: 1999-04-21 -// Purpose: Platform HAL stub support for Cirrus CL7211 boards. -// Usage: #include <cyg/hal/plf_stub.h> -// -//####DESCRIPTIONEND#### -// -//============================================================================= - -#include <pkgconf/hal.h> -#include <pkgconf/hal_arm_cl7211.h> - -#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS - -#include <cyg/infra/cyg_type.h> // CYG_UNUSED_PARAM - -#include <cyg/hal/arm_stub.h> // architecture stub support - -//---------------------------------------------------------------------------- -// Define serial stuff. - -extern void hal_cl7211_init_serial(void); -extern int hal_cl7211_get_char(void); -extern void hal_cl7211_put_char(int c); -extern int hal_cl7211_interruptible(int); - -#define HAL_STUB_PLATFORM_INIT_SERIAL() hal_cl7211_init_serial() -#define HAL_STUB_PLATFORM_GET_CHAR() hal_cl7211_get_char() -#define HAL_STUB_PLATFORM_PUT_CHAR(c) hal_cl7211_put_char((c)) -#define HAL_STUB_PLATFORM_SET_BAUD_RATE(baud) CYG_UNUSED_PARAM(int, (baud)) -#define HAL_STUB_PLATFORM_INTERRUPTIBLE (&hal_cl7211_interruptible) -#define HAL_STUB_PLATFORM_INIT_BREAK_IRQ() CYG_EMPTY_STATEMENT - -//---------------------------------------------------------------------------- -// Stub initializer. -#define HAL_STUB_PLATFORM_STUBS_INIT() CYG_EMPTY_STATEMENT - -//---------------------------------------------------------------------------- -// Reset. -#define HAL_STUB_PLATFORM_RESET() CYG_EMPTY_STATEMENT - -#endif // ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS - -//----------------------------------------------------------------------------- -#endif // CYGONCE_HAL_PLF_STUB_H -// End of plf_stub.h
deleted file mode 100644 --- a/packages/hal/arm/cl7211/current/misc/PKGconf.mak +++ /dev/null @@ -1,55 +0,0 @@ -#=============================================================================== -# -# makefile -# -# hal/arm/cl7211/misc -# -#=============================================================================== -#####COPYRIGHTBEGIN#### -# -# ------------------------------------------- -# The contents of this file are subject to the Cygnus eCos Public License -# Version 1.0 (the "License"); you may not use this file except in -# compliance with the License. You may obtain a copy of the License at -# http://sourceware.cygnus.com/ecos -# -# Software distributed under the License is distributed on an "AS IS" -# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -# License for the specific language governing rights and limitations under -# the License. -# -# The Original Code is eCos - Embedded Cygnus Operating System, released -# September 30, 1998. -# -# The Initial Developer of the Original Code is Cygnus. Portions created -# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. -# ------------------------------------------- -# -#####COPYRIGHTEND#### -#=============================================================================== - -PACKAGE := hal_arm_cl7211 -include ../../../../../pkgconf/pkgconf.mak -include ../../../../../pkgconf/system.mak - -ifdef CYG_HAL_STARTUP_STUBS -PROGS := gdb_module -OTHER_PROGS := gdb_module.bin -endif -ifdef CYG_HAL_STARTUP_RAM -PROGS := prog_flash -PROGS += lcd_test panel_test kbd_test -endif -WHEREAMI := misc - -include $(COMPONENT_REPOSITORY)/pkgconf/makrules.prv - -ifdef CYG_HAL_STARTUP_STUBS -gdb_module.bin: gdb_module.stamp - $(OBJCOPY) -O binary gdb_module$(EXEEXT) gdb_module.bin -endif - - - - -
deleted file mode 100644 --- a/packages/hal/arm/cl7211/current/misc/STUBS_config +++ /dev/null @@ -1,45 +0,0 @@ -#! /bin/sh - -# usage: STUBS_config <repository> [eb7211 | cl7111] - -if [ "$2"x = "x" ]; then - CL7x11="eb7211" -else - CL7x11=$2 -fi - -if ( echo | tclsh ) 2>/dev/null ; then - TCL=tclsh -elif ( echo | cygtclsh80 ) 2>/dev/null ; then - TCL=cygtclsh80 -else - echo Could not find TCL interpreter - exit 1 -fi - -$TCL $1/pkgconf.tcl \ - --target=arm --platform=${CL7x11} --startup=stubs \ - --disable CYGPKG_KERNEL --disable CYGPKG_UITRON \ - --disable CYGPKG_LIBC --disable CYGPKG_LIBM \ - --disable CYGPKG_ERROR --disable CYGPKG_IO \ - --disable CYGPKG_IO_SERIAL --disable CYGPKG_DEVICES_WALLCLOCK \ - --disable CYGPKG_DEVICES_WATCHDOG --disable-cygmon - -patch <<END_OF_PATCH -p0 ---- pkgconf/hal.h~ Thu Jul 8 08:26:44 1999 -+++ pkgconf/hal.h Wed Jul 28 10:51:07 1999 -@@ -369,10 +369,10 @@ - - }}CFG_DATA */ - --#undef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS -+#define CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS - #undef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT --#define CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT --#define CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT -+#undef CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT -+#undef CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT - - /* - * NOTE: -END_OF_PATCH
deleted file mode 100644 --- a/packages/hal/arm/cl7211/current/misc/gdb_module.c +++ /dev/null @@ -1,64 +0,0 @@ -//========================================================================== -// -// gdb_module.c -// -// Cirrus CL7211 eval board GDB stubs (module wrapper) -// -//========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//========================================================================== -//#####DESCRIPTIONBEGIN#### -// -// Author(s): gthomas -// Contributors: gthomas -// Date: 1999-05-11 -// Description: Cirrus CL7211 FLASH module for eCos GDB stubs -//####DESCRIPTIONEND#### - -// -// This is the module 'wrapper' for the GDB stubs -// - -#include <pkgconf/hal.h> -#include <cyg/infra/cyg_type.h> -#include <cyg/hal/hal_stub.h> - -#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS - -void cyg_start (void) -{ - for(;;) breakpoint(); -} -#else - -#include <cyg/infra/testcase.h> - -void cyg_start (void) -{ - CYG_TEST_INIT(); - CYG_TEST_PASS_FINISH("N/A: Stand-alone GDB stubs only"); -} -#endif - - -
deleted file mode 100644 --- a/packages/hal/arm/cl7211/current/misc/kbd_support.c +++ /dev/null @@ -1,455 +0,0 @@ -//========================================================================== -// -// kbd_support.c -// -// Cirrus CL72xx eval board ASCII keyboard support functions -// -//========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//========================================================================== -//#####DESCRIPTIONBEGIN#### -// -// Author(s): gthomas -// Contributors: gthomas -// Date: 1999-05-15 -// Description: Functions used to support ASCII keyboard -//####DESCRIPTIONEND#### - -static char kbd_server_stack[STACK_SIZE]; -static cyg_thread kbd_server_thread_data; -static cyg_handle_t kbd_server_thread_handle; - -static cyg_interrupt kbd_interrupt; -static cyg_handle_t kbd_interrupt_handle; - -static cyg_mbox kbd_events_mbox; -static cyg_handle_t kbd_events_mbox_handle; -static cyg_sem_t kbd_sem; - -static cyg_uint8 col_state[8]; -static cyg_uint8 ext_state[8]; - -static void -kbd_delay(void) -{ - volatile int i; - for (i = 0; i < 250; i++) ; -} - -static void -kbd_scan(void) -{ - int i; - cyg_uint8 port_data, ext_data; - // Turn off drive (de-select) all columns - *(volatile cyg_uint32 *)SYSCON1 = (*(volatile cyg_uint32 *)SYSCON1 & ~SYSCON1_KBD_CTL) | - SYSCON1_KBD_LOW; - for (i = 0; i < 8; i++) { - // Select column 'i' - *(volatile cyg_uint32 *)SYSCON1 = (*(volatile cyg_uint32 *)SYSCON1 & ~SYSCON1_KBD_CTL) | - SYSCON1_KBD_COL(i); - // Small pause to let the wires charge up :-) - kbd_delay(); - // Grab the data - col_state[i] = port_data = *(volatile cyg_uint8 *)PADR; - ext_state[i] = ext_data = *(volatile cyg_uint8 *)KBD_PORT; - // De-Select column 'i' - *(volatile cyg_uint32 *)SYSCON1 = (*(volatile cyg_uint32 *)SYSCON1 & ~SYSCON1_KBD_CTL) | - SYSCON1_KBD_TRISTATE; - // Allow line to gl slack - kbd_delay(); - } - // Turn on drive (select) all columns - necessary to see interrupts - *(volatile cyg_uint32 *)SYSCON1 = (*(volatile cyg_uint32 *)SYSCON1 & ~SYSCON1_KBD_CTL) | - SYSCON1_KBD_HIGH; -} - -static cyg_uint8 kbd_state[128]; // Known state of each key -static cyg_uint8 kbd_new_state[128]; // Current state of each key - -// Row #1 -#define KBD_Escape 0x00 -#define KBD_F1 0x01 -#define KBD_F2 0x02 -#define KBD_F3 0x03 -#define KBD_F4 0x04 -#define KBD_F5 0x05 -#define KBD_F6 0x06 -#define KBD_F7 0x07 -#define KBD_F8 0x08 -#define KBD_F9 0x09 -#define KBD_F10 0x0A -#define KBD_NumLock 0x0B -#define KBD_SysReq 0x0C -#define KBD_ScrlLock 0x0D -#define KBD_Break 0x0E -// Row #2 -#define KBD_1 0x10 -#define KBD_2 0x11 -#define KBD_3 0x12 -#define KBD_4 0x13 -#define KBD_5 0x14 -#define KBD_6 0x15 -#define KBD_7 0x16 -#define KBD_8 0x17 -#define KBD_9 0x18 -#define KBD_0 0x19 -#define KBD_Hyphen 0x1A -#define KBD_Equals 0x1B -#define KBD_BackSpace 0x1C -#define KBD_Home 0x1D -// Row #3 -#define KBD_Tab 0x20 -#define KBD_Q 0x21 -#define KBD_W 0x22 -#define KBD_E 0x23 -#define KBD_R 0x24 -#define KBD_T 0x25 -#define KBD_Y 0x26 -#define KBD_U 0x27 -#define KBD_I 0x28 -#define KBD_O 0x29 -#define KBD_P 0x2A -#define KBD_LeftBrkt 0x2B -#define KBD_RightBrkt 0x2C -#define KBD_BackSlash 0x2D -#define KBD_PageUp 0x2E -// Row #4 -#define KBD_CapsLock 0x30 -#define KBD_A 0x31 -#define KBD_S 0x32 -#define KBD_D 0x33 -#define KBD_F 0x34 -#define KBD_G 0x35 -#define KBD_H 0x36 -#define KBD_J 0x37 -#define KBD_K 0x38 -#define KBD_L 0x39 -#define KBD_SemiColon 0x3A -#define KBD_Quote 0x3B -#define KBD_Enter 0x3C -#define KBD_PageDown 0x3D -// Row #5 -#define KBD_LeftShift 0x40 -#define KBD_Z 0x41 -#define KBD_X 0x42 -#define KBD_C 0x43 -#define KBD_V 0x44 -#define KBD_B 0x45 -#define KBD_N 0x46 -#define KBD_M 0x47 -#define KBD_Comma 0x48 -#define KBD_Period 0x49 -#define KBD_Slash 0x4A -#define KBD_RightShift 0x4B -#define KBD_UpArrow 0x4C -#define KBD_End 0x4D -// Row #6 -#define KBD_Ctrl 0x50 -#define KBD_Function 0x51 -#define KBD_LeftAlt 0x52 -#define KBD_Accent 0x53 -#define KBD_Space 0x54 -#define KBD_RightAlt 0x55 -#define KBD_Ins 0x56 -#define KBD_Del 0x57 -#define KBD_LeftArrow 0x58 -#define KBD_DownArrow 0x59 -#define KBD_RightArrow 0x5A - -#define KBD_Press 0x80 // Event has this bit when the key is pressed -#define KBD_Empty 0xFF - -// Map column, bit -> keycode -static cyg_uint32 kbd_map[8][16] = { - // Column #0 - {KBD_Escape, KBD_1, KBD_Tab, KBD_CapsLock, - KBD_BackSlash, KBD_Space, KBD_LeftArrow, KBD_UpArrow, - KBD_DownArrow, KBD_RightArrow, KBD_LeftShift, KBD_Ctrl, - KBD_Function, KBD_LeftAlt, KBD_RightAlt, KBD_RightShift }, - // Column #1 - {KBD_F5, KBD_6, KBD_T, KBD_G, - KBD_B, KBD_Slash, KBD_SemiColon, KBD_P, - KBD_Hyphen, KBD_F10, KBD_Empty, KBD_Empty, - KBD_Empty, KBD_Empty, KBD_Empty, KBD_Empty }, - // Column #2 - {KBD_F4, KBD_5, KBD_R, KBD_F, - KBD_V, KBD_Del, KBD_Quote, KBD_LeftBrkt, - KBD_Equals, KBD_NumLock, KBD_Empty, KBD_Empty, - KBD_Empty, KBD_Empty, KBD_Empty, KBD_Empty }, - // Column #3 - {KBD_F3, KBD_4, KBD_E, KBD_D, - KBD_C, KBD_Ins, KBD_Empty, KBD_RightBrkt, - KBD_BackSpace, KBD_SysReq, KBD_Empty, KBD_Empty, - KBD_Empty, KBD_Empty, KBD_Empty, KBD_Empty }, - // Column #4 - {KBD_F2, KBD_3, KBD_W, KBD_S, - KBD_X, KBD_Empty, KBD_Enter, KBD_Empty, - KBD_Empty, KBD_ScrlLock, KBD_Empty, KBD_Empty, - KBD_Empty, KBD_Empty, KBD_Empty, KBD_Empty }, - // Column #5 - {KBD_F1, KBD_2, KBD_Q, KBD_A, - KBD_Z, KBD_End, KBD_PageDown, KBD_PageUp, - KBD_Home, KBD_Break, KBD_Empty, KBD_Empty, - KBD_Empty, KBD_Empty, KBD_Empty, KBD_Empty }, - // Column #6 - {KBD_F6, KBD_7, KBD_Y, KBD_H, - KBD_N, KBD_Period, KBD_L, KBD_O, - KBD_0, KBD_F9, KBD_Empty, KBD_Empty, - KBD_Empty, KBD_Empty, KBD_Empty, KBD_Empty }, - // Column #7 - {KBD_F7, KBD_8, KBD_U, KBD_J, - KBD_M, KBD_Comma, KBD_K, KBD_I, - KBD_9, KBD_F8, KBD_Empty, KBD_Empty, - KBD_Empty, KBD_Empty, KBD_Empty, KBD_Empty }, -}; - -static cyg_uint8 kbd_chars[96] = { - /* 0x00 - 0x0F */ - 0x1B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - /* 0x10 - 0x1F */ - '1', '2', '3', '4', '5', '6', '7', '8', '9', '0', '-', '=', 0x08, 0x00, 0x00, 0x00, - /* 0x20 - 0x2F */ - '\t', 'q', 'w', 'e', 'r', 't', 'y', 'u', 'i', 'o', 'p', '[', ']', '\\', 0x00, 0x00, - /* 0x30 - 0x3F */ - 0x00, 'a', 's', 'd', 'f', 'g', 'h', 'j', 'k', 'l', ';', '\'', 0x0D, 0x00, 0x00, 0x00, - /* 0x40 - 0x4F */ - 0x00, 'z', 'x', 'c', 'v', 'b', 'n', 'm', ',', '.', '/', 0x00, 0x00, 0x00, 0x00, 0x00, - /* 0x50 - 0x5F */ - 0x00, 0x00, 0x00, 0x00, ' ', 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -}; - -static cyg_uint8 kbd_shifted_chars[96] = { - /* 0x00 - 0x0F */ - '\b', 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - /* 0x10 - 0x1F */ - '!', '@', '#', '$', '%', '^', '&', '*', '(', ')', '_', '+', 0x08, 0x00, 0x00, 0x00, - /* 0x20 - 0x2F */ - '\t', 'Q', 'W', 'E', 'R', 'T', 'Y', 'U', 'I', 'O', 'P', '{', '}', '|', 0x00, 0x00, - /* 0x30 - 0x3F */ - 0x00, 'A', 'S', 'D', 'F', 'G', 'H', 'J', 'K', 'L', ':', '"', 0x0D, 0x00, 0x00, 0x00, - /* 0x40 - 0x4F */ - 0x00, 'Z', 'X', 'C', 'V', 'B', 'N', 'M', '<', '>', '?', 0x00, 0x00, 0x00, 0x00, 0x00, - /* 0x50 - 0x5F */ - 0x00, 0x00, 0x00, 0x00, ' ', 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -}; - -// This ISR is called when the keyboard interrupt occurs -static int -keyboard_isr(cyg_vector_t vector, cyg_addrword_t data, HAL_SavedRegisters *regs) -{ - cyg_drv_interrupt_mask(CYGNUM_HAL_INTERRUPT_KBDINT); - return (CYG_ISR_HANDLED|CYG_ISR_CALL_DSR); // Run the DSR -} - -// This DSR handles the keyboard [logical] processing -static void -keyboard_dsr(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data) -{ - // Tell the keyboard processing thread to give it a shot - cyg_semaphore_post(&kbd_sem); -} - -static void -kbd_server(cyg_addrword_t p) -{ - int col, bit, key, event, timeout; - diag_printf("KBD server here\n"); - while (TRUE) { - cyg_semaphore_wait(&kbd_sem); - // As long as keys are pressed, scan and update - timeout = 0; - while (TRUE) { - // Wait for 20ms - time to debounce keyboard - cyg_thread_delay(2); - // Scan keyboard - kbd_scan(); - // Reset state - for (key = 0; key < sizeof(kbd_new_state); key++) { - kbd_new_state[key] = 0; - } - // Check state of all keys and send events for those that change - for (col = 0; col < 8; col++) { - for (bit = 0; bit < 8; bit++) { - if (col_state[col] & (1<<bit)) { - key = kbd_map[col][bit]; - if (key != KBD_Empty) { - kbd_new_state[key] = 1; - } - } - if (ext_state[col] & (1<<bit)) { - key = kbd_map[col][bit+8]; - if (key != KBD_Empty) { - kbd_new_state[key] = 1; - } - } - } - } - // Compare new and old (known) states, generate events for changes - // Send events for modifier keys first. - for (key = 0; key < sizeof(kbd_new_state); key++) { - if (kbd_state[key] != kbd_new_state[key]) { - event = 0xFF; - switch (key) { - case KBD_LeftShift: - case KBD_RightShift: - case KBD_Ctrl: - case KBD_LeftAlt: - case KBD_RightAlt: - case KBD_Function: - case KBD_CapsLock: - if (kbd_state[key]) { - // Key going up - event = key; - } else { - // Key going down - event = key + KBD_Press; - } - kbd_state[key] = kbd_new_state[key]; - } - if (event != 0xFF) { - if (!cyg_mbox_tryput(kbd_events_mbox_handle, (void *)event)) { - diag_printf("KBD event lost: %x\n", event); - } - } - } - } - // First key up events - for (key = 0; key < sizeof(kbd_new_state); key++) { - if (kbd_state[key] != kbd_new_state[key]) { - if (kbd_state[key]) { - // Key going up - event = key; - } else { - // Key going down - event = key + KBD_Press; - } - if (!cyg_mbox_tryput(kbd_events_mbox_handle, (void *)event)) { - diag_printf("KBD event lost: %x\n", event); - } - } - kbd_state[key] = kbd_new_state[key]; - } - // Clear interrupt (true when keys are pressed) - cyg_drv_interrupt_acknowledge(CYGNUM_HAL_INTERRUPT_KBDINT); -#if 0 - if (*(volatile cyg_uint32 *)INTSR2 & INTSR2_KBDINT) { - timeout = 0; - } else if (++timeout == 5) { - // No keys for 100ms - break; - } -#endif - } - // Allow interrupts to happen again - cyg_drv_interrupt_acknowledge(CYGNUM_HAL_INTERRUPT_KBDINT); - cyg_drv_interrupt_unmask(CYGNUM_HAL_INTERRUPT_KBDINT); - } -} - -void -kbd_init(void) -{ - // Initialize environment, setup interrupt handler - cyg_drv_interrupt_create(CYGNUM_HAL_INTERRUPT_KBDINT, - 99, // Priority - what goes here? - 0, // Data item passed to interrupt handler - (cyg_ISR_t *)keyboard_isr, - (cyg_DSR_t *)keyboard_dsr, - &kbd_interrupt_handle, - &kbd_interrupt); - cyg_drv_interrupt_attach(kbd_interrupt_handle); - cyg_drv_interrupt_acknowledge(CYGNUM_HAL_INTERRUPT_KBDINT); - cyg_drv_interrupt_unmask(CYGNUM_HAL_INTERRUPT_KBDINT); - // Set up the mbox for keyboard data - cyg_mbox_create(&kbd_events_mbox_handle, &kbd_events_mbox); - // This semaphore is set when there is a keypress - cyg_semaphore_init(&kbd_sem, 0); - // Create a thread whose job it is to de-bounce the keyboard and - // actually process the input, turning it into a series of events - cyg_thread_create(10, // Priority - just a number - kbd_server, // entry - 0, // initial parameter - "KBD_server", // Name - &kbd_server_stack[0], // Stack - STACK_SIZE, // Size - &kbd_server_thread_handle, // Handle - &kbd_server_thread_data // Thread data structure - ); - cyg_thread_resume(kbd_server_thread_handle); // Start it -} - -#define MOD_Shift 0x40 -#define MOD_Ctrl 0x20 -#define MOD_CapsLock 0x10 -static cyg_uint32 kbd_modifiers; - -cyg_uint8 -kbd_getc(void) -{ - cyg_uint8 ch; - cyg_uint32 kbd_event; - while (TRUE) { - kbd_event = (cyg_uint32)cyg_mbox_get(kbd_events_mbox_handle); - switch (kbd_event & 0x7F) { - case KBD_LeftShift: - case KBD_RightShift: - if (kbd_event & KBD_Press) { - kbd_modifiers |= MOD_Shift; - } else { - kbd_modifiers &= ~MOD_Shift; - } - break; - case KBD_Ctrl: - if (kbd_event & KBD_Press) { - kbd_modifiers |= MOD_Ctrl; - } else { - kbd_modifiers &= ~MOD_Ctrl; - } - break; - case KBD_CapsLock: - if (kbd_event & KBD_Press) { - kbd_modifiers ^= MOD_CapsLock; - } - break; - case KBD_LeftAlt: - case KBD_RightAlt: - case KBD_Function: - default: - } - // Return character [if one has arrived] - if (kbd_event & KBD_Press) { - if (kbd_modifiers & (MOD_Shift|MOD_CapsLock)) { - ch = kbd_shifted_chars[kbd_event & 0x7F]; - } else { - ch = kbd_chars[kbd_event & 0x7F]; - } - if (kbd_modifiers & MOD_Ctrl) { - ch &= 0x1F; - } - if (ch) { - return (ch); - } - } - } -}
deleted file mode 100644 --- a/packages/hal/arm/cl7211/current/misc/kbd_test.c +++ /dev/null @@ -1,106 +0,0 @@ -//========================================================================== -// -// kbd_test.c -// -// Cirrus CL72xx eval board ASCII keyboard test -// -//========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//========================================================================== -//#####DESCRIPTIONBEGIN#### -// -// Author(s): gthomas -// Contributors: gthomas -// Date: 1999-05-15 -// Description: Tool used to test ASCII keyboard -//####DESCRIPTIONEND#### - -#include <pkgconf/kernel.h> // Configuration header -#include <cyg/kernel/kapi.h> -#include <cyg/infra/diag.h> - -#include <cyg/hal/hal_cl7211.h> // Board definitions - -#include <cyg/hal/hal_io.h> // IO macros -#include <cyg/hal/hal_arch.h> // Register state info -#include <cyg/hal/hal_diag.h> -#include <cyg/hal/hal_intr.h> // HAL interrupt macros -#include <cyg/hal/drv_api.h> // HAL ISR support - -#ifndef FALSE -#define FALSE 0 -#define TRUE 1 -#endif - -#define STACK_SIZE 4096 -static char stack[STACK_SIZE]; -static cyg_thread thread_data; -static cyg_handle_t thread_handle; - -#include "lcd_support.c" -#include "kbd_support.c" - -// FUNCTIONS - -static void -cyg_test_exit(void) -{ - while (TRUE) ; -} - -static void -kbd_exercise(cyg_addrword_t p) -{ - cyg_uint8 ch; - diag_printf("KBD test here!\n"); - - // Initialize keyboard driver - kbd_init(); - - while (TRUE) { - ch = kbd_getc(); - diag_printf("CH = 0x%x:'%c'\n", ch, ch); - } - - diag_printf("All done!\n"); - cyg_test_exit(); -} - -externC void -cyg_start( void ) -{ - // Create a main thread, so we can run the scheduler and have time 'pass' - cyg_thread_create(11, // Priority - just a number - kbd_exercise, // entry - 0, // initial parameter - "KBD_thread", // Name - &stack[0], // Stack - STACK_SIZE, // Size - &thread_handle, // Handle - &thread_data // Thread data structure - ); - cyg_thread_resume(thread_handle); // Start it - // Let 'em fly... - cyg_scheduler_start(); -} // cyg_package_start() -
deleted file mode 100644 --- a/packages/hal/arm/cl7211/current/misc/lcd_panel_support.c +++ /dev/null @@ -1,213 +0,0 @@ -//========================================================================== -// -// panel_support.c -// -// Cirrus CL72xx eval board LCD touch panel support code -// -//========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//========================================================================== -//#####DESCRIPTIONBEGIN#### -// -// Author(s): gthomas -// Contributors: gthomas -// Date: 1999-09-13 -// Description: Tool used to support the LCD touch panel -//####DESCRIPTIONEND#### - -static char lcd_panel_server_stack[STACK_SIZE]; -static cyg_thread lcd_panel_server_thread_data; -static cyg_handle_t lcd_panel_server_thread_handle; - -static cyg_interrupt lcd_panel_interrupt; -static cyg_handle_t lcd_panel_interrupt_handle; - -static cyg_mbox lcd_panel_events_mbox; -static cyg_handle_t lcd_panel_events_mbox_handle; -static cyg_sem_t lcd_panel_sem; - -#define SYNCIO_TXFRMEN (1<<14) -#define SYNCIO_FRAMELEN(n) (n<<8) -#define ADC_START (1<<7) -#define ADC_CHAN(n) (n<<4) -#define ADC_UNIPOLAR (1<<3) -#define ADC_SINGLE (1<<2) -#define ADC_EXT_CLOCK (3<<0) -#define TOUCH_CTL KBD_PORT - -// FUNCTIONS - -static cyg_uint32 -adc_sample(int chan) -{ - cyg_uint32 val; - *(volatile cyg_uint32 *)SYNCIO = SYNCIO_TXFRMEN | SYNCIO_FRAMELEN(24) | - ADC_START | ADC_CHAN(chan) | ADC_UNIPOLAR | ADC_SINGLE | ADC_EXT_CLOCK; - while (*(volatile cyg_uint32 *)SYSFLG1 & SYSFLG1_SSIBUSY) ; - val = *(volatile cyg_uint32 *)SYNCIO; - return (val & 0xFFFF); -} - -static void -panel_delay(void) -{ - volatile int i; - for (i = 0; i < 800; i++) ; -} - -// This ISR is called when the touch panel interrupt occurs -static int -lcd_panel_isr(cyg_vector_t vector, cyg_addrword_t data, HAL_SavedRegisters *regs) -{ - cyg_drv_interrupt_mask(CYGNUM_HAL_INTERRUPT_EINT2); - return (CYG_ISR_HANDLED|CYG_ISR_CALL_DSR); // Run the DSR -} - -// This DSR starts up the touch panel [logical] processing -static void -lcd_panel_dsr(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data) -{ - // Tell the panel processing thread to give it a shot - cyg_semaphore_post(&lcd_panel_sem); -} - -// Assumption: if the keypress vanishes for 5*20 ms, it probably isn't there -#define LCD_PANEL_TIMEOUT 5 - -static __inline__ int -abs(int x) -{ - if (x < 0) return -x; - return x; -} - -static void -lcd_panel_server(cyg_addrword_t p) -{ - int iX, iY, newX, newY, diffX, diffY, timeout, samples; - cyg_uint32 event; - diag_printf("LCD panel server here\n"); - while (TRUE) { - cyg_semaphore_wait(&lcd_panel_sem); - samples = 0; iX = 0; iY = 0; - // Wait for press to go away (no drag support) - timeout = 0; - while (timeout < LCD_PANEL_TIMEOUT) { - *(volatile cyg_uint8 *)TOUCH_CTL = 0x00; // Disable drives - while (*(volatile cyg_uint32 *)INTSR1 & INTSR1_EINT2) ; - *(volatile cyg_uint8 *)TOUCH_CTL = 0x70; // Idle state (so interrupt works) - cyg_thread_delay(2); // Wait 20 ms - if (*(volatile cyg_uint32 *)INTSR1 & INTSR1_EINT2) { - // Still pressed - // Drive TSPY, ground TSMY, and disconnect TSPX and TSMX - *(volatile cyg_uint8 *)TOUCH_CTL = 0x50; - panel_delay(); - newY = adc_sample(2); - // Drive TSPX, ground TSMX, and disconnect TSPY and TSMY - *(volatile cyg_uint8 *)TOUCH_CTL = 0xA0; - panel_delay(); - newX = adc_sample(7); -#if 0 - diag_printf("timeout: %d, ISR: %x, newX: %d, newY: %d\n", - timeout, *(volatile cyg_uint32 *)INTSR1, newX, newY); -#endif - // See if this sample makes any sense - if (samples) { - diffX = abs(iX/samples - newX); - diffY = abs(iY/samples - newY); - if ((diffX <= ((iX/samples)/4)) && - (diffY <= ((iY/samples)/4))) { - samples++; - iX += newX; - iY += newY; - } else { -#if 0 - diag_printf("Discard - newX: %d, X: %d, newY: %d, Y: %d\n", - newX, iX/samples, newY, iY/samples); -#endif - break; - } - } else { - iX = newX; - iY = newY; - samples = 1; - } - timeout = 0; - } else { - timeout++; - } - } - if (samples) { - // Send event to user level - event = (iX/samples)<<16 | (iY/samples); - if (!cyg_mbox_tryput(lcd_panel_events_mbox_handle, (void *)event)) { - diag_printf("LCD event lost: %x\n", event); - } - } - *(volatile cyg_uint8 *)TOUCH_CTL = 0x00; // Disable drives - while (*(volatile cyg_uint32 *)INTSR1 & INTSR1_EINT2) ; - *(volatile cyg_uint8 *)TOUCH_CTL = 0x70; // Idle state (so interrupt works) - cyg_thread_delay(10); - cyg_drv_interrupt_unmask(CYGNUM_HAL_INTERRUPT_EINT2); - } -} - -static void -lcd_panel_init(void) -{ - // Enable touch panel - *(volatile cyg_uint8 *)PEDR |= 0x04; - - // Idle state (so interrupt works) - *(volatile cyg_uint8 *)TOUCH_CTL = 0x70; - - // Enable ADC machinery - *(volatile cyg_uint32 *)SYSCON1 |= SYSCON1_ADC_CLOCK_128kHZ; - - cyg_drv_interrupt_create(CYGNUM_HAL_INTERRUPT_EINT2, - 99, // Priority - what goes here? - 0, // Data item passed to interrupt handler - lcd_panel_isr, - lcd_panel_dsr, - &lcd_panel_interrupt_handle, - &lcd_panel_interrupt); - cyg_drv_interrupt_attach(lcd_panel_interrupt_handle); - cyg_drv_interrupt_acknowledge(CYGNUM_HAL_INTERRUPT_EINT2); - cyg_drv_interrupt_unmask(CYGNUM_HAL_INTERRUPT_EINT2); - // Set up the mbox for panel data - cyg_mbox_create(&lcd_panel_events_mbox_handle, &lcd_panel_events_mbox); - // This semaphore is set when there is a touch - cyg_semaphore_init(&lcd_panel_sem, 0); - // Create a thread whose job it is to de-bounce the keyboard and - // actually process the input, turning it into a series of events - cyg_thread_create(10, // Priority - just a number - lcd_panel_server, // entry - 0, // initial parameter - "LCD_PANEL_server", // Name - &lcd_panel_server_stack[0], // Stack - STACK_SIZE, // Size - &lcd_panel_server_thread_handle, // Handle - &lcd_panel_server_thread_data // Thread data structure - ); - cyg_thread_resume(lcd_panel_server_thread_handle); // Start it -}
deleted file mode 100644 --- a/packages/hal/arm/cl7211/current/misc/lcd_support.c +++ /dev/null @@ -1,499 +0,0 @@ -//========================================================================== -// -// lcd_support.c -// -// Cirrus CL72xx eval board LCD support code -// -//========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//========================================================================== -//#####DESCRIPTIONBEGIN#### -// -// Author(s): gthomas -// Contributors: gthomas -// Date: 1999-09-01 -// Description: Functions to drive LCD display -//####DESCRIPTIONEND#### - -// 8x8 Font - from Helios - -#define FIRST_CHAR 0x20 -#define LAST_CHAR 0x7E -#define FONT_HEIGHT 8 -#define FONT_WIDTH 8 -#define CURSOR_ON 0x5F -#define CURSOR_OFF 0x20 -static char font_table[LAST_CHAR-FIRST_CHAR+1][8] = -{ - { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, /* */ - { 0x18, 0x18, 0x18, 0x18, 0x18, 0x00, 0x18, 0x00 }, /* ! */ - { 0x36, 0x36, 0x36, 0x00, 0x00, 0x00, 0x00, 0x00 }, /* " */ - { 0x6C, 0x6C, 0xFE, 0x6C, 0xFE, 0x6C, 0x6C, 0x00 }, /* # */ - { 0x30, 0xFC, 0x16, 0x7C, 0xD0, 0x7E, 0x18, 0x00 }, /* $ */ - { 0x06, 0x66, 0x30, 0x18, 0x0C, 0x66, 0x60, 0x00 }, /* % */ - { 0x1C, 0x36, 0x36, 0x1C, 0xB6, 0x66, 0xDC, 0x00 }, /* & */ - { 0x18, 0x18, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00 }, /* ' */ - { 0x30, 0x18, 0x0C, 0x0C, 0x0C, 0x18, 0x30, 0x00 }, /* ( */ - { 0x0C, 0x18, 0x30, 0x30, 0x30, 0x18, 0x0C, 0x00 }, /* ) */ - { 0x00, 0x18, 0x7E, 0x3C, 0x7E, 0x18, 0x00, 0x00 }, /* * */ - { 0x00, 0x18, 0x18, 0x7E, 0x18, 0x18, 0x00, 0x00 }, /* + */ - { 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x0C }, /* , */ - { 0x00, 0x00, 0x00, 0x7E, 0x00, 0x00, 0x00, 0x00 }, /* - */ - { 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x00 }, /* . */ - { 0x00, 0x60, 0x30, 0x18, 0x0C, 0x06, 0x00, 0x00 }, /* / */ - { 0x3C, 0x66, 0x76, 0x7E, 0x6E, 0x66, 0x3C, 0x00 }, /* 0 */ - { 0x18, 0x1C, 0x18, 0x18, 0x18, 0x18, 0x7E, 0x00 }, /* 1 */ - { 0x3C, 0x66, 0x60, 0x30, 0x18, 0x0C, 0x7E, 0x00 }, /* 2 */ - { 0x3C, 0x66, 0x60, 0x38, 0x60, 0x66, 0x3C, 0x00 }, /* 3 */ - { 0x30, 0x38, 0x3C, 0x36, 0x7E, 0x30, 0x30, 0x00 }, /* 4 */ - { 0x7E, 0x06, 0x3E, 0x60, 0x60, 0x66, 0x3C, 0x00 }, /* 5 */ - { 0x38, 0x0C, 0x06, 0x3E, 0x66, 0x66, 0x3C, 0x00 }, /* 6 */ - { 0x7E, 0x60, 0x30, 0x18, 0x0C, 0x0C, 0x0C, 0x00 }, /* 7 */ - { 0x3C, 0x66, 0x66, 0x3C, 0x66, 0x66, 0x3C, 0x00 }, /* 8 */ - { 0x3C, 0x66, 0x66, 0x7C, 0x60, 0x30, 0x1C, 0x00 }, /* 9 */ - { 0x00, 0x00, 0x18, 0x18, 0x00, 0x18, 0x18, 0x00 }, /* : */ - { 0x00, 0x00, 0x18, 0x18, 0x00, 0x18, 0x18, 0x0C }, /* ; */ - { 0x30, 0x18, 0x0C, 0x06, 0x0C, 0x18, 0x30, 0x00 }, /* < */ - { 0x00, 0x00, 0x7E, 0x00, 0x7E, 0x00, 0x00, 0x00 }, /* = */ - { 0x0C, 0x18, 0x30, 0x60, 0x30, 0x18, 0x0C, 0x00 }, /* > */ - { 0x3C, 0x66, 0x30, 0x18, 0x18, 0x00, 0x18, 0x00 }, /* ? */ - { 0x3C, 0x66, 0x76, 0x56, 0x76, 0x06, 0x3C, 0x00 }, /* @ */ - { 0x3C, 0x66, 0x66, 0x7E, 0x66, 0x66, 0x66, 0x00 }, /* A */ - { 0x3E, 0x66, 0x66, 0x3E, 0x66, 0x66, 0x3E, 0x00 }, /* B */ - { 0x3C, 0x66, 0x06, 0x06, 0x06, 0x66, 0x3C, 0x00 }, /* C */ - { 0x1E, 0x36, 0x66, 0x66, 0x66, 0x36, 0x1E, 0x00 }, /* D */ - { 0x7E, 0x06, 0x06, 0x3E, 0x06, 0x06, 0x7E, 0x00 }, /* E */ - { 0x7E, 0x06, 0x06, 0x3E, 0x06, 0x06, 0x06, 0x00 }, /* F */ - { 0x3C, 0x66, 0x06, 0x76, 0x66, 0x66, 0x3C, 0x00 }, /* G */ - { 0x66, 0x66, 0x66, 0x7E, 0x66, 0x66, 0x66, 0x00 }, /* H */ - { 0x7E, 0x18, 0x18, 0x18, 0x18, 0x18, 0x7E, 0x00 }, /* I */ - { 0x7C, 0x30, 0x30, 0x30, 0x30, 0x36, 0x1C, 0x00 }, /* J */ - { 0x66, 0x36, 0x1E, 0x0E, 0x1E, 0x36, 0x66, 0x00 }, /* K */ - { 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x7E, 0x00 }, /* L */ - { 0xC6, 0xEE, 0xFE, 0xD6, 0xD6, 0xC6, 0xC6, 0x00 }, /* M */ - { 0x66, 0x66, 0x6E, 0x7E, 0x76, 0x66, 0x66, 0x00 }, /* N */ - { 0x3C, 0x66, 0x66, 0x66, 0x66, 0x66, 0x3C, 0x00 }, /* O */ - { 0x3E, 0x66, 0x66, 0x3E, 0x06, 0x06, 0x06, 0x00 }, /* P */ - { 0x3C, 0x66, 0x66, 0x66, 0x56, 0x36, 0x6C, 0x00 }, /* Q */ - { 0x3E, 0x66, 0x66, 0x3E, 0x36, 0x66, 0x66, 0x00 }, /* R */ - { 0x3C, 0x66, 0x06, 0x3C, 0x60, 0x66, 0x3C, 0x00 }, /* S */ - { 0x7E, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x00 }, /* T */ - { 0x66, 0x66, 0x66, 0x66, 0x66, 0x66, 0x3C, 0x00 }, /* U */ - { 0x66, 0x66, 0x66, 0x66, 0x66, 0x3C, 0x18, 0x00 }, /* V */ - { 0xC6, 0xC6, 0xD6, 0xD6, 0xFE, 0xEE, 0xC6, 0x00 }, /* W */ - { 0x66, 0x66, 0x3C, 0x18, 0x3C, 0x66, 0x66, 0x00 }, /* X */ - { 0x66, 0x66, 0x66, 0x3C, 0x18, 0x18, 0x18, 0x00 }, /* Y */ - { 0x7E, 0x60, 0x30, 0x18, 0x0C, 0x06, 0x7E, 0x00 }, /* Z */ - { 0x3E, 0x06, 0x06, 0x06, 0x06, 0x06, 0x3E, 0x00 }, /* [ */ - { 0x00, 0x06, 0x0C, 0x18, 0x30, 0x60, 0x00, 0x00 }, /* \ */ - { 0x7C, 0x60, 0x60, 0x60, 0x60, 0x60, 0x7C, 0x00 }, /* ] */ - { 0x3C, 0x66, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, /* ^ */ - { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF }, /* _ */ - { 0x0C, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, /* ` */ - { 0x00, 0x00, 0x3C, 0x60, 0x7C, 0x66, 0x7C, 0x00 }, /* a */ - { 0x06, 0x06, 0x3E, 0x66, 0x66, 0x66, 0x3E, 0x00 }, /* b */ - { 0x00, 0x00, 0x3C, 0x66, 0x06, 0x66, 0x3C, 0x00 }, /* c */ - { 0x60, 0x60, 0x7C, 0x66, 0x66, 0x66, 0x7C, 0x00 }, /* d */ - { 0x00, 0x00, 0x3C, 0x66, 0x7E, 0x06, 0x3C, 0x00 }, /* e */ - { 0x38, 0x0C, 0x0C, 0x3E, 0x0C, 0x0C, 0x0C, 0x00 }, /* f */ - { 0x00, 0x00, 0x7C, 0x66, 0x66, 0x7C, 0x60, 0x3C }, /* g */ - { 0x06, 0x06, 0x3E, 0x66, 0x66, 0x66, 0x66, 0x00 }, /* h */ - { 0x18, 0x00, 0x1C, 0x18, 0x18, 0x18, 0x3C, 0x00 }, /* i */ - { 0x18, 0x00, 0x1C, 0x18, 0x18, 0x18, 0x18, 0x0E }, /* j */ - { 0x06, 0x06, 0x66, 0x36, 0x1E, 0x36, 0x66, 0x00 }, /* k */ - { 0x1C, 0x18, 0x18, 0x18, 0x18, 0x18, 0x3C, 0x00 }, /* l */ - { 0x00, 0x00, 0x6C, 0xFE, 0xD6, 0xD6, 0xC6, 0x00 }, /* m */ - { 0x00, 0x00, 0x3E, 0x66, 0x66, 0x66, 0x66, 0x00 }, /* n */ - { 0x00, 0x00, 0x3C, 0x66, 0x66, 0x66, 0x3C, 0x00 }, /* o */ - { 0x00, 0x00, 0x3E, 0x66, 0x66, 0x3E, 0x06, 0x06 }, /* p */ - { 0x00, 0x00, 0x7C, 0x66, 0x66, 0x7C, 0x60, 0xE0 }, /* q */ - { 0x00, 0x00, 0x36, 0x6E, 0x06, 0x06, 0x06, 0x00 }, /* r */ - { 0x00, 0x00, 0x7C, 0x06, 0x3C, 0x60, 0x3E, 0x00 }, /* s */ - { 0x0C, 0x0C, 0x3E, 0x0C, 0x0C, 0x0C, 0x38, 0x00 }, /* t */ - { 0x00, 0x00, 0x66, 0x66, 0x66, 0x66, 0x7C, 0x00 }, /* u */ - { 0x00, 0x00, 0x66, 0x66, 0x66, 0x3C, 0x18, 0x00 }, /* v */ - { 0x00, 0x00, 0xC6, 0xD6, 0xD6, 0xFE, 0x6C, 0x00 }, /* w */ - { 0x00, 0x00, 0x66, 0x3C, 0x18, 0x3C, 0x66, 0x00 }, /* x */ - { 0x00, 0x00, 0x66, 0x66, 0x66, 0x7C, 0x60, 0x3C }, /* y */ - { 0x00, 0x00, 0x7E, 0x30, 0x18, 0x0C, 0x7E, 0x00 }, /* z */ - { 0x30, 0x18, 0x18, 0x0E, 0x18, 0x18, 0x30, 0x00 }, /* { */ - { 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x00 }, /* | */ - { 0x0C, 0x18, 0x18, 0x70, 0x18, 0x18, 0x0C, 0x00 }, /* } */ - { 0x8C, 0xD6, 0x62, 0x00, 0x00, 0x00, 0x00, 0x00 } /* ~ */ -}; - -#define ALPS_LH -#ifdef ALPS_LH -#define LCD_WIDTH 640 -#define LCD_HEIGHT 240 -#else -#define LCD_WIDTH 320 -#define LCD_HEIGHT 240 -#endif -// This can be 1 or 2 -#define SCREEN_SCALE 2 -#define NIBBLES_PER_PIXEL (1*SCREEN_SCALE) -#define PIXELS_PER_BYTE (2/NIBBLES_PER_PIXEL) -#define PIXEL_MASK ((1<<PIXELS_PER_BYTE)-1) - -// Physical screen info -static int lcd_depth; // Should be 1, 2, or 4 -static int lcd_width = LCD_WIDTH; -static int lcd_height = LCD_HEIGHT; -static cyg_uint8 *lcd_base = (cyg_uint8 *)0xC0000000; - -// Virtual screen info -static int curX = 0; // Last used position -static int curY = 0; -static int width = LCD_WIDTH / (FONT_WIDTH*NIBBLES_PER_PIXEL); -static int height = LCD_HEIGHT / (FONT_HEIGHT*SCREEN_SCALE); -static int fg = 0x0F; -static int bg = 0x00; - -// Functions -static void lcd_drawc(cyg_int8 c, int x, int y); - -void -lcd_on(int depth) -{ - cyg_int32 ctl_word = 0; - lcd_depth = depth; - switch (depth) { - case 1: - *(volatile cyg_int32 *)PALLSW = 0xF0F0F0F0; - *(volatile cyg_int32 *)PALMSW = 0xF0F0F0F0; - ctl_word = 0; - break; - case 2: - *(volatile cyg_int32 *)PALLSW = 0xFA50FA50; - *(volatile cyg_int32 *)PALMSW = 0xFA50FA50; - ctl_word = LCDCON_GSEN; - break; - case 4: - *(volatile cyg_int32 *)PALLSW = 0x76543210; - *(volatile cyg_int32 *)PALMSW = 0xFEDCBA98; - ctl_word = LCDCON_GSEN | LCDCON_GSMD; - break; - } - // Video buffer size - ctl_word |= ((lcd_width * lcd_height * lcd_depth) / 128 - 1) << LCDCON_BUFSIZ_S; - // Line length - ctl_word |= ((lcd_width / 16) - 1) << LCDCON_LINE_LENGTH_S; - // Pixel prescale - ctl_word |= ((526628 / (lcd_height * lcd_width)) - 1) << LCDCON_PIX_PRESCALE_S; - // AC frequency bias - ctl_word |= 0 << LCDCON_AC_PRESCALE_S; - *(volatile cyg_int32 *)LCDCON = ctl_word; - diag_printf("Depth: %d, ctl: %x\n", depth, ctl_word); - -#ifdef ALPS_LH -#define LCD_DCDC 0x02 -#define LCD_ENABLE 0x04 -#define LCD_BACKLIGHT 0x08 -#define LCD_INIT (LCD_DCDC|LCD_ENABLE|LCD_BACKLIGHT) - *(volatile cyg_uint8 *)PDDDR = 0x40; // 1's are inputs (backwards from A/B/E) - *(volatile cyg_uint8 *)PDDR = LCD_INIT; // Enable video + backlight + DC-DC converter -#else -#ifdef _CL7111 - *(volatile cyg_uint8 *)PDDR = 0x20; // Enable video - *(volatile cyg_uint8 *)PEDDR = 0x0F; // Register E data direction - *(volatile cyg_uint8 *)PEDR |= 0x01; // Enable PE2 - - *(volatile cyg_uint32 *)PMPCON = 0x500; // Enable DC-to-DC pump #1 -#endif -#endif - - *(volatile cyg_uint8 *)FRBADDR = 0x0C; // Highest order nibble of LCD frame address - - *(volatile cyg_uint32 *)SYSCON1 |= SYSCON1_LCDEN; -} - -// Clear screen -void -lcd_clear(void) -{ - cyg_int8 *ptr = lcd_base; - int i; - for (i = 0; i < (lcd_width*lcd_height*lcd_depth)/8; i++) { - *ptr++ = 0; - } - curX = 0; curY = 0; - lcd_drawc(CURSOR_ON, curX, curY); -} - -// Position cursor -void -lcd_moveto(int X, int Y) -{ - lcd_drawc(CURSOR_OFF, curX, curY); - if (X < 0) X = 0; - if (X >= width) X = width-1; - curX = X; - if (Y < 0) Y = 0; - if (Y >= height) Y = height-1; - curY = Y; - lcd_drawc(CURSOR_ON, curX, curY); -} - -// Render a character at position (X,Y) with current background/foreground -static void -lcd_drawc(cyg_int8 c, int x, int y) -{ - // Note: this only works for fonts which are a multiple of 8 bits wide! - cyg_uint8 *bufptr, bits; - int l, p, w; - switch (lcd_depth) { - case 1: - bufptr = lcd_base + ((y * FONT_HEIGHT * (lcd_width*lcd_depth)) + (x * FONT_WIDTH)) / 8; - for (l = 0; l < FONT_HEIGHT; l++) { - *bufptr = font_table[c][l]; - bufptr += (lcd_width*lcd_depth)/8; - } - break; - case 2: - diag_printf("Depth 2 not implemented\n"); - break; - case 4: - bufptr = lcd_base + ((y * (FONT_HEIGHT*SCREEN_SCALE) * (lcd_width*lcd_depth)) - + (x * (FONT_WIDTH*SCREEN_SCALE) * lcd_depth)) / 8; - for (l = 0; l < FONT_HEIGHT; l++) { - for (w = 0; w < SCREEN_SCALE; w++) { - bits = font_table[c-FIRST_CHAR][l]; - for (p = 0; p < 8; p += PIXELS_PER_BYTE) { - switch (bits & PIXEL_MASK) { - case 0: - *bufptr++ = (bg << 4) | bg; - break; - case 1: -#if SCREEN_SCALE == 1 - *bufptr++ = (bg << 4) | fg; -#else - *bufptr++ = (fg << 4) | fg; -#endif - break; -#if SCREEN_SCALE == 1 - case 2: - *bufptr++ = (fg << 4) | bg; - break; - case 3: - *bufptr++ = (fg << 4) | fg; - break; -#endif - } - bits >>= PIXELS_PER_BYTE; - } - bufptr += (lcd_width*lcd_depth)/8 - (8/PIXELS_PER_BYTE); - } - } - break; - } -} - -// Draw one character at the current position -void -lcd_putc(cyg_int8 c) -{ - lcd_drawc(CURSOR_OFF, curX, curY); - switch (c) { - case '\r': - curX = 0; - break; - case '\n': - curY++; - break; - case '\b': - curX--; - if (curX < 0) { - curY--; - if (curY < 0) curY = 0; - curX = width-1; - } - break; - default: - lcd_drawc(c, curX, curY); - curX++; - if (curX == width) { - curY++; - curX = 0; - } - } - lcd_drawc(CURSOR_ON, curX, curY); -} - -// Basic LCD 'printf()' support - -#ifndef FALSE -#define FALSE 0 -#define TRUE 1 -#endif - -#include <stdarg.h> - -#define is_digit(c) ((c >= '0') && (c <= '9')) - -static int -_cvt(unsigned long val, char *buf, long radix, char *digits) -{ - char temp[80]; - char *cp = temp; - int length = 0; - if (val == 0) { - /* Special case */ - *cp++ = '0'; - } else { - while (val) { - *cp++ = digits[val % radix]; - val /= radix; - } - } - while (cp != temp) { - *buf++ = *--cp; - length++; - } - *buf = '\0'; - return (length); -} - -int -lcd_vprintf(void (*putc)(cyg_int8), const char *fmt0, va_list ap) -{ - char c, sign, *cp; - int left_prec, right_prec, zero_fill, length, pad, pad_on_right; - char buf[32]; - long val; - while ((c = *fmt0++)) { - cp = buf; - length = 0; - if (c == '%') { - c = *fmt0++; - left_prec = right_prec = pad_on_right = 0; - if (c == '-') { - c = *fmt0++; - pad_on_right++; - } - if (c == '0') { - zero_fill = TRUE; - c = *fmt0++; - } else { - zero_fill = FALSE; - } - while (is_digit(c)) { - left_prec = (left_prec * 10) + (c - '0'); - c = *fmt0++; - } - if (c == '.') { - c = *fmt0++; - zero_fill++; - while (is_digit(c)) { - right_prec = (right_prec * 10) + (c - '0'); - c = *fmt0++; - } - } else { - right_prec = left_prec; - } - sign = '\0'; - switch (c) { - case 'd': - case 'x': - case 'X': - val = va_arg(ap, long); - switch (c) { - case 'd': - if (val < 0) { - sign = '-'; - val = -val; - } - length = _cvt(val, buf, 10, "0123456789"); - break; - case 'x': - length = _cvt(val, buf, 16, "0123456789abcdef"); - break; - case 'X': - length = _cvt(val, buf, 16, "0123456789ABCDEF"); - break; - } - break; - case 's': - cp = va_arg(ap, char *); - length = strlen(cp); - break; - case 'c': - c = va_arg(ap, long /*char*/); - (*putc)(c); - continue; - default: - (*putc)('?'); - } - pad = left_prec - length; - if (sign != '\0') { - pad--; - } - if (zero_fill) { - c = '0'; - if (sign != '\0') { - (*putc)(sign); - sign = '\0'; - } - } else { - c = ' '; - } - if (!pad_on_right) { - while (pad-- > 0) { - (*putc)(c); - } - } - if (sign != '\0') { - (*putc)(sign); - } - while (length-- > 0) { - (*putc)(c = *cp++); - if (c == '\n') { - (*putc)('\r'); - } - } - if (pad_on_right) { - while (pad-- > 0) { - (*putc)(' '); - } - } - } else { - (*putc)(c); - if (c == '\n') { - (*putc)('\r'); - } - } - } -} - -int -lcd_printf(char const *fmt, ...) -{ - int ret; - va_list ap; - - va_start(ap, fmt); - ret = lcd_vprintf(lcd_putc, fmt, ap); - va_end(ap); - return (ret); -} -
deleted file mode 100644 --- a/packages/hal/arm/cl7211/current/misc/lcd_test.c +++ /dev/null @@ -1,116 +0,0 @@ -//========================================================================== -// -// lcd_test.c -// -// Cirrus CL7211 eval board LCD test code -// -//========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//========================================================================== -//#####DESCRIPTIONBEGIN#### -// -// Author(s): gthomas -// Contributors: gthomas -// Date: 1999-09-01 -// Description: Tool used to test LCD controller -//####DESCRIPTIONEND#### - -#include <pkgconf/kernel.h> // Configuration header -#include <cyg/kernel/kapi.h> -#include <cyg/infra/diag.h> - -#include <cyg/hal/hal_cl7211.h> // Board definitions - -#ifndef FALSE -#define FALSE 0 -#define TRUE 1 -#endif - -#define STACK_SIZE 4096 -static char stack[STACK_SIZE]; -static cyg_thread thread_data; -static cyg_handle_t thread_handle; - -#include "lcd_support.c" - -// FUNCTIONS - -static void -cyg_test_exit(void) -{ - while (TRUE) ; -} - -static void -lcd_test(int depth) -{ - int i, j; - diag_printf("Set depth %d\n", depth); - lcd_on(depth); - lcd_clear(); - for (j = 0; j < 5; j++) { - for (i = 0; i < width; i++) { - lcd_putc('A'); - } - } - lcd_putc('\n'); - lcd_putc('\n'); - cyg_thread_delay(5*100); - for (j = 0; j < 5; j++) { - for (i = FIRST_CHAR; i <= LAST_CHAR; i++) { - lcd_putc(i); - } - } - cyg_thread_delay(5*100); -} - -static void -lcd_exercise(cyg_addrword_t p) -{ - diag_printf("LCD test here!\n"); - -// lcd_test(1); -// lcd_test(2); - lcd_test(4); - - diag_printf("All done!\n"); - cyg_test_exit(); -} - -externC void -cyg_start( void ) -{ - // Create a main thread, so we can run the scheduler and have time 'pass' - cyg_thread_create(10, // Priority - just a number - lcd_exercise, // entry - 0, // entry parameter - "LCD_test_thread", // Name - &stack[0], // Stack - STACK_SIZE, // Size - &thread_handle, // Handle - &thread_data // Thread data structure - ); - cyg_thread_resume(thread_handle); // Start it - cyg_scheduler_start(); -} // cyg_package_start() -
deleted file mode 100644 --- a/packages/hal/arm/cl7211/current/misc/panel_test.c +++ /dev/null @@ -1,107 +0,0 @@ -//========================================================================== -// -// panel_test.c -// -// Cirrus CL72xx eval board LCD touch panel test code -// -//========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//========================================================================== -//#####DESCRIPTIONBEGIN#### -// -// Author(s): gthomas -// Contributors: gthomas -// Date: 1999-09-06 -// Description: Tool used to test LCD touch panel -//####DESCRIPTIONEND#### - -#include <pkgconf/kernel.h> // Configuration header -#include <cyg/kernel/kapi.h> -#include <cyg/infra/diag.h> - -#include <cyg/hal/hal_cl7211.h> // Board definitions - -#include <cyg/hal/hal_io.h> // IO macros -#include <cyg/hal/hal_arch.h> // Register state info -#include <cyg/hal/hal_diag.h> -#include <cyg/hal/hal_intr.h> // HAL interrupt macros -#include <cyg/hal/drv_api.h> // HAL ISR support - -#ifndef FALSE -#define FALSE 0 -#define TRUE 1 -#endif - -#define STACK_SIZE 4096 -static char stack[STACK_SIZE]; -static cyg_thread thread_data; -static cyg_handle_t thread_handle; - -#include "lcd_support.c" -#include "lcd_panel_support.c" - -// FUNCTIONS - -static void -cyg_test_exit(void) -{ - while (TRUE) ; -} - -static void -panel_exercise(cyg_addrword_t p) -{ - int i; - cyg_uint32 val; - - diag_printf("LCD touch panel test here!\n"); - - lcd_panel_init(); - - for (i = 0; i < 50; i++) { - diag_printf("Please touch screen now:\n"); - val = (cyg_uint32)cyg_mbox_get(lcd_panel_events_mbox_handle); - diag_printf("val = %x, X = %d, Y = %d\n", val, (val>>16), val & 0xFFFF); - } - - diag_printf("All done!\n"); - cyg_test_exit(); -} - -externC void -cyg_start( void ) -{ - // Create a main thread, so we can run the scheduler and have time 'pass' - cyg_thread_create(10, // Priority - just a number - panel_exercise, // entry - 0, // initial parameter - "LCD_panel_thread", // Name - &stack[0], // Stack - STACK_SIZE, // Size - &thread_handle, // Handle - &thread_data // Thread data structure - ); - cyg_thread_resume(thread_handle); // Start it - cyg_scheduler_start(); -} // cyg_package_start() -
deleted file mode 100644 --- a/packages/hal/arm/cl7211/current/misc/prog_flash.c +++ /dev/null @@ -1,312 +0,0 @@ -//========================================================================== -// -// prog_flash.c -// -// Cirrus CL7211 eval board FLASH program tool -// -//========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//========================================================================== -//#####DESCRIPTIONBEGIN#### -// -// Author(s): gthomas -// Contributors: gthomas -// Date: 1999-05-12 -// Description: Tool used to program onboard FLASH image -//####DESCRIPTIONEND#### - -// -// This program will program the FLASH on the CL7211 board from a fixed buffer -// - -#include <pkgconf/kernel.h> // Configuration header -#include <cyg/kernel/kapi.h> -#include <cyg/infra/diag.h> -#include <cyg/hal/hal_cache.h> - -#ifndef FALSE -#define FALSE 0 -#define TRUE 1 -#endif - -#define STACK_SIZE 4096 -static char stack[STACK_SIZE]; -static cyg_thread thread_data; -static cyg_handle_t thread_handle; - -void identify_FLASH(void); -int write_flash(long *data, volatile long *mem); -int erase_sector(volatile long *mem); - -// Note: these are mapped addresses -// 0xE0000000 = ROM Bank 0 -// 0xF0000000 = ROM Bank 1 -volatile unsigned long *FLASH = (volatile unsigned long *)0xE0000000; - -long *flash_buffer = (long *)0x60000; -long *flash_buffer_end = (long *)0x64000; -long *ROM_address = (long *)0xE07E0000; - -// Adapted from Cirrus sample code -#define ATMEL_SEQ_ADD1 0x00015554>>2 -#define ATMEL_SEQ_ADD2 0x0000AAA8>>2 -#define ATMEL_START_CMD1 0xAAAAAAAA -#define ATMEL_START_CMD2 0x55555555 -#define ATMEL_ID_CMD 0x90909090 -#define ATMEL_PROG_CMD 0xA0A0A0A0 -#define ATMEL_ERASE_CMD 0x80808080 -#define ATMEL_SECTOR_ERASE_CMD 0x30303030 -#define ATMEL_STOP_CMD 0xF0F0F0F0 -#define ATMEL_BUSY_TOGGLE 0x00400040 -#define ATMEL_ERASE_TOGGLE 0x00440044 - -#define ATMEL_MANUF 0x1F -#define ATMEL_AT29C040_ID 0X5B -#define ATMEL_AT29C040A_ID 0XA4 -#define ATMEL_AT29C1024_ID 0X25 -#define ATMEL_SECTOR_SIZE 256 -#define ATMEL_MAX_SECTORS 2048 - -#define INTEL_MANUF 0x0089 -#define INTEL_STOP_CMD 0x00FF00FF -#define INTEL_PROG_CMD 0x00400040 -#define INTEL_ERASE_CMD 0x00200020 -#define INTEL_ERASE_CONFIRM 0x00D000D0 -#define INTEL_READ_STATUS 0x00700070 -#define INTEL_CLEAR_STATUS 0x00500050 -#define INTEL_SB_WSMS 0x00800080 // Write state machine = ready -#define INTEL_SB_ERASE_ERROR 0x00200020 // Erase failure -#define INTEL_SB_PROG_ERROR 0x00100010 // Programming failure - -#define ERASE_TIMEOUT 10 // seconds - -int manuf_code, device_code, sector_size, max_no_of_sectors, word_mode; - -// FUNCTIONS - -static void -cyg_test_exit(void) -{ - while (TRUE) ; -} - -static void -program_flash(void) -{ - diag_printf("PROGRAM FLASH here!\n"); - HAL_UCACHE_SYNC(); // ROM space is marked cacheable which causes problems! - HAL_UCACHE_DISABLE(); // So, just disable caches. - identify_FLASH(); - diag_printf("About to program FLASH using data at %x..%x\n", flash_buffer, flash_buffer_end); - diag_printf("*** Press RESET now to abort!\n"); - cyg_thread_delay(5*100); - diag_printf("\n"); - diag_printf("... Erase sector\n"); - if (erase_sector(ROM_address)) { - diag_printf("... Programming FLASH\n"); - while (flash_buffer < flash_buffer_end) { - if (!write_flash(flash_buffer++, ROM_address++)) break; - } - } - - // Exit Program Mode - switch (manuf_code) { - case ATMEL_MANUF: - FLASH[ATMEL_SEQ_ADD1] = ATMEL_START_CMD1; - FLASH[ATMEL_SEQ_ADD2] = ATMEL_START_CMD2; - FLASH[ATMEL_SEQ_ADD1] = ATMEL_STOP_CMD; - break; - case INTEL_MANUF: - FLASH[0] = INTEL_STOP_CMD; - break; - } - diag_printf("All done!\n"); - cyg_test_exit(); -} - -void -identify_FLASH(void ) -{ - // Enter Software Product Identification Mode - FLASH[ATMEL_SEQ_ADD1] = ATMEL_START_CMD1; - FLASH[ATMEL_SEQ_ADD2] = ATMEL_START_CMD2; - FLASH[ATMEL_SEQ_ADD1] = ATMEL_ID_CMD; - - // Wait at least 10ms - cyg_thread_delay(2); - - // Read Manufacturer and device code from the device - manuf_code = FLASH[0] >> 16; - device_code = FLASH[1] >> 16; - - diag_printf("manufacturer: 0x%04x, device: 0x%04x\n", manuf_code, device_code); - - // Exit Software Product Identification Mode - switch (manuf_code) { - case ATMEL_MANUF: - FLASH[ATMEL_SEQ_ADD1] = ATMEL_START_CMD1; - FLASH[ATMEL_SEQ_ADD2] = ATMEL_START_CMD2; - FLASH[ATMEL_SEQ_ADD1] = ATMEL_STOP_CMD; - break; - case INTEL_MANUF: - FLASH[0] = INTEL_STOP_CMD; - break; - default: - diag_printf("Unrecognized FLASH manufacturer - I give up!\n"); - cyg_test_exit(); - } -} - -void -spin(void) -{ - volatile int i; - for (i = 0; i < 100; i++) ; -} - -int -write_flash(long *data, volatile long *mem) -{ - long data1, data2; - long status; - int timer; - switch (manuf_code) { - case ATMEL_MANUF: - // Enter Program Mode - FLASH[ATMEL_SEQ_ADD1] = ATMEL_START_CMD1; - FLASH[ATMEL_SEQ_ADD2] = ATMEL_START_CMD2; - FLASH[ATMEL_SEQ_ADD1] = ATMEL_PROG_CMD; - // Send data to selected address - *mem = *data; - while (TRUE) { - data1 = *mem; // Read cell back twice - data2 = *mem; - // Bit 6 toggles between reads while programming in progress - if ((data1 & ATMEL_BUSY_TOGGLE) == (data2 & ATMEL_BUSY_TOGGLE)) break; - } - break; - case INTEL_MANUF: - // Clear current errors - FLASH[0] = INTEL_CLEAR_STATUS; - // Issue program command - FLASH[0] = INTEL_PROG_CMD; - // Send data to selected address - *mem = *data; - timer = 10000; - // Read the status register to wait for programming complete - do { - spin(); - status = FLASH[0]; - } while (((status & INTEL_SB_WSMS) != INTEL_SB_WSMS) && - (--timer > 0)); - // Check for errors - if (timer == 0) { - diag_printf("Programming at 0x%08x timed out - status: 0x%08x\n", mem, status); - } - if ((status & INTEL_SB_PROG_ERROR) != 0) { - diag_printf("Device reports programming error at 0x%08x - status: 0x%08x\n", mem, status); - } - // Exit program mode - FLASH[0] = INTEL_STOP_CMD; - break; - } - if (*mem != *data) { - diag_printf("Programming failed at 0x%08x - write: 0x%08x, read: 0x%08x\n", - mem, *data, *mem); - return (FALSE); - } - return (TRUE); -} - -int -erase_sector(volatile long *mem) -{ - long data1, data2; - long status; - int timer; - switch (manuf_code) { - case ATMEL_MANUF: - // Erase sector command - FLASH[ATMEL_SEQ_ADD1] = ATMEL_START_CMD1; - FLASH[ATMEL_SEQ_ADD2] = ATMEL_START_CMD2; - FLASH[ATMEL_SEQ_ADD1] = ATMEL_ERASE_CMD; - FLASH[ATMEL_SEQ_ADD1] = ATMEL_START_CMD1; - FLASH[ATMEL_SEQ_ADD2] = ATMEL_START_CMD2; - *mem = ATMEL_SECTOR_ERASE_CMD; - while (TRUE) { - data1 = *mem; // Read cell back twice - data2 = *mem; - // Bits 6+2 toggle between reads while programming in progress - if ((data1 & ATMEL_ERASE_TOGGLE) == (data2 & ATMEL_ERASE_TOGGLE)) break; - } - break; - case INTEL_MANUF: - // Clear current errors - FLASH[0] = INTEL_CLEAR_STATUS; - // Issue erase block command - FLASH[0] = INTEL_ERASE_CMD; - *mem = INTEL_ERASE_CONFIRM; - timer = ERASE_TIMEOUT*50; - // Read the status register while erase in progress - do { - cyg_thread_delay(2); - status = FLASH[0]; - } while (((status & INTEL_SB_WSMS) != INTEL_SB_WSMS) && - (--timer > 0)); - // Check for errors - if (timer == 0) { - diag_printf("Erase not complete after %d seconds - status: 0x%08x\n", - ERASE_TIMEOUT, status); - } - if ((status & INTEL_SB_ERASE_ERROR) != 0) { - diag_printf("Device reports erase error - status: 0x%08x\n", status); - } - // Exit erase mode - FLASH[0] = INTEL_STOP_CMD; - break; - } - if (*mem != 0xFFFFFFFF) { - diag_printf("Erase failed at 0x%08x - read: 0x%08x\n", - mem, *mem); - return (FALSE); - } - return (TRUE); -} - -externC void -cyg_start( void ) -{ - // Create a main thread, so we can run the scheduler and have time 'pass' - cyg_thread_create(10, // Priority - just a number - program_flash, // entry - 1, // index - "program_thread", // Name - &stack[0], // Stack - STACK_SIZE, // Size - &thread_handle, // Handle - &thread_data // Thread data structure - ); - cyg_thread_resume(thread_handle); // Start it - cyg_scheduler_start(); -} // cyg_package_start() -
deleted file mode 100644 --- a/packages/hal/arm/cl7211/current/src/PKGconf.mak +++ /dev/null @@ -1,42 +0,0 @@ -#============================================================================== -# -# makefile -# -# hal/arm/cl7211/src -# -#============================================================================== -#####COPYRIGHTBEGIN#### -# -# ------------------------------------------- -# The contents of this file are subject to the Cygnus eCos Public License -# Version 1.0 (the "License"); you may not use this file except in -# compliance with the License. You may obtain a copy of the License at -# http://sourceware.cygnus.com/ecos -# -# Software distributed under the License is distributed on an "AS IS" -# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -# License for the specific language governing rights and limitations under -# the License. -# -# The Original Code is eCos - Embedded Cygnus Operating System, released -# September 30, 1998. -# -# The Initial Developer of the Original Code is Cygnus. Portions created -# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. -# ------------------------------------------- -# -#####COPYRIGHTEND#### -#============================================================================== - -PACKAGE := hal_arm_cl7211 -include ../../../../../pkgconf/system.mak -include ../../../../../pkgconf/pkgconf.mak - -LIBRARY := libtarget.a -COMPILE := hal_diag.c plf_stub.c cl7211_misc.c -OTHER_OBJS := -OTHER_TARGETS := -OTHER_CLEAN := -OTHER_DEPS := - -include $(COMPONENT_REPOSITORY)/pkgconf/makrules.src
deleted file mode 100644 --- a/packages/hal/arm/cl7211/current/src/cl7211_misc.c +++ /dev/null @@ -1,371 +0,0 @@ -//========================================================================== -// -// cl7211_misc.c -// -// HAL misc board support code for ARM CL7211-1 -// -//========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//========================================================================== -//#####DESCRIPTIONBEGIN#### -// -// Author(s): gthomas -// Contributors: gthomas -// Date: 1999-02-20 -// Purpose: HAL board support -// Description: Implementations of HAL board interfaces -// -//####DESCRIPTIONEND#### -// -//========================================================================*/ - -#include <pkgconf/hal.h> -#include <pkgconf/system.h> -#include CYGBLD_HAL_PLATFORM_H - -#include <cyg/infra/cyg_type.h> // base types -#include <cyg/infra/cyg_trac.h> // tracing macros -#include <cyg/infra/cyg_ass.h> // assertion macros - -#include <cyg/hal/hal_io.h> // IO macros -#include <cyg/hal/hal_arch.h> // Register state info -#include <cyg/hal/hal_diag.h> -#include <cyg/hal/hal_intr.h> // Interrupt names -#include <cyg/hal/hal_cache.h> -#include <cyg/hal/hal_cl7211.h> // Hardware definitions - -// #define CYGHWR_HAL_ARM_CL7211_BATLOW -#ifdef CYGHWR_HAL_ARM_CL7211_BATLOW -#include <cyg/hal/hal_intr.h> // HAL interrupt macros -#include <cyg/hal/drv_api.h> // HAL ISR support -static cyg_interrupt batlow_interrupt; -static cyg_handle_t batlow_interrupt_handle; -#endif - -#if (CYGHWR_HAL_ARM_CL7211_PROCESSOR_CLOCK == 18432) -#define CPU_CLOCK 0 -#elif (CYGHWR_HAL_ARM_CL7211_PROCESSOR_CLOCK == 36864) -#define CPU_CLOCK 1 -#elif (CYGHWR_HAL_ARM_CL7211_PROCESSOR_CLOCK == 49152) -#define CPU_CLOCK 2 -#elif (CYGHWR_HAL_ARM_CL7211_PROCESSOR_CLOCK == 73728) -#define CPU_CLOCK 3 -#else -#err Invalid CPU clock frequency -#endif - -static cyg_uint32 _period; - -// Use Timer/Counter #2 for system clock - -void hal_clock_initialize(cyg_uint32 period) -{ - volatile cyg_uint32 *syscon1 = (volatile cyg_uint32 *)SYSCON1; - volatile cyg_uint32 *tc2d = (volatile cyg_uint32 *)TC2D; - // Set timer to 512KHz, prescale mode - *syscon1 = (*syscon1 & ~(SYSCON1_TC2M|SYSCON1_TC2S)) | SYSCON1_TC2S | SYSCON1_TC2M; - // Initialize counter - *tc2d = period; - _period = period; -} - -// This routine is called during a clock interrupt. - -#ifdef CYGHWR_HAL_ARM_CL7211_SOFTWARE_DRAM_REFRESH -#define DRAM_START 0x00000000 -#define DRAM_END 0x01000000 -#define DRAM_ROW_SIZE 0x00000400 -#define DRAM_REFRESH (((DRAM_END-DRAM_START)/DRAM_ROW_SIZE)+99)/100 - -static void __inline__ -enable_FIQ(void) -{ - asm volatile ("mrs r0,cpsr;" - "bic r0,r0,#0x40;" - "msr cpsr,r0"); -} - -static void -do_DRAM_refresh(void) -{ - static cyg_uint32 *row_ptr; - volatile cyg_uint32 val; - int i; - enable_FIQ(); // Should be safe here - for (i = 0; i < DRAM_REFRESH; i++) { - val = *row_ptr; - row_ptr += DRAM_ROW_SIZE / sizeof(*row_ptr); - if (row_ptr >= (cyg_uint32 *)DRAM_END) row_ptr = (cyg_uint32 *)DRAM_START; - } -} -#endif // CYGHWR_HAL_ARM_CL7211_SOFTWARE_DRAM_REFRESH - -void hal_clock_reset(cyg_uint32 vector, cyg_uint32 period) -{ - volatile cyg_uint32 *tc2d = (volatile cyg_uint32 *)TC2D; - if (period != _period) { - *tc2d = period; - _period = period; - } -#ifdef CYGHWR_HAL_ARM_CL7211_SOFTWARE_DRAM_REFRESH - do_DRAM_refresh(); -#endif -} - -// Read the current value of the clock, returning the number of hardware "ticks" -// that have occurred (i.e. how far away the current value is from the start) - -void hal_clock_read(cyg_uint32 *pvalue) -{ - volatile cyg_int32 *tc2d = (volatile cyg_int32 *)TC2D; - static cyg_int32 clock_val; - clock_val = *tc2d & 0x0000FFFF; // Register has only 16 bits - if (clock_val & 0x00008000) clock_val |= 0xFFFF8000; // Extend sign bit - *pvalue = (cyg_uint32)(_period - clock_val); // 'clock_val' counts down and wraps -} - -// These tables map the various [soft] interrupt numbers onto the hardware - -static cyg_uint32 hal_interrupt_bitmap[] = { - 0, // CYGNUM_HAL_INTERRUPT_unused 0 - INTSR1_EXTFIQ, // CYGNUM_HAL_INTERRUPT_EXTFIQ 1 - INTSR1_BLINT, // CYGNUM_HAL_INTERRUPT_BLINT 2 - INTSR1_WEINT, // CYGNUM_HAL_INTERRUPT_WEINT 3 - INTSR1_MCINT, // CYGNUM_HAL_INTERRUPT_MCINT 4 - INTSR1_CSINT, // CYGNUM_HAL_INTERRUPT_CSINT 5 - INTSR1_EINT1, // CYGNUM_HAL_INTERRUPT_EINT1 6 - INTSR1_EINT2, // CYGNUM_HAL_INTERRUPT_EINT2 7 - INTSR1_EINT3, // CYGNUM_HAL_INTERRUPT_EINT3 8 - INTSR1_TC1OI, // CYGNUM_HAL_INTERRUPT_TC1OI 9 - INTSR1_TC2OI, // CYGNUM_HAL_INTERRUPT_TC2OI 10 - INTSR1_RTCMI, // CYGNUM_HAL_INTERRUPT_RTCMI 11 - INTSR1_TINT, // CYGNUM_HAL_INTERRUPT_TINT 12 - INTSR1_UTXINT1, // CYGNUM_HAL_INTERRUPT_UTXINT1 13 - INTSR1_URXINT1, // CYGNUM_HAL_INTERRUPT_URXINT1 14 - INTSR1_UMSINT, // CYGNUM_HAL_INTERRUPT_UMSINT 15 - INTSR1_SSEOTI, // CYGNUM_HAL_INTERRUPT_SSEOTI 16 - INTSR2_KBDINT, // CYGNUM_HAL_INTERRUPT_KBDINT 17 - INTSR2_SS2RX, // CYGNUM_HAL_INTERRUPT_SS2RX 18 - INTSR2_SS2TX, // CYGNUM_HAL_INTERRUPT_SS2TX 19 - INTSR2_UTXINT2, // CYGNUM_HAL_INTERRUPT_UTXINT2 20 - INTSR2_URXINT2, // CYGNUM_HAL_INTERRUPT_URXINT2 21 -#if defined(__CL7211) - INTSR3_MCPINT // CYGNUM_HAL_INTERRUPT_MCPINT 22 -#endif -}; - -static cyg_uint32 hal_interrupt_mask_regmap[] = { - 0, // CYGNUM_HAL_INTERRUPT_unused 0 - INTMR1, // CYGNUM_HAL_INTERRUPT_EXTFIQ 1 - INTMR1, // CYGNUM_HAL_INTERRUPT_BLINT 2 - INTMR1, // CYGNUM_HAL_INTERRUPT_WEINT 3 - INTMR1, // CYGNUM_HAL_INTERRUPT_MCINT 4 - INTMR1, // CYGNUM_HAL_INTERRUPT_CSINT 5 - INTMR1, // CYGNUM_HAL_INTERRUPT_EINT1 6 - INTMR1, // CYGNUM_HAL_INTERRUPT_EINT2 7 - INTMR1, // CYGNUM_HAL_INTERRUPT_EINT3 8 - INTMR1, // CYGNUM_HAL_INTERRUPT_TC1OI 9 - INTMR1, // CYGNUM_HAL_INTERRUPT_TC2OI 10 - INTMR1, // CYGNUM_HAL_INTERRUPT_RTCMI 11 - INTMR1, // CYGNUM_HAL_INTERRUPT_TINT 12 - INTMR1, // CYGNUM_HAL_INTERRUPT_UTXINT1 13 - INTMR1, // CYGNUM_HAL_INTERRUPT_URXINT1 14 - INTMR1, // CYGNUM_HAL_INTERRUPT_UMSINT 15 - INTMR1, // CYGNUM_HAL_INTERRUPT_SSEOTI 16 - INTMR2, // CYGNUM_HAL_INTERRUPT_KBDINT 17 - INTMR2, // CYGNUM_HAL_INTERRUPT_SS2RX 18 - INTMR2, // CYGNUM_HAL_INTERRUPT_SS2TX 19 - INTMR2, // CYGNUM_HAL_INTERRUPT_UTXINT2 20 - INTMR2, // CYGNUM_HAL_INTERRUPT_URXINT2 21 -#if defined(__CL7211) - INTMR3, // CYGNUM_HAL_INTERRUPT_MCPINT 22 -#endif -}; - -static cyg_uint32 hal_interrupt_clear_map[] = { - 0, // CYGNUM_HAL_INTERRUPT_unused 0 - 0, // CYGNUM_HAL_INTERRUPT_EXTFIQ 1 - BLEOI, // CYGNUM_HAL_INTERRUPT_BLINT 2 - TEOI, // CYGNUM_HAL_INTERRUPT_WEINT 3 - MCEOI, // CYGNUM_HAL_INTERRUPT_MCINT 4 - COEOI, // CYGNUM_HAL_INTERRUPT_CSINT 5 - 0, // CYGNUM_HAL_INTERRUPT_EINT1 6 - 0, // CYGNUM_HAL_INTERRUPT_EINT2 7 - 0, // CYGNUM_HAL_INTERRUPT_EINT3 8 - TC1EOI, // CYGNUM_HAL_INTERRUPT_TC1OI 9 - TC2EOI, // CYGNUM_HAL_INTERRUPT_TC2OI 10 - RTCEOI, // CYGNUM_HAL_INTERRUPT_RTCMI 11 - TEOI, // CYGNUM_HAL_INTERRUPT_TINT 12 - 0, // CYGNUM_HAL_INTERRUPT_UTXINT1 13 - 0, // CYGNUM_HAL_INTERRUPT_URXINT1 14 - UMSEOI, // CYGNUM_HAL_INTERRUPT_UMSINT 15 - 0, // CYGNUM_HAL_INTERRUPT_SSEOTI 16 - KBDEOI, // CYGNUM_HAL_INTERRUPT_KBDINT 17 - 0, // CYGNUM_HAL_INTERRUPT_SS2RX 18 - 0, // CYGNUM_HAL_INTERRUPT_SS2TX 19 - 0, // CYGNUM_HAL_INTERRUPT_UTXINT2 20 - 0, // CYGNUM_HAL_INTERRUPT_URXINT2 21 -#if defined(__CL7211) - 0, // CYGNUM_HAL_INTERRUPT_MCPINT 22 -#endif -}; - -static struct regmap { - int first_int, last_int; - cyg_uint32 stat_reg, mask_reg; -} hal_interrupt_status_regmap[] = { - { CYGNUM_HAL_INTERRUPT_EXTFIQ, CYGNUM_HAL_INTERRUPT_SSEOTI, INTSR1, INTMR1}, - { CYGNUM_HAL_INTERRUPT_KBDINT, CYGNUM_HAL_INTERRUPT_URXINT2, INTSR2, INTMR2}, -#if defined(__CL7211) - { CYGNUM_HAL_INTERRUPT_MCPINT, CYGNUM_HAL_INTERRUPT_MCPINT, INTSR3, INTMR3}, -#endif - { 0, 0, 0} -}; - -#ifdef CYGHWR_HAL_ARM_CL7211_BATLOW -// This ISR is called when the battery low interrupt occurs -int -cyg_hal_batlow_isr(cyg_vector_t vector, cyg_addrword_t data, HAL_SavedRegisters *regs) -{ - diag_printf("Battery low\n"); - cyg_drv_interrupt_mask(CYGNUM_HAL_INTERRUPT_BLINT); - // Presumably, one would leave this masked until the battery changed - cyg_drv_interrupt_acknowledge(CYGNUM_HAL_INTERRUPT_BLINT); - return 0; // No need to run DSR -} -#endif - -// -// Early stage hardware initialization -// Some initialization has already been done before we get here. For now -// just set up the interrupt environment. - -void hal_hardware_init(void) -{ - volatile cyg_uint32 *icr; - int vector; - // Clear and initialize instruction cache - HAL_ICACHE_INVALIDATE_ALL(); - HAL_ICACHE_ENABLE(); - // Any hardware/platform initialization that needs to be done. - *(volatile cyg_uint32 *)INTMR1 = 0; - *(volatile cyg_uint32 *)INTMR2 = 0; -#if !defined(__CL7111) - *(volatile cyg_uint32 *)INTMR3 = 0; - *(volatile cyg_uint8 *)SYSCON3 = SYSCON3_CLKCTL(CPU_CLOCK); -#endif -#if 0 - diag_printf("IMR1: %04x, IMR2: %04x\n", - *(volatile cyg_uint32 *)INTMR1, - *(volatile cyg_uint32 *)INTMR2); - diag_printf("Memcfg1: %08x, Memcfg2: %08x, DRAM refresh: %08x\n", - *(volatile cyg_uint32 *)MEMCFG1, - *(volatile cyg_uint32 *)MEMCFG2, - *(volatile cyg_uint8 *)DRFPR); -#endif - // Reset all interrupt masks (disable all interrupt sources) - for (vector = CYGNUM_HAL_ISR_MIN; vector < CYGNUM_HAL_ISR_COUNT; vector++) { - icr = (volatile cyg_uint32 *)hal_interrupt_clear_map[vector]; - if (icr) *icr = 0; // Just a write clears the latch - } - // Turn on the DIAG LED to let the world know the board is alive - *(volatile unsigned char *)LEDFLSH = LEDFLSH_ENABLE|LEDFLSH_DUTY(16)|LEDFLSH_PERIOD(1); -#ifdef CYGHWR_HAL_ARM_CL7211_BATLOW - cyg_drv_interrupt_create(CYGNUM_HAL_INTERRUPT_BLINT, - 99, // Priority - what goes here? - 0, // Data item passed to interrupt handler - cyg_hal_batlow_isr, - 0, - &batlow_interrupt_handle, - &batlow_interrupt); - cyg_drv_interrupt_attach(batlow_interrupt_handle); - cyg_drv_interrupt_unmask(CYGNUM_HAL_INTERRUPT_BLINT); -#endif -} - -// -// This routine is called to respond to a hardware interrupt (IRQ). It -// should interrogate the hardware and return the IRQ vector number. - -// This code is a little convoluted to keep it general while still avoiding -// reading the hardware a lot, since the interrupt status is split across -// three separate registers. - -int hal_spurious_ints; - -int hal_IRQ_handler(void) -{ - struct regmap *map = hal_interrupt_status_regmap; - cyg_uint32 stat; - int vector; - while (map->first_int) { - stat = *(volatile cyg_uint32 *)map->stat_reg & *(volatile cyg_uint32 *)map->mask_reg; - for (vector = map->first_int; vector <= map->last_int; vector++) { - if (stat & hal_interrupt_bitmap[vector]) return vector; - } - map++; // Next interrupt status register - } - hal_spurious_ints++; - return CYGNUM_HAL_INTERRUPT_unused; // This shouldn't happen! -} - -// -// Interrupt control -// - -void hal_interrupt_mask(int vector) -{ - volatile cyg_uint32 *imr; - imr = (volatile cyg_uint32 *)hal_interrupt_mask_regmap[vector]; - *imr &= ~hal_interrupt_bitmap[vector]; -} - -void hal_interrupt_unmask(int vector) -{ - volatile cyg_uint32 *imr; - imr = (volatile cyg_uint32 *)hal_interrupt_mask_regmap[vector]; - *imr |= hal_interrupt_bitmap[vector]; -} - -void hal_interrupt_acknowledge(int vector) -{ - // Some interrupt sources have a register for this. - volatile cyg_uint8 *icr; - icr = (volatile cyg_uint32 *)hal_interrupt_clear_map[vector]; - if (icr) { - *icr = 0; // Any data clears interrupt - } -} - -void hal_interrupt_configure(int vector, int level, int up) -{ - // No interrupts are configurable on this hardware -} - -void hal_interrupt_set_level(int vector, int level) -{ - // No interrupts are configurable on this hardware -} - -/*------------------------------------------------------------------------*/ -// EOF hal_misc.c
deleted file mode 100644 --- a/packages/hal/arm/cl7211/current/src/hal_diag.c +++ /dev/null @@ -1,270 +0,0 @@ -/*============================================================================= -// -// hal_diag.c -// -// HAL diagnostic output code -// -//============================================================================= -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//============================================================================= -//#####DESCRIPTIONBEGIN#### -// -// Author(s): nickg, gthomas -// Contributors:nickg, gthomas -// Date: 1998-03-02 -// Purpose: HAL diagnostic output -// Description: Implementations of HAL diagnostic output support. -// -//####DESCRIPTIONEND#### -// -//===========================================================================*/ - -#include <pkgconf/hal.h> -#include <pkgconf/system.h> -#include CYGBLD_HAL_PLATFORM_H - -#include <cyg/infra/cyg_type.h> // base types -#include <cyg/infra/cyg_trac.h> // tracing macros -#include <cyg/infra/cyg_ass.h> // assertion macros - -#include <cyg/hal/hal_arch.h> // basic machine info -#include <cyg/hal/hal_intr.h> // interrupt macros -#include <cyg/hal/hal_io.h> // IO macros -#include <cyg/hal/hal_diag.h> -#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS -#include <cyg/hal/drv_api.h> -#include <cyg/hal/hal_stub.h> // cyg_hal_gdb_interrupt -#endif -#include <cyg/hal/hal_cl7211.h> // Hardware definitions - -#if CYGHWR_HAL_ARM_CL7211_DIAG_PORT == 0 -#define CYG_DIAG_DEV_DATA UARTDR1 -#define CYG_DIAG_DEV_BLCR UBLCR1 -#define CYG_DIAG_DEV_STAT SYSFLG1 -#define CYG_DIAG_DEV_CTRL SYSCON1 -#define CYG_DIAG_DEV_INT CYGNUM_HAL_INTERRUPT_URXINT1 -#else -#define CYG_DIAG_DEV_DATA UARTDR2 -#define CYG_DIAG_DEV_STAT SYSFLG2 -#define CYG_DIAG_DEV_CTRL SYSCON2 -#define CYG_DIAG_DEV_BLCR UBLCR2 -#define CYG_DIAG_DEV_INT CYGNUM_HAL_INTERRUPT_URXINT2 -#endif - -// Assumption: all diagnostic output must be GDB packetized unless this is a ROM (i.e. -// totally stand-alone) system. - -#ifdef CYG_HAL_STARTUP_STUBS -#define CYG_HAL_STARTUP_ROM -#undef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS -#endif - -#if defined(CYG_HAL_STARTUP_ROM) && !defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS) -#define HAL_DIAG_USES_HARDWARE -#else -#if CYGHWR_HAL_ARM_CL7211_DIAG_PORT != CYGHWR_HAL_ARM_CL7211_GDB_PORT -#define HAL_DIAG_USES_HARDWARE -#endif -#endif - -/*---------------------------------------------------------------------------*/ -// CL7211 Serial Port (UARTx) for Debug - -// Actually send character down the wire -static void -hal_diag_write_char_serial(char c) -{ - cyg_uint32 stat; - // Wait for Tx FIFO not full - do { - stat = *(volatile cyg_uint32 *)CYG_DIAG_DEV_STAT; - } while ((stat & SYSFLG1_UTXFF1) != 0) ; - *(volatile cyg_uint8 *)CYG_DIAG_DEV_DATA = c; -} - -static bool -hal_diag_read_serial(char *c) -{ - long timeout = 1000000000; // A long time... - cyg_uint32 stat, val; - - do { - stat = *(volatile cyg_uint32 *)CYG_DIAG_DEV_STAT; - if (--timeout == 0) return false; - } while ((stat & SYSFLG1_URXFE1) != 0); - // Need to read 32 bits - val = *(volatile cyg_uint32 *)CYG_DIAG_DEV_DATA & 0xFF; - *c = val; - return true; -} - -#ifdef HAL_DIAG_USES_HARDWARE - -void hal_diag_init(void) -{ - static int init = 0; -#ifndef CYG_HAL_STARTUP_ROM - char *msg = "\n\rRAM CL7211 eCos\n\r"; -#endif - if (init++) return; - - // Enable port - *(volatile cyg_uint32 *)CYG_DIAG_DEV_CTRL |= SYSCON1_UART1EN; - // Configure - *(volatile cyg_uint32 *)CYG_DIAG_DEV_BLCR = - UART_BITRATE(CYGHWR_HAL_ARM_CL7211_DIAG_BAUD) | - UBLCR_FIFOEN | UBLCR_WRDLEN8; -#ifndef CYG_HAL_STARTUP_ROM - while (*msg) hal_diag_write_char(*msg++); -#endif -} - -#ifndef CYG_HAL_STARTUP_ROM -#define DIAG_BUFSIZE 2048 -static char diag_buffer[DIAG_BUFSIZE]; -static int diag_bp = 0; -#endif - -void hal_diag_write_char(char c) -{ - hal_diag_init(); -#ifndef CYG_HAL_STARTUP_ROM - diag_buffer[diag_bp++] = c; - if (diag_bp == sizeof(diag_buffer)) diag_bp = 0; -#endif - hal_diag_write_char_serial(c); -} - -void hal_diag_read_char(char *c) -{ - while (!hal_diag_read_serial(c)) ; -} - -#else // HAL_DIAG relies on GDB - -// Initialize diag port -void hal_diag_init(void) -{ -#if 0 // Assume port is already setup - // Enable port - *(volatile cyg_uint32 *)CYG_DIAG_DEV_CTRL |= SYSCON1_UART1EN; - // Configure - *(volatile cyg_uint32 *)CYG_DIAG_DEV_BLCR = - UART_BITRATE(CYGHWR_HAL_ARM_CL7211_DIAG_BAUD) | - UBLCR_FIFOEN | UBLCR_WRDLEN8; -#endif -} - -void -hal_diag_read_char(char *c) -{ - while (!hal_diag_read_serial(c)) ; -} - -void -hal_diag_write_char(char c) -{ - static char line[100]; - static int pos = 0; - - // No need to send CRs - if( c == '\r' ) return; - - line[pos++] = c; - - if( c == '\n' || pos == sizeof(line) ) - { - - CYG_INTERRUPT_STATE old; - - // Disable interrupts. This prevents GDB trying to interrupt us - // while we are in the middle of sending a packet. The serial - // receive interrupt will be seen when we re-enable interrupts - // later. - -#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS - CYG_HAL_GDB_ENTER_CRITICAL_IO_REGION(old); -#else - HAL_DISABLE_INTERRUPTS(old); -#endif - - while(1) - { - static char hex[] = "0123456789ABCDEF"; - cyg_uint8 csum = 0; - int i; - char c1; - - hal_diag_write_char_serial('$'); - hal_diag_write_char_serial('O'); - csum += 'O'; - for( i = 0; i < pos; i++ ) - { - char ch = line[i]; - char h = hex[(ch>>4)&0xF]; - char l = hex[ch&0xF]; - hal_diag_write_char_serial(h); - hal_diag_write_char_serial(l); - csum += h; - csum += l; - } - hal_diag_write_char_serial('#'); - hal_diag_write_char_serial(hex[(csum>>4)&0xF]); - hal_diag_write_char_serial(hex[csum&0xF]); - - // Wait for the ACK character '+' from GDB here and handle - // receiving a ^C instead. This is the reason for this clause - // being a loop. - if (!hal_diag_read_serial(&c1)) - continue; // No response - try sending packet again - - if( c1 == '+' ) - break; // a good acknowledge - -#ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT - cyg_drv_interrupt_acknowledge(CYG_DIAG_DEV_INT); - if( c1 == 3 ) { - // Ctrl-C: breakpoint. - cyg_hal_gdb_interrupt (__builtin_return_address(0)); - break; - } -#endif - // otherwise, loop round again - } - - pos = 0; - - - // And re-enable interrupts -#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS - CYG_HAL_GDB_LEAVE_CRITICAL_IO_REGION(old); -#else - HAL_RESTORE_INTERRUPTS(old); -#endif - - } -} -#endif - -/*---------------------------------------------------------------------------*/ -/* End of hal_diag.c */
deleted file mode 100644 --- a/packages/hal/arm/cl7211/current/src/plf_stub.c +++ /dev/null @@ -1,157 +0,0 @@ -//============================================================================= -// -// plf_stub.c -// -// Platform specific code for GDB stub support. -// -//============================================================================= -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998, 1999 Cygnus Solutions. -// All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//============================================================================= -//#####DESCRIPTIONBEGIN#### -// -// Author(s): gthomas -// Contributors:gthomas, jskov -// Date: 1999-04-21 -// Purpose: Platform specific code for GDB stub support. -// -//####DESCRIPTIONEND#### -// -//============================================================================= - -#include <pkgconf/hal.h> -#include <pkgconf/system.h> -#include CYGBLD_HAL_PLATFORM_H - -#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS - -#include <cyg/hal/hal_stub.h> - -#include <cyg/hal/hal_io.h> // HAL IO macros -#include <cyg/hal/hal_cl7211.h> // Hardware definitions -#ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT -#include <cyg/hal/hal_intr.h> // HAL interrupt macros -#include <cyg/hal/drv_api.h> // HAL ISR support -#endif - -#if CYGHWR_HAL_ARM_CL7211_GDB_PORT == 0 -#define CYG_GDB_DEV_DATA UARTDR1 -#define CYG_GDB_DEV_BLCR UBLCR1 -#define CYG_GDB_DEV_STAT SYSFLG1 -#define CYG_GDB_DEV_CTRL SYSCON1 -#define CYG_GDB_DEV_INT CYGNUM_HAL_INTERRUPT_URXINT1 -#else -#define CYG_GDB_DEV_DATA UARTDR2 -#define CYG_GDB_DEV_STAT SYSFLG2 -#define CYG_GDB_DEV_CTRL SYSCON2 -#define CYG_GDB_DEV_BLCR UBLCR2 -#define CYG_GDB_DEV_INT CYGNUM_HAL_INTERRUPT_URXINT2 -#endif - -#ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT -static cyg_interrupt gdb_interrupt; -static cyg_handle_t gdb_interrupt_handle; -#endif - -//----------------------------------------------------------------------------- -#ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT - -// This ISR is called only for serial receive interrupts. -int -cyg_hal_gdb_isr(cyg_vector_t vector, cyg_addrword_t data, HAL_SavedRegisters *regs) -{ - cyg_uint8 c; - - c = hal_cl7211_get_char(); // Fetch the character - if( 3 == c ) { // ^C - // Ctrl-C: set a breakpoint at PC so GDB will display the - // correct program context when stopping rather than the - // interrupt handler. - cyg_hal_gdb_interrupt (regs->pc); - cyg_drv_interrupt_acknowledge(CYG_GDB_DEV_INT); - } - return 0; // No need to run DSR -} - -int -hal_cl7211_interruptible(int state) -{ - if (state) { - cyg_drv_interrupt_unmask(CYG_GDB_DEV_INT); - } else { - cyg_drv_interrupt_mask(CYG_GDB_DEV_INT); - } - - return 0; -} -#endif - -// Initialize the current serial port. -void hal_cl7211_init_serial(void) -{ - // Enable port - *(volatile cyg_uint32 *)CYG_GDB_DEV_CTRL |= SYSCON1_UART1EN; - // Configure - *(volatile cyg_uint32 *)CYG_GDB_DEV_BLCR = - UART_BITRATE(CYGHWR_HAL_ARM_CL7211_GDB_BAUD) | - UBLCR_FIFOEN | UBLCR_WRDLEN8; - -#ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT - cyg_drv_interrupt_create(CYG_GDB_DEV_INT, - 99, // Priority - what goes here? - 0, // Data item passed to interrupt handler - cyg_hal_gdb_isr, - 0, - &gdb_interrupt_handle, - &gdb_interrupt); - cyg_drv_interrupt_attach(gdb_interrupt_handle); - cyg_drv_interrupt_unmask(CYG_GDB_DEV_INT); -#endif -} - -// Write C to the current serial port. -void hal_cl7211_put_char(int c) -{ - cyg_uint32 stat; - // Wait for Tx FIFO not full - do { - stat = *(volatile cyg_uint32 *)CYG_GDB_DEV_STAT; - } while ((stat & SYSFLG1_UTXFF1) != 0) ; - *(volatile cyg_uint32 *)CYG_GDB_DEV_DATA = c; -} - -// Read one character from the current serial port. -int hal_cl7211_get_char(void) -{ - cyg_uint32 stat, val; - do { - stat = *(volatile cyg_uint32 *)CYG_GDB_DEV_STAT; - } while ((stat & SYSFLG1_URXFE1) != 0); - // Need to read 32 bits - val = *(volatile cyg_uint32 *)CYG_GDB_DEV_DATA & 0xFF; - return val; -} - -#endif // ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS -//----------------------------------------------------------------------------- -// End of plf_stub.c
deleted file mode 100644 --- a/packages/hal/arm/cl7211/current/support/Makefile +++ /dev/null @@ -1,13 +0,0 @@ -# -# eCos support tools for EP7211 -# - -DL_FILES = dl_7211.o io.o -ALL := dl_7211 - - -all: $(ALL) - -dl_7211: $(DL_FILES) - $(CC) -o $@ $(DL_FILES) -
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deleted file mode 100644 --- a/packages/hal/arm/cl7211/current/support/dl_7211.c +++ /dev/null @@ -1,410 +0,0 @@ -//**************************************************************************** -// -// DOWNLOAD.C - Automates the download of code into the flash on the -// CL-PS7111-DK-D2 board. -// -// Copyright (c) 1999 Cirrus Logic, Inc. -// -// Adapted for Linux by Cygnus Solutions, Inc. -// -//**************************************************************************** -#include <stdio.h> -#include "bootcode.h" - -#define DEFAULT_PORT "/dev/ttyS1" -extern char ReceiveChar(long); -extern void SendChar(long, char); -extern void SetBaud(long, long); -extern int CharRead(long port); -extern void WaitForOutputReady(long port); -extern long OpenPort(char *); - -//**************************************************************************** -// -// WaitFor waits until a specific character is read from the comm port. -// -//**************************************************************************** -void -WaitFor(long lPort, char cWaitChar) -{ - char cChar; - - // - // Wait until we read a specific character from the comm port. - // - while(1) - { - // - // Read a character. - // - cChar = ReceiveChar(lPort); - - // - // Stop waiting if we received the character. - // - if(cChar == cWaitChar) - { - break; - } - } -} - -//**************************************************************************** -// -// This program waits for the '<' character from the boot ROM, sends the boot -// code, waits for the '>' from the boot ROM, waits for the '?' from the boot -// code, changes the serial port rate (preferably to 115200), downloads the -// user data file, and then prints out progress status as the boot code writes -// the user data file to the flash. -// -//**************************************************************************** -void -main(int argc, char *argv[]) -{ - long lPort; - long lRate = 38400; - long lFileSize, lIdx; - char cChar, cFirstChar, *pcFile, cRateChar; - FILE *pFile; - - // - // Make sure that a filename was specified. - // - if(argc < 2) - { - fprintf(stderr, "Usage: download <filename> {<baud rate> {<comm port>}}\n"); - return; - } - - // - // If a baud rate was specified, then read it and make sure it is valid. - // - if(argc > 2) - { - lRate = atoi(argv[2]); - if((lRate != 9600) && (lRate != 19200) && (lRate != 28800) && - (lRate != 38400) && (lRate != 57600) && (lRate != 115200)) - { - fprintf(stderr, "Invalid baud rate.\n"); - return; - } - } - - // - // If a comm port was specified, then read it and make sure it is valid. - // - if(argc > 3) - { - lPort = OpenPort(argv[3]); - } else - { - lPort = OpenPort(DEFAULT_PORT); - } - if (lPort < 0) - { - fprintf(stderr, "Can't open port\n"); - return; - } - - // - // Open the file to be downloaded. - // - pFile = fopen(argv[1], "rb"); - if(!pFile) - { - fprintf(stderr, "Could not open file '%s'.\n", argv[1]); - return; - } - - // - // Get the size of the file. - // - fseek(pFile, 0, SEEK_END); - lFileSize = ftell(pFile); - fseek(pFile, 0, SEEK_SET); - - // - // Allocate memory to hold the file contents. - // - pcFile = (char *)malloc(lFileSize); - if(!pcFile) - { - fprintf(stderr, "Failed to allocate memory for the file.\n"); - return; - } - - // - // Read the contents of the file into memory. - // - if(fread(pcFile, 1, lFileSize, pFile) != lFileSize) - { - fprintf(stderr, "Failed to read file '%s'.\n", argv[1]); - return; - } - - // - // Close the file. - // - fclose(pFile); - - // - // Get the baud rate divisor for the given baud rate. - // - SetBaud(lPort, 9600); - switch(lRate) - { - case 9600: - { - cRateChar = '0'; - break; - } - - case 19200: - { - cRateChar = '1'; - break; - } - - case 28800: - { - cRateChar = '2'; - break; - } - - case 38400: - { - cRateChar = '3'; - break; - } - - case 57600: - { - cRateChar = '4'; - break; - } - - case 115200: - { - cRateChar = '5'; - break; - } - } - - // - // Empty out the input queue. - // - while(CharReady(lPort)) - { - cChar = ReceiveChar(lPort); - } - - // - // Tell the user to reset the board. - // - fprintf(stderr, "Waiting for the board to wakeup..."); - - // - // Wait until we read a '<' from the comm port. - // - WaitFor(lPort, '<'); - - // - // Tell the user that we are downloading the boot code. - // - fprintf(stderr, "\nDownloading boot code...( 0%%)"); - - // - // Write the boot code to the comm port. - // - for(lIdx = 0; lIdx < 2048; lIdx++) - { - // - // Write this character. - // - SendChar(lPort, pcBoot[lIdx]); - - // - // Periodically print out our progress. - // - if((lIdx & 127) == 127) - { - fprintf(stderr, "\b\b\b\b\b%3d%%)", ((lIdx + 1) * 100) / 2048); - } - } - - // - // Wait until we read a '>' from the comm port. - // - WaitFor(lPort, '>'); - - // - // Wait until we read a '?' from the comm port. - // - WaitFor(lPort, '?'); - - // - // Tell the boot code to switch to the desired baud rate. - // - SendChar(lPort, 'B'); - SendChar(lPort, cRateChar); - - // - // Wait until the output buffer is empty. - // - WaitForOutputEmpty(); - - // - // Switch our baud rate to the desired rate. - // - SetBaud(lPort, lRate); - - // - // Send a '-' character until we receive back a '?' character. - // - while(1) - { - // - // Send a '-' character. - // - SendChar(lPort, '-'); - - // - // Wait a little bit. - // - for(lIdx = 0; lIdx < 1024 * 1024; lIdx++) - { - } - - // - // See if there is a character waiting to be read. - // - if(CharReady(lPort)) - { - // - // Read the character. - // - cChar = ReceiveChar(lPort); - - // - // Quit waiting if this is a '?'. - // - if(cChar == '?') - { - break; - } - } - } - - // - // Empty out the input queue. - // - while(CharReady(lPort)) - { - cChar = ReceiveChar(lPort); - } - - // - // Send the program flash command. - // - SendChar(lPort, 'F'); - - // - // We always program the flash at location 0. - // - SendChar(lPort, 0); - SendChar(lPort, 0); - SendChar(lPort, 0); - SendChar(lPort, 0); - - // - // Send the length of the data file. - // - SendChar(lPort, (char)(lFileSize & 0xFF)); - SendChar(lPort, (char)((lFileSize >> 8) & 0xFF)); - SendChar(lPort, (char)((lFileSize >> 16) & 0xFF)); - SendChar(lPort, (char)((lFileSize >> 24) & 0xFF)); - - // - // Tell the user that we are downloading the file data. - // - fprintf(stderr, "\nDownloading file data...( 0%%)"); - - // - // Send the actual data in the file. - // - for(lIdx = 0; lIdx < lFileSize; lIdx++) - { - // - // Send this byte. - // - SendChar(lPort, pcFile[lIdx]); - - // - // Periodically print out our progress. - // - if((lIdx & 127) == 127) - { - fprintf(stderr, "\b\b\b\b\b%3d%%)", ((lIdx + 1) * 100) / lFileSize); - } - } - - // - // Tell the user that we are erasing the flash. - // - fprintf(stderr, "\nErasing the flash...( 0%%)"); - - // - // Wait until the flash has been erased. - // - cFirstChar = cChar = ReceiveChar(lPort); - while(cChar != '1') - { - // - // Print out our progress. - // - fprintf(stderr, "\b\b\b\b\b%3d%%)", - ((cFirstChar - cChar + 1) * 100) / (cFirstChar - '0')); - - // - // Read a character from the boot code. - // - cChar = ReceiveChar(lPort); - } - - // - // Tell the user that we are programming the flash. - // - fprintf(stderr, "\nProgramming the flash...( 0%%)"); - - // - // Wait until the flash has been programmed. - // - lIdx = 0; - while(1) - { - // - // Read a character from the boot code. - // - cChar = ReceiveChar(lPort); - - // - // If the character is a '?', then we are done. - // - if(cChar == '?') - { - break; - } - - // - // Print out our progress. - // - fprintf(stderr, "\b\b\b\b\b%3d%%)", - (++lIdx * 100) / ((lFileSize + 1023) / 1024)); - } - - // - // Tell the user we are done. - // - fprintf(stderr, "\nSuccessfully downloaded '%s'.\n", argv[1]); -} -
deleted file mode 100644 --- a/packages/hal/arm/cl7211/current/support/io.c +++ /dev/null @@ -1,151 +0,0 @@ -//========================================================================== -// -// io.c -// -// Linux I/O support for Cirrus CL7211 eval board tools -// -//========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//========================================================================== -//#####DESCRIPTIONBEGIN#### -// -// Author(s): gthomas -// Contributors: gthomas -// Date: 1999-06-16 -// Description: Linux I/O support for Cirrus CL7211 FLASH tools -//####DESCRIPTIONEND#### - -// -// io.c - I/O functions -// - -#include <stdio.h> -#include <sys/ioctl.h> -#include <fcntl.h> -#include <termios.h> - -char ReceiveChar(long port) -{ - char buf; - int res; - // Port is in non-blocking mode, this needs to have a loop - do { - res = read(port, &buf, 1); - } while (res < 0); -// printf("Read: %c\n", buf); - return buf; -} - -static void -uspin(int len) -{ - volatile int cnt; - while (--len >= 0) { - for (cnt = 1; cnt < 2000; cnt++) ; - } -} - -void SendChar(long port, char ch) -{ - char buf = ch; - write(port, &buf, 1); -// printf("Send: %x\n", ch); -// usleep(100); - uspin(100); -} - -void SetBaud(long port, long reqRate) -{ - struct termios buf; - int rate; - - // Get original configuration - if (tcgetattr(port, &buf)) { - fprintf(stderr, "Can't get port config\n"); - return; - } - - // Reset to raw. - buf.c_iflag &= ~(IGNBRK|BRKINT|PARMRK|ISTRIP - |INLCR|IGNCR|ICRNL|IXON); - buf.c_oflag &= ~OPOST; - buf.c_lflag &= ~(ECHO|ECHONL|ICANON|ISIG|IEXTEN); - buf.c_cflag &= ~(CSIZE|PARENB); - buf.c_cflag |= CS8; - - // Set baud rate. - switch (reqRate) { - case 9600: - rate = B9600; - break; - case 38400: - rate = B38400; - break; - case 57600: - rate = B57600; - break; - case 115200: - rate = B115200; - break; - } - cfsetispeed(&buf, rate); - cfsetospeed(&buf, rate); - - // Set data bits. - buf.c_cflag &= ~CSIZE; - buf.c_cflag |= CS8; - - // Set stop bits. - buf.c_cflag &= ~CSTOPB; // One stop - - // Set parity. - buf.c_cflag &= ~(PARENB | PARODD); // no parity. - - // Set the new settings - if (tcsetattr(port, TCSADRAIN, &buf)) { - fprintf(stderr, "Error: tcsetattr\n"); - return; - } - - tcdrain(port); - usleep(1000000/10*2); -} - -int CharReady(long port) -{ - int n, res; - res = ioctl(port, FIONREAD, &n); - return n; // Non-zero if characters ready to read -} - -void WaitForOutputEmpty(long port) -{ - usleep(2000000); -} - -long OpenPort(char *name) -{ - int fd; - fd = open(name, O_RDWR|O_NONBLOCK); - return fd; -}
deleted file mode 100644 --- a/packages/hal/arm/cl7211/current/tests/PKGconf.mak +++ /dev/null @@ -1,39 +0,0 @@ -#=============================================================================== -# -# makefile -# -# kernel/tests -# -#=============================================================================== -#####COPYRIGHTBEGIN#### -# -# ------------------------------------------- -# The contents of this file are subject to the Cygnus eCos Public License -# Version 1.0 (the "License"); you may not use this file except in -# compliance with the License. You may obtain a copy of the License at -# http://sourceware.cygnus.com/ecos -# -# Software distributed under the License is distributed on an "AS IS" -# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -# License for the specific language governing rights and limitations under -# the License. -# -# The Original Code is eCos - Embedded Cygnus Operating System, released -# September 30, 1998. -# -# The Initial Developer of the Original Code is Cygnus. Portions created -# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. -# ------------------------------------------- -# -#####COPYRIGHTEND#### -#=============================================================================== - -PACKAGE := hal_arm_cl7211 -include ../../../../../pkgconf/pkgconf.mak - -TESTS := dram_test - -include $(COMPONENT_REPOSITORY)/pkgconf/makrules.tst - - -
deleted file mode 100644 --- a/packages/hal/arm/cl7211/current/tests/dram_test.c +++ /dev/null @@ -1,316 +0,0 @@ -//========================================================================== -// -// dram_test.c -// -// Cirrus EB72xx eval board DRAM test code -// -//========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//========================================================================== -//#####DESCRIPTIONBEGIN#### -// -// Author(s): gthomas -// Contributors: gthomas -// Date: 1999-10-22 -// Description: Tool used to test DRAM on eval boards -//####DESCRIPTIONEND#### - -#include <pkgconf/kernel.h> // Configuration header -#include <cyg/kernel/kapi.h> -#include <cyg/infra/diag.h> - -#include <cyg/hal/hal_cl7211.h> // Board definitions - -#ifndef FALSE -#define FALSE 0 -#define TRUE 1 -#endif - -#define STACK_SIZE 4096 -static char stack[STACK_SIZE]; -static cyg_thread thread_data; -static cyg_handle_t thread_handle; - -extern char _end; -int total_errors; -int run_errors; -int error_count; -#define MAX_ERRORS 5 -#define NUM_RUNS 25 -#define REFRESH_TIME 5 - -int decay_time[] = { 50, 100, 200, 500, 1000 }; -#define NUM_DECAY sizeof(decay_time)/sizeof(decay_time[0]) - -// FUNCTIONS - -static void -cyg_test_exit(void) -{ - while (TRUE) ; -} - -static void -new_test(void) -{ - error_count = 0; -} - -static void -report_error(void *addr, cyg_uint32 actual, cyg_uint32 expected) -{ - total_errors++; - run_errors++; - if (++error_count > MAX_ERRORS) return; - diag_printf(" 0x%08x: expected - 0x%08x, actual - 0x%08x\n", - addr, expected, actual); -} - -// Fill longwords with their own address and verify - -static void -addr_test(cyg_uint32 start, cyg_uint32 end) -{ - cyg_uint32 *mp; - - new_test(); - diag_printf("-- Address test\n"); - for (mp = (cyg_uint32 *)start; mp < (cyg_uint32 *)end; mp++) { - *mp = (cyg_uint32)mp; - } - for (mp = (cyg_uint32 *)start; mp < (cyg_uint32 *)end; mp++) { - if (*mp != (cyg_uint32)mp) { - report_error(mp, *mp, (cyg_uint32)mp); - } - } -} - -// Fill longwords with zeros - -static void -zeros_test(cyg_uint32 start, cyg_uint32 end) -{ - cyg_uint32 *mp; - - new_test(); - diag_printf("-- Zeros test\n"); - for (mp = (cyg_uint32 *)start; mp < (cyg_uint32 *)end; mp++) { - *mp = (cyg_uint32)0; - } - for (mp = (cyg_uint32 *)start; mp < (cyg_uint32 *)end; mp++) { - if (*mp != (cyg_uint32)0) { - report_error(mp, *mp, (cyg_uint32)0); - } - } -} - -// Fill longwords with all ones - -static void -ones_test(cyg_uint32 start, cyg_uint32 end) -{ - cyg_uint32 *mp; - - new_test(); - diag_printf("-- Ones test\n"); - for (mp = (cyg_uint32 *)start; mp < (cyg_uint32 *)end; mp++) { - *mp = (cyg_uint32)0xFFFFFFFF; - } - for (mp = (cyg_uint32 *)start; mp < (cyg_uint32 *)end; mp++) { - if (*mp != (cyg_uint32)0xFFFFFFFF) { - report_error(mp, *mp, (cyg_uint32)0xFFFFFFFF); - } - } -} - -// Fill longwords with a "walking" bit - -static void -walking_bit_test(cyg_uint32 start, cyg_uint32 end) -{ - cyg_uint32 *mp; - cyg_uint32 bit; - - new_test(); - diag_printf("-- Walking test\n"); - bit = 1; - for (mp = (cyg_uint32 *)start; mp < (cyg_uint32 *)end; mp++) { - *mp = (cyg_uint32)bit; - bit <<= 1; - if (bit == 0) bit = 1; - } - bit = 1; - for (mp = (cyg_uint32 *)start; mp < (cyg_uint32 *)end; mp++) { - if (*mp != (cyg_uint32)bit) { - report_error(mp, *mp, (cyg_uint32)bit); - } - bit <<= 1; - if (bit == 0) bit = 1; - } -} - -// Fill longwords with an alternating pattern - -static void -pattern_test(cyg_uint32 start, cyg_uint32 end) -{ - cyg_uint32 *mp; - cyg_uint32 pat; - - new_test(); - diag_printf("-- Pattern test\n"); - pat = 0x55555555; - for (mp = (cyg_uint32 *)start; mp < (cyg_uint32 *)end; mp++) { - *mp = (cyg_uint32)pat; - } - for (mp = (cyg_uint32 *)start; mp < (cyg_uint32 *)end; mp++) { - if (*mp != (cyg_uint32)pat) { - report_error(mp, *mp, (cyg_uint32)pat); - } - } - pat = 0xAAAAAAAA; - for (mp = (cyg_uint32 *)start; mp < (cyg_uint32 *)end; mp++) { - *mp = (cyg_uint32)pat; - } - for (mp = (cyg_uint32 *)start; mp < (cyg_uint32 *)end; mp++) { - if (*mp != (cyg_uint32)pat) { - report_error(mp, *mp, (cyg_uint32)pat); - } - } -} - -// Verify if refresh works - -static void -refresh_test(cyg_uint32 start, cyg_uint32 end) -{ - cyg_uint32 *mp; - cyg_uint32 pat; - - new_test(); - diag_printf("-- Refresh test\n"); - pat = 0x55555555; - for (mp = (cyg_uint32 *)start; mp < (cyg_uint32 *)end; mp++) { - *mp = (cyg_uint32)pat; - } - cyg_thread_delay(REFRESH_TIME*100); - for (mp = (cyg_uint32 *)start; mp < (cyg_uint32 *)end; mp++) { - if (*mp != (cyg_uint32)pat) { - report_error(mp, *mp, (cyg_uint32)pat); - } - } - pat = 0xAAAAAAAA; - for (mp = (cyg_uint32 *)start; mp < (cyg_uint32 *)end; mp++) { - *mp = (cyg_uint32)pat; - } - cyg_thread_delay(REFRESH_TIME*100); - for (mp = (cyg_uint32 *)start; mp < (cyg_uint32 *)end; mp++) { - if (*mp != (cyg_uint32)pat) { - report_error(mp, *mp, (cyg_uint32)pat); - } - } -} - -// See how long we can "sleep" before refresh fails - -static void -decay_test(cyg_uint32 start, cyg_uint32 end) -{ - cyg_uint32 *mp; - cyg_uint32 pat; - int i; - - diag_printf("-- Decay test\n"); - for (i = 0; i < NUM_DECAY; i++) { - diag_printf(" ... %d.%02d sec delay\n", decay_time[i]/100, decay_time[i]%100); - new_test(); - pat = 0x55555555; - for (mp = (cyg_uint32 *)start; mp < (cyg_uint32 *)end; mp++) { - *mp = (cyg_uint32)pat; - } - cyg_thread_delay(decay_time[i]); - for (mp = (cyg_uint32 *)start; mp < (cyg_uint32 *)end; mp++) { - if (*mp != (cyg_uint32)pat) { - report_error(mp, *mp, (cyg_uint32)pat); - } - } - pat = 0xAAAAAAAA; - for (mp = (cyg_uint32 *)start; mp < (cyg_uint32 *)end; mp++) { - *mp = (cyg_uint32)pat; - } - cyg_thread_delay(decay_time[i]); - for (mp = (cyg_uint32 *)start; mp < (cyg_uint32 *)end; mp++) { - if (*mp != (cyg_uint32)pat) { - report_error(mp, *mp, (cyg_uint32)pat); - } - } - diag_printf(" ... %d errors\n", error_count); - } -} - - -static void -dram_exercise(cyg_addrword_t p) -{ - cyg_uint32 start_DRAM, end_DRAM; - int i; - - end_DRAM = 0x01000000; - end_DRAM = 0x00F80000; - start_DRAM = ((cyg_uint32)&_end + 0x0000FFFF) & 0xFFFF0000; - diag_printf("DRAM test - start: 0x%08x, end: 0x%08x\n", start_DRAM, end_DRAM); - - for (i = 0; i < NUM_RUNS; i++) { - diag_printf("\n*** Start run #%d of %d\n", i+1, NUM_RUNS); - run_errors = 0; - addr_test(start_DRAM, end_DRAM); - ones_test(start_DRAM, end_DRAM); - zeros_test(start_DRAM, end_DRAM); - walking_bit_test(start_DRAM, end_DRAM); - pattern_test(start_DRAM, end_DRAM); - refresh_test(start_DRAM, end_DRAM); - decay_test(start_DRAM, end_DRAM); - diag_printf("\n*** End run, %d errors, %d total errors\n", run_errors, total_errors); - } - - diag_printf("All done!\n"); - cyg_test_exit(); -} - -externC void -cyg_start( void ) -{ - // Create a main thread, so we can run the scheduler and have time 'pass' - cyg_thread_create(10, // Priority - just a number - dram_exercise, // entry - 0, // entry parameter - "DRAM test", // Name - &stack[0], // Stack - STACK_SIZE, // Size - &thread_handle, // Handle - &thread_data // Thread data structure - ); - cyg_thread_resume(thread_handle); // Start it - cyg_scheduler_start(); -} // cyg_package_start() -
--- a/packages/hal/arm/cma230/current/ChangeLog +++ b/packages/hal/arm/cma230/current/ChangeLog @@ -1,3 +1,25 @@ +1999-11-09 Gary Thomas <gthomas@cygnus.co.uk> + + * include/pkgconf/mlt_arm_cma230T_ram.h: + * include/pkgconf/mlt_arm_cma230T_rom.h: + * include/pkgconf/mlt_arm_cma230_ram.h: + * include/pkgconf/mlt_arm_cma230_rom.h: New files. + + * include/pkgconf/mlt_arm_cma230T_ram.ldi: + * include/pkgconf/mlt_arm_cma230T_ram.ldi: + * include/pkgconf/mlt_arm_cma230_rom.ldi: + * include/pkgconf/mlt_arm_cma230_rom.mlt: Update with correct memory layout. + +1999-11-09 John Dallaway <jld@cygnus.co.uk> + + * include/pkgconf/hal_arm_cma230.h: + + Add platform attribute to CYGPKG_HAL_ARM_CMA230. + +1999-11-09 Gary Thomas <gthomas@cygnus.co.uk> + + * src/hal_diag.c: Honor GDB_DISABLE option. + 1999-10-28 Jesper Skov <jskov@cygnus.co.uk> * misc/PKGconf.mak: Don't strip symbols when making .img. @@ -52,10 +74,6 @@ 1999-06-04 Gary Thomas <gthomas@cygnus back properly, so a memory shadow is necessary. -1999-05-20 Gary Thomas <gthomas@cygnus.co.uk> - - * include/pkgconf/hal_arm_cl7211.h: Move RTC setup here. - //=========================================================================== //####COPYRIGHTBEGIN#### //
deleted file mode 100644 index 9160fa07ba09717fdb4b59053f16bbe66f25d832..0000000000000000000000000000000000000000 GIT binary patch literal 0 Hc$@<O00001
deleted file mode 100644 index 126508e4a77503e02e90638998955b3b9709f364..0000000000000000000000000000000000000000 GIT binary patch literal 0 Hc$@<O00001
--- a/packages/hal/arm/cma230/current/include/pkgconf/hal_arm_cma230.h +++ b/packages/hal/arm/cma230/current/include/pkgconf/hal_arm_cma230.h @@ -47,6 +47,7 @@ cdl_package CYGPKG_HAL_ARM_CMA230 { display "Cogent Computer Systems CMA230 board" + platform cma230 type radio parent CYGPKG_HAL_ARM description "
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/cma230/current/include/pkgconf/mlt_arm_cma230_ram.h @@ -0,0 +1,13 @@ +// eCos memory layout - Tue Nov 09 08:15:25 1999 + +// This is a generated file - do not edit + +#include <cyg/infra/cyg_type.h> +#include <stddef.h> + +#define CYGMEM_REGION_ram (0) +#define CYGMEM_REGION_ram_SIZE (0x200000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) +extern char CYG_LABEL_NAME (_reserved) []; +#define CYGMEM_SECTION_reserved (CYG_LABEL_NAME (_reserved)) +#define CYGMEM_SECTION_reserved_SIZE (0x8000)
--- a/packages/hal/arm/cma230/current/include/pkgconf/mlt_arm_cma230_ram.ldi +++ b/packages/hal/arm/cma230/current/include/pkgconf/mlt_arm_cma230_ram.ldi @@ -1,44 +1,17 @@ -//=========================================================================== -// -// MLT linker script export -// -//=========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//=========================================================================== - -// eCos memory layout - Mon May 17 08:04:39 1999 +// eCos memory layout - Tue Nov 09 08:15:25 1999 // This is a generated file - do not edit MEMORY { - ram : ORIGIN = 0x8000, LENGTH = 0x1b8000 + ram : ORIGIN = 0, LENGTH = 0x200000 } SECTIONS { SECTIONS_BEGIN - SECTION_rom_vectors (ram, 0x8000, LMA_EQ_VMA) + __reserved = 0; . = __reserved + 0x8000; + SECTION_rom_vectors (ram, ALIGN (0x1), LMA_EQ_VMA) SECTION_text (ram, ALIGN (0x1), LMA_EQ_VMA) SECTION_fini (ram, ALIGN (0x1), LMA_EQ_VMA) SECTION_rodata (ram, ALIGN (0x1), LMA_EQ_VMA)
--- a/packages/hal/arm/cma230/current/include/pkgconf/mlt_arm_cma230_ram.mlt +++ b/packages/hal/arm/cma230/current/include/pkgconf/mlt_arm_cma230_ram.mlt @@ -1,6 +1,7 @@ version 0 -region ram 8000 1b8000 0 ! -section rom_vectors 0 1 0 1 1 1 1 1 8000 8000 text text ! +region ram 0 200000 0 ! +section reserved 8000 1 0 0 1 1 1 1 0 0 rom_vectors rom_vectors ! +section rom_vectors 0 1 0 1 0 1 0 1 text text ! section text 0 1 0 1 0 1 0 1 fini fini ! section fini 0 1 0 1 0 1 0 1 rodata rodata ! section rodata 0 1 0 1 0 1 0 1 rodata1 rodata1 !
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/cma230/current/include/pkgconf/mlt_arm_cma230_rom.h @@ -0,0 +1,16 @@ +// eCos memory layout - Tue Nov 09 08:31:08 1999 + +// This is a generated file - do not edit + +#include <cyg/infra/cyg_type.h> +#include <stddef.h> + +#define CYGMEM_REGION_ram (0) +#define CYGMEM_REGION_ram_SIZE (0x200000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) +#define CYGMEM_REGION_rom (0xe000000) +#define CYGMEM_REGION_rom_SIZE (0x40000) +#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R) +extern char CYG_LABEL_NAME (_reserved) []; +#define CYGMEM_SECTION_reserved (CYG_LABEL_NAME (_reserved)) +#define CYGMEM_SECTION_reserved_SIZE (0x1000)
--- a/packages/hal/arm/cma230/current/include/pkgconf/mlt_arm_cma230_rom.ldi +++ b/packages/hal/arm/cma230/current/include/pkgconf/mlt_arm_cma230_rom.ldi @@ -1,39 +1,10 @@ -//=========================================================================== -// -// MLT linker script export -// -//=========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//=========================================================================== - - -// eCos memory layout - Thu May 20 11:04:13 1999 +// eCos memory layout - Tue Nov 09 08:31:08 1999 // This is a generated file - do not edit MEMORY { - ram : ORIGIN = 0x400, LENGTH = 0x200000 + ram : ORIGIN = 0, LENGTH = 0x200000 rom : ORIGIN = 0xe000000, LENGTH = 0x40000 } @@ -47,7 +18,8 @@ SECTIONS SECTION_rodata1 (rom, ALIGN (0x1), LMA_EQ_VMA) SECTION_fixup (rom, ALIGN (0x1), LMA_EQ_VMA) SECTION_gcc_except_table (rom, ALIGN (0x1), LMA_EQ_VMA) - SECTION_data (ram, 0x400, FOLLOWING (.gcc_except_table)) + __reserved = 0; . = __reserved + 0x1000; + SECTION_data (ram, ALIGN (0x1), FOLLOWING (.gcc_except_table)) SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA) SECTIONS_END }
--- a/packages/hal/arm/cma230/current/include/pkgconf/mlt_arm_cma230_rom.mlt +++ b/packages/hal/arm/cma230/current/include/pkgconf/mlt_arm_cma230_rom.mlt @@ -1,7 +1,8 @@ version 0 -region ram 400 200000 0 ! +region ram 0 200000 0 ! region rom e000000 40000 1 ! -section data 0 1 1 1 1 1 0 0 400 bss ! +section reserved 1000 1 0 0 1 1 1 0 0 0 data ! +section data 0 1 1 1 0 1 0 0 bss ! section bss 0 4 0 1 0 0 0 0 ! section rom_vectors 0 1 0 1 1 1 1 1 e000000 e000000 text text ! section text 0 1 0 1 0 1 0 1 fini fini !
--- a/packages/hal/arm/cma230/current/src/hal_diag.c +++ b/packages/hal/arm/cma230/current/src/hal_diag.c @@ -59,7 +59,7 @@ // Assumption: all diagnostic output must be GDB packetized unless this is a ROM (i.e. // totally stand-alone) system. -#ifdef CYG_HAL_STARTUP_ROM +#if defined(CYG_HAL_STARTUP_ROM) || defined(CYGDBG_HAL_DIAG_DISABLE_GDB_PROTOCOL) #define HAL_DIAG_USES_HARDWARE #endif
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/edb7xxx/current/ChangeLog @@ -0,0 +1,304 @@ +1999-11-19 Gary Thomas <gthomas@cygnus.co.uk> + + * include/pkgconf/hal_arm_edb7xxx.h: Fix bogus comment. + + * misc/STUBS_config: Change variable name to reflect usage. + EDB7x11 => EDB7xxx. + +1999-11-18 Gary Thomas <gthomas@cygnus.co.uk> + + * include/pkgconf/mlt_arm_cl7111_rom.mlt: + * include/pkgconf/mlt_arm_cl7111_rom.ldi: + * include/pkgconf/mlt_arm_cl7111_ram.mlt: + * include/pkgconf/mlt_arm_cl7111_ram.ldi: New [more complete] layout. + + * include/pkgconf/mlt_arm_cl7111_rom.h: + * include/pkgconf/mlt_arm_cl7111_ram.h: New file(s). + +1999-11-15 Gary Thomas <gthomas@cygnus.co.uk> + + The great renaming. All platform references are now EDB7xxx, except + for CL7111 (archaic) which remains. This required renaming of the + whole directory, along with many internal files. + +1999-11-12 Gary Thomas <gthomas@cygnus.co.uk> + + * tests/dram_test.c: Make more generic (no platform dependencies). + + * src/cl7211_misc.c (hal_clock_reset): Implement "bus idle" code + which helps with DRAM refresh problem. + + * include/plf_stub.h (HAL_STUB_PLATFORM_RESET): Add reset support. + +1999-11-11 Gary Thomas <gthomas@cygnus.co.uk> + + * tests/dram_test.c (dram_exercise): Use MLT constants to define + set of memory to be tested. Make stack size HAL defined. + This test is nearly ready to be promoted to a system-wide test. + + * include/hal_platform_setup.h (DRAM_LA_END): Adjust to accurately + convey end of usable RAM (leave out MMU tables, etc). + +1999-11-09 Gary Thomas <gthomas@cygnus.co.uk> + + * src/hal_diag.c: Fix stupid CPP error. + + * include/pkgconf/mlt_arm_eb7211_ram.ldi: + * include/pkgconf/mlt_arm_eb7211_ram.mlt: + * include/pkgconf/mlt_arm_eb7211_rom.ldi: + * include/pkgconf/mlt_arm_eb7211_rom.mlt: Correct memory layout. + +1999-11-05 Gary Thomas <gthomas@cygnus.co.uk> + + * src/hal_diag.c: Incorporate option to force raw diagnostic + I/O (no GDB protocol). + +1999-11-03 Gary Thomas <gthomas@cygnus.co.uk> + + * include/pkgconf/hal_arm_cl7211.h: Change default clock speed + to 36MHz with no software DRAM refresh (hardware is stable with + this combo). + +1999-10-27 Gary Thomas <gthomas@cygnus.co.uk> + + * src/cl7211_misc.c (enable_FIQ): New function. Used to re-enable + FIQ interrupts during DRAM refresh code. + + * include/pkgconf/mlt_arm_eb7211_stubs.h: + * include/pkgconf/mlt_arm_eb7211_rom.h: + * include/pkgconf/mlt_arm_eb7211_ram.h: New files. + + * include/pkgconf/mlt_arm_eb7211_rom.ldi: + * include/pkgconf/mlt_arm_eb7211_ram.ldi: + * include/pkgconf/mlt_arm_eb7211_stubs.ldi: + * include/pkgconf/mlt_arm_eb7211_ram.mlt: + * include/pkgconf/mlt_arm_eb7211_rom.mlt: + * include/pkgconf/mlt_arm_eb7211_stubs.mlt: Update for new layout + which describes physical regions completely. + +1999-10-27 Jesper Skov <jskov@cygnus.co.uk> + + * src/hal_diag.c: Fixed conditional include. + +1999-10-26 Hugo Tyson <hmt@cygnus.co.uk> + + * src/hal_diag.c (hal_diag_write_char): Use new macro + CYG_HAL_GDB_ENTER_CRITICAL_IO_REGION and its mate to control + stepping through gdb $O packet output. + +1999-10-25 Gary Thomas <gthomas@cygnus.co.uk> + + * tests/PKGconf.mak: Add DRAM test program. + + * tests/dram_test.c: New file. + + * include/hal_platform_setup.h: Fix DRAM mapping (was slightly + incorrect at end of first DRAM chip). + +1999-10-04 Gary Thomas <gthomas@cygnus.co.uk> + * src/cl7211_misc.c (hal_hardware_init): Update hardware timings. + + * include/hal_platform_setup.h: Allow ROM applications to be linked + at "ram" addresses and be automatically relocated at startup time. + +1999-09-15 Gary Thomas <gthomas@cygnus.co.uk> + + * misc/lcd_panel_support.c (lcd_panel_server): Reorg sampling + loop to use a weighted average (try and avoid bad results). + + * misc/kbd_test.c (kbd_exercise): Use new kbd_getc() function. + + * misc/kbd_support.c (kbd_getc): New function. + + * misc/lcd_support.c: Add simple printf() code. + +1999-09-13 Gary Thomas <gthomas@cygnus.co.uk> + + * include/pkgconf/mlt_arm_eb7211_ram.ldi: + * include/pkgconf/mlt_arm_eb7211_ram.mlt: Fix DRAM limits. + +1999-09-12 Gary Thomas <gthomas@cygnus.co.uk> + + * misc/kbd_support.c: New file. Also change to more or less + ignore interrupts since they don't work for many keys! + + * misc/kbd_test.c: Move keyboard support routines to separate + file. + +1999-09-10 Gary Thomas <gthomas@cygnus.co.uk> + + * include/hal_platform_setup.h: Fix spelling error. + +1999-09-08 Gary Thomas <gthomas@cygnus.co.uk> + + * misc/panel_test.c: Trick for these interrupts is that they + only happen when the drive is 0x70. + + * misc/kbd_test.c: Found trick to get interrupts - need to leave + columns hot! + + * include/pkgconf/mlt_arm_eb7211_rom.mlt: + * include/pkgconf/mlt_arm_eb7211_rom.ldi: Change RAM layout. + + * include/hal_platform_setup.h: Made ROM segment #1 non-cacheable. + + * misc/kbd_test.c: New test for ASCII keyboard. Interrupts + not yet working. + + * misc/panel_test.c: Fix panel driving code. Can now read + panel samples, but no interrupts. + + * src/cl7211_misc.c: Add missing clear for keyboard interrupt. + +1999-09-06 Gary Thomas <gthomas@cygnus.co.uk> + + * misc/PKGconf.mak (PROGS): Add new test. + + * misc/panel_test.c: New file. Test code for LCD touch panel. + + * misc/lcd_support.c: New file. + + * misc/lcd_test.c: Move LCD driving code to 'lcd_support.c' so it + can be shared. + +1999-09-03 Gary Thomas <gthomas@cygnus.co.uk> + + * misc/lcd_test.c (lcd_drawc): Correct drawing of larger characters. + + * misc/PKGconf.mak: Make LCD test program for all platforms. + + * include/pkgconf/mlt_arm_cl7211_rom.mlt: + * include/pkgconf/mlt_arm_cl7211_rom.ldi: + * include/pkgconf/mlt_arm_cl7211_ram.mlt: + * include/pkgconf/mlt_arm_cl7211_ram.ldi: 72xx has 16M by default. + + * misc/PKGconf.mak: Remove extra [left over] step in make. + +1999-09-02 Jonathan Larmour <jlarmour@cygnus.co.uk> + + * misc/PKGconf.mak: Use correct EXEEXT for gdb_module program. + +1999-09-02 Gary Thomas <gthomas@cygnus.co.uk> + + * support/io.c (uspin): Change timing - ugly. + + * src/cl7211_misc.c: Disable out BATLOW testing code. + + * include/hal_platform_setup.h: Better setup when LCD is installed. + + * include/pkgconf/hal_arm_cl7211.h: Make LCD installed by default. + + * misc/lcd_test.c: Rework for larger ALPS unit. Also make characters + twice as big (so there's a chance at seeing them!) + +1999-08-16 John Dallaway <jld@cygnus.co.uk> + + * include/pkgconf/hal_arm_cl7211.h: + + Proper case various display strings. + +1999-07-28 Gary Thomas <gthomas@cygnus.co.uk> + + * misc/STUBS_config: Update for latest hal.h. Also add way to + specify platform (second parameter). + +1999-07-14 Hugo Tyson <hmt@cygnus.co.uk> + + * include/hal_cache.h (HAL_UCACHE_LINE_SIZE): Correct the comment + and the value: this is supposed to be in bytes. + +1999-06-22 Gary Thomas <gthomas@cygnus.co.uk> + + * src/cl7211_misc.c (hal_IRQ_handler): Remove some debug code. + Add simple handler for battery low to test FIQ support. + +1999-06-18 Gary Thomas <gthomas@cygnus.co.uk> + + * src/plf_stub.c: + * src/hal_diag.c: Use pkgconf derived platform include file. + + * src/cl7211_misc.c (hal_hardware_init): + * include/pkgconf/hal_arm_cl7211.h: Add configuration control for + CPU processor speed. Default to 73.728 MHz. + +1999-06-17 Gary Thomas <gthomas@cygnus.co.uk> + + * include/hal_platform_setup.h (MAP_DRAM): 16M layout was wrong. + +1999-06-16 Gary Thomas <gthomas@cygnus.co.uk> + + * src/hal_diag.c: Clean up. + + * include/hal_platform_setup.h (PLATFORM_SETUP1): + Better MMU initialization for IO segments. + (PLATFORM_SETUP1): Add mappings for expansion I/O. + + * src/cl7211_misc.c (hal_hardware_init): Turn on DIAG LED. + + * include/hal_cl7211.h: Add LED flasher definitions. + +1999-06-15 Gary Thomas <gthomas@cygnus.co.uk> + + * misc/prog_flash.c: Massive rewrite/upgrade to handle Intel + parts that are on the 7211, as well as the ATMEL parts on 7111. + This program should work for either and gives a good example + of how to access/program/erase the FLASH. + + * include/hal_platform_setup.h (CYGHWR_HAL_ARM_HAS_MMU): Define. + + * misc/PKGconf.mak (gdb_module.img): + * include/pkgconf/mlt_arm_cl7211_stubs.mlt: + * include/pkgconf/mlt_arm_cl7211_stubs.ldi: Support to allow + stubs to be the startup application (GDB on board). + +1999-06-14 Gary Thomas <gthomas@cygnus.co.uk> + + * include/hal_cache.h: Turn on FLUSH macros. + +1999-06-11 Gary Thomas <gthomas@cygnus.co.uk> + + * include/hal_cache.h: Update with new unified cache support. + +1999-06-09 Gary Thomas <gthomas@cygnus.co.uk> + + * include/hal_platform_setup.h (PLATFORM_SETUP1): Remove debug code. + + * include/pkgconf/hal_arm_cl7211.h: Add new configuration options. + DRAM size (currently 2M and 16M supported). + LCD installed? + + * include/hal_platform_setup.h: Reorganize to support configuration + of DRAM size and LCD installed. + +1999-05-21 Gary Thomas <gthomas@cygnus.co.uk> + + * include/pkgconf/hal_arm_cl7211.h: New configury to support + multiple versions of CLxx11. + +1999-05-20 Gary Thomas <gthomas@cygnus.co.uk> + + * include/pkgconf/hal_arm_cl7211.h: Move RTC setup here. + +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//===========================================================================
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/edb7xxx/current/include/hal_cache.h @@ -0,0 +1,307 @@ +#ifndef CYGONCE_HAL_CACHE_H +#define CYGONCE_HAL_CACHE_H + +//============================================================================= +// +// hal_cache.h +// +// HAL cache control API +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg, gthomas +// Contributors: nickg, gthomas +// Date: 1998-09-28 +// Purpose: Cache control API +// Description: The macros defined here provide the HAL APIs for handling +// cache control operations. +// Usage: +// #include <cyg/hal/hal_cache.h> +// ... +// +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include <cyg/infra/cyg_type.h> +#include <cyg/hal/hal_mmu.h> + +//----------------------------------------------------------------------------- +// Cache dimensions + +#define HAL_UCACHE_SIZE 0x2000 // Size of data cache in bytes +#define HAL_UCACHE_LINE_SIZE 16 // Size of a data cache line +#define HAL_UCACHE_WAYS 4 // Associativity of the cache +#define HAL_UCACHE_SETS (HAL_UCACHE_SIZE/(HAL_UCACHE_LINE_SIZE*HAL_UCACHE_WAYS)) + +#define HAL_CACHE_UNIFIED // Let programs know the caches are combined + +//----------------------------------------------------------------------------- +// Global control of caches + +// Note: the 'mrc' doesn't seem to work. +#if 0 +// Enable the data cache +// mrc MMU_CP,0,r1,MMU_Control,c0 +// orr r1,r1,#MMU_Control_C|MMU_Control_B +// mcr MMU_CP,0,r1,MMU_Control,c0 + +#define HAL_UCACHE_ENABLE() \ +{ \ + asm volatile ("mrc p15,0,r1,c1,c0;" \ + "orr r1,r1,#0x000C;" \ + "mcr p15,0,r1,c1,c0;" \ + : \ + : \ + : "r1" /* Clobber list */ \ + ); \ + \ +} + +// Disable the data cache +#define HAL_UCACHE_DISABLE() \ +{ \ + asm volatile ("mrc p15,0,r1,c1,c0;" \ + "bic r1,r1,#0x000C;" \ + "mcr p15,0,r1,c1,c0;" \ + : \ + : \ + : "r1" /* Clobber list */ \ + ); \ + \ +} +#else +#define HAL_UCACHE_ENABLE() \ +{ \ + asm volatile ("mov r1,#0x7D;" \ + "mcr p15,0,r1,c1,c0;" \ + : \ + : \ + : "r1" /* Clobber list */ \ + ); \ + \ +} + +// Disable the data cache +#define HAL_UCACHE_DISABLE() \ +{ \ + asm volatile ("mov r1,#0x71;" \ + "mcr p15,0,r1,c1,c0;" \ + : \ + : \ + : "r1" /* Clobber list */ \ + ); \ + \ +} +#endif + +// Is the cache turned on? +#define HAL_UCACHE_IS_ENABLED(_state_) _state_ = 1; + +// Invalidate the entire cache +// mcr MMU_CP,0,r1,MMU_InvalidateCache,c0 +#define HAL_UCACHE_INVALIDATE_ALL() \ +{ \ + asm volatile ("mcr p15,0,r1,c7,c0,0;" ); \ + \ +} + +// Synchronize the contents of the cache with memory. +#define HAL_UCACHE_SYNC() \ +{ \ + cyg_uint32 *ROM = (cyg_uint32 *)0xE0000000; \ + int i; \ + volatile cyg_uint32 val; \ + for (i = 0; i < HAL_UCACHE_SETS; i++) { \ + val = *ROM; \ + ROM += HAL_UCACHE_LINE_SIZE; \ + } \ +} + +// Purge contents of data cache +#define HAL_UCACHE_PURGE_ALL() HAL_UCACHE_INVALIDATE_ALL() + +// Set the data cache refill burst size +//#define HAL_UCACHE_BURST_SIZE(_size_) + +// Set the data cache write mode +//#define HAL_UCACHE_WRITE_MODE( _mode_ ) + +//#define HAL_UCACHE_WRITETHRU_MODE 0 +//#define HAL_UCACHE_WRITEBACK_MODE 1 + +// Load the contents of the given address range into the data cache +// and then lock the cache so that it stays there. +//#define HAL_UCACHE_LOCK(_base_, _size_) + +// Undo a previous lock operation +//#define HAL_UCACHE_UNLOCK(_base_, _size_) + +// Unlock entire cache +//#define HAL_UCACHE_UNLOCK_ALL() + +//----------------------------------------------------------------------------- +// Data cache line control + +// Allocate cache lines for the given address range without reading its +// contents from memory. +//#define HAL_UCACHE_ALLOCATE( _base_ , _size_ ) + +// Write dirty cache lines to memory and invalidate the cache entries +// for the given address range. +#define HAL_UCACHE_FLUSH( _base_ , _size_ ) HAL_UCACHE_SYNC() + +// Invalidate cache lines in the given range without writing to memory. +//#define HAL_UCACHE_INVALIDATE( _base_ , _size_ ) + +// Write dirty cache lines to memory for the given address range. +#define HAL_UCACHE_STORE( _base_ , _size_ ) HAL_UCACHE_SYNC() + +// Preread the given range into the cache with the intention of reading +// from it later. +//#define HAL_UCACHE_READ_HINT( _base_ , _size_ ) + +// Preread the given range into the cache with the intention of writing +// to it later. +//#define HAL_UCACHE_WRITE_HINT( _base_ , _size_ ) + +// Allocate and zero the cache lines associated with the given range. +//#define HAL_UCACHE_ZERO( _base_ , _size_ ) + +//----------------------------------------------------------------------------- +// Global control of data cache + +#define HAL_DCACHE_SIZE HAL_UCACHE_SIZE +#define HAL_DCACHE_LINE_SIZE HAL_UCACHE_LINE_SIZE +#define HAL_DCACHE_WAYS HAL_UCACHE_WAYS +#define HAL_DCACHE_SETS HAL_UCACHE_SETS + +// Enable the data cache +#define HAL_DCACHE_ENABLE() HAL_UCACHE_ENABLE() + +// Disable the data cache +#define HAL_DCACHE_DISABLE() HAL_UCACHE_DISABLE() + +// Invalidate the entire cache +#define HAL_DCACHE_INVALIDATE_ALL() HAL_UCACHE_INVALIDATE_ALL() + +// Synchronize the contents of the cache with memory. +#define HAL_DCACHE_SYNC() HAL_UCACHE_SYNC() + +// Query the state of the data cache +#define HAL_DCACHE_IS_ENABLED(_state_) HAL_UCACHE_IS_ENABLED(_state_) + +// Set the data cache refill burst size +//#define HAL_DCACHE_BURST_SIZE(_size_) + +// Set the data cache write mode +//#define HAL_DCACHE_WRITE_MODE( _mode_ ) + +//#define HAL_DCACHE_WRITETHRU_MODE 0 +//#define HAL_DCACHE_WRITEBACK_MODE 1 + +// Load the contents of the given address range into the data cache +// and then lock the cache so that it stays there. +//#define HAL_DCACHE_LOCK(_base_, _size_) + +// Undo a previous lock operation +//#define HAL_DCACHE_UNLOCK(_base_, _size_) + +// Unlock entire cache +//#define HAL_DCACHE_UNLOCK_ALL() + +//----------------------------------------------------------------------------- +// Data cache line control + +// Allocate cache lines for the given address range without reading its +// contents from memory. +//#define HAL_DCACHE_ALLOCATE( _base_ , _size_ ) + +// Write dirty cache lines to memory and invalidate the cache entries +// for the given address range. +#define HAL_DCACHE_FLUSH( _base_ , _size_ ) HAL_UCACHE_FLUSH( _base_ , _size_ ) + +// Invalidate cache lines in the given range without writing to memory. +//#define HAL_DCACHE_INVALIDATE( _base_ , _size_ ) + +// Write dirty cache lines to memory for the given address range. +#define HAL_DCACHE_STORE( _base_ , _size_ ) HAL_UCACHE_STORE( _base_ , _size_ ) + +// Preread the given range into the cache with the intention of reading +// from it later. +//#define HAL_DCACHE_READ_HINT( _base_ , _size_ ) + +// Preread the given range into the cache with the intention of writing +// to it later. +//#define HAL_DCACHE_WRITE_HINT( _base_ , _size_ ) + +// Allocate and zero the cache lines associated with the given range. +//#define HAL_DCACHE_ZERO( _base_ , _size_ ) + +//----------------------------------------------------------------------------- +// Global control of Instruction cache - use Data cache controls since they +// are not separatable. + +#define HAL_ICACHE_SIZE HAL_UCACHE_SIZE +#define HAL_ICACHE_LINE_SIZE HAL_UCACHE_LINE_SIZE +#define HAL_ICACHE_WAYS HAL_UCACHE_WAYS +#define HAL_ICACHE_SETS HAL_UCACHE_SETS + +// Enable the instruction cache +#define HAL_ICACHE_ENABLE() HAL_UCACHE_ENABLE() + +// Disable the instruction cache +#define HAL_ICACHE_DISABLE() HAL_UCACHE_DISABLE() + +// Invalidate the entire cache +#define HAL_ICACHE_INVALIDATE_ALL() HAL_UCACHE_INVALIDATE_ALL() + +// Synchronize the contents of the cache with memory. +#define HAL_ICACHE_SYNC() HAL_UCACHE_SYNC() + +// Set the instruction cache refill burst size +//#define HAL_ICACHE_BURST_SIZE(_size_) + +// Load the contents of the given address range into the instruction cache +// and then lock the cache so that it stays there. +//#define HAL_ICACHE_LOCK(_base_, _size_) + +// Undo a previous lock operation +//#define HAL_ICACHE_UNLOCK(_base_, _size_) + +// Unlock entire cache +//#define HAL_ICACHE_UNLOCK_ALL() + +//----------------------------------------------------------------------------- +// Instruction cache line control + +// Invalidate cache lines in the given range without writing to memory. +//#define HAL_ICACHE_INVALIDATE( _base_ , _size_ ) + +//----------------------------------------------------------------------------- +#endif // ifndef CYGONCE_HAL_CACHE_H +// End of hal_cache.h
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/edb7xxx/current/include/hal_diag.h @@ -0,0 +1,67 @@ +#ifndef CYGONCE_HAL_DIAG_H +#define CYGONCE_HAL_DIAG_H + +/*============================================================================= +// +// hal_diag.h +// +// HAL Support for Kernel Diagnostic Routines +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg, gthomas +// Contributors: nickg, gthomas +// Date: 1998-09-11 +// Purpose: HAL Support for Kernel Diagnostic Routines +// Description: Diagnostic routines for use during kernel development. +// Usage: #include <cyg/hal/hal_diag.h> +// +//####DESCRIPTIONEND#### +// +//===========================================================================*/ + +#include <pkgconf/hal.h> + +#include <cyg/infra/cyg_type.h> + +/*---------------------------------------------------------------------------*/ +/* functions implemented in hal_diag.c */ + +externC void hal_diag_init(void); +externC void hal_diag_write_char(char c); +externC void hal_diag_read_char(char *c); + +/*---------------------------------------------------------------------------*/ + +#define HAL_DIAG_INIT() hal_diag_init() + +#define HAL_DIAG_WRITE_CHAR(_c_) hal_diag_write_char(_c_) + +#define HAL_DIAG_READ_CHAR(_c_) hal_diag_read_char(&_c_) + +/*---------------------------------------------------------------------------*/ +/* end of hal_diag.h */ +#endif /* CYGONCE_HAL_DIAG_H */
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/edb7xxx/current/include/hal_edb7xxx.h @@ -0,0 +1,260 @@ +#ifndef CYGONCE_HAL_EDB7XXX_H +#define CYGONCE_HAL_EDB7XXX_H + +/*============================================================================= +// +// hal_edb7xxx.h +// +// HAL Support for Kernel Diagnostic Routines +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 1999-04-19 +// Purpose: Cirrus Logic EDB7XXX hardware description +// Description: +// Usage: #include <cyg/hal/hal_edb7xxx.h> +// +//####DESCRIPTIONEND#### +// +//===========================================================================*/ + +// Note: these defintions match the documentation, thus no attempt is made +// to sanitize (mangle) the names. Also, care should be taken to keep this +// clean for use in assembly code (no "C" constructs). + +#define PADR 0x80000000 // Port A data register +#define PBDR 0x80000001 // Port B data register +#define PDDR 0x80000003 // Port D data register +#define PADDR 0x80000040 // Port A data direction register +#define PBDDR 0x80000041 // Port B data direction register +#define PDDDR 0x80000043 // Port D data direction register +#define PEDR 0x80000080 // Port E data register +#define PEDDR 0x800000C0 // Port E data direction register + +#define SYSCON1 0x80000100 // System control register #1 +#define SYSCON1_KBD_CTL 0xF // Keyboard scan - mask +#define SYSCON1_KBD_HIGH 0 // Keyboard scan - all columns high +#define SYSCON1_KBD_LOW 1 // Keyboard scan - all columns low +#define SYSCON1_KBD_TRISTATE 2 // Keyboard scan - all columns tri-state +#define SYSCON1_KBD_COL(n) (n+8)// Keyboard scan - select column 'n' +#define SYSCON1_TC1M (1<<4) // Timer/counter #1 - prescale mode +#define SYSCON1_TC1S (1<<5) // Timer/counter #1 - source (1=512KHz,0=2KHz) +#define SYSCON1_TC2M (1<<6) // Timer/counter #2 - prescale mode +#define SYSCON1_TC2S (1<<7) // Timer/counter #2 - source (1=512KHz,0=2KHz) +#define SYSCON1_UART1EN (1<<8) // UART #1 enable +#define SYSCON1_BZTOG (1<<9) // Buzzer bit +#define SYSCON1_BZMOD (1<<10) // Buzzer mode (0=direct,1=TC1) +#define SYSCON1_DBGEN (1<<11) // Enable debug mode +#define SYSCON1_LCDEN (1<<12) // Enable LCD +#define SYSCON1_CDENTX (1<<13) // Enable Tx on CODEC +#define SYSCON1_CDENRX (1<<14) // Enable Rx on CODEC +#define SYSCON1_SIREN (1<<15) // Enable SIR protocol on UART #1 +#define SYSCON1_ADCKSEL (3<<16) // Microwire clock +#define SYSCON1_ADC_CLOCK_4kHZ (0<<16) +#define SYSCON1_ADC_CLOCK_16kHZ (1<<16) +#define SYSCON1_ADC_CLOCK_64kHZ (2<<16) +#define SYSCON1_ADC_CLOCK_128kHZ (3<<16) +#define SYSCON1_EXCKEN (1<<18) // External expansion clock enable +#define SYSCON1_WAKEDIS (1<<19) // Disable wakeup from snooze (do not disturb) +#define SYSCON1_IRTXM (1<<20) // IrDA Tx mode + +#define SYSCON2 0x80001100 // System control register #2 +#define SYSCON2_SERSEL (1<<0) // 0=master/slave SSI, 1=CODEC +#define SYSCON2_KBD6 (1<<1) // 0=8 bit keyboard, 1=6 bit +#define SYSCON2_DRAMSZ (1<<2) // DRAM width 0=32, 1=16 +#define SYSCON2_KBWEN (1<<3) // 1=allow wake up from keyboard +#define SYSCON2_SS2TXEN (1<<4) // Enable Tx on SS2 +#define SYSCON2_PCMCIA1 (1<<5) // Enable PCMCIA slot #1 +#define SYSCON2_PCMCIA2 (1<<6) // Enable PCMCIA slot #2 +#define SYSCON2_SS2RXEN (1<<7) // Enable Rx on SS2 +#define SYSCON2_UART2EN (1<<8) // Enable UART #2 +#define SYSCON2_SS2MAEN (1<<9) // Enable master mode on SS2 +#define SYSCON2_SNZPOL (1<<10) // Polarity of LCD during snooze +#define SYSCON2_LCDSNZE (1<<11) +#define SYSCON2_OSTB (1<<12) // Operating system timing 0=512KHz, 1=500KHz +#define SYSCON2_CLKENSL (1<<13) // Source of run/clken signal 0=CLKEN, 1=RUN +#define SYSCON2_BUZFREQ (1<<14) // Buzzer frequency 0=timer, 1=fixed PLL/xtal + +#define SYSCON3 0x80002200 // System control #3 +#define SYSCON3_ADCCON (1<<0) // ADC enable +#define SYSCON3_CLKCTL(n) (n<<1) // Processor block speed ((n+1)*18.432)MHz + +#define SYSFLG1 0x80000140 // System flags #1 +#define SYSFLG1_MCDR (1<<0) // Media changed - direct read +#define SYSFLG1_DCDET (1<<1) // 0=mains power, 1=battery +#define SYSFLG1_WUDR (1<<2) // Wakeup direct +#define SYSFLG1_WUON (1<<3) // Woken up +#define SYSFLG1_DID (0xF<<4) // Display ID +#define SYSFLG1_CTS (1<<8) // UART1 CTS +#define SYSFLG1_DSR (1<<9) // UART1 DSR +#define SYSFLG1_DCD (1<<10) // UART1 DCD +#define SYSFLG1_UBUSY1 (1<<11) // UART1 Tx busy +#define SYSFLG1_NBFLG (1<<12) // New battery flag +#define SYSFLG1_RSTFLG (1<<13) // Reset (button) flag +#define SYSFLG1_PFFLG (1<<14) // Power fail flag +#define SYSFLG1_CLDFLG (1<<15) // Cold start flag +#define SYSFLG1_RTCDIV (0x3F<<16) // Real time clock divider (counter) +#define SYSFLG1_URXFE1 (1<<22) // UART1 Rx FIFO empty +#define SYSFLG1_UTXFF1 (1<<23) // UART1 Tx FIFO full +#define SYSFLG1_CRXFE (1<<24) // CODEC Rx FIFO empty +#define SYSFLG1_CTXFF (1<<25) // CODEC Tx FIFO full +#define SYSFLG1_SSIBUSY (1<<26) // Synchronous serial interface busy +#define SYSFLG1_BOOTBITS (3<<27) // Boot mode (0=32,1=8,2=16,3=XX) +#define SYSFLG1_ID (1<<29) // ID=1 +#define SYSFLG1_VERID (3<<30) // Board version + +#define SYSFLG2 0x80001140 // System flags #2 + +#define INTSR1 0x80000240 // Interrupt status register #1 +#define INTSR1_EXTFIQ (1<<0) // External fast interrupt +#define INTSR1_BLINT (1<<1) // Battery low interrupt +#define INTSR1_WEINT (1<<2) // Watchdog expired interrupt +#define INTSR1_MCINT (1<<3) // Media changed interrupt +#define INTSR1_CSINT (1<<4) // CODEC sound interrupt +#define INTSR1_EINT1 (1<<5) // External interrupt #1 +#define INTSR1_EINT2 (1<<6) // External interrupt #2 +#define INTSR1_EINT3 (1<<7) // External interrupt #3 +#define INTSR1_TC1OI (1<<8) // Timer/counter #1 underflow +#define INTSR1_TC2OI (1<<9) // Timer/counter #2 underflow +#define INTSR1_RTCMI (1<<10) // Real time clock match +#define INTSR1_TINT (1<<11) // 64Hz tick +#define INTSR1_UTXINT1 (1<<12) // UART1 Tx interrupt +#define INTSR1_URXINT1 (1<<13) // UART1 Rx interrupt +#define INTSR1_UMSINT (1<<14) // UART1 modem line change +#define INTSR1_SSEOTI (1<<15) // Synchronous serial end of transfer +#define INTMR1 0x80000280 // Interrupt mask register #1 + +#define INTSR2 0x80001240 // Interrupt status #2 +#define INTSR2_KBDINT (1<<0) // Keyboard interrupt +#define INTSR2_SS2RX (1<<1) // Synchronous serial #2 Rx +#define INTSR2_SS2TX (1<<2) // Synchronous serial #2 Tx +#define INTSR2_UTXINT2 (1<<12) // UART #2 Tx interrupt +#define INTSR2_URXINT2 (1<<13) // UART #2 Rx interrupt +#define INTMR2 0x80001280 // Interrupt mask #2 + +#define INTSR3 0x80002240 // Interrupt status #3 +#if defined(__EDB7211) +#define INTSR3_MCPINT (1<<0) // MCP interrupt +#endif +#define INTMR3 0x80002280 // Interrupt mask #3 + +#define UARTDR1 0x80000480 // UART #1 data register +#define UARTDR2 0x80001480 // UART #2 data register +#define UBLCR1 0x800004C0 // UART #1 baud rate / line control +#define UBLCR2 0x800014C0 // UART #2 baud rate / line control +#define UBLCR_BRDV 0xFFF // Baud rate +#define UBLCR_BREAK (1<<12) // Generate break signal +#define UBLCR_PRTEN (1<<13) // Enable parity +#define UBLCR_EVENPRT (1<<14) // 1=even parity, 0=odd +#define UBLCR_XSTOP (1<<15) // 0=1 stop bit, 1=2 stop bits +#define UBLCR_FIFOEN (1<<16) // Enable Tx/Rx FIFOs +#define UBLCR_WRDLEN (3<<17) // Word (character) length field +#define UBLCR_WRDLEN5 (0<<17) +#define UBLCR_WRDLEN6 (1<<17) +#define UBLCR_WRDLEN7 (2<<17) +#define UBLCR_WRDLEN8 (3<<17) +#define UART_DIVISOR 230400 +#define UART_BITRATE(baud) ((UART_DIVISOR/(baud))-1) + +#define MEMCFG1 0x80000180 // Memory configuration register #1 +#define MEMCFG2 0x800001C0 // Memory configuration register #2 + +#define DRFPR 0x80000200 // DRAM refresh period + +#define LCDCON 0x800002C0 // LDC control +#define LCDCON_BUFSIZ 0x00001FFF // Video buffer size +#define LCDCON_BUFSIZ_S 0 // Position of buffer size +#define LCDCON_LINE_LENGTH 0x0007E000 // Line length +#define LCDCON_LINE_LENGTH_S 13 // Position of line length +#define LCDCON_PIX_PRESCALE 0x01F80000 // Pixel prescale value +#define LCDCON_PIX_PRESCALE_S 19 // Position of prescale value +#define LCDCON_AC_PRESCALE 0x3E000000 // LCD AC bias frequency +#define LCDCON_AC_PRESCALE_S 25 // Position to AC bias +#define LCDCON_GSEN 0x40000000 // Enable greyscale +#define LCDCON_GSMD 0x80000000 // Greyscale mode + // 00 - 1bpp, 01 - 2bpp, 11 - 4 bpp + +#define TC1D 0x80000300 // Timer/Counter #1 register +#define TC2D 0x80000340 // Timer/Counter #2 register +#define RTCDR 0x80000380 // Real time clock data register +#define RTCMR 0x800003C0 // Real time clock match register + +#define PMPCON 0x80000400 // DC-DC pump control + +#define CODR 0x80000440 // CODEC data register + +#define SYNCIO 0x80000500 // Synchronous I/O data register + +#define PALLSW 0x80000540 // LCD palette - LSW (Pixel values 0..7) +#define PALMSW 0x80000580 // LCD palette - MSW (Pixel values 8..15) + +#define STFCLR 0x800005C0 // Clear startup reason flags +#define BLEOI 0x80000600 // Clear battery low interrupt +#define MCEOI 0x80000640 // Clear media changed interrupt +#define TEOI 0x80000680 // Clear tick/watchdog interrupt +#define TC1EOI 0x800006C0 // Clear timer/counter #1 interrupt +#define TC2EOI 0x80000700 // Clear timer/counter #2 interrupt +#define RTCEOI 0x80000740 // Clear real time clock interrupt +#define UMSEOI 0x80000780 // Clear UART modem status change interrupt +#define COEOI 0x800007C0 // Clear CODEC sound interrupt + +#define HALT 0x80000800 // Enter 'idle' state +#define STDBY 0x80000840 // Enter 'standby' state + +#define FRBADDR 0x80001000 // LCD frame buffer start + +#define SNZDISP 0x800012C0 // Snooze display size + +#define SS2DR 0x80001500 // Master/slave SSI2 register + +#define SRXEOF 0x80001600 // Clear Rx FIFO overflow flag +#define SS2POP 0x800016C0 // Pop SSI2 residual byte into FIFO + +#define KBDEOI 0x80001700 // Clear keyboard interrupt + +#define SNOOZE 0x80001800 // Enter 'snooze' state + +#if defined(__EDB7211) +#define MCCR 0x80002000 // MCP control register +#define MCDR0 0x80002040 // MCP data register #0 +#define MCDR1 0x80002080 // MCP data register #1 +#define MCDR2 0x800020C0 // MCP data register #2 +#define MCSR 0x80002100 // MCP status register +#endif + + +#define LEDFLSH 0x800022C0 // LED flash control +#define LEDFLSH_ENABLE (1<<6) // LED enabled +#define LEDFLSH_DUTY(n) ((n-1)<<2) // LED on ratio +#define LEDFLSH_PERIOD(n) (n-1) // LED active time (1..4) + +#define KBD_PORT 0x30010000 // Extra 8 bits of keyboard data + +/*---------------------------------------------------------------------------*/ +/* end of hal_edb7xxx.h */ +#endif /* CYGONCE_HAL_EDB7XXX_H */
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/edb7xxx/current/include/hal_platform_ints.h @@ -0,0 +1,85 @@ +#ifndef CYGONCE_HAL_PLATFORM_INTS_H +#define CYGONCE_HAL_PLATFORM_INTS_H +//========================================================================== +// +// hal_platform_ints.h +// +// HAL Interrupt and clock support +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 1999-04-21 +// Purpose: Define Interrupt support +// Description: The interrupt details for the CL7xxx are defined here. +// Usage: +// #include <cyg/hal/hal_platform_ints.h> +// ... +// +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#define CYGNUM_HAL_INTERRUPT_unused 0 +#define CYGNUM_HAL_INTERRUPT_EXTFIQ 1 +#define CYGNUM_HAL_INTERRUPT_BLINT 2 +#define CYGNUM_HAL_INTERRUPT_WEINT 3 +#define CYGNUM_HAL_INTERRUPT_MCINT 4 +#define CYGNUM_HAL_INTERRUPT_CSINT 5 +#define CYGNUM_HAL_INTERRUPT_EINT1 6 +#define CYGNUM_HAL_INTERRUPT_EINT2 7 +#define CYGNUM_HAL_INTERRUPT_EINT3 8 +#define CYGNUM_HAL_INTERRUPT_TC1OI 9 +#define CYGNUM_HAL_INTERRUPT_TC2OI 10 +#define CYGNUM_HAL_INTERRUPT_RTCMI 11 +#define CYGNUM_HAL_INTERRUPT_TINT 12 +#define CYGNUM_HAL_INTERRUPT_UTXINT1 13 +#define CYGNUM_HAL_INTERRUPT_URXINT1 14 +#define CYGNUM_HAL_INTERRUPT_UMSINT 15 +#define CYGNUM_HAL_INTERRUPT_SSEOTI 16 +#define CYGNUM_HAL_INTERRUPT_KBDINT 17 +#define CYGNUM_HAL_INTERRUPT_SS2RX 18 +#define CYGNUM_HAL_INTERRUPT_SS2TX 19 +#define CYGNUM_HAL_INTERRUPT_UTXINT2 20 +#define CYGNUM_HAL_INTERRUPT_URXINT2 21 +#if defined(__EDB7211) +#define CYGNUM_HAL_INTERRUPT_MCPINT 22 +#endif + +#define CYGNUM_HAL_ISR_MIN 0 +#if defined(__CL7111) +#define CYGNUM_HAL_ISR_MAX 21 +#else +#define CYGNUM_HAL_ISR_MAX 22 +#endif +#define CYGNUM_HAL_ISR_COUNT (CYGNUM_HAL_ISR_MAX+1) + +// The vector used by the Real time clock +#define CYGNUM_HAL_INTERRUPT_RTC CYGNUM_HAL_INTERRUPT_TC2OI + +#endif // CYGONCE_HAL_PLATFORM_INTS_H
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/edb7xxx/current/include/hal_platform_setup.h @@ -0,0 +1,422 @@ +#ifndef CYGONCE_HAL_PLATFORM_SETUP_H +#define CYGONCE_HAL_PLATFORM_SETUP_H + +/*============================================================================= +// +// hal_platform_setup.h +// +// Platform specific support for HAL (assembly code) +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 1999-04-21 +// Purpose: Cirrus EDB7XXX platform specific support routines +// Description: +// Usage: #include <cyg/hal/hal_platform_setup.h> +// +//####DESCRIPTIONEND#### +// +//===========================================================================*/ + +#include <pkgconf/system.h> // System-wide configuration info +#include CYGBLD_HAL_PLATFORM_H // Platform specific configuration +#include <cyg/hal/hal_edb7xxx.h> // Platform specific hardware definitions +#include <cyg/hal/hal_mmu.h> // MMU definitions + +#define CYGHWR_HAL_ARM_HAS_MMU // This processor has an MMU + +// +// Memory map - set up by ROM (GDB stubs) +// +// Region Logical Address Physical Address +// DRAM 0x00000000..0x00xFFFFF 0xC00x0000 (see below) +// Expansion 2 0x20000000 0x20000000 +// Expansion 3 0x30000000 0x30000000 +// PCMCIA 0 0x40000000 0x40000000 +// PCMCIA 1 0x50000000 0x50000000 +// SRAM 0x60000000..0x600007FF 0x60000000 +// I/O 0x80000000 0x80000000 +// MMU Tables 0xC00y0000 +// LCD buffer 0xC0000000..0xC001FFFF 0xC0000000 +// ROM 0xE0000000..0xEFFFFFFF 0x00000000 +// ROM 0xF0000000..0xFFFFFFFF 0x10000000 + +#ifdef CYGHWR_HAL_ARM_EDB7XXX_LCD_INSTALLED +#define LCD_BUFFER_SIZE 0x00020000 +#else +#define LCD_BUFFER_SIZE 0x00000000 +#endif +#define DRAM_PA_START 0xC0000000 +#define MMU_BASE DRAM_PA_START+LCD_BUFFER_SIZE +#define PTE_BASE DRAM_PA_START+0x4000+LCD_BUFFER_SIZE +#if (CYGHWR_HAL_ARM_EDB7XXX_DRAM_SIZE == 2) +#define MMU_TABLES_SIZE (0x4000+0x1000+0x1000) // RAM used for PTE entries +#define DRAM_LA_END (0x00200000-MMU_TABLES_SIZE-LCD_BUFFER_SIZE) +#elif (CYGHWR_HAL_ARM_EDB7XXX_DRAM_SIZE == 16) +#define MMU_TABLES_SIZE (0x4000+0x4000+0x1000) // RAM used for PTE entries +#define DRAM_LA_END (0x01000000-MMU_TABLES_SIZE-LCD_BUFFER_SIZE) +#endif +#define DRAM_LA_START 0x00000000 +#define DRAM_PA MMU_BASE+MMU_TABLES_SIZE +#define LCD_LA_START 0xC0000000 +#define LCD_LA_END 0xC0020000 +#define LCD_PA 0xC0000000 +#define ROM0_LA_START 0xE0000000 +#define ROM0_PA 0x00000000 +#define ROM0_LA_END 0xF0000000 +#define ROM1_LA_START 0xF0000000 +#define ROM1_LA_END 0x00000000 +#define ROM1_PA 0x10000000 +#define EXPANSION2_LA_START 0x20000000 +#define EXPANSION2_PA 0x20000000 +#define EXPANSION3_LA_START 0x30000000 +#define EXPANSION3_PA 0x30000000 +#define PCMCIA0_LA_START 0x40000000 +#define PCMCIA0_PA 0x40000000 +#define PCMCIA1_LA_START 0x50000000 +#define PCMCIA1_PA 0x50000000 +#define SRAM_LA_START 0x60000000 +#define SRAM_LA_END 0x60001000 +#define SRAM_PA 0x60000000 +#define IO_LA_START 0x80000000 +#define IO_LA_END 0x80003000 +#define IO_PA 0x80000000 + +// Define startup code [macros] +#if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_STUBS) + +#if (CYGHWR_HAL_ARM_EDB7XXX_DRAM_SIZE == 2) +// Note: The DRAM on this board is very irregular in that every +// other 256K piece is missing. E.g. only these [physical] +// addresses are valid: +// 0xC0000000..0xC003FFFF +// 0xC0080000..0xC00BFFFF +// 0xC0200000..0xC023FFFF Note the additional GAP! +// etc. +// 0xC0800000..0xC083FFFF Note the additional GAP! +// 0xC0880000..0xC08CFFFF +// 0xC0A00000..0xC0A3FFFF +// etc. +// The MMU mapping code takes this into consideration and creates +// a continuous logical map for the DRAM. +#define MAP_DRAM \ +/* Map DRAM */ ;\ + ldr r3,=DRAM_LA_START ;\ + ldr r4,=DRAM_LA_END ;\ + ldr r5,=DRAM_PA ;\ +/* 0x00000000..0x000FFFFF */ ;\ + mov r6,r2 /* Set up page table descriptor */ ;\ + ldr r7,=MMU_L1_TYPE_Page ;\ + orr r6,r6,r7 ;\ + str r6,[r1],#4 /* Store PTE, update pointer */ ;\ +10: mov r6,r5 /* Build page table entry */ ;\ + ldr r7,=MMU_L2_TYPE_Small|MMU_AP_Any|MMU_Bufferable|MMU_Cacheable ;\ + orr r6,r6,r7 ;\ + ldr r7,=MMU_PAGE_SIZE ;\ + str r6,[r2],#4 /* Next page */ ;\ + add r3,r3,r7 ;\ + add r5,r5,r7 ;\ + ldr r8,=DRAM_LA_START+MMU_SECTION_SIZE ;\ + cmp r3,r8 /* Done with first 1M? */ ;\ + beq 20f ;\ + ldr r7,=0x40000 /* Special check for 256K boundary */ ;\ + and r7,r7,r5 ;\ + cmp r7,#0 ;\ + beq 10b ;\ + add r5,r5,r7 /* Skip 256K hole */ ;\ + ldr r7,=0x100000 ;\ + and r7,r5,r7 ;\ + beq 10b ;\ + add r5,r5,r7 /* Nothing at 0xC0100000 */ ;\ + ldr r7,=0x400000 /* Also nothing at 0xC0400000 */ ;\ + and r7,r5,r7 ;\ + beq 10b ;\ + add r5,r5,r7 ;\ + b 10b ;\ +20: ;\ +/* 0x00100000..0x001FFFFF */ ;\ + mov r6,r2 /* Set up page table descriptor */ ;\ + ldr r7,=MMU_L1_TYPE_Page ;\ + orr r6,r6,r7 ;\ + str r6,[r1],#4 /* Store PTE, update pointer */ ;\ +10: mov r6,r5 /* Build page table entry */ ;\ + ldr r7,=MMU_L2_TYPE_Small|MMU_AP_Any|MMU_Bufferable|MMU_Cacheable ;\ + orr r6,r6,r7 ;\ + ldr r7,=MMU_PAGE_SIZE ;\ + str r6,[r2],#4 /* Next page */ ;\ + add r3,r3,r7 ;\ + cmp r3,r4 /* Done with first DRAM? */ ;\ + beq 20f ;\ + add r5,r5,r7 ;\ + ldr r7,=0x40000 /* Special check for 256K boundary */ ;\ + and r7,r7,r5 ;\ + cmp r7,#0 ;\ + beq 10b ;\ + add r5,r5,r7 /* Skip 256K hole */ ;\ + ldr r7,=0x100000 ;\ + and r7,r5,r7 ;\ + beq 10b ;\ + add r5,r5,r7 /* Nothing at 0xC0300000 */ ;\ + ldr r7,=0x400000 /* Also nothing at 0xC0400000 */ ;\ + and r7,r5,r7 ;\ + beq 10b ;\ + add r5,r5,r7 ;\ + b 10b ;\ +20: ; +#elif (CYGHWR_HAL_ARM_EDB7XXX_DRAM_SIZE == 16) +// The 16M board is arranged as: +// 0xC0000000..0xC07FFFFF +// 0xC1000000..0xC17FFFFF +#define MAP_DRAM \ +/* Map DRAM */ ;\ + ldr r3,=DRAM_LA_START ;\ + ldr r4,=DRAM_LA_END ;\ + ldr r5,=DRAM_PA ;\ +/* 0xXXX00000..0xXXXFFFFF */ ;\ +10: mov r6,r2 /* Set up page table descriptor */ ;\ + ldr r7,=MMU_L1_TYPE_Page ;\ + orr r6,r6,r7 ;\ + str r6,[r1],#4 /* Store PTE, update pointer */ ;\ + ldr r8,=MMU_SECTION_SIZE/MMU_PAGE_SIZE ;\ + ldr r9,=DRAM_PA_START+0x00800000 /* Need to skip at 8M boundary */ ;\ +12: cmp r5,r9 ;\ + bne 15f ;\ + ldr r5,=DRAM_PA_START+0x01000000 /* Next chunk of DRAM */ ;\ +15: mov r6,r5 /* Build page table entry */ ;\ + ldr r7,=MMU_L2_TYPE_Small|MMU_AP_Any|MMU_Bufferable|MMU_Cacheable ;\ + orr r6,r6,r7 ;\ + ldr r7,=MMU_PAGE_SIZE ;\ + str r6,[r2],#4 /* Next page */ ;\ + add r3,r3,r7 ;\ + add r5,r5,r7 ;\ + cmp r3,r4 /* End of DRAM? */ ;\ + beq 20f ;\ + sub r8,r8,#1 /* End of 1M section? */ ;\ + cmp r8,#0 ;\ + bne 12b /* Next page */ ;\ + b 10b /* Next section */ ;\ +20: +#else +#err Invalid DRAM size selected +#endif + +#ifdef CYG_HAL_ARM_CL7111 // CL7111, 710 processor +#define MMU_INITIALIZE \ + ldr r1,=MMU_Control_Init ;\ + mcr MMU_CP,0,r1,MMU_Control,c0 /* MMU off */ ;\ + ldr r1,=MMU_BASE ;\ + mcr MMU_CP,0,r1,MMU_Base,c0 ;\ + mcr MMU_CP,0,r1,MMU_FlushTLB,c0,0 /* Invalidate TLB */ ;\ + mcr MMU_CP,0,r1,MMU_FlushIDC,c0,0 /* Invalidate Caches */ ;\ + ldr r1,=0xFFFFFFFF ;\ + mcr MMU_CP,0,r1,MMU_DomainAccess,c0 ;\ + ldr r2,=10f ;\ + ldr r1,=MMU_Control_Init|MMU_Control_M ;\ + mcr MMU_CP,0,r1,MMU_Control,c0 ;\ + mov pc,r2 /* Change address spaces */ ;\ + nop ;\ + nop ;\ + nop ;\ +10: +#else // EP7211, 720T processor +#define MMU_INITIALIZE ;\ + ldr r1,=MMU_Control_Init ;\ + mcr MMU_CP,0,r1,MMU_Control,c0 /* MMU off */ ;\ + ldr r1,=MMU_BASE ;\ + mcr MMU_CP,0,r1,MMU_Base,c0 ;\ + mcr MMU_CP,0,r1,MMU_TLB,c7,0 /* Invalidate TLB - 720 style */ ;\ + mcr MMU_CP,0,r1,MMU_FlushIDC,c0,0 /* Invalidate Caches */ ;\ + ldr r1,=0xFFFFFFFF ;\ + mcr MMU_CP,0,r1,MMU_DomainAccess,c0 ;\ + ldr r2,=10f ;\ + ldr r3,=__exception_handlers ;\ + sub r2,r2,r3 ;\ + ldr r3,=ROM0_LA_START ;\ + add r2,r2,r3 ;\ + ldr r1,=MMU_Control_Init|MMU_Control_M ;\ + mcr MMU_CP,0,r1,MMU_Control,c0 ;\ + mov pc,r2 /* Change address spaces */ ;\ + nop ;\ + nop ;\ + nop ;\ +10: +#endif + +#define PLATFORM_SETUP1 \ +/* Initialize memory configuration */ ;\ + ldr r1,=MEMCFG1 ;\ + ldr r2,=0x8200A080 /* FIXME - what is this? */ ;\ + str r2,[r1] ;\ + ldr r1,=MEMCFG2 ;\ + ldr r2,=0xFEFC0000 ;\ + str r2,[r1] ;\ + ldr r1,=DRFPR ;\ + ldr r2,=0x81 /* DRAM refresh = 64KHz */ ;\ + strb r2,[r1] ;\ +/* Initialize MMU to create new memory map */ ;\ + ldr r1,=MMU_BASE ;\ + ldr r2,=PTE_BASE ;\ + MAP_DRAM ;\ +/* Nothing until PCMCIA0 */ ;\ + ldr r3,=0x3FF /* Page tables need 2K boundary */ ;\ + add r2,r2,r3 ;\ + ldr r3,=~0x3FF ;\ + and r2,r2,r3 ;\ + ldr r3,=(DRAM_LA_END+0x000FFFFF)&0xFFF00000 ;\ + ldr r4,=EXPANSION2_LA_START ;\ + ldr r5,=MMU_L1_TYPE_Fault ;\ + ldr r7,=MMU_SECTION_SIZE ;\ +10: str r5,[r1],#4 ;\ + add r3,r3,r7 ;\ + cmp r3,r4 ;\ + bne 10b ;\ +/* EXPANSION2, EXPANSION3, PCMCIA0, PCMCIA1 */ ;\ + ldr r3,=EXPANSION2_LA_START ;\ + ldr r4,=SRAM_LA_START ;\ + ldr r5,=EXPANSION2_PA ;\ + ldr r6,=MMU_L1_TYPE_Section|MMU_AP_Any ;\ + ldr r7,=MMU_SECTION_SIZE ;\ +10: orr r0,r5,r6 ;\ + str r0,[r1],#4 ;\ + add r5,r5,r7 ;\ + add r3,r3,r7 ;\ + cmp r3,r4 ;\ + bne 10b ;\ +/* SRAM */ ;\ + ldr r3,=SRAM_LA_START ;\ + ldr r4,=MMU_L1_TYPE_Page|MMU_DOMAIN(0) ;\ + orr r4,r4,r2 ;\ + str r4,[r1],#4 ;\ + ldr r4,=MMU_L2_TYPE_Small|MMU_AP_Any|MMU_Bufferable|MMU_Cacheable ;\ + orr r4,r3,r4 ;\ + str r4,[r2],#4 ;\ + ldr r3,=SRAM_LA_START+MMU_PAGE_SIZE ;\ + ldr r4,=SRAM_LA_START+MMU_SECTION_SIZE ;\ + ldr r5,=MMU_L2_TYPE_Fault ;\ + ldr r7,=MMU_PAGE_SIZE ;\ +10: str r5,[r2],#4 ;\ + add r3,r3,r7 ;\ + cmp r3,r4 ;\ + bne 10b ;\ + ldr r4,=IO_LA_START ;\ + ldr r5,=MMU_L1_TYPE_Fault ;\ + ldr r7,=MMU_SECTION_SIZE ;\ +20: str r5,[r1],#4 ;\ + add r3,r3,r7 ;\ + cmp r3,r4 ;\ + bne 20b ;\ +/* I/O */ ;\ + ldr r3,=0x3FF /* Page tables need 2K boundary */ ;\ + add r2,r2,r3 ;\ + ldr r3,=~0x3FF ;\ + and r2,r2,r3 ;\ + ldr r4,=MMU_L1_TYPE_Page|MMU_DOMAIN(0) ;\ + orr r4,r4,r2 ;\ + str r4,[r1],#4 ;\ + ldr r3,=IO_LA_START ;\ + ldr r4,=IO_LA_END ;\ + ldr r7,=MMU_PAGE_SIZE ;\ + ldr r5,=IO_PA|MMU_L2_TYPE_Small|MMU_AP_All ;\ +10: str r5,[r2],#4 ;\ + add r5,r5,r7 ;\ + add r3,r3,r7 ;\ + cmp r3,r4 ;\ + bne 10b ;\ + ldr r4,=IO_LA_START+MMU_SECTION_SIZE ;\ + ldr r5,=MMU_L2_TYPE_Fault ;\ + ldr r7,=MMU_PAGE_SIZE ;\ +10: str r5,[r2],#4 ;\ + add r3,r3,r7 ;\ + cmp r3,r4 ;\ + bne 10b ;\ + ldr r4,=LCD_LA_START ;\ + ldr r5,=MMU_L1_TYPE_Fault ;\ + ldr r7,=MMU_SECTION_SIZE ;\ +20: str r5,[r1],#4 ;\ + add r3,r3,r7 ;\ + cmp r3,r4 ;\ + bne 20b ;\ +/* LCD Buffer & Unmapped DRAM (holes and all) */ ;\ + ldr r3,=LCD_LA_START ;\ + ldr r4,=ROM0_LA_START ;\ + ldr r5,=LCD_PA ;\ + ldr r6,=MMU_L1_TYPE_Section|MMU_AP_Any|MMU_Bufferable|MMU_Cacheable ;\ + ldr r7,=MMU_SECTION_SIZE ;\ +10: orr r0,r5,r6 ;\ + str r0,[r1],#4 ;\ + add r5,r5,r7 ;\ + add r3,r3,r7 ;\ + cmp r3,r4 ;\ + bne 10b ;\ +/* ROM0 */ ;\ + ldr r3,=ROM0_LA_START ;\ + ldr r4,=ROM0_LA_END ;\ + ldr r5,=ROM0_PA ;\ + ldr r6,=MMU_L1_TYPE_Section|MMU_AP_Any|MMU_Cacheable ;\ + ldr r7,=MMU_SECTION_SIZE ;\ +10: orr r0,r5,r6 ;\ + str r0,[r1],#4 ;\ + add r5,r5,r7 ;\ + add r3,r3,r7 ;\ + cmp r3,r4 ;\ + bne 10b ;\ +/* ROM1 */ ;\ + ldr r3,=ROM1_LA_START ;\ + ldr r4,=ROM1_LA_END ;\ + ldr r5,=ROM1_PA ;\ + ldr r6,=MMU_L1_TYPE_Section|MMU_AP_Any ;\ + ldr r7,=MMU_SECTION_SIZE ;\ +10: orr r0,r5,r6 ;\ + str r0,[r1],#4 ;\ + add r5,r5,r7 ;\ + add r3,r3,r7 ;\ + cmp r3,r4 ;\ + bne 10b ;\ +/* Now initialize the MMU to use this new page table */ ;\ + MMU_INITIALIZE ;\ + ldr r2,=__exception_handlers ;\ + ldr r3,=ROM0_LA_START ;\ + cmp r2,r3 ;\ + beq 20f ;\ + ldr r4,=__rom_data_end ;\ +15: ;\ + ldr r0,[r3],#4 ;\ + str r0,[r2],#4 ;\ + cmp r2,r4 ;\ + bne 15b ;\ +20: + +#else + +#define PLATFORM_SETUP1 +#endif + + +/*---------------------------------------------------------------------------*/ +/* end of hal_platform_setup.h */ +#endif /* CYGONCE_HAL_PLATFORM_SETUP_H */
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/edb7xxx/current/include/pkgconf/hal_arm_edb7xxx.h @@ -0,0 +1,227 @@ +#ifndef CYGONCE_PKGCONF_HAL_ARM_EDB7XXX_H +#define CYGONCE_PKGCONF_HAL_ARM_EDB7XXX_H +// ==================================================================== +// +// pkgconf/hal_arm_edb7xxx.h +// +// HAL configuration file +// +// ==================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +// ==================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 1999-04-21 +// Purpose: To allow the user to edit HAL configuration options. +// Description: +// +//####DESCRIPTIONEND#### +// +// ==================================================================== + + +/* --------------------------------------------------------------------- + {{CFG_DATA + + cdl_package CYGPKG_HAL_ARM_EDB7XXX { + display "Cirrus Logic EDB7XXX evaluation boards" + type radio + parent CYGPKG_HAL_ARM + description " + The EDB7XXX HAL package provides the support needed to run + eCos on a Cirrus Logic EDB7XXX eval boards." + } + + cdl_option CYGHWR_HAL_ARM_EDB7XXX_CL7111 { + display "CL7111-1 variant" + parent CYGPKG_HAL_ARM_EDB7XXX + platform cl7111 + type radio + description " + Cirrus Logic CL7111 board with ARM710C processor." + } + + cdl_option CYGHWR_HAL_ARM_EDB7XXX_EDB7211 { + display "EDB7211-1 variant" + parent CYGPKG_HAL_ARM_EDB7XXX + platform edb7211 + type radio + description " + Cirrus Logic EDB7211 board with EDB7XXX (ARM720) processor." + } + + cdl_option CYGHWR_HAL_ARM_EDB7XXX_STARTUP { + display "Startup type" + parent CYGPKG_HAL_ARM_EDB7XXX + type enum + legal_values ram rom stubs + startup + description " + When targetting the EDB7XXX eval boards it is possible to build + the system for either RAM bootstrap or ROM bootstrap(s). Select + 'ram' when building programs to load into RAM using onboard + debug software such as Angel or eCos GDB stubs. Select 'rom' + when building a stand-alone application which will be put + into ROM. Selection of 'stubs' is for the special case of + building the eCos GDB stubs themselves." + } + + }}CFG_DATA */ + +#define CYGHWR_HAL_ARM_EDB7XXX_STARTUP ram + + +/* --------------------------------------------------------------------- + {{CFG_DATA + cdl_option CYGHWR_HAL_ARM_EDB7XXX_DIAG_PORT { + display "Diagnostic serial port" + parent CYGPKG_HAL_ARM_EDB7XXX + type enum + legal_values 0 1 + description " + The EDB7XXX boards have two separate serial ports. This option + chooses which of these ports will be used." + } + + }}CFG_DATA */ +#define CYGHWR_HAL_ARM_EDB7XXX_DIAG_PORT 0 + +/* --------------------------------------------------------------------- + {{CFG_DATA + cdl_option CYGHWR_HAL_ARM_EDB7XXX_DIAG_BAUD { + display "Diagnostic serial port baud rate" + parent CYGPKG_HAL_ARM_EDB7XXX + type enum + legal_values 9600 19200 38400 115200 + description " + This option selects the baud rate used for the diagnostic port. + Note: this should match the value chosen for the GDB port if the + diagnostic and GDB port are the same." + } + + }}CFG_DATA */ +#define CYGHWR_HAL_ARM_EDB7XXX_DIAG_BAUD 38400 + +/* --------------------------------------------------------------------- + {{CFG_DATA + cdl_option CYGHWR_HAL_ARM_EDB7XXX_GDB_PORT { + display "GDB serial port" + parent CYGPKG_HAL_ARM_EDB7XXX + type enum + legal_values 0 1 + description " + The EDB7XXX boards have two separate serial ports. This option + chooses which of these ports will be used to connect to a host + running GDB." + } + + }}CFG_DATA */ +#define CYGHWR_HAL_ARM_EDB7XXX_GDB_PORT 0 + +/* --------------------------------------------------------------------- + {{CFG_DATA + cdl_option CYGHWR_HAL_ARM_EDB7XXX_GDB_BAUD { + display "GDB serial port baud rate" + parent CYGPKG_HAL_ARM_EDB7XXX + type enum + legal_values 9600 19200 38400 115200 + description " + This option controls the baud rate used for the GDB connection." + } + + }}CFG_DATA */ +#define CYGHWR_HAL_ARM_EDB7XXX_GDB_BAUD 38400 + +/* --------------------------------------------------------------------- + {{CFG_DATA + cdl_option CYGHWR_HAL_ARM_EDB7XXX_PROCESSOR_CLOCK { + display "Processor clock rate" + parent CYGPKG_HAL_ARM_EDB7XXX + type enum + legal_values 18432 36864 49152 73728 + description " + The processor on the EDB7XXX can run at various frequencies." + } + + }}CFG_DATA */ +#define CYGHWR_HAL_ARM_EDB7XXX_PROCESSOR_CLOCK 73728 + +/* --------------------------------------------------------------------- + {{CFG_DATA + cdl_option CYGHWR_HAL_ARM_EDB7XXX_DRAM_SIZE { + display "DRAM size" + parent CYGPKG_HAL_ARM_EDB7XXX + type enum + legal_values 2 16 + description " + The EDB7XXX boards can have various amounts of DRAM installed. + The machine needs to be initialized differently, depending + upon the amount installed." + } + + }}CFG_DATA */ +#define CYGHWR_HAL_ARM_EDB7XXX_DRAM_SIZE 16 + +/* ---------------------------------------------------------------------------- + {{CFG_DATA + + cdl_option CYGHWR_HAL_ARM_EDB7XXX_SOFTWARE_DRAM_REFRESH { + display "Perform DRAM refresh in software" + type bool + parent CYGPKG_HAL_ARM_EDB7XXX + description " + This option will add code that refreshes the DRAM by + touching all of DRAM during the system clock interrupt + processing." + } + + }}CFG_DATA */ + +#undef CYGHWR_HAL_ARM_EDB7XXX_SOFTWARE_DRAM_REFRESH + +/* ---------------------------------------------------------------------------- + {{CFG_DATA + + cdl_option CYGHWR_HAL_ARM_EDB7XXX_LCD_INSTALLED { + display "LCD panel" + type bool + parent CYGPKG_HAL_ARM_EDB7XXX + description " + If an LCD panel is installed, 128K of DRAM will be dedicated to the + LCD buffer by the system intialization." + } + + }}CFG_DATA */ +#define CYGHWR_HAL_ARM_EDB7XXX_LCD_INSTALLED + +// Real-time clock/counter specifics + +#define CYGNUM_HAL_RTC_NUMERATOR 1000000000 +#define CYGNUM_HAL_RTC_DENOMINATOR 100 +#define CYGNUM_HAL_RTC_PERIOD 5120 // Assumes 512KHz clock + +/* -------------------------------------------------------------------*/ +#endif /* CYGONCE_PKGCONF_HAL_ARM_EDB7XXX_H */ +/* EOF hal_arm_edb7xxx.h */
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/edb7xxx/current/include/pkgconf/mlt_arm_cl7111_ram.h @@ -0,0 +1,13 @@ +// eCos memory layout - Wed Nov 17 08:08:48 1999 + +// This is a generated file - do not edit + +#include <cyg/infra/cyg_type.h> +#include <stddef.h> + +#define CYGMEM_REGION_ram (0) +#define CYGMEM_REGION_ram_SIZE (0x1c0000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) +extern char CYG_LABEL_NAME (_reserved) []; +#define CYGMEM_SECTION_reserved (CYG_LABEL_NAME (_reserved)) +#define CYGMEM_SECTION_reserved_SIZE (0x8000)
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/edb7xxx/current/include/pkgconf/mlt_arm_cl7111_ram.ldi @@ -0,0 +1,24 @@ +// eCos memory layout - Wed Nov 17 08:08:48 1999 + +// This is a generated file - do not edit + +MEMORY +{ + ram : ORIGIN = 0, LENGTH = 0x1c0000 +} + +SECTIONS +{ + SECTIONS_BEGIN + __reserved = 0; . = __reserved + 0x8000; + SECTION_rom_vectors (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_text (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_fini (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_rodata (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_rodata1 (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_fixup (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_gcc_except_table (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_data (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTIONS_END +}
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/edb7xxx/current/include/pkgconf/mlt_arm_cl7111_ram.mlt @@ -0,0 +1,12 @@ +version 0 +region ram 0 1c0000 0 ! +section reserved 8000 1 0 0 1 1 1 1 0 0 rom_vectors rom_vectors ! +section rom_vectors 0 1 0 1 0 1 0 1 text text ! +section text 0 1 0 1 0 1 0 1 fini fini ! +section fini 0 1 0 1 0 1 0 1 rodata rodata ! +section rodata 0 1 0 1 0 1 0 1 rodata1 rodata1 ! +section rodata1 0 1 0 1 0 1 0 1 fixup fixup ! +section fixup 0 1 0 1 0 1 0 1 gcc_except_table gcc_except_table ! +section gcc_except_table 0 1 0 1 0 1 0 1 data data ! +section data 0 1 0 1 0 1 0 1 bss bss ! +section bss 0 4 0 1 0 0 0 0 !
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/edb7xxx/current/include/pkgconf/mlt_arm_cl7111_rom.h @@ -0,0 +1,16 @@ +// eCos memory layout - Wed Nov 17 08:10:54 1999 + +// This is a generated file - do not edit + +#include <cyg/infra/cyg_type.h> +#include <stddef.h> + +#define CYGMEM_REGION_ram (0) +#define CYGMEM_REGION_ram_SIZE (0x1c0000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) +#define CYGMEM_REGION_rom (0xe0000000) +#define CYGMEM_REGION_rom_SIZE (0x40000) +#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R) +extern char CYG_LABEL_NAME (_reserved) []; +#define CYGMEM_SECTION_reserved (CYG_LABEL_NAME (_reserved)) +#define CYGMEM_SECTION_reserved_SIZE (0x1000)
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/edb7xxx/current/include/pkgconf/mlt_arm_cl7111_rom.ldi @@ -0,0 +1,25 @@ +// eCos memory layout - Wed Nov 17 08:10:54 1999 + +// This is a generated file - do not edit + +MEMORY +{ + ram : ORIGIN = 0, LENGTH = 0x1c0000 + rom : ORIGIN = 0xe0000000, LENGTH = 0x40000 +} + +SECTIONS +{ + SECTIONS_BEGIN + SECTION_rom_vectors (rom, 0xe0000000, LMA_EQ_VMA) + SECTION_text (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_fini (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_rodata (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_rodata1 (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_fixup (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_gcc_except_table (rom, ALIGN (0x1), LMA_EQ_VMA) + __reserved = 0; . = __reserved + 0x1000; + SECTION_data (ram, ALIGN (0x1), FOLLOWING (.gcc_except_table)) + SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTIONS_END +}
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/edb7xxx/current/include/pkgconf/mlt_arm_cl7111_rom.mlt @@ -0,0 +1,13 @@ +version 0 +region ram 0 1c0000 0 ! +region rom e0000000 40000 1 ! +section reserved 1000 1 0 0 1 1 1 0 0 0 data ! +section data 0 1 1 1 0 1 0 0 bss ! +section bss 0 4 0 1 0 0 0 0 ! +section rom_vectors 0 1 0 1 1 1 1 1 e0000000 e0000000 text text ! +section text 0 1 0 1 0 1 0 1 fini fini ! +section fini 0 1 0 1 0 1 0 1 rodata rodata ! +section rodata 0 1 0 1 0 1 0 1 rodata1 rodata1 ! +section rodata1 0 1 0 1 0 1 0 1 fixup fixup ! +section fixup 0 1 0 1 0 1 0 1 gcc_except_table gcc_except_table ! +section gcc_except_table 0 1 0 1 0 0 0 1 data !
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/edb7xxx/current/include/pkgconf/mlt_arm_cl7111_stubs.ldi @@ -0,0 +1,52 @@ +//=========================================================================== +// +// MLT linker script export +// +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//=========================================================================== + +// eCos memory layout - Mon May 17 08:06:28 1999 + +// This is a generated file - do not edit + +MEMORY +{ + ram : ORIGIN = 0x1000, LENGTH = 0x7000 + rom : ORIGIN = 0xf0028000, LENGTH = 0x40000 +} + +SECTIONS +{ + SECTIONS_BEGIN + SECTION_rom_vectors (rom, 0xf0028000, LMA_EQ_VMA) + SECTION_text (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_fini (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_rodata (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_rodata1 (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_fixup (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_gcc_except_table (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_data (ram, 0x1000, FOLLOWING (.gcc_except_table)) + SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTIONS_END +}
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/edb7xxx/current/include/pkgconf/mlt_arm_cl7111_stubs.mlt @@ -0,0 +1,12 @@ +version 0 +region ram 1000 7000 0 ! +region rom f0028000 40000 1 ! +section data 0 1 1 1 1 1 0 0 1000 bss ! +section bss 0 4 0 1 0 0 0 0 ! +section rom_vectors 0 1 0 1 1 1 1 1 f0028000 f0028000 text text ! +section text 0 1 0 1 0 1 0 1 fini fini ! +section fini 0 1 0 1 0 1 0 1 rodata rodata ! +section rodata 0 1 0 1 0 1 0 1 rodata1 rodata1 ! +section rodata1 0 1 0 1 0 1 0 1 fixup fixup ! +section fixup 0 1 0 1 0 1 0 1 gcc_except_table gcc_except_table ! +section gcc_except_table 0 1 0 1 0 0 0 1 data !
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/edb7xxx/current/include/pkgconf/mlt_arm_edb7211_ram.h @@ -0,0 +1,13 @@ +// eCos memory layout - Wed Oct 27 13:28:21 1999 + +// This is a generated file - do not edit + +#include <cyg/infra/cyg_type.h> +#include <stddef.h> + +#define CYGMEM_REGION_ram (0) +#define CYGMEM_REGION_ram_SIZE (0x00FD7000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) +extern char CYG_LABEL_NAME (_reserved) []; +#define CYGMEM_SECTION_reserved (CYG_LABEL_NAME (_reserved)) +#define CYGMEM_SECTION_reserved_SIZE (0x8000 - (size_t) CYG_LABEL_NAME (_reserved))
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/edb7xxx/current/include/pkgconf/mlt_arm_edb7211_ram.ldi @@ -0,0 +1,24 @@ +// eCos memory layout - Wed Oct 27 13:28:21 1999 + +// This is a generated file - do not edit + +MEMORY +{ + ram : ORIGIN = 0, LENGTH = 0x00FD7000 +} + +SECTIONS +{ + SECTIONS_BEGIN + __reserved = 0; + SECTION_rom_vectors (ram, 0x8000, LMA_EQ_VMA) + SECTION_text (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_fini (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_rodata (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_rodata1 (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_fixup (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_gcc_except_table (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_data (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTIONS_END +}
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/edb7xxx/current/include/pkgconf/mlt_arm_edb7211_ram.mlt @@ -0,0 +1,12 @@ +version 0 +region ram 0 fd9000 0 !DRAM +section reserved 0 1 0 0 1 0 1 0 0 0 ! +section rom_vectors 0 1 0 1 1 1 1 1 8000 8000 text text ! +section text 0 1 0 1 0 1 0 1 fini fini ! +section fini 0 1 0 1 0 1 0 1 rodata rodata ! +section rodata 0 1 0 1 0 1 0 1 rodata1 rodata1 ! +section rodata1 0 1 0 1 0 1 0 1 fixup fixup ! +section fixup 0 1 0 1 0 1 0 1 gcc_except_table gcc_except_table ! +section gcc_except_table 0 1 0 1 0 1 0 1 data data ! +section data 0 1 0 1 0 1 0 1 bss bss ! +section bss 0 4 0 1 0 0 0 0 !
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/edb7xxx/current/include/pkgconf/mlt_arm_edb7211_rom.h @@ -0,0 +1,16 @@ +// eCos memory layout - Wed Oct 27 13:34:16 1999 + +// This is a generated file - do not edit + +#include <cyg/infra/cyg_type.h> +#include <stddef.h> + +#define CYGMEM_REGION_ram (0) +#define CYGMEM_REGION_ram_SIZE (0x00FD7000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) +#define CYGMEM_REGION_rom (0xe0000000) +#define CYGMEM_REGION_rom_SIZE (0x800000) +#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R) +extern char CYG_LABEL_NAME (_reserved) []; +#define CYGMEM_SECTION_reserved (CYG_LABEL_NAME (_reserved)) +#define CYGMEM_SECTION_reserved_SIZE (0x1000 - (size_t) CYG_LABEL_NAME (_reserved))
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/edb7xxx/current/include/pkgconf/mlt_arm_edb7211_rom.ldi @@ -0,0 +1,25 @@ +// eCos memory layout - Wed Oct 27 13:34:16 1999 + +// This is a generated file - do not edit + +MEMORY +{ + ram : ORIGIN = 0, LENGTH = 0x00FD7000 + rom : ORIGIN = 0xe0000000, LENGTH = 0x800000 +} + +SECTIONS +{ + SECTIONS_BEGIN + SECTION_rom_vectors (rom, 0xe0000000, LMA_EQ_VMA) + SECTION_text (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_fini (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_rodata (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_rodata1 (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_fixup (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_gcc_except_table (rom, ALIGN (0x1), LMA_EQ_VMA) + __reserved = 0; + SECTION_data (ram, 0x1000, FOLLOWING (.gcc_except_table)) + SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTIONS_END +}
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/edb7xxx/current/include/pkgconf/mlt_arm_edb7211_rom.mlt @@ -0,0 +1,13 @@ +version 0 +region ram 0 fd7000 0 ! +region rom e0000000 800000 1 !This is ROM bank 0, physical address 0x00000000.When running eCos, this space is remapped to 0xE0000000. +section reserved 0 1 0 0 1 0 1 0 0 0 ! +section data 0 1 1 1 1 1 0 0 1000 bss ! +section bss 0 4 0 1 0 0 0 0 ! +section rom_vectors 0 1 0 1 1 1 1 1 e0000000 e0000000 text text ! +section text 0 1 0 1 0 1 0 1 fini fini ! +section fini 0 1 0 1 0 1 0 1 rodata rodata ! +section rodata 0 1 0 1 0 1 0 1 rodata1 rodata1 ! +section rodata1 0 1 0 1 0 1 0 1 fixup fixup ! +section fixup 0 1 0 1 0 1 0 1 gcc_except_table gcc_except_table ! +section gcc_except_table 0 1 0 1 0 0 0 1 data !
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/edb7xxx/current/include/pkgconf/mlt_arm_edb7211_stubs.h @@ -0,0 +1,16 @@ +// eCos memory layout - Wed Oct 27 13:37:57 1999 + +// This is a generated file - do not edit + +#include <cyg/infra/cyg_type.h> +#include <stddef.h> + +#define CYGMEM_REGION_ram (0) +#define CYGMEM_REGION_ram_SIZE (0x00FD7000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) +#define CYGMEM_REGION_rom (0xe0000000) +#define CYGMEM_REGION_rom_SIZE (0x800000) +#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R) +extern char CYG_LABEL_NAME (_reserved) []; +#define CYGMEM_SECTION_reserved (CYG_LABEL_NAME (_reserved)) +#define CYGMEM_SECTION_reserved_SIZE (0x1000 - (size_t) CYG_LABEL_NAME (_reserved))
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/edb7xxx/current/include/pkgconf/mlt_arm_edb7211_stubs.ldi @@ -0,0 +1,25 @@ +// eCos memory layout - Wed Oct 27 13:37:57 1999 + +// This is a generated file - do not edit + +MEMORY +{ + ram : ORIGIN = 0, LENGTH = 0x00FD7000 + rom : ORIGIN = 0xe0000000, LENGTH = 0x800000 +} + +SECTIONS +{ + SECTIONS_BEGIN + SECTION_rom_vectors (rom, 0xe0000000, LMA_EQ_VMA) + SECTION_text (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_fini (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_rodata (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_rodata1 (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_fixup (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_gcc_except_table (rom, ALIGN (0x1), LMA_EQ_VMA) + __reserved = 0; + SECTION_data (ram, 0x1000, FOLLOWING (.gcc_except_table)) + SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTIONS_END +}
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/edb7xxx/current/include/pkgconf/mlt_arm_edb7211_stubs.mlt @@ -0,0 +1,13 @@ +version 0 +region ram 0 fd7000 0 ! +region rom e0000000 800000 1 !This is ROM bank 0, physical address 0x00000000.When running eCos, this space is remapped to 0xE0000000. +section reserved 0 1 0 0 1 0 1 0 0 0 ! +section data 0 1 1 1 1 1 0 0 1000 bss ! +section bss 0 4 0 1 0 0 0 0 ! +section rom_vectors 0 1 0 1 1 1 1 1 e0000000 e0000000 text text ! +section text 0 1 0 1 0 1 0 1 fini fini ! +section fini 0 1 0 1 0 1 0 1 rodata rodata ! +section rodata 0 1 0 1 0 1 0 1 rodata1 rodata1 ! +section rodata1 0 1 0 1 0 1 0 1 fixup fixup ! +section fixup 0 1 0 1 0 1 0 1 gcc_except_table gcc_except_table ! +section gcc_except_table 0 1 0 1 0 0 0 1 data !
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/edb7xxx/current/include/plf_stub.h @@ -0,0 +1,86 @@ +#ifndef CYGONCE_HAL_PLF_STUB_H +#define CYGONCE_HAL_PLF_STUB_H + +//============================================================================= +// +// plf_stub.h +// +// Platform header for GDB stub support. +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998, 1999 Cygnus Solutions. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jskov +// Contributors:jskov, gthomas +// Date: 1999-04-21 +// Purpose: Platform HAL stub support for Cirrus EDB7XXX boards. +// Usage: #include <cyg/hal/plf_stub.h> +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include <pkgconf/hal.h> +#include <pkgconf/hal_arm_edb7xxx.h> + +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + +#include <cyg/infra/cyg_type.h> // CYG_UNUSED_PARAM + +#include <cyg/hal/arm_stub.h> // architecture stub support + +//---------------------------------------------------------------------------- +// Define serial stuff. + +extern void hal_edb7xxx_init_serial(void); +extern int hal_edb7xxx_get_char(void); +extern void hal_edb7xxx_put_char(int c); +extern int hal_edb7xxx_interruptible(int); + +#define HAL_STUB_PLATFORM_INIT_SERIAL() hal_edb7xxx_init_serial() +#define HAL_STUB_PLATFORM_GET_CHAR() hal_edb7xxx_get_char() +#define HAL_STUB_PLATFORM_PUT_CHAR(c) hal_edb7xxx_put_char((c)) +#define HAL_STUB_PLATFORM_SET_BAUD_RATE(baud) CYG_UNUSED_PARAM(int, (baud)) +#define HAL_STUB_PLATFORM_INTERRUPTIBLE (&hal_edb7xxx_interruptible) +#define HAL_STUB_PLATFORM_INIT_BREAK_IRQ() CYG_EMPTY_STATEMENT + +//---------------------------------------------------------------------------- +// Stub initializer. +#define HAL_STUB_PLATFORM_STUBS_INIT() CYG_EMPTY_STATEMENT + +//---------------------------------------------------------------------------- +// Reset. + +// Try and force the board into a reset state. Since this hardware requires +// a "wakeup" signal, we can't just use a watchdog/reset approach. +externC void reset_platform(void); +#define HAL_STUB_PLATFORM_RESET() reset_platform() + +#endif // ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + +//----------------------------------------------------------------------------- +#endif // CYGONCE_HAL_PLF_STUB_H +// End of plf_stub.h
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/edb7xxx/current/misc/PKGconf.mak @@ -0,0 +1,54 @@ +#=============================================================================== +# +# makefile +# +# hal/arm/edb7xxx/misc +# +#=============================================================================== +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Cygnus eCos Public License +# Version 1.0 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://sourceware.cygnus.com/ecos +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Cygnus Operating System, released +# September 30, 1998. +# +# The Initial Developer of the Original Code is Cygnus. Portions created +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +#=============================================================================== + +PACKAGE := hal_arm_edb7xxx +include ../../../../../pkgconf/pkgconf.mak +include ../../../../../pkgconf/system.mak + +ifdef CYG_HAL_STARTUP_STUBS +PROGS := gdb_module +OTHER_PROGS := gdb_module.bin +endif +ifdef CYG_HAL_STARTUP_RAM +PROGS := prog_flash +endif +WHEREAMI := misc + +include $(COMPONENT_REPOSITORY)/pkgconf/makrules.prv + +ifdef CYG_HAL_STARTUP_STUBS +gdb_module.bin: gdb_module.stamp + $(OBJCOPY) -O binary gdb_module$(EXEEXT) gdb_module.bin +endif + + + + +
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/edb7xxx/current/misc/STUBS_config @@ -0,0 +1,45 @@ +#! /bin/sh + +# usage: STUBS_config <repository> [edb7211 | cl7111] + +if [ "$2"x = "x" ]; then + EDB7xxx="edb7211" +else + EDB7xxx=$2 +fi + +if ( echo | tclsh ) 2>/dev/null ; then + TCL=tclsh +elif ( echo | cygtclsh80 ) 2>/dev/null ; then + TCL=cygtclsh80 +else + echo Could not find TCL interpreter + exit 1 +fi + +$TCL $1/pkgconf.tcl \ + --target=arm --platform=${EDB7xxx} --startup=stubs \ + --disable CYGPKG_KERNEL --disable CYGPKG_UITRON \ + --disable CYGPKG_LIBC --disable CYGPKG_LIBM \ + --disable CYGPKG_ERROR --disable CYGPKG_IO \ + --disable CYGPKG_IO_SERIAL --disable CYGPKG_DEVICES_WALLCLOCK \ + --disable CYGPKG_DEVICES_WATCHDOG --disable-cygmon + +patch <<END_OF_PATCH -p0 +--- pkgconf/hal.h~ Thu Jul 8 08:26:44 1999 ++++ pkgconf/hal.h Wed Jul 28 10:51:07 1999 +@@ -369,10 +369,10 @@ + + }}CFG_DATA */ + +-#undef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS ++#define CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + #undef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT +-#define CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT +-#define CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT ++#undef CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT ++#undef CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT + + /* + * NOTE: +END_OF_PATCH
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/edb7xxx/current/misc/gdb_module.c @@ -0,0 +1,64 @@ +//========================================================================== +// +// gdb_module.c +// +// Cirrus Logic EDB7XXX eval board GDB stubs (module wrapper) +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 1999-05-11 +// Description: Cirrus Logic EDB7XXX FLASH module for eCos GDB stubs +//####DESCRIPTIONEND#### + +// +// This is the module 'wrapper' for the GDB stubs +// + +#include <pkgconf/hal.h> +#include <cyg/infra/cyg_type.h> +#include <cyg/hal/hal_stub.h> + +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + +void cyg_start (void) +{ + for(;;) breakpoint(); +} +#else + +#include <cyg/infra/testcase.h> + +void cyg_start (void) +{ + CYG_TEST_INIT(); + CYG_TEST_PASS_FINISH("N/A: Stand-alone GDB stubs only"); +} +#endif + + +
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/edb7xxx/current/misc/prog_flash.c @@ -0,0 +1,312 @@ +//========================================================================== +// +// prog_flash.c +// +// Cirrus CL7211 eval board FLASH program tool +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 1999-05-12 +// Description: Tool used to program onboard FLASH image +//####DESCRIPTIONEND#### + +// +// This program will program the FLASH on the CL7211 board from a fixed buffer +// + +#include <pkgconf/kernel.h> // Configuration header +#include <cyg/kernel/kapi.h> +#include <cyg/infra/diag.h> +#include <cyg/hal/hal_cache.h> + +#ifndef FALSE +#define FALSE 0 +#define TRUE 1 +#endif + +#define STACK_SIZE 4096 +static char stack[STACK_SIZE]; +static cyg_thread thread_data; +static cyg_handle_t thread_handle; + +void identify_FLASH(void); +int write_flash(long *data, volatile long *mem); +int erase_sector(volatile long *mem); + +// Note: these are mapped addresses +// 0xE0000000 = ROM Bank 0 +// 0xF0000000 = ROM Bank 1 +volatile unsigned long *FLASH = (volatile unsigned long *)0xE0000000; + +long *flash_buffer = (long *)0x60000; +long *flash_buffer_end = (long *)0x64000; +long *ROM_address = (long *)0xE07E0000; + +// Adapted from Cirrus sample code +#define ATMEL_SEQ_ADD1 0x00015554>>2 +#define ATMEL_SEQ_ADD2 0x0000AAA8>>2 +#define ATMEL_START_CMD1 0xAAAAAAAA +#define ATMEL_START_CMD2 0x55555555 +#define ATMEL_ID_CMD 0x90909090 +#define ATMEL_PROG_CMD 0xA0A0A0A0 +#define ATMEL_ERASE_CMD 0x80808080 +#define ATMEL_SECTOR_ERASE_CMD 0x30303030 +#define ATMEL_STOP_CMD 0xF0F0F0F0 +#define ATMEL_BUSY_TOGGLE 0x00400040 +#define ATMEL_ERASE_TOGGLE 0x00440044 + +#define ATMEL_MANUF 0x1F +#define ATMEL_AT29C040_ID 0X5B +#define ATMEL_AT29C040A_ID 0XA4 +#define ATMEL_AT29C1024_ID 0X25 +#define ATMEL_SECTOR_SIZE 256 +#define ATMEL_MAX_SECTORS 2048 + +#define INTEL_MANUF 0x0089 +#define INTEL_STOP_CMD 0x00FF00FF +#define INTEL_PROG_CMD 0x00400040 +#define INTEL_ERASE_CMD 0x00200020 +#define INTEL_ERASE_CONFIRM 0x00D000D0 +#define INTEL_READ_STATUS 0x00700070 +#define INTEL_CLEAR_STATUS 0x00500050 +#define INTEL_SB_WSMS 0x00800080 // Write state machine = ready +#define INTEL_SB_ERASE_ERROR 0x00200020 // Erase failure +#define INTEL_SB_PROG_ERROR 0x00100010 // Programming failure + +#define ERASE_TIMEOUT 10 // seconds + +int manuf_code, device_code, sector_size, max_no_of_sectors, word_mode; + +// FUNCTIONS + +static void +cyg_test_exit(void) +{ + while (TRUE) ; +} + +static void +program_flash(void) +{ + diag_printf("PROGRAM FLASH here!\n"); + HAL_UCACHE_SYNC(); // ROM space is marked cacheable which causes problems! + HAL_UCACHE_DISABLE(); // So, just disable caches. + identify_FLASH(); + diag_printf("About to program FLASH using data at %x..%x\n", flash_buffer, flash_buffer_end); + diag_printf("*** Press RESET now to abort!\n"); + cyg_thread_delay(5*100); + diag_printf("\n"); + diag_printf("... Erase sector\n"); + if (erase_sector(ROM_address)) { + diag_printf("... Programming FLASH\n"); + while (flash_buffer < flash_buffer_end) { + if (!write_flash(flash_buffer++, ROM_address++)) break; + } + } + + // Exit Program Mode + switch (manuf_code) { + case ATMEL_MANUF: + FLASH[ATMEL_SEQ_ADD1] = ATMEL_START_CMD1; + FLASH[ATMEL_SEQ_ADD2] = ATMEL_START_CMD2; + FLASH[ATMEL_SEQ_ADD1] = ATMEL_STOP_CMD; + break; + case INTEL_MANUF: + FLASH[0] = INTEL_STOP_CMD; + break; + } + diag_printf("All done!\n"); + cyg_test_exit(); +} + +void +identify_FLASH(void ) +{ + // Enter Software Product Identification Mode + FLASH[ATMEL_SEQ_ADD1] = ATMEL_START_CMD1; + FLASH[ATMEL_SEQ_ADD2] = ATMEL_START_CMD2; + FLASH[ATMEL_SEQ_ADD1] = ATMEL_ID_CMD; + + // Wait at least 10ms + cyg_thread_delay(2); + + // Read Manufacturer and device code from the device + manuf_code = FLASH[0] >> 16; + device_code = FLASH[1] >> 16; + + diag_printf("manufacturer: 0x%04x, device: 0x%04x\n", manuf_code, device_code); + + // Exit Software Product Identification Mode + switch (manuf_code) { + case ATMEL_MANUF: + FLASH[ATMEL_SEQ_ADD1] = ATMEL_START_CMD1; + FLASH[ATMEL_SEQ_ADD2] = ATMEL_START_CMD2; + FLASH[ATMEL_SEQ_ADD1] = ATMEL_STOP_CMD; + break; + case INTEL_MANUF: + FLASH[0] = INTEL_STOP_CMD; + break; + default: + diag_printf("Unrecognized FLASH manufacturer - I give up!\n"); + cyg_test_exit(); + } +} + +void +spin(void) +{ + volatile int i; + for (i = 0; i < 100; i++) ; +} + +int +write_flash(long *data, volatile long *mem) +{ + long data1, data2; + long status; + int timer; + switch (manuf_code) { + case ATMEL_MANUF: + // Enter Program Mode + FLASH[ATMEL_SEQ_ADD1] = ATMEL_START_CMD1; + FLASH[ATMEL_SEQ_ADD2] = ATMEL_START_CMD2; + FLASH[ATMEL_SEQ_ADD1] = ATMEL_PROG_CMD; + // Send data to selected address + *mem = *data; + while (TRUE) { + data1 = *mem; // Read cell back twice + data2 = *mem; + // Bit 6 toggles between reads while programming in progress + if ((data1 & ATMEL_BUSY_TOGGLE) == (data2 & ATMEL_BUSY_TOGGLE)) break; + } + break; + case INTEL_MANUF: + // Clear current errors + FLASH[0] = INTEL_CLEAR_STATUS; + // Issue program command + FLASH[0] = INTEL_PROG_CMD; + // Send data to selected address + *mem = *data; + timer = 10000; + // Read the status register to wait for programming complete + do { + spin(); + status = FLASH[0]; + } while (((status & INTEL_SB_WSMS) != INTEL_SB_WSMS) && + (--timer > 0)); + // Check for errors + if (timer == 0) { + diag_printf("Programming at 0x%08x timed out - status: 0x%08x\n", mem, status); + } + if ((status & INTEL_SB_PROG_ERROR) != 0) { + diag_printf("Device reports programming error at 0x%08x - status: 0x%08x\n", mem, status); + } + // Exit program mode + FLASH[0] = INTEL_STOP_CMD; + break; + } + if (*mem != *data) { + diag_printf("Programming failed at 0x%08x - write: 0x%08x, read: 0x%08x\n", + mem, *data, *mem); + return (FALSE); + } + return (TRUE); +} + +int +erase_sector(volatile long *mem) +{ + long data1, data2; + long status; + int timer; + switch (manuf_code) { + case ATMEL_MANUF: + // Erase sector command + FLASH[ATMEL_SEQ_ADD1] = ATMEL_START_CMD1; + FLASH[ATMEL_SEQ_ADD2] = ATMEL_START_CMD2; + FLASH[ATMEL_SEQ_ADD1] = ATMEL_ERASE_CMD; + FLASH[ATMEL_SEQ_ADD1] = ATMEL_START_CMD1; + FLASH[ATMEL_SEQ_ADD2] = ATMEL_START_CMD2; + *mem = ATMEL_SECTOR_ERASE_CMD; + while (TRUE) { + data1 = *mem; // Read cell back twice + data2 = *mem; + // Bits 6+2 toggle between reads while programming in progress + if ((data1 & ATMEL_ERASE_TOGGLE) == (data2 & ATMEL_ERASE_TOGGLE)) break; + } + break; + case INTEL_MANUF: + // Clear current errors + FLASH[0] = INTEL_CLEAR_STATUS; + // Issue erase block command + FLASH[0] = INTEL_ERASE_CMD; + *mem = INTEL_ERASE_CONFIRM; + timer = ERASE_TIMEOUT*50; + // Read the status register while erase in progress + do { + cyg_thread_delay(2); + status = FLASH[0]; + } while (((status & INTEL_SB_WSMS) != INTEL_SB_WSMS) && + (--timer > 0)); + // Check for errors + if (timer == 0) { + diag_printf("Erase not complete after %d seconds - status: 0x%08x\n", + ERASE_TIMEOUT, status); + } + if ((status & INTEL_SB_ERASE_ERROR) != 0) { + diag_printf("Device reports erase error - status: 0x%08x\n", status); + } + // Exit erase mode + FLASH[0] = INTEL_STOP_CMD; + break; + } + if (*mem != 0xFFFFFFFF) { + diag_printf("Erase failed at 0x%08x - read: 0x%08x\n", + mem, *mem); + return (FALSE); + } + return (TRUE); +} + +externC void +cyg_start( void ) +{ + // Create a main thread, so we can run the scheduler and have time 'pass' + cyg_thread_create(10, // Priority - just a number + program_flash, // entry + 1, // index + "program_thread", // Name + &stack[0], // Stack + STACK_SIZE, // Size + &thread_handle, // Handle + &thread_data // Thread data structure + ); + cyg_thread_resume(thread_handle); // Start it + cyg_scheduler_start(); +} // cyg_package_start() +
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/edb7xxx/current/src/PKGconf.mak @@ -0,0 +1,42 @@ +#============================================================================== +# +# makefile +# +# hal/arm/edb7xxx/src +# +#============================================================================== +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Cygnus eCos Public License +# Version 1.0 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://sourceware.cygnus.com/ecos +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Cygnus Operating System, released +# September 30, 1998. +# +# The Initial Developer of the Original Code is Cygnus. Portions created +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +#============================================================================== + +PACKAGE := hal_arm_edb7xxx +include ../../../../../pkgconf/system.mak +include ../../../../../pkgconf/pkgconf.mak + +LIBRARY := libtarget.a +COMPILE := hal_diag.c plf_stub.c edb7xxx_misc.c +OTHER_OBJS := +OTHER_TARGETS := +OTHER_CLEAN := +OTHER_DEPS := + +include $(COMPONENT_REPOSITORY)/pkgconf/makrules.src
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/edb7xxx/current/src/edb7xxx_misc.c @@ -0,0 +1,377 @@ +//========================================================================== +// +// edb7xxx_misc.c +// +// HAL misc board support code for ARM EDB7XXX-1 +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 1999-02-20 +// Purpose: HAL board support +// Description: Implementations of HAL board interfaces +// +//####DESCRIPTIONEND#### +// +//========================================================================*/ + +#include <pkgconf/hal.h> +#include <pkgconf/system.h> +#include CYGBLD_HAL_PLATFORM_H + +#include <cyg/infra/cyg_type.h> // base types +#include <cyg/infra/cyg_trac.h> // tracing macros +#include <cyg/infra/cyg_ass.h> // assertion macros + +#include <cyg/hal/hal_io.h> // IO macros +#include <cyg/hal/hal_arch.h> // Register state info +#include <cyg/hal/hal_diag.h> +#include <cyg/hal/hal_intr.h> // Interrupt names +#include <cyg/hal/hal_cache.h> +#include <cyg/hal/hal_edb7xxx.h> // Hardware definitions + +// #define CYGHWR_HAL_ARM_EDB7XXX_BATLOW +#ifdef CYGHWR_HAL_ARM_EDB7XXX_BATLOW +#include <cyg/hal/hal_intr.h> // HAL interrupt macros +#include <cyg/hal/drv_api.h> // HAL ISR support +static cyg_interrupt batlow_interrupt; +static cyg_handle_t batlow_interrupt_handle; +#endif + +#if (CYGHWR_HAL_ARM_EDB7XXX_PROCESSOR_CLOCK == 18432) +#define CPU_CLOCK 0 +#elif (CYGHWR_HAL_ARM_EDB7XXX_PROCESSOR_CLOCK == 36864) +#define CPU_CLOCK 1 +#elif (CYGHWR_HAL_ARM_EDB7XXX_PROCESSOR_CLOCK == 49152) +#define CPU_CLOCK 2 +#elif (CYGHWR_HAL_ARM_EDB7XXX_PROCESSOR_CLOCK == 73728) +#define CPU_CLOCK 3 +#else +#err Invalid CPU clock frequency +#endif + +static cyg_uint32 _period; + +// Use Timer/Counter #2 for system clock + +void hal_clock_initialize(cyg_uint32 period) +{ + volatile cyg_uint32 *syscon1 = (volatile cyg_uint32 *)SYSCON1; + volatile cyg_uint32 *tc2d = (volatile cyg_uint32 *)TC2D; + // Set timer to 512KHz, prescale mode + *syscon1 = (*syscon1 & ~(SYSCON1_TC2M|SYSCON1_TC2S)) | SYSCON1_TC2S | SYSCON1_TC2M; + // Initialize counter + *tc2d = period; + _period = period; +} + +// This routine is called during a clock interrupt. + +#ifdef CYGHWR_HAL_ARM_EDB7XXX_SOFTWARE_DRAM_REFRESH +#define DRAM_START 0x00000000 +#define DRAM_END 0x01000000 +#define DRAM_ROW_SIZE 0x00000400 +#define DRAM_REFRESH (((DRAM_END-DRAM_START)/DRAM_ROW_SIZE)+99)/100 + +static void __inline__ +enable_FIQ(void) +{ + asm volatile ("mrs r0,cpsr;" + "bic r0,r0,#0x40;" + "msr cpsr,r0"); +} + +static void +do_DRAM_refresh(void) +{ + static cyg_uint32 *row_ptr; + volatile cyg_uint32 val; + int i; + enable_FIQ(); // Should be safe here + for (i = 0; i < DRAM_REFRESH; i++) { + val = *row_ptr; + row_ptr += DRAM_ROW_SIZE / sizeof(*row_ptr); + if (row_ptr >= (cyg_uint32 *)DRAM_END) row_ptr = (cyg_uint32 *)DRAM_START; + } +} +#endif // CYGHWR_HAL_ARM_EDB7XXX_SOFTWARE_DRAM_REFRESH + +void hal_clock_reset(cyg_uint32 vector, cyg_uint32 period) +{ + volatile cyg_uint32 *tc2d = (volatile cyg_uint32 *)TC2D; + if (period != _period) { + *tc2d = period; + _period = period; + } +#ifdef CYGHWR_HAL_ARM_EDB7XXX_SOFTWARE_DRAM_REFRESH + do_DRAM_refresh(); +#else + // Temporary fix for DRAM starvation problem + if (CYGHWR_HAL_ARM_EDB7XXX_PROCESSOR_CLOCK > 37000) { + int i; + for (i = 0; i < (CYGHWR_HAL_ARM_EDB7XXX_PROCESSOR_CLOCK*2)/50; i++) ; // approx 200 us + } +#endif +} + +// Read the current value of the clock, returning the number of hardware "ticks" +// that have occurred (i.e. how far away the current value is from the start) + +void hal_clock_read(cyg_uint32 *pvalue) +{ + volatile cyg_int32 *tc2d = (volatile cyg_int32 *)TC2D; + static cyg_int32 clock_val; + clock_val = *tc2d & 0x0000FFFF; // Register has only 16 bits + if (clock_val & 0x00008000) clock_val |= 0xFFFF8000; // Extend sign bit + *pvalue = (cyg_uint32)(_period - clock_val); // 'clock_val' counts down and wraps +} + +// These tables map the various [soft] interrupt numbers onto the hardware + +static cyg_uint32 hal_interrupt_bitmap[] = { + 0, // CYGNUM_HAL_INTERRUPT_unused 0 + INTSR1_EXTFIQ, // CYGNUM_HAL_INTERRUPT_EXTFIQ 1 + INTSR1_BLINT, // CYGNUM_HAL_INTERRUPT_BLINT 2 + INTSR1_WEINT, // CYGNUM_HAL_INTERRUPT_WEINT 3 + INTSR1_MCINT, // CYGNUM_HAL_INTERRUPT_MCINT 4 + INTSR1_CSINT, // CYGNUM_HAL_INTERRUPT_CSINT 5 + INTSR1_EINT1, // CYGNUM_HAL_INTERRUPT_EINT1 6 + INTSR1_EINT2, // CYGNUM_HAL_INTERRUPT_EINT2 7 + INTSR1_EINT3, // CYGNUM_HAL_INTERRUPT_EINT3 8 + INTSR1_TC1OI, // CYGNUM_HAL_INTERRUPT_TC1OI 9 + INTSR1_TC2OI, // CYGNUM_HAL_INTERRUPT_TC2OI 10 + INTSR1_RTCMI, // CYGNUM_HAL_INTERRUPT_RTCMI 11 + INTSR1_TINT, // CYGNUM_HAL_INTERRUPT_TINT 12 + INTSR1_UTXINT1, // CYGNUM_HAL_INTERRUPT_UTXINT1 13 + INTSR1_URXINT1, // CYGNUM_HAL_INTERRUPT_URXINT1 14 + INTSR1_UMSINT, // CYGNUM_HAL_INTERRUPT_UMSINT 15 + INTSR1_SSEOTI, // CYGNUM_HAL_INTERRUPT_SSEOTI 16 + INTSR2_KBDINT, // CYGNUM_HAL_INTERRUPT_KBDINT 17 + INTSR2_SS2RX, // CYGNUM_HAL_INTERRUPT_SS2RX 18 + INTSR2_SS2TX, // CYGNUM_HAL_INTERRUPT_SS2TX 19 + INTSR2_UTXINT2, // CYGNUM_HAL_INTERRUPT_UTXINT2 20 + INTSR2_URXINT2, // CYGNUM_HAL_INTERRUPT_URXINT2 21 +#if defined(__EDB7211) + INTSR3_MCPINT // CYGNUM_HAL_INTERRUPT_MCPINT 22 +#endif +}; + +static cyg_uint32 hal_interrupt_mask_regmap[] = { + 0, // CYGNUM_HAL_INTERRUPT_unused 0 + INTMR1, // CYGNUM_HAL_INTERRUPT_EXTFIQ 1 + INTMR1, // CYGNUM_HAL_INTERRUPT_BLINT 2 + INTMR1, // CYGNUM_HAL_INTERRUPT_WEINT 3 + INTMR1, // CYGNUM_HAL_INTERRUPT_MCINT 4 + INTMR1, // CYGNUM_HAL_INTERRUPT_CSINT 5 + INTMR1, // CYGNUM_HAL_INTERRUPT_EINT1 6 + INTMR1, // CYGNUM_HAL_INTERRUPT_EINT2 7 + INTMR1, // CYGNUM_HAL_INTERRUPT_EINT3 8 + INTMR1, // CYGNUM_HAL_INTERRUPT_TC1OI 9 + INTMR1, // CYGNUM_HAL_INTERRUPT_TC2OI 10 + INTMR1, // CYGNUM_HAL_INTERRUPT_RTCMI 11 + INTMR1, // CYGNUM_HAL_INTERRUPT_TINT 12 + INTMR1, // CYGNUM_HAL_INTERRUPT_UTXINT1 13 + INTMR1, // CYGNUM_HAL_INTERRUPT_URXINT1 14 + INTMR1, // CYGNUM_HAL_INTERRUPT_UMSINT 15 + INTMR1, // CYGNUM_HAL_INTERRUPT_SSEOTI 16 + INTMR2, // CYGNUM_HAL_INTERRUPT_KBDINT 17 + INTMR2, // CYGNUM_HAL_INTERRUPT_SS2RX 18 + INTMR2, // CYGNUM_HAL_INTERRUPT_SS2TX 19 + INTMR2, // CYGNUM_HAL_INTERRUPT_UTXINT2 20 + INTMR2, // CYGNUM_HAL_INTERRUPT_URXINT2 21 +#if defined(__EDB7211) + INTMR3, // CYGNUM_HAL_INTERRUPT_MCPINT 22 +#endif +}; + +static cyg_uint32 hal_interrupt_clear_map[] = { + 0, // CYGNUM_HAL_INTERRUPT_unused 0 + 0, // CYGNUM_HAL_INTERRUPT_EXTFIQ 1 + BLEOI, // CYGNUM_HAL_INTERRUPT_BLINT 2 + TEOI, // CYGNUM_HAL_INTERRUPT_WEINT 3 + MCEOI, // CYGNUM_HAL_INTERRUPT_MCINT 4 + COEOI, // CYGNUM_HAL_INTERRUPT_CSINT 5 + 0, // CYGNUM_HAL_INTERRUPT_EINT1 6 + 0, // CYGNUM_HAL_INTERRUPT_EINT2 7 + 0, // CYGNUM_HAL_INTERRUPT_EINT3 8 + TC1EOI, // CYGNUM_HAL_INTERRUPT_TC1OI 9 + TC2EOI, // CYGNUM_HAL_INTERRUPT_TC2OI 10 + RTCEOI, // CYGNUM_HAL_INTERRUPT_RTCMI 11 + TEOI, // CYGNUM_HAL_INTERRUPT_TINT 12 + 0, // CYGNUM_HAL_INTERRUPT_UTXINT1 13 + 0, // CYGNUM_HAL_INTERRUPT_URXINT1 14 + UMSEOI, // CYGNUM_HAL_INTERRUPT_UMSINT 15 + 0, // CYGNUM_HAL_INTERRUPT_SSEOTI 16 + KBDEOI, // CYGNUM_HAL_INTERRUPT_KBDINT 17 + 0, // CYGNUM_HAL_INTERRUPT_SS2RX 18 + 0, // CYGNUM_HAL_INTERRUPT_SS2TX 19 + 0, // CYGNUM_HAL_INTERRUPT_UTXINT2 20 + 0, // CYGNUM_HAL_INTERRUPT_URXINT2 21 +#if defined(__EDB7211) + 0, // CYGNUM_HAL_INTERRUPT_MCPINT 22 +#endif +}; + +static struct regmap { + int first_int, last_int; + cyg_uint32 stat_reg, mask_reg; +} hal_interrupt_status_regmap[] = { + { CYGNUM_HAL_INTERRUPT_EXTFIQ, CYGNUM_HAL_INTERRUPT_SSEOTI, INTSR1, INTMR1}, + { CYGNUM_HAL_INTERRUPT_KBDINT, CYGNUM_HAL_INTERRUPT_URXINT2, INTSR2, INTMR2}, +#if defined(__EDB7211) + { CYGNUM_HAL_INTERRUPT_MCPINT, CYGNUM_HAL_INTERRUPT_MCPINT, INTSR3, INTMR3}, +#endif + { 0, 0, 0} +}; + +#ifdef CYGHWR_HAL_ARM_EDB7XXX_BATLOW +// This ISR is called when the battery low interrupt occurs +int +cyg_hal_batlow_isr(cyg_vector_t vector, cyg_addrword_t data, HAL_SavedRegisters *regs) +{ + diag_printf("Battery low\n"); + cyg_drv_interrupt_mask(CYGNUM_HAL_INTERRUPT_BLINT); + // Presumably, one would leave this masked until the battery changed + cyg_drv_interrupt_acknowledge(CYGNUM_HAL_INTERRUPT_BLINT); + return 0; // No need to run DSR +} +#endif + +// +// Early stage hardware initialization +// Some initialization has already been done before we get here. For now +// just set up the interrupt environment. + +void hal_hardware_init(void) +{ + volatile cyg_uint32 *icr; + int vector; + // Clear and initialize instruction cache + HAL_ICACHE_INVALIDATE_ALL(); + HAL_ICACHE_ENABLE(); + // Any hardware/platform initialization that needs to be done. + *(volatile cyg_uint32 *)INTMR1 = 0; + *(volatile cyg_uint32 *)INTMR2 = 0; +#if !defined(__CL7111) + *(volatile cyg_uint32 *)INTMR3 = 0; + *(volatile cyg_uint8 *)SYSCON3 = SYSCON3_CLKCTL(CPU_CLOCK); +#endif +#if 0 + diag_printf("IMR1: %04x, IMR2: %04x\n", + *(volatile cyg_uint32 *)INTMR1, + *(volatile cyg_uint32 *)INTMR2); + diag_printf("Memcfg1: %08x, Memcfg2: %08x, DRAM refresh: %08x\n", + *(volatile cyg_uint32 *)MEMCFG1, + *(volatile cyg_uint32 *)MEMCFG2, + *(volatile cyg_uint8 *)DRFPR); +#endif + // Reset all interrupt masks (disable all interrupt sources) + for (vector = CYGNUM_HAL_ISR_MIN; vector < CYGNUM_HAL_ISR_COUNT; vector++) { + icr = (volatile cyg_uint32 *)hal_interrupt_clear_map[vector]; + if (icr) *icr = 0; // Just a write clears the latch + } + // Turn on the DIAG LED to let the world know the board is alive + *(volatile unsigned char *)LEDFLSH = LEDFLSH_ENABLE|LEDFLSH_DUTY(16)|LEDFLSH_PERIOD(1); +#ifdef CYGHWR_HAL_ARM_EDB7XXX_BATLOW + cyg_drv_interrupt_create(CYGNUM_HAL_INTERRUPT_BLINT, + 99, // Priority - what goes here? + 0, // Data item passed to interrupt handler + cyg_hal_batlow_isr, + 0, + &batlow_interrupt_handle, + &batlow_interrupt); + cyg_drv_interrupt_attach(batlow_interrupt_handle); + cyg_drv_interrupt_unmask(CYGNUM_HAL_INTERRUPT_BLINT); +#endif +} + +// +// This routine is called to respond to a hardware interrupt (IRQ). It +// should interrogate the hardware and return the IRQ vector number. + +// This code is a little convoluted to keep it general while still avoiding +// reading the hardware a lot, since the interrupt status is split across +// three separate registers. + +int hal_spurious_ints; + +int hal_IRQ_handler(void) +{ + struct regmap *map = hal_interrupt_status_regmap; + cyg_uint32 stat; + int vector; + while (map->first_int) { + stat = *(volatile cyg_uint32 *)map->stat_reg & *(volatile cyg_uint32 *)map->mask_reg; + for (vector = map->first_int; vector <= map->last_int; vector++) { + if (stat & hal_interrupt_bitmap[vector]) return vector; + } + map++; // Next interrupt status register + } + hal_spurious_ints++; + return CYGNUM_HAL_INTERRUPT_unused; // This shouldn't happen! +} + +// +// Interrupt control +// + +void hal_interrupt_mask(int vector) +{ + volatile cyg_uint32 *imr; + imr = (volatile cyg_uint32 *)hal_interrupt_mask_regmap[vector]; + *imr &= ~hal_interrupt_bitmap[vector]; +} + +void hal_interrupt_unmask(int vector) +{ + volatile cyg_uint32 *imr; + imr = (volatile cyg_uint32 *)hal_interrupt_mask_regmap[vector]; + *imr |= hal_interrupt_bitmap[vector]; +} + +void hal_interrupt_acknowledge(int vector) +{ + // Some interrupt sources have a register for this. + volatile cyg_uint8 *icr; + icr = (volatile cyg_uint8 *)hal_interrupt_clear_map[vector]; + if (icr) { + *icr = 0; // Any data clears interrupt + } +} + +void hal_interrupt_configure(int vector, int level, int up) +{ + // No interrupts are configurable on this hardware +} + +void hal_interrupt_set_level(int vector, int level) +{ + // No interrupts are configurable on this hardware +} + +/*------------------------------------------------------------------------*/ +// EOF hal_misc.c
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/edb7xxx/current/src/hal_diag.c @@ -0,0 +1,272 @@ +/*============================================================================= +// +// hal_diag.c +// +// HAL diagnostic output code +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg, gthomas +// Contributors:nickg, gthomas +// Date: 1998-03-02 +// Purpose: HAL diagnostic output +// Description: Implementations of HAL diagnostic output support. +// +//####DESCRIPTIONEND#### +// +//===========================================================================*/ + +#include <pkgconf/hal.h> +#include <pkgconf/system.h> +#include CYGBLD_HAL_PLATFORM_H + +#include <cyg/infra/cyg_type.h> // base types +#include <cyg/infra/cyg_trac.h> // tracing macros +#include <cyg/infra/cyg_ass.h> // assertion macros + +#include <cyg/hal/hal_arch.h> // basic machine info +#include <cyg/hal/hal_intr.h> // interrupt macros +#include <cyg/hal/hal_io.h> // IO macros +#include <cyg/hal/hal_diag.h> +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS +#include <cyg/hal/drv_api.h> +#include <cyg/hal/hal_stub.h> // cyg_hal_gdb_interrupt +#endif +#include <cyg/hal/hal_edb7xxx.h> // Hardware definitions + +#if CYGHWR_HAL_ARM_EDB7XXX_DIAG_PORT == 0 +#define CYG_DIAG_DEV_DATA UARTDR1 +#define CYG_DIAG_DEV_BLCR UBLCR1 +#define CYG_DIAG_DEV_STAT SYSFLG1 +#define CYG_DIAG_DEV_CTRL SYSCON1 +#define CYG_DIAG_DEV_INT CYGNUM_HAL_INTERRUPT_URXINT1 +#else +#define CYG_DIAG_DEV_DATA UARTDR2 +#define CYG_DIAG_DEV_STAT SYSFLG2 +#define CYG_DIAG_DEV_CTRL SYSCON2 +#define CYG_DIAG_DEV_BLCR UBLCR2 +#define CYG_DIAG_DEV_INT CYGNUM_HAL_INTERRUPT_URXINT2 +#endif + +// Assumption: all diagnostic output must be GDB packetized unless this is a ROM (i.e. +// totally stand-alone) system. + +#ifdef CYG_HAL_STARTUP_STUBS +#define CYG_HAL_STARTUP_ROM +#undef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS +#endif + +#if defined(CYG_HAL_STARTUP_ROM) && !defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS) +#define HAL_DIAG_USES_HARDWARE +#else +#if defined(CYGDGB_HAL_DIAG_DISABLE_GDB_PROTOCOL) +#define HAL_DIAG_USES_HARDWARE +#elif CYGHWR_HAL_ARM_EDB7XXX_DIAG_PORT != CYGHWR_HAL_ARM_EDB7XXX_GDB_PORT +#define HAL_DIAG_USES_HARDWARE +#endif +#endif + +/*---------------------------------------------------------------------------*/ +// EDB7XXX Serial Port (UARTx) for Debug + +// Actually send character down the wire +static void +hal_diag_write_char_serial(char c) +{ + cyg_uint32 stat; + // Wait for Tx FIFO not full + do { + stat = *(volatile cyg_uint32 *)CYG_DIAG_DEV_STAT; + } while ((stat & SYSFLG1_UTXFF1) != 0) ; + *(volatile cyg_uint8 *)CYG_DIAG_DEV_DATA = c; +} + +static bool +hal_diag_read_serial(char *c) +{ + long timeout = 1000000000; // A long time... + cyg_uint32 stat, val; + + do { + stat = *(volatile cyg_uint32 *)CYG_DIAG_DEV_STAT; + if (--timeout == 0) return false; + } while ((stat & SYSFLG1_URXFE1) != 0); + // Need to read 32 bits + val = *(volatile cyg_uint32 *)CYG_DIAG_DEV_DATA & 0xFF; + *c = val; + return true; +} + +#ifdef HAL_DIAG_USES_HARDWARE + +void hal_diag_init(void) +{ + static int init = 0; +#ifndef CYG_HAL_STARTUP_ROM + char *msg = "\n\rRAM EDB7XXX eCos\n\r"; +#endif + if (init++) return; + + // Enable port + *(volatile cyg_uint32 *)CYG_DIAG_DEV_CTRL |= SYSCON1_UART1EN; + // Configure + *(volatile cyg_uint32 *)CYG_DIAG_DEV_BLCR = + UART_BITRATE(CYGHWR_HAL_ARM_EDB7XXX_DIAG_BAUD) | + UBLCR_FIFOEN | UBLCR_WRDLEN8; +#ifndef CYG_HAL_STARTUP_ROM + while (*msg) hal_diag_write_char(*msg++); +#endif +} + +#ifndef CYG_HAL_STARTUP_ROM +#define DIAG_BUFSIZE 2048 +static char diag_buffer[DIAG_BUFSIZE]; +static int diag_bp = 0; +#endif + +void hal_diag_write_char(char c) +{ + hal_diag_init(); +#ifndef CYG_HAL_STARTUP_ROM + diag_buffer[diag_bp++] = c; + if (diag_bp == sizeof(diag_buffer)) diag_bp = 0; +#endif + hal_diag_write_char_serial(c); +} + +void hal_diag_read_char(char *c) +{ + while (!hal_diag_read_serial(c)) ; +} + +#else // HAL_DIAG relies on GDB + +// Initialize diag port +void hal_diag_init(void) +{ +#if 0 // Assume port is already setup + // Enable port + *(volatile cyg_uint32 *)CYG_DIAG_DEV_CTRL |= SYSCON1_UART1EN; + // Configure + *(volatile cyg_uint32 *)CYG_DIAG_DEV_BLCR = + UART_BITRATE(CYGHWR_HAL_ARM_EDB7XXX_DIAG_BAUD) | + UBLCR_FIFOEN | UBLCR_WRDLEN8; +#endif +} + +void +hal_diag_read_char(char *c) +{ + while (!hal_diag_read_serial(c)) ; +} + +void +hal_diag_write_char(char c) +{ + static char line[100]; + static int pos = 0; + + // No need to send CRs + if( c == '\r' ) return; + + line[pos++] = c; + + if( c == '\n' || pos == sizeof(line) ) + { + + CYG_INTERRUPT_STATE old; + + // Disable interrupts. This prevents GDB trying to interrupt us + // while we are in the middle of sending a packet. The serial + // receive interrupt will be seen when we re-enable interrupts + // later. + +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + CYG_HAL_GDB_ENTER_CRITICAL_IO_REGION(old); +#else + HAL_DISABLE_INTERRUPTS(old); +#endif + + while(1) + { + static char hex[] = "0123456789ABCDEF"; + cyg_uint8 csum = 0; + int i; + char c1; + + hal_diag_write_char_serial('$'); + hal_diag_write_char_serial('O'); + csum += 'O'; + for( i = 0; i < pos; i++ ) + { + char ch = line[i]; + char h = hex[(ch>>4)&0xF]; + char l = hex[ch&0xF]; + hal_diag_write_char_serial(h); + hal_diag_write_char_serial(l); + csum += h; + csum += l; + } + hal_diag_write_char_serial('#'); + hal_diag_write_char_serial(hex[(csum>>4)&0xF]); + hal_diag_write_char_serial(hex[csum&0xF]); + + // Wait for the ACK character '+' from GDB here and handle + // receiving a ^C instead. This is the reason for this clause + // being a loop. + if (!hal_diag_read_serial(&c1)) + continue; // No response - try sending packet again + + if( c1 == '+' ) + break; // a good acknowledge + +#ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT + cyg_drv_interrupt_acknowledge(CYG_DIAG_DEV_INT); + if( c1 == 3 ) { + // Ctrl-C: breakpoint. + cyg_hal_gdb_interrupt (__builtin_return_address(0)); + break; + } +#endif + // otherwise, loop round again + } + + pos = 0; + + + // And re-enable interrupts +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + CYG_HAL_GDB_LEAVE_CRITICAL_IO_REGION(old); +#else + HAL_RESTORE_INTERRUPTS(old); +#endif + + } +} +#endif + +/*---------------------------------------------------------------------------*/ +/* End of hal_diag.c */
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/edb7xxx/current/src/plf_stub.c @@ -0,0 +1,157 @@ +//============================================================================= +// +// plf_stub.c +// +// Platform specific code for GDB stub support. +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998, 1999 Cygnus Solutions. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors:gthomas, jskov +// Date: 1999-04-21 +// Purpose: Platform specific code for GDB stub support. +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include <pkgconf/hal.h> +#include <pkgconf/system.h> +#include CYGBLD_HAL_PLATFORM_H + +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + +#include <cyg/hal/hal_stub.h> + +#include <cyg/hal/hal_io.h> // HAL IO macros +#include <cyg/hal/hal_edb7xxx.h> // Hardware definitions +#ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT +#include <cyg/hal/hal_intr.h> // HAL interrupt macros +#include <cyg/hal/drv_api.h> // HAL ISR support +#endif + +#if CYGHWR_HAL_ARM_EDB7XXX_GDB_PORT == 0 +#define CYG_GDB_DEV_DATA UARTDR1 +#define CYG_GDB_DEV_BLCR UBLCR1 +#define CYG_GDB_DEV_STAT SYSFLG1 +#define CYG_GDB_DEV_CTRL SYSCON1 +#define CYG_GDB_DEV_INT CYGNUM_HAL_INTERRUPT_URXINT1 +#else +#define CYG_GDB_DEV_DATA UARTDR2 +#define CYG_GDB_DEV_STAT SYSFLG2 +#define CYG_GDB_DEV_CTRL SYSCON2 +#define CYG_GDB_DEV_BLCR UBLCR2 +#define CYG_GDB_DEV_INT CYGNUM_HAL_INTERRUPT_URXINT2 +#endif + +#ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT +static cyg_interrupt gdb_interrupt; +static cyg_handle_t gdb_interrupt_handle; +#endif + +//----------------------------------------------------------------------------- +#ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT + +// This ISR is called only for serial receive interrupts. +int +cyg_hal_gdb_isr(cyg_vector_t vector, cyg_addrword_t data, HAL_SavedRegisters *regs) +{ + cyg_uint8 c; + + c = hal_edb7xxx_get_char(); // Fetch the character + if( 3 == c ) { // ^C + // Ctrl-C: set a breakpoint at PC so GDB will display the + // correct program context when stopping rather than the + // interrupt handler. + cyg_hal_gdb_interrupt (regs->pc); + cyg_drv_interrupt_acknowledge(CYG_GDB_DEV_INT); + } + return 0; // No need to run DSR +} + +int +hal_edb7xxx_interruptible(int state) +{ + if (state) { + cyg_drv_interrupt_unmask(CYG_GDB_DEV_INT); + } else { + cyg_drv_interrupt_mask(CYG_GDB_DEV_INT); + } + + return 0; +} +#endif + +// Initialize the current serial port. +void hal_edb7xxx_init_serial(void) +{ + // Enable port + *(volatile cyg_uint32 *)CYG_GDB_DEV_CTRL |= SYSCON1_UART1EN; + // Configure + *(volatile cyg_uint32 *)CYG_GDB_DEV_BLCR = + UART_BITRATE(CYGHWR_HAL_ARM_EDB7XXX_GDB_BAUD) | + UBLCR_FIFOEN | UBLCR_WRDLEN8; + +#ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT + cyg_drv_interrupt_create(CYG_GDB_DEV_INT, + 99, // Priority - what goes here? + 0, // Data item passed to interrupt handler + cyg_hal_gdb_isr, + 0, + &gdb_interrupt_handle, + &gdb_interrupt); + cyg_drv_interrupt_attach(gdb_interrupt_handle); + cyg_drv_interrupt_unmask(CYG_GDB_DEV_INT); +#endif +} + +// Write C to the current serial port. +void hal_edb7xxx_put_char(int c) +{ + cyg_uint32 stat; + // Wait for Tx FIFO not full + do { + stat = *(volatile cyg_uint32 *)CYG_GDB_DEV_STAT; + } while ((stat & SYSFLG1_UTXFF1) != 0) ; + *(volatile cyg_uint32 *)CYG_GDB_DEV_DATA = c; +} + +// Read one character from the current serial port. +int hal_edb7xxx_get_char(void) +{ + cyg_uint32 stat, val; + do { + stat = *(volatile cyg_uint32 *)CYG_GDB_DEV_STAT; + } while ((stat & SYSFLG1_URXFE1) != 0); + // Need to read 32 bits + val = *(volatile cyg_uint32 *)CYG_GDB_DEV_DATA & 0xFF; + return val; +} + +#endif // ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS +//----------------------------------------------------------------------------- +// End of plf_stub.c
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/edb7xxx/current/support/Makefile @@ -0,0 +1,13 @@ +# +# eCos support tools for EP7211 +# + +DL_FILES = dl_7211.o io.o +ALL := dl_7211 + + +all: $(ALL) + +dl_7211: $(DL_FILES) + $(CC) -o $@ $(DL_FILES) +
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new file mode 100644 --- /dev/null +++ b/packages/hal/arm/edb7xxx/current/support/dl_edb7xxx.c @@ -0,0 +1,411 @@ +//**************************************************************************** +// +// DOWNLOAD.C - Automates the download of code into the flash on the +// CL-PS7111-DK-D2 board. +// +// Copyright (c) 1999 Cirrus Logic, Inc. +// +// Adapted for Linux by Cygnus Solutions, Inc. +// Renamed 'dl_edb7xxx' to indicate support for all Cirrus Logic eval boards. +// +//**************************************************************************** +#include <stdio.h> +#include "bootcode.h" + +#define DEFAULT_PORT "/dev/ttyS1" +extern char ReceiveChar(long); +extern void SendChar(long, char); +extern void SetBaud(long, long); +extern int CharRead(long port); +extern void WaitForOutputReady(long port); +extern long OpenPort(char *); + +//**************************************************************************** +// +// WaitFor waits until a specific character is read from the comm port. +// +//**************************************************************************** +void +WaitFor(long lPort, char cWaitChar) +{ + char cChar; + + // + // Wait until we read a specific character from the comm port. + // + while(1) + { + // + // Read a character. + // + cChar = ReceiveChar(lPort); + + // + // Stop waiting if we received the character. + // + if(cChar == cWaitChar) + { + break; + } + } +} + +//**************************************************************************** +// +// This program waits for the '<' character from the boot ROM, sends the boot +// code, waits for the '>' from the boot ROM, waits for the '?' from the boot +// code, changes the serial port rate (preferably to 115200), downloads the +// user data file, and then prints out progress status as the boot code writes +// the user data file to the flash. +// +//**************************************************************************** +void +main(int argc, char *argv[]) +{ + long lPort; + long lRate = 38400; + long lFileSize, lIdx; + char cChar, cFirstChar, *pcFile, cRateChar; + FILE *pFile; + + // + // Make sure that a filename was specified. + // + if(argc < 2) + { + fprintf(stderr, "Usage: %s <filename> {<baud rate> {<comm port>}}\n", argv[0]); + return; + } + + // + // If a baud rate was specified, then read it and make sure it is valid. + // + if(argc > 2) + { + lRate = atoi(argv[2]); + if((lRate != 9600) && (lRate != 19200) && (lRate != 28800) && + (lRate != 38400) && (lRate != 57600) && (lRate != 115200)) + { + fprintf(stderr, "Invalid baud rate: %d(%s).\n", lRate, argv[2]); + return; + } + } + + // + // If a comm port was specified, then read it and make sure it is valid. + // + if(argc > 3) + { + lPort = OpenPort(argv[3]); + } else + { + lPort = OpenPort(DEFAULT_PORT); + } + if (lPort < 0) + { + fprintf(stderr, "Can't open port: %s\n", argv[3]); + return; + } + + // + // Open the file to be downloaded. + // + pFile = fopen(argv[1], "rb"); + if(!pFile) + { + fprintf(stderr, "Could not open file '%s'.\n", argv[1]); + return; + } + + // + // Get the size of the file. + // + fseek(pFile, 0, SEEK_END); + lFileSize = ftell(pFile); + fseek(pFile, 0, SEEK_SET); + + // + // Allocate memory to hold the file contents. + // + pcFile = (char *)malloc(lFileSize); + if(!pcFile) + { + fprintf(stderr, "Failed to allocate memory for the file.\n"); + return; + } + + // + // Read the contents of the file into memory. + // + if(fread(pcFile, 1, lFileSize, pFile) != lFileSize) + { + fprintf(stderr, "Failed to read file '%s'.\n", argv[1]); + return; + } + + // + // Close the file. + // + fclose(pFile); + + // + // Get the baud rate divisor for the given baud rate. + // + SetBaud(lPort, 9600); + switch(lRate) + { + case 9600: + { + cRateChar = '0'; + break; + } + + case 19200: + { + cRateChar = '1'; + break; + } + + case 28800: + { + cRateChar = '2'; + break; + } + + case 38400: + { + cRateChar = '3'; + break; + } + + case 57600: + { + cRateChar = '4'; + break; + } + + case 115200: + { + cRateChar = '5'; + break; + } + } + + // + // Empty out the input queue. + // + while(CharReady(lPort)) + { + cChar = ReceiveChar(lPort); + } + + // + // Tell the user to reset the board. + // + fprintf(stderr, "Waiting for the board to wakeup..."); + + // + // Wait until we read a '<' from the comm port. + // + WaitFor(lPort, '<'); + + // + // Tell the user that we are downloading the boot code. + // + fprintf(stderr, "\nDownloading boot code...( 0%%)"); + + // + // Write the boot code to the comm port. + // + for(lIdx = 0; lIdx < 2048; lIdx++) + { + // + // Write this character. + // + SendChar(lPort, pcBoot[lIdx]); + + // + // Periodically print out our progress. + // + if((lIdx & 127) == 127) + { + fprintf(stderr, "\b\b\b\b\b%3d%%)", ((lIdx + 1) * 100) / 2048); + } + } + + // + // Wait until we read a '>' from the comm port. + // + WaitFor(lPort, '>'); + + // + // Wait until we read a '?' from the comm port. + // + WaitFor(lPort, '?'); + + // + // Tell the boot code to switch to the desired baud rate. + // + SendChar(lPort, 'B'); + SendChar(lPort, cRateChar); + + // + // Wait until the output buffer is empty. + // + WaitForOutputEmpty(); + + // + // Switch our baud rate to the desired rate. + // + SetBaud(lPort, lRate); + + // + // Send a '-' character until we receive back a '?' character. + // + while(1) + { + // + // Send a '-' character. + // + SendChar(lPort, '-'); + + // + // Wait a little bit. + // + for(lIdx = 0; lIdx < 1024 * 1024; lIdx++) + { + } + + // + // See if there is a character waiting to be read. + // + if(CharReady(lPort)) + { + // + // Read the character. + // + cChar = ReceiveChar(lPort); + + // + // Quit waiting if this is a '?'. + // + if(cChar == '?') + { + break; + } + } + } + + // + // Empty out the input queue. + // + while(CharReady(lPort)) + { + cChar = ReceiveChar(lPort); + } + + // + // Send the program flash command. + // + SendChar(lPort, 'F'); + + // + // We always program the flash at location 0. + // + SendChar(lPort, 0); + SendChar(lPort, 0); + SendChar(lPort, 0); + SendChar(lPort, 0); + + // + // Send the length of the data file. + // + SendChar(lPort, (char)(lFileSize & 0xFF)); + SendChar(lPort, (char)((lFileSize >> 8) & 0xFF)); + SendChar(lPort, (char)((lFileSize >> 16) & 0xFF)); + SendChar(lPort, (char)((lFileSize >> 24) & 0xFF)); + + // + // Tell the user that we are downloading the file data. + // + fprintf(stderr, "\nDownloading file data...( 0%%)"); + + // + // Send the actual data in the file. + // + for(lIdx = 0; lIdx < lFileSize; lIdx++) + { + // + // Send this byte. + // + SendChar(lPort, pcFile[lIdx]); + + // + // Periodically print out our progress. + // + if((lIdx & 127) == 127) + { + fprintf(stderr, "\b\b\b\b\b%3d%%)", ((lIdx + 1) * 100) / lFileSize); + } + } + + // + // Tell the user that we are erasing the flash. + // + fprintf(stderr, "\nErasing the flash...( 0%%)"); + + // + // Wait until the flash has been erased. + // + cFirstChar = cChar = ReceiveChar(lPort); + while(cChar != '1') + { + // + // Print out our progress. + // + fprintf(stderr, "\b\b\b\b\b%3d%%)", + ((cFirstChar - cChar + 1) * 100) / (cFirstChar - '0')); + + // + // Read a character from the boot code. + // + cChar = ReceiveChar(lPort); + } + + // + // Tell the user that we are programming the flash. + // + fprintf(stderr, "\nProgramming the flash...( 0%%)"); + + // + // Wait until the flash has been programmed. + // + lIdx = 0; + while(1) + { + // + // Read a character from the boot code. + // + cChar = ReceiveChar(lPort); + + // + // If the character is a '?', then we are done. + // + if(cChar == '?') + { + break; + } + + // + // Print out our progress. + // + fprintf(stderr, "\b\b\b\b\b%3d%%)", + (++lIdx * 100) / ((lFileSize + 1023) / 1024)); + } + + // + // Tell the user we are done. + // + fprintf(stderr, "\nSuccessfully downloaded '%s'.\n", argv[1]); +} +
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/edb7xxx/current/support/io.c @@ -0,0 +1,151 @@ +//========================================================================== +// +// io.c +// +// Linux I/O support for Cirrus Logic EDB7xxx eval board tools +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 1999-06-16 +// Description: Linux I/O support for Cirrus Logic EDB7xxx FLASH tools +//####DESCRIPTIONEND#### + +// +// io.c - I/O functions +// + +#include <stdio.h> +#include <sys/ioctl.h> +#include <fcntl.h> +#include <termios.h> + +char ReceiveChar(long port) +{ + char buf; + int res; + // Port is in non-blocking mode, this needs to have a loop + do { + res = read(port, &buf, 1); + } while (res < 0); +// printf("Read: %c\n", buf); + return buf; +} + +static void +uspin(int len) +{ + volatile int cnt; + while (--len >= 0) { + for (cnt = 1; cnt < 2000; cnt++) ; + } +} + +void SendChar(long port, char ch) +{ + char buf = ch; + write(port, &buf, 1); +// printf("Send: %x\n", ch); +// usleep(100); + uspin(100); +} + +void SetBaud(long port, long reqRate) +{ + struct termios buf; + int rate; + + // Get original configuration + if (tcgetattr(port, &buf)) { + fprintf(stderr, "Can't get port config\n"); + return; + } + + // Reset to raw. + buf.c_iflag &= ~(IGNBRK|BRKINT|PARMRK|ISTRIP + |INLCR|IGNCR|ICRNL|IXON); + buf.c_oflag &= ~OPOST; + buf.c_lflag &= ~(ECHO|ECHONL|ICANON|ISIG|IEXTEN); + buf.c_cflag &= ~(CSIZE|PARENB); + buf.c_cflag |= CS8; + + // Set baud rate. + switch (reqRate) { + case 9600: + rate = B9600; + break; + case 38400: + rate = B38400; + break; + case 57600: + rate = B57600; + break; + case 115200: + rate = B115200; + break; + } + cfsetispeed(&buf, rate); + cfsetospeed(&buf, rate); + + // Set data bits. + buf.c_cflag &= ~CSIZE; + buf.c_cflag |= CS8; + + // Set stop bits. + buf.c_cflag &= ~CSTOPB; // One stop + + // Set parity. + buf.c_cflag &= ~(PARENB | PARODD); // no parity. + + // Set the new settings + if (tcsetattr(port, TCSADRAIN, &buf)) { + fprintf(stderr, "Error: tcsetattr\n"); + return; + } + + tcdrain(port); + usleep(1000000/10*2); +} + +int CharReady(long port) +{ + int n, res; + res = ioctl(port, FIONREAD, &n); + return n; // Non-zero if characters ready to read +} + +void WaitForOutputEmpty(long port) +{ + usleep(2000000); +} + +long OpenPort(char *name) +{ + int fd; + fd = open(name, O_RDWR|O_NONBLOCK); + return fd; +}
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/edb7xxx/current/tests/PKGconf.mak @@ -0,0 +1,39 @@ +#=============================================================================== +# +# makefile +# +# kernel/tests +# +#=============================================================================== +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Cygnus eCos Public License +# Version 1.0 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://sourceware.cygnus.com/ecos +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Cygnus Operating System, released +# September 30, 1998. +# +# The Initial Developer of the Original Code is Cygnus. Portions created +# by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +#=============================================================================== + +PACKAGE := hal_arm_edb7xxx +include ../../../../../pkgconf/pkgconf.mak + +TESTS := dram_test + +include $(COMPONENT_REPOSITORY)/pkgconf/makrules.tst + + +
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/edb7xxx/current/tests/dram_test.c @@ -0,0 +1,316 @@ +//========================================================================== +// +// dram_test.c +// +// eCos generic DRAM test code +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 1999-10-22 +// Description: Tool used to test DRAM on eval boards +//####DESCRIPTIONEND#### + +#include <pkgconf/kernel.h> // Configuration header +#include <cyg/kernel/kapi.h> +#include <cyg/infra/diag.h> + +#include <cyg/hal/hal_arch.h> +#include CYGHWR_MEMORY_LAYOUT_H // Memory layout + +#ifndef FALSE +#define FALSE 0 +#define TRUE 1 +#endif + +#define STACK_SIZE CYGNUM_HAL_STACK_SIZE_MINIMUM +static char stack[STACK_SIZE]; +static cyg_thread thread_data; +static cyg_handle_t thread_handle; + +extern char _end; +int total_errors; +int run_errors; +int error_count; +#define MAX_ERRORS 5 +#define NUM_RUNS 25 +#define REFRESH_TIME 5 + +int decay_time[] = { 50, 100, 200, 500, 1000 }; +#define NUM_DECAY sizeof(decay_time)/sizeof(decay_time[0]) + +// FUNCTIONS + +static void +cyg_test_exit(void) +{ + while (TRUE) ; +} + +static void +new_test(void) +{ + error_count = 0; +} + +static void +report_error(void *addr, cyg_uint32 actual, cyg_uint32 expected) +{ + total_errors++; + run_errors++; + if (++error_count > MAX_ERRORS) return; + diag_printf(" 0x%08x: expected - 0x%08x, actual - 0x%08x\n", + addr, expected, actual); +} + +// Fill longwords with their own address and verify + +static void +addr_test(cyg_uint32 start, cyg_uint32 end) +{ + cyg_uint32 *mp; + + new_test(); + diag_printf("-- Address test\n"); + for (mp = (cyg_uint32 *)start; mp < (cyg_uint32 *)end; mp++) { + *mp = (cyg_uint32)mp; + } + for (mp = (cyg_uint32 *)start; mp < (cyg_uint32 *)end; mp++) { + if (*mp != (cyg_uint32)mp) { + report_error(mp, *mp, (cyg_uint32)mp); + } + } +} + +// Fill longwords with zeros + +static void +zeros_test(cyg_uint32 start, cyg_uint32 end) +{ + cyg_uint32 *mp; + + new_test(); + diag_printf("-- Zeros test\n"); + for (mp = (cyg_uint32 *)start; mp < (cyg_uint32 *)end; mp++) { + *mp = (cyg_uint32)0; + } + for (mp = (cyg_uint32 *)start; mp < (cyg_uint32 *)end; mp++) { + if (*mp != (cyg_uint32)0) { + report_error(mp, *mp, (cyg_uint32)0); + } + } +} + +// Fill longwords with all ones + +static void +ones_test(cyg_uint32 start, cyg_uint32 end) +{ + cyg_uint32 *mp; + + new_test(); + diag_printf("-- Ones test\n"); + for (mp = (cyg_uint32 *)start; mp < (cyg_uint32 *)end; mp++) { + *mp = (cyg_uint32)0xFFFFFFFF; + } + for (mp = (cyg_uint32 *)start; mp < (cyg_uint32 *)end; mp++) { + if (*mp != (cyg_uint32)0xFFFFFFFF) { + report_error(mp, *mp, (cyg_uint32)0xFFFFFFFF); + } + } +} + +// Fill longwords with a "walking" bit + +static void +walking_bit_test(cyg_uint32 start, cyg_uint32 end) +{ + cyg_uint32 *mp; + cyg_uint32 bit; + + new_test(); + diag_printf("-- Walking test\n"); + bit = 1; + for (mp = (cyg_uint32 *)start; mp < (cyg_uint32 *)end; mp++) { + *mp = (cyg_uint32)bit; + bit <<= 1; + if (bit == 0) bit = 1; + } + bit = 1; + for (mp = (cyg_uint32 *)start; mp < (cyg_uint32 *)end; mp++) { + if (*mp != (cyg_uint32)bit) { + report_error(mp, *mp, (cyg_uint32)bit); + } + bit <<= 1; + if (bit == 0) bit = 1; + } +} + +// Fill longwords with an alternating pattern + +static void +pattern_test(cyg_uint32 start, cyg_uint32 end) +{ + cyg_uint32 *mp; + cyg_uint32 pat; + + new_test(); + diag_printf("-- Pattern test\n"); + pat = 0x55555555; + for (mp = (cyg_uint32 *)start; mp < (cyg_uint32 *)end; mp++) { + *mp = (cyg_uint32)pat; + } + for (mp = (cyg_uint32 *)start; mp < (cyg_uint32 *)end; mp++) { + if (*mp != (cyg_uint32)pat) { + report_error(mp, *mp, (cyg_uint32)pat); + } + } + pat = 0xAAAAAAAA; + for (mp = (cyg_uint32 *)start; mp < (cyg_uint32 *)end; mp++) { + *mp = (cyg_uint32)pat; + } + for (mp = (cyg_uint32 *)start; mp < (cyg_uint32 *)end; mp++) { + if (*mp != (cyg_uint32)pat) { + report_error(mp, *mp, (cyg_uint32)pat); + } + } +} + +// Verify if refresh works + +static void +refresh_test(cyg_uint32 start, cyg_uint32 end) +{ + cyg_uint32 *mp; + cyg_uint32 pat; + + new_test(); + diag_printf("-- Refresh test\n"); + pat = 0x55555555; + for (mp = (cyg_uint32 *)start; mp < (cyg_uint32 *)end; mp++) { + *mp = (cyg_uint32)pat; + } + cyg_thread_delay(REFRESH_TIME*100); + for (mp = (cyg_uint32 *)start; mp < (cyg_uint32 *)end; mp++) { + if (*mp != (cyg_uint32)pat) { + report_error(mp, *mp, (cyg_uint32)pat); + } + } + pat = 0xAAAAAAAA; + for (mp = (cyg_uint32 *)start; mp < (cyg_uint32 *)end; mp++) { + *mp = (cyg_uint32)pat; + } + cyg_thread_delay(REFRESH_TIME*100); + for (mp = (cyg_uint32 *)start; mp < (cyg_uint32 *)end; mp++) { + if (*mp != (cyg_uint32)pat) { + report_error(mp, *mp, (cyg_uint32)pat); + } + } +} + +// See how long we can "sleep" before refresh fails + +static void +decay_test(cyg_uint32 start, cyg_uint32 end) +{ + cyg_uint32 *mp; + cyg_uint32 pat; + int i; + + diag_printf("-- Decay test\n"); + for (i = 0; i < NUM_DECAY; i++) { + diag_printf(" ... %d.%02d sec delay\n", decay_time[i]/100, decay_time[i]%100); + new_test(); + pat = 0x55555555; + for (mp = (cyg_uint32 *)start; mp < (cyg_uint32 *)end; mp++) { + *mp = (cyg_uint32)pat; + } + cyg_thread_delay(decay_time[i]); + for (mp = (cyg_uint32 *)start; mp < (cyg_uint32 *)end; mp++) { + if (*mp != (cyg_uint32)pat) { + report_error(mp, *mp, (cyg_uint32)pat); + } + } + pat = 0xAAAAAAAA; + for (mp = (cyg_uint32 *)start; mp < (cyg_uint32 *)end; mp++) { + *mp = (cyg_uint32)pat; + } + cyg_thread_delay(decay_time[i]); + for (mp = (cyg_uint32 *)start; mp < (cyg_uint32 *)end; mp++) { + if (*mp != (cyg_uint32)pat) { + report_error(mp, *mp, (cyg_uint32)pat); + } + } + diag_printf(" ... %d errors\n", error_count); + } +} + + +static void +dram_exercise(cyg_addrword_t p) +{ + cyg_uint32 start_DRAM, end_DRAM; + int i; + + end_DRAM = CYGMEM_REGION_ram+CYGMEM_REGION_ram_SIZE; + start_DRAM = ((cyg_uint32)&_end + 0x00000FFF) & 0xFFFFF000; + diag_printf("DRAM test - start: 0x%08x, end: 0x%08x\n", start_DRAM, end_DRAM); + + for (i = 0; i < NUM_RUNS; i++) { + diag_printf("\n*** Start run #%d of %d\n", i+1, NUM_RUNS); + run_errors = 0; + addr_test(start_DRAM, end_DRAM); + ones_test(start_DRAM, end_DRAM); + zeros_test(start_DRAM, end_DRAM); + walking_bit_test(start_DRAM, end_DRAM); + pattern_test(start_DRAM, end_DRAM); + refresh_test(start_DRAM, end_DRAM); + decay_test(start_DRAM, end_DRAM); + diag_printf("\n*** End run, %d errors, %d total errors\n", run_errors, total_errors); + } + + diag_printf("All done!\n"); + cyg_test_exit(); +} + +externC void +cyg_start( void ) +{ + // Create a main thread, so we can run the scheduler and have time 'pass' + cyg_thread_create(10, // Priority - just a number + dram_exercise, // entry + 0, // entry parameter + "DRAM test", // Name + &stack[0], // Stack + STACK_SIZE, // Size + &thread_handle, // Handle + &thread_data // Thread data structure + ); + cyg_thread_resume(thread_handle); // Start it + cyg_scheduler_start(); +} // cyg_package_start() +
--- a/packages/hal/arm/pid/current/ChangeLog +++ b/packages/hal/arm/pid/current/ChangeLog @@ -1,3 +1,33 @@ +1999-11-09 Gary Thomas <gthomas@cygnus.co.uk> + + * include/pkgconf/mlt_arm_pidBE_ram.h: + * include/pkgconf/mlt_arm_pidBE_rom.h: + * include/pkgconf/mlt_arm_pidTBE_ram.h: + * include/pkgconf/mlt_arm_pidTBE_rom.h: + * include/pkgconf/mlt_arm_pidT_ram.h: + * include/pkgconf/mlt_arm_pidT_rom.h: + * include/pkgconf/mlt_arm_pid_ram.h: + * include/pkgconf/mlt_arm_pid_rom.h: New file(s). + + * include/pkgconf/mlt_arm_pidBE_ram.ldi: + * include/pkgconf/mlt_arm_pidBE_ram.mlt: + * include/pkgconf/mlt_arm_pidBE_rom.ldi: + * include/pkgconf/mlt_arm_pidBE_rom.mlt: + * include/pkgconf/mlt_arm_pidTBE_ram.ldi: + * include/pkgconf/mlt_arm_pidTBE_ram.mlt: + * include/pkgconf/mlt_arm_pidTBE_rom.ldi: + * include/pkgconf/mlt_arm_pidTBE_rom.mlt: + * include/pkgconf/mlt_arm_pidT_ram.ldi: + * include/pkgconf/mlt_arm_pidT_ram.mlt: + * include/pkgconf/mlt_arm_pidT_rom.ldi: + * include/pkgconf/mlt_arm_pidT_rom.mlt: + * include/pkgconf/mlt_arm_pid_ram.ldi: + * include/pkgconf/mlt_arm_pid_ram.mlt: + * include/pkgconf/mlt_arm_pid_rom.ldi: + * include/pkgconf/mlt_arm_pid_rom.mlt: Update with correct memory layout. + + * src/hal_diag.c: Honor GDB_DISABLE option. + 1999-10-29 Jesper Skov <jskov@cygnus.co.uk> * misc/PKGconf.mak: Also generate stripped .img files.
--- a/packages/hal/arm/pid/current/include/pkgconf/mlt_arm_pid9_stubs.mlt +++ b/packages/hal/arm/pid/current/include/pkgconf/mlt_arm_pid9_stubs.mlt @@ -1,4 +1,4 @@ -version 0 +!version 0 region ram 800 3800 0 ! region rom 4000000 80000 1 ! section data 0 1 1 1 1 1 0 0 800 bss !
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/pid/current/include/pkgconf/mlt_arm_pidBE_ram.h @@ -0,0 +1,13 @@ +// eCos memory layout - Tue Nov 09 06:57:37 1999 + +// This is a generated file - do not edit + +#include <cyg/infra/cyg_type.h> +#include <stddef.h> + +#define CYGMEM_REGION_ram (0) +#define CYGMEM_REGION_ram_SIZE (0x80000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) +extern char CYG_LABEL_NAME (_reserved) []; +#define CYGMEM_SECTION_reserved (CYG_LABEL_NAME (_reserved)) +#define CYGMEM_SECTION_reserved_SIZE (0x4000)
--- a/packages/hal/arm/pid/current/include/pkgconf/mlt_arm_pidBE_ram.ldi +++ b/packages/hal/arm/pid/current/include/pkgconf/mlt_arm_pidBE_ram.ldi @@ -1,40 +1,17 @@ -//=========================================================================== -// -// MLT linker script export - Tue Jan 13 10:14:27 1999 -// -//=========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//=========================================================================== +// eCos memory layout - Tue Nov 09 06:57:37 1999 + +// This is a generated file - do not edit MEMORY { - ram : ORIGIN = 0x00004000, LENGTH = 0x7C000 + ram : ORIGIN = 0, LENGTH = 0x80000 } SECTIONS { SECTIONS_BEGIN - SECTION_rom_vectors (ram, 0x4000, LMA_EQ_VMA) + __reserved = 0; . = __reserved + 0x4000; + SECTION_rom_vectors (ram, ALIGN (0x1), LMA_EQ_VMA) SECTION_text (ram, ALIGN (0x1), LMA_EQ_VMA) SECTION_fini (ram, ALIGN (0x1), LMA_EQ_VMA) SECTION_rodata (ram, ALIGN (0x1), LMA_EQ_VMA)
--- a/packages/hal/arm/pid/current/include/pkgconf/mlt_arm_pidBE_ram.mlt +++ b/packages/hal/arm/pid/current/include/pkgconf/mlt_arm_pidBE_ram.mlt @@ -1,6 +1,7 @@ version 0 -region ram 4000 7c000 0 ! -section rom_vectors 0 1 0 1 1 1 1 1 4000 4000 text text ! +region ram 0 80000 0 ! +section reserved 4000 1 0 0 1 1 1 1 0 0 rom_vectors rom_vectors ! +section rom_vectors 0 1 0 1 0 1 0 1 text text ! section text 0 1 0 1 0 1 0 1 fini fini ! section fini 0 1 0 1 0 1 0 1 rodata rodata ! section rodata 0 1 0 1 0 1 0 1 rodata1 rodata1 !
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/pid/current/include/pkgconf/mlt_arm_pidBE_rom.h @@ -0,0 +1,16 @@ +// eCos memory layout - Tue Nov 09 06:59:24 1999 + +// This is a generated file - do not edit + +#include <cyg/infra/cyg_type.h> +#include <stddef.h> + +#define CYGMEM_REGION_ram (0) +#define CYGMEM_REGION_ram_SIZE (0x80000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) +#define CYGMEM_REGION_rom (0x4000000) +#define CYGMEM_REGION_rom_SIZE (0x80000) +#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R) +extern char CYG_LABEL_NAME (_reserved) []; +#define CYGMEM_SECTION_reserved (CYG_LABEL_NAME (_reserved)) +#define CYGMEM_SECTION_reserved_SIZE (0x800)
--- a/packages/hal/arm/pid/current/include/pkgconf/mlt_arm_pidBE_rom.ldi +++ b/packages/hal/arm/pid/current/include/pkgconf/mlt_arm_pidBE_rom.ldi @@ -1,37 +1,11 @@ -//=========================================================================== -// -// MLT linker script export - Tue Jan 13 10:14:27 1999 -// -//=========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//=========================================================================== +// eCos memory layout - Tue Nov 09 06:59:24 1999 -// Modified for ARM/PID7T, generic ROM image +// This is a generated file - do not edit MEMORY { - rom : ORIGIN = 0x04000000, LENGTH = 0x80000 - ram : ORIGIN = 0x00000800, LENGTH = 0x7F800 + ram : ORIGIN = 0, LENGTH = 0x80000 + rom : ORIGIN = 0x4000000, LENGTH = 0x80000 } SECTIONS @@ -44,8 +18,8 @@ SECTIONS SECTION_rodata1 (rom, ALIGN (0x1), LMA_EQ_VMA) SECTION_fixup (rom, ALIGN (0x1), LMA_EQ_VMA) SECTION_gcc_except_table (rom, ALIGN (0x1), LMA_EQ_VMA) - SECTION_data (ram, 0x800, FOLLOWING (.gcc_except_table)) + __reserved = 0; . = __reserved + 0x800; + SECTION_data (ram, ALIGN (0x1), FOLLOWING (.gcc_except_table)) SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA) SECTIONS_END } -
--- a/packages/hal/arm/pid/current/include/pkgconf/mlt_arm_pidBE_rom.mlt +++ b/packages/hal/arm/pid/current/include/pkgconf/mlt_arm_pidBE_rom.mlt @@ -1,7 +1,8 @@ version 0 -region ram 800 7f800 0 ! +region ram 0 80000 0 ! region rom 4000000 80000 1 ! -section data 0 1 1 1 1 1 0 0 800 bss ! +section reserved 800 1 0 0 1 1 1 0 0 0 data ! +section data 0 1 1 1 0 1 0 0 bss ! section bss 0 4 0 1 0 0 0 0 ! section rom_vectors 0 1 0 1 1 1 1 1 4000000 4000000 text text ! section text 0 1 0 1 0 1 0 1 fini fini !
--- a/packages/hal/arm/pid/current/include/pkgconf/mlt_arm_pidBE_stubs.ldi +++ b/packages/hal/arm/pid/current/include/pkgconf/mlt_arm_pidBE_stubs.ldi @@ -20,7 +20,7 @@ // September 30, 1998. // // The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights reserved. // ------------------------------------------- // //####COPYRIGHTEND####
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/pid/current/include/pkgconf/mlt_arm_pid_ram.h @@ -0,0 +1,13 @@ +// eCos memory layout - Tue Nov 09 06:57:37 1999 + +// This is a generated file - do not edit + +#include <cyg/infra/cyg_type.h> +#include <stddef.h> + +#define CYGMEM_REGION_ram (0) +#define CYGMEM_REGION_ram_SIZE (0x80000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) +extern char CYG_LABEL_NAME (_reserved) []; +#define CYGMEM_SECTION_reserved (CYG_LABEL_NAME (_reserved)) +#define CYGMEM_SECTION_reserved_SIZE (0x4000)
--- a/packages/hal/arm/pid/current/include/pkgconf/mlt_arm_pid_ram.ldi +++ b/packages/hal/arm/pid/current/include/pkgconf/mlt_arm_pid_ram.ldi @@ -1,40 +1,17 @@ -//=========================================================================== -// -// MLT linker script export - Tue Jan 13 10:14:27 1999 -// -//=========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//=========================================================================== +// eCos memory layout - Tue Nov 09 06:57:37 1999 + +// This is a generated file - do not edit MEMORY { - ram : ORIGIN = 0x00004000, LENGTH = 0x7C000 + ram : ORIGIN = 0, LENGTH = 0x80000 } SECTIONS { SECTIONS_BEGIN - SECTION_rom_vectors (ram, 0x4000, LMA_EQ_VMA) + __reserved = 0; . = __reserved + 0x4000; + SECTION_rom_vectors (ram, ALIGN (0x1), LMA_EQ_VMA) SECTION_text (ram, ALIGN (0x1), LMA_EQ_VMA) SECTION_fini (ram, ALIGN (0x1), LMA_EQ_VMA) SECTION_rodata (ram, ALIGN (0x1), LMA_EQ_VMA)
--- a/packages/hal/arm/pid/current/include/pkgconf/mlt_arm_pid_ram.mlt +++ b/packages/hal/arm/pid/current/include/pkgconf/mlt_arm_pid_ram.mlt @@ -1,6 +1,7 @@ version 0 -region ram 4000 7c000 0 ! -section rom_vectors 0 1 0 1 1 1 1 1 4000 4000 text text ! +region ram 0 80000 0 ! +section reserved 4000 1 0 0 1 1 1 1 0 0 rom_vectors rom_vectors ! +section rom_vectors 0 1 0 1 0 1 0 1 text text ! section text 0 1 0 1 0 1 0 1 fini fini ! section fini 0 1 0 1 0 1 0 1 rodata rodata ! section rodata 0 1 0 1 0 1 0 1 rodata1 rodata1 !
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/pid/current/include/pkgconf/mlt_arm_pid_rom.h @@ -0,0 +1,16 @@ +// eCos memory layout - Tue Nov 09 06:59:24 1999 + +// This is a generated file - do not edit + +#include <cyg/infra/cyg_type.h> +#include <stddef.h> + +#define CYGMEM_REGION_ram (0) +#define CYGMEM_REGION_ram_SIZE (0x80000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) +#define CYGMEM_REGION_rom (0x4000000) +#define CYGMEM_REGION_rom_SIZE (0x80000) +#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R) +extern char CYG_LABEL_NAME (_reserved) []; +#define CYGMEM_SECTION_reserved (CYG_LABEL_NAME (_reserved)) +#define CYGMEM_SECTION_reserved_SIZE (0x800)
--- a/packages/hal/arm/pid/current/include/pkgconf/mlt_arm_pid_rom.ldi +++ b/packages/hal/arm/pid/current/include/pkgconf/mlt_arm_pid_rom.ldi @@ -1,37 +1,11 @@ -//=========================================================================== -// -// MLT linker script export - Tue Jan 13 10:14:27 1999 -// -//=========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//=========================================================================== +// eCos memory layout - Tue Nov 09 06:59:24 1999 -// Modified for ARM/PID7T, generic ROM image +// This is a generated file - do not edit MEMORY { - rom : ORIGIN = 0x04000000, LENGTH = 0x80000 - ram : ORIGIN = 0x00000800, LENGTH = 0x7F800 + ram : ORIGIN = 0, LENGTH = 0x80000 + rom : ORIGIN = 0x4000000, LENGTH = 0x80000 } SECTIONS @@ -44,8 +18,8 @@ SECTIONS SECTION_rodata1 (rom, ALIGN (0x1), LMA_EQ_VMA) SECTION_fixup (rom, ALIGN (0x1), LMA_EQ_VMA) SECTION_gcc_except_table (rom, ALIGN (0x1), LMA_EQ_VMA) - SECTION_data (ram, 0x800, FOLLOWING (.gcc_except_table)) + __reserved = 0; . = __reserved + 0x800; + SECTION_data (ram, ALIGN (0x1), FOLLOWING (.gcc_except_table)) SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA) SECTIONS_END } -
--- a/packages/hal/arm/pid/current/include/pkgconf/mlt_arm_pid_rom.mlt +++ b/packages/hal/arm/pid/current/include/pkgconf/mlt_arm_pid_rom.mlt @@ -1,7 +1,8 @@ version 0 -region ram 800 7f800 0 ! +region ram 0 80000 0 ! region rom 4000000 80000 1 ! -section data 0 1 1 1 1 1 0 0 800 bss ! +section reserved 800 1 0 0 1 1 1 0 0 0 data ! +section data 0 1 1 1 0 1 0 0 bss ! section bss 0 4 0 1 0 0 0 0 ! section rom_vectors 0 1 0 1 1 1 1 1 4000000 4000000 text text ! section text 0 1 0 1 0 1 0 1 fini fini !
--- a/packages/hal/arm/pid/current/src/hal_diag.c +++ b/packages/hal/arm/pid/current/src/hal_diag.c @@ -58,7 +58,7 @@ // Assumption: all diagnostic output must be GDB packetized unless this is a ROM (i.e. // totally stand-alone) system. -#ifdef CYG_HAL_STARTUP_ROM +#if defined(CYG_HAL_STARTUP_ROM) || defined(CYGDBG_HAL_DIAG_DISABLE_GDB_PROTOCOL) #define HAL_DIAG_USES_HARDWARE #endif
--- a/packages/hal/common/current/ChangeLog +++ b/packages/hal/common/current/ChangeLog @@ -1,3 +1,15 @@ +1999-11-15 Jonathan Larmour <jlarmour@cygnus.co.uk> + + * include/dbg-threads-api.h, include/generic-stub.h, + include/hal_stub.h: Add comments to explain these header files should + not be included by user programs + +1999-11-09 Gary Thomas <gthomas@cygnus.co.uk> + + * include/pkgconf/hal.h (CYGDBG_HAL_DIAG_DISABLE_GDB_PROTOCOL): + New option which [explicitly] controls use of GDB protocol + for diagnostic I/O. + 1999-10-29 Gary Thomas <gthomas@cygnus.co.uk> * tests/PKGconf.mak: Add cache tests for Cirrus Logic boards.
--- a/packages/hal/common/current/include/dbg-threads-api.h +++ b/packages/hal/common/current/include/dbg-threads-api.h @@ -1,8 +1,10 @@ #if !defined(DBG_THREADS_API_INCLUDED) #define DBG_THREADS_API_INCLUDED 1 /* These are the calls used to extract operating system specific information - used in supporting thread aware debugging. - The Operating Environment being debugged needs to supply these functions. + * used in supporting thread aware debugging. + * The Operating Environment being debugged needs to supply these functions. + * + * This header is not to be included by user code */ /*
--- a/packages/hal/common/current/include/generic-stub.h +++ b/packages/hal/common/current/include/generic-stub.h @@ -17,6 +17,12 @@ * Code is Cygnus. Portions created by Cygnus are Copyright (C) 1998, 1999 * Cygnus Solutions. All Rights Reserved. */ + +/* This header is not to be included by user code, and is only placed in a + * publically accessible directory so that platform stub packages + * are able to include it if required. + */ + #ifndef GENERIC_STUB_H #define GENERIC_STUB_H
--- a/packages/hal/common/current/include/hal_stub.h +++ b/packages/hal/common/current/include/hal_stub.h @@ -38,7 +38,12 @@ // Date: 1999-02-12 // Purpose: Generic HAL stub header. // Usage: #include <cyg/hal/hal_stub.h> -// +// Description: This header is included by generic-stub.c to provide an +// interface to the eCos-specific stub implementation. It is +// not to be included by user code, and is only placed in a +// publically accessible directory so that platform stub packages +// are able to include it if required. +// //####DESCRIPTIONEND#### // //=============================================================================
--- a/packages/hal/common/current/include/pkgconf/hal.h +++ b/packages/hal/common/current/include/pkgconf/hal.h @@ -109,8 +109,25 @@ code can be eliminated." } + cdl_option CYGDBG_HAL_DIAG_DISABLE_GDB_PROTOCOL { + display "Disable GDB protocol for diagnostic output" + parent CYGPKG_HAL + description " + This option forces diagnostic output to not use the GDB + protocol. Most programs will use the GDB protocol for + diagnostic I/O because of the environment. This option + allows for an explicit override in these cases." + } + }}CFG_DATA */ #define CYGFUN_HAL_COMMON_KERNEL_SUPPORT +#undef CYGDBG_HAL_DIAG_DISABLE_GDB_PROTOCOL + +#ifdef CYGDBG_HAL_DIAG_DISABLE_GDB_PROTOCOL +#if !defined(CYGPKG_HAL_ARM) +#err GDB protocol cannot be explicitly disabled for this platform. +#endif +#endif /* {{CFG_DATA
--- a/packages/hal/common/current/tests/PKGconf.mak +++ b/packages/hal/common/current/tests/PKGconf.mak @@ -44,7 +44,7 @@ TESTS += cache endif -ifdef CYGPKG_HAL_ARM_CL7211 +ifdef CYGPKG_HAL_ARM_EDB7XXX TESTS += cache endif
--- a/packages/io/serial/current/include/pkgconf/io_serial.h +++ b/packages/io/serial/current/include/pkgconf/io_serial.h @@ -384,102 +384,103 @@ /* ---------------------------------------------------------------------------- {{CFG_DATA - cdl_component CYGPKG_IO_SERIAL_ARM_CL7211 { - display "ARM CL7x11 (CL7111/CL7211) serial device drivers" + cdl_component CYGPKG_IO_SERIAL_ARM_EDB7XXX { + display "Cirrus Logic EDB7xxx serial device drivers" type bool requires CYGPKG_IO_SERIAL - parent CYGPKG_HAL_ARM_CL7211 + parent CYGPKG_HAL_ARM_EDB7XXX description " - This option enables the serial device drivers for the ARM CL7x11." + This option enables the serial device drivers for the Cirrus Logic CL-PS7111 + and EDB7xxx evaluation boards." doc ref/ecos-ref/ecos-device-drivers.html } - cdl_component CYGPKG_IO_SERIAL_ARM_CL7211_SERIAL1 { - display "ARM CL7x11 serial port 1 driver" + cdl_component CYGPKG_IO_SERIAL_ARM_EDB7XXX_SERIAL1 { + display "Cirrus Logic EDB7xxx serial port 1 driver" type bool - parent CYGPKG_IO_SERIAL_ARM_CL7211 + parent CYGPKG_IO_SERIAL_ARM_EDB7XXX description " - This option includes the serial device driver for the ARM CL7x11 port 1." + This option includes the serial device driver for the Cirrus Logic EDB7xxx port 1." doc ref/ecos-ref/ecos-device-drivers.html } - cdl_option CYGDAT_IO_SERIAL_ARM_CL7211_SERIAL1_NAME { - display "Device name for the ARM CL7x11 serial port 1 driver" + cdl_option CYGDAT_IO_SERIAL_ARM_EDB7XXX_SERIAL1_NAME { + display "Device name for the Cirrus Logic EDB7xxx serial port 1 driver" type string - parent CYGPKG_IO_SERIAL_ARM_CL7211_SERIAL1 + parent CYGPKG_IO_SERIAL_ARM_EDB7XXX_SERIAL1 description " - This option specifies the name of serial device for the ARM CL7x11 port 1." + This option specifies the name of serial device for the Cirrus Logic EDB7xxx port 1." doc ref/ecos-ref/ecos-device-drivers.html } - cdl_option CYGNUM_IO_SERIAL_ARM_CL7211_SERIAL1_BAUD { - display "Baud rate for the ARM CL7x11 serial port 1 driver" + cdl_option CYGNUM_IO_SERIAL_ARM_EDB7XXX_SERIAL1_BAUD { + display "Baud rate for the Cirrus Logic EDB7xxx serial port 1 driver" type enum legal_values 50 75 110 134_5 150 200 300 600 1200 1800 2400 3600 4800 7200 9600 14400 19200 38400 57600 115200 234000 - parent CYGPKG_IO_SERIAL_ARM_CL7211_SERIAL1 + parent CYGPKG_IO_SERIAL_ARM_EDB7XXX_SERIAL1 description " - This option specifies the default baud rate (speed) for the ARM CL7x11 port 1." + This option specifies the default baud rate (speed) for the Cirrus Logic EDB7xxx port 1." doc ref/ecos-ref/ecos-device-drivers.html } - cdl_option CYGNUM_IO_SERIAL_ARM_CL7211_SERIAL1_BUFSIZE { - display "Buffer size for the ARM CL7x11 serial port 1 driver" + cdl_option CYGNUM_IO_SERIAL_ARM_EDB7XXX_SERIAL1_BUFSIZE { + display "Buffer size for the Cirrus Logic EDB7xxx serial port 1 driver" type count legal_values 0 to 8192 - parent CYGPKG_IO_SERIAL_ARM_CL7211_SERIAL1 + parent CYGPKG_IO_SERIAL_ARM_EDB7XXX_SERIAL1 description " - This option specifies the size of the internal buffers used for the ARM CL7x11 port 1." + This option specifies the size of the internal buffers used for the Cirrus Logic EDB7xxx port 1." doc ref/ecos-ref/ecos-device-drivers.html } - cdl_component CYGPKG_IO_SERIAL_ARM_CL7211_SERIAL2 { - display "ARM CL7x11 serial port 2 driver" + cdl_component CYGPKG_IO_SERIAL_ARM_EDB7XXX_SERIAL2 { + display "Cirrus Logic EDB7xxx serial port 2 driver" type bool - parent CYGPKG_IO_SERIAL_ARM_CL7211 + parent CYGPKG_IO_SERIAL_ARM_EDB7XXX description " - This option includes the serial device driver for the ARM CL7x11 port 2." + This option includes the serial device driver for the Cirrus Logic EDB7xxx port 2." doc ref/ecos-ref/ecos-device-drivers.html } - cdl_option CYGDAT_IO_SERIAL_ARM_CL7211_SERIAL2_NAME { - display "Device name for the ARM CL7x11 serial port 2 driver" + cdl_option CYGDAT_IO_SERIAL_ARM_EDB7XXX_SERIAL2_NAME { + display "Device name for the Cirrus Logic EDB7xxx serial port 2 driver" type string - parent CYGPKG_IO_SERIAL_ARM_CL7211_SERIAL2 + parent CYGPKG_IO_SERIAL_ARM_EDB7XXX_SERIAL2 description " - This option specifies the name of serial device for the ARM CL7x11 port 2." + This option specifies the name of serial device for the Cirrus Logic EDB7xxx port 2." doc ref/ecos-ref/ecos-device-drivers.html } - cdl_option CYGNUM_IO_SERIAL_ARM_CL7211_SERIAL2_BAUD { - display "Baud rate for the ARM CL7x11 serial port 2 driver" + cdl_option CYGNUM_IO_SERIAL_ARM_EDB7XXX_SERIAL2_BAUD { + display "Baud rate for the Cirrus Logic EDB7xxx serial port 2 driver" type enum legal_values 50 75 110 134_5 150 200 300 600 1200 1800 2400 3600 4800 7200 9600 14400 19200 38400 57600 115200 234000 - parent CYGPKG_IO_SERIAL_ARM_CL7211_SERIAL2 + parent CYGPKG_IO_SERIAL_ARM_EDB7XXX_SERIAL2 description " - This option specifies the default baud rate (speed) for the ARM CL7x11 port 2." + This option specifies the default baud rate (speed) for the Cirrus Logic EDB7xxx port 2." doc ref/ecos-ref/ecos-device-drivers.html } - cdl_option CYGNUM_IO_SERIAL_ARM_CL7211_SERIAL2_BUFSIZE { - display "Buffer size for the ARM CL7x11 serial port 2 driver" + cdl_option CYGNUM_IO_SERIAL_ARM_EDB7XXX_SERIAL2_BUFSIZE { + display "Buffer size for the Cirrus Logic EDB7xxx serial port 2 driver" type count legal_values 0 to 8192 - parent CYGPKG_IO_SERIAL_ARM_CL7211_SERIAL2 + parent CYGPKG_IO_SERIAL_ARM_EDB7XXX_SERIAL2 description " - This option specifies the size of the internal buffers used for the ARM CL7x11 port 2." + This option specifies the size of the internal buffers used for the Cirrus Logic EDB7xxx port 2." doc ref/ecos-ref/ecos-device-drivers.html } }}CFG_DATA */ -#undef CYGPKG_IO_SERIAL_ARM_CL7211 -#undef CYGPKG_IO_SERIAL_ARM_CL7211_SERIAL1 -#define CYGDAT_IO_SERIAL_ARM_CL7211_SERIAL1_NAME "/dev/ser1" -#define CYGNUM_IO_SERIAL_ARM_CL7211_SERIAL1_BAUD 38400 -#define CYGNUM_IO_SERIAL_ARM_CL7211_SERIAL1_BUFSIZE 128 -#undef CYGPKG_IO_SERIAL_ARM_CL7211_SERIAL2 -#define CYGDAT_IO_SERIAL_ARM_CL7211_SERIAL2_NAME "/dev/ser2" -#define CYGNUM_IO_SERIAL_ARM_CL7211_SERIAL2_BAUD 38400 -#define CYGNUM_IO_SERIAL_ARM_CL7211_SERIAL2_BUFSIZE 128 +#undef CYGPKG_IO_SERIAL_ARM_EDB7XXX +#undef CYGPKG_IO_SERIAL_ARM_EDB7XXX_SERIAL1 +#define CYGDAT_IO_SERIAL_ARM_EDB7XXX_SERIAL1_NAME "/dev/ser1" +#define CYGNUM_IO_SERIAL_ARM_EDB7XXX_SERIAL1_BAUD 38400 +#define CYGNUM_IO_SERIAL_ARM_EDB7XXX_SERIAL1_BUFSIZE 128 +#undef CYGPKG_IO_SERIAL_ARM_EDB7XXX_SERIAL2 +#define CYGDAT_IO_SERIAL_ARM_EDB7XXX_SERIAL2_NAME "/dev/ser2" +#define CYGNUM_IO_SERIAL_ARM_EDB7XXX_SERIAL2_BAUD 38400 +#define CYGNUM_IO_SERIAL_ARM_EDB7XXX_SERIAL2_BUFSIZE 128 /* ---------------------------------------------------------------------------- {{CFG_DATA
--- a/packages/io/serial/current/src/PKGconf.mak +++ b/packages/io/serial/current/src/PKGconf.mak @@ -40,8 +40,8 @@ endif ifdef CYGPKG_HAL_ARM_AEB EXTRAS_COMPILE += arm/aeb_serial.c endif -ifdef CYGPKG_HAL_ARM_CL7211 -EXTRAS_COMPILE += arm/cl7211_serial.c +ifdef CYGPKG_HAL_ARM_EDB7XXX +EXTRAS_COMPILE += arm/edb7xxx_serial.c endif ifdef CYGPKG_HAL_ARM_CMA230 EXTRAS_COMPILE += arm/cma230_serial.c
deleted file mode 100644 --- a/packages/io/serial/current/src/arm/cl7211_serial.c +++ /dev/null @@ -1,381 +0,0 @@ -//========================================================================== -// -// io/serial/arm/cl7211_serial.c -// -// Cirrus Logic CL7211 Serial I/O Interface Module (interrupt driven) -// -//========================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -//========================================================================== -//#####DESCRIPTIONBEGIN#### -// -// Author(s): gthomas -// Contributors: gthomas -// Date: 1999-02-04 -// Purpose: CL7211 Serial I/O module (interrupt driven version) -// Description: -// -//####DESCRIPTIONEND#### -// -//========================================================================== - -#include <pkgconf/system.h> -#include <pkgconf/io_serial.h> -#include <pkgconf/io.h> -#include <cyg/io/io.h> -#include <cyg/hal/hal_intr.h> -#include <cyg/io/devtab.h> -#include <cyg/io/serial.h> -#include <cyg/infra/diag.h> - -#ifdef CYGPKG_IO_SERIAL_ARM_CL7211 - -#include "cl7211_serial.h" - -typedef struct cl7211_serial_info { - CYG_ADDRWORD data, // Pointer to data register - control, // Pointer to baud rate/line control register - stat, // Pointer to system flags for this port - syscon; // Pointer to system control for this port - CYG_WORD tx_int_num, // Transmit interrupt number - rx_int_num, // Receive interrupt number - ms_int_num; // Modem Status Change interrupt number - cyg_interrupt serial_tx_interrupt, - serial_rx_interrupt, - serial_ms_interrupt; - cyg_handle_t serial_tx_interrupt_handle, - serial_rx_interrupt_handle, - serial_ms_interrupt_handle; - bool tx_enabled; -} cl7211_serial_info; - -static bool cl7211_serial_init(struct cyg_devtab_entry *tab); -static bool cl7211_serial_putc(serial_channel *chan, unsigned char c); -static Cyg_ErrNo cl7211_serial_lookup(struct cyg_devtab_entry **tab, - struct cyg_devtab_entry *sub_tab, - const char *name); -static unsigned char cl7211_serial_getc(serial_channel *chan); -static bool cl7211_serial_set_config(serial_channel *chan, cyg_serial_info_t *config); -static void cl7211_serial_start_xmit(serial_channel *chan); -static void cl7211_serial_stop_xmit(serial_channel *chan); - -static cyg_uint32 cl7211_serial_tx_ISR(cyg_vector_t vector, cyg_addrword_t data); -static void cl7211_serial_tx_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data); -static cyg_uint32 cl7211_serial_rx_ISR(cyg_vector_t vector, cyg_addrword_t data); -static void cl7211_serial_rx_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data); -static cyg_uint32 cl7211_serial_ms_ISR(cyg_vector_t vector, cyg_addrword_t data); -static void cl7211_serial_ms_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data); - -static SERIAL_FUNS(cl7211_serial_funs, - cl7211_serial_putc, - cl7211_serial_getc, - cl7211_serial_set_config, - cl7211_serial_start_xmit, - cl7211_serial_stop_xmit - ); - -#ifdef CYGPKG_IO_SERIAL_ARM_CL7211_SERIAL1 -static cl7211_serial_info cl7211_serial_info1 = {UARTDR1, // Data register - UBLCR1, // Port control - SYSFLG1, // Status - SYSCON1, // System config - CYGNUM_HAL_INTERRUPT_UTXINT1, // Tx interrupt - CYGNUM_HAL_INTERRUPT_URXINT1, // Rx interrupt - 0 /*CYGNUM_HAL_INTERRUPT_UMSINT*/}; // Modem control -#if CYGNUM_IO_SERIAL_ARM_CL7211_SERIAL1_BUFSIZE > 0 -static unsigned char cl7211_serial_out_buf1[CYGNUM_IO_SERIAL_ARM_CL7211_SERIAL1_BUFSIZE]; -static unsigned char cl7211_serial_in_buf1[CYGNUM_IO_SERIAL_ARM_CL7211_SERIAL1_BUFSIZE]; - -static SERIAL_CHANNEL_USING_INTERRUPTS(cl7211_serial_channel1, - cl7211_serial_funs, - cl7211_serial_info1, - CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_ARM_CL7211_SERIAL1_BAUD), - CYG_SERIAL_STOP_DEFAULT, - CYG_SERIAL_PARITY_DEFAULT, - CYG_SERIAL_WORD_LENGTH_DEFAULT, - CYG_SERIAL_FLAGS_DEFAULT, - &cl7211_serial_out_buf1[0], sizeof(cl7211_serial_out_buf1), - &cl7211_serial_in_buf1[0], sizeof(cl7211_serial_in_buf1) - ); -#else -static SERIAL_CHANNEL(cl7211_serial_channel1, - cl7211_serial_funs, - cl7211_serial_info1, - CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_ARM_CL7211_SERIAL1_BAUD), - CYG_SERIAL_STOP_DEFAULT, - CYG_SERIAL_PARITY_DEFAULT, - CYG_SERIAL_WORD_LENGTH_DEFAULT, - CYG_SERIAL_FLAGS_DEFAULT - ); -#endif - -DEVTAB_ENTRY(cl7211_serial_io1, - CYGDAT_IO_SERIAL_ARM_CL7211_SERIAL1_NAME, - 0, // Does not depend on a lower level interface - &serial_devio, - cl7211_serial_init, - cl7211_serial_lookup, // Serial driver may need initializing - &cl7211_serial_channel1 - ); -#endif // CYGPKG_IO_SERIAL_ARM_CL7211_SERIAL2 - -#ifdef CYGPKG_IO_SERIAL_ARM_CL7211_SERIAL2 -static cl7211_serial_info cl7211_serial_info2 = {UARTDR2, // Data register - UBLCR2, // Port control - SYSFLG2, // Status - SYSCON2, // System config - CYGNUM_HAL_INTERRUPT_UTXINT2, // Tx interrupt - CYGNUM_HAL_INTERRUPT_URXINT2, // Rx interrupt - 0}; // No modem control -#if CYGNUM_IO_SERIAL_ARM_CL7211_SERIAL2_BUFSIZE > 0 -static unsigned char cl7211_serial_out_buf2[CYGNUM_IO_SERIAL_ARM_CL7211_SERIAL2_BUFSIZE]; -static unsigned char cl7211_serial_in_buf2[CYGNUM_IO_SERIAL_ARM_CL7211_SERIAL2_BUFSIZE]; - -static SERIAL_CHANNEL_USING_INTERRUPTS(cl7211_serial_channel2, - cl7211_serial_funs, - cl7211_serial_info2, - CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_ARM_CL7211_SERIAL2_BAUD), - CYG_SERIAL_STOP_DEFAULT, - CYG_SERIAL_PARITY_DEFAULT, - CYG_SERIAL_WORD_LENGTH_DEFAULT, - CYG_SERIAL_FLAGS_DEFAULT, - &cl7211_serial_out_buf2[0], sizeof(cl7211_serial_out_buf2), - &cl7211_serial_in_buf2[0], sizeof(cl7211_serial_in_buf2) - ); -#else -static SERIAL_CHANNEL(cl7211_serial_channel2, - cl7211_serial_funs, - cl7211_serial_info2, - CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_ARM_CL7211_SERIAL2_BAUD), - CYG_SERIAL_STOP_DEFAULT, - CYG_SERIAL_PARITY_DEFAULT, - CYG_SERIAL_WORD_LENGTH_DEFAULT, - CYG_SERIAL_FLAGS_DEFAULT - ); -#endif - -DEVTAB_ENTRY(cl7211_serial_io2, - CYGDAT_IO_SERIAL_ARM_CL7211_SERIAL2_NAME, - 0, // Does not depend on a lower level interface - &serial_devio, - cl7211_serial_init, - cl7211_serial_lookup, // Serial driver may need initializing - &cl7211_serial_channel2 - ); -#endif // CYGPKG_IO_SERIAL_ARM_CL7211_SERIAL2 - -// Internal function to actually configure the hardware to desired baud rate, etc. -static bool -cl7211_serial_config_port(serial_channel *chan, cyg_serial_info_t *new_config, bool init) -{ - cl7211_serial_info *cl7211_chan = (cl7211_serial_info *)chan->dev_priv; - volatile cyg_uint32 *syscon = (volatile cyg_uint32 *)cl7211_chan->syscon; - volatile cyg_uint32 *blcfg = (volatile cyg_uint32 *)cl7211_chan->control; - unsigned int baud_divisor = select_baud[new_config->baud]; - cyg_uint32 _lcr; - if (baud_divisor == 0) return false; - // Disable port interrupts while changing hardware - _lcr = select_word_length[new_config->word_length - CYGNUM_SERIAL_WORD_LENGTH_5] | - select_stop_bits[new_config->stop] | - select_parity[new_config->parity] | - UBLCR_FIFOEN | UART_BITRATE(baud_divisor); -#ifdef CYGDBG_IO_INIT - diag_printf("Set CTL: %x = %x\n", blcfg, _lcr); -#endif - *blcfg = _lcr; - *syscon |= SYSCON1_UART1EN; - if (new_config != &chan->config) { - chan->config = *new_config; - } - return true; -} - -// Function to initialize the device. Called at bootstrap time. -static bool -cl7211_serial_init(struct cyg_devtab_entry *tab) -{ - serial_channel *chan = (serial_channel *)tab->priv; - cl7211_serial_info *cl7211_chan = (cl7211_serial_info *)chan->dev_priv; -#ifdef CYGDBG_IO_INIT - diag_printf("CL7211 SERIAL init - dev: %x.%d\n", cl7211_chan->control, cl7211_chan->tx_int_num); -#endif - (chan->callbacks->serial_init)(chan); // Really only required for interrupt driven devices - if (chan->out_cbuf.len != 0) { - cyg_drv_interrupt_create(cl7211_chan->tx_int_num, - 99, // Priority - unused - (cyg_addrword_t)chan, // Data item passed to interrupt handler - cl7211_serial_tx_ISR, - cl7211_serial_tx_DSR, - &cl7211_chan->serial_tx_interrupt_handle, - &cl7211_chan->serial_tx_interrupt); - cyg_drv_interrupt_attach(cl7211_chan->serial_tx_interrupt_handle); - cyg_drv_interrupt_mask(cl7211_chan->tx_int_num); - cl7211_chan->tx_enabled = false; - } - if (chan->in_cbuf.len != 0) { - cyg_drv_interrupt_create(cl7211_chan->rx_int_num, - 99, // Priority - unused - (cyg_addrword_t)chan, // Data item passed to interrupt handler - cl7211_serial_rx_ISR, - cl7211_serial_rx_DSR, - &cl7211_chan->serial_rx_interrupt_handle, - &cl7211_chan->serial_rx_interrupt); - cyg_drv_interrupt_attach(cl7211_chan->serial_rx_interrupt_handle); - cyg_drv_interrupt_unmask(cl7211_chan->rx_int_num); - } - cl7211_serial_config_port(chan, &chan->config, true); - return true; -} - -// This routine is called when the device is "looked" up (i.e. attached) -static Cyg_ErrNo -cl7211_serial_lookup(struct cyg_devtab_entry **tab, - struct cyg_devtab_entry *sub_tab, - const char *name) -{ - serial_channel *chan = (serial_channel *)(*tab)->priv; - (chan->callbacks->serial_init)(chan); // Really only required for interrupt driven devices - return ENOERR; -} - -// Send a character to the device output buffer. -// Return 'true' if character is sent to device -static bool -cl7211_serial_putc(serial_channel *chan, unsigned char c) -{ - cl7211_serial_info *cl7211_chan = (cl7211_serial_info *)chan->dev_priv; - volatile cyg_uint8 *data = (volatile cyg_uint8 *)cl7211_chan->data; - volatile cyg_uint32 *stat = (volatile cyg_uint32 *)cl7211_chan->stat; - if ((*stat & SYSFLG1_UTXFF1) == 0) { -// Transmit buffer/FIFO is not full - *data = c; - return true; - } else { -// No space - return false; - } -} - -// Fetch a character from the device input buffer, waiting if necessary -static unsigned char -cl7211_serial_getc(serial_channel *chan) -{ - unsigned char c; - cl7211_serial_info *cl7211_chan = (cl7211_serial_info *)chan->dev_priv; - volatile cyg_uint32 *data = (volatile cyg_uint32 *)cl7211_chan->data; - volatile cyg_uint32 *stat = (volatile cyg_uint32 *)cl7211_chan->stat; - while (*stat & SYSFLG1_URXFE1) ; // Wait for char - c = *data; - return c; -} - -// Set up the device characteristics; baud rate, etc. -static bool -cl7211_serial_set_config(serial_channel *chan, cyg_serial_info_t *config) -{ - return cl7211_serial_config_port(chan, config, false); -} - -// Enable the transmitter (interrupt) on the device -static void -cl7211_serial_start_xmit(serial_channel *chan) -{ - cl7211_serial_info *cl7211_chan = (cl7211_serial_info *)chan->dev_priv; - cl7211_chan->tx_enabled = true; - cyg_drv_interrupt_unmask(cl7211_chan->tx_int_num); -} - -// Disable the transmitter on the device -static void -cl7211_serial_stop_xmit(serial_channel *chan) -{ - cl7211_serial_info *cl7211_chan = (cl7211_serial_info *)chan->dev_priv; - cyg_drv_interrupt_mask(cl7211_chan->tx_int_num); - cl7211_chan->tx_enabled = false; -} - -// Serial I/O - low level Tx interrupt handler (ISR) -static cyg_uint32 -cl7211_serial_tx_ISR(cyg_vector_t vector, cyg_addrword_t data) -{ - serial_channel *chan = (serial_channel *)data; - cl7211_serial_info *cl7211_chan = (cl7211_serial_info *)chan->dev_priv; - cyg_drv_interrupt_mask(cl7211_chan->tx_int_num); - cyg_drv_interrupt_acknowledge(cl7211_chan->tx_int_num); - return CYG_ISR_CALL_DSR; // Cause DSR to be run -} - -// Serial I/O - high level Tx interrupt handler (DSR) -static void -cl7211_serial_tx_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data) -{ - serial_channel *chan = (serial_channel *)data; - cl7211_serial_info *cl7211_chan = (cl7211_serial_info *)chan->dev_priv; - (chan->callbacks->xmt_char)(chan); - if (cl7211_chan->tx_enabled) { - cyg_drv_interrupt_unmask(cl7211_chan->tx_int_num); - } -} - -// Serial I/O - low level Rx interrupt handler (ISR) -static cyg_uint32 -cl7211_serial_rx_ISR(cyg_vector_t vector, cyg_addrword_t data) -{ - serial_channel *chan = (serial_channel *)data; - cl7211_serial_info *cl7211_chan = (cl7211_serial_info *)chan->dev_priv; - cyg_drv_interrupt_mask(cl7211_chan->rx_int_num); - cyg_drv_interrupt_acknowledge(cl7211_chan->rx_int_num); - return CYG_ISR_CALL_DSR; // Cause DSR to be run -} - -// Serial I/O - high level Rx interrupt handler (DSR) -static void -cl7211_serial_rx_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data) -{ - serial_channel *chan = (serial_channel *)data; - cl7211_serial_info *cl7211_chan = (cl7211_serial_info *)chan->dev_priv; - volatile cyg_uint32 *datreg = (volatile cyg_uint32 *)cl7211_chan->data; - volatile cyg_uint32 *stat = (volatile cyg_uint32 *)cl7211_chan->stat; - while (!(*stat & SYSFLG1_URXFE1)) - (chan->callbacks->rcv_char)(chan, *datreg); - cyg_drv_interrupt_unmask(cl7211_chan->rx_int_num); -} - -// Serial I/O - low level Ms interrupt handler (ISR) -static cyg_uint32 -cl7211_serial_ms_ISR(cyg_vector_t vector, cyg_addrword_t data) -{ - serial_channel *chan = (serial_channel *)data; - cl7211_serial_info *cl7211_chan = (cl7211_serial_info *)chan->dev_priv; - cyg_drv_interrupt_mask(cl7211_chan->ms_int_num); - cyg_drv_interrupt_acknowledge(cl7211_chan->ms_int_num); - return CYG_ISR_CALL_DSR; // Cause DSR to be run -} - -// Serial I/O - high level Ms interrupt handler (DSR) -static void -cl7211_serial_ms_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data) -{ -} -#endif // CYGPKG_IO_SERIAL_ARM_CL7211 -
deleted file mode 100644 --- a/packages/io/serial/current/src/arm/cl7211_serial.h +++ /dev/null @@ -1,98 +0,0 @@ -#ifndef CYGONCE_ARM_CL7211_SERIAL_H -#define CYGONCE_ARM_CL7211_SERIAL_H - -// ==================================================================== -// -// cl7211_serial.h -// -// Device I/O - Description of Cirrus Logic CL7211 serial hardware -// -// ==================================================================== -//####COPYRIGHTBEGIN#### -// -// ------------------------------------------- -// The contents of this file are subject to the Cygnus eCos Public License -// Version 1.0 (the "License"); you may not use this file except in -// compliance with the License. You may obtain a copy of the License at -// http://sourceware.cygnus.com/ecos -// -// Software distributed under the License is distributed on an "AS IS" -// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the -// License for the specific language governing rights and limitations under -// the License. -// -// The Original Code is eCos - Embedded Cygnus Operating System, released -// September 30, 1998. -// -// The Initial Developer of the Original Code is Cygnus. Portions created -// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. -// ------------------------------------------- -// -//####COPYRIGHTEND#### -// ==================================================================== -//#####DESCRIPTIONBEGIN#### -// -// Author(s): gthomas -// Contributors: gthomas -// Date: 1999-02-04 -// Purpose: Internal interfaces for serial I/O drivers -// Description: -// -//####DESCRIPTIONEND#### -// -// ==================================================================== - -// Description of serial ports on Cirrus Logic CL7211 - -#include <cyg/hal/hal_cl7211.h> // Hardware definitions - -static unsigned int select_word_length[] = { - UBLCR_WRDLEN5, // 5 bits / word (char) - UBLCR_WRDLEN6, - UBLCR_WRDLEN7, - UBLCR_WRDLEN8 -}; - -static unsigned int select_stop_bits[] = { - 0, - 0, // 1 stop bit - 0, // 1.5 stop bit - UBLCR_XSTOP // 2 stop bits -}; - -static unsigned int select_parity[] = { - 0, // No parity - UBLCR_PRTEN|UBLCR_EVENPRT, // Even parity - UBLCR_PRTEN, // Odd parity - 0, // Mark parity - 0, // Space parity -}; - -// Baud rate values, based on PLL clock - -static cyg_int32 select_baud[] = { - 0, // Unused - 50, // 50 - 75, // 75 - 110, // 110 - 0, // 134.5 - 150, // 150 - 200, // 200 - 300, // 300 - 600, // 600 - 1200, // 1200 - 1800, // 1800 - 2400, // 2400 - 3600, // 3600 - 4800, // 4800 - 7200, // 7200 - 9600, // 9600 - 14400, // 14400 - 19200, // 19200 - 38400, // 38400 - 57600, // 57600 - 115200, // 115200 - 0, // 230400 -}; - -#endif // CYGONCE_ARM_CL7211_SERIAL_H
new file mode 100644 --- /dev/null +++ b/packages/io/serial/current/src/arm/edb7xxx_serial.c @@ -0,0 +1,381 @@ +//========================================================================== +// +// io/serial/arm/edb7xxx_serial.c +// +// Cirrus Logic EDB7XXX Serial I/O Interface Module (interrupt driven) +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 1999-02-04 +// Purpose: EDB7XXX Serial I/O module (interrupt driven version) +// Description: +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include <pkgconf/system.h> +#include <pkgconf/io_serial.h> +#include <pkgconf/io.h> +#include <cyg/io/io.h> +#include <cyg/hal/hal_intr.h> +#include <cyg/io/devtab.h> +#include <cyg/io/serial.h> +#include <cyg/infra/diag.h> + +#ifdef CYGPKG_IO_SERIAL_ARM_EDB7XXX + +#include "edb7xxx_serial.h" + +typedef struct edb7xxx_serial_info { + CYG_ADDRWORD data, // Pointer to data register + control, // Pointer to baud rate/line control register + stat, // Pointer to system flags for this port + syscon; // Pointer to system control for this port + CYG_WORD tx_int_num, // Transmit interrupt number + rx_int_num, // Receive interrupt number + ms_int_num; // Modem Status Change interrupt number + cyg_interrupt serial_tx_interrupt, + serial_rx_interrupt, + serial_ms_interrupt; + cyg_handle_t serial_tx_interrupt_handle, + serial_rx_interrupt_handle, + serial_ms_interrupt_handle; + bool tx_enabled; +} edb7xxx_serial_info; + +static bool edb7xxx_serial_init(struct cyg_devtab_entry *tab); +static bool edb7xxx_serial_putc(serial_channel *chan, unsigned char c); +static Cyg_ErrNo edb7xxx_serial_lookup(struct cyg_devtab_entry **tab, + struct cyg_devtab_entry *sub_tab, + const char *name); +static unsigned char edb7xxx_serial_getc(serial_channel *chan); +static bool edb7xxx_serial_set_config(serial_channel *chan, cyg_serial_info_t *config); +static void edb7xxx_serial_start_xmit(serial_channel *chan); +static void edb7xxx_serial_stop_xmit(serial_channel *chan); + +static cyg_uint32 edb7xxx_serial_tx_ISR(cyg_vector_t vector, cyg_addrword_t data); +static void edb7xxx_serial_tx_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data); +static cyg_uint32 edb7xxx_serial_rx_ISR(cyg_vector_t vector, cyg_addrword_t data); +static void edb7xxx_serial_rx_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data); +static cyg_uint32 edb7xxx_serial_ms_ISR(cyg_vector_t vector, cyg_addrword_t data); +static void edb7xxx_serial_ms_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data); + +static SERIAL_FUNS(edb7xxx_serial_funs, + edb7xxx_serial_putc, + edb7xxx_serial_getc, + edb7xxx_serial_set_config, + edb7xxx_serial_start_xmit, + edb7xxx_serial_stop_xmit + ); + +#ifdef CYGPKG_IO_SERIAL_ARM_EDB7XXX_SERIAL1 +static edb7xxx_serial_info edb7xxx_serial_info1 = {UARTDR1, // Data register + UBLCR1, // Port control + SYSFLG1, // Status + SYSCON1, // System config + CYGNUM_HAL_INTERRUPT_UTXINT1, // Tx interrupt + CYGNUM_HAL_INTERRUPT_URXINT1, // Rx interrupt + 0 /*CYGNUM_HAL_INTERRUPT_UMSINT*/}; // Modem control +#if CYGNUM_IO_SERIAL_ARM_EDB7XXX_SERIAL1_BUFSIZE > 0 +static unsigned char edb7xxx_serial_out_buf1[CYGNUM_IO_SERIAL_ARM_EDB7XXX_SERIAL1_BUFSIZE]; +static unsigned char edb7xxx_serial_in_buf1[CYGNUM_IO_SERIAL_ARM_EDB7XXX_SERIAL1_BUFSIZE]; + +static SERIAL_CHANNEL_USING_INTERRUPTS(edb7xxx_serial_channel1, + edb7xxx_serial_funs, + edb7xxx_serial_info1, + CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_ARM_EDB7XXX_SERIAL1_BAUD), + CYG_SERIAL_STOP_DEFAULT, + CYG_SERIAL_PARITY_DEFAULT, + CYG_SERIAL_WORD_LENGTH_DEFAULT, + CYG_SERIAL_FLAGS_DEFAULT, + &edb7xxx_serial_out_buf1[0], sizeof(edb7xxx_serial_out_buf1), + &edb7xxx_serial_in_buf1[0], sizeof(edb7xxx_serial_in_buf1) + ); +#else +static SERIAL_CHANNEL(edb7xxx_serial_channel1, + edb7xxx_serial_funs, + edb7xxx_serial_info1, + CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_ARM_EDB7XXX_SERIAL1_BAUD), + CYG_SERIAL_STOP_DEFAULT, + CYG_SERIAL_PARITY_DEFAULT, + CYG_SERIAL_WORD_LENGTH_DEFAULT, + CYG_SERIAL_FLAGS_DEFAULT + ); +#endif + +DEVTAB_ENTRY(edb7xxx_serial_io1, + CYGDAT_IO_SERIAL_ARM_EDB7XXX_SERIAL1_NAME, + 0, // Does not depend on a lower level interface + &serial_devio, + edb7xxx_serial_init, + edb7xxx_serial_lookup, // Serial driver may need initializing + &edb7xxx_serial_channel1 + ); +#endif // CYGPKG_IO_SERIAL_ARM_EDB7XXX_SERIAL2 + +#ifdef CYGPKG_IO_SERIAL_ARM_EDB7XXX_SERIAL2 +static edb7xxx_serial_info edb7xxx_serial_info2 = {UARTDR2, // Data register + UBLCR2, // Port control + SYSFLG2, // Status + SYSCON2, // System config + CYGNUM_HAL_INTERRUPT_UTXINT2, // Tx interrupt + CYGNUM_HAL_INTERRUPT_URXINT2, // Rx interrupt + 0}; // No modem control +#if CYGNUM_IO_SERIAL_ARM_EDB7XXX_SERIAL2_BUFSIZE > 0 +static unsigned char edb7xxx_serial_out_buf2[CYGNUM_IO_SERIAL_ARM_EDB7XXX_SERIAL2_BUFSIZE]; +static unsigned char edb7xxx_serial_in_buf2[CYGNUM_IO_SERIAL_ARM_EDB7XXX_SERIAL2_BUFSIZE]; + +static SERIAL_CHANNEL_USING_INTERRUPTS(edb7xxx_serial_channel2, + edb7xxx_serial_funs, + edb7xxx_serial_info2, + CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_ARM_EDB7XXX_SERIAL2_BAUD), + CYG_SERIAL_STOP_DEFAULT, + CYG_SERIAL_PARITY_DEFAULT, + CYG_SERIAL_WORD_LENGTH_DEFAULT, + CYG_SERIAL_FLAGS_DEFAULT, + &edb7xxx_serial_out_buf2[0], sizeof(edb7xxx_serial_out_buf2), + &edb7xxx_serial_in_buf2[0], sizeof(edb7xxx_serial_in_buf2) + ); +#else +static SERIAL_CHANNEL(edb7xxx_serial_channel2, + edb7xxx_serial_funs, + edb7xxx_serial_info2, + CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_ARM_EDB7XXX_SERIAL2_BAUD), + CYG_SERIAL_STOP_DEFAULT, + CYG_SERIAL_PARITY_DEFAULT, + CYG_SERIAL_WORD_LENGTH_DEFAULT, + CYG_SERIAL_FLAGS_DEFAULT + ); +#endif + +DEVTAB_ENTRY(edb7xxx_serial_io2, + CYGDAT_IO_SERIAL_ARM_EDB7XXX_SERIAL2_NAME, + 0, // Does not depend on a lower level interface + &serial_devio, + edb7xxx_serial_init, + edb7xxx_serial_lookup, // Serial driver may need initializing + &edb7xxx_serial_channel2 + ); +#endif // CYGPKG_IO_SERIAL_ARM_EDB7XXX_SERIAL2 + +// Internal function to actually configure the hardware to desired baud rate, etc. +static bool +edb7xxx_serial_config_port(serial_channel *chan, cyg_serial_info_t *new_config, bool init) +{ + edb7xxx_serial_info *edb7xxx_chan = (edb7xxx_serial_info *)chan->dev_priv; + volatile cyg_uint32 *syscon = (volatile cyg_uint32 *)edb7xxx_chan->syscon; + volatile cyg_uint32 *blcfg = (volatile cyg_uint32 *)edb7xxx_chan->control; + unsigned int baud_divisor = select_baud[new_config->baud]; + cyg_uint32 _lcr; + if (baud_divisor == 0) return false; + // Disable port interrupts while changing hardware + _lcr = select_word_length[new_config->word_length - CYGNUM_SERIAL_WORD_LENGTH_5] | + select_stop_bits[new_config->stop] | + select_parity[new_config->parity] | + UBLCR_FIFOEN | UART_BITRATE(baud_divisor); +#ifdef CYGDBG_IO_INIT + diag_printf("Set CTL: %x = %x\n", blcfg, _lcr); +#endif + *blcfg = _lcr; + *syscon |= SYSCON1_UART1EN; + if (new_config != &chan->config) { + chan->config = *new_config; + } + return true; +} + +// Function to initialize the device. Called at bootstrap time. +static bool +edb7xxx_serial_init(struct cyg_devtab_entry *tab) +{ + serial_channel *chan = (serial_channel *)tab->priv; + edb7xxx_serial_info *edb7xxx_chan = (edb7xxx_serial_info *)chan->dev_priv; +#ifdef CYGDBG_IO_INIT + diag_printf("EDB7XXX SERIAL init - dev: %x.%d\n", edb7xxx_chan->control, edb7xxx_chan->tx_int_num); +#endif + (chan->callbacks->serial_init)(chan); // Really only required for interrupt driven devices + if (chan->out_cbuf.len != 0) { + cyg_drv_interrupt_create(edb7xxx_chan->tx_int_num, + 99, // Priority - unused + (cyg_addrword_t)chan, // Data item passed to interrupt handler + edb7xxx_serial_tx_ISR, + edb7xxx_serial_tx_DSR, + &edb7xxx_chan->serial_tx_interrupt_handle, + &edb7xxx_chan->serial_tx_interrupt); + cyg_drv_interrupt_attach(edb7xxx_chan->serial_tx_interrupt_handle); + cyg_drv_interrupt_mask(edb7xxx_chan->tx_int_num); + edb7xxx_chan->tx_enabled = false; + } + if (chan->in_cbuf.len != 0) { + cyg_drv_interrupt_create(edb7xxx_chan->rx_int_num, + 99, // Priority - unused + (cyg_addrword_t)chan, // Data item passed to interrupt handler + edb7xxx_serial_rx_ISR, + edb7xxx_serial_rx_DSR, + &edb7xxx_chan->serial_rx_interrupt_handle, + &edb7xxx_chan->serial_rx_interrupt); + cyg_drv_interrupt_attach(edb7xxx_chan->serial_rx_interrupt_handle); + cyg_drv_interrupt_unmask(edb7xxx_chan->rx_int_num); + } + edb7xxx_serial_config_port(chan, &chan->config, true); + return true; +} + +// This routine is called when the device is "looked" up (i.e. attached) +static Cyg_ErrNo +edb7xxx_serial_lookup(struct cyg_devtab_entry **tab, + struct cyg_devtab_entry *sub_tab, + const char *name) +{ + serial_channel *chan = (serial_channel *)(*tab)->priv; + (chan->callbacks->serial_init)(chan); // Really only required for interrupt driven devices + return ENOERR; +} + +// Send a character to the device output buffer. +// Return 'true' if character is sent to device +static bool +edb7xxx_serial_putc(serial_channel *chan, unsigned char c) +{ + edb7xxx_serial_info *edb7xxx_chan = (edb7xxx_serial_info *)chan->dev_priv; + volatile cyg_uint8 *data = (volatile cyg_uint8 *)edb7xxx_chan->data; + volatile cyg_uint32 *stat = (volatile cyg_uint32 *)edb7xxx_chan->stat; + if ((*stat & SYSFLG1_UTXFF1) == 0) { +// Transmit buffer/FIFO is not full + *data = c; + return true; + } else { +// No space + return false; + } +} + +// Fetch a character from the device input buffer, waiting if necessary +static unsigned char +edb7xxx_serial_getc(serial_channel *chan) +{ + unsigned char c; + edb7xxx_serial_info *edb7xxx_chan = (edb7xxx_serial_info *)chan->dev_priv; + volatile cyg_uint32 *data = (volatile cyg_uint32 *)edb7xxx_chan->data; + volatile cyg_uint32 *stat = (volatile cyg_uint32 *)edb7xxx_chan->stat; + while (*stat & SYSFLG1_URXFE1) ; // Wait for char + c = *data; + return c; +} + +// Set up the device characteristics; baud rate, etc. +static bool +edb7xxx_serial_set_config(serial_channel *chan, cyg_serial_info_t *config) +{ + return edb7xxx_serial_config_port(chan, config, false); +} + +// Enable the transmitter (interrupt) on the device +static void +edb7xxx_serial_start_xmit(serial_channel *chan) +{ + edb7xxx_serial_info *edb7xxx_chan = (edb7xxx_serial_info *)chan->dev_priv; + edb7xxx_chan->tx_enabled = true; + cyg_drv_interrupt_unmask(edb7xxx_chan->tx_int_num); +} + +// Disable the transmitter on the device +static void +edb7xxx_serial_stop_xmit(serial_channel *chan) +{ + edb7xxx_serial_info *edb7xxx_chan = (edb7xxx_serial_info *)chan->dev_priv; + cyg_drv_interrupt_mask(edb7xxx_chan->tx_int_num); + edb7xxx_chan->tx_enabled = false; +} + +// Serial I/O - low level Tx interrupt handler (ISR) +static cyg_uint32 +edb7xxx_serial_tx_ISR(cyg_vector_t vector, cyg_addrword_t data) +{ + serial_channel *chan = (serial_channel *)data; + edb7xxx_serial_info *edb7xxx_chan = (edb7xxx_serial_info *)chan->dev_priv; + cyg_drv_interrupt_mask(edb7xxx_chan->tx_int_num); + cyg_drv_interrupt_acknowledge(edb7xxx_chan->tx_int_num); + return CYG_ISR_CALL_DSR; // Cause DSR to be run +} + +// Serial I/O - high level Tx interrupt handler (DSR) +static void +edb7xxx_serial_tx_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data) +{ + serial_channel *chan = (serial_channel *)data; + edb7xxx_serial_info *edb7xxx_chan = (edb7xxx_serial_info *)chan->dev_priv; + (chan->callbacks->xmt_char)(chan); + if (edb7xxx_chan->tx_enabled) { + cyg_drv_interrupt_unmask(edb7xxx_chan->tx_int_num); + } +} + +// Serial I/O - low level Rx interrupt handler (ISR) +static cyg_uint32 +edb7xxx_serial_rx_ISR(cyg_vector_t vector, cyg_addrword_t data) +{ + serial_channel *chan = (serial_channel *)data; + edb7xxx_serial_info *edb7xxx_chan = (edb7xxx_serial_info *)chan->dev_priv; + cyg_drv_interrupt_mask(edb7xxx_chan->rx_int_num); + cyg_drv_interrupt_acknowledge(edb7xxx_chan->rx_int_num); + return CYG_ISR_CALL_DSR; // Cause DSR to be run +} + +// Serial I/O - high level Rx interrupt handler (DSR) +static void +edb7xxx_serial_rx_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data) +{ + serial_channel *chan = (serial_channel *)data; + edb7xxx_serial_info *edb7xxx_chan = (edb7xxx_serial_info *)chan->dev_priv; + volatile cyg_uint32 *datreg = (volatile cyg_uint32 *)edb7xxx_chan->data; + volatile cyg_uint32 *stat = (volatile cyg_uint32 *)edb7xxx_chan->stat; + while (!(*stat & SYSFLG1_URXFE1)) + (chan->callbacks->rcv_char)(chan, *datreg); + cyg_drv_interrupt_unmask(edb7xxx_chan->rx_int_num); +} + +// Serial I/O - low level Ms interrupt handler (ISR) +static cyg_uint32 +edb7xxx_serial_ms_ISR(cyg_vector_t vector, cyg_addrword_t data) +{ + serial_channel *chan = (serial_channel *)data; + edb7xxx_serial_info *edb7xxx_chan = (edb7xxx_serial_info *)chan->dev_priv; + cyg_drv_interrupt_mask(edb7xxx_chan->ms_int_num); + cyg_drv_interrupt_acknowledge(edb7xxx_chan->ms_int_num); + return CYG_ISR_CALL_DSR; // Cause DSR to be run +} + +// Serial I/O - high level Ms interrupt handler (DSR) +static void +edb7xxx_serial_ms_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data) +{ +} +#endif // CYGPKG_IO_SERIAL_ARM_EDB7XXX +
new file mode 100644 --- /dev/null +++ b/packages/io/serial/current/src/arm/edb7xxx_serial.h @@ -0,0 +1,98 @@ +#ifndef CYGONCE_ARM_EDB7XXX_SERIAL_H +#define CYGONCE_ARM_EDB7XXX_SERIAL_H + +// ==================================================================== +// +// edb7xxx_serial.h +// +// Device I/O - Description of Cirrus Logic EDB7XXX serial hardware +// +// ==================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +// ==================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 1999-02-04 +// Purpose: Internal interfaces for serial I/O drivers +// Description: +// +//####DESCRIPTIONEND#### +// +// ==================================================================== + +// Description of serial ports on Cirrus Logic EDB7XXX + +#include <cyg/hal/hal_edb7xxx.h> // Hardware definitions + +static unsigned int select_word_length[] = { + UBLCR_WRDLEN5, // 5 bits / word (char) + UBLCR_WRDLEN6, + UBLCR_WRDLEN7, + UBLCR_WRDLEN8 +}; + +static unsigned int select_stop_bits[] = { + 0, + 0, // 1 stop bit + 0, // 1.5 stop bit + UBLCR_XSTOP // 2 stop bits +}; + +static unsigned int select_parity[] = { + 0, // No parity + UBLCR_PRTEN|UBLCR_EVENPRT, // Even parity + UBLCR_PRTEN, // Odd parity + 0, // Mark parity + 0, // Space parity +}; + +// Baud rate values, based on PLL clock + +static cyg_int32 select_baud[] = { + 0, // Unused + 50, // 50 + 75, // 75 + 110, // 110 + 0, // 134.5 + 150, // 150 + 200, // 200 + 300, // 300 + 600, // 600 + 1200, // 1200 + 1800, // 1800 + 2400, // 2400 + 3600, // 3600 + 4800, // 4800 + 7200, // 7200 + 9600, // 9600 + 14400, // 14400 + 19200, // 19200 + 38400, // 38400 + 57600, // 57600 + 115200, // 115200 + 0, // 230400 +}; + +#endif // CYGONCE_ARM_EDB7XXX_SERIAL_H
--- a/packages/io/serial/current/tests/ser_test_protocol.inl +++ b/packages/io/serial/current/tests/ser_test_protocol.inl @@ -103,11 +103,11 @@ # define TEST_TTY_DEV CYGDAT_IO_SERIAL_TTY_TTY1_DEV # endif #endif -#if defined(CYGPKG_HAL_ARM_CL7211) \ - && defined(CYGPKG_IO_SERIAL_ARM_CL7211) \ - && defined(CYGPKG_IO_SERIAL_ARM_CL7211_SERIAL1) -# define TEST_CRASH_ID "armcl7" -# define TEST_SER_DEV CYGDAT_IO_SERIAL_ARM_CL7211_SERIAL1_NAME +#if defined(CYGPKG_HAL_ARM_EDB7XXX) \ + && defined(CYGPKG_IO_SERIAL_ARM_EDB7XXX) \ + && defined(CYGPKG_IO_SERIAL_ARM_EDB7XXX_SERIAL1) +# define TEST_CRASH_ID "armedb7xxx" +# define TEST_SER_DEV CYGDAT_IO_SERIAL_ARM_EDB7XXX_SERIAL1_NAME # if defined(CYGPKG_IO_SERIAL_TTY_TTY1) # define TEST_TTY_DEV CYGDAT_IO_SERIAL_TTY_TTY1_DEV # endif @@ -334,7 +334,7 @@ cyg_ser_cfg_t test_configs[] = { !defined(CYGPKG_HAL_ARM_AEB) && \ !defined(CYGPKG_HAL_MN10300_STDEVAL1) && \ !defined(CYGPKG_HAL_ARM_CMA230) && \ - !defined(CYGPKG_HAL_ARM_CL7211) && \ + !defined(CYGPKG_HAL_ARM_EDB7XXX) && \ !defined(CYGPKG_HAL_SPARCLITE_SLEB) { CYGNUM_SERIAL_BAUD_115200, CYGNUM_SERIAL_WORD_LENGTH_8, CYGNUM_SERIAL_STOP_1, CYGNUM_SERIAL_PARITY_NONE },
--- a/packages/kernel/current/tests/PKGconf.mak +++ b/packages/kernel/current/tests/PKGconf.mak @@ -46,7 +46,7 @@ TESTS += kcache1 kcache2 endif -ifdef CYGPKG_HAL_ARM_CL7211 +ifdef CYGPKG_HAL_ARM_EDB7XXX TESTS += kcache1 kcache2 endif
--- a/packages/packages +++ b/packages/packages @@ -144,9 +144,9 @@ package CYGPKG_HAL_ARM_AEB { hardware } -package CYGPKG_HAL_ARM_CL7211 { - alias { "Cirrus Logic CL7211 evaluation board support" hal_arm_cl7211 arm_cl7211_hal } - directory hal/arm/cl7211 +package CYGPKG_HAL_ARM_EDB7XXX { + alias { "Cirrus Logic EDB7xxx evaluation board(s) support" hal_arm_edb7xxx arm_edb7xxx_hal } + directory hal/arm/edb7xxx include_dir cyg/hal hardware }
--- a/packages/targets +++ b/packages/targets @@ -227,7 +227,7 @@ target arm { ERRFLAGS "-Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef" CXXERRFLAGS "-Woverloaded-virtual" DBGFLAGS "-g -O2" - LANGFLAGS "-ffunction-sections -fdata-sections" + LANGFLAGS "-ffunction-sections -fdata-sections -mno-sched-prolog" CXXLANGFLAGS "-fno-rtti -fno-exceptions -fvtable-gc -finit-priority" LDLANGFLAGS "-Wl,--gc-sections -Wl,-static" } @@ -279,7 +279,7 @@ target arm { ERRFLAGS "-Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef" CXXERRFLAGS "-Woverloaded-virtual" DBGFLAGS "-g -O2" - LANGFLAGS "-ffunction-sections -fdata-sections" + LANGFLAGS "-ffunction-sections -fdata-sections -mno-sched-prolog" CXXLANGFLAGS "-fno-rtti -fno-exceptions -fvtable-gc -finit-priority" LDLANGFLAGS "-Wl,--gc-sections -Wl,-static" } @@ -296,7 +296,7 @@ target arm { ERRFLAGS "-Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef" CXXERRFLAGS "-Woverloaded-virtual" DBGFLAGS "-g -O2" - LANGFLAGS "-ffunction-sections -fdata-sections" + LANGFLAGS "-ffunction-sections -fdata-sections -mno-sched-prolog" CXXLANGFLAGS "-fno-rtti -fno-exceptions -fvtable-gc -finit-priority" LDLANGFLAGS "-Wl,--gc-sections -Wl,-static" } @@ -304,38 +304,39 @@ target arm { platform cl7111 { alias { "Cirrus Logic Eval Board (CL7111)" } startup { ram rom stubs } - base_platform cl7211 + base_platform edb7xxx packages { - CYGPKG_HAL_ARM_CL7211 + CYGPKG_HAL_ARM_EDB7XXX } cflags { ARCHFLAGS "-mcpu=arm710c -D__CL7111" ERRFLAGS "-Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef" CXXERRFLAGS "-Woverloaded-virtual" DBGFLAGS "-g -O2" - LANGFLAGS "-ffunction-sections -fdata-sections" + LANGFLAGS "-ffunction-sections -fdata-sections -mno-sched-prolog" CXXLANGFLAGS "-fno-rtti -fno-exceptions -fvtable-gc -finit-priority" LDLANGFLAGS "-Wl,--gc-sections -Wl,-static" } } # FIXME: ARCHFLAGS "-mcpu=arm720" - platform eb7211 { - alias { "Cirrus Logic Eval Board (EB7211)" } + platform edb7211 { + alias { "Cirrus Logic Eval Board (EDB7211)" eb7211 } startup { ram rom stubs } - base_platform cl7211 + base_platform edb7xxx packages { - CYGPKG_HAL_ARM_CL7211 + CYGPKG_HAL_ARM_EDB7XXX } cflags { - ARCHFLAGS "-mcpu=arm7tdmi -D__CL7211" + ARCHFLAGS "-mcpu=arm7tdmi -D__EDB7211" ERRFLAGS "-Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef" CXXERRFLAGS "-Woverloaded-virtual" DBGFLAGS "-g -O2" - LANGFLAGS "-ffunction-sections -fdata-sections" + LANGFLAGS "-ffunction-sections -fdata-sections -mno-sched-prolog" CXXLANGFLAGS "-fno-rtti -fno-exceptions -fvtable-gc -finit-priority" LDLANGFLAGS "-Wl,--gc-sections -Wl,-static" } } + platform cma230 { alias { "Cogent CMA230" } startup { ram rom stubs } @@ -347,7 +348,7 @@ target arm { ERRFLAGS "-Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef" CXXERRFLAGS "-Woverloaded-virtual" DBGFLAGS "-g -O2" - LANGFLAGS "-ffunction-sections -fdata-sections" + LANGFLAGS "-ffunction-sections -fdata-sections -mno-sched-prolog" CXXLANGFLAGS "-fno-rtti -fno-exceptions -fvtable-gc -finit-priority" LDLANGFLAGS "-Wl,--gc-sections -Wl,-static" }