Mercurial > ecos-v3_0-branch
annotate packages/devs/eth/arm/ixdp425/i82559/current/include/ixdp425_i82559.inl @ 2729:74dbf4c3f2e1 after-copyright-change-20090129
Update all copyright banners to reflect FSF ownership; fix and improve licence text.
| author | jlarmour |
|---|---|
| date | Thu, 29 Jan 2009 17:47:46 +0000 |
| parents | 4f1b647b74e0 |
| children |
| rev | line source |
|---|---|
| 835 | 1 //========================================================================== |
| 2 // | |
| 3 // ixdp425_i82559.inl | |
| 4 // | |
| 5 // IXDP425 ethernet I/O definitions. | |
| 6 // | |
| 7 //========================================================================== | |
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8 // ####ECOSGPLCOPYRIGHTBEGIN#### |
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9 // ------------------------------------------- |
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10 // This file is part of eCos, the Embedded Configurable Operating System. |
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11 // Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc. |
| 871 | 12 // |
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13 // eCos is free software; you can redistribute it and/or modify it under |
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14 // the terms of the GNU General Public License as published by the Free |
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15 // Software Foundation; either version 2 or (at your option) any later |
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16 // version. |
| 871 | 17 // |
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18 // eCos is distributed in the hope that it will be useful, but WITHOUT |
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19 // ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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20 // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
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21 // for more details. |
| 871 | 22 // |
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23 // You should have received a copy of the GNU General Public License |
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74dbf4c3f2e1
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24 // along with eCos; if not, write to the Free Software Foundation, Inc., |
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74dbf4c3f2e1
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25 // 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. |
| 871 | 26 // |
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27 // As a special exception, if other files instantiate templates or use |
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28 // macros or inline functions from this file, or you compile this file |
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74dbf4c3f2e1
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29 // and link it with other works to produce a work based on this file, |
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30 // this file does not by itself cause the resulting work to be covered by |
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74dbf4c3f2e1
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31 // the GNU General Public License. However the source code for this file |
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32 // must still be made available in accordance with section (3) of the GNU |
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74dbf4c3f2e1
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33 // General Public License v2. |
| 871 | 34 // |
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35 // This exception does not invalidate any other reasons why a work based |
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74dbf4c3f2e1
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jlarmour
parents:
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36 // on this file might be covered by the GNU General Public License. |
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74dbf4c3f2e1
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jlarmour
parents:
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37 // ------------------------------------------- |
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38 // ####ECOSGPLCOPYRIGHTEND#### |
| 835 | 39 //========================================================================== |
| 40 //#####DESCRIPTIONBEGIN#### | |
| 41 // | |
| 42 // Author(s): | |
| 43 // Contributors:msalter | |
| 44 // Date: 2002-05-14 | |
| 45 // Purpose: ixdp425 ethernet definitions | |
| 46 //####DESCRIPTIONEND#### | |
| 47 //========================================================================== | |
| 48 | |
| 49 #include <cyg/hal/hal_intr.h> // CYGNUM_HAL_INTERRUPT_ETHERNET | |
| 50 #include <cyg/hal/hal_cache.h> // HAL_DCACHE_LINE_SIZE | |
| 51 #include <cyg/hal/plf_io.h> // CYGARC_UNCACHED_ADDRESS | |
| 52 | |
| 53 // Bus hardware takes care of IO endianess issues. | |
| 54 #define CYGHWR_DEVS_ETH_INTEL_I82559_ENDIAN_NEUTRAL_IO 1 | |
| 55 | |
| 56 // NB: Bus masters can only get to first 64MB SDRAM | |
| 57 #define CYGHWR_INTEL_I82559_PCI_VIRT_TO_BUS( _x_ ) \ | |
| 58 ((cyg_uint32)CYGARC_VIRT_TO_BUS(_x_)) | |
| 59 | |
| 60 #define MAX_PACKET_SIZE 1536 | |
| 61 #define SIZEOF_DESCRIPTOR 16 | |
| 62 #define MISC_MEM 1128 // selftest, ioctl and statistics | |
| 63 | |
| 64 #define CYGHWR_INTEL_I82559_PCI_MEM_MAP_SIZE \ | |
| 65 (((MAX_PACKET_SIZE + SIZEOF_DESCRIPTOR) * \ | |
| 66 (CYGNUM_DEVS_ETH_INTEL_I82559_MAX_TX_DESCRIPTORS + \ | |
| 67 CYGNUM_DEVS_ETH_INTEL_I82559_MAX_RX_DESCRIPTORS)) + \ | |
| 68 MISC_MEM)*CYGNUM_DEVS_ETH_INTEL_I82559_DEV_COUNT | |
| 69 | |
| 70 // The PCI Window is 64MB starting at 0x00000000, so as long as the bss | |
| 71 // section is within addresses 0x00000000-0x04000000, pci_mem_buffer[] will be | |
| 72 // in the true PCI Window. Because pci_mem_buffer[] is in the bss section, | |
| 73 // wanted its size to be only as large as required so as to not waste memory. | |
| 74 // Therefore, had to compute it's size in this file and not in the memory | |
| 75 // layout files. So no __pci_window label was ever defined, therefore, | |
| 76 // CYGMEM_SECTION_pci_window does not exist. Define CYGMEM_SECTION_pci_window | |
| 77 // here in order to satisfy the ASSERT within if_i82559.c. | |
| 78 static char pci_mem_buffer[CYGHWR_INTEL_I82559_PCI_MEM_MAP_SIZE | |
| 79 + HAL_DCACHE_LINE_SIZE]; | |
| 80 | |
| 81 #define CYGMEM_SECTION_pci_window (((unsigned)pci_mem_buffer \ | |
| 82 + HAL_DCACHE_LINE_SIZE - 1) \ | |
| 83 & ~(HAL_DCACHE_LINE_SIZE - 1)) | |
| 84 | |
| 85 #define CYGHWR_INTEL_I82559_PCI_MEM_MAP_BASE \ | |
| 86 (CYGARC_UNCACHED_ADDRESS(CYGMEM_SECTION_pci_window)) | |
| 87 | |
| 88 | |
| 89 #ifdef CYGPKG_DEVS_ETH_ARM_IXDP425_I82559_ETH0 | |
| 90 | |
| 91 static I82559 i82559_eth0_priv_data = { | |
| 92 hardwired_esa: 0, | |
| 93 #if defined(CYGPKG_REDBOOT) && defined(CYGVAR_DEVS_ETH_I82559_ETH_REDBOOT_HOLDS_ESA_ETH0) | |
| 94 mac_address: CYGDAT_DEVS_ETH_ARM_IXDP425_ETH0_DEFAULT_ESA | |
| 95 #endif | |
| 96 }; | |
| 97 | |
| 98 ETH_DRV_SC(i82559_sc0, | |
| 99 &i82559_eth0_priv_data, // Driver specific data | |
| 100 CYGDAT_DEVS_ETH_ARM_IXDP425_I82559_ETH0_NAME, // Name for device | |
| 101 i82559_start, | |
| 102 i82559_stop, | |
| 103 i82559_ioctl, | |
| 104 i82559_can_send, | |
| 105 i82559_send, | |
| 106 i82559_recv, | |
| 107 i82559_deliver, | |
| 108 i82559_poll, | |
| 109 i82559_int_vector | |
| 110 ); | |
| 111 | |
| 112 NETDEVTAB_ENTRY(i82559_netdev0, | |
| 113 "i82559_" CYGDAT_DEVS_ETH_ARM_IXDP425_I82559_ETH0_NAME, | |
| 114 i82559_init, | |
| 115 &i82559_sc0); | |
| 116 #endif // CYGPKG_DEVS_ETH_ARM_IXP425_I82559_ETH0 | |
| 117 | |
| 118 | |
| 119 // These arrays are used for sanity checking of pointers | |
| 120 I82559 * | |
| 121 i82559_priv_array[CYGNUM_DEVS_ETH_INTEL_I82559_DEV_COUNT] = { | |
| 122 #ifdef CYGPKG_DEVS_ETH_ARM_IXDP425_I82559_ETH0 | |
| 123 &i82559_eth0_priv_data, | |
| 124 #endif | |
| 125 }; | |
| 126 | |
| 127 #ifdef CYGDBG_USE_ASSERTS | |
| 128 // These are only used when assertions are enabled | |
| 129 cyg_netdevtab_entry_t * | |
| 130 i82559_netdev_array[CYGNUM_DEVS_ETH_INTEL_I82559_DEV_COUNT] = { | |
| 131 #ifdef CYGPKG_DEVS_ETH_ARM_IXDP425_I82559_ETH0 | |
| 132 &i82559_netdev0, | |
| 133 #endif | |
| 134 }; | |
| 135 | |
| 136 struct eth_drv_sc * | |
| 137 i82559_sc_array[CYGNUM_DEVS_ETH_INTEL_I82559_DEV_COUNT] = { | |
| 138 #ifdef CYGPKG_DEVS_ETH_ARM_IXDP425_I82559_ETH0 | |
| 139 &i82559_sc0, | |
| 140 #endif | |
| 141 }; | |
| 142 #endif // CYGDBG_USE_ASSERTS | |
| 143 | |
| 144 // -------------------------------------------------------------- | |
| 145 // RedBoot configuration options for managing ESAs for us | |
| 146 | |
| 147 // Decide whether to have redboot config vars for it... | |
| 148 #ifdef CYGPKG_REDBOOT | |
| 149 #include <pkgconf/redboot.h> | |
| 150 #ifdef CYGSEM_REDBOOT_FLASH_CONFIG | |
| 151 #ifdef CYGPKG_REDBOOT_NETWORKING | |
| 152 #include <redboot.h> | |
| 153 #include <flash_config.h> | |
| 154 | |
| 155 #ifdef CYGVAR_DEVS_ETH_I82559_ETH_REDBOOT_HOLDS_ESA_ETH0 | |
| 156 RedBoot_config_option("Network hardware address [MAC] for eth0", | |
| 157 eth0_esa, | |
| 158 ALWAYS_ENABLED, true, | |
| 159 CONFIG_ESA, i82559_eth0_priv_data.mac_address | |
| 160 ); | |
| 161 #endif | |
| 162 | |
| 163 #endif // CYGPKG_REDBOOT_NETWORKING | |
| 164 #endif // CYGSEM_REDBOOT_FLASH_CONFIG | |
| 165 #endif // CYGPKG_REDBOOT | |
| 166 | |
| 167 // and initialization code to read them | |
| 168 // - independent of whether we are building RedBoot right now: | |
| 169 #ifdef CYGPKG_DEVS_ETH_I82559_ETH_REDBOOT_HOLDS_ESA | |
| 170 | |
| 171 #include <cyg/hal/hal_if.h> | |
| 172 | |
| 173 #ifndef CONFIG_ESA | |
| 174 #define CONFIG_ESA (6) | |
| 175 #endif | |
| 176 | |
| 177 #define CYGHWR_DEVS_ETH_INTEL_I82559_GET_ESA( p_i82559, mac_address, ok ) \ | |
| 178 CYG_MACRO_START \ | |
| 179 ok = false; \ | |
| 180 if ( 0 == p_i82559->index ) \ | |
| 181 ok = CYGACC_CALL_IF_FLASH_CFG_OP( CYGNUM_CALL_IF_FLASH_CFG_GET, \ | |
| 182 "eth0_esa", mac_address, CONFIG_ESA); \ | |
| 183 else if ( 1 == p_i82559->index ) \ | |
| 184 ok = CYGACC_CALL_IF_FLASH_CFG_OP( CYGNUM_CALL_IF_FLASH_CFG_GET, \ | |
| 185 "eth1_esa", mac_address, CONFIG_ESA); \ | |
| 186 CYG_MACRO_END | |
| 187 | |
| 188 #endif // CYGPKG_DEVS_ETH_I82559_ETH_REDBOOT_HOLDS_ESA |