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Update all copyright banners to reflect FSF ownership; fix and improve licence text.
author jlarmour
date Thu, 29 Jan 2009 17:47:46 +0000
parents ebd0ea2e6282
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1 <!-- DOCTYPE part PUBLIC "-//OASIS//DTD DocBook V3.1//EN" -->
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2
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3 <!-- {{{ Banner -->
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4
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5 <!-- =============================================================== -->
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6 <!-- -->
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7 <!-- mcf5272.sgml -->
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8 <!-- -->
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9 <!-- mcf5272 processor HAL documentation. -->
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10 <!-- -->
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11 <!-- =============================================================== -->
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12 <!-- ####ECOSDOCCOPYRIGHTBEGIN#### -->
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13 <!-- =============================================================== -->
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14 <!-- Copyright (C) 2003, 2008 Free Software Foundation, Inc. -->
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15 <!-- This material may be distributed only subject to the terms -->
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16 <!-- and conditions set forth in the Open Publication License, v1.0 -->
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17 <!-- or later (the latest version is presently available at -->
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18 <!-- http://www.opencontent.org/openpub/) -->
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19 <!-- Distribution of the work or derivative of the work in any -->
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20 <!-- standard (paper) book form is prohibited unless prior -->
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21 <!-- permission obtained from the copyright holder -->
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22 <!-- =============================================================== -->
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23 <!-- ####ECOSDOCCOPYRIGHTEND#### -->
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24 <!-- =============================================================== -->
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25 <!-- #####DESCRIPTIONBEGIN#### -->
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26 <!-- -->
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27 <!-- Author(s): bartv -->
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28 <!-- Contact(s): bartv -->
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29 <!-- Date: 2003/07/15 -->
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30 <!-- Version: 0.01 -->
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31 <!-- -->
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32 <!-- ####DESCRIPTIONEND#### -->
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33 <!-- =============================================================== -->
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34
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35 <!-- }}} -->
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36
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37 <part id="hal-m68k-mcf5272"><title>Freescale MCF5272 Processor Support</title>
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38
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39 <refentry id="m68k-mcf5272">
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40 <refmeta>
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41 <refentrytitle>The MCF5272 ColdFire Processor</refentrytitle>
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42 </refmeta>
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43 <refnamediv>
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44 <refname><varname>CYGPKG_HAL_M68K_MCF5272</varname></refname>
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45 <refpurpose>eCos Support for the Freescale MCF5272 Processor</refpurpose>
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46 </refnamediv>
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47
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48 <refsect1 id="m68k-mcf5272-description"><title>Description</title>
ebd0ea2e6282 Contribute eCosCentric's MCF5272 processor HAL, replacing the old
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49 <para>
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50 The MCF5272 is one member of the Freescale MCFxxxx ColdFire range of
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51 processors. It comes with a number of on-chip peripherals including 2
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52 UARTs, ethernet, and USB slave. The processor HAL package
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53 <varname>CYGPKG_HAL_M68K_MCF5272</varname> provides support for
ebd0ea2e6282 Contribute eCosCentric's MCF5272 processor HAL, replacing the old
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54 features that are specific to the MCF5272. It complements the M68K
ebd0ea2e6282 Contribute eCosCentric's MCF5272 processor HAL, replacing the old
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55 architectural HAL package <varname>CYGPKG_HAL_M68K</varname> and the
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56 variant HAL package <varname>CYGPKG_HAL_M68K_MCFxxxx</varname>. An
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57 eCos configuration should also include a platform HAL package, for
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58 example <varname>CYGPKG_HAL_M68K_M5272C3</varname> to support
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59 board-level details like the external memory chips.
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60 </para>
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61 </refsect1>
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62
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63 <refsect1 id="m68k-mcf5272-config"><title>Configuration</title>
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64 <para>
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65 The MCF5272 processor HAL package should be loaded automatically when
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66 eCos is configured for appropriate target hardware. It should never be
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67 necessary to load this package explicitly. Unloading the package
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68 should only happen as a side effect of switching target hardware.
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69 </para>
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70 <para>
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71 The component <varname>CYGPKG_HAL_M68K_MCF5272_HARDWARE</varname>
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72 contains configuration options for the available hardware. This
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73 includes all GPIO pin settings, with defaults provided by the
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74 platform HAL. In turn the pin settings are used to determine defaults
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75 for other hardware settings, for example which of the two on-chip
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76 uarts are usable. Users can override these settings if necessary,
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77 subject to any constraints imposed by the platform HAL, but care has
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78 to be taken that the resulting configuration still matches the actual
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79 hardware.
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80 </para>
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81 <para>
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82 The option <varname>CYGIMP_HAL_M68K_MCF5272_IDLE</varname> controls
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83 what happens in configurations containing the eCos kernel when the
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84 idle thread runs, i.e. when there is nothing for the processor to do
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85 until the next interrupt comes in. Usually the processor made to
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86 sleep, halting the cpu but leaving all peripherals active.
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87 </para>
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88 <para>
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89 The package contains a single configuration option
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90 <varname>CYGFUN_HAL_M68K_MCF5272_PROFILE_TIMER</varname>. This
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91 controls the support for gprof-based profiling. By default it is
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92 active and enabled if the configuration contains the gprof profiling
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93 package, otherwise inactive. The relevant code uses hardware timer 2,
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94 so that timer is no longer available for application code. If the
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95 timer is required but a platform HAL provides an alternative
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96 implementation of the profiling support then this option can be
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97 disabled.
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98 </para>
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99 </refsect1>
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100
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101 <refsect1 id="m68k-mcf5272-port"><title>The HAL Port</title>
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102 <para>
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103 This section describes how the MCF5272 processor HAL package
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104 implements parts of the eCos HAL specification. It should be read in
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105 conjunction with similar sections from the architectural and variant
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106 HAL documentation.
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107 </para>
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108
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109 <refsect2 id="m68k-mcf5272-port-io"><title>HAL I/O</title>
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110 <para>
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111 The header
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112 file <filename class="headerfile">cyg/hal/proc_io.h</filename>
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113 specifies which generic MCFxxxx devices are present, and provides
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114 details of MCF5272-specific devices. This header file is automatically
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115 included by the architectural
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116 header <filename class="headerfile">cyg/hal/hal_io.h</filename>, so
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117 typically application code and other packages will just include the
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118 latter.
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119 </para>
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120 <para>
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121 It should be noted that the Freescale documentation is occasionally
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122 confusing when it comes to numbering devices. For example the four
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123 on-chip timers are numbered TMR0 to TMR3, but in the interrupt
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124 controller the corresponding interrupts are numbered TMR1 to TMR4. The
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125 eCos port consistently starts numbering at 0, so these interrupts have
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126 been renamed TMR0 to TMR3.
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127 </para>
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128 </refsect2>
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129
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130 <refsect2 id="m68k-mcf5272-port-interrupts"><title>Interrupt Handling</title>
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131 <para>
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132 The header file <filename
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133 class="headerfile">cyg/hal/proc_intr.h</filename> provides VSR and ISR
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134 vector numbers for all interrupt sources. The VSR vector number, for
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135 example <varname>CYGNUM_HAL_VECTOR_TMR0</varname>, should be used
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136 for calls like <function>cyg_interrupt_get_vsr</function>. It
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137 corresponds directly to the M68K exception number. The ISR vector
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138 number, for example <varname>CYGNUM_HAL_ISR_TMR0</varname>, should be
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139 used for calls like <function>cyg_interrupt_create</function>. This
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140 header file is automatically included by the architectural header
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141 <filename class="headerfile">cyg/hal/hal_intr.h</filename>, and other
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142 packages and application code will normally just include the latter.
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143 </para>
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144 <para>
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145 The eCos HAL macros <function>HAL_INTERRUPT_MASK</function>,
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146 <function>HAL_INTERRUPT_UNMASK</function>,
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147 <function>HAL_INTERRUPT_SET_LEVEL</function>,
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148 <function>HAL_INTERRUPT_ACKNOWLEDGE</function>, and
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149 <function>HAL_INTERRUPT_CONFIGURE</function> are implemented by the
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150 processor HAL. The mask and unmask operations are straightforward,
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151 simply manipulating the on-chip interrupt controller. The acknowledge
ebd0ea2e6282 Contribute eCosCentric's MCF5272 processor HAL, replacing the old
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152 and configure macros are only relevant for external interrupts:
ebd0ea2e6282 Contribute eCosCentric's MCF5272 processor HAL, replacing the old
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153 internal interrupts generated by on-chip devices do not need to be
ebd0ea2e6282 Contribute eCosCentric's MCF5272 processor HAL, replacing the old
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154 acknowledged. The set-level operation, used implicitly by higher level
ebd0ea2e6282 Contribute eCosCentric's MCF5272 processor HAL, replacing the old
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155 code such as <function>cyg_interrupt_create</function>, is mapped on
ebd0ea2e6282 Contribute eCosCentric's MCF5272 processor HAL, replacing the old
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156 to M68K IPL levels so interrupts can be given a priority between 1
ebd0ea2e6282 Contribute eCosCentric's MCF5272 processor HAL, replacing the old
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157 and 7. Priority 7 corresponds to non-maskable interrupts and must be
ebd0ea2e6282 Contribute eCosCentric's MCF5272 processor HAL, replacing the old
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158 used with care: such interrupts cannot be managed safely by the usual
ebd0ea2e6282 Contribute eCosCentric's MCF5272 processor HAL, replacing the old
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159 eCos ISR and DSR mechanisms; instead application code will have to
ebd0ea2e6282 Contribute eCosCentric's MCF5272 processor HAL, replacing the old
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160 install a custom VSR and manage the entire interrupt.
ebd0ea2e6282 Contribute eCosCentric's MCF5272 processor HAL, replacing the old
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161 </para>
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162 </refsect2>
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163
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164 <refsect2 id="m68k-mcf5272-port-clock"><title>Clock Support</title>
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165 <para>
ebd0ea2e6282 Contribute eCosCentric's MCF5272 processor HAL, replacing the old
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166 The processor HAL provides support for the eCos system clock. This
ebd0ea2e6282 Contribute eCosCentric's MCF5272 processor HAL, replacing the old
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167 always uses hardware timer 3, which should not be used directly by
ebd0ea2e6282 Contribute eCosCentric's MCF5272 processor HAL, replacing the old
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168 application code. If gprof-based profiling is in use then that will
ebd0ea2e6282 Contribute eCosCentric's MCF5272 processor HAL, replacing the old
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169 use hardware timer 2. Timers 0 and 1 are never used by eCos so
ebd0ea2e6282 Contribute eCosCentric's MCF5272 processor HAL, replacing the old
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170 application code is free to manipulate these as required.
ebd0ea2e6282 Contribute eCosCentric's MCF5272 processor HAL, replacing the old
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171 </para>
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172 <para>
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173 Some of the configuration options related to the system clock, for
ebd0ea2e6282 Contribute eCosCentric's MCF5272 processor HAL, replacing the old
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174 example <varname>CYGNUM_HAL_RTC_PERIOD</varname>, are actually
ebd0ea2e6282 Contribute eCosCentric's MCF5272 processor HAL, replacing the old
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175 contained in the platform HAL rather than the processor HAL. These
ebd0ea2e6282 Contribute eCosCentric's MCF5272 processor HAL, replacing the old
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176 options need to take into account the processor clock speed, a
ebd0ea2e6282 Contribute eCosCentric's MCF5272 processor HAL, replacing the old
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177 characteristic of the platform rather than the processor.
ebd0ea2e6282 Contribute eCosCentric's MCF5272 processor HAL, replacing the old
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178 </para>
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179 </refsect2>
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180
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181 <refsect2 id="m68k-mcf5272-port-cache"><title>Cache Handling</title>
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182 <para>
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183 The MCF5272 has a small instruction cache of 1024 bytes. This is fully
ebd0ea2e6282 Contribute eCosCentric's MCF5272 processor HAL, replacing the old
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184 supported by the processor HAL. There is no data cache.
ebd0ea2e6282 Contribute eCosCentric's MCF5272 processor HAL, replacing the old
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185 </para>
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186 </refsect2>
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187
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188 <refsect2 id="m68k-mcf5272-port-idle"><title>Idle Thread Support</title>
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189 <para>
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190 The configuration
ebd0ea2e6282 Contribute eCosCentric's MCF5272 processor HAL, replacing the old
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191 option <varname>CYGIMP_HAL_M68K_MCF5272_IDLE</varname> controls what
ebd0ea2e6282 Contribute eCosCentric's MCF5272 processor HAL, replacing the old
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192 happens when the kernel idle thread runs. The default behaviour is to
ebd0ea2e6282 Contribute eCosCentric's MCF5272 processor HAL, replacing the old
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193 put the processor to sleep until the next interrupt.
ebd0ea2e6282 Contribute eCosCentric's MCF5272 processor HAL, replacing the old
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194 </para>
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195 </refsect2>
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196
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197 <refsect2 id="m68k-mcf5272-port-profiling"><title>Profiling Support</title>
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198 <para>
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199 The MCF5272 processor HAL provides a profiling timer for use with the
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200 gprof profiling package. This uses hardware timer 2, so application
ebd0ea2e6282 Contribute eCosCentric's MCF5272 processor HAL, replacing the old
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201 code should not manipulate this timer if profiling is enabled. The
ebd0ea2e6282 Contribute eCosCentric's MCF5272 processor HAL, replacing the old
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202 M68K architectural HAL implements the <function>mcount</function>
ebd0ea2e6282 Contribute eCosCentric's MCF5272 processor HAL, replacing the old
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203 function so profiling is fully supported on all MCF5272-based platforms.
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204 </para>
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205 </refsect2>
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206
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207 <refsect2 id="m68k-mcf5272-port-other-hal"><title>Other Issues</title>
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208 <para>
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209 The MCF5272 processor HAL does not affect the implementation of data
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210 types, stack size definitions, linker scripts, SMP support, system
ebd0ea2e6282 Contribute eCosCentric's MCF5272 processor HAL, replacing the old
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211 startup, or debug support. The architectural HAL's bit index
ebd0ea2e6282 Contribute eCosCentric's MCF5272 processor HAL, replacing the old
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212 instructions are used rather than the MCFxxxx variant HAL's versions
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213 since the MCF5272 does not implement the ff1 and bitrev instructions.
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214 </para>
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215 </refsect2>
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216
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217 <refsect2 id="m68k-mcf5272-port-other"><title>Other Functionality</title>
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218 <para>
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219 The MCF5272 processor HAL only implements functionality defined in the
ebd0ea2e6282 Contribute eCosCentric's MCF5272 processor HAL, replacing the old
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220 eCos HAL specification and does not export any additional functions.
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221 </para>
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222 </refsect2>
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223 </refsect1>
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224 </refentry>
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225
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226 </part>