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annotate packages/hal/powerpc/ppc40x/current/src/var_misc.c @ 136:a9ac27ec7abc ecos-sw-2000-11-17

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Merge from eCos master repository on 2000-11-17-18:24:25-GMT
author jlarmour
date Fri, 17 Nov 2000 23:16:43 +0000
parents d2f49caf9e38
children 289bf90c6a9b
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1 //==========================================================================
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2 //
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3 // var_misc.c
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4 //
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5 // HAL implementation miscellaneous functions
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6 //
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7 //==========================================================================
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8 //####COPYRIGHTBEGIN####
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9 //
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10 // -------------------------------------------
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11 // The contents of this file are subject to the Red Hat eCos Public License
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12 // Version 1.1 (the "License"); you may not use this file except in
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13 // compliance with the License. You may obtain a copy of the License at
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14 // http://www.redhat.com/
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15 //
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16 // Software distributed under the License is distributed on an "AS IS"
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17 // basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the
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18 // License for the specific language governing rights and limitations under
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19 // the License.
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20 //
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21 // The Original Code is eCos - Embedded Configurable Operating System,
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22 // released September 30, 1998.
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23 //
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24 // The Initial Developer of the Original Code is Red Hat.
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25 // Portions created by Red Hat are
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26 // Copyright (C) 1998, 1999, 2000 Red Hat, Inc.
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27 // All Rights Reserved.
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28 // -------------------------------------------
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29 //
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30 //####COPYRIGHTEND####
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31 //==========================================================================
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32 //#####DESCRIPTIONBEGIN####
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33 //
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34 // Author(s): jskov
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35 // Contributors: jskov
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36 // Date: 2000-02-04
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37 // Purpose: HAL miscellaneous functions
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38 // Description: This file contains miscellaneous functions provided by the
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39 // HAL.
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40 //
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41 //####DESCRIPTIONEND####
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42 //
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43 //==========================================================================
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44
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45 #include <pkgconf/hal.h>
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46
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47 #define CYGARC_HAL_COMMON_EXPORT_CPU_MACROS
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48 #include <cyg/hal/ppc_regs.h>
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49 #include <cyg/infra/cyg_type.h>
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50
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51 #include <cyg/hal/hal_mem.h>
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52
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53 //--------------------------------------------------------------------------
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54 void hal_variant_init(void)
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55 {
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56 }
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57
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58
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59 //--------------------------------------------------------------------------
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60 // Variant specific idle thread action.
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61 bool
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62 hal_variant_idle_thread_action( cyg_uint32 count )
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63 {
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64 // Let architecture idle thread action run
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65 return true;
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66 }
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67
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68 //---------------------------------------------------------------------------
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69 // Use MMU resources to map memory regions.
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70 // Takes and returns an int used to ID the MMU resource to use. This ID
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71 // is increased as resources are used and should be used for subsequent
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72 // invocations.
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73 //
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74 // The PPC4xx CPUs do not have BATs. Fortunately we don't currently
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75 // use the MMU, so we can simulate BATs by using the TLBs.
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76 int
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77 cyg_hal_map_memory (int id, CYG_ADDRESS virt, CYG_ADDRESS phys,
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78 cyg_int32 size, cyg_uint8 flags)
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79 {
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80 cyg_uint32 epn, rpn;
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81 int sv, lv, max_tlbs;
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82
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83 // There are 64 TLBs.
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84 max_tlbs = 64;
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85
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86 // Use the smallest "size" value which is big enough (round up)
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87 for (sv = 0, lv = 0x400; sv < 8; sv++, lv <<= 2) {
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88 if (lv >= size) break;
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89 }
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90
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91 // Note: the process ID comes from the PID register (always 0)
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92 epn = (virt & M_EPN_EPNMASK) | M_EPN_EV | M_EPN_SIZE(sv);
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93 rpn = (phys & M_RPN_RPNMASK) | M_RPN_EX | M_RPN_WR;
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94
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95 if (flags & CYGARC_MEMDESC_CI) {
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96 rpn |= M_RPN_I;
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97 }
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98
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99 if (flags & CYGARC_MEMDESC_GUARDED)
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100 rpn |= M_RPN_G;
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101
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102 CYGARC_TLBWE(id, epn, rpn);
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103 id++;
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104
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105 // Make caches default disabled when MMU is disabled.
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106
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107 return id;
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108 }
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109
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110
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111 // Initialize MMU to a sane (NOP) state.
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112 //
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113 // Initialize TLBs with 0, Valid bits unset.
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114 void
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115 cyg_hal_clear_MMU (void)
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116 {
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117 cyg_uint32 tlbhi = 0;
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118 cyg_uint32 tlblo = 0;
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119 int id, max_tlbs;
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120
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121 // There are 64 TLBs.
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122 max_tlbs = 64;
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123
136
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124 CYGARC_MTSPR (SPR_PID, 0);
134
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125
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126 for (id = 0; id < max_tlbs; id++) {
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127 CYGARC_TLBWE(id, tlbhi, tlblo);
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128 }
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129
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130 // Make caches default disabled when MMU is disabled.
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131 }
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132
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133 //--------------------------------------------------------------------------
136
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134 // Clock control - use the programmable (variable period) timer
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135
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136 static cyg_uint32 _period;
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137 extern cyg_uint32 _hold_tcr;
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138
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139 externC void
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140 hal_ppc40x_clock_initialize(cyg_uint32 period)
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141 {
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142 cyg_uint32 tcr;
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143
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144 // Enable auto-reload
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145 CYGARC_MFSPR(SPR_TCR, tcr);
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146 tcr = _hold_tcr;
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147 tcr |= TCR_ARE;
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148 CYGARC_MTSPR(SPR_TCR, tcr);
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149 _hold_tcr = tcr;
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150
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151 // Set up the counter register
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152 _period = period;
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153 CYGARC_MTSPR(SPR_PIT, period);
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154 }
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155
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156 // Returns the number of clocks since the last interrupt
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157 externC void
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158 hal_ppc40x_clock_read(cyg_uint32 *val)
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159 {
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160 cyg_uint32 period;
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161
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162 CYGARC_MFSPR(SPR_PIT, period);
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163 *val = _period - period;
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164 }
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165
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166 externC void
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167 hal_ppc40x_clock_reset(cyg_uint32 vector, cyg_uint32 period)
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168 {
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169 hal_ppc40x_clock_initialize(period);
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170 }
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171
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172 externC void
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173 hal_ppc40x_delay_us(int us)
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174 {
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175 }
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176
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177 //--------------------------------------------------------------------------
134
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178 // End of var_misc.c