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annotate packages/devs/flash/amd/am29xxxxx/current/include/flash_am29xxxxx_parts.inl @ 201:dd81b18e45fb

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Merge from eCos master repository on 2002-01-04-06:43:04-GMT
author jlarmour
date Fri, 04 Jan 2002 14:13:51 +0000
parents 67850532eebb
children e0c0827131d1
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1 #ifndef CYGONCE_DEVS_FLASH_AMD_AM29XXXXX_PARTS_INL
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2 #define CYGONCE_DEVS_FLASH_AMD_AM29XXXXX_PARTS_INL
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3 //==========================================================================
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4 //
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5 // am29xxxxx_parts.inl
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6 //
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7 // AMD AM29xxxxx part descriptors
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8 //
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9 //==========================================================================
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10 //####COPYRIGHTBEGIN####
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11 //
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12 // -------------------------------------------
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13 // The contents of this file are subject to the Red Hat eCos Public License
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14 // Version 1.1 (the "License"); you may not use this file except in
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15 // compliance with the License. You may obtain a copy of the License at
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16 // http://www.redhat.com/
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17 //
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18 // Software distributed under the License is distributed on an "AS IS"
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19 // basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the
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20 // License for the specific language governing rights and limitations under
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21 // the License.
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22 //
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23 // The Original Code is eCos - Embedded Configurable Operating System,
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24 // released September 30, 1998.
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25 //
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26 // The Initial Developer of the Original Code is Red Hat.
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27 // Portions created by Red Hat are
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28 // Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc.
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29 // All Rights Reserved.
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30 // -------------------------------------------
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31 //
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32 //####COPYRIGHTEND####
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33 //==========================================================================
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34 //#####DESCRIPTIONBEGIN####
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35 //
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36 // Author(s): jskov
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37 // Contributors: jskov, Koichi Nagashima
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38 // Date: 2001-06-08
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39 // Purpose:
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40 // Description: AMD AM29xxxxx part descriptors
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41 // Usage: Should be included from the flash_am29xxxxx.inl file only.
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42 //
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43 // FIXME: Add configury for selecting bottom/top bootblocks
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44 //####DESCRIPTIONEND####
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45 //
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46 //==========================================================================
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47
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48
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49 #if CYGNUM_FLASH_WIDTH == 8
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50 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29F040B
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51 { // AM29F040B
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52 device_id : FLASHWORD(0xa4),
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53 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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54 block_count: 8,
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55 device_size: 0x80000 * CYGNUM_FLASH_INTERLEAVE,
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56 base_mask : ~(0x80000 * CYGNUM_FLASH_INTERLEAVE - 1),
174
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57 bootblock : false,
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58 banked : false
161
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59 },
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60 #endif
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61 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29LV160
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62 { // MBM29LV160-T | AM29LV160-T
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63 device_id : FLASHWORD(0xc4),
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64 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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65 block_count: 32,
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66 device_size: 0x200000 * CYGNUM_FLASH_INTERLEAVE,
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67 base_mask : ~(0x200000 * CYGNUM_FLASH_INTERLEAVE - 1),
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68 bootblock : true,
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69 bootblocks : { 0x1f0000 * CYGNUM_FLASH_INTERLEAVE,
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70 0x008000 * CYGNUM_FLASH_INTERLEAVE,
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71 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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72 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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73 0x004000 * CYGNUM_FLASH_INTERLEAVE,
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74 0
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75 },
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76 banked : false
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77 },
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78 { // MBM29LV160-B | AM29LV160-B
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79 device_id : FLASHWORD(0x49),
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80 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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81 block_count: 32,
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82 device_size: 0x200000 * CYGNUM_FLASH_INTERLEAVE,
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83 base_mask : ~(0x200000 * CYGNUM_FLASH_INTERLEAVE - 1),
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84 bootblock : true,
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85 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
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86 0x004000 * CYGNUM_FLASH_INTERLEAVE,
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87 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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88 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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89 0x008000 * CYGNUM_FLASH_INTERLEAVE,
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90 0
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91 },
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92 banked : false
161
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93 },
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94 #endif
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95 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29DL324D
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96 { // AM29DL324D-T
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97 device_id : FLASHWORD(0x5c),
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98 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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99 block_count: 64,
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100 device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,
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101 base_mask : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),
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102 bootblock : true,
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103 bootblocks : { 0x3f0000 * CYGNUM_FLASH_INTERLEAVE,
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104 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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105 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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106 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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107 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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108 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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109 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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110 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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111 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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112 0
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113 },
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114 banked : true,
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115 banks : { 0x200000 * CYGNUM_FLASH_INTERLEAVE,
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116 0
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117 }
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118 },
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119 { // AM29DL324D-B
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120 device_id : FLASHWORD(0x5f),
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121 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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122 block_count: 64,
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123 device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,
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124 base_mask : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),
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125 bootblock : true,
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126 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
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127 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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128 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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129 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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130 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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131 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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132 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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133 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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134 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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135 0
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136 },
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137 banked : true,
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diff changeset
138 banks : { 0x200000 * CYGNUM_FLASH_INTERLEAVE,
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diff changeset
139 0
161
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140 }
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141 },
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142 #endif
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143 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29F800
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144 { // AM29F800-T
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145 device_id : FLASHWORD(0xd6),
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146 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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147 block_count: 16,
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148 device_size: 0x100000 * CYGNUM_FLASH_INTERLEAVE,
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149 base_mask : ~(0x100000 * CYGNUM_FLASH_INTERLEAVE - 1),
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150 bootblock : true,
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151 bootblocks : { 0xf0000 * CYGNUM_FLASH_INTERLEAVE,
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152 0x08000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
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diff changeset
153 0x02000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
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diff changeset
154 0x02000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
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diff changeset
155 0x04000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
156 0
174
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parents: 161
diff changeset
157 },
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158 banked : false
161
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159 },
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160 { // AM29F800-B
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161 device_id : FLASHWORD(0x58),
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162 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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163 block_count: 16,
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164 device_size: 0x100000 * CYGNUM_FLASH_INTERLEAVE,
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165 base_mask : ~(0x100000 * CYGNUM_FLASH_INTERLEAVE - 1),
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166 bootblock : true,
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167 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
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168 0x004000 * CYGNUM_FLASH_INTERLEAVE,
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169 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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diff changeset
170 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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171 0x008000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
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diff changeset
172 0
174
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parents: 161
diff changeset
173 },
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174 banked : false
161
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175 },
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176 #endif
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177 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29LV800
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178 { // AM29LV800-T
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179 device_id : FLASHWORD(0xda),
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180 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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181 block_count: 16,
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182 device_size: 0x100000 * CYGNUM_FLASH_INTERLEAVE,
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183 base_mask : ~(0x100000 * CYGNUM_FLASH_INTERLEAVE - 1),
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184 bootblock : true,
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185 bootblocks : { 0xf0000 * CYGNUM_FLASH_INTERLEAVE,
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186 0x08000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
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diff changeset
187 0x02000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
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diff changeset
188 0x02000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
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diff changeset
189 0x04000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
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diff changeset
190 0
174
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diff changeset
191 },
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192 banked : false
161
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193 },
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194 { // AM29LV800-B
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195 device_id : FLASHWORD(0x5b),
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196 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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197 block_count: 16,
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198 device_size: 0x100000 * CYGNUM_FLASH_INTERLEAVE,
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199 base_mask : ~(0x100000 * CYGNUM_FLASH_INTERLEAVE - 1),
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200 bootblock : true,
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201 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
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202 0x004000 * CYGNUM_FLASH_INTERLEAVE,
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diff changeset
203 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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diff changeset
204 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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diff changeset
205 0x008000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
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diff changeset
206 0
174
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parents: 161
diff changeset
207 },
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208 banked : false
161
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209 },
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210 #endif
201
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211 #ifdef CYGHWR_DEVS_FLASH_AMD_TC58FVB800
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212 { // Toshiba TC58FVB800 (compatible with AM29LV800-B except for IDs.)
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213 device_id : FLASHWORD(0xCE),
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214 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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215 block_count: 16,
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216 device_size: 0x100000 * CYGNUM_FLASH_INTERLEAVE,
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217 base_mask : ~(0x100000 * CYGNUM_FLASH_INTERLEAVE - 1),
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218 bootblock : true,
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219 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
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220 0x004000 * CYGNUM_FLASH_INTERLEAVE,
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diff changeset
221 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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222 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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diff changeset
223 0x008000 * CYGNUM_FLASH_INTERLEAVE,
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diff changeset
224 0
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diff changeset
225 },
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diff changeset
226 banked : false
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diff changeset
227 },
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diff changeset
228 #endif
161
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229
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230 #else // 16 bit devices
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231
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232 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29LV160
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233 { // MBM29LV160-T | AM29LV160-T
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234 device_id : FLASHWORD(0x22c4),
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235 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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236 block_count: 32,
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237 device_size: 0x200000 * CYGNUM_FLASH_INTERLEAVE,
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238 base_mask : ~(0x200000 * CYGNUM_FLASH_INTERLEAVE - 1),
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239 bootblock : true,
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240 bootblocks : { 0x1f0000 * CYGNUM_FLASH_INTERLEAVE,
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diff changeset
241 0x008000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
242 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
243 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
244 0x004000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
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diff changeset
245 0
174
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parents: 161
diff changeset
246 },
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parents: 161
diff changeset
247 banked : false
161
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diff changeset
248 },
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249 { // MBM29LV160-B | AM29LV160-B
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250 device_id : FLASHWORD(0x2249),
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251 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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252 block_count: 32,
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253 device_size: 0x200000 * CYGNUM_FLASH_INTERLEAVE,
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254 base_mask : ~(0x200000 * CYGNUM_FLASH_INTERLEAVE - 1),
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255 bootblock : true,
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256 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
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diff changeset
257 0x004000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
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diff changeset
258 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
259 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
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diff changeset
260 0x008000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
261 0
174
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jlarmour
parents: 161
diff changeset
262 },
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263 banked : false
161
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264 },
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265 #endif
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266 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29DL324D
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267 { // AM29DL324D-T
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268 device_id : FLASHWORD(0x225c),
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269 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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270 block_count: 64,
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271 device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,
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272 base_mask : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),
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273 bootblock : true,
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274 bootblocks : { 0x3f0000 * CYGNUM_FLASH_INTERLEAVE,
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275 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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diff changeset
276 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
277 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
278 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
279 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
280 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
281 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
282 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
283 0
174
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
284 },
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jlarmour
parents: 161
diff changeset
285 banked : true,
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jlarmour
parents: 161
diff changeset
286 banks : { 0x200000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents: 161
diff changeset
287 0
161
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
288 }
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
289 },
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jlarmour
parents:
diff changeset
290 { // AM29DL324D-B
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jlarmour
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diff changeset
291 device_id : FLASHWORD(0x225f),
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jlarmour
parents:
diff changeset
292 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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diff changeset
293 block_count: 64,
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jlarmour
parents:
diff changeset
294 device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,
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295 base_mask : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),
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jlarmour
parents:
diff changeset
296 bootblock : true,
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jlarmour
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diff changeset
297 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
298 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
299 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
300 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
301 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
302 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
303 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
304 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
305 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
306 0
174
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
307 },
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jlarmour
parents: 161
diff changeset
308 banked : true,
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jlarmour
parents: 161
diff changeset
309 banks : { 0x200000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents: 161
diff changeset
310 0
161
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
311 }
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
312 },
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jlarmour
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diff changeset
313 #endif
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diff changeset
314 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29F800
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315 { // AM29F800-T
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316 device_id : FLASHWORD(0x22d6),
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diff changeset
317 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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diff changeset
318 block_count: 16,
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diff changeset
319 device_size: 0x100000 * CYGNUM_FLASH_INTERLEAVE,
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320 base_mask : ~(0x100000 * CYGNUM_FLASH_INTERLEAVE - 1),
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diff changeset
321 bootblock : true,
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jlarmour
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diff changeset
322 bootblocks : { 0xf0000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
323 0x08000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
324 0x02000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
325 0x02000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
326 0x04000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
327 0
174
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jlarmour
parents: 161
diff changeset
328 },
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diff changeset
329 banked : false
161
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diff changeset
330 },
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jlarmour
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diff changeset
331 { // AM29F800-B
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332 device_id : FLASHWORD(0x2258),
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333 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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334 block_count: 16,
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335 device_size: 0x100000 * CYGNUM_FLASH_INTERLEAVE,
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336 base_mask : ~(0x100000 * CYGNUM_FLASH_INTERLEAVE - 1),
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diff changeset
337 bootblock : true,
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diff changeset
338 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
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diff changeset
339 0x004000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
340 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
341 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
342 0x008000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
343 0
174
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jlarmour
parents: 161
diff changeset
344 },
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jlarmour
parents: 161
diff changeset
345 banked : false
161
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diff changeset
346 },
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347 #endif
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348 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29LV800
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349 { // AM29LV800-T
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350 device_id : FLASHWORD(0x22da),
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351 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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diff changeset
352 block_count: 16,
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353 device_size: 0x100000 * CYGNUM_FLASH_INTERLEAVE,
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diff changeset
354 base_mask : ~(0x100000 * CYGNUM_FLASH_INTERLEAVE - 1),
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diff changeset
355 bootblock : true,
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diff changeset
356 bootblocks : { 0xf0000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
357 0x08000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
358 0x02000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
359 0x02000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
360 0x04000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
361 0
174
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
362 },
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jlarmour
parents: 161
diff changeset
363 banked : false
161
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
364 },
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jlarmour
parents:
diff changeset
365 { // AM29LV800-B
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diff changeset
366 device_id : FLASHWORD(0x225b),
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jlarmour
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diff changeset
367 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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diff changeset
368 block_count: 16,
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diff changeset
369 device_size: 0x100000 * CYGNUM_FLASH_INTERLEAVE,
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diff changeset
370 base_mask : ~(0x100000 * CYGNUM_FLASH_INTERLEAVE - 1),
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jlarmour
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diff changeset
371 bootblock : true,
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jlarmour
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diff changeset
372 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
373 0x004000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
374 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
375 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
376 0x008000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
377 0
174
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
378 },
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jlarmour
parents: 161
diff changeset
379 banked : false
161
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
380 },
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diff changeset
381 #endif
195
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diff changeset
382 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29LV640
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diff changeset
383 { // MBM29LV640xx
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parents: 174
diff changeset
384 device_id : FLASHWORD(0x22d7),
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diff changeset
385 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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parents: 174
diff changeset
386 block_count: 128,
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parents: 174
diff changeset
387 device_size: 0x800000 * CYGNUM_FLASH_INTERLEAVE,
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parents: 174
diff changeset
388 base_mask : ~(0x800000 * CYGNUM_FLASH_INTERLEAVE - 1),
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jlarmour
parents: 174
diff changeset
389 bootblock : false,
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jlarmour
parents: 174
diff changeset
390 banked : false
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jlarmour
parents: 174
diff changeset
391 },
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parents: 174
diff changeset
392 #endif
201
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parents: 195
diff changeset
393 #ifdef CYGHWR_DEVS_FLASH_AMD_TC58FVB800
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diff changeset
394 { // Toshiba TC58FVB800 (compatible with AM29LV800-B except for IDs.)
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jlarmour
parents: 195
diff changeset
395 device_id : FLASHWORD(0xCE),
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jlarmour
parents: 195
diff changeset
396 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents: 195
diff changeset
397 block_count: 16,
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jlarmour
parents: 195
diff changeset
398 device_size: 0x100000 * CYGNUM_FLASH_INTERLEAVE,
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parents: 195
diff changeset
399 base_mask : ~(0x100000 * CYGNUM_FLASH_INTERLEAVE - 1),
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jlarmour
parents: 195
diff changeset
400 bootblock : true,
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jlarmour
parents: 195
diff changeset
401 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
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parents: 195
diff changeset
402 0x004000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents: 195
diff changeset
403 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents: 195
diff changeset
404 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents: 195
diff changeset
405 0x008000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents: 195
diff changeset
406 0
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jlarmour
parents: 195
diff changeset
407 },
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jlarmour
parents: 195
diff changeset
408 banked : false
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jlarmour
parents: 195
diff changeset
409 },
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jlarmour
parents: 195
diff changeset
410 #endif
195
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parents: 174
diff changeset
411
161
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jlarmour
parents:
diff changeset
412 #endif // 16 bit devices
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jlarmour
parents:
diff changeset
413
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jlarmour
parents:
diff changeset
414 #endif // CYGONCE_DEVS_FLASH_AMD_AM29XXXXX_PARTS_INL