#ifndef CYGONCE_HAL_HALBOOT_SI /* -*-asm-*- */
#define CYGONCE_HAL_HALBOOT_SI
// ====================================================================
//
//	<platform>/halboot.si
//
//	HAL bootup platform-oriented code (assembler)
//
// ====================================================================
// ####ECOSGPLCOPYRIGHTBEGIN####                                            
// -------------------------------------------                              
// This file is part of eCos, the Embedded Configurable Operating System.   
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under    
// the terms of the GNU General Public License as published by the Free     
// Software Foundation; either version 2 or (at your option) any later      
// version.                                                                 
//
// eCos is distributed in the hope that it will be useful, but WITHOUT      
// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or    
// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License    
// for more details.                                                        
//
// You should have received a copy of the GNU General Public License        
// along with eCos; if not, write to the Free Software Foundation, Inc.,    
// 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.            
//
// As a special exception, if other files instantiate templates or use      
// macros or inline functions from this file, or you compile this file      
// and link it with other works to produce a work based on this file,       
// this file does not by itself cause the resulting work to be covered by   
// the GNU General Public License. However the source code for this file    
// must still be made available in accordance with section (3) of the GNU   
// General Public License v2.                                               
//
// This exception does not invalidate any other reasons why a work based    
// on this file might be covered by the GNU General Public License.         
// -------------------------------------------                              
// ####ECOSGPLCOPYRIGHTEND####                                              
// ====================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): 	        hmt
// Contributors:	hmt
// Date:	        1999-02-01
// Purpose:	        Bootup code, platform oriented.
// Description:
//
//####DESCRIPTIONEND####
//
// ====================================================================

// External Platform Initial Setup
//
// This should set up RAM and caches, and calm down any external
// interrupt sources.
//
// It is just plain included in vectors.S
//
// RAM has not yet been touched at all; in fact all you have is a
// register window selected.


	! Empty macro for debugging vectors.S
	.macro led val
        .endm


	set	0x01f80000, %l0		! MEC register base address
	ld	[%l0], %l1		! Check if MEC has been initialised
	set	0xfe080000, %l2		! by checking baud rate register
	andcc	%l2, %l1, %g0		
	bne	2f			! skip
	nop

	! Set memory according to simulator config

        st      %g0, [%l0 + 0x64]       ! Disable watchdog for now
        ld      [%l0], %g1
        or      %g1, 1, %g1
        st      %g1, [%l0]              ! Enable power down
	st	%g0, [%l0 + 0x18]	! No waitstates
        ld      [%l0 + 0xF8], %g1	! load simulator rom size
	clr	%l2
	srl	%g1, 17, %g1		! calculate appropriate MEC rom size
1:
	srl	%g1, 1, %g1
	tst	%g1
	bne,a	1b
	inc	%l2
	sll	%l2, 8, %l2
        ld      [%l0 + 0xF4], %g2	! load simulator ram size
	srl	%g2, 18, %g1		! calculate appropriate MEC ram size
1:
	srl	%g1, 1, %g1
	tst	%g1
	bne,a	1b
	inc	%l2
	sll	%l2, 10, %l2
	st	%l2, [%l0 + 0x10]	! program MEC memory config register
	set	0x2000000, %l2
	add	%g2, %l2, %fp
	sub	%fp, 96*4, %sp
	
!	st	%g0, [%sp]		! probe for FPU
!	ld	[%sp], %fsr

        set     13, %l1
        st      %l1, [%l0 + 0x84]       ! RTC scaler = 13

2:
        set     reset_vector, %g1
        set     0x0d00, %l1
        st      %l1, [%g1 + 0x7c0]      ! Store TCR mirror
        st      %l1, [%l0 + 0x98]       ! Start RTC
	mov	%g3, %o7


4:
	! then copy the branch instructions into the vector
	rd	%tbr, %g1
	andn	%g1, 0xfff, %g1		! clear non-address bits
	sethi	%hi(real_vector_instructions), %l0
	or	%l0, %lo(real_vector_instructions), %l0
	ld	[ %l0 ], %l1
	st	%l1, [ %g1 ]		! into the vector
	ld	[ %l0 + 4 ], %l1
	st	%l1, [ %g1 + 4 ]	! into the vector

#endif  /* CYGONCE_HAL_HALBOOT_SI */
/* EOF halboot.si */