Mercurial > ecos-v3_0-branch
changeset 2218:24aa459b08a5
* cdl/hal_arm_at91sam7s.cdl: Implement the SPI bus 1 interface for
the SAM7X and SAM7XC.
* include/plf_io.h: Add SPI DMA registers.
include/pkgconf/mlt_arm_at91sam7x128_rom.{h|ldi}
include/pkgconf/mlt_arm_at91sam7x256_rom.{h|ldi}: Linker files
for AT91SAM7X processor.
* src/at91sam7s_misc.c: Use the AT91 generic PIO manipulation
macros. Move the LED function out into the board specific HAL
package.
line wrap: on
line diff
--- a/packages/hal/arm/at91/at91sam7s/current/ChangeLog +++ b/packages/hal/arm/at91/at91sam7s/current/ChangeLog @@ -1,3 +1,24 @@ +2006-06-01 Andrew Lunn <andrew.lunn@ascom.ch> + + * cdl/hal_arm_at91sam7s.cdl: Implement the SPI bus 1 interface for + the SAM7X and SAM7XC. + +2006-06-01 John Eigelaar <jeigelaar@mweb.co.za> + + * include/plf_io.h: Add SPI DMA registers. + +2006-05-20 John Eigelaar <jeigelaar@mweb.co.za> + + include/pkgconf/mlt_arm_at91sam7x128_rom.{h|ldi} + include/pkgconf/mlt_arm_at91sam7x256_rom.{h|ldi}: Linker files + for AT91SAM7X processor. + +2006-05-17 Andrew Lunn <andrew.lunn@ascom.ch> + + * src/at91sam7s_misc.c: Use the AT91 generic PIO manipulation + macros. Move the LED function out into the board specific HAL + package. + 2006-04-07 Andrew Lunn <andrew.lunn@ascom.ch> * cdl/hal_arm_at91sam7s.cdl:
--- a/packages/hal/arm/at91/at91sam7s/current/cdl/hal_arm_at91sam7s.cdl +++ b/packages/hal/arm/at91/at91sam7s/current/cdl/hal_arm_at91sam7s.cdl @@ -2,7 +2,7 @@ # # hal_arm_at91_sam7s.cdl # -# ARM AT91 SAM7S HAL package configuration data +# ARM AT91 SAM7 HAL package configuration data # # ==================================================================== #####ECOSGPLCOPYRIGHTBEGIN#### @@ -46,21 +46,20 @@ # # ==================================================================== -cdl_package CYGPKG_HAL_ARM_AT91SAM7S { - display "Atmel AT91SAM7S HAL" +cdl_package CYGPKG_HAL_ARM_AT91SAM7 { + display "Atmel AT91SAM7 HAL" parent CYGPKG_HAL_ARM - define_header hal_arm_at91sam7s.h + define_header hal_arm_at91sam7.h include_dir cyg/hal hardware description " - The AT91SAM7S HAL package provides the support needed to run - eCos on an Atmel AT91SAM7S based board." + The AT91SAM7 HAL package provides the support needed to run + eCos on an Atmel AT91SAM7 based board." compile at91sam7s_misc.c - requires { CYGHWR_HAL_ARM_AT91 == "AT91SAM7S" } requires { CYGHWR_HAL_ARM_AT91_FIQ } - requires { CYGHWR_HAL_ARM_AT91SAM7S == "at91sam7s32" implies + requires { CYGHWR_HAL_ARM_AT91SAM7 == "at91sam7s32" implies CYGPKG_IO_SERIAL_ARM_AT91_SERIAL0 == 0 } implements CYGINT_HAL_ARM_AT91_SERIAL_DBG_HW @@ -70,29 +69,60 @@ cdl_package CYGPKG_HAL_ARM_AT91SAM7S { define_proc { puts $::cdl_system_header "#define CYGBLD_HAL_TARGET_H <pkgconf/hal_arm.h>" puts $::cdl_system_header "#define CYGBLD_HAL_VARIANT_H <pkgconf/hal_arm_at91.h>" - puts $::cdl_system_header "#define CYGBLD_HAL_PLATFORM_H <pkgconf/hal_arm_at91sam7s.h>" + puts $::cdl_system_header "#define CYGBLD_HAL_PLATFORM_H <pkgconf/hal_arm_at91sam7.h>" puts $::cdl_system_header "#define CYGBLD_HAL_ARM_VAR_IO_H" puts $::cdl_header "#define HAL_PLATFORM_CPU \"ARM7TDMI\"" - puts $::cdl_header "#define HAL_PLATFORM_BOARD \"Atmel (at91sam7s)\"" + puts $::cdl_header "#define HAL_PLATFORM_BOARD \"Atmel (at91sam7)\"" puts $::cdl_header "#define HAL_PLATFORM_EXTRA \"\"" } - cdl_option CYGHWR_HAL_ARM_AT91SAM7S { - display "AT91SAM7S variant used" + cdl_option CYGHWR_HAL_ARM_AT91SAM7 { + display "AT91SAM7 variant used" flavor data default_value {"at91sam7s256"} legal_values {"at91sam7s32" "at91sam7s321" "at91sam7s64" - "at91sam7s128" "at91sam7s256"} + "at91sam7s128" "at91sam7s256" + "at91sam7x128" "at91sam7x256" + "at91sam7xc128" "at91sam7xc256" } description " - The AT91SAM7S microcontroller family has several variants, + The AT91SAM7 microcontroller family has several variants, the main differences being the amount of on-chip SRAM, FLASH, peripherals and their layout. This option allows the platform HALs to select the specific microcontroller being used." } - cdl_option CYGBLD_HAL_ARM_AT91SAM7S_USB { - active_if {!( "at91sam7s32" == CYGHWR_HAL_ARM_AT91SAM7S) } + cdl_option CYGHWR_HAL_ARM_AT91SAM7S { + display "SAM7S device" + calculated { CYGHWR_HAL_ARM_AT91SAM7 == "at91sam7s256" || + CYGHWR_HAL_ARM_AT91SAM7 == "at91sam7s128" || + CYGHWR_HAL_ARM_AT91SAM7 == "at91sam7s64" || + CYGHWR_HAL_ARM_AT91SAM7 == "at91sam7s32" || + CYGHWR_HAL_ARM_AT91SAM7 == "at91sam7s321" } + description " + Is the AT91SAM7 device a member of the AT91SAM7S family?" + } + + cdl_option CYGHWR_HAL_ARM_AT91SAM7X { + display "SAM7X device" + calculated { CYGHWR_HAL_ARM_AT91SAM7 == "at91sam7x256" || + CYGHWR_HAL_ARM_AT91SAM7 == "at91sam7x128" } + description " + Is the AT91SAM7 device a member of the AT91SAM7X family?" + } + + cdl_option CYGHWR_HAL_ARM_AT91SAM7XC { + display "SAM7XC device" + calculated { CYGHWR_HAL_ARM_AT91SAM7 == "at91sam7xc256" || + CYGHWR_HAL_ARM_AT91SAM7 == "at91sam7xc128" } + description " + Is the AT91SAM7 device a member of the AT91SAM7XC family?" + } + + cdl_option CYGBLD_HAL_ARM_AT91SAM7_USB { + active_if {!( "at91sam7s32" == CYGHWR_HAL_ARM_AT91SAM7S) || + CYGHWR_HAL_ARM_AT91SAM7X || + CYGHWR_HAL_ARM_AT91SAM7XC } implements CYGINT_DEVS_USB_AT91_HAS_USB default_value 1 no_define @@ -100,6 +130,16 @@ cdl_package CYGPKG_HAL_ARM_AT91SAM7S { All but the AT91SAM7S32 has the USB device" } + cdl_option CYGBLD_HAL_ARM_AT91SAM7_SPI1 { + active_if { CYGHWR_HAL_ARM_AT91SAM7X || + CYGHWR_HAL_ARM_AT91SAM7XC } + implements CYGINT_DEVS_SPI_ARM_AT91_HAS_BUS1 + default_value 1 + no_define + description " + The SAM7X and SAM7XC have the second SPI bus controller" + } + cdl_component CYGNUM_HAL_RTC_CONSTANTS { display "Real-time clock constants" flavor none @@ -132,7 +172,7 @@ cdl_package CYGPKG_HAL_ARM_AT91SAM7S { no_define define -file system.h CYG_HAL_STARTUP description " - When targeting the AT91SAM7S eval board it is possible to build + When targeting the AT91SAM7 eval boards it is possible to build the system for either RAM bootstrap or ROM bootstrap(s). Select 'ram' when building programs to load into RAM using on board debug software such as Angel or eCos GDB stubs. Select 'rom' @@ -379,8 +419,8 @@ cdl_package CYGPKG_HAL_ARM_AT91SAM7S { flavor data no_define calculated { (CYG_HAL_STARTUP == "RAM") ? \ - "arm_" . CYGHWR_HAL_ARM_AT91SAM7S . "_ram" : - "arm_" . CYGHWR_HAL_ARM_AT91SAM7S . "_rom" } + "arm_" . CYGHWR_HAL_ARM_AT91SAM7 . "_ram" : + "arm_" . CYGHWR_HAL_ARM_AT91SAM7 . "_rom" } cdl_option CYGHWR_MEMORY_LAYOUT_LDI { display "Memory layout linker script fragment" @@ -388,8 +428,8 @@ cdl_package CYGPKG_HAL_ARM_AT91SAM7S { no_define define -file system.h CYGHWR_MEMORY_LAYOUT_LDI calculated { (CYG_HAL_STARTUP == "RAM") ? \ - "<pkgconf/mlt_arm_" . CYGHWR_HAL_ARM_AT91SAM7S . "_ram.ldi>" : - "<pkgconf/mlt_arm_" . CYGHWR_HAL_ARM_AT91SAM7S . "_rom.ldi>" } + "<pkgconf/mlt_arm_" . CYGHWR_HAL_ARM_AT91SAM7 . "_ram.ldi>" : + "<pkgconf/mlt_arm_" . CYGHWR_HAL_ARM_AT91SAM7 . "_rom.ldi>" } } cdl_option CYGHWR_MEMORY_LAYOUT_H { @@ -398,8 +438,8 @@ cdl_package CYGPKG_HAL_ARM_AT91SAM7S { no_define define -file system.h CYGHWR_MEMORY_LAYOUT_H calculated { (CYG_HAL_STARTUP == "RAM") ? \ - "<pkgconf/mlt_arm_" . CYGHWR_HAL_ARM_AT91SAM7S . "_ram.h>" : - "<pkgconf/mlt_arm_" . CYGHWR_HAL_ARM_AT91SAM7S . "_rom.h>" } + "<pkgconf/mlt_arm_" . CYGHWR_HAL_ARM_AT91SAM7 . "_ram.h>" : + "<pkgconf/mlt_arm_" . CYGHWR_HAL_ARM_AT91SAM7 . "_rom.h>" } } } }
--- a/packages/hal/arm/at91/at91sam7s/current/include/hal_platform_ints.h +++ b/packages/hal/arm/at91/at91sam7s/current/include/hal_platform_ints.h @@ -4,7 +4,7 @@ // // hal_platform_ints.h // -// HAL Interrupt and clock assignments for AT91SAM7S +// HAL Interrupt and clock assignments for AT91SAM7 // //========================================================================== //####ECOSGPLCOPYRIGHTBEGIN#### @@ -41,10 +41,10 @@ //#####DESCRIPTIONBEGIN#### // // Author(s): gthomas -// Contributors: gthomas, Oliver Munz, Andrew Lunn +// Contributors: gthomas, Oliver Munz, Andrew Lunn, John Eigelaar // Date: 2001-07-12 // Purpose: Define Interrupt support -// Description: The interrupt specifics for the AT91SAM7Splatform are +// Description: The interrupt specifics for the AT91SAM7 platform are // defined here. // // Usage: #include <cyg/hal/hal_platform_ints.h> @@ -55,13 +55,23 @@ // //========================================================================== +#include <pkgconf/hal_arm_at91sam7.h> + #define CYGNUM_HAL_INTERRUPT_FIQ 0 #define CYGNUM_HAL_INTERRUPT_SYS 1 #define CYGNUM_HAL_INTERRUPT_PIOA 2 +#ifdef CYGHWR_HAL_ARM_AT91SAM7X +#define CYGNUM_HAL_INTERRUPT_PIOB 3 +#define CYGNUM_HAL_INTERRUPT_SPI 4 +#define CYGNUM_HAL_INTERRUPT_SPI1 5 +#endif +#ifdef CYGHWR_HAL_ARM_AT91SAM7S #define CYGNUM_HAL_INTERRUPT_ADC 4 #define CYGNUM_HAL_INTERRUPT_SPI 5 +#endif + #define CYGNUM_HAL_INTERRUPT_USART0 6 #define CYGNUM_HAL_INTERRUPT_USART1 7 #define CYGNUM_HAL_INTERRUPT_SSC 8 @@ -72,6 +82,12 @@ #define CYGNUM_HAL_INTERRUPT_TC1 13 #define CYGNUM_HAL_INTERRUPT_TC2 14 +#ifdef CYGHWR_HAL_ARM_AT91SAM7X +#define CYGNUM_HAL_INTERRUPT_CAN 15 +#define CYGNUM_HAL_INTERRUPT_EMAC 16 +#define CYGNUM_HAL_INTERRUPT_ADC 17 +#endif + #define CYGNUM_HAL_INTERRUPT_IRQ0 30 #define CYGNUM_HAL_INTERRUPT_IRQ1 31
--- a/packages/hal/arm/at91/at91sam7s/current/include/pkgconf/mlt_arm_at91sam7s128_rom.ldi +++ b/packages/hal/arm/at91/at91sam7s/current/include/pkgconf/mlt_arm_at91sam7s128_rom.ldi @@ -3,7 +3,7 @@ // This is a generated file - do not edit #include <cyg/infra/cyg_type.inc> -#include <pkgconf/hal_arm_at91sam7s.h> +#include <pkgconf/hal_arm_at91sam7.h> MEMORY {
--- a/packages/hal/arm/at91/at91sam7s/current/include/pkgconf/mlt_arm_at91sam7s256_rom.ldi +++ b/packages/hal/arm/at91/at91sam7s/current/include/pkgconf/mlt_arm_at91sam7s256_rom.ldi @@ -3,7 +3,7 @@ // This is a generated file - do not edit #include <cyg/infra/cyg_type.inc> -#include <pkgconf/hal_arm_at91sam7s.h> +#include <pkgconf/hal_arm_at91sam7.h> MEMORY {
--- a/packages/hal/arm/at91/at91sam7s/current/include/pkgconf/mlt_arm_at91sam7s32_rom.ldi +++ b/packages/hal/arm/at91/at91sam7s/current/include/pkgconf/mlt_arm_at91sam7s32_rom.ldi @@ -3,7 +3,7 @@ // This is a generated file - do not edit #include <cyg/infra/cyg_type.inc> -#include <pkgconf/hal_arm_at91sam7s.h> +#include <pkgconf/hal_arm_at91sam7.h> MEMORY {
--- a/packages/hal/arm/at91/at91sam7s/current/include/pkgconf/mlt_arm_at91sam7s64_rom.ldi +++ b/packages/hal/arm/at91/at91sam7s/current/include/pkgconf/mlt_arm_at91sam7s64_rom.ldi @@ -3,7 +3,7 @@ // This is a generated file - do not edit #include <cyg/infra/cyg_type.inc> -#include <pkgconf/hal_arm_at91sam7s.h> +#include <pkgconf/hal_arm_at91sam7.h> MEMORY {
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/at91/at91sam7s/current/include/pkgconf/mlt_arm_at91sam7x128_rom.h @@ -0,0 +1,25 @@ +// eCos memory layout - Wed Apr 11 13:49:55 2001 + +// This is a generated file - do not edit + +#ifndef __ASSEMBLER__ +#include <cyg/infra/cyg_type.h> +#include <stddef.h> + +#endif +#define CYGMEM_REGION_ram (0x00200000) +#define CYGMEM_REGION_ram_SIZE (0x08000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) +#define CYGMEM_REGION_rom (0x00100000) +#define CYGMEM_REGION_rom_SIZE (0x20000) +#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R) +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__reserved_bootmon) []; +#endif +#define CYGMEM_SECTION_reserved_bootmon (CYG_LABEL_NAME (__reserved_bootmon)) +#define CYGMEM_SECTION_reserved_bootmon_SIZE (0x01000) +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__heap1) []; +#endif +#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1)) +#define CYGMEM_SECTION_heap1_SIZE (0x00204000 - (size_t) CYG_LABEL_NAME (__heap1))
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/at91/at91sam7s/current/include/pkgconf/mlt_arm_at91sam7x128_rom.ldi @@ -0,0 +1,30 @@ +// eCos memory layout - Wed Apr 11 13:49:55 2001 + +// This is a generated file - do not edit + +#include <cyg/infra/cyg_type.inc> +#include <pkgconf/hal_arm_at91sam7.h> + +MEMORY +{ + ram : ORIGIN = 0x00200000, LENGTH = 0x08000 + rom : ORIGIN = 0x00100000, LENGTH = 0x20000 +} + +SECTIONS +{ + SECTIONS_BEGIN + CYG_LABEL_DEFN(__reserved_bootmon) = 0x00000000; . = CYG_LABEL_DEFN(__reserved_bootmon) + 0x01000; + SECTION_rom_vectors (rom, CYGNUM_HAL_ARM_AT91_IMAGE_ADDRESS, LMA_EQ_VMA) + SECTION_text (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_fini (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_rodata (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_rodata1 (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fixup (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_gcc_except_table (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fixed_vectors (ram, 0x00200040, LMA_EQ_VMA) + SECTION_data (ram, ALIGN (0x4), FOLLOWING (.gcc_except_table)) + SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA) + CYG_LABEL_DEFN(__heap1) = ALIGN (0x8); + SECTIONS_END +}
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/at91/at91sam7s/current/include/pkgconf/mlt_arm_at91sam7x256_rom.h @@ -0,0 +1,25 @@ +// eCos memory layout - Wed Apr 11 13:49:55 2001 + +// This is a generated file - do not edit + +#ifndef __ASSEMBLER__ +#include <cyg/infra/cyg_type.h> +#include <stddef.h> + +#endif +#define CYGMEM_REGION_ram (0x00200000) +#define CYGMEM_REGION_ram_SIZE (0x10000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) +#define CYGMEM_REGION_rom (0x00100000) +#define CYGMEM_REGION_rom_SIZE (0x40000) +#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R) +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__reserved_bootmon) []; +#endif +#define CYGMEM_SECTION_reserved_bootmon (CYG_LABEL_NAME (__reserved_bootmon)) +#define CYGMEM_SECTION_reserved_bootmon_SIZE (0x01000) +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__heap1) []; +#endif +#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1)) +#define CYGMEM_SECTION_heap1_SIZE (0x00210000 - (size_t) CYG_LABEL_NAME (__heap1))
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/at91/at91sam7s/current/include/pkgconf/mlt_arm_at91sam7x256_rom.ldi @@ -0,0 +1,30 @@ +// eCos memory layout - Wed Apr 11 13:49:55 2001 + +// This is a generated file - do not edit + +#include <cyg/infra/cyg_type.inc> +#include <pkgconf/hal_arm_at91sam7.h> + +MEMORY +{ + ram : ORIGIN = 0x00200000, LENGTH = 0x10000 + rom : ORIGIN = 0x00100000, LENGTH = 0x40000 +} + +SECTIONS +{ + SECTIONS_BEGIN + CYG_LABEL_DEFN(__reserved_bootmon) = 0x00000000; . = CYG_LABEL_DEFN(__reserved_bootmon) + 0x01000; + SECTION_rom_vectors (rom, CYGNUM_HAL_ARM_AT91_IMAGE_ADDRESS, LMA_EQ_VMA) + SECTION_text (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_fini (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_rodata (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_rodata1 (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fixup (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_gcc_except_table (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fixed_vectors (ram, 0x00200040, LMA_EQ_VMA) + SECTION_data (ram, ALIGN (0x4), FOLLOWING (.gcc_except_table)) + SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA) + CYG_LABEL_DEFN(__heap1) = ALIGN (0x8); + SECTIONS_END +}
--- a/packages/hal/arm/at91/at91sam7s/current/include/plf_io.h +++ b/packages/hal/arm/at91/at91sam7s/current/include/plf_io.h @@ -49,12 +49,36 @@ //####DESCRIPTIONEND#### // //============================================================================= +#include <pkgconf/hal_arm_at91sam7.h> #define CYGARC_PHYSICAL_ADDRESS(_x_) +//SPI - Serial Peripheral Interface #define AT91_SPI0 0xFFFE0000 -#define AT91_PIOA 0xfffff400 +#ifdef CYGHWR_HAL_ARM_AT91SAM7X +#define AT91_SPI1 0xFFFE4000 +#endif + +#define AT91_SPI AT91_SPI0 + +// DMA registers +#define AT91_SPI_RPR 0x100 // Receive Pointer Register +#define AT91_SPI_RCR 0x104 // Receive Counter Register +#define AT91_SPI_TPR 0x108 // Transmit Pointer Register +#define AT91_SPI_TCR 0x10C // Transmit Counter Register +#define AT91_SPI_NRPR 0x110 // Next Receive Pointer Register +#define AT91_SPI_NRCR 0x114 // Next Receive Counter Register +#define AT91_SPI_NTPR 0x118 // Next Transmit Pointer Register +#define AT91_SPI_NTCR 0x11C // Next Trsnsmit Counter Register +#define AT91_SPI_PTCR 0x120 // PDC Transfer Control Register +#define AT91_SPI_PTSR 0x124 // PDC Transfer Status Register + +// Peripheral Input/Output Controllers +#define AT91_PIOA 0xFFFFF400 +#ifdef CYGHWR_HAL_ARM_AT91SAM7X +#define AT91_PIOB 0xFFFFF600 +#endif #define AT91_WSTC 0xFFFFFD40 @@ -89,7 +113,7 @@ extern cyg_uint32 hal_at91_us_baud(cyg_u // PIO - Programmable I/O -#define AT91_PIO 0xFFFFF400 +#define AT91_PIO AT91_PIOA // AIC - Advanced Interrupt Controller @@ -145,6 +169,18 @@ extern cyg_uint32 hal_at91_us_baud(cyg_u #define AT91_PMC_SR_PCK3RDY (1 << 11) // Pad clock 3 is ready to be enabled #define AT91_PMC_IMR 0x6c // Interrupt Mask Register +#ifdef CYGHWR_HAL_ARM_AT91SAM7X + +// EMAC - Ethernet Medium Access Controller + +#define AT91_EMAC 0xFFFDC000 + +// CAN - Controller Area Network + +#define AT91_CAN 0xFFFD0000 + +#endif + //---------------------------------------------------------------------- // The platform needs this initialization during the // hal_hardware_init() function in the varient HAL.
--- a/packages/hal/arm/at91/at91sam7s/current/src/at91sam7s_misc.c +++ b/packages/hal/arm/at91/at91sam7s/current/src/at91sam7s_misc.c @@ -68,18 +68,7 @@ #include <cyg/hal/drv_api.h> // HAL ISR support #endif -// The development board has four LEDs -void -hal_at91_led (int val) -{ - HAL_WRITE_UINT32(AT91_PIO+AT91_PIO_PPUDR, 0x0000000f); // Disable pull ups - HAL_WRITE_UINT32(AT91_PIO+AT91_PIO_OER, 0x0000000f); // Enable Output - HAL_WRITE_UINT32(AT91_PIO+AT91_PIO_PER, 0x0000000f); // Enable Output - HAL_WRITE_UINT32(AT91_PIO+AT91_PIO_ASR, 0x0000000f); - - HAL_WRITE_UINT32(AT91_PIO+AT91_PIO_SODR, 0x0000000f); // All off - HAL_WRITE_UINT32(AT91_PIO+AT91_PIO_CODR, (val & 0xf)); -} +extern void hal_at91_led(int val); void hal_at91_set_leds (int val) @@ -93,22 +82,15 @@ hal_at91_set_leds (int val) void hal_plf_hardware_init (void) { /* Enable the Serial devices to driver the serial port pins */ - HAL_WRITE_UINT32(AT91_PIO+AT91_PIO_PDR, - AT91_PIO_PSR_RXD0 | AT91_PIO_PSR_TXD0 | AT91_PIO_PSR_DTXD); - - /* Set the serial port pins to PIOA */ - HAL_WRITE_UINT32(AT91_PIO+AT91_PIO_ASR, - AT91_PIO_PSR_RXD0 | AT91_PIO_PSR_TXD0 | - AT91_PIO_PSR_DRXD | AT91_PIO_PSR_DTXD); + HAL_ARM_AT91_PIO_CFG(AT91_USART_RXD0); + HAL_ARM_AT91_PIO_CFG(AT91_USART_TXD0); + HAL_ARM_AT91_PIO_CFG(AT91_DBG_DTXD); + HAL_ARM_AT91_PIO_CFG(AT91_DBG_DRXD); #if !defined(CYGHWR_HAL_ARM_AT91SAM7S_at91sam7s32) /* Enable the Serial devices to driver the serial port pins */ - HAL_WRITE_UINT32(AT91_PIO+AT91_PIO_PDR, - AT91_PIO_PSR_RXD1 | AT91_PIO_PSR_TXD1); - - /* Set the serial port pins to PIOA */ - HAL_WRITE_UINT32(AT91_PIO+AT91_PIO_ASR, - AT91_PIO_PSR_RXD1 | AT91_PIO_PSR_TXD1); + HAL_ARM_AT91_PIO_CFG(AT91_USART_RXD1); + HAL_ARM_AT91_PIO_CFG(AT91_USART_TXD1); #endif /* Setup the Reset controller. Allow user resets */