--- a/packages/hal/arm/arch/current/ChangeLog
+++ b/packages/hal/arm/arch/current/ChangeLog
@@ -1,3 +1,94 @@
+2008-10-07  Jonathan Larmour  <jifl@eCosCentric.com>
+
+	* src/arm.ld: Discard C++ EH-related sections when we can't
+	possibly support C++ EH (no CYGPKG_LIBSTDCXX).
+
+2008-09-27  Jonathan Larmour  <jifl@eCosCentric.com>
+
+	* src/hal_mk_defs.c: Also export HAL_BREAKINST_THUMB and
+	HAL_BREAKINST_ARM to asm.
+	* src/arm.ld: Revise alignment yet further. Maintain ALIGN_LMA
+	at original value, but define alignment for use in compliance
+	with AAPCS. Expand explanatory comments.
+	(SECTION_text): Comply with AAPCS alignment when inserting
+	.ARM.extab and .ARM.exidx.	
+
+2008-09-17  Jonathan Larmour  <jifl@eCosCentric.com>
+
+	* src/arm.ld: Rework alignment further to improve backward
+	compatibility. Improve commenting on alignment issues.
+
+2008-08-26  Jonathan Larmour  <jifl@eCosCentric.com>
+
+	* src/arm.ld: We need to be double-word aligned sometimes, so align
+	LMA the same way too.
+
+2008-07-24  Jonathan Larmour  <jifl@eCosCentric.com>
+
+	* cdl/hal_arm.cdl (CYGBLD_HAL_ARM_EABI): EABI has a different C++
+	EH implementation, so don't let LIBSTDCXX use the default one.
+
+2008-06-04  Jonathan Larmour  <jifl@eCosCentric.com>
+
+	* src/vectors.S: Correctly conditionalise overwriting (or not)
+	of reset vector.
+
+2008-05-28  Jonathan Larmour  <jifl@eCosCentric.com>
+
+	* src/hal_misc.c (CONSTRUCTORS_END): Fix fencepost error.
+
+2008-05-19  Jonathan Larmour  <jifl@eCosCentric.com>
+
+	* include/arm_stub.h: Remove CYG_HAL_GDB_ENTER_CRITICAL_IO_REGION
+	and CYG_HAL_GDB_LEAVE_CRITICAL_IO_REGION defines which should remain
+	as their defaults.
+	* src/arm.ld: Add SECTION_hal_vsr_table for targets which need the
+	VSR table in a different location to the rest of the fixed vectors.
+	* src/vectors.S: Allow hal_platform_setup.h to define
+	CYGHWR_HAL_ARM_SEPARATE_VSR_TABLE to allow move of hal_vsr_table
+	to its own section at a different address.
+
+2008-05-12  Jonathan Larmour  <jifl@eCosCentric.com>
+
+	* src/hal_mk_defs.c (main): Export exception vector info
+	to asm.
+	* src/arm.ld: Remove previous EABI support and instead use a
+	different approach incorporating into existing SECTION macros for
+	better backward compatibility.
+	* src/hal_misc.c (cyg_hal_invoke_constructors): Rewrite init_array
+	support for EABI.
+	There is now nothing copyrightable remaining from Chris Zimman's
+	earlier work in this package.
+
+2008-05-09  Jonathan Larmour  <jifl@eCosCentric.com>
+
+	* cdl/hal_arm.cdl: Rename EABI option. Set default from
+	toolchain prefix and flags. Rewrite description.
+	* include/hal_arch.h: Rename exception vector addresses to
+	names less likely to potentially clash with applications.
+	* src/vectors.S: Update vector address names in line with
+	hal_arch.h change. Rename CYGNUM_HAL_VECTOR_TABLE ->
+	CYGHWR_HAL_VECTOR_TABLE_BASE.
+
+2008-05-09  Chris Zimman  <czimman@bloomberg.com>
+2008-05-09  Jonathan Larmour  <jifl@eCosCentric.com>
+
+	Some of the following changes were inspired by work from Chris
+	Zimman. Further changes were also provided, but have not been
+	included because either they are cosmetic (whitespace changes
+	etc.) and thus will only make it more difficult to merge in future
+	updates from public eCos code base in future, increase code size
+	for those who don't need it, or break compatibility with public
+	eCos.
+	* cdl/hal_arm.cdl: Add EABI build option.
+	* include/hal_arch.h: Add extra CPSR definitions, and exception
+	vector addresses.
+	* src/arm.ld: Add EABI support.
+	* src/hal_misc.c: Add EABI constructor support.
+	* src/vectors.S: Allow variant/processor/platform to specify
+	alternate vector table base. Use pretty names from hal_arch.h
+	for vector offset/addresses.
+
 2007-10-15  Sergei Gavrikov <w3sg@SoftHome.net>
 
 	* cdl/hal_arm.cdl: Use ACTUAL_CFLAGS whenever possible to avoid

--- a/packages/hal/arm/arch/current/cdl/hal_arm.cdl
+++ b/packages/hal/arm/arch/current/cdl/hal_arm.cdl
@@ -167,6 +167,21 @@ cdl_package CYGPKG_HAL_ARM {
              optimize for on boards that support multiple CPU types."
     }
 
+    cdl_option CYGBLD_HAL_ARM_EABI {
+        display          "Build for ARM EABI"
+        default_value    { (is_substr(CYGBLD_GLOBAL_COMMAND_PREFIX, "-eabi") && \
+                            !is_substr(CYGBLD_GLOBAL_CFLAGS, "-mabi=apcs-gnu") && \
+                            !is_substr(CYGBLD_GLOBAL_CFLAGS, "-mabi=atpcs")) || \
+                           is_substr(CYGBLD_GLOBAL_CFLAGS, "-mabi=aapcs") }
+        # The EABI uses a different C++ exception implementation to the standard
+        # one and thus we indicate this to CYGPKG_LIBSTDCXX
+        implements       CYGINT_LIBSTDCXX_NO_CXX_EXCEPTION_REG_FRAME_IMPL
+        description "
+            If using a toolchain which targets the ARM EABI (embedded application
+            binary interface), this option should be enabled to provide altered
+            semantics and differing linker section output."
+    }
+
     cdl_option CYGHWR_HAL_ARM_DUMP_EXCEPTIONS {
         display          "Provide diagnostic dump for exceptions"
         requires         !CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS

--- a/packages/hal/arm/arch/current/include/hal_arch.h
+++ b/packages/hal/arm/arch/current/include/hal_arch.h
@@ -12,6 +12,7 @@
 // -------------------------------------------
 // This file is part of eCos, the Embedded Configurable Operating System.
 // Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Red Hat, Inc.
+// Copyright (C) 2004, 2005, 2007, 2008 eCosCentric Limited
 //
 // eCos is free software; you can redistribute it and/or modify it under
 // the terms of the GNU General Public License as published by the Free
@@ -78,11 +79,40 @@
 #define CPSR_SUPERVISOR_MODE	0x13
 #define CPSR_UNDEF_MODE		0x1B
 
+// The following are not supported by every CPU, but if
+// they are, they have the following values:
+#define CPSR_ICACHE_ENABLE	0x1000
+#define CPSR_BIG_ENDIAN		0x80
+#define CPSR_DCACHE_ENABLE	0x4
+#define CPSR_ALIGN_FAULT_ENABLE	0x2
+#define CPSR_MMU_ENABLE		0x1
+
 #define CPSR_MODE_BITS          0x1F
 
 #define CPSR_INITIAL (CPSR_IRQ_DISABLE|CPSR_FIQ_DISABLE|CPSR_SUPERVISOR_MODE)
 #define CPSR_THREAD_INITIAL (CPSR_SUPERVISOR_MODE)
 
+//
+// Vector table offsets
+//
+
+#define HAL_ARM_RESET_VECTOR			0x00
+#define HAL_ARM_UNDEFINED_VECTOR		0x04
+#define HAL_ARM_SWI_VECTOR			0x08
+#define HAL_ARM_PREFETCH_VECTOR			0x0C
+#define HAL_ARM_ABORT_VECTOR			0x10
+#define HAL_ARM_RESERVED_VECTOR			0x14
+#define HAL_ARM_IRQ_VECTOR			0x18
+#define HAL_ARM_FIQ_VECTOR			0x1C
+#define HAL_ARM_RESET_VECTOR_ADDR		0x20
+#define HAL_ARM_UNDEFINED_VECTOR_ADDR		0x24
+#define HAL_ARM_SWI_VECTOR_ADDR			0x28
+#define HAL_ARM_PREFETCH_VECTOR_ADDR		0x2C
+#define HAL_ARM_ABORT_VECTOR_ADDR		0x30
+#define HAL_ARM_RESERVED_VECTOR_ADDR		0x34
+#define HAL_ARM_IRQ_VECTOR_ADDR			0x38
+#define HAL_ARM_FIQ_VECTOR_ADDR			0x3C
+
 //--------------------------------------------------------------------------
 // Processor saved states:
 // The layout of this structure is also defined in "arm.inc", for assembly

--- a/packages/hal/arm/arch/current/src/arm.ld
+++ b/packages/hal/arm/arch/current/src/arm.ld
@@ -7,6 +7,7 @@
 // -------------------------------------------
 // This file is part of eCos, the Embedded Configurable Operating System.
 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
+// Copyright (C) 2005, 2008 eCosCentric Ltd.
 //
 // eCos is free software; you can redistribute it and/or modify it under
 // the terms of the GNU General Public License as published by the Free
@@ -30,23 +31,17 @@
 //
 // This exception does not invalidate any other reasons why a work based on
 // this file might be covered by the GNU General Public License.
-//
-// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
-// at http://sources.redhat.com/ecos/ecos-license/
 // -------------------------------------------
 //####ECOSGPLCOPYRIGHTEND####
 //=============================================================================
 
 #include <pkgconf/system.h>
+#include <pkgconf/hal.h>
 
 STARTUP(vectors.o)
 ENTRY(reset_vector)
 INPUT(extras.o)
-#if (__GNUC__ >= 3)
-GROUP(libtarget.a libgcc.a libsupc++.a)
-#else
-GROUP(libtarget.a libgcc.a)
-#endif
+GROUP( CYGBLD_HAL_LINKER_GROUPED_LIBS )
 
 #if defined(__ARMEB__)
 OUTPUT_FORMAT(elf32-bigarm)
@@ -72,8 +67,21 @@ OUTPUT_FORMAT(elf32-bigarm)
 #undef  CYGPRI_PID_BE_WORKAROUND
 #endif
 
+// ALIGN_LMA is 4, but the AAPCS now requires that double word types
+// be aligned to 8, which means some input sections can be marked as needing
+// 8-byte alignment, even text ones (consider literal data).
+// This is quite a big backward-compatibility problem for us as a zillion
+// platform mlt files for ARM assume that 4-byte alignment is adequate. Really
+// this is a bigger problem for the VMA but of course the LMA and VMA have to
+// move in sync, since things like .data are just copied as a block. Still,
+// ALIGN_LMA as 4 is probably best, but there can be problems with this.
+
 #define ALIGN_LMA 4
-#define FOLLOWING(_section_) AT ((LOADADDR (_section_) + SIZEOF (_section_) + ALIGN_LMA - 1) & ~ (ALIGN_LMA - 1))
+#define AAPCS_ALIGN 8
+#define FOLLOWING_ALIGNED(_section_, _align_) AT ((LOADADDR (_section_) + SIZEOF (_section_) + (_align_) - 1) & ~ ((_align_) - 1))
+#define FOLLOWING(_section_) FOLLOWING_ALIGNED(_section_, ALIGN_LMA)
+
+
 #define LMA_EQ_VMA
 #define FORCE_OUTPUT . = .
 
@@ -90,7 +98,17 @@ OUTPUT_FORMAT(elf32-bigarm)
   .debug_str      0 : { *(.debug_str) }         \
   .debug_loc      0 : { *(.debug_loc) }         \
   .debug_macinfo  0 : { *(.debug_macinfo) }     \
-  .note.arm.ident 0 : { KEEP (*(.note.arm.ident)) }
+  .note.arm.ident 0 : { KEEP (*(.note.arm.ident)) } \
+  /DISCARD/       0 : { *(.fini_array*) }
+
+
+// Following not used unless CYGHWR_HAL_ARM_SEPARATE_VSR_TABLE
+// defined in hal_platform_setup.h. Otherwise vsr table
+// goes in .fixed_vectors.
+#define SECTION_hal_vsr_table(_region_, _vma_, _lma_) \
+    .hal_vsr_table _vma_ : _lma_ \
+    { FORCE_OUTPUT; KEEP (*(.hal_vsr_table)) } \
+    > _region_
 
 #define SECTION_fixed_vectors(_region_, _vma_, _lma_) \
     .fixed_vectors _vma_ : _lma_ \
@@ -104,12 +122,73 @@ OUTPUT_FORMAT(elf32-bigarm)
     > _region_ \
     __rom_vectors_lma = LOADADDR(.rom_vectors);
 
+/* The following two sections are used for C++ exception handling
+ * only and so can be discarded if not used for that.
+ * These are both included directly from the SECTION_text
+ * definition and so, for now, are not expected to be listed
+ * separately in mlt files.
+ */
+#ifdef CYGPKG_LIBSTDCXX
+#define SECTION_ARM_extab(_region_, _vma_, _lma_) \
+    .ARM.extab _vma_ : _lma_ \
+    { PROVIDE (__stext = ABSOLUTE(.)); _stext = ABSOLUTE(.) ; \
+    FORCE_OUTPUT; \
+    *(.ARM.extab* .gnu.linkonce.armextab.*) } > _region_
+
+#define SECTION_ARM_exidx(_region_, _vma_, _lma_) \
+    . = _vma_; \
+    . = ALIGN(AAPCS_ALIGN); \
+    __exidx_start = ABSOLUTE(.); \
+    .ARM.exidx ALIGN(AAPCS_ALIGN) : _lma_ { \
+    *(.ARM.exidx* .gnu.linkonce.armexidx.*) \
+    FORCE_OUTPUT; \
+    } > _region_ \
+    __exidx_end = ABSOLUTE(.);
+
+#else
+#define SECTION_ARM_extab(_region_, _vma_, _lma_) \
+    .ARM.extab _vma_ : _lma_ \
+    { PROVIDE (__stext = ABSOLUTE(.)); _stext = ABSOLUTE(.) ; \
+    FORCE_OUTPUT; \
+    } > _region_ \
+    /DISCARD/     0 : { *(.ARM.extab* .gnu.linkonce.armextab.*) }
+
+#define SECTION_ARM_exidx(_region_, _vma_, _lma_) \
+    . = _vma_; \
+    . = ALIGN(AAPCS_ALIGN); \
+    __exidx_start = ABSOLUTE(.); \
+    .ARM.exidx ALIGN(AAPCS_ALIGN) : _lma_ { \
+    FORCE_OUTPUT; \
+    } > _region_ \
+    __exidx_end = ABSOLUTE(.); \
+    /DISCARD/     0 : { *(.ARM.exidx* .gnu.linkonce.armexidx.*) }
+#endif
+
+
+
+// We slot in the .ARM.extab and .ARM.exidx sections first. They
+// need to be close to .text due to their relocations which may
+// want small offsets - .rodata may be somewhere very different.
+// This approach also allows forward compatibility with targets
+// which haven't used the EABI before (no new SECTION_xxx definition
+// to use).
+// One glitch is that the AAPCS can require up to 8-byte alignment
+// for double word types. For sections after the first (for which we
+// "trust" the MLT files (probably a mistake)), we need to
+// ensure the subsequent sections' VMA and LMA move in sync, which
+// means keeping the same alignment, and thus since for example literal
+// data in .text can require up to 8 byte alignment, the LMA must also
+// be 8 byte aligned.
+
 #define SECTION_text(_region_, _vma_, _lma_) \
-    .text _vma_ : _lma_ \
-    { _stext = ABSOLUTE(.); \
-    PROVIDE (__stext = ABSOLUTE(.)); \
+    SECTION_ARM_extab(_region_, _vma_, _lma_) \
+    SECTION_ARM_exidx(_region_, ALIGN(AAPCS_ALIGN), FOLLOWING_ALIGNED(.ARM.extab, AAPCS_ALIGN)) \
+    .text ALIGN(AAPCS_ALIGN) : FOLLOWING_ALIGNED(.ARM.exidx, AAPCS_ALIGN) \
+    { \
     *(.text*) *(.gnu.warning) *(.gnu.linkonce.t.*) *(.init) \
     *(.glue_7) *(.glue_7t)  \
+    __CTOR_LIST__ = ABSOLUTE (.); KEEP (*(SORT (.ctors*))) __CTOR_END__ = ABSOLUTE (.); \
+    __DTOR_LIST__ = ABSOLUTE (.); KEEP (*(SORT (.dtors*))) __DTOR_END__ = ABSOLUTE (.); \
     } > _region_ \
     _etext = .; PROVIDE (__etext = .);
 
@@ -138,10 +217,18 @@ OUTPUT_FORMAT(elf32-bigarm)
     { FORCE_OUTPUT; *(.fixup) } \
     > _region_
 
-#define SECTION_gcc_except_table(_region_, _vma_, _lma_) \
-    .gcc_except_table _vma_ : _lma_ \
-    { FORCE_OUTPUT; *(.gcc_except_table) } \
-    > _region_
+#ifdef CYGPKG_LIBSTDCXX
+/* We want to discard C++ exception frame data if we don't have the
+ * C++ support to use it. So there are two versions of the section
+ * definitions for .gcc_except_table and .eh_frame, one which keeps
+ * them, the other discards.
+ */
+#define SECTION_gcc_except_table(_region_, _vma_, _lma_)      \
+    .gcc_except_table _vma_ : _lma_                           \
+    { FORCE_OUTPUT;                                           \
+      KEEP(*(.gcc_except_table))                              \
+      *(.gcc_except_table.*)                                  \
+    } > _region_
 
 #define SECTION_eh_frame(_region_, _vma_, _lma_)      \
   .eh_frame _vma_ : _lma_                             \
@@ -151,6 +238,21 @@ OUTPUT_FORMAT(elf32-bigarm)
        __FRAME_END__ = .;                             \
        . = . + 8;                                     \
     } > _region_ = 0
+#else
+#define SECTION_gcc_except_table(_region_, _vma_, _lma_)      \
+    .gcc_except_table _vma_ : _lma_                           \
+    { FORCE_OUTPUT;                                           \
+    } > _region_                                              \
+    /DISCARD/     0 : { *(.gcc_except_table*) }
+
+#define SECTION_eh_frame(_region_, _vma_, _lma_)      \
+  .eh_frame _vma_ : _lma_                             \
+    {                                                 \
+       FORCE_OUTPUT;  __EH_FRAME_BEGIN__ = .;         \
+       __FRAME_END__ = .;                             \
+    } > _region_                                      \
+    /DISCARD/     0 : { *(.eh_frame) }
+#endif
 
 #define SECTION_RELOCS(_region_, _vma_, _lma_)                              \
   .rel.text      :                                                          \
@@ -230,8 +332,8 @@ OUTPUT_FORMAT(elf32-bigarm)
     . = ALIGN (4); \
     KEEP(*( SORT (.ecos.table.*))) ;            \
     . = ALIGN (4); \
-    __CTOR_LIST__ = ABSOLUTE (.); KEEP (*(SORT (.ctors*))) __CTOR_END__ = ABSOLUTE (.); \
-    __DTOR_LIST__ = ABSOLUTE (.); KEEP (*(SORT (.dtors*))) __DTOR_END__ = ABSOLUTE (.); \
+    __init_array_start__ = ABSOLUTE (.); KEEP (*(SORT (.init_array.*))) \
+    KEEP (*(SORT (.init_array))) __init_array_end__ = ABSOLUTE (.); \
     *(.dynamic) *(.sdata*) *(.gnu.linkonce.s.*) \
     . = ALIGN (4); *(.2ram.*) } \
     > _region_ \

--- a/packages/hal/arm/arch/current/src/hal_misc.c
+++ b/packages/hal/arm/arch/current/src/hal_misc.c
@@ -9,6 +9,7 @@
 // -------------------------------------------
 // This file is part of eCos, the Embedded Configurable Operating System.
 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
+// Copyright (C) 2008 eCosCentric Limited.
 //
 // eCos is free software; you can redistribute it and/or modify it under
 // the terms of the GNU General Public License as published by the Free
@@ -60,6 +61,7 @@
 #include <pkgconf/cygmon.h>
 #endif
 
+#include <cyg/infra/diag.h>
 #include <cyg/infra/cyg_type.h>
 #include <cyg/infra/cyg_trac.h>         // tracing macros
 #include <cyg/infra/cyg_ass.h>          // assertion macros
@@ -67,8 +69,6 @@
 #include <cyg/hal/hal_arch.h>           // HAL header
 #include <cyg/hal/hal_intr.h>           // HAL header
 
-#include <cyg/infra/diag.h>
-
 /*------------------------------------------------------------------------*/
 /* First level C exception handler.                                       */
 
@@ -178,28 +178,41 @@ cyg_bool cyg_hal_stop_constructors;
 #endif
 
 typedef void (*pfunc) (void);
+
+// EABI uses different symbols, and constructors are in opposite order.
+#ifdef CYGBLD_HAL_ARM_EABI
+extern pfunc __init_array_start__[];
+extern pfunc __init_array_end__[];
+#define CONSTRUCTORS_START  (__init_array_start__[0])
+#define CONSTRUCTORS_END    (__init_array_end__)
+#define NEXT_CONSTRUCTOR(c) ((c)++)
+#else
 extern pfunc __CTOR_LIST__[];
 extern pfunc __CTOR_END__[];
+#define CONSTRUCTORS_START  (__CTOR_END__[-1])
+#define CONSTRUCTORS_END    (&__CTOR_LIST__[-1])
+#define NEXT_CONSTRUCTOR(c) ((c)--)
+#endif
 
 void
 cyg_hal_invoke_constructors (void)
 {
 #ifdef CYGSEM_HAL_STOP_CONSTRUCTORS_ON_FLAG
-    static pfunc *p = &__CTOR_END__[-1];
+    static pfunc *p = &CONSTRUCTORS_START;
     
     cyg_hal_stop_constructors = 0;
-    for (; p >= __CTOR_LIST__; p--) {
-        (*p) ();
+    for (; p != CONSTRUCTORS_END; NEXT_CONSTRUCTOR(p)) {
+        (*p)();
         if (cyg_hal_stop_constructors) {
-            p--;
+            NEXT_CONSTRUCTOR(p);
             break;
         }
     }
 #else
     pfunc *p;
 
-    for (p = &__CTOR_END__[-1]; p >= __CTOR_LIST__; p--)
-        (*p) ();
+    for (p = &CONSTRUCTORS_START; p != CONSTRUCTORS_END; NEXT_CONSTRUCTOR(p))
+        (*p)();
 #endif
 }
 

--- a/packages/hal/arm/arch/current/src/hal_mk_defs.c
+++ b/packages/hal/arm/arch/current/src/hal_mk_defs.c
@@ -9,6 +9,7 @@
 // -------------------------------------------
 // This file is part of eCos, the Embedded Configurable Operating System.
 // Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Red Hat, Inc.
+// Copyright (C) 2008 eCosCentric Limited.
 //
 // eCos is free software; you can redistribute it and/or modify it under
 // the terms of the GNU General Public License as published by the Free
@@ -121,6 +122,25 @@ main(void)
     DEFINE(CYGNUM_CALL_IF_TABLE_SIZE, CYGNUM_CALL_IF_TABLE_SIZE);
 #endif
     DEFINE(CYGNUM_HAL_INTERRUPT_NONE, CYGNUM_HAL_INTERRUPT_NONE);
+    DEFINE(HAL_ARM_RESET_VECTOR, HAL_ARM_RESET_VECTOR);
+    DEFINE(HAL_ARM_UNDEFINED_VECTOR, HAL_ARM_UNDEFINED_VECTOR);
+    DEFINE(HAL_ARM_SWI_VECTOR, HAL_ARM_SWI_VECTOR);
+    DEFINE(HAL_ARM_PREFETCH_VECTOR, HAL_ARM_PREFETCH_VECTOR);
+    DEFINE(HAL_ARM_ABORT_VECTOR, HAL_ARM_ABORT_VECTOR);
+    DEFINE(HAL_ARM_RESERVED_VECTOR, HAL_ARM_RESERVED_VECTOR);
+    DEFINE(HAL_ARM_IRQ_VECTOR, HAL_ARM_IRQ_VECTOR);
+    DEFINE(HAL_ARM_FIQ_VECTOR, HAL_ARM_FIQ_VECTOR);
+    DEFINE(HAL_ARM_RESET_VECTOR_ADDR, HAL_ARM_RESET_VECTOR_ADDR);
+    DEFINE(HAL_ARM_UNDEFINED_VECTOR_ADDR, HAL_ARM_UNDEFINED_VECTOR_ADDR);
+    DEFINE(HAL_ARM_SWI_VECTOR_ADDR, HAL_ARM_SWI_VECTOR_ADDR);
+    DEFINE(HAL_ARM_PREFETCH_VECTOR_ADDR, HAL_ARM_PREFETCH_VECTOR_ADDR);
+    DEFINE(HAL_ARM_ABORT_VECTOR_ADDR, HAL_ARM_ABORT_VECTOR_ADDR);
+    DEFINE(HAL_ARM_RESERVED_VECTOR_ADDR, HAL_ARM_RESERVED_VECTOR_ADDR);
+    DEFINE(HAL_ARM_IRQ_VECTOR_ADDR, HAL_ARM_IRQ_VECTOR_ADDR);
+    DEFINE(HAL_ARM_FIQ_VECTOR_ADDR, HAL_ARM_FIQ_VECTOR_ADDR);
+
+    DEFINE(HAL_BREAKINST_THUMB, HAL_BREAKINST_THUMB);
+    DEFINE(HAL_BREAKINST_ARM, HAL_BREAKINST_ARM);
 
     return 0;
 }

--- a/packages/hal/arm/arch/current/src/vectors.S
+++ b/packages/hal/arm/arch/current/src/vectors.S
@@ -180,8 +180,14 @@
 
 //==========================================================================
 // Hardware exception vectors.
-//   This entire section will be copied to location 0x0000 at startup time.
+//   This entire section will be copied to the vector table base (by default at
+//   location 0x0000) at startup time.
 //
+
+#ifndef CYGHWR_HAL_VECTOR_TABLE_BASE
+# define CYGHWR_HAL_VECTOR_TABLE_BASE     0x0
+#endif  /* ifdef CYGHWR_HAL_VECTOR_TABLE_BASE */
+
         .code   32
         .section ".vectors","ax"
 
@@ -356,43 +362,47 @@ 1:      cmp     r1,#0
 #endif
 
         // Reset software interrupt pointer
-        mov     r0,#0           // move vectors
+        ldr     r0,=CYGHWR_HAL_VECTOR_TABLE_BASE           // move vectors
         ldr     r1,.__exception_handlers
 #if defined(CYG_HAL_STARTUP_RAM) && \
     !defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS)
         cmp     r7,#CPSR_SUPERVISOR_MODE
         beq     10f
 #endif
-        ldr     r2,[r1,#0x28]   // software interrupt
-        str     r2,[r0,#0x28]
+        ldr     r2,[r1,#HAL_ARM_SWI_VECTOR_ADDR]   // software interrupt
+        str     r2,[r0,#HAL_ARM_SWI_VECTOR_ADDR]
 10:
-        ldr     r2,[r1,#0x18]   // IRQ
-        str     r2,[r0,#0x18]
-        ldr     r2,[r1,#0x38]
-        str     r2,[r0,#0x38]
-        ldr     r2,[r1,#0x1C]   // FIQ
-        str     r2,[r0,#0x1C]
-        ldr     r2,[r1,#0x3C]
-        str     r2,[r0,#0x3C]
-        ldr     r2,[r1,#0x0C]   // abort (prefetch)
-        str     r2,[r0,#0x0C]
-        ldr     r2,[r1,#0x2C]   
-        str     r2,[r0,#0x2C]
-        ldr     r2,[r1,#0x10]   // abort (data)
-        str     r2,[r0,#0x10]
-        ldr     r2,[r1,#0x30]
-        str     r2,[r0,#0x30]
+        ldr     r2,[r1,#HAL_ARM_IRQ_VECTOR]   // IRQ
+        str     r2,[r0,#HAL_ARM_IRQ_VECTOR]
+        ldr     r2,[r1,#HAL_ARM_IRQ_VECTOR_ADDR]
+        str     r2,[r0,#HAL_ARM_IRQ_VECTOR_ADDR]
+        ldr     r2,[r1,#HAL_ARM_FIQ_VECTOR]   // FIQ
+        str     r2,[r0,#HAL_ARM_FIQ_VECTOR]
+        ldr     r2,[r1,#HAL_ARM_FIQ_VECTOR_ADDR]
+        str     r2,[r0,#HAL_ARM_FIQ_VECTOR_ADDR]
+        ldr     r2,[r1,#HAL_ARM_PREFETCH_VECTOR]   // abort (prefetch)
+        str     r2,[r0,#HAL_ARM_PREFETCH_VECTOR]
+        ldr     r2,[r1,#HAL_ARM_PREFETCH_VECTOR_ADDR]   
+        str     r2,[r0,#HAL_ARM_PREFETCH_VECTOR_ADDR]
+        ldr     r2,[r1,#HAL_ARM_ABORT_VECTOR]   // abort (data)
+        str     r2,[r0,#HAL_ARM_ABORT_VECTOR]
+        ldr     r2,[r1,#HAL_ARM_ABORT_VECTOR_ADDR]
+        str     r2,[r0,#HAL_ARM_ABORT_VECTOR_ADDR]
 
         LED 4
 
 #if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_ROMRAM)
         // Set up reset vector
-        mov     r0,#0
+        ldr     r0,=CYGHWR_HAL_VECTOR_TABLE_BASE
         ldr     r1,.__exception_handlers
-        ldr     r2,[r1,#0x00]    // reset vector intstruction
-        str     r2,[r0,#0x00]
+# ifndef CYGSEM_HAL_KEEP_RESET_VECTOR
+        ldr     r2,[r1,#HAL_ARM_RESET_VECTOR]    // reset vector instruction
+        str     r2,[r0,#HAL_ARM_RESET_VECTOR]
+#  ifndef CYGSEM_HAL_ROM_RESET_USES_JUMP // if using jump, reset vector address is not referenced
         ldr     r2,=warm_reset
-        str     r2,[r0,#0x20]
+        str     r2,[r0,#HAL_ARM_RESET_VECTOR_ADDR]
+#  endif
+# endif
         // Relocate [copy] data from ROM to RAM
         ldr     r3,.__rom_data_start
         ldr     r4,.__ram_data_start