Mercurial > ecos-v3_0-branch
changeset 2664:7dbab411425b
* LPC-E2294 development board package
* cdl/hal_arm_lpc2xxx_olpce2294.cdl
* include/hal_platform_setup.h
* include/pkgconf/mlt_arm_lpc2xxx_olpce2294_ram.h
* include/pkgconf/mlt_arm_lpc2xxx_olpce2294_ram.ldi
* include/pkgconf/mlt_arm_lpc2xxx_olpce2294_rom.h
* include/pkgconf/mlt_arm_lpc2xxx_olpce2294_rom.ldi
* include/plf_io.h
* misc/redboot_ROM.ecm
* src/btn_drv.c
* src/olpce2294_misc.c
* src/redboot_cmds.c
line wrap: on
line diff
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/lpc2xxx/olpce2294/current/ChangeLog @@ -0,0 +1,47 @@ +2008-08-31 Sergei Gavrikov <sergei.gavrikov@gmail.com> + + * LPC-E2294 development board package + * cdl/hal_arm_lpc2xxx_olpce2294.cdl + * include/hal_platform_setup.h + * include/pkgconf/mlt_arm_lpc2xxx_olpce2294_ram.h + * include/pkgconf/mlt_arm_lpc2xxx_olpce2294_ram.ldi + * include/pkgconf/mlt_arm_lpc2xxx_olpce2294_rom.h + * include/pkgconf/mlt_arm_lpc2xxx_olpce2294_rom.ldi + * include/plf_io.h + * misc/redboot_ROM.ecm + * src/btn_drv.c + * src/olpce2294_misc.c + * src/redboot_cmds.c + +//=========================================================================== +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 2008 FSF. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//=========================================================================== +
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/lpc2xxx/olpce2294/current/cdl/hal_arm_lpc2xxx_olpce2294.cdl @@ -0,0 +1,298 @@ +# ==================================================================== +# +# hal_arm_lpc2xxx_olpce2294.cdl +# +# ARM LPC2XXX OLPCE2294 development board package configuration +# data +# +# ==================================================================== +#####ECOSGPLCOPYRIGHTBEGIN#### +## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +## Copyright (C) 2008 eCosCentric Limited +## +## eCos is free software; you can redistribute it and/or modify it under +## the terms of the GNU General Public License as published by the Free +## Software Foundation; either version 2 or (at your option) any later version. +## +## eCos is distributed in the hope that it will be useful, but WITHOUT ANY +## WARRANTY; without even the implied warranty of MERCHANTABILITY or +## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +## for more details. +## +## You should have received a copy of the GNU General Public License along +## with eCos; if not, write to the Free Software Foundation, Inc., +## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +## +## As a special exception, if other files instantiate templates or use macros +## or inline functions from this file, or you compile this file and link it +## with other works to produce a work based on this file, this file does not +## by itself cause the resulting work to be covered by the GNU General Public +## License. However the source code for this file must still be made available +## in accordance with section (3) of the GNU General Public License. +## +## This exception does not invalidate any other reasons why a work based on +## this file might be covered by the GNU General Public License. +## ------------------------------------------- +#####ECOSGPLCOPYRIGHTEND#### +# ==================================================================== +######DESCRIPTIONBEGIN#### +# +# Author(s): Sergei Gavrikov +# Contributors: Sergei Gavrikov +# Date: 2008-08-31 +# +#####DESCRIPTIONEND#### +# +# ==================================================================== + +cdl_package CYGPKG_HAL_ARM_LPC2XXX_OLPCE2294 { + display "Olimex LPC-E2294 development board HAL" + parent CYGPKG_HAL_ARM_LPC2XXX + define_header hal_arm_lpc2xxx_olpce2294.h + include_dir cyg/hal + hardware + description " + The OLPCE2294 HAL package provides the support needed to run + eCos on Olimex LPC-E2294 development board." + + compile olpce2294_misc.c + + requires { CYGHWR_HAL_ARM_LPC2XXX == "LPC2294" } + + define_proc { + puts $::cdl_system_header "#define CYGBLD_HAL_TARGET_H <pkgconf/hal_arm.h>" + puts $::cdl_system_header "#define CYGBLD_HAL_VARIANT_H <pkgconf/hal_arm_lpc2xxx.h>" + puts $::cdl_system_header "#define CYGBLD_HAL_PLATFORM_H <pkgconf/hal_arm_lpc2xxx_olpce2294.h>" + puts $::cdl_header "#define HAL_PLATFORM_CPU \"ARM7TDMI-S\"" + puts $::cdl_header "#define HAL_PLATFORM_BOARD \"Olimex LPC-E2294 development board\"" + puts $::cdl_header "#define HAL_PLATFORM_EXTRA \"\"" + } + + cdl_component CYG_HAL_STARTUP { + display "Startup type" + flavor data + default_value {"RAM"} + legal_values {"RAM" "ROM"} + no_define + define -file system.h CYG_HAL_STARTUP + description "Choose RAM or ROM startup type." + } + + cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_DEFAULT { + display "Default console channel." + flavor data + calculated 0 + } + + cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS { + display "Number of communication channels on the board" + flavor data + calculated 3 + description " + Channel 0: UART0, Channel 1: UART1, Channel 2: LCD." + } + + cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL { + display "Debug serial port" + active_if CYGPRI_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL_CONFIGURABLE + flavor data + legal_values 0 to 1 + default_value 0 + description " + Olimex LPC-E2294 board has two serial ports. This option + chooses which port will be used to connect to a host + running GDB." + } + + cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL { + display "Diagnostic serial port" + active_if CYGPRI_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_CONFIGURABLE + flavor data + legal_values 0 to CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS-1 + default_value CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_DEFAULT + description " + Olimex LPC-E2294 board has two serial ports and a LCD. This + option chooses which port will be used for diagnostic + output." + } + + cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_BAUD { + display "Diagnostic serial port baud rate" + flavor data + legal_values 9600 19200 38400 57600 115200 + default_value 38400 + description " + This option selects the baud rate used for the diagnostic + port." + } + + cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL_BAUD { + display "GDB serial port baud rate" + flavor data + legal_values 9600 19200 38400 57600 115200 + default_value 38400 + description " + This option controls the baud rate used for the GDB + connection." + } + + # Real-time clock/counter specifics + cdl_option CYGNUM_HAL_ARM_LPC2XXX_XTAL_FREQ { + display "CPU xtal frequency" + flavor data + default_value {14745600} + } + + cdl_option CYGNUM_HAL_ARM_LPC2XXX_PLL_MUL { + display "CPU PLL multiplier" + flavor data + default_value {4} + } + + cdl_option CYGNUM_HAL_ARM_LPC2XXX_CLOCK_SPEED { + display "CPU clock speed" + flavor data + calculated { CYGNUM_HAL_ARM_LPC2XXX_PLL_MUL * + CYGNUM_HAL_ARM_LPC2XXX_XTAL_FREQ } + } + + cdl_component CYGBLD_GLOBAL_OPTIONS { + display "Global build options" + flavor none + parent CYGPKG_NONE + description " + Global build options including control over compiler flags, + linker flags and choice of toolchain." + + cdl_option CYGBLD_GLOBAL_COMMAND_PREFIX { + display "Global command prefix" + flavor data + no_define + default_value { "arm-eabi" } + description " + This option specifies the command prefix used when + invoking the build tools." + } + + cdl_option CYGBLD_GLOBAL_CFLAGS { + display "Global compiler flags" + flavor data + no_define + default_value { (CYGHWR_THUMB ? "-mthumb " : "") . (CYGBLD_ARM_ENABLE_THUMB_INTERWORK ? "-mthumb-interwork " : "") . "-mcpu=arm7tdmi -Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef -Woverloaded-virtual -g -O2 -ffunction-sections -fdata-sections -fno-rtti -fno-exceptions" } + description " + This option controls the global compiler flags which + are used to compile all packages by default. Individual + packages may define options which override these global + flags." + } + + cdl_option CYGBLD_GLOBAL_LDFLAGS { + display "Global linker flags" + flavor data + no_define + default_value { (CYGHWR_THUMB ? "-mthumb " : "") . (CYGBLD_ARM_ENABLE_THUMB_INTERWORK ? "-mthumb-interwork " : "") . "-mcpu=arm7tdmi -Wl,--gc-sections -Wl,-static -g -nostdlib" } + description " + This option controls the global linker flags. Individual + packages may define options which override these global + flags." + } + } + + cdl_option CYGSEM_HAL_ROM_MONITOR { + display "Behave as a ROM monitor" + flavor bool + default_value 0 + parent CYGPKG_HAL_ROM_MONITOR + requires { CYG_HAL_STARTUP == "ROM"} + description " + Enable this option if this program is to be used as a + ROM monitor, i.e. applications will be loaded into RAM on + the board, and this ROM monitor may process exceptions or + interrupts generated from the application. This enables + features such as utilizing a separate interrupt stack when + exceptions are generated." + } + + cdl_option CYGSEM_HAL_USE_ROM_MONITOR { + display "Work with a ROM monitor" + flavor booldata + legal_values { "Generic" "GDB_stubs" } + default_value { CYG_HAL_STARTUP == "RAM" ? "GDB_stubs" : 0 } + parent CYGPKG_HAL_ROM_MONITOR + requires { CYG_HAL_STARTUP == "RAM" } + description " + Support can be enabled for different varieties of ROM + monitor. This support changes various eCos semantics such + as the encoding of diagnostic output, or the overriding of + hardware interrupt vectors. + Firstly there is \"Generic\" support which prevents the + HAL from overriding the hardware vectors that it does not + use, to instead allow an installed ROM monitor to handle + them. This is the most basic support which is likely to be + common to most implementations of ROM monitor. + \"GDB_stubs\" provides support when GDB stubs are included + in the ROM monitor or boot ROM." + } + + cdl_component CYGPKG_REDBOOT_HAL_OPTIONS { + display "Redboot HAL options" + flavor none + no_define + parent CYGPKG_REDBOOT + active_if CYGPKG_REDBOOT + description " + This option lists the target's requirements for a valid + Redboot configuration." + + cdl_option CYGBLD_BUILD_REDBOOT_BIN { + display "Build Redboot ROM binary image" + active_if CYGBLD_BUILD_REDBOOT + requires { !CYGBLD_BUILD_REDBOOT_WITH_EXEC } + default_value 1 + no_define + description " + This option enables the conversion of the Redboot ELF + image to a binary image suitable for ROM programming." + + compile -library=libextras.a redboot_cmds.c + + make -priority 325 { + <PREFIX>/bin/redboot.bin : <PREFIX>/bin/redboot.elf + $(OBJCOPY) --strip-debug $< $(@:.bin=.img) + $(OBJCOPY) -O srec $< $(@:.bin=.srec) + $(OBJCOPY) -O ihex $< $(@:.bin=.hex) + $(OBJCOPY) -O binary $< $@ + } + + } + } + + cdl_component CYGHWR_MEMORY_LAYOUT { + display "Memory layout" + flavor data + no_define + calculated { (CYG_HAL_STARTUP == "RAM") ? "arm_lpc2xxx_olpce2294_ram" : + "arm_lpc2xxx_olpce2294_rom" } + + cdl_option CYGHWR_MEMORY_LAYOUT_LDI { + display "Memory layout linker script fragment" + flavor data + no_define + define -file system.h CYGHWR_MEMORY_LAYOUT_LDI + calculated { (CYG_HAL_STARTUP == "RAM") ? + "<pkgconf/mlt_arm_lpc2xxx_olpce2294_ram.ldi>" : + "<pkgconf/mlt_arm_lpc2xxx_olpce2294_rom.ldi>" } + } + + cdl_option CYGHWR_MEMORY_LAYOUT_H { + display "Memory layout header file" + flavor data + no_define + define -file system.h CYGHWR_MEMORY_LAYOUT_H + calculated { (CYG_HAL_STARTUP == "RAM") ? + "<pkgconf/mlt_arm_lpc2xxx_olpce2294_ram.h>" : + "<pkgconf/mlt_arm_lpc2xxx_olpce2294_rom.h>" } + } + } +} +
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/lpc2xxx/olpce2294/current/include/hal_platform_setup.h @@ -0,0 +1,230 @@ +#ifndef CYGONCE_HAL_PLATFORM_SETUP_H +#define CYGONCE_HAL_PLATFORM_SETUP_H +/*============================================================================= +// +// hal_platform_setup.h +// +// Platform specific support for HAL (assembly code) +// +//============================================================================= +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// Copyright (C) 2008 eCosCentric Limited +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): Sergei Gavrikov +// Contributors: Sergei Gavrikov +// Date: 2008-08-31 +// Purpose: Olimex LPC-E2294 platform specific support routines +// Description: +// Usage: #include <cyg/hal/hal_platform_setup.h> +// +//####DESCRIPTIONEND#### +// +//===========================================================================*/ + +#include <pkgconf/system.h> +#include <cyg/hal/var_io.h> + + // There are no diagnostic leds on the board, but there is a LCD there + // with BACKLIGHT feature. No way to display some info on LCD here, but + // we can drive by BACKLIGHT put to a cathode a static signal. + + .macro _led_init + ldr r0,=CYGARC_HAL_LPC2XXX_REG_IO_BASE + ldr r1,[r0,#CYGARC_HAL_LPC2XXX_REG_IO0DIR] + orr r1,r1,#(1<<10) + str r1,[r0,#CYGARC_HAL_LPC2XXX_REG_IO0DIR] + + .endm // _led_init + + .macro _led x + ldr r0,=CYGARC_HAL_LPC2XXX_REG_IO_BASE + ldr r1,=(1<<10) + str r1,[r0,#CYGARC_HAL_LPC2XXX_REG_IO0CLR] + ldr r1,=((\x & 1)<<10) + str r1,[r0,#CYGARC_HAL_LPC2XXX_REG_IO0SET] + + .endm // _led + + .macro _pll_init + ldr r0,=CYGARC_HAL_LPC2XXX_REG_SCB_BASE + + mov r2,#0xAA + mov r3,#0x55 + + // enable PLL + mov r1,#1 + str r1,[r0,#CYGARC_HAL_LPC2XXX_REG_PLLCON] + + mov r1,#(0x20 | (CYGNUM_HAL_ARM_LPC2XXX_PLL_MUL - 1)) + str r1,[r0,#CYGARC_HAL_LPC2XXX_REG_PLLCFG] + + // update PLL registers + str r2,[r0,#CYGARC_HAL_LPC2XXX_REG_PLLFEED] + str r3,[r0,#CYGARC_HAL_LPC2XXX_REG_PLLFEED] + + // wait for it to lock +1: + ldr r1,[r0,#CYGARC_HAL_LPC2XXX_REG_PLLSTAT] + ands r1,r1,#(1<<10) + beq 1b + + // connect PLL + mov r1,#3 + str r1,[r0,#CYGARC_HAL_LPC2XXX_REG_PLLCON] + + // update PLL registers + str r2,[r0,#CYGARC_HAL_LPC2XXX_REG_PLLFEED] + str r3,[r0,#CYGARC_HAL_LPC2XXX_REG_PLLFEED] + + .endm // _pll_init + + .macro _mem_init + // copy first 64 bytes from ROM to on-chip RAM + mov r0,#0 + mov r1,#0x40000000 + mov r2,#0x40 +1: + ldr r3,[r0,#4]! + str r3,[r1,#4]! + cmps r0,r2 + bne 1b + + ldr r0,=CYGARC_HAL_LPC2XXX_REG_SCB_BASE + mov r1,#2 // interrupt vector table is mapped to RAM + str r1, [r0,#CYGARC_HAL_LPC2XXX_REG_MEMMAP] + + // flash timings + mov r1,#4 + str r1,[r0,#CYGARC_HAL_LPC2XXX_REG_MAMTIM] + mov r1,#2 // 2, full MAM + str r1,[r0,#CYGARC_HAL_LPC2XXX_REG_MAMCR] + + // External memory interface depends on the bank width (32, 16 or 8 bit + // selected via MW bits in corresponding BCFG register). Furthermore, + // choice of the memory chip(s) will require an adequate setup of RBLE + // bit in BCFG register, too. RBLE = 0 in case of 8-bit based external + // memories, while memory chips capable of accepting 16 or 32 bit wide + // data will work with RBLE = 1. + // + // BANK0: 4M FLASH + // TE28F320C3BD70 (1024Kx32 x 1, 70nS) + ldr r0,=CYGARC_HAL_LPC2XXX_REG_BCFG0 + ldr r1,= (0x3 << 0) /* IDCY=3, idle timing */\ + | (0x4 << 5) /* WST1=4, read timing */\ + | (0x1 << 10) /* RBLE=1 */\ + | (0x6 << 11) /* WST2=6, write timing */\ + | (0x1 << 28) /* MW=1, 16-bits */ + str r1,[r0] + + // BANK1: 1M RAM + // K6R4016V1D (512Kx16 x 2, 10nS) + ldr r0,=CYGARC_HAL_LPC2XXX_REG_BCFG1 + // Warning: changed these timings, you can fall dramatically the eCos + // kernel performance. Check it then using the eCos 'tm_basic' test. + ldr r1,= (0x0 << 0) /* IDCY=0, idle cycles */\ + | (0x0 << 5) /* WST1=0, read timing */\ + | (0x1 << 10) /* RBLE=1 */\ + | (0x0 << 11) /* WST2=0, write timing */\ + | (0x2 << 28) /* MW=2, 32-bits */ + str r1,[r0] + + // BANK2: Ethernet + // CS8900A (8-bit, no interrupt driven mode) + ldr r0,=CYGARC_HAL_LPC2XXX_REG_BCFG2 + ldr r1,= (0x1 << 0) /* IDCY=1, idle cycles */\ + | (0x8 << 5) /* WST1=8, read timing */\ + | (0x1 << 10) /* RBLE=1 */\ + | (0x6 << 11) /* WST2=6, write timing */\ + | (0x0 << 28) /* MW=0, 8-bits */ + str r1,[r0] + + .endm // _mem_init + + .macro _gpio_init + ldr r0,=CYGARC_HAL_LPC2XXX_REG_PIN_BASE + + // Configure P0.15:0 as PIO, but UART0, UART1, EINT2 ('B1' button) + ldr r1,= (0x1 << 0) /* P0.0 as TxD0 */\ + | (0x1 << 2) /* P0.1 as RxD0 */\ + | (0x1 << 16) /* P0.1 as TxD1 */\ + | (0x1 << 18) /* P0.1 as RxD1 */\ + | (0x2 << 30) /* P0.15 as EINT2 */ + str r1,[r0,#CYGARC_HAL_LPC2XXX_REG_PINSEL0] + + // Configure P0.30:16 as PIO, but EINT0 ('B2' button) + ldr r1,= (0x1 << 0) /* P0.16 as EINT0 */ + str r1,[r0,#CYGARC_HAL_LPC2XXX_REG_PINSEL1] + + // GPIO P1.25:16, P3.24 are used as PIO + ldr r1,= (0x1 << 2) /* P1.36:26 Debug port */\ + | (0x2 << 4) /* D31:0,CS0,OE,BLS0-3 */\ + | (0x1 << 8) /* WE enabled */\ + | (0x1 << 11) /* CS1 enabled */\ + | (0x1 << 14) /* CS2 enabled */\ + | (0x1 << 23) /* A0 enabled */\ + | (0x1 << 24) /* A1 enabled */\ + | (0x7 << 25) /* A23:2 enabled */ + str r1,[r0,#CYGARC_HAL_LPC2XXX_REG_PINSEL2] + + .endm // _gpio_init + +#define CYGHWR_LED_MACRO _led \x + +#if defined(CYG_HAL_STARTUP_ROM) + + .macro _setup + + _pll_init + + _mem_init + + _gpio_init + + _led_init + + .endm + +#define CYGSEM_HAL_ROM_RESET_USES_JUMP + +#else + + .macro _setup + + .endm + +#endif // CYG_HAL_STARTUP_ROM + +#define PLATFORM_SETUP1 _setup + +#endif // CYGONCE_HAL_PLATFORM_SETUP_H +
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/lpc2xxx/olpce2294/current/include/pkgconf/mlt_arm_lpc2xxx_olpce2294_ram.h @@ -0,0 +1,19 @@ +#ifndef __ASSEMBLER__ +#include <cyg/infra/cyg_type.h> +#include <stddef.h> + +#endif + +#define CYGMEM_REGION_ram (0x81000000) +#define CYGMEM_REGION_ram_SIZE (0x00100000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) + +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__heap1) []; + +#endif + +#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1)) + +#define CYGMEM_SECTION_heap1_SIZE (0x81100000 - (size_t) CYG_LABEL_NAME (__heap1)) +
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/lpc2xxx/olpce2294/current/include/pkgconf/mlt_arm_lpc2xxx_olpce2294_ram.ldi @@ -0,0 +1,25 @@ +#include <cyg/infra/cyg_type.inc> + +MEMORY +{ + ram0 : ORIGIN = 0x40000000, LENGTH = 0x4000 + ram : ORIGIN = 0x81000000, LENGTH = 0x100000 +} + +SECTIONS +{ + SECTIONS_BEGIN + SECTION_fixed_vectors (ram0, 0x40000020, LMA_EQ_VMA) + SECTION_rom_vectors (ram, 0x81010000, LMA_EQ_VMA) + SECTION_text (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fini (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_rodata (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_rodata1 (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fixup (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_gcc_except_table (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_data (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA) + CYG_LABEL_DEFN(__heap1) = ALIGN (0x8); + SECTIONS_END +} +
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/lpc2xxx/olpce2294/current/include/pkgconf/mlt_arm_lpc2xxx_olpce2294_rom.h @@ -0,0 +1,22 @@ +#ifndef __ASSEMBLER__ +#include <cyg/infra/cyg_type.h> +#include <stddef.h> + +#endif + +#define CYGMEM_REGION_rom (0x00000000) +#define CYGMEM_REGION_rom_SIZE (0x00040000) +#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R) +#define CYGMEM_REGION_ram (0x81000000) +#define CYGMEM_REGION_ram_SIZE (0x00100000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) + +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__heap1) []; + +#endif + +#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1)) + +#define CYGMEM_SECTION_heap1_SIZE (0x81100000 - (size_t) CYG_LABEL_NAME (__heap1)) +
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/lpc2xxx/olpce2294/current/include/pkgconf/mlt_arm_lpc2xxx_olpce2294_rom.ldi @@ -0,0 +1,26 @@ +#include <cyg/infra/cyg_type.inc> + +MEMORY +{ + ram0 : ORIGIN = 0x40000000, LENGTH = 0x4000 + ram : ORIGIN = 0x81000000, LENGTH = 0x100000 + rom : ORIGIN = 0x00000000, LENGTH = 0x40000 +} + +SECTIONS +{ + SECTIONS_BEGIN + SECTION_rom_vectors (rom, 0x00000000, LMA_EQ_VMA) + SECTION_text (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fini (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_rodata (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_rodata1 (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fixup (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_gcc_except_table (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fixed_vectors (ram0, 0x40000020, LMA_EQ_VMA) + SECTION_data (ram, 0x81000000, FOLLOWING (.gcc_except_table)) + SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA) + CYG_LABEL_DEFN(__heap1) = ALIGN (0x8); + SECTIONS_END +} +
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/lpc2xxx/olpce2294/current/include/plf_io.h @@ -0,0 +1,88 @@ +#ifndef CYGONCE_HAL_PLF_IO_H +#define CYGONCE_HAL_PLF_IO_H +//============================================================================= +// +// plf_io.h +// +// Olimex LPC-E2294 board specific registers +// +//============================================================================= +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// Copyright (C) 2008 eCosCentric Limited +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): Sergei Gavrikov +// Contributors: Sergei Gavrikov +// Date: 2008-08-31 +// Purpose: Olimex LPC-E2294 board specific registers +// Description: +// Usage: #include <cyg/hal/plf_io.h> +// +//####DESCRIPTIONEND#### +// +//============================================================================= +// On-chip device base addresses + +#ifndef __ASSEMBLER__ +extern void hal_plf_hardware_init(void); +#define HAL_PLF_HARDWARE_INIT() \ + hal_plf_hardware_init() + +#define IO0PIN (*(volatile unsigned int *)0xE0028000) +#define IO0SET (*(volatile unsigned int *)0xE0028004) +#define IO0DIR (*(volatile unsigned int *)0xE0028008) +#define IO0CLR (*(volatile unsigned int *)0xE002800C) + +#define IO1PIN (*(volatile unsigned int *)0xE0028010) +#define IO1SET (*(volatile unsigned int *)0xE0028014) +#define IO1DIR (*(volatile unsigned int *)0xE0028018) +#define IO1CLR (*(volatile unsigned int *)0xE002801C) + +#define IO2PIN (*(volatile unsigned int *)0xE0028020) +#define IO2SET (*(volatile unsigned int *)0xE0028024) +#define IO2DIR (*(volatile unsigned int *)0xE0028028) +#define IO2CLR (*(volatile unsigned int *)0xE002802C) + +#define IO3PIN (*(volatile unsigned int *)0xE0028030) +#define IO3SET (*(volatile unsigned int *)0xE0028034) +#define IO3DIR (*(volatile unsigned int *)0xE0028038) +#define IO3CLR (*(volatile unsigned int *)0xE002803C) + +#define PINSEL0 (*(volatile unsigned int *)0xE002C00) +#define PINSEL1 (*(volatile unsigned int *)0xE002C04) + +#endif // __ASSEMBLER__ + +//----------------------------------------------------------------------------- +// end of plf_io.h +#endif // CYGONCE_HAL_PLF_IO_H +
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/lpc2xxx/olpce2294/current/misc/redboot_RAM.ecm @@ -0,0 +1,112 @@ +cdl_savefile_version 1; +cdl_savefile_command cdl_savefile_version {}; +cdl_savefile_command cdl_savefile_command {}; +cdl_savefile_command cdl_configuration { description hardware template package }; +cdl_savefile_command cdl_package { value_source user_value wizard_value inferred_value }; +cdl_savefile_command cdl_component { value_source user_value wizard_value inferred_value }; +cdl_savefile_command cdl_option { value_source user_value wizard_value inferred_value }; +cdl_savefile_command cdl_interface { value_source user_value wizard_value inferred_value }; + +cdl_configuration eCos { + description "" ; + hardware olpce2294 ; + template redboot ; + package -hardware CYGPKG_HAL_ARM current ; + package -hardware CYGPKG_HAL_ARM_LPC2XXX current ; + package -hardware CYGPKG_HAL_ARM_LPC2XXX_OLPCE2294 current ; + package -hardware CYGPKG_DEVS_FLASH_INTEL_28FXXX current ; + package -hardware CYGPKG_DEVS_FLASH_ARM_OLPCX2294 current ; + package -hardware CYGPKG_DEVS_ETH_CL_CS8900A current ; + package -hardware CYGPKG_DEVS_ETH_ARM_OLPCE2294 current ; + package -hardware CYGPKG_IO_SERIAL_GENERIC_16X5X current ; + package -hardware CYGPKG_IO_SERIAL_ARM_LPC2XXX current ; + package -hardware CYGPKG_DEVICES_WATCHDOG_ARM_LPC2XXX current ; + package -template CYGPKG_HAL current ; + package -template CYGPKG_INFRA current ; + package -template CYGPKG_REDBOOT current ; + package -template CYGPKG_ISOINFRA current ; + package -template CYGPKG_LIBC_STRING current ; + package -template CYGPKG_CRC current ; + package CYGPKG_IO_FLASH current ; + package CYGPKG_IO_ETH_DRIVERS current ; + package CYGPKG_NS_DNS current ; + package CYGPKG_COMPRESS_ZLIB current ; +}; + +cdl_option CYGFUN_LIBC_STRING_BSD_FUNCS { + inferred_value 0 +}; + +cdl_option CYGIMP_DEVS_ETH_CL_CS8900A_DATABUS_8BIT { + inferred_value 1 +}; + +cdl_option CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK { + inferred_value 0 +}; + +cdl_option CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE { + user_value 4096 +}; + +cdl_option CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT { + user_value 0 +}; + +cdl_option CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM { + inferred_value 0 +}; + +cdl_option CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS { + inferred_value 1 +}; + +cdl_option CYGSEM_HAL_USE_ROM_MONITOR { + inferred_value 0 0 +}; + +cdl_component CYGHWR_HAL_ARM_LPC2XXX { + inferred_value LPC2294 +}; + +cdl_component CYGBLD_BUILD_REDBOOT { + user_value 1 +}; + +cdl_option CYGBLD_BUILD_REDBOOT_WITH_EXEC { + inferred_value 0 +}; + +cdl_option CYGBLD_ISO_STRTOK_R_HEADER { + inferred_value 1 <cyg/libc/string/string.h> +}; + +cdl_option CYGBLD_ISO_STRING_LOCALE_FUNCS_HEADER { + inferred_value 1 <cyg/libc/string/string.h> +}; + +cdl_option CYGBLD_ISO_STRING_BSD_FUNCS_HEADER { + inferred_value 1 <cyg/libc/string/bsdstring.h> +}; + +cdl_option CYGBLD_ISO_STRING_MEMFUNCS_HEADER { + inferred_value 1 <cyg/libc/string/string.h> +}; + +cdl_option CYGBLD_ISO_STRING_STRFUNCS_HEADER { + inferred_value 1 <cyg/libc/string/string.h> +}; + +cdl_option CYGBLD_ISO_DNS_HEADER { + inferred_value 1 <cyg/ns/dns/dns.h> +}; + +cdl_option CYGHWR_DEVS_FLASH_INTEL_28F320C3 { + inferred_value 1 +}; + +cdl_option CYGPKG_NS_DNS_BUILD { + inferred_value 0 +}; + +
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/lpc2xxx/olpce2294/current/misc/redboot_ROM.ecm @@ -0,0 +1,120 @@ +cdl_savefile_version 1; +cdl_savefile_command cdl_savefile_version {}; +cdl_savefile_command cdl_savefile_command {}; +cdl_savefile_command cdl_configuration { description hardware template package }; +cdl_savefile_command cdl_package { value_source user_value wizard_value inferred_value }; +cdl_savefile_command cdl_component { value_source user_value wizard_value inferred_value }; +cdl_savefile_command cdl_option { value_source user_value wizard_value inferred_value }; +cdl_savefile_command cdl_interface { value_source user_value wizard_value inferred_value }; + +cdl_configuration eCos { + description "" ; + hardware olpce2294 ; + template redboot ; + package -hardware CYGPKG_HAL_ARM current ; + package -hardware CYGPKG_HAL_ARM_LPC2XXX current ; + package -hardware CYGPKG_HAL_ARM_LPC2XXX_OLPCE2294 current ; + package -hardware CYGPKG_DEVS_FLASH_INTEL_28FXXX current ; + package -hardware CYGPKG_DEVS_FLASH_ARM_OLPCX2294 current ; + package -hardware CYGPKG_DEVS_ETH_CL_CS8900A current ; + package -hardware CYGPKG_DEVS_ETH_ARM_OLPCE2294 current ; + package -hardware CYGPKG_IO_SERIAL_GENERIC_16X5X current ; + package -hardware CYGPKG_IO_SERIAL_ARM_LPC2XXX current ; + package -hardware CYGPKG_DEVICES_WATCHDOG_ARM_LPC2XXX current ; + package -template CYGPKG_HAL current ; + package -template CYGPKG_INFRA current ; + package -template CYGPKG_REDBOOT current ; + package -template CYGPKG_ISOINFRA current ; + package -template CYGPKG_LIBC_STRING current ; + package -template CYGPKG_CRC current ; + package CYGPKG_IO_FLASH current ; + package CYGPKG_IO_ETH_DRIVERS current ; + package CYGPKG_NS_DNS current ; + package CYGPKG_COMPRESS_ZLIB current ; +}; + +cdl_option CYGFUN_LIBC_STRING_BSD_FUNCS { + inferred_value 0 +}; + +cdl_option CYGIMP_DEVS_ETH_CL_CS8900A_DATABUS_8BIT { + inferred_value 1 +}; + +cdl_option CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK { + inferred_value 0 +}; + +cdl_option CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE { + user_value 4096 +}; + +cdl_option CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT { + user_value 0 +}; + +cdl_option CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM { + inferred_value 0 +}; + +cdl_option CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS { + inferred_value 1 +}; + +cdl_option CYGSEM_HAL_ROM_MONITOR { + inferred_value 1 +}; + +cdl_option CYGSEM_HAL_USE_ROM_MONITOR { + inferred_value 0 0 +}; + +cdl_component CYGHWR_HAL_ARM_LPC2XXX { + inferred_value LPC2294 +}; + +cdl_component CYG_HAL_STARTUP { + inferred_value ROM +}; + +cdl_component CYGBLD_BUILD_REDBOOT { + user_value 1 +}; + +cdl_option CYGBLD_BUILD_REDBOOT_WITH_EXEC { + inferred_value 0 +}; + +cdl_option CYGBLD_ISO_STRTOK_R_HEADER { + inferred_value 1 <cyg/libc/string/string.h> +}; + +cdl_option CYGBLD_ISO_STRING_LOCALE_FUNCS_HEADER { + inferred_value 1 <cyg/libc/string/string.h> +}; + +cdl_option CYGBLD_ISO_STRING_BSD_FUNCS_HEADER { + inferred_value 1 <cyg/libc/string/bsdstring.h> +}; + +cdl_option CYGBLD_ISO_STRING_MEMFUNCS_HEADER { + inferred_value 1 <cyg/libc/string/string.h> +}; + +cdl_option CYGBLD_ISO_STRING_STRFUNCS_HEADER { + inferred_value 1 <cyg/libc/string/string.h> +}; + +cdl_option CYGBLD_ISO_DNS_HEADER { + inferred_value 1 <cyg/ns/dns/dns.h> +}; + +cdl_option CYGHWR_DEVS_FLASH_INTEL_28F320C3 { + inferred_value 1 +}; + +cdl_option CYGPKG_NS_DNS_BUILD { + inferred_value 0 +}; + +
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/lpc2xxx/olpce2294/current/misc/redboot_ROM_minimal.ecm @@ -0,0 +1,100 @@ +cdl_savefile_version 1; +cdl_savefile_command cdl_savefile_version {}; +cdl_savefile_command cdl_savefile_command {}; +cdl_savefile_command cdl_configuration { description hardware template package }; +cdl_savefile_command cdl_package { value_source user_value wizard_value inferred_value }; +cdl_savefile_command cdl_component { value_source user_value wizard_value inferred_value }; +cdl_savefile_command cdl_option { value_source user_value wizard_value inferred_value }; +cdl_savefile_command cdl_interface { value_source user_value wizard_value inferred_value }; + +cdl_configuration eCos { + description "" ; + hardware olpce2294 ; + template redboot ; + package -hardware CYGPKG_HAL_ARM current ; + package -hardware CYGPKG_HAL_ARM_LPC2XXX current ; + package -hardware CYGPKG_HAL_ARM_LPC2XXX_OLPCE2294 current ; + package -hardware CYGPKG_DEVS_FLASH_INTEL_28FXXX current ; + package -hardware CYGPKG_DEVS_FLASH_ARM_OLPCX2294 current ; + package -hardware CYGPKG_DEVS_ETH_CL_CS8900A current ; + package -hardware CYGPKG_DEVS_ETH_ARM_OLPCE2294 current ; + package -hardware CYGPKG_IO_SERIAL_GENERIC_16X5X current ; + package -hardware CYGPKG_IO_SERIAL_ARM_LPC2XXX current ; + package -hardware CYGPKG_DEVICES_WATCHDOG_ARM_LPC2XXX current ; + package -template CYGPKG_HAL current ; + package -template CYGPKG_INFRA current ; + package -template CYGPKG_REDBOOT current ; + package -template CYGPKG_ISOINFRA current ; + package -template CYGPKG_LIBC_STRING current ; + package -template CYGPKG_CRC current ; +}; + +cdl_option CYGFUN_LIBC_STRING_BSD_FUNCS { + inferred_value 0 +}; + +cdl_option CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK { + inferred_value 0 +}; + +cdl_option CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE { + user_value 4096 +}; + +cdl_option CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT { + user_value 0 +}; + +cdl_option CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM { + inferred_value 0 +}; + +cdl_option CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS { + inferred_value 1 +}; + +cdl_option CYGSEM_HAL_ROM_MONITOR { + inferred_value 1 +}; + +cdl_option CYGSEM_HAL_USE_ROM_MONITOR { + inferred_value 0 0 +}; + +cdl_component CYGHWR_HAL_ARM_LPC2XXX { + inferred_value LPC2294 +}; + +cdl_component CYG_HAL_STARTUP { + inferred_value ROM +}; + +cdl_component CYGBLD_BUILD_REDBOOT { + user_value 1 +}; + +cdl_option CYGBLD_BUILD_REDBOOT_WITH_EXEC { + inferred_value 0 +}; + +cdl_option CYGBLD_ISO_STRTOK_R_HEADER { + inferred_value 1 <cyg/libc/string/string.h> +}; + +cdl_option CYGBLD_ISO_STRING_LOCALE_FUNCS_HEADER { + inferred_value 1 <cyg/libc/string/string.h> +}; + +cdl_option CYGBLD_ISO_STRING_BSD_FUNCS_HEADER { + inferred_value 1 <cyg/libc/string/bsdstring.h> +}; + +cdl_option CYGBLD_ISO_STRING_MEMFUNCS_HEADER { + inferred_value 1 <cyg/libc/string/string.h> +}; + +cdl_option CYGBLD_ISO_STRING_STRFUNCS_HEADER { + inferred_value 1 <cyg/libc/string/string.h> +}; + +
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/lpc2xxx/olpce2294/current/src/olpce2294_misc.c @@ -0,0 +1,561 @@ +//========================================================================== +// +// olpce2294_misc.c +// +// HAL misc board support code for Olimex LPC-E2294 development board +// +//========================================================================== +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// Copyright (C) 2008 eCosCentric Limited +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): Sergei Gavrikov +// Contributors: Sergei Gavrikov +// Date: 2008-08-31 +// Purpose: HAL board support +// Description: Implementations of HAL board interfaces +// +//####DESCRIPTIONEND#### +// +//========================================================================*/ + +#include <pkgconf/hal.h> +#include <cyg/hal/hal_io.h> // IO macros +#include <cyg/infra/cyg_type.h> // base types + +#include <cyg/hal/var_io.h> +#include <cyg/hal/plf_io.h> + +#include <cyg/hal/hal_intr.h> // Interrupt macros +#include <cyg/hal/hal_arch.h> // SAVE/RESTORE GP +#include <cyg/hal/hal_if.h> +#include <cyg/hal/hal_diag.h> // HAL_DELAY_US + +extern void cyg_hal_plf_serial_init (void); + +static void cyg_hal_plf_lcd_init (void); + +// There are no diagnostic leds on the board, but there is a LCD there with a +// BACKLIGHT feature. So, we can drive by BACKLIGHT put on a cathode a static +// signal. + +inline static void +_fake_led (bool state) +{ + HAL_WRITE_UINT32 (CYGARC_HAL_LPC2XXX_REG_IO_BASE + + CYGARC_HAL_LPC2XXX_REG_IO0CLR, (1 << 10)); + if (state) { + HAL_WRITE_UINT32 (CYGARC_HAL_LPC2XXX_REG_IO_BASE + + CYGARC_HAL_LPC2XXX_REG_IO0SET, (1 << 10)); + } +} + +//-------------------------------------------------------------------------- +// hal_lpc2xxx_set_leds -- +// +void +hal_lpc2xxx_set_leds (int mask) +{ + _fake_led (mask & 1); +} + +//-------------------------------------------------------------------------- +// cyg_hal_plf_comms_init -- +// +void +cyg_hal_plf_comms_init (void) +{ + static int initialized = 0; + + if (initialized) + return; + initialized = 1; + + cyg_hal_plf_serial_init (); + cyg_hal_plf_lcd_init (); +} + +//-------------------------------------------------------------------------- +// LCD driver (It is based on powerpc/cogent code) +// +// Olimex LPC-E2294 development board has a LCD 16x2 display (GDM1602K) with +// a built-in controller (KS0066U). The controller is the Hitachi HD44780 +// compliant chip. Note: the LCD is driven in a 4-bit mode. +//-------------------------------------------------------------------------- + +#define LCD_BASE (void *)NULL + +#define LCD_DATA 0x00 // read/write lcd data +#define LCD_STAT 0x08 // read lcd busy status +#define LCD_CMD 0x08 // write lcd command + +// status register bit definitions +#define LCD_STAT_BUSY 0x80 // 1 = display busy +#define LCD_STAT_ADD 0x7F // bits 0-6 return current display address + +// command register definitions +#define LCD_CMD_RST 0x01 // clear entire display and reset display address +#define LCD_CMD_HOME 0x02 // reset display address and reset any shifting +#define LCD_CMD_ECL 0x04 // move cursor left one position on next write +#define LCD_CMD_ESL 0x05 // shift display left one position on next write +#define LCD_CMD_ECR 0x06 // move cursor right one position on next write +#define LCD_CMD_ESR 0x07 // shift display right one position on next write +#define LCD_CMD_DOFF 0x08 // display off, cursor off, blinking off +#define LCD_CMD_BL 0x09 // blink character at current cursor position +#define LCD_CMD_CUR 0x0A // enable cursor on +#define LCD_CMD_DON 0x0C // turn display on +#define LCD_CMD_CL 0x10 // move cursor left one position +#define LCD_CMD_SL 0x14 // shift display left one position +#define LCD_CMD_CR 0x18 // move cursor right one position +#define LCD_CMD_SR 0x1C // shift display right one position +#define LCD_CMD_MODE 0x28 // sets 4 bits, 2 lines, 5x8 characters +#define LCD_CMD_ACG 0x40 // bits 0-5 sets the character generator address +#define LCD_CMD_ADD 0x80 // bits 0-6 sets the display data addr to line 1 + + +// LCD status values +#define LCD_OK 0x00 +#define LCD_ERR 0x01 + +#define LCD_LINE0 0x00 // DRAM address from 0x00 to 0x0f +#define LCD_LINE1 0x40 // DRAM address from 0x40 to 0x4f +#define LCD_LINE_LENGTH 16 + +static char lcd_line0[LCD_LINE_LENGTH + 1]; +static char lcd_line1[LCD_LINE_LENGTH + 1]; +static char *lcd_line[2] = { lcd_line0, lcd_line1 }; + +static int lcd_curline = 0; +static int lcd_linepos = 0; + +// the LCD controller <--> MPU interface +#define MPU_DB 0x000000f0 // DB7...DB4 wired to P0.7...P0.4 +#define MPU_RS 0x10000000 // RS wired to P0.28 +#define MPU_EN 0x20000000 // EN wired to P0.29 +#define MPU_RW 0x40000000 // RW wired to P0.30 +#define MPU_XX 0x700000f0 // all MPU lines + +// LCD DARKLIGHT cathode +#define DARKLIGHT 0x00000020 // P0.10 + +// Bus timing characteristics for Hitachi HD44780 compliant chips (when Vcc = +// 4.5 to 5.5 V): +// tcycE - enable cycle time, min 500 ns +// tPWEH - enable pulse width (high level), min 230 ns +// tAS - address setup time (RS, R/W to E), min 40 ns +// tAH - address hold time, min 10 ns +// tDDR - data delay time (read operations), max 160 ns +// tDSW - data setup time (write operations), min 80 ns + +#define LCD_DELAY_US(_us_) HAL_DELAY_US (_us_) + +// It should overrite the data delay time, i.e. be grater than 160 ns. +// WARNING: be careful with the delay value, more shorter delay would +// occur a dead loop when the BF (busy flag) is checked. +#define LCD_NANO_DELAY() \ + CYG_MACRO_START \ + int i; \ + for (i = 0; i < 1; i++); \ + CYG_MACRO_END + +// It should overwrite the tPWEH (enable pulse width) +#define LCD_MICRO_DELAY() \ + CYG_MACRO_START \ + int i; \ + for (i = 0; i < 3; i++); \ + CYG_MACRO_END + +// Set RS, R/W to read data +#define LCD_RS_READ_DATA() \ + CYG_MACRO_START \ + IO0SET |= MPU_RW; \ + IO0SET |= MPU_RS; \ + CYG_MACRO_END + +// Set RS, R/W to read a busy flag and address counter +#define LCD_RS_READ_STAT() \ + CYG_MACRO_START \ + IO0SET |= MPU_RW; \ + IO0CLR |= MPU_RS; \ + CYG_MACRO_END + +// Set RS, R/W to write data +#define LCD_RS_WRITE_DATA() \ + CYG_MACRO_START \ + IO0CLR |= MPU_RW; \ + IO0SET |= MPU_RS; \ + CYG_MACRO_END + +// Set RS, R/W to write an instruction +#define LCD_RS_WRITE_CMD() \ + CYG_MACRO_START \ + IO0CLR |= MPU_RW; \ + IO0CLR |= MPU_RS; \ + CYG_MACRO_END + +#define LCD_ENABLE_HIGH() \ + IO0SET |= MPU_EN; + +#define LCD_ENABLE_LOW() \ + IO0CLR |= MPU_EN; + +// High-level enable pulse +#define LCD_ENABLE_PULSE() \ + CYG_MACRO_START \ + LCD_ENABLE_HIGH (); \ + LCD_MICRO_DELAY (); \ + LCD_ENABLE_LOW (); \ + LCD_MICRO_DELAY (); \ + CYG_MACRO_END + +// Read a nibble of data from LCD controller +#define LCD_READ_NIBBLE( _n_) \ + CYG_MACRO_START \ + IO0DIR &= ~MPU_DB; \ + _n_ = (IO0PIN & MPU_DB) >> 4; \ + _n_ &= 15; \ + CYG_MACRO_END + +// Write a nibble of data to LCD controller +#define LCD_WRITE_NIBBLE( _n_) \ + CYG_MACRO_START \ + IO0DIR |= MPU_DB; \ + IO0CLR |= MPU_DB; \ + IO0SET |= ((_n_) & 15) << 4; \ + CYG_MACRO_END + +//-------------------------------------------------------------------------- +// _lcd_read -- +// +static void +_lcd_read (int sel, cyg_uint8 * dat) +{ + cyg_uint8 n; + + if (sel == LCD_DATA) + LCD_RS_READ_DATA (); + else + LCD_RS_READ_STAT (); + + // read D7-D4 nibble + LCD_ENABLE_HIGH (); + LCD_NANO_DELAY (); + LCD_READ_NIBBLE (n); + *dat = n << 4; + LCD_MICRO_DELAY (); + LCD_ENABLE_LOW (); + LCD_MICRO_DELAY (); + + // read D3-D0 nibble + LCD_ENABLE_HIGH (); + LCD_NANO_DELAY (); + LCD_READ_NIBBLE (n); + *dat |= n; + LCD_MICRO_DELAY (); + LCD_ENABLE_LOW (); + LCD_MICRO_DELAY (); +} + +//-------------------------------------------------------------------------- +// _lcd_write -- +// +static void +_lcd_write (int sel, cyg_uint8 dat) +{ + if (sel == LCD_DATA) + LCD_RS_WRITE_DATA (); + else + LCD_RS_WRITE_CMD (); + + // write D7-D4 nibble + LCD_WRITE_NIBBLE ((dat >> 4) & 15); + LCD_ENABLE_HIGH (); + LCD_MICRO_DELAY (); + LCD_ENABLE_LOW (); + LCD_MICRO_DELAY (); + + // write D3-D0 nibble + LCD_WRITE_NIBBLE (dat & 15); + LCD_ENABLE_HIGH (); + LCD_MICRO_DELAY (); + LCD_ENABLE_LOW (); + LCD_MICRO_DELAY (); +} + +#define LCD_READ( _register_, _data_) \ + _lcd_read(_register_, &(_data_)) + +#define LCD_WRITE( _register_, _data_) \ + _lcd_write(_register_, _data_) + +#ifdef CYG_HAL_STARTUP_ROM +//-------------------------------------------------------------------------- +// _lcd_pots_init -- +// +// This routine is an early LCD intitializing on power-on event (from KS0066U +// flow diagram). +// +static void +_lcd_pots_init (void) +{ + + // around power on + IO0DIR |= MPU_XX; + IO0CLR |= MPU_XX; + + // wait for more than 30 ms after Vdd rises to 4.5 V + LCD_DELAY_US (32000); + + // at first, point on a using of 4-bit mode + LCD_WRITE_NIBBLE (2); + LCD_ENABLE_PULSE (); + + LCD_WRITE_NIBBLE (2); + LCD_ENABLE_PULSE (); + LCD_WRITE_NIBBLE (8); + LCD_ENABLE_PULSE (); + + // wait for more than 39 us + LCD_DELAY_US (40); + + // BF (busy flag) can be checked +} +#endif + +// The portion of a code below is a bit adopted the LCD driver code for a +// PowerPC Cogent board. + +static void lcd_dis (int add, char *s, cyg_uint8 * base); + +//-------------------------------------------------------------------------- +// init_lcd_channel -- +// +static void +init_lcd_channel (cyg_uint8 * base) +{ + cyg_uint8 stat; + int i; + +#ifdef CYG_HAL_STARTUP_ROM + _lcd_pots_init (); +#endif + + // Wait for not busy + do { + LCD_READ (LCD_STAT, stat); + } while (stat & LCD_STAT_BUSY); + + // Configure the LCD for 4 bits/char, 2 lines and 5x8 dot matrix + LCD_WRITE (LCD_CMD, LCD_CMD_MODE); + + // Wait for not busy + do { + LCD_READ (LCD_STAT, stat); + } while (stat & LCD_STAT_BUSY); + + // Turn the LCD display on + LCD_WRITE (LCD_CMD, LCD_CMD_DON); + + lcd_curline = 0; + lcd_linepos = 0; + + for (i = 0; i < LCD_LINE_LENGTH; i++) + lcd_line[0][i] = lcd_line[1][i] = ' '; + + lcd_line[0][LCD_LINE_LENGTH] = lcd_line[1][LCD_LINE_LENGTH] = 0; + + lcd_dis (LCD_LINE0, lcd_line[0], base); + lcd_dis (LCD_LINE1, lcd_line[1], base); +} + +//-------------------------------------------------------------------------- +// lcd_dis -- +// +// This routine writes the string to the LCD display after setting the address +// to add. +// +static void +lcd_dis (int add, char *s, cyg_uint8 * base) +{ + cyg_uint8 stat; + int i; + + // Wait for not busy + do { + LCD_READ (LCD_STAT, stat); + } while (stat & LCD_STAT_BUSY); + + // Write the address + LCD_WRITE (LCD_CMD, (LCD_CMD_ADD + add)); + + // Write the string out to the display stopping when we reach 0 + for (i = 0; *s != '\0'; i++) { + // Wait for not busy + do { + LCD_READ (LCD_STAT, stat); + } while (stat & LCD_STAT_BUSY); + + // Write the data + LCD_WRITE (LCD_DATA, *s++); + } +} + +//-------------------------------------------------------------------------- +// cyg_hal_plf_lcd_putc -- +// +void +cyg_hal_plf_lcd_putc (void *__ch_data, cyg_uint8 c) +{ + cyg_uint8 *base = (cyg_uint8 *) __ch_data; + unsigned long __state; + int i; + + // Ignore CR + if (c == '\r') + return; + + CYGARC_HAL_SAVE_GP (); + HAL_DISABLE_INTERRUPTS (__state); + + if (c == '\n') { + lcd_dis (LCD_LINE0, &lcd_line[lcd_curline ^ 1][0], base); + lcd_dis (LCD_LINE1, &lcd_line[lcd_curline][0], base); + + // Do a line feed + lcd_curline ^= 1; + lcd_linepos = 0; + + for (i = 0; i < LCD_LINE_LENGTH; i++) + lcd_line[lcd_curline][i] = ' '; + + goto _exit_putc; + } + + // Only allow to be output if there is room on the LCD line + if (lcd_linepos < LCD_LINE_LENGTH) + lcd_line[lcd_curline][lcd_linepos++] = c; + +_exit_putc: + HAL_RESTORE_INTERRUPTS (__state); + CYGARC_HAL_RESTORE_GP (); +} + +//-------------------------------------------------------------------------- +// cyg_hal_plf_lcd_getc -- +// +cyg_uint8 +cyg_hal_plf_lcd_getc (void *__ch_data) +{ + return 0; +} + +//-------------------------------------------------------------------------- +// cyg_hal_plf_lcd_write -- +// +static void +cyg_hal_plf_lcd_write (void *__ch_data, const cyg_uint8 * __buf, + cyg_uint32 __len) +{ + CYGARC_HAL_SAVE_GP (); + + while (__len-- > 0) + cyg_hal_plf_lcd_putc (__ch_data, *__buf++); + + CYGARC_HAL_RESTORE_GP (); +} + +//-------------------------------------------------------------------------- +// cyg_hal_plf_lcd_read -- +// +static void +cyg_hal_plf_lcd_read (void *__ch_data, cyg_uint8 * __buf, cyg_uint32 __len) +{ + CYGARC_HAL_SAVE_GP (); + + while (__len-- > 0) + *__buf++ = cyg_hal_plf_lcd_getc (__ch_data); + + CYGARC_HAL_RESTORE_GP (); +} + +//-------------------------------------------------------------------------- +// cyg_hal_plf_lcd_control -- +// +static int +cyg_hal_plf_lcd_control (void *__ch_data, __comm_control_cmd_t __func, ...) +{ + return 0; +} + +//-------------------------------------------------------------------------- +// cyg_hal_plf_lcd_init -- +// +static void +cyg_hal_plf_lcd_init (void) +{ + hal_virtual_comm_table_t *comm; + int cur = + CYGACC_CALL_IF_SET_CONSOLE_COMM + (CYGNUM_CALL_IF_SET_COMM_ID_QUERY_CURRENT); + + // Init channel + init_lcd_channel ((cyg_uint8 *) NULL); + + // Setup procs in the vector table + + // Set channel 2 + CYGACC_CALL_IF_SET_CONSOLE_COMM (2); + comm = CYGACC_CALL_IF_CONSOLE_PROCS (); + CYGACC_COMM_IF_CH_DATA_SET (*comm, LCD_BASE); + CYGACC_COMM_IF_WRITE_SET (*comm, cyg_hal_plf_lcd_write); + CYGACC_COMM_IF_READ_SET (*comm, cyg_hal_plf_lcd_read); + CYGACC_COMM_IF_PUTC_SET (*comm, cyg_hal_plf_lcd_putc); + CYGACC_COMM_IF_GETC_SET (*comm, cyg_hal_plf_lcd_getc); + CYGACC_COMM_IF_CONTROL_SET (*comm, cyg_hal_plf_lcd_control); + + // Restore original console + CYGACC_CALL_IF_SET_CONSOLE_COMM (cur); +} + +#ifdef HAL_PLF_HARDWARE_INIT +//-------------------------------------------------------------------------- +// hal_plf_hardware_init -- +// +void +hal_plf_hardware_init (void) +{ + // Cyrrently, it does nothing +} +#endif // HAL_PLF_HARDWARE_INIT + +// indent: --indent-level4 -br -nut; vim: expandtab tabstop=4 shiftwidth=4 +//-------------------------------------------------------------------------- +// EOF olpce2294_misc.c
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/lpc2xxx/olpce2294/current/src/redboot_cmds.c @@ -0,0 +1,177 @@ +//========================================================================== +// +// redboot_cmds.c +// +// OLPCE2294 [platform] specific RedBoot commands +// +//========================================================================== +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// Copyright (C) 2008 eCosCentric Limited +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): Sergei Gavrikov +// Contributors: Sergei Gavrikov +// Date: 2008-08-31 +// Purpose: +// Description: +// +// This code is part of RedBoot (tm). +// +//####DESCRIPTIONEND#### +// +//========================================================================*/ + +#include <redboot.h> + +#include <cyg/hal/hal_diag.h> + +// CLI functions +local_cmd_entry ("clear", "Clean up LCD entires", "", lcd_clear, LCD_cmds); + +local_cmd_entry ("dark", "Turn LCD lighting off", "", lcd_dark, LCD_cmds); + +local_cmd_entry ("echo", + "Output the args. If -n is specified, the trailing newline is suppressed.", + "-n [arg ...]", lcd_echo, LCD_cmds); + +local_cmd_entry ("light", "Turn LCD lighting on", "", lcd_light, LCD_cmds); + +CYG_HAL_TABLE_BEGIN (__LCD_cmds_TAB__, LCD_cmds); +CYG_HAL_TABLE_END (__LCD_cmds_TAB_END__, LCD_cmds); + +extern struct cmd __LCD_cmds_TAB__[], __LCD_cmds_TAB_END__; + +static cmd_fun do_lcd; +RedBoot_nested_cmd ("lcd", + "Manage LCD display", + "{cmds}", + do_lcd, __LCD_cmds_TAB__, &__LCD_cmds_TAB_END__); + +//-------------------------------------------------------------------------- +// lcd_usage -- +// +static void +lcd_usage (char *why) +{ + diag_printf ("*** invalid 'lcd' command: %s\n", why); + cmd_usage (__LCD_cmds_TAB__, &__LCD_cmds_TAB_END__, "lcd "); +} + +//-------------------------------------------------------------------------- +// do_lcd -- +// +static void +do_lcd (int argc, char *argv[]) +{ + struct cmd *cmd; + + if (argc < 2) { + lcd_usage ("too few arguments"); + return; + } + if ((cmd = cmd_search (__LCD_cmds_TAB__, &__LCD_cmds_TAB_END__, + argv[1])) != (struct cmd *) 0) { + (cmd->fun) (argc, argv); + return; + } + lcd_usage ("unrecognized command"); +} + +//-------------------------------------------------------------------------- +// lcd_echo -- +// +static void +lcd_echo (int argc, char *argv[]) +{ + bool newline; + int cur = + CYGACC_CALL_IF_SET_CONSOLE_COMM + (CYGNUM_CALL_IF_SET_COMM_ID_QUERY_CURRENT); + CYGACC_CALL_IF_SET_CONSOLE_COMM (2); + + newline = true; + if (argc > 2) { + int i = 2; + if (strncmp (&argv[i][0], "-n", 2) == 0) { + newline = false; + i++; + } + for (; i < argc; i++) { + diag_write_string (&argv[i][0]); + if ((argc - i) > 1) + diag_write_char (' '); + } + } + if (newline) + diag_write_char ('\n'); + + CYGACC_CALL_IF_SET_CONSOLE_COMM (cur); + return; +} + +//-------------------------------------------------------------------------- +// lcd_clear -- +// +static void +lcd_clear (int argc, char *argv[]) +{ + // It clears a LCD screen. It doesn't touch a LCD controller, just a + // scrolling. + redboot_exec ("lcd", "echo", 0); + redboot_exec ("lcd", "echo", 0); + redboot_exec ("lcd", "echo", 0); + return; +} + +//-------------------------------------------------------------------------- +// lcd_dark -- +// +static void +lcd_dark (int argc, char *argv[]) +{ + hal_diag_led (0); + return; +} + +//-------------------------------------------------------------------------- +// lcd_light -- +// +static void +lcd_light (int argc, char *argv[]) +{ + hal_diag_led (1); + return; +} + +// indent: --indent-level4 -br -nut; vim: expandtab tabstop=4 shiftwidth=4 +//-------------------------------------------------------------------------- +// EOF redboot_cmds.c