--- a/packages/hal/arm/at91/var/current/ChangeLog
+++ b/packages/hal/arm/at91/var/current/ChangeLog
@@ -1,10 +1,18 @@
+2004-09-17  Andrea Michelotti <amichelotti@atmel.com>
+
+	* cdl/hal_arm_at91.cdl: 
+	* src/at91_misc.c:
+	* include/var_io.h:
+	* include/var_arch.h: added jtst target
+	
 2004-09-16  Andrea Michelotti <amichelotti@atmel.com>
 
 	* cdl/hal_arm_at91.cdl:
 	* src/at91_misc.c:
-	* include/var_io.h: Support FIQ as a high priority interrupt using the normal
-	mechanism. This is controlled by the CDL option CYGHWR_HAL_ARM_AT91_FIQ and uses the
-	interrupt number CYGHWR_HAL_ARM_AT91_FIQ which is common to all platforms using
+	* include/var_io.h: Support FIQ as a high priority interrupt using 
+	the normal mechanism. This is controlled by the CDL option 
+	CYGHWR_HAL_ARM_AT91_FIQ and uses the interrupt number 
+	CYGHWR_HAL_ARM_AT91_FIQ which is common to all platforms using
 	this HAL variant. 
 		
 2004-08-30  Thomas Koeller <thomas.koeller@baslerweb.com>

--- a/packages/hal/arm/at91/var/current/cdl/hal_arm_at91.cdl
+++ b/packages/hal/arm/at91/var/current/cdl/hal_arm_at91.cdl
@@ -78,7 +78,7 @@ cdl_package CYGPKG_HAL_ARM_AT91 {
         display        "AT91 variant used"
         flavor         data
         default_value  {"R40807"}
-        legal_values   {"R40807" "R40008" "M42800A" "M55800A" }
+        legal_values   {"R40807" "R40008" "M42800A" "M55800A" "JTST"}
         description    "The AT91 microcontroller family has several variants,
                         the main differences being the amount of on-chip SRAM,
                         peripherals and their layout. This option allows the

--- a/packages/hal/arm/at91/var/current/include/var_arch.h
+++ b/packages/hal/arm/at91/var/current/include/var_arch.h
@@ -81,8 +81,9 @@ CYG_MACRO_START                         
     HAL_WRITE_UINT32(AT91_PMC+AT91_PMC_SCDR, 1);              \
 CYG_MACRO_END
 
+#elif defined(CYGHWR_HAL_ARM_AT91_JTST) 
+// No idle action for the JTST
 #else
-
 #error Unknown AT91 variant
 
 #endif

--- a/packages/hal/arm/at91/var/current/include/var_io.h
+++ b/packages/hal/arm/at91/var/current/include/var_io.h
@@ -130,13 +130,28 @@
 #define AT91_US_BRG 0x20  // Baud rate generator
 #define AT91_US_RTO 0x24  // Receive time out
 #define AT91_US_TTG 0x28  // Transmit timer guard
+
+// PDC US registers may have different addresses in at91 targets (i.e jtst)
+#ifndef AT91_US_RPR
 #define AT91_US_RPR 0x30  // Receive pointer register
+#endif
+
+#ifndef AT91_US_RCR
 #define AT91_US_RCR 0x34  // Receive counter register
+#endif
+
+#ifndef AT91_US_TPR
 #define AT91_US_TPR 0x38  // Transmit pointer register
+#endif
+
+#ifndef AT91_US_TCR
 #define AT91_US_TCR 0x3c  // Transmit counter register
+#endif
 
+// macro could be different from target to target (i.e jtst)
+#ifndef AT91_US_BAUD
 #define AT91_US_BAUD(baud) ((CYGNUM_HAL_ARM_AT91_CLOCK_SPEED/(8*(baud))+1)/2)
-
+#endif
 //=============================================================================
 // PIO
 
@@ -610,6 +625,8 @@
 
 #endif
 
+#elif defined(CYGHWR_HAL_ARM_AT91_JTST)
+// Now power management control for the JTST
 #else
 
 #error Unknown AT91 variant

--- a/packages/hal/arm/at91/var/current/src/at91_misc.c
+++ b/packages/hal/arm/at91/var/current/src/at91_misc.c
@@ -127,10 +127,14 @@ void hal_clock_read(cyg_uint32 *pvalue)
 //
 void hal_delay_us(cyg_int32 usecs)
 {
-    CYG_ADDRESS timer = AT91_TC+AT91_TC_TC2;
     cyg_uint32 stat;
     cyg_uint64 ticks;
-
+#if defined(CYGHWR_HAL_ARM_AT91_JTST)
+    // TC2 is reserved for AD/DA. Use TC1 instead. 
+    CYG_ADDRESS timer = AT91_TC+AT91_TC_TC1;
+#else
+    CYG_ADDRESS timer = AT91_TC+AT91_TC_TC2;
+#endif
     // Calculate how many timer ticks the required number of
     // microseconds equate to. We do this calculation in 64 bit
     // arithmetic to avoid overflow.