Mercurial > ecos-v3_0-branch
changeset 2152:a98455a6572f
* include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_S29GL128N]:
* cdl/flash_amd_am29xxxxx.cdl: Add AMD/SPANSION S29GL128N part.
* include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_S29GL256N]:
* cdl/flash_amd_am29xxxxx.cdl: Add AMD/SPANSION S29GL256N part.
* include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_S29GL512N]:
* cdl/flash_amd_am29xxxxx.cdl: Add AMD/SPANSION S29GL512N part.
| author | asl |
|---|---|
| date | Wed, 01 Mar 2006 21:06:57 +0000 |
| parents | f8823d78712d |
| children | 16fba4e8c832 |
| files | packages/devs/flash/amd/am29xxxxx/current/ChangeLog packages/devs/flash/amd/am29xxxxx/current/cdl/flash_amd_am29xxxxx.cdl packages/devs/flash/amd/am29xxxxx/current/include/flash_am29xxxxx_parts.inl |
| diffstat | 3 files changed, 85 insertions(+), 0 deletions(-) [+] |
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--- a/packages/devs/flash/amd/am29xxxxx/current/ChangeLog +++ b/packages/devs/flash/amd/am29xxxxx/current/ChangeLog @@ -1,3 +1,14 @@ +2006-02-15 Stephane Deltour <stephane.deltour@barco.com> + + * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_S29GL128N]: + * cdl/flash_amd_am29xxxxx.cdl: Add AMD/SPANSION S29GL128N part. + + * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_S29GL256N]: + * cdl/flash_amd_am29xxxxx.cdl: Add AMD/SPANSION S29GL256N part. + + * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_S29GL512N]: + * cdl/flash_amd_am29xxxxx.cdl: Add AMD/SPANSION S29GL512N part. + 2005-09-08 Peter Korsgaard <jacmet@sunsite.dk> * include/flash_am29xxxxx.inl (flash_program_buf): Handle writes
--- a/packages/devs/flash/amd/am29xxxxx/current/cdl/flash_amd_am29xxxxx.cdl +++ b/packages/devs/flash/amd/am29xxxxx/current/cdl/flash_amd_am29xxxxx.cdl @@ -337,4 +337,33 @@ cdl_package CYGPKG_DEVS_FLASH_AMD_AM29XX part in the family." } + cdl_option CYGHWR_DEVS_FLASH_AMD_S29GL128N { + display "AMD/SPANSION S29GL128N flash memory support" + default_value 0 + implements CYGINT_DEVS_FLASH_AMD_VARIANTS + description " + When this option is enabled, the AMD/SPANSION flash driver will be + able to recognize and handle the S29GL128N + part in the family." + } + + cdl_option CYGHWR_DEVS_FLASH_AMD_S29GL256N { + display "AMD/SPANSION S29GL256N flash memory support" + default_value 0 + implements CYGINT_DEVS_FLASH_AMD_VARIANTS + description " + When this option is enabled, the AMD/SPANSION flash driver will be + able to recognize and handle the S29GL256N + part in the family." + } + + cdl_option CYGHWR_DEVS_FLASH_AMD_S29GL512N { + display "AMD/SPANSION S29GL512N flash memory support" + default_value 0 + implements CYGINT_DEVS_FLASH_AMD_VARIANTS + description " + When this option is enabled, the AMD/SPANSION flash driver will be + able to recognize and handle the S29GL512N + part in the family." + } }
--- a/packages/devs/flash/amd/am29xxxxx/current/include/flash_am29xxxxx_parts.inl +++ b/packages/devs/flash/amd/am29xxxxx/current/include/flash_am29xxxxx_parts.inl @@ -1289,6 +1289,51 @@ bufsiz : 1 }, #endif +#ifdef CYGHWR_DEVS_FLASH_AMD_S29GL128N + { // AMD/SPANSION S29GL128N + long_device_id: true, + device_id : FLASHWORD(0x227e), + device_id2 : FLASHWORD(0x2221), + device_id3 : FLASHWORD(0x2201), + block_size : 0x20000 * CYGNUM_FLASH_INTERLEAVE, + block_count: 128, + device_size: 0x1000000 * CYGNUM_FLASH_INTERLEAVE, + base_mask : ~(0x1000000 * CYGNUM_FLASH_INTERLEAVE - 1), + bootblock : false, + banked : false, + bufsiz : 16, + }, +#endif +#ifdef CYGHWR_DEVS_FLASH_AMD_S29GL256N + { // AMD/SPANSION S29GL256N + long_device_id: true, + device_id : FLASHWORD(0x227e), + device_id2 : FLASHWORD(0x2222), + device_id3 : FLASHWORD(0x2201), + block_size : 0x20000 * CYGNUM_FLASH_INTERLEAVE, + block_count: 256, + device_size: 0x2000000 * CYGNUM_FLASH_INTERLEAVE, + base_mask : ~(0x2000000 * CYGNUM_FLASH_INTERLEAVE - 1), + bootblock : false, + banked : false, + bufsiz : 16, + }, +#endif +#ifdef CYGHWR_DEVS_FLASH_AMD_S29GL512N + { // AMD/SPANSION S29GL512N + long_device_id: true, + device_id : FLASHWORD(0x227e), + device_id2 : FLASHWORD(0x2223), + device_id3 : FLASHWORD(0x2201), + block_size : 0x20000 * CYGNUM_FLASH_INTERLEAVE, + block_count: 512, + device_size: 0x4000000 * CYGNUM_FLASH_INTERLEAVE, + base_mask : ~(0x4000000 * CYGNUM_FLASH_INTERLEAVE - 1), + bootblock : false, + banked : false, + bufsiz : 16, + }, +#endif #endif // 16 bit devices
