--- a/packages/hal/powerpc/arch/current/ChangeLog
+++ b/packages/hal/powerpc/arch/current/ChangeLog
@@ -1,3 +1,8 @@
+2002-11-14  Gary Thomas  <gthomas@ecoscentric.com>
+
+	* src/vectors.S: Provide pointer to saved registers on interrupt.
+	This is necessary for profiling support.
+
 2002-11-13  Gary Thomas  <gthomas@ecoscentric.com>
 
 	* src/hal_misc.c (hal_enable_caches): Support new CDL options for

--- a/packages/hal/powerpc/arch/current/src/vectors.S
+++ b/packages/hal/powerpc/arch/current/src/vectors.S
@@ -9,6 +9,7 @@
 ## -------------------------------------------
 ## This file is part of eCos, the Embedded Configurable Operating System.
 ## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
+## Copyright (C) 2002 Gary Thomas
 ##
 ## eCos is free software; you can redistribute it and/or modify it under
 ## the terms of the GNU General Public License as published by the Free
@@ -744,6 +745,7 @@ 2:      stwu    r14,-4(sp)              
         lwi     r4,hal_interrupt_data           # get interrupt data table
         lwzx    r4,r4,r15                       # load data pointer
                                                 # R4 = data argument
+        mr      r5,r14                          # R5 = saved registers        
         
         mtctr   r6                              # put isr address in ctr
 

--- a/packages/hal/powerpc/mpc8xx/current/ChangeLog
+++ b/packages/hal/powerpc/mpc8xx/current/ChangeLog
@@ -1,3 +1,8 @@
+2002-11-14  Gary Thomas  <gthomas@ecoscentric.com>
+
+	* src/var_misc.c: 
+	* cdl/hal_powerpc_mpc8xx.cdl: Add support for profiling.
+
 2002-11-13  Gary Thomas  <gthomas@ecoscentric.com>
 
 	* include/var_cache.h (HAL_DCACHE_WRITE_MODE): Define for support

--- a/packages/hal/powerpc/mpc8xx/current/cdl/hal_powerpc_mpc8xx.cdl
+++ b/packages/hal/powerpc/mpc8xx/current/cdl/hal_powerpc_mpc8xx.cdl
@@ -9,6 +9,7 @@
 ## -------------------------------------------
 ## This file is part of eCos, the Embedded Configurable Operating System.
 ## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
+## Copyright (C) 2002 Gary Thomas
 ##
 ## eCos is free software; you can redistribute it and/or modify it under
 ## the terms of the GNU General Public License as published by the Free
@@ -41,7 +42,7 @@
 ######DESCRIPTIONBEGIN####
 #
 # Author(s):      jskov
-# Contributors:
+# Contributors:   gthomas
 # Date:           2000-02-04
 #
 #####DESCRIPTIONEND####
@@ -59,6 +60,8 @@ cdl_package CYGPKG_HAL_POWERPC_MPC8xx {
            for this processor variant. It is also necessary to
            select a specific target platform HAL package."
 
+    implements CYGPKG_PROFILE_TIMER
+
     cdl_interface CYGINT_HAL_USE_ROM_MONITOR_UNSUPPORTED {
         display       "ROM monitor configuration is unsupported"
         no_define

--- a/packages/hal/powerpc/mpc8xx/current/src/var_misc.c
+++ b/packages/hal/powerpc/mpc8xx/current/src/var_misc.c
@@ -206,5 +206,65 @@ cyg_hal_clear_MMU (void)
     CYGARC_MTSPR (MD_CTR, ctr | CYGARC_REG_MD_CTR_CIDEF);
 }
 
+#ifdef CYGPKG_PROFILE
+//--------------------------------------------------------------------------
+//
+// Profiling support - uses a separate high-speed timer
+//
+
+#include <cyg/hal/hal_arch.h>
+#include <cyg/hal/hal_intr.h>
+#include <cyg/hal/quicc/ppc8xx.h>
+#include <cyg/infra/profile.h>
+
+// Can't rely on Cyg_Interrupt class being defined.
+#define Cyg_InterruptHANDLED 1
+
+#define PIT_IRQ_LEVEL 4
+#define PIT_IRQ CYGNUM_HAL_INTERRUPT_SIU_LVL4
+#define ID_PIT       34512
+
+
+// Periodic timer ISR.
+static cyg_uint32 
+isr_pit(CYG_ADDRWORD vector, CYG_ADDRWORD data, HAL_SavedRegisters *regs)
+{
+
+    HAL_INTERRUPT_ACKNOWLEDGE (CYGNUM_HAL_INTERRUPT_SIU_PIT);
+    profile_hit(regs->pc);
+
+    return Cyg_InterruptHANDLED;
+}
+
+void
+hal_enable_profile_timer(int resolution)
+{
+    // Run periodic timer interrupt for profile 
+    cyg_uint16 piscr;
+    int period = resolution / 100;
+
+    // Attach pit arbiter.
+    HAL_INTERRUPT_ATTACH (PIT_IRQ,
+                          &hal_arbitration_isr_pit, ID_PIT, 0);
+    HAL_INTERRUPT_UNMASK (PIT_IRQ);
+
+    // Attach pit isr.
+    HAL_INTERRUPT_ATTACH (CYGNUM_HAL_INTERRUPT_SIU_PIT, &isr_pit,
+                          ID_PIT, 0);
+    HAL_INTERRUPT_SET_LEVEL (CYGNUM_HAL_INTERRUPT_SIU_PIT, PIT_IRQ_LEVEL);
+    HAL_INTERRUPT_UNMASK (CYGNUM_HAL_INTERRUPT_SIU_PIT);
+
+
+    // Set period.
+    HAL_WRITE_UINT32 (CYGARC_REG_IMM_PITC, 
+                      (2*period) << CYGARC_REG_IMM_PITC_COUNT_SHIFT);
+
+    // Enable.
+    HAL_READ_UINT16 (CYGARC_REG_IMM_PISCR, piscr);
+    piscr |= CYGARC_REG_IMM_PISCR_PTE;
+    HAL_WRITE_UINT16 (CYGARC_REG_IMM_PISCR, piscr);
+}
+#endif
+
 //--------------------------------------------------------------------------
 // End of var_misc.c