Mercurial > ecos-v3_0-branch
changeset 175:e7780801e1a7
Merge from eCos master repository on 2001-07-31-19:15:01-BST
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--- a/packages/ChangeLog +++ b/packages/ChangeLog @@ -1,8 +1,21 @@ +2001-07-30 Jesper Skov <jskov@redhat.com> + + * ecos.db: Added Dreamcast platform HAL, contributed by Takeshi + Yaegashi (t@keshi.org) + 2001-07-27 Jonathan Larmour <jlarmour@redhat.com> * ecos.db: Add flexanet HAL, eth driver, flash driver and target. Contributed by Jordi Colomer <jco@ict.es> +2001-07-24 Gary Thomas <gthomas@redhat.com> + + * ecos.db: Add Atmel AT91/EB40 serial support. + +2001-07-18 Gary Thomas <gthomas@redhat.com> + + * ecos.db: Add Atmel AT91/EB40 + 2001-07-16 Bart Veer <bartv@redhat.com> * pkgconf/fixhtml.tcl:
--- a/packages/NEWS +++ b/packages/NEWS @@ -1,3 +1,6 @@ +* Add Atmel AT91/EB40 port, including flash and serial drivers. +* Added HAL port to SEGA Dreamcast. + Contributed by Takeshi Yaegashi <t@keshi.org> * Added port to Bright Star Engineering SA11x0 based Flexanet handheld board, including flash and ethernet support. Contributed by Jordi Colomer <jco@ict.es>
new file mode 100644 --- /dev/null +++ b/packages/devs/flash/arm/at91/current/ChangeLog @@ -0,0 +1,40 @@ +2001-07-19 Gary Thomas <gthomas@redhat.com> + + * src/flash_program_buf.c: Fix - needs to have A16 set. + + * src/at91_flash.c: Remove debugging code. + +2001-07-18 Gary Thomas <gthomas@redhat.com> + + * src/flash_query.c: + * src/flash_program_buf.c: + * src/flash_erase_block.c: + * src/flash.h: + * src/at91_flash.c: + * cdl/flash_at91.cdl: New package - AT29LV1024 FLASH for AT91/EB40. + +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//===========================================================================
new file mode 100644 --- /dev/null +++ b/packages/devs/flash/arm/at91/current/cdl/flash_at91.cdl @@ -0,0 +1,84 @@ +# ==================================================================== +# +# flash_at91.cdl +# +# FLASH memory - Hardware support on Atmel At91/EB40 +# +# ==================================================================== +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Red Hat eCos Public License +# Version 1.1 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://www.redhat.com/ +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Configurable Operating System, +# released September 30, 1998. +# +# The Initial Developer of the Original Code is Red Hat. +# Portions created by Red Hat are +# Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +# All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +# ==================================================================== +######DESCRIPTIONBEGIN#### +# +# Author(s): gthomas +# Original data: gthomas +# Contributors: +# Date: 2001-07-17 +# +#####DESCRIPTIONEND#### +# +# ==================================================================== + +cdl_package CYGPKG_DEVS_FLASH_AT91 { + display "Atmel At91/EB40 FLASH memory support" + + parent CYGPKG_IO_FLASH + active_if CYGPKG_IO_FLASH + requires CYGPKG_HAL_ARM_AT91 + + implements CYGHWR_IO_FLASH_DEVICE + implements CYGHWR_IO_FLASH_DEVICE_NOT_IN_RAM + + include_dir . + include_files ; # none _exported_ whatsoever + + description "FLASH memory device support for Atmel At91/EB40 boards" + compile at91_flash.c + + make -priority 1 { + flash_erase_block.o: $(REPOSITORY)/$(PACKAGE)/src/flash_erase_block.c + $(CC) -S $(INCLUDE_PATH) $(CFLAGS) -g0 -mcpu=strongarm -fno-function-sections $(REPOSITORY)/$(PACKAGE)/src/flash_erase_block.c + echo " .globl flash_erase_block_end" >>flash_erase_block.s + echo "flash_erase_block_end:" >>flash_erase_block.s + $(CC) -c -o flash_erase_block.o flash_erase_block.s + $(AR) rcs $(PREFIX)/lib/libtarget.a flash_erase_block.o + } + make -priority 1 { + flash_program_buf.o: $(REPOSITORY)/$(PACKAGE)/src/flash_program_buf.c + $(CC) -S $(INCLUDE_PATH) $(CFLAGS) -g0 -mcpu=strongarm -fno-function-sections $(REPOSITORY)/$(PACKAGE)/src/flash_program_buf.c + echo " .globl flash_program_buf_end" >>flash_program_buf.s + echo "flash_program_buf_end:" >>flash_program_buf.s + $(CC) -c -o flash_program_buf.o flash_program_buf.s + $(AR) rcs $(PREFIX)/lib/libtarget.a flash_program_buf.o + } + make -priority 1 { + flash_query.o: $(REPOSITORY)/$(PACKAGE)/src/flash_query.c + $(CC) -S $(INCLUDE_PATH) $(CFLAGS) -g0 -mcpu=strongarm -fno-function-sections $(REPOSITORY)/$(PACKAGE)/src/flash_query.c + echo " .globl flash_query_end" >>flash_query.s + echo "flash_query_end:" >>flash_query.s + $(CC) -c -o flash_query.o flash_query.s + $(AR) rcs $(PREFIX)/lib/libtarget.a flash_query.o + } +} +
new file mode 100644 --- /dev/null +++ b/packages/devs/flash/arm/at91/current/src/at91_flash.c @@ -0,0 +1,120 @@ +//========================================================================== +// +// at91_flash.c +// +// Flash programming +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 2001-07-17 +// Purpose: +// Description: +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include <pkgconf/hal.h> +#include <cyg/hal/hal_arch.h> +#include <cyg/hal/hal_cache.h> +#include <cyg/hal/hal_io.h> + +#define _FLASH_PRIVATE_ +#include <cyg/io/flash.h> + +#include "flash.h" + +#define _si(p) ((p[0]<<8)|p[1]) + +int +flash_hwr_init(void) +{ + unsigned short data[4]; + extern char flash_query, flash_query_end; + typedef int code_fun(unsigned char *); + code_fun *_flash_query; + int code_len, stat, num_regions, region_size; + + // Copy 'program' code to RAM for execution + code_len = (unsigned long)&flash_query_end - (unsigned long)&flash_query; + _flash_query = (code_fun *)flash_info.work_space; + memcpy(_flash_query, &flash_query, code_len); + HAL_DCACHE_SYNC(); // Should guarantee this code will run + + stat = (*_flash_query)(data); +#if 0 + (*flash_info.pf)("stat = %x\n", stat); + dump_buf(data, sizeof(data)); +#endif + + if (data[0] != FLASH_Atmel_code) { + (*flash_info.pf)("Not Atmel = %x\n", data[0]); + return FLASH_ERR_HWR; + } + + if (data[1] == (unsigned short)FLASH_ATMEL_29LV1024) { + num_regions = 256; + region_size = 0x100; + } else { + (*flash_info.pf)("Unknown device type: %x\n", data[1]); + return FLASH_ERR_HWR; + } + + // Hard wired for now + flash_info.block_size = region_size; + flash_info.blocks = num_regions; + flash_info.start = (void *)0x01010000; + flash_info.end = (void *)(0x01010000+(num_regions*region_size)); + return FLASH_ERR_OK; +} + +// Map a hardware status to a package error +int +flash_hwr_map_error(int err) +{ + if (err) { + (*flash_info.pf)("Err = %x\n", err); + return FLASH_ERR_PROGRAM; + } else { + return FLASH_ERR_OK; + } +} + +// See if a range of FLASH addresses overlaps currently running code +bool +flash_code_overlaps(void *start, void *end) +{ + extern char _stext[], _etext[]; + + return ((((unsigned long)&_stext >= (unsigned long)start) && + ((unsigned long)&_stext < (unsigned long)end)) || + (((unsigned long)&_etext >= (unsigned long)start) && + ((unsigned long)&_etext < (unsigned long)end))); +}
new file mode 100644 --- /dev/null +++ b/packages/devs/flash/arm/at91/current/src/flash.h @@ -0,0 +1,69 @@ +//========================================================================== +// +// flash.h +// +// Flash programming - device constants, etc. +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 2001-07-17 +// Purpose: +// Description: +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#ifndef _FLASH_HWR_H_ +#define _FLASH_HWR_H_ + +// Atmel AT29LV1024 + +#define FLASH_Read_ID 0x9090 +#define FLASH_Program 0xA0A0 +#define FLASH_Reset 0xF0F0 + +#define FLASH_Key_Addr0 0x5555 +#define FLASH_Key_Addr1 0x2AAA +#define FLASH_Key0 0xAAAA +#define FLASH_Key1 0x5555 + +#define FLASH_Atmel_code 0x1F +#define FLASH_ATMEL_29LV1024 0x26 + +#define FLASH_PROGRAM_OK 0x0000 +#define FLASH_LENGTH_ERROR 0x0001 +#define FLASH_PROGRAM_ERROR 0x0002 + +#define FLASH_PAGE_SIZE 0x100 +#define FLASH_PAGE_MASK ~(FLASH_PAGE_SIZE-1) +#define FLASH_PAGE_OFFSET (FLASH_PAGE_SIZE-1) + +#endif // _FLASH_HWR_H_
new file mode 100644 --- /dev/null +++ b/packages/devs/flash/arm/at91/current/src/flash_erase_block.c @@ -0,0 +1,62 @@ +//========================================================================== +// +// flash_erase_block.c +// +// Flash programming +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 2001-07-17 +// Purpose: +// Description: +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include "flash.h" + +#include <pkgconf/hal.h> +#include <cyg/hal/hal_arch.h> +#include <cyg/hal/hal_cache.h> + +// +// CAUTION! This code must be copied to RAM before execution. Therefore, +// it must not contain any code which might be position dependent! +// + +int flash_erase_block(volatile unsigned long *block) +{ + +// This device is implicitly erased as each sector needs to be written +// as a whole. Thus, this is a NOP + + return 0; +}
new file mode 100644 --- /dev/null +++ b/packages/devs/flash/arm/at91/current/src/flash_program_buf.c @@ -0,0 +1,118 @@ +//========================================================================== +// +// flash_program_buf.c +// +// Flash programming +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 2001-07-17 +// Purpose: +// Description: +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include "flash.h" + +#include <pkgconf/hal.h> +#include <cyg/hal/hal_arch.h> +#include <cyg/hal/hal_cache.h> + +// +// CAUTION! This code must be copied to RAM before execution. Therefore, +// it must not contain any code which might be position dependent! +// + +int +flash_program_buf(volatile unsigned short *addr, unsigned short *data, int len) +{ + volatile unsigned short *PAGE, *ROM; + int timeout = 50000; + int cache_on; + int i, offset; + unsigned short hold[FLASH_PAGE_SIZE/2]; + + HAL_DCACHE_IS_ENABLED(cache_on); + if (cache_on) { + HAL_DCACHE_SYNC(); + HAL_DCACHE_DISABLE(); + } + + if (len != FLASH_PAGE_SIZE) { + return FLASH_LENGTH_ERROR; + } + + ROM = (volatile unsigned short *)((unsigned long)addr & 0xFFFF0000); + PAGE = (volatile unsigned short *)((unsigned long)addr & FLASH_PAGE_MASK); + + // Copy current contents (allows for partial updates) + for (i = 0; i < FLASH_PAGE_SIZE/2; i++) { + hold[i] = PAGE[i]; + } + + // Merge data into holding buffer + offset = (unsigned long)addr & FLASH_PAGE_OFFSET; + for (i = 0; i < (len/2); i++) { + hold[offset+i] = data[i]; + } + + // Now write the data + + // Send lead-in sequence + ROM[FLASH_Key_Addr0] = FLASH_Key0; + ROM[FLASH_Key_Addr1] = FLASH_Key1; + + // Send 'write' command + ROM[FLASH_Key_Addr0] = FLASH_Program; + + // Send one page/sector of data + for (i = 0; i < FLASH_PAGE_SIZE/2; i++) { + PAGE[i] = hold[i]; + } + + // Wait for data to be programmed + while (timeout-- > 0) { + if (PAGE[(FLASH_PAGE_SIZE/2)-1] == hold[(FLASH_PAGE_SIZE/2)-1]) { + break; + } + } + + if (timeout <= 0) { + return FLASH_PROGRAM_ERROR; + } + + if (cache_on) { + HAL_DCACHE_ENABLE(); + } + + return FLASH_PROGRAM_OK; +}
new file mode 100644 --- /dev/null +++ b/packages/devs/flash/arm/at91/current/src/flash_query.c @@ -0,0 +1,100 @@ +//========================================================================== +// +// flash_query.c +// +// Flash programming - query device +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 2001-07-17 +// Purpose: +// Description: +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include "flash.h" + +#include <pkgconf/hal.h> +#include <cyg/hal/hal_arch.h> +#include <cyg/hal/hal_cache.h> +#include CYGHWR_MEMORY_LAYOUT_H + +// +// CAUTION! This code must be copied to RAM before execution. Therefore, +// it must not contain any code which might be position dependent! +// + +#define CNT 2000*1000*10 // At least 20ms + +int +flash_query(unsigned short *data) +{ + volatile unsigned short *ROM; + int cnt, cache_on; + + HAL_DCACHE_IS_ENABLED(cache_on); + if (cache_on) { + HAL_DCACHE_SYNC(); + HAL_DCACHE_DISABLE(); + } + + ROM = (volatile unsigned short *)0x01010000; + + // Send lead-in sequence + ROM[FLASH_Key_Addr0] = FLASH_Key0; + ROM[FLASH_Key_Addr1] = FLASH_Key1; + + // Send 'identify' command + ROM[FLASH_Key_Addr0] = FLASH_Read_ID; + + // Need a delay of 20ms! + for (cnt = 0; cnt < 50000; cnt++) ; + + data[0] = ROM[0]; // Manufacturer code + data[1] = ROM[1]; // Device identifier + + // Send lead-in sequence + ROM[FLASH_Key_Addr0] = FLASH_Key0; + ROM[FLASH_Key_Addr1] = FLASH_Key1; + + // Send 'reset' command + ROM[FLASH_Key_Addr0] = FLASH_Reset; + + // Need a delay of 20ms! + for (cnt = 0; cnt < 50000; cnt++) ; + + if (cache_on) { + HAL_DCACHE_ENABLE(); + } + + return 0; +}
new file mode 100644 --- /dev/null +++ b/packages/devs/serial/arm/at91/current/ChangeLog @@ -0,0 +1,31 @@ +2001-07-24 Gary Thomas <gthomas@redhat.com> + + * src/at91_serial.h: + * src/at91_serial.c: + * cdl/ser_arm_at91.cdl: New file(s) - initial package. + +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//===========================================================================
new file mode 100644 --- /dev/null +++ b/packages/devs/serial/arm/at91/current/cdl/ser_arm_at91.cdl @@ -0,0 +1,197 @@ +# ==================================================================== +# +# ser_arm_at91.cdl +# +# eCos serial Atmel AT91 (ARM) configuration data +# +# ==================================================================== +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Red Hat eCos Public License +# Version 1.1 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://www.redhat.com/ +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Configurable Operating System, +# released September 30, 1998. +# +# The Initial Developer of the Original Code is Red Hat. +# Portions created by Red Hat are +# Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +# All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +# ==================================================================== +######DESCRIPTIONBEGIN#### +# +# Author(s): gthomas +# Contributors: +# Date: 2001-07-24 +# +#####DESCRIPTIONEND#### +# +# ==================================================================== + + +cdl_package CYGPKG_IO_SERIAL_ARM_AT91 { + display "Atmel AT91 serial device drivers" + + parent CYGPKG_IO_SERIAL_DEVICES + active_if CYGPKG_IO_SERIAL + active_if CYGPKG_HAL_ARM_AT91 + + requires CYGPKG_ERROR + include_dir cyg/io + include_files ; # none _exported_ whatsoever + description " + This option enables the serial device drivers for the + Atmel AT91 (EB40)." + doc redirect/ecos-device-drivers.html + + compile -library=libextras.a at91_serial.c + + define_proc { + puts $::cdl_system_header "/***** serial driver proc output start *****/" + puts $::cdl_system_header "#define CYGDAT_IO_SERIAL_DEVICE_HEADER <pkgconf/io_serial_arm_at91.h>" + puts $::cdl_system_header "/***** serial driver proc output end *****/" + } + +cdl_component CYGPKG_IO_SERIAL_ARM_AT91_SERIAL0 { + display "Atmel AT91 serial port 0 driver" + flavor bool + default_value 0 + description " + This option includes the serial device driver for the Atmel AT91 + port 0 (serial A)." + + cdl_option CYGDAT_IO_SERIAL_ARM_AT91_SERIAL0_NAME { + display "Device name for Atmel AT91 serial port 0 driver" + flavor data + default_value {"\"/dev/ser0\""} + description " + This option specifies the name of the serial device for the + Atmel AT91 port 0." + } + + cdl_option CYGNUM_IO_SERIAL_ARM_AT91_SERIAL0_BAUD { + display "Baud rate for the Atmel AT91 serial port 0 driver" + flavor data + legal_values { 50 75 110 "134_5" 150 200 300 600 1200 1800 2400 3600 + 4800 7200 9600 14400 19200 38400 57600 115200 234000 + } + default_value 38400 + description " + This option specifies the default baud rate (speed) for the + Atmel AT91 port 0." + } + + cdl_option CYGNUM_IO_SERIAL_ARM_AT91_SERIAL0_BUFSIZE { + display "Buffer size for the Atmel AT91 serial port 0 driver" + flavor data + legal_values 0 to 8192 + default_value 128 + description " + This option specifies the size of the internal buffers used + for the Atmel AT91 port 0." + } +} + +cdl_component CYGPKG_IO_SERIAL_ARM_AT91_SERIAL1 { + display "Atmel AT91 serial port 1 driver" + flavor bool + default_value 1 + description " + This option includes the serial device driver for the Atmel AT91 + port 1 (serial B)." + + cdl_option CYGDAT_IO_SERIAL_ARM_AT91_SERIAL1_NAME { + display "Device name for Atmel AT91 serial port 1 driver" + flavor data + default_value {"\"/dev/ser1\""} + description " + This option specifies the name of the serial device for the + Atmel AT91 port 1." + } + + cdl_option CYGNUM_IO_SERIAL_ARM_AT91_SERIAL1_BAUD { + display "Baud rate for the Atmel AT91 serial port 1 driver" + flavor data + legal_values { 50 75 110 "134_5" 150 200 300 600 1200 1800 2400 3600 + 4800 7200 9600 14400 19200 38400 57600 115200 234000 + } + default_value 38400 + description " + This option specifies the default baud rate (speed) for the + Atmel AT91 port 1." + } + + cdl_option CYGNUM_IO_SERIAL_ARM_AT91_SERIAL1_BUFSIZE { + display "Buffer size for the Atmel AT91 serial port 1 driver" + flavor data + legal_values 0 to 8192 + default_value 128 + description " + This option specifies the size of the internal buffers used + for the Atmel AT91 port 1." + } +} + + cdl_component CYGPKG_IO_SERIAL_ARM_AT91_OPTIONS { + display "Serial device driver build options" + flavor none + description " + Package specific build options including control over + compiler flags used only in building this package, + and details of which tests are built." + + + cdl_option CYGPKG_IO_SERIAL_ARM_AT91_CFLAGS_ADD { + display "Additional compiler flags" + flavor data + no_define + default_value { "" } + description " + This option modifies the set of compiler flags for + building these serial device drivers. These flags are used in addition + to the set of global flags." + } + + cdl_option CYGPKG_IO_SERIAL_ARM_AT91_CFLAGS_REMOVE { + display "Suppressed compiler flags" + flavor data + no_define + default_value { "" } + description " + This option modifies the set of compiler flags for + building these serial device drivers. These flags are removed from + the set of global flags if present." + } + } + + cdl_component CYGPKG_IO_SERIAL_ARM_AT91_TESTING { + display "Testing parameters" + flavor bool + calculated 1 + active_if CYGPKG_IO_SERIAL_ARM_AT91_SERIAL1 + + cdl_option CYGPRI_SER_TEST_SER_DEV { + display "Serial device used for testing" + flavor data + default_value { CYGDAT_IO_SERIAL_ARM_AT91_SERIAL1_NAME } + } + + define_proc { + puts $::cdl_header "#define CYGPRI_SER_TEST_CRASH_ID \"eb40\"" + puts $::cdl_header "#define CYGPRI_SER_TEST_TTY_DEV \"/dev/tty1\"" + } + } +} + +# EOF ser_arm_at91.cdl
new file mode 100644 --- /dev/null +++ b/packages/devs/serial/arm/at91/current/src/at91_serial.c @@ -0,0 +1,359 @@ +//========================================================================== +// +// io/serial/arm/at91/at91_serial.c +// +// Atmel AT91/EB40 Serial I/O Interface Module (interrupt driven) +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 2001-07-24 +// Purpose: Atmel AT91/EB40 Serial I/O module (interrupt driven version) +// Description: +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include <pkgconf/system.h> +#include <pkgconf/io_serial.h> +#include <pkgconf/io.h> +#include <pkgconf/kernel.h> + +#include <cyg/io/io.h> +#include <cyg/hal/hal_io.h> +#include <cyg/hal/hal_intr.h> +#include <cyg/io/devtab.h> +#include <cyg/io/serial.h> +#include <cyg/infra/diag.h> + +#ifdef CYGPKG_IO_SERIAL_ARM_AT91 + +#include "at91_serial.h" + +typedef struct at91_serial_info { + CYG_ADDRWORD base; + CYG_WORD int_num; + cyg_interrupt serial_interrupt; + cyg_handle_t serial_interrupt_handle; +} at91_serial_info; + +static bool at91_serial_init(struct cyg_devtab_entry *tab); +static bool at91_serial_putc(serial_channel *chan, unsigned char c); +static Cyg_ErrNo at91_serial_lookup(struct cyg_devtab_entry **tab, + struct cyg_devtab_entry *sub_tab, + const char *name); +static unsigned char at91_serial_getc(serial_channel *chan); +static Cyg_ErrNo at91_serial_set_config(serial_channel *chan, cyg_uint32 key, + const void *xbuf, cyg_uint32 *len); +static void at91_serial_start_xmit(serial_channel *chan); +static void at91_serial_stop_xmit(serial_channel *chan); + +static cyg_uint32 at91_serial_ISR(cyg_vector_t vector, cyg_addrword_t data); +static void at91_serial_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data); + +static SERIAL_FUNS(at91_serial_funs, + at91_serial_putc, + at91_serial_getc, + at91_serial_set_config, + at91_serial_start_xmit, + at91_serial_stop_xmit + ); + +#ifdef CYGPKG_IO_SERIAL_ARM_AT91_SERIAL0 +static at91_serial_info at91_serial_info0 = {(CYG_ADDRWORD)AT91_USART0, + CYGNUM_HAL_INTERRUPT_USART0}; +#if CYGNUM_IO_SERIAL_ARM_AT91_SERIAL0_BUFSIZE > 0 +static unsigned char at91_serial_out_buf0[CYGNUM_IO_SERIAL_ARM_AT91_SERIAL0_BUFSIZE]; +static unsigned char at91_serial_in_buf0[CYGNUM_IO_SERIAL_ARM_AT91_SERIAL0_BUFSIZE]; + +static SERIAL_CHANNEL_USING_INTERRUPTS(at91_serial_channel0, + at91_serial_funs, + at91_serial_info0, + CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_ARM_AT91_SERIAL0_BAUD), + CYG_SERIAL_STOP_DEFAULT, + CYG_SERIAL_PARITY_DEFAULT, + CYG_SERIAL_WORD_LENGTH_DEFAULT, + CYG_SERIAL_FLAGS_DEFAULT, + &at91_serial_out_buf0[0], sizeof(at91_serial_out_buf0), + &at91_serial_in_buf0[0], sizeof(at91_serial_in_buf0) + ); +#else +static SERIAL_CHANNEL(at91_serial_channel0, + at91_serial_funs, + at91_serial_info0, + CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_ARM_AT91_SERIAL0_BAUD), + CYG_SERIAL_STOP_DEFAULT, + CYG_SERIAL_PARITY_DEFAULT, + CYG_SERIAL_WORD_LENGTH_DEFAULT, + CYG_SERIAL_FLAGS_DEFAULT + ); +#endif + +DEVTAB_ENTRY(at91_serial_io0, + CYGDAT_IO_SERIAL_ARM_AT91_SERIAL0_NAME, + 0, // Does not depend on a lower level interface + &cyg_io_serial_devio, + at91_serial_init, + at91_serial_lookup, // Serial driver may need initializing + &at91_serial_channel0 + ); +#endif // CYGPKG_IO_SERIAL_ARM_AT91_SERIAL1 + +#ifdef CYGPKG_IO_SERIAL_ARM_AT91_SERIAL1 +static at91_serial_info at91_serial_info1 = {(CYG_ADDRWORD)AT91_USART1, + CYGNUM_HAL_INTERRUPT_USART1}; +#if CYGNUM_IO_SERIAL_ARM_AT91_SERIAL1_BUFSIZE > 0 +static unsigned char at91_serial_out_buf1[CYGNUM_IO_SERIAL_ARM_AT91_SERIAL1_BUFSIZE]; +static unsigned char at91_serial_in_buf1[CYGNUM_IO_SERIAL_ARM_AT91_SERIAL1_BUFSIZE]; + +static SERIAL_CHANNEL_USING_INTERRUPTS(at91_serial_channel1, + at91_serial_funs, + at91_serial_info1, + CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_ARM_AT91_SERIAL1_BAUD), + CYG_SERIAL_STOP_DEFAULT, + CYG_SERIAL_PARITY_DEFAULT, + CYG_SERIAL_WORD_LENGTH_DEFAULT, + CYG_SERIAL_FLAGS_DEFAULT, + &at91_serial_out_buf1[0], sizeof(at91_serial_out_buf1), + &at91_serial_in_buf1[0], sizeof(at91_serial_in_buf1) + ); +#else +static SERIAL_CHANNEL(at91_serial_channel1, + at91_serial_funs, + at91_serial_info1, + CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_ARM_AT91_SERIAL1_BAUD), + CYG_SERIAL_STOP_DEFAULT, + CYG_SERIAL_PARITY_DEFAULT, + CYG_SERIAL_WORD_LENGTH_DEFAULT, + CYG_SERIAL_FLAGS_DEFAULT + ); +#endif + +DEVTAB_ENTRY(at91_serial_io1, + CYGDAT_IO_SERIAL_ARM_AT91_SERIAL1_NAME, + 0, // Does not depend on a lower level interface + &cyg_io_serial_devio, + at91_serial_init, + at91_serial_lookup, // Serial driver may need initializing + &at91_serial_channel1 + ); +#endif // CYGPKG_IO_SERIAL_ARM_AT91_SERIAL1 + +// Internal function to actually configure the hardware to desired baud rate, etc. +static bool +at91_serial_config_port(serial_channel *chan, cyg_serial_info_t *new_config, bool init) +{ + at91_serial_info *at91_chan = (at91_serial_info *)chan->dev_priv; + CYG_ADDRWORD base = at91_chan->base; + cyg_uint32 parity = select_parity[new_config->parity]; + cyg_uint32 word_length = select_word_length[new_config->word_length-CYGNUM_SERIAL_WORD_LENGTH_5]; + cyg_uint32 stop_bits = select_stop_bits[new_config->stop]; + + if ((word_length == 0xFF) || + (parity == 0xFF) || + (stop_bits == 0xFF)) { + return false; // Unsupported configuration + } + + // Reset device + HAL_WRITE_UINT32(base+AT91_US_CR, AT91_US_CR_RxRESET | AT91_US_CR_TxRESET); + + // Configuration + HAL_WRITE_UINT32(base+AT91_US_MR, parity | word_length | stop_bits); + + // Baud rate + HAL_WRITE_UINT32(base+AT91_US_BRG, AT91_US_BAUD(select_baud[new_config->baud])); + + // Disable all interrupts + HAL_WRITE_UINT32(base+AT91_US_IDR, 0xFFFFFFFF); + + // Enable Rx interrupts + HAL_WRITE_UINT32(base+AT91_US_IER, AT91_US_IER_RxRDY); + + // Enable RX and TX + HAL_WRITE_UINT32(base+AT91_US_CR, AT91_US_CR_RxENAB | AT91_US_CR_TxENAB); + + return true; +} + +// Function to initialize the device. Called at bootstrap time. +static bool +at91_serial_init(struct cyg_devtab_entry *tab) +{ + serial_channel *chan = (serial_channel *)tab->priv; + at91_serial_info *at91_chan = (at91_serial_info *)chan->dev_priv; + int res; + +#ifdef CYGDBG_IO_INIT + diag_printf("AT91 SERIAL init - dev: %x.%d\n", at91_chan->base, at91_chan->int_num); +#endif + (chan->callbacks->serial_init)(chan); // Really only required for interrupt driven devices + if (chan->out_cbuf.len != 0) { + cyg_drv_interrupt_create(at91_chan->int_num, + 99, // Priority - unused + (cyg_addrword_t)chan, // Data item passed to interrupt handler + at91_serial_ISR, + at91_serial_DSR, + &at91_chan->serial_interrupt_handle, + &at91_chan->serial_interrupt); + cyg_drv_interrupt_attach(at91_chan->serial_interrupt_handle); + cyg_drv_interrupt_unmask(at91_chan->int_num); + } + res = at91_serial_config_port(chan, &chan->config, true); + return res; +} + +// This routine is called when the device is "looked" up (i.e. attached) +static Cyg_ErrNo +at91_serial_lookup(struct cyg_devtab_entry **tab, + struct cyg_devtab_entry *sub_tab, + const char *name) +{ + serial_channel *chan = (serial_channel *)(*tab)->priv; + + (chan->callbacks->serial_init)(chan); // Really only required for interrupt driven devices + return ENOERR; +} + +// Send a character to the device output buffer. +// Return 'true' if character is sent to device +static bool +at91_serial_putc(serial_channel *chan, unsigned char c) +{ + at91_serial_info *at91_chan = (at91_serial_info *)chan->dev_priv; + CYG_ADDRWORD base = at91_chan->base; + cyg_uint32 stat; + + // Check status + HAL_READ_UINT32(base+AT91_US_CSR, stat); + + // Send character if possible + if ((stat & AT91_US_CSR_TxRDY) != 0) { + HAL_WRITE_UINT32(base+AT91_US_THR, c); + return true; + } else { + return false; // Couldn't send, tx was busy + } +} + +// Fetch a character from the device input buffer, waiting if necessary +static unsigned char +at91_serial_getc(serial_channel *chan) +{ + at91_serial_info *at91_chan = (at91_serial_info *)chan->dev_priv; + CYG_ADDRWORD base = at91_chan->base; + cyg_uint32 c; + + // Read data + HAL_READ_UINT32(base+AT91_US_RHR, c); + return c; +} + +// Set up the device characteristics; baud rate, etc. +static Cyg_ErrNo +at91_serial_set_config(serial_channel *chan, cyg_uint32 key, + const void *xbuf, cyg_uint32 *len) +{ + switch (key) { + case CYG_IO_SET_CONFIG_SERIAL_INFO: + { + cyg_serial_info_t *config = (cyg_serial_info_t *)xbuf; + if ( *len < sizeof(cyg_serial_info_t) ) { + return -EINVAL; + } + *len = sizeof(cyg_serial_info_t); + if ( true != at91_serial_config_port(chan, config, false) ) + return -EINVAL; + } + break; + default: + return -EINVAL; + } + return ENOERR; +} + +// Enable the transmitter on the device +static void +at91_serial_start_xmit(serial_channel *chan) +{ + at91_serial_info *at91_chan = (at91_serial_info *)chan->dev_priv; + CYG_ADDRWORD base = at91_chan->base; + + (chan->callbacks->xmt_char)(chan); // Kick transmitter (if necessary) + HAL_WRITE_UINT32(base+AT91_US_IER, AT91_US_IER_TxRDY); +} + +// Disable the transmitter on the device +static void +at91_serial_stop_xmit(serial_channel *chan) +{ + at91_serial_info *at91_chan = (at91_serial_info *)chan->dev_priv; + CYG_ADDRWORD base = at91_chan->base; + + HAL_WRITE_UINT32(base+AT91_US_IER, AT91_US_IER_TxRDY); +} + +// Serial I/O - low level interrupt handler (ISR) +static cyg_uint32 +at91_serial_ISR(cyg_vector_t vector, cyg_addrword_t data) +{ + cyg_drv_interrupt_mask(vector); + cyg_drv_interrupt_acknowledge(vector); + return CYG_ISR_CALL_DSR; // Cause DSR to be run +} + +// Serial I/O - high level interrupt handler (DSR) +static void +at91_serial_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data) +{ + serial_channel *chan = (serial_channel *)data; + at91_serial_info *at91_chan = (at91_serial_info *)chan->dev_priv; + CYG_ADDRWORD base = at91_chan->base; + cyg_uint32 stat, c; + + // Check status + HAL_READ_UINT32(base+AT91_US_IMR, stat); + + if (stat & (AT91_US_IER_TxRDY)) { + (chan->callbacks->xmt_char)(chan); + } + if (stat & (AT91_US_IER_RxRDY)) { + while (true) { + HAL_READ_UINT32(base+AT91_US_CSR, stat); + if ((stat & AT91_US_CSR_RxRDY) == 0) { + break; + } + HAL_READ_UINT32(base+AT91_US_RHR, c); + (chan->callbacks->rcv_char)(chan, c); + } + } + cyg_drv_interrupt_unmask(vector); +} +#endif
new file mode 100644 --- /dev/null +++ b/packages/devs/serial/arm/at91/current/src/at91_serial.h @@ -0,0 +1,100 @@ +#ifndef CYGONCE_ARM_AT91_SERIAL_H +#define CYGONCE_ARM_AT91_SERIAL_H + +// ==================================================================== +// +// at91_serial.h +// +// Device I/O - Description of Atmel AT91/EB40 serial hardware +// +// ==================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +// ==================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 2001-07-24 +// Purpose: Internal interfaces for serial I/O drivers +// Description: +// +//####DESCRIPTIONEND#### +// +// ==================================================================== + +// Description of serial ports on Atmel AT91/EB40 + +#include <cyg/hal/plf_io.h> // Register definitions + +#define AT91_UART_RX_INTS (AT91_US_IER_RxRDY) + +static cyg_uint32 select_word_length[] = { + AT91_US_MR_LENGTH_5, + AT91_US_MR_LENGTH_6, + AT91_US_MR_LENGTH_7, + AT91_US_MR_LENGTH_8 +}; + +static cyg_uint32 select_stop_bits[] = { + 0, + AT91_US_MR_STOP_1, // 1 stop bit + AT91_US_MR_STOP_1_5, // 1.5 stop bit + AT91_US_MR_STOP_2 // 2 stop bits +}; + +static cyg_uint32 select_parity[] = { + AT91_US_MR_PARITY_NONE, // No parity + AT91_US_MR_PARITY_EVEN, // Even parity + AT91_US_MR_PARITY_ODD, // Odd parity + AT91_US_MR_PARITY_MARK, // Mark (1) parity + AT91_US_MR_PARITY_SPACE // Space (0) parity +}; + +static cyg_int32 select_baud[] = { + 0, // Unused + 50, // 50 + 75, // 75 + 110, // 110 + 0, // 134.5 + 150, // 150 + 200, // 200 + 300, // 300 + 600, // 600 + 1200, // 1200 + 1800, // 1800 + 2400, // 2400 + 3600, // 3600 + 4800, // 4800 + 7200, // 7200 + 9600, // 9600 + 14400, // 14400 + 19200, // 19200 + 38400, // 38400 + 57600, // 57600 + 115200, // 115200 + 230400, // 230400 +}; + +#endif // CYGONCE_ARM_AT91_SERIAL_H
--- a/packages/ecos.db +++ b/packages/ecos.db @@ -202,6 +202,16 @@ package CYGPKG_DEVS_FLASH_EDB7XXX { on the Cirrus Logic EDB7xxx platform(s)." } +package CYGPKG_DEVS_FLASH_AT91 { + alias { "FLASH memory support for Atmel AT91/EB40" flash_at91 } + directory devs/flash/arm/at91 + script flash_at91.cdl + hardware + description " + This package contains hardware support for FLASH memory + on the Atmel AT91/EB40 platform(s)." +} + package CYGPKG_DEVS_FLASH_ASSABET { alias { "FLASH memory support for Intel SA1110 (Assabet)" flash_assabet } directory devs/flash/arm/assabet @@ -394,6 +404,15 @@ package CYGPKG_IO_SERIAL_ARM_CMA230 { description "Cogent ARM/CMA230 serial device drivers" } +package CYGPKG_IO_SERIAL_ARM_AT91 { + alias { "Atmel AT91 evaluation board (EB40)" + devs_serial_arm_at91 at91_serial_driver } + hardware + directory devs/serial/arm/at91 + script ser_arm_at91.cdl + description "Atmel AT91 evaulation board (EB40) serial drivers." +} + package CYGPKG_IO_SERIAL_POWERPC_COGENT { alias { "Cogent PowerPC serial device drivers" devs_serial_powerpc_cogent cogent_serial_driver } @@ -1048,6 +1067,16 @@ package CYGPKG_REDBOOT { using eCos as the underlying board support mechanism." } +package CYGPKG_HAL_SH_SH7750_DREAMCAST { + alias { "SEGA Dreamcast" hal_sh_dreamcast sh_dreamcast_hal } + directory hal/sh/dreamcast + script hal_sh_sh7750_dreamcast.cdl + hardware + description " + This SH HAL package provides the support needed to run + eCos on SEGA Dreamcast." +} + # -------------------------------------------------------------------------- # ARM packages package CYGPKG_HAL_ARM { @@ -1091,6 +1120,16 @@ The e7t HAL package provides the support Evaluator7T board (aka the AEB-2)." } +package CYGPKG_HAL_ARM_AT91 { + alias { "Atmel evaluation board (EB40)" hal_arm_at91 arm_at91_hal } + directory hal/arm/at91 + script hal_arm_at91.cdl + hardware + description " +The at91 HAL package provides the support needed to run eCos on an Atmel +evaluation board (EB40)." +} + package CYGPKG_HAL_ARM_EBSA285 { alias { "Intel EBSA285 StrongARM board" hal_arm_ebsa285 arm_ebsa285_hal } directory hal/arm/ebsa285 @@ -1293,6 +1332,18 @@ package CYGPKG_HAL_SH_SH7750_CQ7750 { eCos on a CqREEK SH7750 board." } +target dreamcast { + alias { "SEGA Dreamcast" dreamcast } + packages { CYGPKG_HAL_SH + CYGPKG_HAL_SH_SH4 + CYGPKG_HAL_SH_SH7750_DREAMCAST + CYGPKG_IO_PCI + CYGPKG_IO_SERIAL_SH_SCIF } + description " + The sh7750 target provides the packages needed to run + eCos on SEGA Dreamcast." +} + # -------------------------------------------------------------------------- # i386 packages package CYGPKG_HAL_I386 { @@ -1806,6 +1857,18 @@ The aeb target provides the packages nee Evaluator7T board (aka AEB-2)." } +target at91 { + alias { "Atmel evaulation board (EB40)" eb40 } + packages { CYGPKG_HAL_ARM + CYGPKG_HAL_ARM_AT91 + CYGPKG_DEVS_FLASH_AT91 + CYGPKG_IO_SERIAL_ARM_AT91 + } + description " +The aeb target provides the packages needed to run eCos on an Atmel +evaluation board (EB40)." +} + target ebsa285 { alias { "Intel EBSA285 StrongARM board" ebsa } packages { CYGPKG_HAL_ARM
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/at91/current/ChangeLog @@ -0,0 +1,118 @@ +2001-07-26 Gary Thomas <gthomas@redhat.com> + + * src/at91_misc.c (hal_clock_initialize): + * cdl/hal_arm_at91.cdl: Increase system clock (RTC) to run at 1MHz for + better timing resolution. CAUTION! this means that the system clock tick + can never be more than 64ms. + +2001-07-23 Gary Thomas <gthomas@redhat.com> + + * include/pkgconf/mlt_arm_at91_eb40_romram.mlt: + * include/pkgconf/mlt_arm_at91_eb40_romram.ldi: + * include/pkgconf/mlt_arm_at91_eb40_romram.h: + * include/pkgconf/mlt_arm_at91_eb40_ram.mlt: + * include/pkgconf/mlt_arm_at91_eb40_ram.ldi: + * include/pkgconf/mlt_arm_at91_eb40_ram.h: + * cdl/hal_arm_at91.cdl: Fix MLT files (names, layout). + +2001-07-20 Gary Thomas <gthomas@redhat.com> + + * include/plf_io.h: Add UART interrupt definitions. + + * src/hal_diag.c (cyg_hal_plf_serial_control): Enable ^C support. + + * src/at91_misc.c (hal_clock_initialize): Add clock/rtc implementation. + + * include/pkgconf/mlt_arm_at91_eb40_romram.ldi: + Replace missing 'fixed vectors'. + +2001-07-19 Gary Thomas <gthomas@redhat.com> + + * misc/redboot_ROMRAM.ecm: New exported config. + + * include/pkgconf/mlt_arm_at91_eb40_romram.ldi: + * include/pkgconf/mlt_arm_at91_eb40_ram.mlt: + * include/pkgconf/mlt_arm_at91_eb40_ram.ldi: + * include/hal_platform_setup.h: Fix ROMRAM startup mode. Note: I + can't get the onboard SRAM at 0x00100000 to work, so for now, this + will just have to go in low external RAM. Thus the change for the + RAM base address in startup=RAM mode. + + * src/hal_diag.c (cyg_hal_plf_serial_getc_timeout): Remove debug code. + + * src/at91_misc.c (set_leds): LEDs are on D4/D2/D1. + + * misc/redboot_ROM.ecm: + * misc/redboot_RAM.ecm: Exported configurations. + + * include/pkgconf/mlt_arm_at91_eb40_romram.mlt: + * include/pkgconf/mlt_arm_at91_eb40_romram.ldi: + * include/pkgconf/mlt_arm_at91_eb40_romram.h: New startup type. + + * include/pkgconf/mlt_arm_at91_eb40_rom.h: Fix heap layout. + + * include/pkgconf/mlt_arm_at91_eb40_ram.mlt: + * include/pkgconf/mlt_arm_at91_eb40_ram.ldi: + * include/pkgconf/mlt_arm_at91_eb40_ram.h: + Fix heap layout. Move RAM load address to leave room for RedBoot/GDB. + + * include/plf_io.h: Add definitions for PIO, EBI and PS. + + * include/hal_platform_setup.h: ROM startup mode now works. + First attempt at ROMRAM startup - not yet working. + + * cdl/hal_arm_at91.cdl: Add ROMRAM startup mode. + +2001-07-18 Gary Thomas <gthomas@redhat.com> + + * src/hal_diag.c: More complete initialization. + + * src/at91_misc.c: Support interrupt controller, delay_us(). + + * include/plf_io.h: Add interrupt controller, timer definitions. + + * cdl/hal_arm_at91.cdl: Fix clock speed, number I/O channels. + +2001-07-16 Gary Thomas <gthomas@redhat.com> + + * src/hal_diag.c: + * src/at91_misc.c: + * include/pkgconf/mlt_arm_at91_eb40_rom.mlt: + * include/pkgconf/mlt_arm_at91_eb40_rom.ldi: + * include/pkgconf/mlt_arm_at91_eb40_rom.h: + * include/pkgconf/mlt_arm_at91_eb40_ram.mlt: + * include/pkgconf/mlt_arm_at91_eb40_ram.ldi: + * include/pkgconf/mlt_arm_at91_eb40_ram.h: + * include/plf_stub.h: + * include/plf_io.h: + * include/hal_platform_setup.h: + * include/hal_platform_ints.h: + * include/hal_diag.h: + * include/hal_cache.h: + * cdl/hal_arm_at91.cdl: New port - cloned from E7T. + +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//===========================================================================
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/at91/current/cdl/hal_arm_at91.cdl @@ -0,0 +1,284 @@ +# ==================================================================== +# +# hal_arm_at91.cdl +# +# Atmel evaluation board (EB40) HAL package configuration data +# +# ==================================================================== +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Red Hat eCos Public License +# Version 1.1 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://www.redhat.com/ +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Configurable Operating System, +# released September 30, 1998. +# +# The Initial Developer of the Original Code is Red Hat. +# Portions created by Red Hat are +# Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +# All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +# ==================================================================== +######DESCRIPTIONBEGIN#### +# +# Author(s): gthomas +# Contributors: gthomas +# Date: 2001-07-12 +# +#####DESCRIPTIONEND#### +# +# ==================================================================== + +cdl_package CYGPKG_HAL_ARM_AT91 { + display "Atmel evaluation board (EB40)" + parent CYGPKG_HAL_ARM + define_header hal_arm_at91.h + include_dir cyg/hal + hardware + description " + The AT91 HAL package provides the support needed to run + eCos on an Atmel AT91/EB40 eval board." + + compile hal_diag.c at91_misc.c + + implements CYGINT_HAL_DEBUG_GDB_STUBS + implements CYGINT_HAL_DEBUG_GDB_STUBS_BREAK + implements CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT + implements CYGINT_HAL_ARM_ARCH_ARM7 + implements CYGINT_HAL_ARM_THUMB_ARCH + + define_proc { + puts $::cdl_system_header "#define CYGBLD_HAL_TARGET_H <pkgconf/hal_arm.h>" + puts $::cdl_system_header "#define CYGBLD_HAL_PLATFORM_H <pkgconf/hal_arm_at91.h>" + puts $::cdl_header "#define HAL_PLATFORM_CPU \"ARM7TDMI\"" + puts $::cdl_header "#define HAL_PLATFORM_BOARD \"Atmel AT91/EB40\"" + puts $::cdl_header "#define HAL_PLATFORM_EXTRA \"\"" + } + + cdl_component CYG_HAL_STARTUP { + display "Startup type" + flavor data + default_value {"RAM"} + legal_values {"RAM" "ROM" "ROMRAM"} + no_define + define -file system.h CYG_HAL_STARTUP + description " + When targetting the AT91 eval board it is possible to build + the system for either RAM bootstrap or ROM bootstrap(s). Select + 'ram' when building programs to load into RAM using onboard + debug software such as Angel or eCos GDB stubs. Select 'rom' + when building a stand-alone application which will be put + into ROM. Using ROMRAM will allow the program to exist in + ROM, but be copied to RAM during startup." + } + + cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS { + display "Number of communication channels on the board" + flavor data + calculated 2 + } + + cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL { + display "Debug serial port" + active_if CYGPRI_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL_CONFIGURABLE + flavor data + legal_values 0 to CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS-1 + default_value 0 + description " + The AT91 board has two serial ports. This option + chooses which port will be used to connect to a host + running GDB." + } + + cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL { + display "Diagnostic serial port" + active_if CYGPRI_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_CONFIGURABLE + flavor data + legal_values 0 to CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS-1 + default_value 0 + description " + The AT91 board has two serial ports. This option + chooses which port will be used for diagnostic output." + } + + cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_CHANNELS_DEFAULT_BAUD { + display "Console/GDB serial port baud rate" + flavor data + legal_values 9600 19200 38400 57600 115200 + default_value 38400 + description " + This option controls the default baud rate used for the + Console/GDB connection." + } + + # Real-time clock/counter specifics + cdl_option CYGNUM_HAL_ARM_AT91_CLOCK_SPEED { + display "CPU clock speed" + flavor data + calculated 32768000 + } + + cdl_component CYGNUM_HAL_RTC_CONSTANTS { + display "Real-time clock constants" + flavor none + + cdl_option CYGNUM_HAL_RTC_NUMERATOR { + display "Real-time clock numerator" + flavor data + calculated 1000000000 + } + cdl_option CYGNUM_HAL_RTC_DENOMINATOR { + display "Real-time clock denominator" + flavor data + calculated 100 + } + cdl_option CYGNUM_HAL_RTC_PERIOD { + display "Real-time clock period" + flavor data + calculated ((CYGNUM_HAL_ARM_AT91_CLOCK_SPEED/32) / CYGNUM_HAL_RTC_DENOMINATOR) + } + } + + cdl_component CYGBLD_GLOBAL_OPTIONS { + display "Global build options" + flavor none + parent CYGPKG_NONE + description " + Global build options including control over + compiler flags, linker flags and choice of toolchain." + + + cdl_option CYGBLD_GLOBAL_COMMAND_PREFIX { + display "Global command prefix" + flavor data + no_define + default_value { "arm-elf" } + description " + This option specifies the command prefix used when + invoking the build tools." + } + + cdl_option CYGBLD_GLOBAL_CFLAGS { + display "Global compiler flags" + flavor data + no_define + default_value { "-mcpu=arm7tdmi -mno-short-load-words -Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef -Woverloaded-virtual -g -O2 -ffunction-sections -fdata-sections -fno-rtti -fno-exceptions -fvtable-gc -finit-priority" } + description " + This option controls the global compiler flags which are used to + compile all packages by default. Individual packages may define + options which override these global flags." + } + + cdl_option CYGBLD_GLOBAL_LDFLAGS { + display "Global linker flags" + flavor data + no_define + default_value { "-mcpu=arm7tdmi -mno-short-load-words -Wl,--gc-sections -Wl,-static -g -nostdlib" } + description " + This option controls the global linker flags. Individual + packages may define options which override these global flags." + } + } + + cdl_component CYGHWR_MEMORY_LAYOUT { + display "Memory layout" + flavor data + no_define + calculated { (CYG_HAL_STARTUP == "RAM") ? "arm_at91_eb40_ram" : + (CYG_HAL_STARTUP == "ROMRAM") ? "arm_at91_eb40_romram" : + "arm_at91_eb40_rom" } + + cdl_option CYGHWR_MEMORY_LAYOUT_LDI { + display "Memory layout linker script fragment" + flavor data + no_define + define -file system.h CYGHWR_MEMORY_LAYOUT_LDI + calculated { (CYG_HAL_STARTUP == "RAM") ? "<pkgconf/mlt_arm_at91_eb40_ram.ldi>" : + (CYG_HAL_STARTUP == "ROMRAM") ? "<pkgconf/mlt_arm_at91_eb40_romram.ldi>" : + "<pkgconf/mlt_arm_at91_eb40_rom.ldi>" } + } + + cdl_option CYGHWR_MEMORY_LAYOUT_H { + display "Memory layout header file" + flavor data + no_define + define -file system.h CYGHWR_MEMORY_LAYOUT_H + calculated { (CYG_HAL_STARTUP == "RAM") ? "<pkgconf/mlt_arm_at91_eb40_ram.h>" : + (CYG_HAL_STARTUP == "ROMRAM") ? "<pkgconf/mlt_arm_at91_eb40_romram.h>" : + "<pkgconf/mlt_arm_at91_eb40_rom.h>" } + } + } + + cdl_option CYGSEM_HAL_ROM_MONITOR { + display "Behave as a ROM monitor" + flavor bool + default_value 0 + parent CYGPKG_HAL_ROM_MONITOR + requires { CYG_HAL_STARTUP == "ROM" || CYG_HAL_STARTUP == "ROMRAM" } + description " + Enable this option if this program is to be used as a ROM monitor, + i.e. applications will be loaded into RAM on the board, and this + ROM monitor may process exceptions or interrupts generated from the + application. This enables features such as utilizing a separate + interrupt stack when exceptions are generated." + } + + cdl_option CYGSEM_HAL_USE_ROM_MONITOR { + display "Work with a ROM monitor" + flavor booldata + legal_values { "Generic" "GDB_stubs" } + default_value { CYG_HAL_STARTUP == "RAM" ? "GDB_stubs" : 0 } + parent CYGPKG_HAL_ROM_MONITOR + requires { CYG_HAL_STARTUP == "RAM" } + description " + Support can be enabled for different varieties of ROM monitor. + This support changes various eCos semantics such as the encoding + of diagnostic output, or the overriding of hardware interrupt + vectors. + Firstly there is \"Generic\" support which prevents the HAL + from overriding the hardware vectors that it does not use, to + instead allow an installed ROM monitor to handle them. This is + the most basic support which is likely to be common to most + implementations of ROM monitor. + \"GDB_stubs\" provides support when GDB stubs are included in + the ROM monitor or boot ROM." + } + + cdl_component CYGPKG_REDBOOT_HAL_OPTIONS { + display "Redboot HAL options" + flavor none + no_define + parent CYGPKG_REDBOOT + active_if CYGPKG_REDBOOT + description " + This option lists the target's requirements for a valid Redboot + configuration." + + cdl_option CYGBLD_BUILD_REDBOOT_BIN { + display "Build Redboot ROM binary image" + active_if CYGBLD_BUILD_REDBOOT + default_value 1 + no_define + description "This option enables the conversion of the Redboot ELF + image to a binary image suitable for ROM programming." + + make -priority 325 { + <PREFIX>/bin/redboot.bin : <PREFIX>/bin/redboot.elf + $(OBJCOPY) --strip-debug $< $(@:.bin=.img) + $(OBJCOPY) -O srec $< $(@:.bin=.srec) + $(OBJCOPY) -O binary $< $@ + } + + } + } +}
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/at91/current/include/hal_cache.h @@ -0,0 +1,183 @@ +#ifndef CYGONCE_HAL_CACHE_H +#define CYGONCE_HAL_CACHE_H + +//============================================================================= +// +// hal_cache.h +// +// HAL cache control API +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): nickg, gthomas +// Contributors: nickg, gthomas +// Date: 1998-09-28 +// Purpose: Cache control API +// Description: The macros defined here provide the HAL APIs for handling +// cache control operations. +// Usage: +// #include <cyg/hal/hal_cache.h> +// ... +// +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include <cyg/infra/cyg_type.h> + +//----------------------------------------------------------------------------- +// Cache dimensions + +// Data cache +//#define HAL_DCACHE_SIZE 0 // Size of data cache in bytes +//#define HAL_DCACHE_LINE_SIZE 0 // Size of a data cache line +//#define HAL_DCACHE_WAYS 0 // Associativity of the cache + +// Instruction cache +//#define HAL_ICACHE_SIZE 0 // Size of cache in bytes +//#define HAL_ICACHE_LINE_SIZE 0 // Size of a cache line +//#define HAL_ICACHE_WAYS 0 // Associativity of the cache + +//#define HAL_DCACHE_SETS (HAL_DCACHE_SIZE/(HAL_DCACHE_LINE_SIZE*HAL_DCACHE_WAYS)) +//#define HAL_ICACHE_SETS (HAL_ICACHE_SIZE/(HAL_ICACHE_LINE_SIZE*HAL_ICACHE_WAYS)) + +//----------------------------------------------------------------------------- +// Global control of data cache + +// Enable the data cache +#define HAL_DCACHE_ENABLE() + +// Disable the data cache +#define HAL_DCACHE_DISABLE() + +// Invalidate the entire cache +#define HAL_DCACHE_INVALIDATE_ALL() + +// Synchronize the contents of the cache with memory. +#define HAL_DCACHE_SYNC() + +// Purge contents of data cache +#define HAL_DCACHE_PURGE_ALL() + +// Query the state of the data cache (does not affect the caching) +#define HAL_DCACHE_IS_ENABLED(_state_) \ + CYG_MACRO_START \ + (_state_) = 0; \ + CYG_MACRO_END + +// Set the data cache refill burst size +//#define HAL_DCACHE_BURST_SIZE(_size_) + +// Set the data cache write mode +//#define HAL_DCACHE_WRITE_MODE( _mode_ ) + +//#define HAL_DCACHE_WRITETHRU_MODE 0 +//#define HAL_DCACHE_WRITEBACK_MODE 1 + +// Load the contents of the given address range into the data cache +// and then lock the cache so that it stays there. +//#define HAL_DCACHE_LOCK(_base_, _size_) + +// Undo a previous lock operation +//#define HAL_DCACHE_UNLOCK(_base_, _size_) + +// Unlock entire cache +//#define HAL_DCACHE_UNLOCK_ALL() + +//----------------------------------------------------------------------------- +// Data cache line control + +// Allocate cache lines for the given address range without reading its +// contents from memory. +//#define HAL_DCACHE_ALLOCATE( _base_ , _size_ ) + +// Write dirty cache lines to memory and invalidate the cache entries +// for the given address range. +//#define HAL_DCACHE_FLUSH( _base_ , _size_ ) + +// Invalidate cache lines in the given range without writing to memory. +//#define HAL_DCACHE_INVALIDATE( _base_ , _size_ ) + +// Write dirty cache lines to memory for the given address range. +//#define HAL_DCACHE_STORE( _base_ , _size_ ) + +// Preread the given range into the cache with the intention of reading +// from it later. +//#define HAL_DCACHE_READ_HINT( _base_ , _size_ ) + +// Preread the given range into the cache with the intention of writing +// to it later. +//#define HAL_DCACHE_WRITE_HINT( _base_ , _size_ ) + +// Allocate and zero the cache lines associated with the given range. +//#define HAL_DCACHE_ZERO( _base_ , _size_ ) + +//----------------------------------------------------------------------------- +// Global control of Instruction cache + +// Enable the instruction cache +#define HAL_ICACHE_ENABLE() + +// Disable the instruction cache +#define HAL_ICACHE_DISABLE() + +// Invalidate the entire cache +#define HAL_ICACHE_INVALIDATE_ALL() + +// Synchronize the contents of the cache with memory. +#define HAL_ICACHE_SYNC() + +// Query the state of the instruction cache (does not affect the caching) +#define HAL_ICACHE_IS_ENABLED(_state_) \ + CYG_MACRO_START \ + (_state_) = 0; \ + CYG_MACRO_END + +// Set the instruction cache refill burst size +//#define HAL_ICACHE_BURST_SIZE(_size_) + +// Load the contents of the given address range into the instruction cache +// and then lock the cache so that it stays there. +//#define HAL_ICACHE_LOCK(_base_, _size_) + +// Undo a previous lock operation +//#define HAL_ICACHE_UNLOCK(_base_, _size_) + +// Unlock entire cache +//#define HAL_ICACHE_UNLOCK_ALL() + +//----------------------------------------------------------------------------- +// Instruction cache line control + +// Invalidate cache lines in the given range without writing to memory. +//#define HAL_ICACHE_INVALIDATE( _base_ , _size_ ) + +//----------------------------------------------------------------------------- +#endif // ifndef CYGONCE_HAL_CACHE_H +// End of hal_cache.h
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/at91/current/include/hal_diag.h @@ -0,0 +1,70 @@ +#ifndef CYGONCE_HAL_DIAG_H +#define CYGONCE_HAL_DIAG_H + +//============================================================================= +// +// hal_diag.h +// +// HAL Support for Kernel Diagnostic Routines +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jskov +// Contributors:jskov, gthomas +// Date: 2001-07-12 +// Purpose: HAL Support for Kernel Diagnostic Routines +// Description: Diagnostic routines for use during kernel development. +// Usage: #include <cyg/hal/hal_diag.h> +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include <pkgconf/hal.h> + +#include <cyg/infra/cyg_type.h> + +#include <cyg/hal/hal_if.h> + +#define HAL_DIAG_INIT() hal_if_diag_init() +#define HAL_DIAG_WRITE_CHAR(_c_) hal_if_diag_write_char(_c_) +#define HAL_DIAG_READ_CHAR(_c_) hal_if_diag_read_char(&_c_) + +//----------------------------------------------------------------------------- +// LED +externC void hal_diag_led(int mask); + +//----------------------------------------------------------------------------- +// delay + +extern void hal_delay_us(cyg_int32 usecs); +#define HAL_DELAY_US(n) hal_delay_us(n); + +//----------------------------------------------------------------------------- +// end of hal_diag.h +#endif // CYGONCE_HAL_DIAG_H
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/at91/current/include/hal_platform_ints.h @@ -0,0 +1,76 @@ +#ifndef CYGONCE_HAL_PLATFORM_INTS_H +#define CYGONCE_HAL_PLATFORM_INTS_H +//========================================================================== +// +// hal_platform_ints.h +// +// HAL Interrupt and clock assignments for AT91/EB40 +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 2001-07-12 +// Purpose: Define Interrupt support +// Description: The interrupt specifics for the AT91/EB40 board/platform are +// defined here. +// +// Usage: #include <cyg/hal/hal_platform_ints.h> +// ... +// +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#define CYGNUM_HAL_INTERRUPT_USART0 2 +#define CYGNUM_HAL_INTERRUPT_USART1 3 +#define CYGNUM_HAL_INTERRUPT_TIMER0 4 +#define CYGNUM_HAL_INTERRUPT_TIMER1 5 +#define CYGNUM_HAL_INTERRUPT_TIMER2 6 +#define CYGNUM_HAL_INTERRUPT_WATCHDOG 7 +#define CYGNUM_HAL_INTERRUPT_PIO 8 +#define CYGNUM_HAL_INTERRUPT_EXT0 16 +#define CYGNUM_HAL_INTERRUPT_EXT1 17 +#define CYGNUM_HAL_INTERRUPT_EXT2 18 + +#define CYGNUM_HAL_ISR_MIN 2 +#define CYGNUM_HAL_ISR_MAX 18 +#define CYGNUM_HAL_ISR_COUNT (CYGNUM_HAL_ISR_MAX - CYGNUM_HAL_ISR_MIN + 1) + +// The vector used by the Real time clock +#define CYGNUM_HAL_INTERRUPT_RTC CYGNUM_HAL_INTERRUPT_TIMER0 + + +//---------------------------------------------------------------------------- +// Reset. +#define HAL_PLATFORM_RESET() + +#define HAL_PLATFORM_RESET_ENTRY 0x01010000 + +#endif // CYGONCE_HAL_PLATFORM_INTS_H
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/at91/current/include/hal_platform_setup.h @@ -0,0 +1,113 @@ +#ifndef CYGONCE_HAL_PLATFORM_SETUP_H +#define CYGONCE_HAL_PLATFORM_SETUP_H + +/*============================================================================= +// +// hal_platform_setup.h +// +// Platform specific support for HAL (assembly code) +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors:gthomas +// Date: 2001-07-12 +// Purpose: AT91/EB40 platform specific support routines +// Description: +// Usage: #include <cyg/hal/hal_platform_setup.h> +// +//####DESCRIPTIONEND#### +// +//===========================================================================*/ + +#include <cyg/hal/plf_io.h> + +#if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_ROMRAM) + + .macro _setup + ldr r10,=_InitMemory // Initialize memory controller + movs r0,pc,lsr #20 // If ROM startup, PC < 0x100000 + moveq r10,r10,lsl #12 // mask address to low 20 bits + moveq r10,r10,lsr #12 + ldmia r10!,{r0-r9,r11-r12} // Table of initialization constants +#if defined(CYG_HAL_STARTUP_ROMRAM) + ldr r10,=0x0000FFFF + and r12,r12,r10 + ldr r10,=0x01010000 + orr r12,r12,r10 +#endif + stmia r11!,{r0-r9} // Write to controller + mov pc,r12 // Change address space, break pipeline +_InitMemory: + .long 0x01002535 // 0x01000000, 16MB, 2 cycles added after transfer, 16-bit, 6 wait states + .long 0x02002121 // 0x02000000, 16MB, 0 cycles added after transfer, 16-bit, 1 wait state + .long 0x20000000 // unused + .long 0x30000000 // unused + .long 0x40000000 // unused + .long 0x50000000 // unused + .long 0x60000000 // unused + .long 0x70000000 // unused + .long 0x00000001 // REMAP commande + .long 0x00000006 // 7 memory regions, standard read + .long AT91_EBI // External Bus Interface address + .long 10f // address where to jump +10: + +#if defined(CYG_HAL_STARTUP_ROMRAM) + ldr r0,=0x01010000 // Relocate FLASH/ROM to on-chip RAM + ldr r1,=0x02000000 // RAM base & length + ldr r2,=0x02010000 +20: ldr r3,[r0],#4 + str r3,[r1],#4 + cmp r1,r2 + bne 20b + ldr r0,=30f + mov pc,r0 +30: +#endif + + ldr r0,=AT91_PS // Power saving interface + ldr r1,=0xFFFFFFFF // Enable all peripheral [clocks] + str r1,[r0,#AT91_PS_PCER] + ldr r0,=AT91_PIO // Disable PIO (so peripherals can use bits) + ldr r1,=0x0070FE49 // UART, FIQ, EINT, Timer clocks + str r1,[r0,#AT91_PIO_PDR] + ldr r1,=0x000001B6 // LEDs + str r1,[r0,#AT91_PIO_OER] + str r1,[r0,#AT91_PIO_SODR] + .endm + +#define CYGSEM_HAL_ROM_RESET_USES_JUMP +#define PLATFORM_SETUP1 _setup +#else +#define PLATFORM_SETUP1 +#endif + +//----------------------------------------------------------------------------- +// end of hal_platform_setup.h +#endif // CYGONCE_HAL_PLATFORM_SETUP_H
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/at91/current/include/pkgconf/mlt_arm_at91_eb40_ram.h @@ -0,0 +1,20 @@ +// eCos memory layout - Mon Jul 23 11:49:04 2001 + +// This is a generated file - do not edit + +#ifndef __ASSEMBLER__ +#include <cyg/infra/cyg_type.h> +#include <stddef.h> + +#endif +#define CYGMEM_REGION_sram (0) +#define CYGMEM_REGION_sram_SIZE (0x1000) +#define CYGMEM_REGION_sram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) +#define CYGMEM_REGION_ram (0x2000000) +#define CYGMEM_REGION_ram_SIZE (0x80000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__heap1) []; +#endif +#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1)) +#define CYGMEM_SECTION_heap1_SIZE (0x2080000 - (size_t) CYG_LABEL_NAME (__heap1))
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/at91/current/include/pkgconf/mlt_arm_at91_eb40_ram.ldi @@ -0,0 +1,28 @@ +// eCos memory layout - Mon Jul 23 11:49:04 2001 + +// This is a generated file - do not edit + +#include <cyg/infra/cyg_type.inc> + +MEMORY +{ + sram : ORIGIN = 0, LENGTH = 0x1000 + ram : ORIGIN = 0x2000000, LENGTH = 0x80000 +} + +SECTIONS +{ + SECTIONS_BEGIN + SECTION_fixed_vectors (sram, 0x20, LMA_EQ_VMA) + SECTION_rom_vectors (ram, 0x2020000, LMA_EQ_VMA) + SECTION_text (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fini (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_rodata (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_rodata1 (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fixup (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_gcc_except_table (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_data (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA) + CYG_LABEL_DEFN(__heap1) = ALIGN (0x8); + SECTIONS_END +}
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/at91/current/include/pkgconf/mlt_arm_at91_eb40_ram.mlt @@ -0,0 +1,14 @@ +version 0 +region sram 0 1000 0 !On-chip SRAM +region ram 2000000 80000 0 ! +section fixed_vectors 0 1 0 1 1 0 1 0 20 20 ! +section rom_vectors 0 1 0 1 1 1 1 1 2020000 2020000 text text ! +section text 0 4 0 1 0 1 0 1 fini fini ! +section fini 0 4 0 1 0 1 0 1 rodata rodata ! +section rodata 0 4 0 1 0 1 0 1 rodata1 rodata1 ! +section rodata1 0 4 0 1 0 1 0 1 fixup fixup ! +section fixup 0 4 0 1 0 1 0 1 gcc_except_table gcc_except_table ! +section gcc_except_table 0 4 0 1 0 1 0 1 data data ! +section data 0 4 0 1 0 1 0 1 bss bss ! +section bss 0 4 0 1 0 1 0 1 heap1 heap1 ! +section heap1 0 8 0 0 0 0 0 0 !
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/at91/current/include/pkgconf/mlt_arm_at91_eb40_rom.h @@ -0,0 +1,25 @@ +// eCos memory layout - Wed Apr 11 13:49:55 2001 + +// This is a generated file - do not edit + +#ifndef __ASSEMBLER__ +#include <cyg/infra/cyg_type.h> +#include <stddef.h> + +#endif +#define CYGMEM_REGION_ram (0x02000000) +#define CYGMEM_REGION_ram_SIZE (0x80000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) +#define CYGMEM_REGION_rom (0x01000000) +#define CYGMEM_REGION_rom_SIZE (0x20000) +#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R) +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__reserved_bootmon) []; +#endif +#define CYGMEM_SECTION_reserved_bootmon (CYG_LABEL_NAME (__reserved_bootmon)) +#define CYGMEM_SECTION_reserved_bootmon_SIZE (0x10000) +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__heap1) []; +#endif +#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1)) +#define CYGMEM_SECTION_heap1_SIZE (0x02080000 - (size_t) CYG_LABEL_NAME (__heap1))
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/at91/current/include/pkgconf/mlt_arm_at91_eb40_rom.ldi @@ -0,0 +1,30 @@ +// eCos memory layout - Wed Apr 11 13:49:55 2001 + +// This is a generated file - do not edit + +#include <cyg/infra/cyg_type.inc> + +MEMORY +{ + sram : ORIGIN = 0x00000000, LENGTH = 0x2000 + ram : ORIGIN = 0x02000000, LENGTH = 0x80000 + rom : ORIGIN = 0x01000000, LENGTH = 0x20000 +} + +SECTIONS +{ + SECTIONS_BEGIN + CYG_LABEL_DEFN(__reserved_bootmon) = 0x01000000; . = CYG_LABEL_DEFN(__reserved_bootmon) + 0x10000; + SECTION_rom_vectors (rom, ALIGN (0x8), LMA_EQ_VMA) + SECTION_text (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_fini (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_rodata (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_rodata1 (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fixup (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_gcc_except_table (rom, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fixed_vectors (sram, 0x20, LMA_EQ_VMA) + SECTION_data (ram, 0x02000000, FOLLOWING (.gcc_except_table)) + SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA) + CYG_LABEL_DEFN(__heap1) = ALIGN (0x8); + SECTIONS_END +}
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/at91/current/include/pkgconf/mlt_arm_at91_eb40_rom.mlt @@ -0,0 +1,16 @@ +version 0 +region sram 0 80000 00100000 ! +region ram 0 80000 00100000 ! +region rom 01000000 20000 1 ! +section fixed_vectors 0 1 0 1 1 0 1 0 20 20 ! +section data 0 1 1 1 1 1 0 0 00100000 bss ! +section bss 0 4 0 1 0 1 0 1 heap1 heap1 ! +section heap1 0 8 0 0 0 0 0 0 ! +section reserved_bootmon 10000 1 0 0 1 1 1 1 01000000 01000000 rom_vectors rom_vectors ! +section rom_vectors 0 8 0 1 0 1 0 1 text text ! +section text 0 1 0 1 0 1 0 1 fini fini ! +section fini 0 4 0 1 0 1 0 1 rodata rodata ! +section rodata 0 4 0 1 0 1 0 1 rodata1 rodata1 ! +section rodata1 0 4 0 1 0 1 0 1 fixup fixup ! +section fixup 0 4 0 1 0 1 0 1 gcc_except_table gcc_except_table ! +section gcc_except_table 0 4 0 1 0 0 0 1 data !
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/at91/current/include/pkgconf/mlt_arm_at91_eb40_romram.h @@ -0,0 +1,20 @@ +// eCos memory layout - Mon Jul 23 11:49:04 2001 + +// This is a generated file - do not edit + +#ifndef __ASSEMBLER__ +#include <cyg/infra/cyg_type.h> +#include <stddef.h> + +#endif +#define CYGMEM_REGION_sram (0) +#define CYGMEM_REGION_sram_SIZE (0x1000) +#define CYGMEM_REGION_sram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) +#define CYGMEM_REGION_ram (0x2000000) +#define CYGMEM_REGION_ram_SIZE (0x80000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__heap1) []; +#endif +#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1)) +#define CYGMEM_SECTION_heap1_SIZE (0x2080000 - (size_t) CYG_LABEL_NAME (__heap1))
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/at91/current/include/pkgconf/mlt_arm_at91_eb40_romram.ldi @@ -0,0 +1,28 @@ +// eCos memory layout - Mon Jul 23 11:49:04 2001 + +// This is a generated file - do not edit + +#include <cyg/infra/cyg_type.inc> + +MEMORY +{ + sram : ORIGIN = 0, LENGTH = 0x1000 + ram : ORIGIN = 0x2000000, LENGTH = 0x80000 +} + +SECTIONS +{ + SECTIONS_BEGIN + SECTION_fixed_vectors (sram, 0x20, LMA_EQ_VMA) + SECTION_rom_vectors (ram, 0x2000000, LMA_EQ_VMA) + SECTION_text (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fini (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_rodata (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_rodata1 (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fixup (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_gcc_except_table (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_data (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA) + CYG_LABEL_DEFN(__heap1) = ALIGN (0x8); + SECTIONS_END +}
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/at91/current/include/pkgconf/mlt_arm_at91_eb40_romram.mlt @@ -0,0 +1,14 @@ +version 0 +region sram 0 1000 0 !On-chip SRAM +region ram 2000000 80000 0 ! +section fixed_vectors 0 1 0 1 1 0 1 0 20 20 ! +section rom_vectors 0 1 0 1 1 1 1 1 2000000 2000000 text text ! +section text 0 4 0 1 0 1 0 1 fini fini ! +section fini 0 4 0 1 0 1 0 1 rodata rodata ! +section rodata 0 4 0 1 0 1 0 1 rodata1 rodata1 ! +section rodata1 0 4 0 1 0 1 0 1 fixup fixup ! +section fixup 0 4 0 1 0 1 0 1 gcc_except_table gcc_except_table ! +section gcc_except_table 0 4 0 1 0 1 0 1 data data ! +section data 0 4 0 1 0 1 0 1 bss bss ! +section bss 0 4 0 1 0 1 0 1 heap1 heap1 ! +section heap1 0 8 0 0 0 0 0 0 !
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/at91/current/include/plf_io.h @@ -0,0 +1,302 @@ +#ifndef CYGONCE_HAL_PLF_IO_H +#define CYGONCE_HAL_PLF_IO_H +//============================================================================= +// +// plf_io.h +// +// Platform specific registers +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jskov +// Contributors:jskov, gthomas +// Date: 2001-07-12 +// Purpose: AT91/EB40 platform specific registers +// Description: +// Usage: #include <cyg/hal/plf_io.h> +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +// USART + +#define AT91_USART0 0xFFFD0000 +#define AT91_USART1 0xFFFCC000 + +#define AT91_US_CR 0x00 // Control register +#define AT91_US_CR_RxRESET (1<<2) +#define AT91_US_CR_TxRESET (1<<3) +#define AT91_US_CR_RxENAB (1<<4) +#define AT91_US_CR_RxDISAB (1<<5) +#define AT91_US_CR_TxENAB (1<<6) +#define AT91_US_CR_TxDISAB (1<<7) +#define AT91_US_CR_RSTATUS (1<<8) +#define AT91_US_MR 0x04 // Mode register +#define AT91_US_MR_CLOCK 4 +#define AT91_US_MR_CLOCK_MCK (0<<AT91_US_MR_CLOCK) +#define AT91_US_MR_CLOCK_MCK8 (1<<AT91_US_MR_CLOCK) +#define AT91_US_MR_CLOCK_SCK (2<<AT91_US_MR_CLOCK) +#define AT91_US_MR_LENGTH 6 +#define AT91_US_MR_LENGTH_5 (0<<AT91_US_MR_LENGTH) +#define AT91_US_MR_LENGTH_6 (1<<AT91_US_MR_LENGTH) +#define AT91_US_MR_LENGTH_7 (2<<AT91_US_MR_LENGTH) +#define AT91_US_MR_LENGTH_8 (3<<AT91_US_MR_LENGTH) +#define AT91_US_MR_SYNC 8 +#define AT91_US_MR_SYNC_ASYNC (0<<AT91_US_MR_SYNC) +#define AT91_US_MR_SYNC_SYNC (1<<AT91_US_MR_SYNC) +#define AT91_US_MR_PARITY 9 +#define AT91_US_MR_PARITY_EVEN (0<<AT91_US_MR_PARITY) +#define AT91_US_MR_PARITY_ODD (1<<AT91_US_MR_PARITY) +#define AT91_US_MR_PARITY_SPACE (2<<AT91_US_MR_PARITY) +#define AT91_US_MR_PARITY_MARK (3<<AT91_US_MR_PARITY) +#define AT91_US_MR_PARITY_NONE (4<<AT91_US_MR_PARITY) +#define AT91_US_MR_PARITY_MULTI (6<<AT91_US_MR_PARITY) +#define AT91_US_MR_STOP 12 +#define AT91_US_MR_STOP_1 (0<<AT91_US_MR_STOP) +#define AT91_US_MR_STOP_1_5 (1<<AT91_US_MR_STOP) +#define AT91_US_MR_STOP_2 (2<<AT91_US_MR_STOP) +#define AT91_US_MR_MODE 14 +#define AT91_US_MR_MODE_NORMAL (0<<AT91_US_MR_MODE) +#define AT91_US_MR_MODE_ECHO (1<<AT91_US_MR_MODE) +#define AT91_US_MR_MODE_LOCAL (2<<AT91_US_MR_MODE) +#define AT91_US_MR_MODE_REMOTE (3<<AT91_US_MR_MODE) +#define AT91_US_MR_MODE9 17 +#define AT91_US_MR_CLKO 18 +#define AT91_US_IER 0x08 // Interrupt enable register +#define AT91_US_IER_RxRDY (1<<0) // Receive data ready +#define AT91_US_IER_TxRDY (1<<1) // Transmitter ready +#define AT91_US_IER_RxBRK (1<<2) // Break received +#define AT91_US_IER_ENDRX (1<<3) // Rx end +#define AT91_US_IER_ENDTX (1<<4) // Tx end +#define AT91_US_IER_OVRE (1<<5) // Rx overflow +#define AT91_US_IER_FRAME (1<<6) // Rx framing error +#define AT91_US_IER_PARITY (1<<7) // Rx parity +#define AT91_US_IER_TIMEOUT (1<<8) // Rx timeout +#define AT91_US_IER_TxEMPTY (1<<9) // Tx empty +#define AT91_US_IDR 0x0C // Interrupt disable register +#define AT91_US_IMR 0x10 // Interrupt mask register +#define AT91_US_CSR 0x14 // Channel status register +#define AT91_US_CSR_RxRDY 0x01 // Receive data ready +#define AT91_US_CSR_TxRDY 0x02 // Transmit ready +#define AT91_US_RHR 0x18 // Receive holding register +#define AT91_US_THR 0x1C // Transmit holding register +#define AT91_US_BRG 0x20 // Baud rate generator +#define AT91_US_RTO 0x24 // Receive time out +#define AT91_US_TTG 0x28 // Transmit timer guard + +#define AT91_US_BAUD(baud) (CYGNUM_HAL_ARM_AT91_CLOCK_SPEED/(16*(baud))) + +// PIO + +#define AT91_PIO 0xFFFF0000 + +#define AT91_PIO_PER 0x00 // PIO enable +#define AT91_PIO_PDR 0x04 // PIO disable +#define AT91_PIO_PSR 0x08 // PIO status +#define AT91_PIO_OER 0x10 // Output enable +#define AT91_PIO_SODR 0x30 // Set out bits +#define AT91_PIO_CODR 0x34 // Clear out bits + +// Advanced Interrupt Controller (AIC) + +#define AT91_AIC 0xFFFFF000 + +#define AT91_AIC_SMR0 ((0*4)+0x000) +#define AT91_AIC_SMR1 ((1*4)+0x000) +#define AT91_AIC_SMR2 ((2*4)+0x000) +#define AT91_AIC_SMR3 ((3*4)+0x000) +#define AT91_AIC_SMR4 ((4*4)+0x000) +#define AT91_AIC_SMR5 ((5*4)+0x000) +#define AT91_AIC_SMR6 ((6*4)+0x000) +#define AT91_AIC_SMR7 ((7*4)+0x000) +#define AT91_AIC_SMR8 ((8*4)+0x000) +#define AT91_AIC_SMR9 ((9*4)+0x000) +#define AT91_AIC_SMR10 ((10*4)+0x000) +#define AT91_AIC_SMR11 ((11*4)+0x000) +#define AT91_AIC_SMR12 ((12*4)+0x000) +#define AT91_AIC_SMR13 ((13*4)+0x000) +#define AT91_AIC_SMR14 ((14*4)+0x000) +#define AT91_AIC_SMR15 ((15*4)+0x000) +#define AT91_AIC_SMR16 ((16*4)+0x000) +#define AT91_AIC_SMR17 ((17*4)+0x000) +#define AT91_AIC_SMR18 ((18*4)+0x000) +#define AT91_AIC_SMR19 ((19*4)+0x000) +#define AT91_AIC_SMR20 ((20*4)+0x000) +#define AT91_AIC_SMR21 ((21*4)+0x000) +#define AT91_AIC_SMR22 ((22*4)+0x000) +#define AT91_AIC_SMR23 ((23*4)+0x000) +#define AT91_AIC_SMR24 ((24*4)+0x000) +#define AT91_AIC_SMR25 ((25*4)+0x000) +#define AT91_AIC_SMR26 ((26*4)+0x000) +#define AT91_AIC_SMR27 ((27*4)+0x000) +#define AT91_AIC_SMR28 ((28*4)+0x000) +#define AT91_AIC_SMR29 ((29*4)+0x000) +#define AT91_AIC_SMR30 ((30*4)+0x000) +#define AT91_AIC_SMR31 ((31*4)+0x000) +#define AT91_AIC_SMR_LEVEL_LOW (0<<5) +#define AT91_AIC_SMR_LEVEL_HI (2<<5) +#define AT91_AIC_SMR_EDGE_NEG (1<<5) +#define AT91_AIC_SMR_EDGE_POS (3<<5) +#define AT91_AIC_SMR_PRIORITY 0x07 +#define AT91_AIC_SVR0 ((0*4)+0x080) +#define AT91_AIC_SVR1 ((1*4)+0x080) +#define AT91_AIC_SVR2 ((2*4)+0x080) +#define AT91_AIC_SVR3 ((3*4)+0x080) +#define AT91_AIC_SVR4 ((4*4)+0x080) +#define AT91_AIC_SVR5 ((5*4)+0x080) +#define AT91_AIC_SVR6 ((6*4)+0x080) +#define AT91_AIC_SVR7 ((7*4)+0x080) +#define AT91_AIC_SVR8 ((8*4)+0x080) +#define AT91_AIC_SVR9 ((9*4)+0x080) +#define AT91_AIC_SVR10 ((10*4)+0x080) +#define AT91_AIC_SVR11 ((11*4)+0x080) +#define AT91_AIC_SVR12 ((12*4)+0x080) +#define AT91_AIC_SVR13 ((13*4)+0x080) +#define AT91_AIC_SVR14 ((14*4)+0x080) +#define AT91_AIC_SVR15 ((15*4)+0x080) +#define AT91_AIC_SVR16 ((16*4)+0x080) +#define AT91_AIC_SVR17 ((17*4)+0x080) +#define AT91_AIC_SVR18 ((18*4)+0x080) +#define AT91_AIC_SVR19 ((19*4)+0x080) +#define AT91_AIC_SVR20 ((20*4)+0x080) +#define AT91_AIC_SVR21 ((21*4)+0x080) +#define AT91_AIC_SVR22 ((22*4)+0x080) +#define AT91_AIC_SVR23 ((23*4)+0x080) +#define AT91_AIC_SVR24 ((24*4)+0x080) +#define AT91_AIC_SVR25 ((25*4)+0x080) +#define AT91_AIC_SVR26 ((26*4)+0x080) +#define AT91_AIC_SVR27 ((27*4)+0x080) +#define AT91_AIC_SVR28 ((28*4)+0x080) +#define AT91_AIC_SVR29 ((29*4)+0x080) +#define AT91_AIC_SVR30 ((30*4)+0x080) +#define AT91_AIC_SVR31 ((31*4)+0x080) +#define AT91_AIC_IVR 0x100 +#define AT91_AIC_FVR 0x104 +#define AT91_AIC_ISR 0x108 +#define AT91_AIC_IPR 0x10C +#define AT91_AIC_IMR 0x110 +#define AT91_AIC_CISR 0x114 +#define AT91_AIC_IECR 0x120 +#define AT91_AIC_IDCR 0x124 +#define AT91_AIC_ICCR 0x128 +#define AT91_AIC_ISCR 0x12C +#define AT91_AIC_EOI 0x130 +#define AT91_AIC_SVR 0x134 + +// Timer / counter + +#define AT91_TC 0xFFFE0000 +#define AT91_TC_TC0 0x00 +#define AT91_TC_CCR 0x00 +#define AT91_TC_CCR_CLKEN 0x01 +#define AT91_TC_CCR_CLKDIS 0x02 +#define AT91_TC_CCR_TRIG 0x04 +#define AT91_TC_CMR 0x04 +// Capture mode definitions +#define AT91_TC_CMR_CLKS 0 +#define AT91_TC_CMR_CLKS_MCK2 (0<<0) +#define AT91_TC_CMR_CLKS_MCK8 (1<<0) +#define AT91_TC_CMR_CLKS_MCK32 (2<<0) +#define AT91_TC_CMR_CLKS_MCK128 (3<<0) +#define AT91_TC_CMR_CLKS_MCK1024 (4<<0) +#define AT91_TC_CMR_CLKS_XC0 (5<<0) +#define AT91_TC_CMR_CLKS_XC1 (6<<0) +#define AT91_TC_CMR_CLKS_XC2 (7<<0) +#define AT91_TC_CMR_CLKI (1<<3) +#define AT91_TC_CMR_BURST_NONE (0<<4) +#define AT91_TC_CMR_BURST_XC0 (1<<4) +#define AT91_TC_CMR_BURST_XC1 (2<<4) +#define AT91_TC_CMR_BURST_XC2 (3<<4) +#define AT91_TC_CMR_LDBSTOP (1<<6) +#define AT91_TC_CMR_LDBDIS (1<<7) +#define AT91_TC_CMR_TRIG_NONE (0<<8) +#define AT91_TC_CMR_TRIG_NEG (1<<8) +#define AT91_TC_CMR_TRIG_POS (2<<8) +#define AT91_TC_CMR_TRIG_BOTH (3<<8) +#define AT91_TC_CMR_EXT_TRIG_TIOB (0<<10) +#define AT91_TC_CMR_EXT_TRIG_TIOA (1<<10) +#define AT91_TC_CMR_CPCTRG (1<<14) +#define AT91_TC_CMR_LDRA_NONE (0<<16) +#define AT91_TC_CMR_LDRA_TIOA_NEG (1<<16) +#define AT91_TC_CMR_LDRA_TIOA_POS (2<<16) +#define AT91_TC_CMR_LDRA_TIOA_BOTH (3<<16) +#define AT91_TC_CMR_LDRB_NONE (0<<16) +#define AT91_TC_CMR_LDRB_TIOA_NEG (1<<16) +#define AT91_TC_CMR_LDRB_TIOA_POS (2<<16) +#define AT91_TC_CMR_LDRB_TIOA_BOTH (3<<16) +// Waveform mode definitions [missing] +#define AT91_TC_CV 0x10 +#define AT91_TC_RA 0x14 +#define AT91_TC_RB 0x18 +#define AT91_TC_RC 0x1C +#define AT91_TC_SR 0x20 +#define AT91_TC_SR_COVF (1<<0) // Counter overrun +#define AT91_TC_SR_LOVR (1<<1) // Load overrun +#define AT91_TC_SR_CPA (1<<2) // RA compare +#define AT91_TC_SR_CPB (1<<3) // RB compare +#define AT91_TC_SR_CPC (1<<4) // RC compare +#define AT91_TC_SR_LDRA (1<<5) // Load A status +#define AT91_TC_SR_LDRB (1<<6) // Load B status +#define AT91_TC_SR_EXT (1<<7) // External trigger +#define AT91_TC_SR_CLKSTA (1<<16) // Clock enable/disable status +#define AT91_TC_SR_MTIOA (1<<17) // TIOA mirror +#define AT91_TC_SR_MTIOB (1<<18) // TIOB mirror +#define AT91_TC_IER 0x24 +#define AT91_TC_IER_COVF (1<<0) // Counter overrun +#define AT91_TC_IER_LOVR (1<<1) // Load overrun +#define AT91_TC_IER_CPA (1<<2) // RA compare +#define AT91_TC_IER_CPB (1<<3) // RB compare +#define AT91_TC_IER_CPC (1<<4) // RC compare +#define AT91_TC_IER_LDRA (1<<5) // Load A status +#define AT91_TC_IER_LDRB (1<<6) // Load B status +#define AT91_TC_IER_EXT (1<<7) // External trigger +#define AT91_TC_IDR 0x28 +#define AT91_TC_IMR 0x2C +#define AT91_TC_TC1 0x40 +#define AT91_TC_TC2 0x80 +#define AT91_TC_BCR 0xC0 +#define AT91_TC_BCR_SYNC 0x01 +#define AT91_TC_BMR 0xC4 + +// External Bus Interface + +#define AT91_EBI 0xFFE00000 +#define AT91_EBI_RCR 0x20 // Reset control + +// Power Saveings control + +#define AT91_PS 0xFFFF4000 +#define AT91_PS_CR 0x000 // Control +#define AT91_PS_PCER 0x004 // Peripheral clock enable +#define AT91_PS_PCDR 0x004 // Peripheral clock disable +#define AT91_PS_PCSR 0x004 // Peripheral clock status + +//----------------------------------------------------------------------------- +// end of plf_io.h +#endif // CYGONCE_HAL_PLF_IO_H
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/at91/current/include/plf_stub.h @@ -0,0 +1,77 @@ +#ifndef CYGONCE_HAL_PLF_STUB_H +#define CYGONCE_HAL_PLF_STUB_H + +//============================================================================= +// +// plf_stub.h +// +// Platform header for GDB stub support. +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jskov +// Contributors:jskov, gthomas +// Date: 2001-07-12 +// Purpose: Platform HAL stub support for AT91/EB40 boards. +// Usage: #include <cyg/hal/plf_stub.h> +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include <pkgconf/hal.h> +#include CYGBLD_HAL_PLATFORM_H + +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + +#include <cyg/infra/cyg_type.h> // CYG_UNUSED_PARAM + +#include <cyg/hal/arm_stub.h> // architecture stub support + +//---------------------------------------------------------------------------- +// Define some platform specific communication details. This is mostly +// handled by hal_if now, but we need to make sure the comms tables are +// properly initialized. + +externC void cyg_hal_plf_comms_init(void); + +#define HAL_STUB_PLATFORM_INIT_SERIAL() cyg_hal_plf_comms_init() + +#define HAL_STUB_PLATFORM_SET_BAUD_RATE(baud) CYG_UNUSED_PARAM(int, (baud)) +#define HAL_STUB_PLATFORM_INTERRUPTIBLE 0 +#define HAL_STUB_PLATFORM_INIT_BREAK_IRQ() CYG_EMPTY_STATEMENT + +//---------------------------------------------------------------------------- +// Stub initializer. +#define HAL_STUB_PLATFORM_INIT() CYG_EMPTY_STATEMENT + +#endif // ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + +//----------------------------------------------------------------------------- +#endif // CYGONCE_HAL_PLF_STUB_H +// End of plf_stub.h
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/at91/current/misc/redboot_RAM.ecm @@ -0,0 +1,55 @@ +cdl_savefile_version 1; +cdl_savefile_command cdl_savefile_version {}; +cdl_savefile_command cdl_savefile_command {}; +cdl_savefile_command cdl_configuration { description hardware template package }; +cdl_savefile_command cdl_package { value_source user_value wizard_value inferred_value }; +cdl_savefile_command cdl_component { value_source user_value wizard_value inferred_value }; +cdl_savefile_command cdl_option { value_source user_value wizard_value inferred_value }; +cdl_savefile_command cdl_interface { value_source user_value wizard_value inferred_value }; + +cdl_configuration eCos { + description "" ; + hardware at91 ; + template redboot ; + package -hardware CYGPKG_HAL_ARM current ; + package -hardware CYGPKG_HAL_ARM_AT91 current ; + package -hardware CYGPKG_DEVS_FLASH_AT91 current ; + package -template CYGPKG_HAL current ; + package -template CYGPKG_INFRA current ; + package -template CYGPKG_REDBOOT current ; + package CYGPKG_IO_FLASH current ; +}; + +cdl_option CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE { + user_value 6144 +}; + +cdl_option CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT { + user_value 0 +}; + +cdl_option CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM { + inferred_value 0 +}; + +cdl_option CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS { + inferred_value 1 +}; + +cdl_option CYGSEM_HAL_USE_ROM_MONITOR { + inferred_value 0 0 +}; + +cdl_component CYGBLD_BUILD_REDBOOT { + user_value 1 +}; + +cdl_option CYGOPT_REDBOOT_FIS { + user_value 0 +}; + +cdl_component CYGSEM_REDBOOT_FLASH_CONFIG { + user_value 0 +}; + +
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/at91/current/misc/redboot_ROM.ecm @@ -0,0 +1,59 @@ +cdl_savefile_version 1; +cdl_savefile_command cdl_savefile_version {}; +cdl_savefile_command cdl_savefile_command {}; +cdl_savefile_command cdl_configuration { description hardware template package }; +cdl_savefile_command cdl_package { value_source user_value wizard_value inferred_value }; +cdl_savefile_command cdl_component { value_source user_value wizard_value inferred_value }; +cdl_savefile_command cdl_option { value_source user_value wizard_value inferred_value }; +cdl_savefile_command cdl_interface { value_source user_value wizard_value inferred_value }; + +cdl_configuration eCos { + description "" ; + hardware at91 ; + template redboot ; + package -hardware CYGPKG_HAL_ARM current ; + package -hardware CYGPKG_HAL_ARM_AT91 current ; + package -hardware CYGPKG_DEVS_FLASH_AT91 current ; + package -template CYGPKG_HAL current ; + package -template CYGPKG_INFRA current ; + package -template CYGPKG_REDBOOT current ; + package CYGPKG_IO_FLASH current ; +}; + +cdl_option CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE { + user_value 6144 +}; + +cdl_option CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT { + user_value 0 +}; + +cdl_option CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM { + inferred_value 0 +}; + +cdl_option CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS { + inferred_value 1 +}; + +cdl_option CYGSEM_HAL_ROM_MONITOR { + inferred_value 1 +}; + +cdl_option CYGSEM_HAL_USE_ROM_MONITOR { + inferred_value 0 0 +}; + +cdl_component CYG_HAL_STARTUP { + user_value ROM +}; + +cdl_component CYGBLD_BUILD_REDBOOT { + user_value 1 +}; + +cdl_option CYGOPT_REDBOOT_FIS { + user_value 0 +}; + +
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/at91/current/misc/redboot_ROMRAM.ecm @@ -0,0 +1,63 @@ +cdl_savefile_version 1; +cdl_savefile_command cdl_savefile_version {}; +cdl_savefile_command cdl_savefile_command {}; +cdl_savefile_command cdl_configuration { description hardware template package }; +cdl_savefile_command cdl_package { value_source user_value wizard_value inferred_value }; +cdl_savefile_command cdl_component { value_source user_value wizard_value inferred_value }; +cdl_savefile_command cdl_option { value_source user_value wizard_value inferred_value }; +cdl_savefile_command cdl_interface { value_source user_value wizard_value inferred_value }; + +cdl_configuration eCos { + description "" ; + hardware at91 ; + template redboot ; + package -hardware CYGPKG_HAL_ARM current ; + package -hardware CYGPKG_HAL_ARM_AT91 current ; + package -hardware CYGPKG_DEVS_FLASH_AT91 current ; + package -template CYGPKG_HAL current ; + package -template CYGPKG_INFRA current ; + package -template CYGPKG_REDBOOT current ; + package CYGPKG_IO_FLASH current ; +}; + +cdl_option CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE { + user_value 6144 +}; + +cdl_option CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT { + user_value 0 +}; + +cdl_option CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM { + inferred_value 0 +}; + +cdl_option CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS { + inferred_value 1 +}; + +cdl_option CYGSEM_HAL_ROM_MONITOR { + user_value 1 +}; + +cdl_option CYGSEM_HAL_USE_ROM_MONITOR { + inferred_value 0 0 +}; + +cdl_component CYG_HAL_STARTUP { + user_value ROMRAM +}; + +cdl_component CYGBLD_BUILD_REDBOOT { + user_value 1 +}; + +cdl_option CYGOPT_REDBOOT_FIS { + user_value 0 +}; + +cdl_option CYGNUM_FLASH_WORKSPACE_SIZE { + user_value 0x00000200 +}; + +
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/at91/current/src/at91_misc.c @@ -0,0 +1,277 @@ +//========================================================================== +// +// at91_misc.c +// +// HAL misc board support code for Atmel AT91/EB40 +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas, jskov +// Date: 2001-07-12 +// Purpose: HAL board support +// Description: Implementations of HAL board interfaces +// +//####DESCRIPTIONEND#### +// +//========================================================================*/ + +#include <pkgconf/hal.h> + +#include <cyg/infra/cyg_type.h> // base types +#include <cyg/infra/cyg_trac.h> // tracing macros +#include <cyg/infra/cyg_ass.h> // assertion macros + +#include <cyg/hal/hal_io.h> // IO macros +#include <cyg/hal/hal_arch.h> // Register state info +#include <cyg/hal/hal_diag.h> +#include <cyg/hal/hal_intr.h> // necessary? +#include <cyg/hal/hal_cache.h> +#include <cyg/hal/hal_if.h> // calling interface +#include <cyg/hal/hal_misc.h> // helper functions +#ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT +#include <cyg/hal/drv_api.h> // HAL ISR support +#endif +#include <cyg/hal/plf_io.h> // platform registers + +static cyg_uint32 _period; + +void hal_clock_initialize(cyg_uint32 period) +{ + CYG_ADDRESS timer = AT91_TC+AT91_TC_TC0; + + CYG_ASSERT(period < 0x10000, "Invalid clock period"); + + // Disable counter + HAL_WRITE_UINT32(timer+AT91_TC_CCR, AT91_TC_CCR_CLKDIS); + + // Set registers + HAL_WRITE_UINT32(timer+AT91_TC_CMR, AT91_TC_CMR_CPCTRG | // Reset counter on CPC + AT91_TC_CMR_CLKS_MCK32); // 1 MHz + HAL_WRITE_UINT32(timer+AT91_TC_RC, period); + + // Start timer + HAL_WRITE_UINT32(timer+AT91_TC_CCR, AT91_TC_CCR_TRIG | AT91_TC_CCR_CLKEN); + + // Enable timer 0 interrupt + HAL_WRITE_UINT32(timer+AT91_TC_IER, AT91_TC_IER_CPC); +} + +void hal_clock_reset(cyg_uint32 vector, cyg_uint32 period) +{ + CYG_ADDRESS timer = AT91_TC+AT91_TC_TC0; + cyg_uint32 sr; + + CYG_ASSERT(period < 0x10000, "Invalid clock period"); + + HAL_READ_UINT32(timer+AT91_TC_SR, sr); // Clear interrupt + HAL_INTERRUPT_ACKNOWLEDGE(CYGNUM_HAL_INTERRUPT_RTC); + + if (period != _period) { + hal_clock_initialize(period); + } + _period = period; + +} + +void hal_clock_read(cyg_uint32 *pvalue) +{ + CYG_ADDRESS timer = AT91_TC+AT91_TC_TC0; + cyg_uint32 val; + + HAL_READ_UINT32(timer+AT91_TC_CV, val); + *pvalue = val; +} + +// ------------------------------------------------------------------------- +// +// Delay for some number of micro-seconds +// Use timer #2 in 1MHz mode +// +void hal_delay_us(cyg_int32 usecs) +{ + CYG_ADDRESS timer = AT91_TC+AT91_TC_TC2; + cyg_uint32 stat; + + // Disable counter + HAL_WRITE_UINT32(timer+AT91_TC_CCR, AT91_TC_CCR_CLKDIS); + + // Set registers + HAL_WRITE_UINT32(timer+AT91_TC_CMR, AT91_TC_CMR_CLKS_MCK32); // 1MHz + HAL_WRITE_UINT32(timer+AT91_TC_RA, 0); + HAL_WRITE_UINT32(timer+AT91_TC_RC, usecs); + + // Start timer + HAL_WRITE_UINT32(timer+AT91_TC_CCR, AT91_TC_CCR_TRIG | AT91_TC_CCR_CLKEN); + + // Wait for the compare + do { + HAL_READ_UINT32(timer+AT91_TC_SR, stat); + } while ((stat & AT91_TC_SR_CPC) == 0); +} + +// ------------------------------------------------------------------------- +// Hardware init +void hal_hardware_init(void) +{ + // Set up eCos/ROM interfaces + hal_if_init(); + + // Reset all interrupts + HAL_WRITE_UINT32(AT91_AIC+AT91_AIC_IDCR, 0xFFFFFFFF); + + // Make sure interrupt controller is happy + HAL_WRITE_UINT32(AT91_AIC+AT91_AIC_EOI, 0xFFFFFFFF); +} + +// +// This routine is called to respond to a hardware interrupt (IRQ). It +// should interrogate the hardware and return the IRQ vector number. + +int hal_IRQ_handler(void) +{ + cyg_uint32 irq_num; + cyg_uint32 ipr, imr; + + HAL_READ_UINT32(AT91_AIC+AT91_AIC_IPR, ipr); + HAL_READ_UINT32(AT91_AIC+AT91_AIC_IMR, imr); + ipr &= imr; + for (irq_num = 0; irq_num < 19; irq_num++) { + if (ipr & (1 << irq_num)) { + break; + } + } + + return irq_num; +} + +// +// Interrupt control +// + +void hal_interrupt_mask(int vector) +{ + CYG_ASSERT(vector <= CYGNUM_HAL_ISR_MAX && + vector >= CYGNUM_HAL_ISR_MIN , "Invalid vector"); + + HAL_WRITE_UINT32(AT91_AIC+AT91_AIC_IDCR, (1<<vector)); +} + +void hal_interrupt_unmask(int vector) +{ + CYG_ASSERT(vector <= CYGNUM_HAL_ISR_MAX && + vector >= CYGNUM_HAL_ISR_MIN , "Invalid vector"); + + HAL_WRITE_UINT32(AT91_AIC+AT91_AIC_IECR, (1<<vector)); +} + +void hal_interrupt_acknowledge(int vector) +{ + CYG_ASSERT(vector <= CYGNUM_HAL_ISR_MAX && + vector >= CYGNUM_HAL_ISR_MIN , "Invalid vector"); + + HAL_WRITE_UINT32(AT91_AIC+AT91_AIC_ICCR, (1<<vector)); + + // FIXME - This isn't 100% correct + HAL_WRITE_UINT32(AT91_AIC+AT91_AIC_EOI, 0xFFFFFFFF); +} + +void hal_interrupt_configure(int vector, int level, int up) +{ + cyg_uint32 mode; + + CYG_ASSERT(vector <= CYGNUM_HAL_ISR_MAX && + vector >= CYGNUM_HAL_ISR_MIN , "Invalid vector"); + + if (level) { + if (up) { + mode = AT91_AIC_SMR_LEVEL_HI; + } else { + mode = AT91_AIC_SMR_LEVEL_LOW; + } + } else { + if (up) { + mode = AT91_AIC_SMR_EDGE_POS; + } else { + mode = AT91_AIC_SMR_EDGE_NEG; + } + } + mode |= 7; // Default priority + HAL_WRITE_UINT32(AT91_AIC+(AT91_AIC_SMR0+(vector*4)), mode); +} + +void hal_interrupt_set_level(int vector, int level) +{ + cyg_uint32 mode; + + CYG_ASSERT(vector <= CYGNUM_HAL_ISR_MAX && + vector >= CYGNUM_HAL_ISR_MIN , "Invalid vector"); + CYG_ASSERT(level >= 1 && level <= 7, "Invalid level"); + + HAL_READ_UINT32(AT91_AIC+(AT91_AIC_SMR0+(vector*4)), mode); + mode = (mode & ~AT91_AIC_SMR_PRIORITY) | level; + HAL_WRITE_UINT32(AT91_AIC+(AT91_AIC_SMR0+(vector*4)), mode); +} + +void hal_show_IRQ(int vector, int data, int handler) +{ +// UNDEFINED(__FUNCTION__); // FIXME +} + +// +// Diagnostic LEDs - there are three colored LEDs which can be used +// to send a simple diagnostic value (8 bits) +// + +void +_at91_led(int val) +{ + int i, to; + + HAL_WRITE_UINT32(AT91_PIO+AT91_PIO_CODR, 0x06); // DATA+CLOCK LEDs off + for (to = 0; to < 0x200000; to++) ; + for (i = 0; i < 8; i++) { + HAL_WRITE_UINT32(AT91_PIO+AT91_PIO_SODR, ((val>>(7-i)) & 0x01)<<2); // DATA LED + HAL_WRITE_UINT32(AT91_PIO+AT91_PIO_SODR, 0x02); // CLOCK LED on + for (to = 0; to < 0x80000; to++) ; + HAL_WRITE_UINT32(AT91_PIO+AT91_PIO_CODR, 0x02); // CLOCK LED off + for (to = 0; to < 0x40000; to++) ; + HAL_WRITE_UINT32(AT91_PIO+AT91_PIO_CODR, 0x04); // DATA LED off + } +} + +void +set_leds(int val) +{ + HAL_WRITE_UINT32(AT91_PIO+AT91_PIO_CODR, 0x16); + HAL_WRITE_UINT32(AT91_PIO+AT91_PIO_SODR, val); +} + + +//-------------------------------------------------------------------------- +// EOF hal_misc.c
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/at91/current/src/hal_diag.c @@ -0,0 +1,315 @@ +/*============================================================================= +// +// hal_diag.c +// +// HAL diagnostic output code +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jskov +// Contributors:jskov, gthomas +// Date: 2001-07-12 +// Purpose: HAL diagnostic output +// Description: Implementations of HAL diagnostic output support. +// +//####DESCRIPTIONEND#### +// +//===========================================================================*/ + +#include <pkgconf/hal.h> +#include CYGBLD_HAL_PLATFORM_H + +#include <cyg/infra/cyg_type.h> // base types + +#include <cyg/hal/hal_arch.h> // SAVE/RESTORE GP macros +#include <cyg/hal/hal_io.h> // IO macros +#include <cyg/hal/hal_if.h> // interface API +#include <cyg/hal/hal_intr.h> // HAL_ENABLE/MASK/UNMASK_INTERRUPTS +#include <cyg/hal/hal_misc.h> // Helper functions +#include <cyg/hal/drv_api.h> // CYG_ISR_HANDLED + +#include <cyg/hal/plf_io.h> // USART registers + +//----------------------------------------------------------------------------- +typedef struct { + cyg_uint8* base; + cyg_int32 msec_timeout; + int isr_vector; +} channel_data_t; + +//----------------------------------------------------------------------------- + +static void +cyg_hal_plf_serial_init_channel(void* __ch_data) +{ + cyg_uint8* base = ((channel_data_t*)__ch_data)->base; + + // Reset device + HAL_WRITE_UINT32(base+AT91_US_CR, AT91_US_CR_RxRESET | AT91_US_CR_TxRESET); + + // 8-1-no parity. + HAL_WRITE_UINT32(base+AT91_US_MR, + AT91_US_MR_CLOCK_MCK | AT91_US_MR_LENGTH_8 | + AT91_US_MR_PARITY_NONE | AT91_US_MR_STOP_1); + + HAL_WRITE_UINT32(base+AT91_US_BRG, AT91_US_BAUD(CYGNUM_HAL_VIRTUAL_VECTOR_CHANNELS_DEFAULT_BAUD)); + + // Enable RX and TX + HAL_WRITE_UINT32(base+AT91_US_CR, AT91_US_CR_RxENAB | AT91_US_CR_TxENAB); +} + +void +cyg_hal_plf_serial_putc(void *__ch_data, char c) +{ + cyg_uint8* base = ((channel_data_t*)__ch_data)->base; + cyg_uint32 status, ch; + CYGARC_HAL_SAVE_GP(); + + do { + HAL_READ_UINT32(base+AT91_US_CSR, status); + } while ((status & AT91_US_CSR_TxRDY) == 0); + + ch = (cyg_uint32)c; + HAL_WRITE_UINT32(base+AT91_US_THR, ch); + + CYGARC_HAL_RESTORE_GP(); +} + +static cyg_bool +cyg_hal_plf_serial_getc_nonblock(void* __ch_data, cyg_uint8* ch) +{ + channel_data_t* chan = (channel_data_t*)__ch_data; + cyg_uint8* base = chan->base; + cyg_uint32 stat; + cyg_uint32 c; + + HAL_READ_UINT32(base+AT91_US_CSR, stat); + if ((stat & AT91_US_CSR_RxRDY) == 0) + return false; + + HAL_READ_UINT32(base+AT91_US_RHR, c); + *ch = (cyg_uint8)(c & 0xff); + + return true; +} + +cyg_uint8 +cyg_hal_plf_serial_getc(void* __ch_data) +{ + cyg_uint8 ch; + CYGARC_HAL_SAVE_GP(); + + while(!cyg_hal_plf_serial_getc_nonblock(__ch_data, &ch)); + + CYGARC_HAL_RESTORE_GP(); + return ch; +} + +static void +cyg_hal_plf_serial_write(void* __ch_data, const cyg_uint8* __buf, + cyg_uint32 __len) +{ + CYGARC_HAL_SAVE_GP(); + + while(__len-- > 0) + cyg_hal_plf_serial_putc(__ch_data, *__buf++); + + CYGARC_HAL_RESTORE_GP(); +} + +static void +cyg_hal_plf_serial_read(void* __ch_data, cyg_uint8* __buf, cyg_uint32 __len) +{ + CYGARC_HAL_SAVE_GP(); + + while(__len-- > 0) + *__buf++ = cyg_hal_plf_serial_getc(__ch_data); + + CYGARC_HAL_RESTORE_GP(); +} + +cyg_bool +cyg_hal_plf_serial_getc_timeout(void* __ch_data, cyg_uint8* ch) +{ + int delay_count; + channel_data_t* chan = (channel_data_t*)__ch_data; + cyg_bool res; + CYGARC_HAL_SAVE_GP(); + + delay_count = chan->msec_timeout * 10; // delay in .1 ms steps + + for(;;) { + res = cyg_hal_plf_serial_getc_nonblock(__ch_data, ch); + if (res || 0 == delay_count--) + break; + + CYGACC_CALL_IF_DELAY_US(100); + } + + CYGARC_HAL_RESTORE_GP(); + return res; +} + +static int +cyg_hal_plf_serial_control(void *__ch_data, __comm_control_cmd_t __func, ...) +{ + static int irq_state = 0; + channel_data_t* chan = (channel_data_t*)__ch_data; + cyg_uint8* base = ((channel_data_t*)__ch_data)->base; + int ret = 0; + CYGARC_HAL_SAVE_GP(); + + switch (__func) { + case __COMMCTL_IRQ_ENABLE: + irq_state = 1; + HAL_INTERRUPT_ACKNOWLEDGE(chan->isr_vector); + HAL_INTERRUPT_UNMASK(chan->isr_vector); + HAL_WRITE_UINT32(base+AT91_US_IER, AT91_US_IER_RxRDY); + break; + case __COMMCTL_IRQ_DISABLE: + ret = irq_state; + irq_state = 0; + HAL_INTERRUPT_MASK(chan->isr_vector); + HAL_WRITE_UINT32(base+AT91_US_IDR, AT91_US_IER_RxRDY); + break; + case __COMMCTL_DBG_ISR_VECTOR: + ret = chan->isr_vector; + break; + case __COMMCTL_SET_TIMEOUT: + { + va_list ap; + + va_start(ap, __func); + + ret = chan->msec_timeout; + chan->msec_timeout = va_arg(ap, cyg_uint32); + + va_end(ap); + } + default: + break; + } + CYGARC_HAL_RESTORE_GP(); + return ret; +} + +static int +cyg_hal_plf_serial_isr(void *__ch_data, int* __ctrlc, + CYG_ADDRWORD __vector, CYG_ADDRWORD __data) +{ + int res = 0; + channel_data_t* chan = (channel_data_t*)__ch_data; + cyg_uint32 c; + cyg_uint8 ch; + cyg_uint32 stat; + CYGARC_HAL_SAVE_GP(); + + *__ctrlc = 0; + HAL_READ_UINT32(chan->base+AT91_US_CSR, stat); + if ( (stat & AT91_US_CSR_RxRDY) != 0 ) { + + HAL_READ_UINT32(chan->base+AT91_US_RHR, c); + ch = (cyg_uint8)(c & 0xff); + if( cyg_hal_is_break( &ch , 1 ) ) + *__ctrlc = 1; + + res = CYG_ISR_HANDLED; + } + + HAL_INTERRUPT_ACKNOWLEDGE(chan->isr_vector); + + CYGARC_HAL_RESTORE_GP(); + return res; +} + +static channel_data_t at91_ser_channels[2] = { + { (cyg_uint8*)AT91_USART0, 1000, CYGNUM_HAL_INTERRUPT_USART0}, + { (cyg_uint8*)AT91_USART1, 1000, CYGNUM_HAL_INTERRUPT_USART1} +}; + +static void +cyg_hal_plf_serial_init(void) +{ + hal_virtual_comm_table_t* comm; + int cur; + + cur = CYGACC_CALL_IF_SET_CONSOLE_COMM(CYGNUM_CALL_IF_SET_COMM_ID_QUERY_CURRENT); + + // Init channels + cyg_hal_plf_serial_init_channel(&at91_ser_channels[0]); +#if CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS > 1 + cyg_hal_plf_serial_init_channel(&at91_ser_channels[1]); +#endif + + // Setup procs in the vector table + + // Set channel 0 + CYGACC_CALL_IF_SET_CONSOLE_COMM(0); + comm = CYGACC_CALL_IF_CONSOLE_PROCS(); + CYGACC_COMM_IF_CH_DATA_SET(*comm, &at91_ser_channels[0]); + CYGACC_COMM_IF_WRITE_SET(*comm, cyg_hal_plf_serial_write); + CYGACC_COMM_IF_READ_SET(*comm, cyg_hal_plf_serial_read); + CYGACC_COMM_IF_PUTC_SET(*comm, cyg_hal_plf_serial_putc); + CYGACC_COMM_IF_GETC_SET(*comm, cyg_hal_plf_serial_getc); + CYGACC_COMM_IF_CONTROL_SET(*comm, cyg_hal_plf_serial_control); + CYGACC_COMM_IF_DBG_ISR_SET(*comm, cyg_hal_plf_serial_isr); + CYGACC_COMM_IF_GETC_TIMEOUT_SET(*comm, cyg_hal_plf_serial_getc_timeout); + +#if CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS > 1 + // Set channel 1 + CYGACC_CALL_IF_SET_CONSOLE_COMM(1); + comm = CYGACC_CALL_IF_CONSOLE_PROCS(); + CYGACC_COMM_IF_CH_DATA_SET(*comm, &at91_ser_channels[1]); + CYGACC_COMM_IF_WRITE_SET(*comm, cyg_hal_plf_serial_write); + CYGACC_COMM_IF_READ_SET(*comm, cyg_hal_plf_serial_read); + CYGACC_COMM_IF_PUTC_SET(*comm, cyg_hal_plf_serial_putc); + CYGACC_COMM_IF_GETC_SET(*comm, cyg_hal_plf_serial_getc); + CYGACC_COMM_IF_CONTROL_SET(*comm, cyg_hal_plf_serial_control); + CYGACC_COMM_IF_DBG_ISR_SET(*comm, cyg_hal_plf_serial_isr); + CYGACC_COMM_IF_GETC_TIMEOUT_SET(*comm, cyg_hal_plf_serial_getc_timeout); +#endif + + // Restore original console + CYGACC_CALL_IF_SET_CONSOLE_COMM(cur); +} + +void +cyg_hal_plf_comms_init(void) +{ + static int initialized = 0; + + if (initialized) + return; + + initialized = 1; + + cyg_hal_plf_serial_init(); +} + +//----------------------------------------------------------------------------- +// End of hal_diag.c
--- a/packages/hal/arm/sa11x0/assabet/current/ChangeLog +++ b/packages/hal/arm/sa11x0/assabet/current/ChangeLog @@ -1,3 +1,9 @@ +2001-07-28 Stefan Eletzhofer <schuehle@t-online.de> + + * include/hal_platform_setup.h: + * cdl/hal_arm_sa11x0_assabet.cdl: Support additional timing setup + when Neponset board is available. + 2001-06-21 Jonathan Larmour <jlarmour@redhat.com> * images/redboot*: Remove. Don't bloat repository with things already
--- a/packages/hal/arm/sa11x0/assabet/current/cdl/hal_arm_sa11x0_assabet.cdl +++ b/packages/hal/arm/sa11x0/assabet/current/cdl/hal_arm_sa11x0_assabet.cdl @@ -220,6 +220,16 @@ cdl_package CYGPKG_HAL_ARM_SA11X0_ASSABE compiler flags used only in building this package, and details of which tests are built." + cdl_option CYGSEM_HAL_ARM_SA11X0_ASSABET_NEPONSET_TIMINGS { + display "Enable special timings for Neponset board" + flavor bool + default_value 0 + description " + Enable this option to force initialization of memory timing + parameters suitable for use with the Neponset expansion board. + This is optional as it does not work for some versions of + Assabet without the board plugged in." + } cdl_option CYGPKG_HAL_ARM_SA11X0_ASSABET_CFLAGS_ADD { display "Additional compiler flags"
--- a/packages/hal/arm/sa11x0/assabet/current/include/hal_platform_setup.h +++ b/packages/hal/arm/sa11x0/assabet/current/include/hal_platform_setup.h @@ -198,14 +198,18 @@ dram_table: .word SA11X0_DRAM0_CAS_0, 0xAAAAAA7F .word SA11X0_DRAM0_CAS_1, 0xAAAAAAAA .word SA11X0_DRAM0_CAS_2, 0xAAAAAAAA -// .word SA11X0_STATIC_CONTROL_0, 0x4B384B38 -// .word SA11X0_STATIC_CONTROL_1, 0x22212419 +#ifdef CYGSEM_HAL_ARM_SA11X0_ASSABET_NEPONSET_TIMINGS + .word SA11X0_STATIC_CONTROL_0, 0x4B384370 + .word SA11X0_STATIC_CONTROL_1, 0x22212419 +#endif .word SA11X0_EXP_BUS_CONFIGURATION, 0x994A994A .word SA11X0_REFRESH_CONFIGURATION, 0x49FC0327 .word SA11X0_DRAM2_CAS_0, 0xAAAAAA7F .word SA11X0_DRAM2_CAS_1, 0xAAAAAAAA .word SA11X0_DRAM2_CAS_2, 0xAAAAAAAA -// .word SA11X0_STATIC_CONTROL_2, 0x42194449 +#ifdef CYGSEM_HAL_ARM_SA11X0_ASSABET_NEPONSET_TIMINGS + .word SA11X0_STATIC_CONTROL_2, 0x42196669 +#endif .word SA11X0_SMROM_CONFIGURATION, 0xAFCCAFCC .word SA11X0_DRAM_CONFIGURATION, 0x72547254 // Disabled .word 0, 0
--- a/packages/hal/mips/arch/current/ChangeLog +++ b/packages/hal/mips/arch/current/ChangeLog @@ -4,7 +4,7 @@ 2001-07-20 Jonathan Larmour <jlarmour@ rate, thus allowing for runtime baud rate changes, and no dependency on platform CDL defines. -a2001-07-19 Gary Thomas <gthomas@redhat.com> +2001-07-19 Gary Thomas <gthomas@redhat.com> * src/redboot_linux_exec.c: Define DEFAULT_BAUD. The supporting CDL differs from platform to platform, so this define is used to
new file mode 100644 --- /dev/null +++ b/packages/hal/mn10300/stb/current/misc/stubrom.perm @@ -0,0 +1,26 @@ +# +# A configuration for building a GDB stub ROM for the STB board. +# +# To build the ROMs: +# 1. Create a build directory and cd into it. +# 2. Run: permtest.tcl --srcdir=<sourcedir> <sourcedir>/hal/mn10300/stb/current/misc/stubrom.perm +# Where <sourcedir> is the path to your source repository. +# 3. Run: make +# 4. Run: make -C hal/common/current/src/stubrom +# +# The file hal/common/current/src/stubrom/stubrom will be an ELF excutable of the ROM. +# Use objcopy to convert this to the appropriate format for your PROM burner. +# Enjoy! +# +# If you do not have permtest.tcl, then run the pkgconf command by hand and +# then edit pkgconf/hal.h to enable/disable the options as shown. +# + +pkgconf --target=mn10300_am33 --platform=stb --startup=rom --disable-kernel --disable-uitron --disable-libc --disable-libm --disable-io --disable-io_serial --disable-wallclock --disable-watchdog + +header hal.h { + enable CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + enable CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT + disable CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT + enable CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT +}
--- a/packages/hal/powerpc/quicc/current/ChangeLog +++ b/packages/hal/powerpc/quicc/current/ChangeLog @@ -1,3 +1,9 @@ +2001-07-31 Jonathan Larmour <jlarmour@redhat.com> +2001-07-31 Christoph Csebits <christoph.csebits@frequentis.com> + + * include/ppc8xx.h: 4 SCCs are supported by MPC860T, so don't + reserve space. + 2001-01-26 Jesper Skov <jskov@redhat.com> * src/quicc_smc1.c: Removed CYGSEM_HAL_VIRTUAL_VECTOR_DIAG check.
--- a/packages/hal/powerpc/quicc/current/include/ppc8xx.h +++ b/packages/hal/powerpc/quicc/current/include/ppc8xx.h @@ -809,9 +809,7 @@ typedef struct eppc { volatile unsigned char RSRVD31[0x1]; volatile unsigned char scc_sccs; /* SCC status reg */ volatile unsigned char RSRVD32[0x8]; - } scc_regs[2]; - - volatile unsigned char RSRVD120[0x40]; + } scc_regs[4]; /* SMC */ struct smc_regs {
new file mode 100644 --- /dev/null +++ b/packages/hal/sh/dreamcast/current/ChangeLog @@ -0,0 +1,29 @@ +2001-07-30 Jesper Skov <jskov@redhat.com> + + * New platform HAL, contributed by Takeshi Yaegashi (t@keshi.org) + +//=========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//===========================================================================
new file mode 100644 --- /dev/null +++ b/packages/hal/sh/dreamcast/current/cdl/hal_sh_sh7750_dreamcast.cdl @@ -0,0 +1,313 @@ +# ==================================================================== +# +# hal_sh_sh7750_dreamcast.cdl +# +# SEGA Dreamcast HAL package configuration data +# +# ==================================================================== +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Red Hat eCos Public License +# Version 1.1 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://www.redhat.com/ +# +# Software distributed under the License is distributed on an "AS IS" +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Configurable Operating System, +# released September 30, 1998. +# +# The Initial Developer of the Original Code is Red Hat. +# Portions created by Red Hat are +# Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +# All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +# ==================================================================== +######DESCRIPTIONBEGIN#### +# +# Author(s): t@keshi.org +# Contributors: t@keshi.org, jskov +# Date: 2001-07-30 +# +#####DESCRIPTIONEND#### +# +# ==================================================================== + +cdl_package CYGPKG_HAL_SH_SH7750_DREAMCAST { + display "SEGA Dreamcast" + parent CYGPKG_HAL_SH + requires CYGPKG_HAL_SH_7750 + requires ! CYGHWR_HAL_SH_BIGENDIAN + define_header hal_sh_sh7750_dreamcast.h + include_dir cyg/hal + description " + The HAL package provides the support needed to run + eCos on SEGA Dreamcast." + + compile hal_diag.c plf_misc.c dreamcast_pci.c fb_support.c + + implements CYGINT_HAL_DEBUG_GDB_STUBS + implements CYGINT_HAL_DEBUG_GDB_STUBS_BREAK + implements CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT + implements CYGINT_HAL_PLF_IF_INIT + + define_proc { + puts $::cdl_system_header "#define CYGBLD_HAL_TARGET_H <pkgconf/hal_sh.h>" + puts $::cdl_system_header "#define CYGBLD_HAL_PLATFORM_H <pkgconf/hal_sh_sh7750_dreamcast.h>" + puts $::cdl_system_header "#define CYGBLD_HAL_PLATFORM_IO_H <cyg/hal/plf_io.h>" + puts $::cdl_header "#define CYGNUM_HAL_SH_SH4_SCIF_PORTS 1" + puts $::cdl_header "#define CYGHWR_HAL_VSR_TABLE 0x8c010000" + puts $::cdl_header "#define CYGHWR_HAL_VECTOR_TABLE 0x8c010100" + } + + cdl_component CYG_HAL_STARTUP { + display "Startup type" + flavor data + legal_values "RAM" + default_value "RAM" + no_define + define -file system.h CYG_HAL_STARTUP + description " + When targetting the Dreamcast it is possible to build + the system only for RAM bootstrap via a CD ROM." + } + + cdl_option CYGSEM_DREAMCAST_FB_COMM { + display "Support framebuffer for communication channel" + active_if CYGPKG_REDBOOT + flavor bool + default_value 1 + } + + cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS { + display "Number of communication channels on the board" + flavor data + calculated 1+CYGSEM_DREAMCAST_FB_COMM + } + + cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL { + display "Debug serial port" + flavor data + legal_values 0 to CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS-1 + default_value 0 + description " + Dreamcast has only one serial port. This option + chooses which port will be used to connect to a host + running GDB." + } + + cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL { + display "Diagnostic serial port" + flavor data + legal_values 0 to CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS-1 + default_value 0 + description " + Dreamcast has only one serial port. This option + chooses which port will be used for diagnostic output." + } + + cdl_option CYGNUM_HAL_SH_SH4_SCIF_BAUD_RATE_DEFAULT { + flavor data + calculated 115200 + }; + + cdl_component CYGHWR_HAL_SH_PLF_CLOCK_SETTINGS { + display "SH on-chip platform clock controls" + description " + The various clocks used by the system are derived from + these options." + flavor none + no_define + + cdl_option CYGHWR_HAL_SH_OOC_XTAL { + display "SH clock crystal" + flavor data + calculated 33333333 + no_define + description " + This option specifies the frequency of the crystal all + other clocks are derived from." + } + + cdl_option CYGHWR_HAL_SH_OOC_CKIO { + display "SH clock CKIO output enable" + default_value 1 + description " + This selects whether CKIO output is enabled." + } + + cdl_option CYGHWR_HAL_SH_OOC_PLL_1 { + display "SH clock PLL circuit 1" + flavor data + calculated 6 + description " + This selects whether PLL1 is enabled." + } + + cdl_option CYGHWR_HAL_SH_OOC_PLL_2 { + display "SH clock PLL circuit 2" + flavor data + calculated 1 + description " + This selects whether PLL2 is enabled." + } + + cdl_option CYGHWR_HAL_SH_OOC_DIVIDER_IFC { + display "SH clock divider, core" + flavor data + calculated 1 + description " + This divider option affects the CPU core clock." + } + + cdl_option CYGHWR_HAL_SH_OOC_DIVIDER_BFC { + display "SH clock divider, bus" + flavor data + calculated 2 + description " + This divider option affects the bus clock." + } + + cdl_option CYGHWR_HAL_SH_OOC_DIVIDER_PFC { + display "SH clock divider, peripheral" + flavor data + calculated 4 + description " + This divider option affects the peripheral clock." + } + + cdl_option CYGHWR_HAL_SH_OOC_CLOCK_MODE { + display "SH clock mode" + flavor data + calculated 5 + description " + This option must mirror the clock mode hardwired on + the MD0-MD2 pins of the CPU in order to correctly + initialize the FRQCR register." + } + } + + cdl_component CYGBLD_GLOBAL_OPTIONS { + display "Global build options" + flavor none + parent CYGPKG_NONE + description " + Global build options including control over + compiler flags, linker flags and choice of toolchain." + + + cdl_option CYGBLD_GLOBAL_COMMAND_PREFIX { + display "Global command prefix" + flavor data + no_define + default_value { "sh-elf" } + description " + This option specifies the command prefix used when + invoking the build tools." + } + + cdl_option CYGBLD_GLOBAL_CFLAGS { + display "Global compiler flags" + flavor data + no_define + default_value { "-ml -m3 -Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef -Woverloaded-virtual -ggdb -O2 -ffunction-sections -fdata-sections -fno-rtti -fno-exceptions -fvtable-gc -finit-priority" } + description " + This option controls the global compiler flags which + are used to compile all packages by + default. Individual packages may define + options which override these global flags." + } + + cdl_option CYGBLD_GLOBAL_LDFLAGS { + display "Global linker flags" + flavor data + no_define + default_value { "-ml -m3 -ggdb -nostdlib -Wl,--gc-sections -Wl,-static" } + description " + This option controls the global linker flags. Individual + packages may define options which override these global flags." + } + + cdl_option CYGBLD_BUILD_GDB_STUBS { + display "Build GDB stub ROM image" + default_value 0 + requires CYGSEM_HAL_ROM_MONITOR + requires CYGBLD_BUILD_COMMON_GDB_STUBS + requires CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + requires CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT + requires CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT + requires ! CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT + requires ! CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM + no_define + description " + This option enables the building of the GDB stubs for the + board. The common HAL controls takes care of most of the + build process, but the final conversion from ELF image to + binary data is handled by the platform CDL, allowing + relocation of the data if necessary." + + make -priority 320 { + <PREFIX>/bin/gdb_module.bin : <PREFIX>/bin/gdb_module.img + $(OBJCOPY) -O binary $< $@ + } + } + } + + cdl_component CYGHWR_MEMORY_LAYOUT { + display "Memory layout" + flavor data + no_define + calculated { "sh_sh7750_dreamcast_ram" } + + cdl_option CYGHWR_MEMORY_LAYOUT_LDI { + display "Memory layout linker script fragment" + flavor data + no_define + define -file system.h CYGHWR_MEMORY_LAYOUT_LDI + calculated { "<pkgconf/mlt_sh_sh7750_dreamcast_ram.ldi>" } + } + + cdl_option CYGHWR_MEMORY_LAYOUT_H { + display "Memory layout header file" + flavor data + no_define + define -file system.h CYGHWR_MEMORY_LAYOUT_H + calculated { "<pkgconf/mlt_sh_sh7750_dreamcast_ram.h>" } + } + } + + cdl_option CYGSEM_HAL_USE_ROM_MONITOR { + display "Work with a ROM monitor" + flavor booldata + legal_values { "GDB_stubs" } + default_value 0 + requires { CYG_HAL_STARTUP == "RAM" } + parent CYGPKG_HAL_ROM_MONITOR + requires !CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + description " + Support can be enabled for boot ROMs or ROM monitors which contain + GDB stubs. This support changes various eCos semantics such as + the encoding of diagnostic output, and the overriding of hardware + interrupt vectors." + } + + cdl_option CYGSEM_HAL_ROM_MONITOR { + display "Behave as a ROM monitor" + flavor bool + default_value 0 + parent CYGPKG_HAL_ROM_MONITOR + requires { CYG_HAL_STARTUP == "ROM" } + description " + Enable this option if this program is to be used as a ROM monitor, + i.e. applications will be loaded into RAM on the board, and this + ROM monitor may process exceptions or interrupts generated from the + application. This enables features such as utilizing a separate + interrupt stack when exceptions are generated." + } +}
new file mode 100644 --- /dev/null +++ b/packages/hal/sh/dreamcast/current/include/hal_diag.h @@ -0,0 +1,59 @@ +#ifndef CYGONCE_HAL_HAL_DIAG_H +#define CYGONCE_HAL_HAL_DIAG_H + +//============================================================================= +// +// hal_diag.h +// +// HAL Support for Kernel Diagnostic Routines +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jskov +// Contributors:jskov +// Date: 2001-07-30 +// Purpose: HAL Support for Kernel Diagnostic Routines +// Description: Diagnostic routines for use during kernel development. +// Usage: #include <cyg/hal/hal_diag.h> +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include <pkgconf/hal.h> + +#include <cyg/infra/cyg_type.h> +#include <cyg/hal/hal_if.h> + +#define HAL_DIAG_INIT() hal_if_diag_init() +#define HAL_DIAG_WRITE_CHAR(_c_) hal_if_diag_write_char(_c_) +#define HAL_DIAG_READ_CHAR(_c_) hal_if_diag_read_char(&_c_) + +//----------------------------------------------------------------------------- +// end of hal_diag.h +#endif // CYGONCE_HAL_HAL_DIAG_H
new file mode 100644 --- /dev/null +++ b/packages/hal/sh/dreamcast/current/include/pkgconf/mlt_sh_sh7750_dreamcast_ram.h @@ -0,0 +1,17 @@ +// eCos memory layout - Wed Nov 01 08:48:23 2000 + +// This is a generated file - do not edit + +#ifndef __ASSEMBLER__ +#include <cyg/infra/cyg_type.h> +#include <stddef.h> + +#endif +#define CYGMEM_REGION_ram (0x8c000000) +#define CYGMEM_REGION_ram_SIZE (0x1000000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) +#ifndef __ASSEMBLER__ +extern char CYG_LABEL_NAME (__heap1) []; +#endif +#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1)) +#define CYGMEM_SECTION_heap1_SIZE (0x8d000000 - (size_t) CYG_LABEL_NAME (__heap1))
new file mode 100644 --- /dev/null +++ b/packages/hal/sh/dreamcast/current/include/pkgconf/mlt_sh_sh7750_dreamcast_ram.ldi @@ -0,0 +1,26 @@ +// eCos memory layout - Wed Nov 01 08:48:23 2000 + +// This is a generated file - do not edit + +#include <cyg/infra/cyg_type.inc> + +MEMORY +{ + ram : ORIGIN = 0x8c000000, LENGTH = 0x1000000 +} + +SECTIONS +{ + SECTIONS_BEGIN + SECTION_vectors (ram, 0x8c010200, LMA_EQ_VMA) + SECTION_text (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_fini (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_rodata1 (ram, ALIGN (0x8), LMA_EQ_VMA) + SECTION_rodata (ram, ALIGN (0x8), LMA_EQ_VMA) + SECTION_fixup (ram, ALIGN (0x4), LMA_EQ_VMA) + SECTION_gcc_except_table (ram, ALIGN (0x1), LMA_EQ_VMA) + SECTION_data (ram, ALIGN (0x8), LMA_EQ_VMA) + SECTION_bss (ram, ALIGN (0x10), LMA_EQ_VMA) + CYG_LABEL_DEFN(__heap1) = ALIGN (0x8); + SECTIONS_END +}
new file mode 100644 --- /dev/null +++ b/packages/hal/sh/dreamcast/current/include/pkgconf/mlt_sh_sh7750_dreamcast_ram.mlt @@ -0,0 +1,12 @@ +version 0 +region ram 8c000000 1000000 0 ! +section vectors 0 1 0 1 1 1 1 1 8c010200 8c010200 text text ! +section text 0 4 0 1 0 1 0 1 fini fini ! +section fini 0 4 0 1 0 1 0 1 rodata1 rodata1 ! +section rodata1 0 8 0 1 0 1 0 1 rodata rodata ! +section rodata 0 8 0 1 0 1 0 1 fixup fixup ! +section fixup 0 4 0 1 0 1 0 1 gcc_except_table gcc_except_table ! +section gcc_except_table 0 1 0 1 0 1 0 1 data data ! +section data 0 8 0 1 0 1 0 1 bss bss ! +section bss 0 10 0 1 0 1 0 1 heap1 heap1 ! +section heap1 0 8 0 0 0 0 0 0 !
new file mode 100644 --- /dev/null +++ b/packages/hal/sh/dreamcast/current/include/platform.inc @@ -0,0 +1,208 @@ +#ifndef CYGONCE_HAL_PLATFORM_INC +#define CYGONCE_HAL_PLATFORM_INC +##============================================================================= +## +## platform.inc +## +## SH/CQ7750 board assembler header file +## +##============================================================================= +#####COPYRIGHTBEGIN#### +# +# ------------------------------------------- +# The contents of this file are subject to the Red Hat eCos Public License +# Version 1.0 (the "License"); you may not use this file except in +# compliance with the License. You may obtain a copy of the License at +# http://sourceware.cygnus.com/ecos +# +# Software distributed under the License is distributed on an +# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +# License for the specific language governing rights and limitations under +# the License. +# +# The Original Code is eCos - Embedded Configurable Operating System, +# released September 30, 1998. +# +# The Initial Developer of the Original Code is Red Hat. +# Portions created by Red Hat are +# Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +# All Rights Reserved. +# ------------------------------------------- +# +#####COPYRIGHTEND#### +##============================================================================= +#######DESCRIPTIONBEGIN#### +## +## Author(s): jskov +## Contributors:jskov, t@keshi.org +## Date: 2000-04-18 +## Purpose: SH/Dreamcast platform initialization macros. +## Description: This file contains various definitions and macros that are +## useful for writing assembly code for the SH/Dreamcast. +## Usage: +## #include <cyg/hal/platform.inc> +## ... +## +## +######DESCRIPTIONEND#### +## +##============================================================================= + +#include <pkgconf/hal.h> + +#include <cyg/hal/sh_offsets.inc> +#include <cyg/hal/sh_regs.h> + +#define CYG_SR (CYGARC_REG_SR_MD|CYGARC_REG_SR_IMASK) + +#------------------------------------------------------------------------------ +# Hardware initialization. + + .macro hal_hardware_init + .endm + +#------------------------------------------------------------------------------ +# Post reset initialization + +#ifndef CYGPKG_HAL_SH_POST_RESET_INIT + .macro hal_post_reset_init + # Initialize CPU + mov.l $nCYG_SR,r1 ! Put CPU in a well-known state + ldc r1,sr + mov #0,r0 +#if !defined(CYG_HAL_STARTUP_RAM) + mov.l $nCYGARC_REG_CCR,r1 ! Disable cache + mov.l r0,@r1 +#endif + mov.l $nCYGARC_REG_MMUCR,r1 ! Disable MMU + mov.l r0,@r1 + mov.l $nCYGARC_REG_BBRA,r1 ! Disable UBC Channel A + mov.w r0,@r1 + mov.l $nCYGARC_REG_BBRB,r1 ! Disable UBC Channel B + mov.w r0,@r1 + mov.l $nCYGARC_REG_BRCR,r1 ! Reset UBC common register + mov.w r0,@r1 + mov.l $CYGARC_REG_TSTR,r1 ! Disable timers + mov.b r0,@r1 + mov.l $CYGARC_REG_IPRA,r1 ! Disable interrupt request sources + mov.w r0,@r1 + mov.l $CYGARC_REG_IPRB,r1 + mov.w r0,@r1 + mov.l $CYGARC_REG_IPRC,r1 + mov.w r0,@r1 + mov.w $nCYG_WTCSR,r0 ! Clear watchdog + mov.l $nCYGARC_REG_WTCSR,r1 + mov.w r0,@r1 + + # Initialize VBR if necessary +#if !defined(CYG_HAL_STARTUP_RAM) || \ + ( defined(CYG_HAL_STARTUP_RAM) && \ + !defined(CYGSEM_HAL_USE_ROM_MONITOR)) + mov.l $_reset,r1 ! Set VBR + ldc r1,vbr +#endif + bra 1f + nop + +$nCYG_WTCSR: + .word 0xa500 ! clear all CSR bits + + .align 2 +$nCYG_SR: + .long CYG_SR +$nCYGARC_REG_CCR: + .long CYGARC_REG_CCR +$nCYGARC_REG_MMUCR: + .long CYGARC_REG_MMUCR +$nCYGARC_REG_BBRA: + .long CYGARC_REG_BBRA +$nCYGARC_REG_BBRB: + .long CYGARC_REG_BBRB +$nCYGARC_REG_BRCR: + .long CYGARC_REG_BRCR +$CYGARC_REG_TSTR: + .long CYGARC_REG_TSTR +$CYGARC_REG_IPRA: + .long CYGARC_REG_IPRA +$CYGARC_REG_IPRB: + .long CYGARC_REG_IPRB +$CYGARC_REG_IPRC: + .long CYGARC_REG_IPRC +$nCYGARC_REG_WTCSR: + .long CYGARC_REG_WTCSR + + SYM_PTR_REF(_reset) + +1: + .endm +#define CYGPKG_HAL_SH_POST_RESET_INIT +#endif + +#------------------------------------------------------------------------------ +# Monitor initialization. + +#ifndef CYGPKG_HAL_SH_MON_DEFINED + +#if !defined(CYGSEM_HAL_USE_ROM_MONITOR) + + # If we are starting up from ROM, or we are starting in + # RAM and NOT using a ROM monitor, initialize the VSR table. + + .macro hal_mon_init + mov.l $hal_vsr_table,r3 + # Write exception vectors + mov.l $cyg_hal_default_exception_vsr,r4 + mov #CYGNUM_HAL_VSR_EXCEPTION_COUNT,r5 +1: mov.l r4,@r3 + add #4,r3 + dt r5 + bf 1b + # Write interrupt vector + mov.l $cyg_hal_default_interrupt_vsr,r4 + mov.l $hal_vsr_table,r3 + add #CYGNUM_HAL_VECTOR_INTERRUPT*4,r3 + mov.l r4,@r3 + bra 2f + nop + .align 2 + + SYM_PTR_REF(cyg_hal_default_exception_vsr) + SYM_PTR_REF(cyg_hal_default_interrupt_vsr) + SYM_PTR_REF(hal_vsr_table) +2: + .endm + +#elif defined(CYGSEM_HAL_USE_ROM_MONITOR) + + # Initialize the VSR table entries + # We only take control of the interrupt vector, + # the rest are left to the ROM for now... + + .macro hal_mon_init + # Write interrupt vector + mov.l $hal_vsr_table,r3 + mov.l $cyg_hal_default_interrupt_vsr,r4 + add #CYGNUM_HAL_VECTOR_INTERRUPT*4,r3 + mov.l r4,@r3 + bra 2f + nop + .align 2 + + SYM_PTR_REF(cyg_hal_default_interrupt_vsr) + SYM_PTR_REF(hal_vsr_table) +2: + .endm + +#else + + .macro hal_mon_init + .endm + +#endif + + +#define CYGPKG_HAL_SH_MON_DEFINED + +#endif // CYGPKG_HAL_SH_MON_DEFINED + +#endif // CYGONCE_HAL_PLATFORM_INC
new file mode 100644 --- /dev/null +++ b/packages/hal/sh/dreamcast/current/include/plf_cache.h @@ -0,0 +1,61 @@ +#ifndef CYGONCE_PLF_CACHE_H +#define CYGONCE_PLF_CACHE_H + +//============================================================================= +// +// plf_cache.h +// +// Platform specific cache control API +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jskov +// Contributors:jskov +// Date: 2001-07-30 +// Purpose: Cache control API +// Description: The macros defined here provide the HAL APIs for handling +// cache control operations. +// Usage: +// #include <cyg/hal/plf_cache.h> +// ... +// +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include <pkgconf/hal.h> + +//============================================================================= + +// Nothing here at present. + +//----------------------------------------------------------------------------- +#endif // ifndef CYGONCE_PLF_CACHE_H +// End of plf_cache.h +
new file mode 100644 --- /dev/null +++ b/packages/hal/sh/dreamcast/current/include/plf_intr.h @@ -0,0 +1,64 @@ +#ifndef CYGONCE_HAL_PLF_INTR_H +#define CYGONCE_HAL_PLF_INTR_H + +//========================================================================== +// +// plf_intr.h +// +// Platform specific Interrupt and clock support +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jskov +// Contributors: jskov, +// Date: 2001-07-30 +// Purpose: Define Interrupt support +// Description: The macros defined here provide the HAL APIs for handling +// interrupts and the clock for the Dreamcast. +// Usage: +// #include <cyg/hal/plf_intr.h> +// ... +// +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include <pkgconf/hal.h> + +//---------------------------------------------------------------------------- +// Reset. +// Block interrupts and cause an exception. This forces a reset. +#define HAL_PLATFORM_RESET() \ + asm volatile ("ldc %0,sr;trapa #0x00;" : : "r" (CYGARC_REG_SR_BL)) + +#define HAL_PLATFORM_RESET_ENTRY 0xa0000000 + +//-------------------------------------------------------------------------- +#endif // ifndef CYGONCE_HAL_PLF_INTR_H +// End of plf_intr.h
new file mode 100644 --- /dev/null +++ b/packages/hal/sh/dreamcast/current/include/plf_io.h @@ -0,0 +1,113 @@ +#ifndef CYGONCE_PLF_IO_H +#define CYGONCE_PLF_IO_H +//============================================================================= +// +// plf_io.h +// +// Platform specific IO support +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): t@keshi.org +// Contributors: t@keshi.org +// Date: 2001-07-30 +// Purpose: Dreamcast PCI IO support macros +// Description: +// Usage: #include <cyg/hal/plf_io.h> +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include <cyg/hal/hal_io.h> +#include <cyg/hal/hal_intr.h> + +extern cyg_uint32 cyg_hal_plf_pci_cfg_read_dword (cyg_uint32 bus, + cyg_uint32 devfn, + cyg_uint32 offset); +extern cyg_uint16 cyg_hal_plf_pci_cfg_read_word (cyg_uint32 bus, + cyg_uint32 devfn, + cyg_uint32 offset); +extern cyg_uint8 cyg_hal_plf_pci_cfg_read_byte (cyg_uint32 bus, + cyg_uint32 devfn, + cyg_uint32 offset); +extern void cyg_hal_plf_pci_cfg_write_dword (cyg_uint32 bus, + cyg_uint32 devfn, + cyg_uint32 offset, + cyg_uint32 val); +extern void cyg_hal_plf_pci_cfg_write_word (cyg_uint32 bus, + cyg_uint32 devfn, + cyg_uint32 offset, + cyg_uint16 val); +extern void cyg_hal_plf_pci_cfg_write_byte (cyg_uint32 bus, + cyg_uint32 devfn, + cyg_uint32 offset, + cyg_uint8 val); + +// Initialize the PCI bus. +externC void cyg_hal_plf_pci_init(void); +#define HAL_PCI_INIT() cyg_hal_plf_pci_init() + +// Read a value from the PCI configuration space of the appropriate +// size at an address composed from the bus, devfn and offset. +#define HAL_PCI_CFG_READ_UINT8( __bus, __devfn, __offset, __val ) \ + __val = cyg_hal_plf_pci_cfg_read_byte((__bus), (__devfn), (__offset)) + +#define HAL_PCI_CFG_READ_UINT16( __bus, __devfn, __offset, __val ) \ + __val = cyg_hal_plf_pci_cfg_read_word((__bus), (__devfn), (__offset)) + +#define HAL_PCI_CFG_READ_UINT32( __bus, __devfn, __offset, __val ) \ + __val = cyg_hal_plf_pci_cfg_read_dword((__bus), (__devfn), (__offset)) + +// Write a value to the PCI configuration space of the appropriate +// size at an address composed from the bus, devfn and offset. +#define HAL_PCI_CFG_WRITE_UINT8( __bus, __devfn, __offset, __val ) \ + cyg_hal_plf_pci_cfg_write_byte((__bus), (__devfn), (__offset), (__val)) + +#define HAL_PCI_CFG_WRITE_UINT16( __bus, __devfn, __offset, __val ) \ + cyg_hal_plf_pci_cfg_write_word((__bus), (__devfn), (__offset), (__val)) + +#define HAL_PCI_CFG_WRITE_UINT32( __bus, __devfn, __offset, __val ) \ + cyg_hal_plf_pci_cfg_write_dword((__bus), (__devfn), (__offset), (__val)) + + +#define HAL_PCI_TRANSLATE_INTERRUPT( __bus, __devfn, __vec, __valid) \ + CYG_MACRO_START \ + __valid = true; \ + __vec = CYGNUM_HAL_INTERRUPT_LVL11; \ + CYG_MACRO_END + +#define HAL_PCI_ALLOC_BASE_MEMORY 0 +#define HAL_PCI_ALLOC_BASE_IO 0 + +#define HAL_PCI_PHYSICAL_MEMORY_BASE 0x00000000 +#define HAL_PCI_PHYSICAL_IO_BASE 0x00000000 + +//----------------------------------------------------------------------------- +#endif // ifndef CYGONCE_PLF_IO_H +// End of plf_io.h
new file mode 100644 --- /dev/null +++ b/packages/hal/sh/dreamcast/current/include/plf_stub.h @@ -0,0 +1,81 @@ +#ifndef CYGONCE_HAL_PLF_STUB_H +#define CYGONCE_HAL_PLF_STUB_H + +//============================================================================= +// +// plf_stub.h +// +// Platform header for GDB stub support. +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jskov +// Contributors:jskov +// Date: 2001-07-30 +// Purpose: Platform HAL stub support for Dreamcast. +// Usage: #include <cyg/hal/plf_stub.h> +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include <pkgconf/system.h> +#include <pkgconf/hal.h> + +#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS + +#include <cyg/infra/cyg_type.h> // CYG_UNUSED_PARAM, externC + +#include <cyg/hal/sh_stub.h> // architecture stub support + +#include <cyg/hal/hal_diag.h> // hal_diag_led_on + +//---------------------------------------------------------------------------- +// Define some platform specific communication details. This is mostly +// handled by hal_if now, but we need to make sure the comms tables are +// properly initialized. + +externC void cyg_hal_plf_comms_init(void); + +#define HAL_STUB_PLATFORM_INIT_SERIAL() cyg_hal_plf_comms_init() + +#define HAL_STUB_PLATFORM_SET_BAUD_RATE(baud) CYG_UNUSED_PARAM(int, (baud)) +#define HAL_STUB_PLATFORM_INTERRUPTIBLE 0 + +//---------------------------------------------------------------------------- +// Stub initializer. +#ifdef CYGSEM_HAL_ROM_MONITOR +# define HAL_STUB_PLATFORM_INIT() hal_diag_led_on() +#else +# define HAL_STUB_PLATFORM_INIT() CYG_EMPTY_STATEMENT +#endif + +#endif // ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS +//----------------------------------------------------------------------------- +#endif // CYGONCE_HAL_PLF_STUB_H +// End of plf_stub.h
new file mode 100644 --- /dev/null +++ b/packages/hal/sh/dreamcast/current/misc/redboot_RAM.ecm @@ -0,0 +1,120 @@ +cdl_savefile_version 1; +cdl_savefile_command cdl_savefile_version {}; +cdl_savefile_command cdl_savefile_command {}; +cdl_savefile_command cdl_configuration { description hardware template package }; +cdl_savefile_command cdl_package { value_source user_value wizard_value inferred_value }; +cdl_savefile_command cdl_component { value_source user_value wizard_value inferred_value }; +cdl_savefile_command cdl_option { value_source user_value wizard_value inferred_value }; +cdl_savefile_command cdl_interface { value_source user_value wizard_value inferred_value }; + +cdl_configuration eCos { + description "" ; + hardware dreamcast ; + template redboot ; + package -hardware CYGPKG_HAL_SH current ; + package -hardware CYGPKG_HAL_SH_SH4 current ; + package -hardware CYGPKG_HAL_SH_SH7750_DREAMCAST current ; + package -hardware CYGPKG_IO_PCI current ; + package -hardware CYGPKG_IO_SERIAL_SH_SCIF current ; + package -template CYGPKG_HAL current ; + package -template CYGPKG_INFRA current ; + package -template CYGPKG_REDBOOT current ; + package CYGPKG_IO current ; + package CYGPKG_ERROR current ; + package CYGPKG_ISOINFRA current ; + package CYGPKG_FS_ISO current ; + package CYGPKG_IO_FILEIO current ; + package CYGPKG_KERNEL current ; + package CYGPKG_LIBC_I18N current ; + package CYGPKG_MEMALLOC current ; + package CYGPKG_LIBC_STRING current ; + package CYGPKG_COMPRESS_ZLIB current ; +}; + +cdl_component CYGDBG_HAL_DIAG_TO_DEBUG_CHAN { + user_value 0 +}; + +cdl_option CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE { + user_value 4096 +}; + +cdl_option CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT { + user_value 0 +}; + +cdl_option CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM { + inferred_value 0 +}; + +cdl_option CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS { + inferred_value 1 +}; + +cdl_option CYGHWR_HAL_SH_BIGENDIAN { + inferred_value 0 +}; + +cdl_component CYGPKG_HAL_SH_7750 { + inferred_value 1 +}; + +cdl_option CYGHWR_HAL_SH_CACHE_ENABLE { + inferred_value 0 +}; + +cdl_component CYGBLD_BUILD_REDBOOT { + user_value 1 +}; + +cdl_component CYGPKG_ERROR_ERRNO { + user_value 1 + inferred_value 0 +}; + +cdl_option CYGPKG_ERROR_STRERROR { + inferred_value 0 +}; + +cdl_option CYGBLD_ISO_CTYPE_HEADER { + inferred_value 1 <cyg/libc/i18n/ctype.inl> +}; + +cdl_option CYGBLD_ISO_ERRNO_CODES_HEADER { + inferred_value 1 <cyg/error/codes.h> +}; + +cdl_option CYGBLD_ISO_ERRNO_HEADER { + user_value 1 <cyg/error/errno.h> +}; + +cdl_option CYGBLD_ISO_STRTOK_R_HEADER { + inferred_value 1 <cyg/libc/string/string.h> +}; + +cdl_option CYGBLD_ISO_STRING_LOCALE_FUNCS_HEADER { + inferred_value 1 <cyg/libc/string/string.h> +}; + +cdl_option CYGBLD_ISO_STRING_MEMFUNCS_HEADER { + inferred_value 1 <cyg/libc/string/string.h> +}; + +cdl_option CYGBLD_ISO_STRING_STRFUNCS_HEADER { + inferred_value 1 <cyg/libc/string/string.h> +}; + +cdl_option CYGBLD_ISO_DIRENT_HEADER { + inferred_value 1 <cyg/fileio/dirent.h> +}; + +cdl_option CYGBLD_ISO_OPEN_MAX_HEADER { + inferred_value 1 <cyg/fileio/limits.h> +}; + +cdl_option CYGFUN_KERNEL_API_C { + user_value 1 + inferred_value 0 +}; + +
new file mode 100644 --- /dev/null +++ b/packages/hal/sh/dreamcast/current/src/banner.xpm @@ -0,0 +1,117 @@ +//============================================================================= +// +// banner.xpm +// +// Red Hat/eCos banner for display during boot +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): t@keshi.org +// Contributors:t@keshi.org +// Date: 2001-07-30 +// Purpose: Red Hat/eCos banner for display during boot +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +static char * banner_xpm[] = { +"320 53 17 1", +" c None", +". c #030305", +"+ c #949394", +"@ c #CFC9CD", +"# c #525052", +"$ c #B7B6B8", +"% c #E2515E", +"& c #FDFDFB", +"* c #737073", +"= c #820204", +"- c #E33533", +"; c #343232", +"> c #E895AE", +", c #E51604", +"' c #E67284", +") c #EABAD4", +"! c #D8D7D9", +"............................................................................................................................................................................&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&", +"............................................................................................................................................................................&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&", +"............................................................................................................................................................................&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&", +"............................................................................................................................................................................&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&", +"............................................................................................................................................................................&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&", +"............................................................................................................................................................................&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&", +"............................................................................................................................................................................&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&", +"............................................................................................................................................................................&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&", +"............................................................................................................................................................................&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&", +"..............*+@&&&&&&$+*..................................................................................................................................................&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&+#;;...................................&&&&&&,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,--%>&&&&&&&&&&&&&&&&&&&&&&&&", +"...........#$&&@+*##;#++@&&$#...............................................................................................................................................&&&&&&&&&&&&&&&&&&&&&&&&&&&&&#........................................&&&&&&,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,'&&&&&&&&&&&&&&&&&&&&&&", +".........#$&$*...........;#!&$;.............................................................................................................................................&&&&&&&&&&&&&&&&&&&&&&&&&&&+..........................................&&&&&&,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,>&&&&&&&&&&&&&&&&&&&&", +"........+&$#................#$&+............................................................................................................................................&&&&&&&&&&&&&&&&&&&&&&&&&&#...........................................&&&&&&,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,'&&&&&&&&&&&&&&&&&&&", +"......;!&*....................*&@...........................................................................................................................................&&&&&&&&&&&&&&&&&&&&&&&&&#............................................&&&&&&,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,'&&&&&&&&&&&&&&&&&&", +".....;!@;.....====;.=====......;!@;....................................................................;.;..................................................................&&&&&&&&&&&&&&&&&&&&&&&&+...............;;;;..........................&&&&&&,,,,,,,,,,,,,,,---,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,>&&&&&&&&&&&&&&&&&", +"....;&@......,,=,,=,,=...==......!!.................................................................;#!$*#..................................................................&&&&&&&&&&&&&&&&&&&&&&&!.............#+&&&&&&@*...................;***&&&&&&,,,,,,,,,,,,')&&&&&&>-,,,,,,,,,,,,,,%>!&&)>'-,,,,,,,,,,&&&&&&&&&&&&&&&&&", +"....@@;.....=,,,,,,=,,=..=,.......!!.................................................................#&&&&+;...;............................................................&&&&&&&&&&&&&&&&&&&&&&&#...........;@&&&&&&&&&&&+...............*&&&&&&&&&&&,,,,,,,,,,'&&&&&&&&&&&)-,,,,,,,,,,-)&&&&&&&&&)-,,,,,,,,'&&&&&&&&&&&&&&&&", +"...$&;......====,=,,,====,==......;!+................................................................#&&&&@..;>+;...........................................................&&&&&&&&&&&&&&&&&&&&&&&...........*&&&&&&&&&&&&&&$............#&&&&&&&&&&&&&,,,,,,,,,)&&&&&&&&&&&&&&%,,,,,,,,-&&&&&&&&&&&&%,,,,,,,,,&&&&&&&&&&&&&&&&", +"..#&;.......,=.....=,,,,,,,,.......*&#...............................................................#&&&&@...&&*...............................;...........................&&&&&&&&&&&&&&&&&&&&&&+..........+&&&&&&&&&&&&&&&&@..........#&&&&&&&&&&&&&&,,,,,,,,)&&&&&&&&&&&&&&&&',,,,,,,)&&&&&&&&&&&!,,,,,,,,,,>&&&&&&&&&&&&&&&", +"..!$........,=...;==,=,=,=,==.......$$..............................................................;#&&&&@...&&*..............................#$*..........................&&&&&&&&&&&&&&&&&&&&&&#.........#&&&&&&&&&&&&&&&&&&$........#&&&&&&&&&&&&&&&,,,,,,,)&&&&&&&&&&&&&&&&&&%,,,,,%&&&&&&&&&&&&-,,,,,,,,,,'&&&&&&&&&&&&&&&", +".*&;........,,===,,=,,,,,,,,,.......;&#..............................................................#&&&&$;..!&*;...................;.........!&+;.........................&&&&&&&&&&&&&&&&&&&&&&;.........&&&&&&&*;...#$&&&&&&#.......&&&&&&&&!'''>!&&,,,,,,'&&&&&&&)'''>&&&&&&&&,,,,,'&&&&&)-,,%)),,,,,,,,,,,-&&&&&&&&&&&&&&&", +".@+.....===.,=,,,,=,,=,=,=,,=........$$.......................;.;.;.;.;......;.;.;..............;.;.;#&&&&@..;!&*.;.;.;..........;.;.;.;....;.;!&+.;.;......................&&&&&&&&&&&&&&&&&&&&&&;........+&&&&&@........#&&&&&!......+&&&&&&&',,,,,,'&,,,,,,&&&&&&&-,,,,,,>&&&&&&',,,,)&&&&&%,,,,,-,,,,,,,,,,,-&&&&&&&&&&&&&&&", +";&#..=,,,,,..=,=,,,,,,,,,=,,,=.......#&;.....................#***;.;+$$#;..;.#+$$@+*..........#+$$$*.#&&&&@...!&*.;;*++#;.......;.#*++*;.;..;;;!&+;;;;......................&&&&&&&&&&&&&&&&&&&&&&.........&&&&&!..........+&&&&&#.....&&&&&&&-,,,,,,,,%,,,,,%&&&&&&-,,,,,,,,'&&&&&&,,,,)&&&&&>,,,,,,,,,,,,,,,,,-&&&&&&&&&&&&&&&", +"*&...,=,=,,=...===,=,=,,,,,=,=........!*.....................!&&&*;@&&&*..;#@&&&&&&&$;.....;.$&&&&&&!*&&&&@..;&&*.$!&&&&$#....;.+!&&&&&!*..;$!&&&&!&&!......................&&&&&&&&&&&&&&&&&&&&&&........#&&&&&*;;;;;;;;;;#&&&&&+....#&&&&&&',,,,,,,,,,,,,,,>&&&&&%,,,,,,,,,,)&&&&&-,,,)&&&&&&!'-,,,,,,,,,,,,,,-&&&&&&&&&&&&&&&", +"$$...,,,,=,,.......=,,=,=,,,,====.....@$.....................!&&&+!&&&&+;.*!&&&&&&&&&!.....;!&&&&&&&&!&&&&@...!&*!&&!$!&&&;;...*&&!@$@!&&*..$&!&&!&!&!......................&&&&&&&&&&&&&&&&&&&&&&........+&&&&&&&&&&&&&&&&&&&&&&&....+&&&&&&,,,,,,,,,,,,,,,,&&&&&!,,,,,,,,,,,%&&&&&',,,'&&&&&&&&&)',,,,,,,,,,,,-&&&&&&&&&&&&&&&", +"&+...==,,,,=,=......=,,,,=,=,=,,=,....*!.....................!&&&!&&&&&*.#&&&&&!!&&&&&@....!&&&&&&&&&&&&&&@..;!&!&$;...#!&!....#@*....;@&&...;.!&+.;;;......................&&&&&&&&&&&&&&&&&&&&&&........$&&&&&&&&&&&&&&&&&&&&&&&....$&&&&&),,,,,,,,,,,,,,,,&&&&&',,,,,,,,,,,,&&&&&',,,-&&&&&&&&&&&&-,,,,,,,,,,-&&&&&&&&&&&&&&&", +"&#....==,=,,,,,==....,=,,,,,=,=,,,,...#&.....................!&&&&&&&!&*.@&&&&*;.;@&&&&#;.+&&&&&@+*+&&&&&&@...&&&+......*&&*............!&+....!&+..........................&&&&&&&&&&&&&&&&&&&&&&........$&&&&&&&&&&&&&&&&&&&&&&&....$&&&&&),,,,,,,,,,,,,,,-&&&&&',,,,,,,,,,,,&&&&&),,,,%&&&&&&&&&&&&-,,,,,,,,,-&&&&&&&&&&&&&&&", +"&;.....=,,,=,=,,,===.=,,=,,,,,,,=,==..#&;....................@&&&&&@*;;.*&&&&*.....&&&&$..&&&&&$....#&&&&&@...&&!........@&$...........;)&$....&&+..........................&&&&&&&&&&&&&&&&&&&&&&........$&&&&&$$$$$$$$$$$$$$$$$$....$&&&&&),,,,,,,,,,,,,,,,&&&&&',,,,,,,,,,,,&&&&&>,,,,,->&&&&&&&&&&&,,,,,,,,,-&&&&&&&&&&&&&&&", +"&;......=,,,,,=,,,,,,,=,,,=,=,=,,,,=..;&#....................!&&&&!.....@&&&!;.;.;.$&&&&.#&&&&!;.....+&&&&$;..!&+........+&@;......;.;..+&!....!&+;.........................&&&&&&&&&&&&&&&&&&&&&&........+&&&&&;.....................$&&&&&!,,,,,,,,,,,,,,,,&&&&&),,,,,,,,,,,-&&&&&',,,,,,,,%>&&&&&&&&-,,,,,,,,-&&&&&&&&&&&&&&&", +"&;........==,,,,=,=,=,,,=,,,,,,,=,,...#&;....................!&&&&*.....!&&&!+$+$$+@&&&&.+&&&&$......#&&&&@..;&&*........+&!.....;.;*+$$@&@....!&+..........................&&&&&&&&&&&&&&&&&&&&&&........*&&&&&+................;....*&&&&&&-,,,,,,,,,,,,,,,)&&&&&-,,,,,,,,,,>&&&&&%,,,,,,,,,,,'&&&&&&',,,,,,,,-&&&&&&&&&&&&&&&", +"&#.........==,=,,,,,,=,,,=,=,=,,=,=...#&;....................@&&&&#....;&&&&&&&&&&&&&&&&;$&&&&+......#&&&&@...!&*........*&&....;*@&&&&&&&!....!&+..........................&&&&&&&&&&&&&&&&&&&&&&........;&&&&&&;.........;;;;;;;....;&&&&&&!,,,,,,,,,-,,,,,'&&&&&),,,,,,,,,-&&&&&&,,,,,,,,,,,,,>&&&&&',,,,,,,,-&&&&&&&&&&&&&&&", +"&;.......;&@.==,=,,=,,,=,,,,,,,,,=....#&.....................!&&&!;....#&&&&&&&&&&&&&&&&.@&&&&#.....;#&&&&@..;!&*........*&!....$&&!!$++@&@....&&+..........................&&&&&&&&&&&&&&&&&&&&&&;........$&&&&&&;.......@&&&&&&;.....$&&&&&&),,,,,,,-!,,,,,-&&&&&&>,,,,,,,-&&&&&&>,,,,,')-,,,,,>&&&&&',,,,,,,,-&&&&&&&&&&&&&&&", +"&*.......*&&$...=,,,=,,,,=,=,=,==.....*&.....................@&&&&;....;&&&&&!&!&&!&&!&!;$&&&&*......#&&&&@...&&*........*&!...$&&+;....+&!....!&$..........................&&&&&&&&&&&&&&&&&&&&&&;........;&&&&&&&$#;.;+&&&&&&&+......;&&&&&&&&'-,,%>&&,,,,,,>&&&&&&&'-,-%>&&&&&&&-,,,,-&&&'-,,'&&&&&&-,,,,,,,,-&&&&&&&&&&&&&&&", +"@+.......;&&&@&;...==,=,,,,,,==.......+$.....................!&&&&;.....&&&&$..########;.$&&&&$......*&&&&@..;!&*........+&!.;#&&*......+&!....!&+..........................&&&&&&&&&&&&&&&&&&&&&&#.........+&&&&&&&&&&&&&&&&&&!........*&&&&&&&&&&&&&&&,,,,,,-&&&&&&&&&&&&&&&&&&&',,,,,>&&&&&&&&&&&&&&,,,,,,,,,'&&&&&&&&&&&&&&&", +"+!.#*++$;.;&&&&&;.....................!*.....................@&&&&;;....!&&&&............*&&&&!......+&&&&@...&&*........*&!..$&!.......+&!....!&+..........................&&&&&&&&&&&&&&&&&&&&&&+..........@&&&&&&&&&&&&&&&&&;.........+&&&&&&&&&&&&&&,,,,,,,-&&&&&&&&&&&&&&&&&),,,,,-&&&&&&&&&&&&&&',,,,,,,,,>&&&&&&&&&&&&&&&", +"#&#+&&&&&;.;&&&&!+;##*+#*+#*;........;&;.....................!&&&&;.....+&&&&)..;.;.;.....&&&&&$.;.;#&&&&&@...&&*........+&!.;)&$.....;.@&@....&&+..........................&&&&&&&&&&&&&&&&&&&&&&&...........@&&&&&&&&&&&&&&&;...........+&&&&&&&&&&&&&,,,,,,,,%&&&&&&&&&&&&&&&),,,,,,'&&&&&&&&&&&&&>,,,,,,,,,,&&&&&&&&&&&&&&&&", +".!&&&&&&&&$@&&&&&&&&&&&&&&&&.........+@......................@&&&&;......&&&&&!+*##*+!+...$&&&&&)+*$!&&&&&@...!&*........*&!..@&);.....;&&!....!&+;.........................&&&&&&&&&&&&&&&&&&&&&&&#...........+&&&&&&&&&&&&$;.............;$&&&&&&&&&&&,,,,,,,,,-)&&&&&&&&&&&&',,,,,,,,-)&&&&&&&&&&',,,,,,,,,,%&&&&&&&&&&&&&&&&", +".+&&&&&&&&&&&&&&&&&&&*$+@&&$........;&*......................!&&&&;......*&&&&&&&&&&&&!...;&&&&&&&&&&&&&&&@...&&*........*&!..+&&;;.;.;!&&!....@&@.;........................&&&&&&&&&&&&&&&&&&&&&&&!............;+&&&&&&&&@#.................;*$$$&&&&&&,,,,,,,,,,,%)&&&&&&&&>-,,,,,,,,,,,-')!&&&)',,,,,,,,,,,,&&&&&&&&&&&&&&&&&", +"..&&&&&&&&&&&&&&&&&&!;..$&&+........+!.......................!&&&&;.......+&&&&&&&&&&&&....*&&&&&&&&&!@&&&!...&&*........+&&...!&&+#*+&&$&!....*&&+*+*......................&&&&&&&&&&&&&&&&&&&&&&&&*..............#++++#;........................&&&&&&,,,,,,,,,,,,,-%''''%,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,'&&&&&&&&&&&&&&&&&", +"..*&&&&&&&&&&&&&&&&&&&!!&&&;..**+*+*&#.......................!&&&!;........*!&&&&&&&&&@;....*!&&&&&&!;$&&&@...!&*........*&!...#!&&&&&&+.&!.....$&&&&!......................&&&&&&&&&&&&&&&&&&&&&&&&&#............................................&&&&&&,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,%&&&&&&&&&&&&&&&&&&", +"...$&&&&&&&&&&&&&&&&&&&&&&*..;&&&&&&$........................*++++...........*+$@@$$+#........*$@@$*..#+++*...*+;........;+*....;+@!@$#..++......+@!!+......................&&&&&&&&&&&&&&&&&&&&&&&&&&;...........................................&&&&&&,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,%&&&&&&&&&&&&&&&&&&&", +"...;&&&&&&&&&&&&&&&&&&&&&$.;@&&&&&&&........................................................................................................................................&&&&&&&&&&&&&&&&&&&&&&&&&&&*..........................................&&&&&&,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,'&&&&&&&&&&&&&&&&&&&&", +"....;&&&&&&&&&&&&&&&&&&&&;.&&&&&&&&;........................................................................................................................................&&&&&&&&&&&&&&&&&&&&&&&&&&&&@;........................................&&&&&&,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,%!&&&&&&&&&&&&&&&&&&&&&", +".....*&&&&&&&&&&&&&&&&&&$+&&&&&&&&;.........................................................................................................................................&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&!+;;....................................&&&&&&,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,--'!&&&&&&&&&&&&&&&&&&&&&&&", +"......;&&&&&&&&&&&&&&&&&&&&&&&&&!;..........................................................................................................................................&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&", +".......;@&&&&&&&&&&&&&&&&&&&&&&$;...........................................................................................................................................&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&", +".........*&&&&&&&&&&&&&&&&&&&&*.............................................................................................................................................&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&", +"...........+!&&&&&&&&&&&&&&!*...............................................................................................................................................&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&", +".............#+@&&&&&&&&!+;.................................................................................................................................................&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&", +".................;####;.....................................................................................................................................................&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&", +"............................................................................................................................................................................&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&", +"............................................................................................................................................................................&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&", +"................................................................................................................................................................................................................................................................................................................................"}; + +//----------------------------------------------------------------------------- +// End of banner.xpm
new file mode 100644 --- /dev/null +++ b/packages/hal/sh/dreamcast/current/src/dreamcast_pci.c @@ -0,0 +1,189 @@ +//============================================================================= +// +// dreamcast_pci.c +// +// Dreamcast PCI code +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): t@keshi.org +// Contributors:t@keshi.org +// Date: 2001-07-30 +// Purpose: Dreamcast PCI code +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include <pkgconf/hal.h> +#include <pkgconf/system.h> +#include CYGBLD_HAL_PLATFORM_H +#include CYGHWR_MEMORY_LAYOUT_H + +#include <cyg/infra/cyg_type.h> // base types +#include <cyg/infra/cyg_trac.h> // tracing macros +#include <cyg/infra/cyg_ass.h> // assertion macros + +#include <cyg/hal/hal_io.h> // IO macros +#include <cyg/hal/hal_if.h> // calling interface API +#include <cyg/hal/hal_arch.h> // Register state info +#include <cyg/hal/hal_diag.h> +#include <cyg/hal/hal_intr.h> // Interrupt names +#include <cyg/hal/hal_cache.h> +#include <cyg/io/pci_hw.h> +#include <cyg/io/pci.h> + +#define GAPSPCI_REGS 0xa1001400 +#define GAPSPCI_DMA_BASE 0x01840000 +#define GAPSPCI_DMA_SIZE 32768 +#define GAPSPCI_BBA_CONFIG 0xa1001600 +#define GAPSPCI_INTC 0xa05f6924 + +static cyg_bool gapspci_initialized; + +void cyg_hal_plf_pci_init(void) +{ + int i; + cyg_uint32 val; +#if 0 + char idbuf[16]; + + for(i=0; i<16; i++) + HAL_READ_UINT8(GAPSPCI_REGS+i, idbuf[i]); + + if(strncmp(idbuf, "GAPSPCI_BRIDGE_2", 16)) + return; +#endif + + gapspci_initialized = false; + + HAL_WRITE_UINT32(GAPSPCI_REGS+0x18, 0x5a14a501); + + for(i=0; i<1000000; i++); + + HAL_READ_UINT32(GAPSPCI_REGS+0x18, val); + if (val != 1) return; + + HAL_WRITE_UINT32(GAPSPCI_REGS+0x20, 0x01000000); + HAL_WRITE_UINT32(GAPSPCI_REGS+0x24, 0x01000000); + + HAL_WRITE_UINT32(GAPSPCI_REGS+0x28, GAPSPCI_DMA_BASE); + HAL_WRITE_UINT32(GAPSPCI_REGS+0x2c, GAPSPCI_DMA_BASE+GAPSPCI_DMA_SIZE); + + HAL_WRITE_UINT32(GAPSPCI_REGS+0x14, 1); + HAL_WRITE_UINT32(GAPSPCI_REGS+0x34, 1); + +#if 1 + /* Setting up Broadband Adapter */ + HAL_WRITE_UINT16(GAPSPCI_BBA_CONFIG+0x06, 0xf900); + HAL_WRITE_UINT32(GAPSPCI_BBA_CONFIG+0x30, 0x00000000); + HAL_WRITE_UINT8 (GAPSPCI_BBA_CONFIG+0x3c, 0x00); + HAL_WRITE_UINT8 (GAPSPCI_BBA_CONFIG+0x0d, 0xf0); + HAL_WRITE_UINT16(GAPSPCI_BBA_CONFIG+0x04, 0x0006); + HAL_WRITE_UINT32(GAPSPCI_BBA_CONFIG+0x10, 0x00002001); + HAL_WRITE_UINT32(GAPSPCI_BBA_CONFIG+0x14, 0x01000000); +#endif + + /* Enable interrupt */ + HAL_READ_UINT32(GAPSPCI_INTC, val); + val |= (1<<3); + HAL_WRITE_UINT32(GAPSPCI_INTC, val); + + gapspci_initialized = true; +} + + +#define BBA_SELECTED(bus, devfn) (bus==0 && devfn==0) + +cyg_uint32 cyg_hal_plf_pci_cfg_read_dword (cyg_uint32 bus, + cyg_uint32 devfn, + cyg_uint32 offset) +{ + cyg_uint32 val; + if (!gapspci_initialized || !BBA_SELECTED(bus, devfn)) + return 0xffffffff; + HAL_READ_UINT32(GAPSPCI_BBA_CONFIG+offset, val); + return val; +} + + +cyg_uint16 cyg_hal_plf_pci_cfg_read_word (cyg_uint32 bus, + cyg_uint32 devfn, + cyg_uint32 offset) +{ + cyg_uint16 val; + if (!gapspci_initialized || !BBA_SELECTED(bus, devfn)) + return 0xffff; + HAL_READ_UINT16(GAPSPCI_BBA_CONFIG+offset, val); + return val; +} + + +cyg_uint8 cyg_hal_plf_pci_cfg_read_byte (cyg_uint32 bus, + cyg_uint32 devfn, + cyg_uint32 offset) +{ + cyg_uint8 val; + if (!gapspci_initialized || !BBA_SELECTED(bus, devfn)) + return 0xff; + HAL_READ_UINT8(GAPSPCI_BBA_CONFIG+offset, val); + return val; +} + + +void cyg_hal_plf_pci_cfg_write_dword (cyg_uint32 bus, + cyg_uint32 devfn, + cyg_uint32 offset, + cyg_uint32 val) +{ + if (gapspci_initialized && BBA_SELECTED(bus, devfn)) + HAL_WRITE_UINT32(GAPSPCI_BBA_CONFIG+offset, val); +} + + +void cyg_hal_plf_pci_cfg_write_word (cyg_uint32 bus, + cyg_uint32 devfn, + cyg_uint32 offset, + cyg_uint16 val) +{ + if (gapspci_initialized && BBA_SELECTED(bus, devfn)) + HAL_WRITE_UINT16(GAPSPCI_BBA_CONFIG+offset, val); +} + + +void cyg_hal_plf_pci_cfg_write_byte (cyg_uint32 bus, + cyg_uint32 devfn, + cyg_uint32 offset, + cyg_uint8 val) +{ + if (gapspci_initialized && BBA_SELECTED(bus, devfn)) + HAL_WRITE_UINT8(GAPSPCI_BBA_CONFIG+offset, val); +} + +//----------------------------------------------------------------------------- +// End of dreamcast_pci.c
new file mode 100644 --- /dev/null +++ b/packages/hal/sh/dreamcast/current/src/fb_support.c @@ -0,0 +1,671 @@ +//============================================================================= +// +// fb_support.c +// +// Frame buffer support for Dreamcast +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): t@keshi.org +// Contributors:t@keshi.org, gthomas +// Date: 2001-07-30 +// Purpose: Red Hat/eCos banner for display during boot +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include <pkgconf/hal.h> + +#include <cyg/infra/diag.h> +#include <cyg/hal/hal_io.h> // IO macros +#include <cyg/hal/hal_if.h> // Virtual vector support +#include <cyg/hal/hal_arch.h> // Register state info +#include <cyg/hal/hal_intr.h> // HAL interrupt macros + +#define LOGO_AT_TOP +#include "banner.xpm" +#include "font.h" + +#define RESETREG 0xa05f8008 +#define BORDERRGB 0xa05f8040 +#define DISPLAYMODE 0xa05f8044 +#define ALPHAMODE 0xa05f8048 +#define DISPLAYALIGN 0xa05f804c +#define BASEOFFSET1 0xa05f8050 +#define BASEOFFSET2 0xa05f8054 +#define DISPLAYSIZE 0xa05f805c +#define SYNCMODE 0xa05f80d0 +#define VERTICALRANGE 0xa05f80dc +#define HORIZPOSITION 0xa05f80ec +#define VERTPOSITION 0xa05f80f0 +#define PALETTEMODE 0xa05f8108 +#define VIDEOOUTPUT 0xa0702c00 + +static unsigned long dc_parm_vga_16bpp[] = { + DISPLAYMODE, 0x00800005, + BASEOFFSET1, 0, + BASEOFFSET2, 640*2, + DISPLAYSIZE, (1<<20)+((480-1)<<10)+(640*2/4-1), + SYNCMODE, 0x100, + VERTPOSITION, 0x00230023, + VERTICALRANGE, 0x00280208, + HORIZPOSITION, 0x00000090, + VIDEOOUTPUT, 0, + 0, 0, +}; + +static unsigned long dc_parm_vga_32bpp[] = { + DISPLAYMODE, 0x0080000d, + BASEOFFSET1, 0, + BASEOFFSET2, 640*4, + DISPLAYSIZE, (1<<20)+((480-1)<<10)+(640*4/4-1), + SYNCMODE, 0x100, + VERTPOSITION, 0x00230023, + VERTICALRANGE, 0x00280208, + HORIZPOSITION, 0x00000090, + VIDEOOUTPUT, 0, + 0, 0, +}; + +static unsigned long *dc_parm_vga[] = { + dc_parm_vga_16bpp, + dc_parm_vga_32bpp, +}; + +static unsigned long dc_parm_composite_16bpp[] = { + DISPLAYMODE, 0x00000005, + BASEOFFSET1, 0, + BASEOFFSET2, 640*2, + DISPLAYSIZE, ((640*2/4+1)<<20)+((240-1)<<10)+(640*2/4-1), + SYNCMODE, 0x150, + VERTPOSITION, 0x00120012, + VERTICALRANGE, 0x00240204, + HORIZPOSITION, 0x000000a4, + VIDEOOUTPUT, 0x300, + 0, 0, +}; + +static unsigned long dc_parm_composite_32bpp[] = { + DISPLAYMODE, 0x0000000d, + BASEOFFSET1, 0, + BASEOFFSET2, 640*4, + DISPLAYSIZE, ((640*4/4+1)<<20)+((240-1)<<10)+(640*4/4-1), + SYNCMODE, 0x150, + VERTPOSITION, 0x00120012, + VERTICALRANGE, 0x00240204, + HORIZPOSITION, 0x000000a4, + VIDEOOUTPUT, 0x300, + 0, 0, +}; + +static unsigned long *dc_parm_composite[] = { + dc_parm_composite_16bpp, + dc_parm_composite_32bpp, +}; + +static unsigned long dc_parm_interlace_16bpp[] = { + DISPLAYMODE, 0x00000005, + BASEOFFSET1, 0, + BASEOFFSET2, 640*2, + DISPLAYSIZE, ((640*2/4+1)<<20)+((240-1)<<10)+(640*2/4-1), + SYNCMODE, 0x150, + VERTPOSITION, 0x00120012, + VERTICALRANGE, 0x00240204, + HORIZPOSITION, 0x000000a4, + VIDEOOUTPUT, 0, + 0, 0, +}; + +static unsigned long dc_parm_interlace_32bpp[] = { + DISPLAYMODE, 0x0000000d, + BASEOFFSET1, 0, + BASEOFFSET2, 640*4, + DISPLAYSIZE, ((640*4/4+1)<<20)+((240-1)<<10)+(640*4/4-1), + SYNCMODE, 0x150, + VERTPOSITION, 0x00120012, + VERTICALRANGE, 0x00240204, + HORIZPOSITION, 0x000000a4, + VIDEOOUTPUT, 0, + 0, 0, +}; + +static unsigned long *dc_parm_interlace[] = { + dc_parm_interlace_16bpp, + dc_parm_interlace_32bpp, +}; + +/* + * Check cable type. + * 0: VGA, 2: RGB, 3: Composite + */ + +#define PCTRA 0xff80002c +#define PDTRA 0xff800030 + +static int dcfb_cable_check(void) +{ + unsigned long temp; + HAL_READ_UINT32(PCTRA, temp); + temp &= 0xfff0ffff; + temp |= 0x000a0000; + HAL_WRITE_UINT32(PCTRA, temp); + HAL_READ_UINT16(PDTRA, temp); + return (temp>>8)&3; +} + + +// Physical dimensions of LCD display +#define DISPLAY_WIDTH 640 +#define DISPLAY_HEIGHT 480 + +#define LCD_WIDTH 640 +#define LCD_HEIGHT 480 +#define LCD_DEPTH 16 + +#define USE_RGB565 +#ifdef USE_RGB565 +#define RGB_RED(x) (((x)&0x1F)<<11) +#define RGB_GREEN(x) (((x)&0x3F)<<5) +#define RGB_BLUE(x) ((x)&0x1F) +#else +#define RGB_RED(x) (((x)&0x0F)<<12) +#define RGB_GREEN(x) (((x)&0x0F)<<7) +#define RGB_BLUE(x) (((x)&0x0F)<<1) +#endif + +// Physical screen info +static int lcd_width = LCD_WIDTH; +static int lcd_height = LCD_HEIGHT; + +// Virtual screen info +static int curX = 0; // Last used position +static int curY = 0; +//static int width = LCD_WIDTH / (FONT_WIDTH*NIBBLES_PER_PIXEL); +//static int height = LCD_HEIGHT / (FONT_HEIGHT*SCREEN_SCALE); + +static int fg = RGB_RED(15) | RGB_GREEN(63) | RGB_BLUE(8); +static int bg = RGB_RED(0) | RGB_GREEN(0) | RGB_BLUE(15/*31*/); + +#define SCREEN_PAN 20 +#define SCREEN_WIDTH 80 +#define SCREEN_HEIGHT (LCD_HEIGHT/FONT_HEIGHT) +#define VISIBLE_SCREEN_WIDTH (LCD_WIDTH/FONT_WIDTH) +#define VISIBLE_SCREEN_HEIGHT (LCD_HEIGHT/FONT_HEIGHT) +static char screen[SCREEN_HEIGHT][SCREEN_WIDTH]; +static int screen_start = 0; +static int screen_height = SCREEN_HEIGHT; +static int screen_width = SCREEN_WIDTH; +static int screen_pan = 0; + +static bool cursor_enable = true; + +static int kbd_pos; + +static unsigned short *framebuffer = (void*)0xa5000000; + +// Functions +static void lcd_drawc(cyg_int8 c, int x, int y); + +static inline void +set_pixel(int row, int col, unsigned short val) +{ + framebuffer[row*640+col] = val; +} + +// Clear screen +void +lcd_clear(void) +{ + int row, col; + int pos; + + for (row = 0; row < lcd_height; row++) { + for (col = 0; col < lcd_width; col++) { + set_pixel(row, col, bg); + } + } + for (row = 0; row < screen_height; row++) { + for (col = 0; col < screen_width; col++) { + screen[row][col] = ' '; + } + } + // Note: Row 0 seems to wrap incorrectly +#ifdef LOGO_AT_TOP + pos = 0; +#else + pos = (LCD_HEIGHT-1); +#endif + kbd_pos = show_xpm(banner_xpm, pos); + curX = 0; curY = screen_start; + if (cursor_enable) { + lcd_drawc(CURSOR_ON, curX-screen_pan, curY); + } +} + + +// Position cursor +void +lcd_moveto(int X, int Y) +{ + if (cursor_enable) { + lcd_drawc(screen[curY][curX], curX-screen_pan, curY); + } + if (X < 0) X = 0; + if (X >= screen_width) X = screen_width-1; + curX = X; + if (Y < screen_start) Y = screen_start; + if (Y >= screen_height) Y = screen_height-1; + curY = Y; + if (cursor_enable) { + lcd_drawc(CURSOR_ON, curX-screen_pan, curY); + } +} + +// Render a character at position (X,Y) with current background/foreground +static void +lcd_drawc(cyg_int8 c, int x, int y) +{ + cyg_uint8 bits; + int l, p; + + if ((x < 0) || (x >= VISIBLE_SCREEN_WIDTH) || + (y < 0) || (y >= screen_height)) return; + for (l = 0; l < FONT_HEIGHT; l++) { + bits = font_table[c-FIRST_CHAR][l]; + for (p = 0; p < FONT_WIDTH; p++) { + if (bits & 0x01) { + set_pixel(y*FONT_HEIGHT+l, x*FONT_WIDTH + p, fg); + } else { + set_pixel(y*FONT_HEIGHT+l, x*FONT_WIDTH + p, bg); + } + bits >>= 1; + } + } +} + +static void +lcd_refresh(void) +{ + int row, col; + cyg_uint16 *p1, *p2; + // Now the physical screen + for (row = FONT_HEIGHT*(screen_start+1); row < LCD_HEIGHT; row++) { + p1 = &framebuffer[(row-FONT_HEIGHT)*LCD_WIDTH+0]; + p2 = &framebuffer[row*LCD_WIDTH+0]; + for (col = 0; col < LCD_WIDTH; col++) { + *p1++ = *p2++; + } + } + for (row = LCD_HEIGHT-FONT_HEIGHT; row < LCD_HEIGHT; row++) { + p1 = &framebuffer[row*LCD_WIDTH+0]; + for (col = 0; col < LCD_WIDTH; col++) { + *p1++ = bg; + } + } + if (cursor_enable) { + lcd_drawc(CURSOR_ON, curX-screen_pan, curY); + } +} + +static void +lcd_scroll(void) +{ + int row, col; + cyg_uint8 *c1, *c2; + + // First scroll up the virtual screen + for (row = (screen_start+1); row < screen_height; row++) { + c1 = &screen[row-1][0]; + c2 = &screen[row][0]; + for (col = 0; col < screen_width; col++) { + *c1++ = *c2++; + } + } + c1 = &screen[screen_height-1][0]; + for (col = 0; col < screen_width; col++) { + *c1++ = 0x20; + } + lcd_refresh(); +} + +// Draw one character at the current position +void +lcd_putc(cyg_int8 c) +{ + if (cursor_enable) { + lcd_drawc(screen[curY][curX], curX-screen_pan, curY); + } + switch (c) { + case '\r': + curX = 0; + break; + case '\n': + curY++; + break; + case '\b': + curX--; + if (curX < 0) { + curY--; + if (curY < 0) curY = 0; + curX = screen_width-1; + } + break; + default: + if (((cyg_uint8)c < FIRST_CHAR) || ((cyg_uint8)c > LAST_CHAR)) c = '.'; + screen[curY][curX] = c; + lcd_drawc(c, curX-screen_pan, curY); + curX++; + if (curX == screen_width) { + curY++; + curX = 0; + } + } + if (curY >= screen_height) { + lcd_scroll(); + curY = (screen_height-1); + } + if (cursor_enable) { + lcd_drawc(CURSOR_ON, curX-screen_pan, curY); + } +} + +void +lcd_setbg(int red, int green, int blue) +{ + bg = RGB_RED(red) | RGB_GREEN(green) | RGB_BLUE(blue); +} + +void +lcd_setfg(int red, int green, int blue) +{ + fg = RGB_RED(red) | RGB_GREEN(green) | RGB_BLUE(blue); +} + + +static int _timeout = 500; + + +static int +_hexdigit(char c) +{ + if ((c >= '0') && (c <= '9')) { + return c - '0'; + } else + if ((c >= 'A') && (c <= 'F')) { + return (c - 'A') + 0x0A; + } else + if ((c >= 'a') && (c <= 'f')) { + return (c - 'a') + 0x0a; + } +} + +static int +_hex(char *cp) +{ + return (_hexdigit(*cp)<<4) | _hexdigit(*(cp+1)); +} + +static unsigned short +parse_color(char *cp) +{ + int red, green, blue; + + while (*cp && (*cp != 'c')) cp++; + if (cp) { + cp += 2; + if (*cp == '#') { + red = _hex(cp+1); + green = _hex(cp+3); + blue = _hex(cp+5); +#ifdef USE_RGB565 + return RGB_RED(red>>3) | RGB_GREEN(green>>2) | RGB_BLUE(blue>>3); +#else + return RGB_RED(red>>3) | RGB_GREEN(green>>3) | RGB_BLUE(blue>>3); +#endif + } else { + // Should be "None" + return 0xFFFF; + } + } else { + return 0xFFFF; + } +} + +#ifndef CYGINT_ISO_STDIO_FORMATTED_IO +static int +get_int(char **_cp) +{ + char *cp = *_cp; + char c; + int val = 0; + + while ((c = *cp++) && (c != ' ')) { + if ((c >= '0') && (c <= '9')) { + val = val * 10 + (c - '0'); + } else { + return -1; + } + } + *_cp = cp; + return val; +} +#endif + +int +show_xpm(char *xpm[], int screen_pos) +{ + int i, row, col, offset; + char *cp; + int nrows, ncols, nclrs; + unsigned short colors[256]; // Mapped by character index + + cp = xpm[0]; +#ifdef CYGINT_ISO_STDIO_FORMATTED_IO + if (sscanf(cp, "%d %d %d", &ncols, &nrows, &nclrs) != 3) { +#else + if (((ncols = get_int(&cp)) < 0) || + ((nrows = get_int(&cp)) < 0) || + ((nclrs = get_int(&cp)) < 0)) { + +#endif + diag_printf("Can't parse XPM data, sorry\n"); + return 0; + } + // printf("%d rows, %d cols, %d colors\n", nrows, ncols, nclrs); + + for (i = 0; i < 256; i++) { + colors[i] = 0x0000; + } + for (i = 0; i < nclrs; i++) { + cp = xpm[i+1]; + colors[(unsigned int)*cp] = parse_color(&cp[1]); + // printf("Color[%c] = %x\n", *cp, colors[(unsigned int)*cp]); + } + +#ifdef LOGO_AT_TOP + offset = screen_pos; +#else + offset = screen_pos-nrows; +#endif + for (row = 0; row < nrows; row++) { + cp = xpm[nclrs+1+row]; + for (col = 0; col < ncols; col++) { + set_pixel(row+offset, col, colors[(unsigned int)*cp++]); + } + } +#ifdef LOGO_AT_TOP + screen_start = (nrows + (FONT_HEIGHT-1))/FONT_HEIGHT; + return offset+nrows; +#else + screen_height = offset / FONT_HEIGHT; + return offset; +#endif +} + + +void fb_init(int depth) +{ + int cable = dcfb_cable_check(); + unsigned long **parm_list[4] = { + dc_parm_vga, dc_parm_vga, dc_parm_interlace, dc_parm_composite, + }; + unsigned long **dc_parms = parm_list[cable]; + + unsigned long a, d, *p; + + switch(depth) { + default: + case 16: + p = dc_parms[0]; + break; + case 32: + p = dc_parms[1]; + break; + } + + HAL_WRITE_UINT32(RESETREG, 0); + HAL_WRITE_UINT32(BORDERRGB, 0); + + while(1) { + a = *p++; d = *p++; + if (!a) break; + HAL_WRITE_UINT32(a, d); + } + + lcd_clear(); +} + + +static cyg_bool +lcd_comm_getc_nonblock(void* __ch_data, cyg_uint8* ch) +{ + return false; +} + +static cyg_uint8 +lcd_comm_getc(void* __ch_data) +{ + cyg_uint8 ch; + + while (!lcd_comm_getc_nonblock(__ch_data, &ch)) ; + return ch; +} + +static void +lcd_comm_putc(void* __ch_data, cyg_uint8 c) +{ + lcd_putc(c); +} + +static void +lcd_comm_write(void* __ch_data, const cyg_uint8* __buf, cyg_uint32 __len) +{ +} + +static void +lcd_comm_read(void* __ch_data, cyg_uint8* __buf, cyg_uint32 __len) +{ +} + +static cyg_bool +lcd_comm_getc_timeout(void* __ch_data, cyg_uint8* ch) +{ + int delay_count; + cyg_bool res; + + delay_count = _timeout * 10; // delay in .1 ms steps + for(;;) { + res = lcd_comm_getc_nonblock(__ch_data, ch); + if (res || 0 == delay_count--) + break; + CYGACC_CALL_IF_DELAY_US(100); + } + return res; +} + +static int +lcd_comm_control(void *__ch_data, __comm_control_cmd_t __func, ...) +{ + int ret = 0; + + switch (__func) { + case __COMMCTL_SET_TIMEOUT: + { + va_list ap; + va_start(ap, __func); + ret = _timeout; + _timeout = va_arg(ap, cyg_uint32); + va_end(ap); + break; + } + case __COMMCTL_FLUSH_OUTPUT: + break; + default: + break; + } + + return ret; +} + +static int +lcd_comm_isr(void *__ch_data, int* __ctrlc, + CYG_ADDRWORD __vector, CYG_ADDRWORD __data) +{ + return 0; +} + +void fb_comm_init(void) +{ + static int init = 0; + + if (!init) { + hal_virtual_comm_table_t* comm; + int cur = CYGACC_CALL_IF_SET_CONSOLE_COMM(CYGNUM_CALL_IF_SET_COMM_ID_QUERY_CURRENT); + + // Setup procs in the vector table + CYGACC_CALL_IF_SET_CONSOLE_COMM(1); + comm = CYGACC_CALL_IF_CONSOLE_PROCS(); + //CYGACC_COMM_IF_CH_DATA_SET(*comm, chan); + CYGACC_COMM_IF_WRITE_SET(*comm, lcd_comm_write); + CYGACC_COMM_IF_READ_SET(*comm, lcd_comm_read); + CYGACC_COMM_IF_PUTC_SET(*comm, lcd_comm_putc); + CYGACC_COMM_IF_GETC_SET(*comm, lcd_comm_getc); + CYGACC_COMM_IF_CONTROL_SET(*comm, lcd_comm_control); + CYGACC_COMM_IF_DBG_ISR_SET(*comm, lcd_comm_isr); + CYGACC_COMM_IF_GETC_TIMEOUT_SET(*comm, lcd_comm_getc_timeout); + + // Restore original console + CYGACC_CALL_IF_SET_CONSOLE_COMM(cur); + + init = 1; + } +} + +//----------------------------------------------------------------------------- +// End of fb_support.c
new file mode 100644 --- /dev/null +++ b/packages/hal/sh/dreamcast/current/src/font.h @@ -0,0 +1,151 @@ +//========================================================================== +// +// font.h +// +// SA1110/iPAQ - LCD display font +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 2001-02-25 +// Description: Simple LCD font +//####DESCRIPTIONEND#### + +#ifndef _LCD_FONT_H_ +#define _LCD_FONT_H_ + +// 8x8 Font - from Helios + +#define FIRST_CHAR 0x20 +#define LAST_CHAR 0x7F +#define FONT_HEIGHT 8 +#define FONT_WIDTH 8 +#define CURSOR_ON 0x7F +#define CURSOR_OFF 0x20 +static char font_table[LAST_CHAR-FIRST_CHAR+1][8] = +{ + { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, /* */ + { 0x18, 0x18, 0x18, 0x18, 0x18, 0x00, 0x18, 0x00 }, /* ! */ + { 0x36, 0x36, 0x36, 0x00, 0x00, 0x00, 0x00, 0x00 }, /* " */ + { 0x6C, 0x6C, 0xFE, 0x6C, 0xFE, 0x6C, 0x6C, 0x00 }, /* # */ + { 0x30, 0xFC, 0x16, 0x7C, 0xD0, 0x7E, 0x18, 0x00 }, /* $ */ + { 0x06, 0x66, 0x30, 0x18, 0x0C, 0x66, 0x60, 0x00 }, /* % */ + { 0x1C, 0x36, 0x36, 0x1C, 0xB6, 0x66, 0xDC, 0x00 }, /* & */ + { 0x18, 0x18, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00 }, /* ' */ + { 0x30, 0x18, 0x0C, 0x0C, 0x0C, 0x18, 0x30, 0x00 }, /* ( */ + { 0x0C, 0x18, 0x30, 0x30, 0x30, 0x18, 0x0C, 0x00 }, /* ) */ + { 0x00, 0x18, 0x7E, 0x3C, 0x7E, 0x18, 0x00, 0x00 }, /* * */ + { 0x00, 0x18, 0x18, 0x7E, 0x18, 0x18, 0x00, 0x00 }, /* + */ + { 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x0C }, /* , */ + { 0x00, 0x00, 0x00, 0x7E, 0x00, 0x00, 0x00, 0x00 }, /* - */ + { 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x00 }, /* . */ + { 0x00, 0x60, 0x30, 0x18, 0x0C, 0x06, 0x00, 0x00 }, /* / */ + { 0x3C, 0x66, 0x76, 0x7E, 0x6E, 0x66, 0x3C, 0x00 }, /* 0 */ + { 0x18, 0x1C, 0x18, 0x18, 0x18, 0x18, 0x7E, 0x00 }, /* 1 */ + { 0x3C, 0x66, 0x60, 0x30, 0x18, 0x0C, 0x7E, 0x00 }, /* 2 */ + { 0x3C, 0x66, 0x60, 0x38, 0x60, 0x66, 0x3C, 0x00 }, /* 3 */ + { 0x30, 0x38, 0x3C, 0x36, 0x7E, 0x30, 0x30, 0x00 }, /* 4 */ + { 0x7E, 0x06, 0x3E, 0x60, 0x60, 0x66, 0x3C, 0x00 }, /* 5 */ + { 0x38, 0x0C, 0x06, 0x3E, 0x66, 0x66, 0x3C, 0x00 }, /* 6 */ + { 0x7E, 0x60, 0x30, 0x18, 0x0C, 0x0C, 0x0C, 0x00 }, /* 7 */ + { 0x3C, 0x66, 0x66, 0x3C, 0x66, 0x66, 0x3C, 0x00 }, /* 8 */ + { 0x3C, 0x66, 0x66, 0x7C, 0x60, 0x30, 0x1C, 0x00 }, /* 9 */ + { 0x00, 0x00, 0x18, 0x18, 0x00, 0x18, 0x18, 0x00 }, /* : */ + { 0x00, 0x00, 0x18, 0x18, 0x00, 0x18, 0x18, 0x0C }, /* ; */ + { 0x30, 0x18, 0x0C, 0x06, 0x0C, 0x18, 0x30, 0x00 }, /* < */ + { 0x00, 0x00, 0x7E, 0x00, 0x7E, 0x00, 0x00, 0x00 }, /* = */ + { 0x0C, 0x18, 0x30, 0x60, 0x30, 0x18, 0x0C, 0x00 }, /* > */ + { 0x3C, 0x66, 0x30, 0x18, 0x18, 0x00, 0x18, 0x00 }, /* ? */ + { 0x3C, 0x66, 0x76, 0x56, 0x76, 0x06, 0x3C, 0x00 }, /* @ */ + { 0x3C, 0x66, 0x66, 0x7E, 0x66, 0x66, 0x66, 0x00 }, /* A */ + { 0x3E, 0x66, 0x66, 0x3E, 0x66, 0x66, 0x3E, 0x00 }, /* B */ + { 0x3C, 0x66, 0x06, 0x06, 0x06, 0x66, 0x3C, 0x00 }, /* C */ + { 0x1E, 0x36, 0x66, 0x66, 0x66, 0x36, 0x1E, 0x00 }, /* D */ + { 0x7E, 0x06, 0x06, 0x3E, 0x06, 0x06, 0x7E, 0x00 }, /* E */ + { 0x7E, 0x06, 0x06, 0x3E, 0x06, 0x06, 0x06, 0x00 }, /* F */ + { 0x3C, 0x66, 0x06, 0x76, 0x66, 0x66, 0x3C, 0x00 }, /* G */ + { 0x66, 0x66, 0x66, 0x7E, 0x66, 0x66, 0x66, 0x00 }, /* H */ + { 0x7E, 0x18, 0x18, 0x18, 0x18, 0x18, 0x7E, 0x00 }, /* I */ + { 0x7C, 0x30, 0x30, 0x30, 0x30, 0x36, 0x1C, 0x00 }, /* J */ + { 0x66, 0x36, 0x1E, 0x0E, 0x1E, 0x36, 0x66, 0x00 }, /* K */ + { 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x7E, 0x00 }, /* L */ + { 0xC6, 0xEE, 0xFE, 0xD6, 0xD6, 0xC6, 0xC6, 0x00 }, /* M */ + { 0x66, 0x66, 0x6E, 0x7E, 0x76, 0x66, 0x66, 0x00 }, /* N */ + { 0x3C, 0x66, 0x66, 0x66, 0x66, 0x66, 0x3C, 0x00 }, /* O */ + { 0x3E, 0x66, 0x66, 0x3E, 0x06, 0x06, 0x06, 0x00 }, /* P */ + { 0x3C, 0x66, 0x66, 0x66, 0x56, 0x36, 0x6C, 0x00 }, /* Q */ + { 0x3E, 0x66, 0x66, 0x3E, 0x36, 0x66, 0x66, 0x00 }, /* R */ + { 0x3C, 0x66, 0x06, 0x3C, 0x60, 0x66, 0x3C, 0x00 }, /* S */ + { 0x7E, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x00 }, /* T */ + { 0x66, 0x66, 0x66, 0x66, 0x66, 0x66, 0x3C, 0x00 }, /* U */ + { 0x66, 0x66, 0x66, 0x66, 0x66, 0x3C, 0x18, 0x00 }, /* V */ + { 0xC6, 0xC6, 0xD6, 0xD6, 0xFE, 0xEE, 0xC6, 0x00 }, /* W */ + { 0x66, 0x66, 0x3C, 0x18, 0x3C, 0x66, 0x66, 0x00 }, /* X */ + { 0x66, 0x66, 0x66, 0x3C, 0x18, 0x18, 0x18, 0x00 }, /* Y */ + { 0x7E, 0x60, 0x30, 0x18, 0x0C, 0x06, 0x7E, 0x00 }, /* Z */ + { 0x3E, 0x06, 0x06, 0x06, 0x06, 0x06, 0x3E, 0x00 }, /* [ */ + { 0x00, 0x06, 0x0C, 0x18, 0x30, 0x60, 0x00, 0x00 }, /* \ */ + { 0x7C, 0x60, 0x60, 0x60, 0x60, 0x60, 0x7C, 0x00 }, /* ] */ + { 0x3C, 0x66, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, /* ^ */ + { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF }, /* _ */ + { 0x0C, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, /* ` */ + { 0x00, 0x00, 0x3C, 0x60, 0x7C, 0x66, 0x7C, 0x00 }, /* a */ + { 0x06, 0x06, 0x3E, 0x66, 0x66, 0x66, 0x3E, 0x00 }, /* b */ + { 0x00, 0x00, 0x3C, 0x66, 0x06, 0x66, 0x3C, 0x00 }, /* c */ + { 0x60, 0x60, 0x7C, 0x66, 0x66, 0x66, 0x7C, 0x00 }, /* d */ + { 0x00, 0x00, 0x3C, 0x66, 0x7E, 0x06, 0x3C, 0x00 }, /* e */ + { 0x38, 0x0C, 0x0C, 0x3E, 0x0C, 0x0C, 0x0C, 0x00 }, /* f */ + { 0x00, 0x00, 0x7C, 0x66, 0x66, 0x7C, 0x60, 0x3C }, /* g */ + { 0x06, 0x06, 0x3E, 0x66, 0x66, 0x66, 0x66, 0x00 }, /* h */ + { 0x18, 0x00, 0x1C, 0x18, 0x18, 0x18, 0x3C, 0x00 }, /* i */ + { 0x18, 0x00, 0x1C, 0x18, 0x18, 0x18, 0x18, 0x0E }, /* j */ + { 0x06, 0x06, 0x66, 0x36, 0x1E, 0x36, 0x66, 0x00 }, /* k */ + { 0x1C, 0x18, 0x18, 0x18, 0x18, 0x18, 0x3C, 0x00 }, /* l */ + { 0x00, 0x00, 0x6C, 0xFE, 0xD6, 0xD6, 0xC6, 0x00 }, /* m */ + { 0x00, 0x00, 0x3E, 0x66, 0x66, 0x66, 0x66, 0x00 }, /* n */ + { 0x00, 0x00, 0x3C, 0x66, 0x66, 0x66, 0x3C, 0x00 }, /* o */ + { 0x00, 0x00, 0x3E, 0x66, 0x66, 0x3E, 0x06, 0x06 }, /* p */ + { 0x00, 0x00, 0x7C, 0x66, 0x66, 0x7C, 0x60, 0xE0 }, /* q */ + { 0x00, 0x00, 0x36, 0x6E, 0x06, 0x06, 0x06, 0x00 }, /* r */ + { 0x00, 0x00, 0x7C, 0x06, 0x3C, 0x60, 0x3E, 0x00 }, /* s */ + { 0x0C, 0x0C, 0x3E, 0x0C, 0x0C, 0x0C, 0x38, 0x00 }, /* t */ + { 0x00, 0x00, 0x66, 0x66, 0x66, 0x66, 0x7C, 0x00 }, /* u */ + { 0x00, 0x00, 0x66, 0x66, 0x66, 0x3C, 0x18, 0x00 }, /* v */ + { 0x00, 0x00, 0xC6, 0xD6, 0xD6, 0xFE, 0x6C, 0x00 }, /* w */ + { 0x00, 0x00, 0x66, 0x3C, 0x18, 0x3C, 0x66, 0x00 }, /* x */ + { 0x00, 0x00, 0x66, 0x66, 0x66, 0x7C, 0x60, 0x3C }, /* y */ + { 0x00, 0x00, 0x7E, 0x30, 0x18, 0x0C, 0x7E, 0x00 }, /* z */ + { 0x30, 0x18, 0x18, 0x0E, 0x18, 0x18, 0x30, 0x00 }, /* { */ + { 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x00 }, /* | */ + { 0x0C, 0x18, 0x18, 0x70, 0x18, 0x18, 0x0C, 0x00 }, /* } */ + { 0x8C, 0xD6, 0x62, 0x00, 0x00, 0x00, 0x00, 0x00 }, /* ~ */ + { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF } /* Block cursor */ +}; + +#endif // _LCD_FONT_H_
new file mode 100644 --- /dev/null +++ b/packages/hal/sh/dreamcast/current/src/hal_diag.c @@ -0,0 +1,71 @@ +//============================================================================= +// +// hal_diag.c +// +// HAL diagnostic output code +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jskov +// Contributors: jskov +// Date: 2001-07-30 +// Purpose: HAL diagnostic output +// Description: Implementations of HAL diagnostic output support. +// +//####DESCRIPTIONEND#### +// +//============================================================================= + +#include <pkgconf/hal.h> + +#include <cyg/hal/hal_diag.h> // our header. + +#include <cyg/infra/cyg_type.h> // base types, externC +#include <cyg/hal/hal_intr.h> // Interrupt macros +#include <cyg/hal/sh4_scif.h> // SH4 serial driver + +#define SCI_BASE ((cyg_uint8*)0xffe80000) + +//----------------------------------------------------------------------------- + + +void +cyg_hal_plf_comms_init(void) +{ + static int initialized = 0; + + if (initialized) + return; + + initialized = 1; + + cyg_hal_plf_scif_init(0, 0, CYGNUM_HAL_INTERRUPT_SCIF_RXI, SCI_BASE); +} + +//----------------------------------------------------------------------------- +// End of hal_diag.c
new file mode 100644 --- /dev/null +++ b/packages/hal/sh/dreamcast/current/src/plf_misc.c @@ -0,0 +1,66 @@ +//========================================================================== +// +// plf_misc.c +// +// HAL platform miscellaneous functions +// +//========================================================================== +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Red Hat eCos Public License +// Version 1.1 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://www.redhat.com/ +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Configurable Operating System, +// released September 30, 1998. +// +// The Initial Developer of the Original Code is Red Hat. +// Portions created by Red Hat are +// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc. +// All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//========================================================================== +//#####DESCRIPTIONBEGIN#### +// +// Author(s): jskov +// Contributors: jskov, t@keshi.org +// Date: 2001-07-30 +// Purpose: HAL miscellaneous functions +// Description: This file contains miscellaneous functions provided by the +// HAL. +// +//####DESCRIPTIONEND#### +// +//========================================================================== + +#include <pkgconf/hal.h> +#include <cyg/hal/hal_if.h> // interfacing API + +void fb_init(int depth); +void fb_comm_init(void); + +//-------------------------------------------------------------------------- +void +hal_platform_init(void) +{ + hal_if_init(); +} + +void +plf_if_init(void) +{ + fb_init(16); + fb_comm_init(); +} + +//-------------------------------------------------------------------------- +// eof plf_misc.c
--- a/packages/io/wallclock/current/ChangeLog +++ b/packages/io/wallclock/current/ChangeLog @@ -1,3 +1,8 @@ +2001-07-30 Jesper Skov <jskov@redhat.com> + + * include/wallclock/wallclock.inl (_simple_mktime): Fix assertion + for leap seconds. + 2001-07-27 Jesper Skov <jskov@redhat.com> * include/wallclock/wallclock.inl (_simple_mktime): Added some assertions.
--- a/packages/io/wallclock/current/include/wallclock/wallclock.inl +++ b/packages/io/wallclock/current/include/wallclock/wallclock.inl @@ -74,7 +74,7 @@ static time_t CYG_ASSERT(day <= 31, "Day is invalid"); CYG_ASSERT(hour <= 23, "Hour is invalid"); CYG_ASSERT(min <= 59, "Minutes is invalid"); - CYG_ASSERT(sec <= 62, "Seconds is invalid"); + CYG_ASSERT(sec <= 61, "Seconds is invalid"); // Number of days due to years days = 0;
--- a/packages/net/snmp/agent/current/ChangeLog +++ b/packages/net/snmp/agent/current/ChangeLog @@ -1,3 +1,11 @@ +2001-07-31 Hugo Tyson <hmt@redhat.com> +2001-07-31 Ron Kundla <rkundla@nband.com> + + * utils/mib2c/mib2c (Table-handling): Concatenate rather than + replace subsequent processed variables. The symptom was that in + the generated header file you only get the last table in the MIB. + This fixes it. Thanks Ron! + 2001-06-07 Jesper Skov <jskov@redhat.com> * src/mibgroup/mibII/ip.c (var_ipNetToMediaTable): Only handle
--- a/packages/net/snmp/agent/current/utils/mib2c/mib2c +++ b/packages/net/snmp/agent/current/utils/mib2c/mib2c @@ -132,7 +132,7 @@ for($varlen = 0; $varlen <= $#varLengths #============================================ foreach $vtable (@table_list) { foreach $ptable (@processtable) { - $variables{$ptable}{'processed'} = + $variables{$ptable}{'processed'} .= (eval "\"$variables{$ptable}{'code'}\"") . "\n\n"; } $var_routines .=