Mercurial > ecos
annotate packages/hal/mips/arch/current/include/hal_io.h @ 34:29bc183297e1 ecos-sw-1999-09-02
Merge from eCos master repository on 1999-09-02-16:26:10-BST
| author | jlarmour |
|---|---|
| date | Thu, 02 Sep 1999 16:11:22 +0000 |
| parents | 443894e2e912 |
| children | c38311975d4f |
| rev | line source |
|---|---|
| 0 | 1 #ifndef CYGONCE_HAL_HAL_IO_H |
| 2 #define CYGONCE_HAL_HAL_IO_H | |
| 3 | |
| 4 //============================================================================= | |
| 5 // | |
| 2 | 6 // hal_io.h |
| 0 | 7 // |
| 2 | 8 // HAL device IO register support. |
| 0 | 9 // |
| 10 //============================================================================= | |
| 11 //####COPYRIGHTBEGIN#### | |
| 12 // | |
| 13 // ------------------------------------------- | |
| 14 // The contents of this file are subject to the Cygnus eCos Public License | |
| 15 // Version 1.0 (the "License"); you may not use this file except in | |
| 16 // compliance with the License. You may obtain a copy of the License at | |
| 17 // http://sourceware.cygnus.com/ecos | |
| 18 // | |
| 19 // Software distributed under the License is distributed on an "AS IS" | |
| 20 // basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the | |
| 21 // License for the specific language governing rights and limitations under | |
| 22 // the License. | |
| 23 // | |
| 24 // The Original Code is eCos - Embedded Cygnus Operating System, released | |
| 25 // September 30, 1998. | |
| 26 // | |
| 27 // The Initial Developer of the Original Code is Cygnus. Portions created | |
| 2 | 28 // by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. |
| 0 | 29 // ------------------------------------------- |
| 30 // | |
| 31 //####COPYRIGHTEND#### | |
| 32 //============================================================================= | |
| 33 //#####DESCRIPTIONBEGIN#### | |
| 34 // | |
| 2 | 35 // Author(s): nickg |
| 36 // Contributors: nickg | |
| 37 // Date: 1998-02-17 | |
| 38 // Purpose: Define IO register support | |
| 39 // Description: The macros defined here provide the HAL APIs for handling | |
| 0 | 40 // device IO control registers. |
| 41 // | |
| 42 // Usage: | |
| 2 | 43 // #include <cyg/hal/hal_io.h> |
| 44 // ... | |
| 45 // | |
| 0 | 46 // |
| 47 //####DESCRIPTIONEND#### | |
| 48 // | |
| 49 //============================================================================= | |
| 50 | |
|
34
29bc183297e1
Merge from eCos master repository on 1999-09-02-16:26:10-BST
jlarmour
parents:
2
diff
changeset
|
51 #include <pkgconf/hal.h> |
|
29bc183297e1
Merge from eCos master repository on 1999-09-02-16:26:10-BST
jlarmour
parents:
2
diff
changeset
|
52 |
| 0 | 53 #include <cyg/infra/cyg_type.h> |
| 54 | |
|
34
29bc183297e1
Merge from eCos master repository on 1999-09-02-16:26:10-BST
jlarmour
parents:
2
diff
changeset
|
55 #include <cyg/hal/plf_io.h> |
|
29bc183297e1
Merge from eCos master repository on 1999-09-02-16:26:10-BST
jlarmour
parents:
2
diff
changeset
|
56 |
| 0 | 57 //----------------------------------------------------------------------------- |
| 58 // IO Register address. | |
| 59 // This type is for recording the address of an IO register. | |
| 60 | |
| 61 typedef volatile CYG_ADDRWORD HAL_IO_REGISTER; | |
| 62 | |
| 63 //----------------------------------------------------------------------------- | |
| 64 // BYTE Register access. | |
| 65 // Individual and vectorized access to 8 bit registers. | |
| 66 | |
| 67 #define HAL_READ_UINT8( _register_, _value_ ) \ | |
| 68 ((_value_) = *((volatile CYG_BYTE *)(_register_))) | |
| 69 | |
| 70 #define HAL_WRITE_UINT8( _register_, _value_ ) \ | |
| 71 (*((volatile CYG_BYTE *)(_register_)) = (_value_)) | |
| 72 | |
| 73 #define HAL_READ_UINT8_VECTOR( _register_, _buf_, _count_, _step_ ) \ | |
| 74 { \ | |
| 75 cyg_count32 _i_,_j_; \ | |
| 76 for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \ | |
| 77 (_buf_)[_i_] = ((volatile CYG_BYTE *)(_register_))[_j_]; \ | |
| 78 } | |
| 79 | |
| 80 #define HAL_WRITE_UINT8_VECTOR( _register_, _buf_, _count_, _step_ ) \ | |
| 81 { \ | |
| 82 cyg_count32 _i_,_j_; \ | |
| 83 for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \ | |
| 84 ((volatile CYG_BYTE *)(_register_))[_j_] = (_buf_)[_i_]; \ | |
| 85 } | |
| 86 | |
| 87 | |
| 88 //----------------------------------------------------------------------------- | |
| 89 // 16 bit access. | |
| 90 // Individual and vectorized access to 16 bit registers. | |
| 91 | |
| 92 #define HAL_READ_UINT16( _register_, _value_ ) \ | |
| 93 ((_value_) = *((volatile CYG_WORD16 *)(_register_))) | |
| 94 | |
| 95 #define HAL_WRITE_UINT16( _register_, _value_ ) \ | |
| 96 (*((volatile CYG_WORD16 *)(_register_)) = (_value_)) | |
| 97 | |
| 98 #define HAL_READ_UINT16_VECTOR( _register_, _buf_, _count_, _step_ ) \ | |
| 99 { \ | |
| 100 cyg_count32 _i_,_j_; \ | |
| 101 for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \ | |
| 102 (_buf_)[_i_] = ((volatile CYG_WORD16 *)(_register_))[_j_]; \ | |
| 103 } | |
| 104 | |
| 105 #define HAL_WRITE_UINT16_VECTOR( _register_, _buf_, _count_, _step_ ) \ | |
| 106 { \ | |
| 107 cyg_count32 _i_,_j_; \ | |
| 108 for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \ | |
| 109 ((volatile CYG_WORD16 *)(_register_))[_j_] = (_buf_)[_i_]; \ | |
| 110 } | |
| 111 | |
| 112 //----------------------------------------------------------------------------- | |
| 113 // 32 bit access. | |
| 114 // Individual and vectorized access to 32 bit registers. | |
| 115 | |
| 116 #define HAL_READ_UINT32( _register_, _value_ ) \ | |
| 117 ((_value_) = *((volatile CYG_WORD32 *)(_register_))) | |
| 118 | |
| 119 #define HAL_WRITE_UINT32( _register_, _value_ ) \ | |
| 120 (*((volatile CYG_WORD32 *)(_register_)) = (_value_)) | |
| 121 | |
| 122 #define HAL_READ_UINT32_VECTOR( _register_, _buf_, _count_, _step_ ) \ | |
| 123 { \ | |
| 124 cyg_count32 _i_,_j_; \ | |
| 125 for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \ | |
| 126 (_buf_)[_i_] = ((volatile CYG_WORD32 *)(_register_))[_j_]; \ | |
| 127 } | |
| 128 | |
| 129 #define HAL_WRITE_UINT32_VECTOR( _register_, _buf_, _count_, _step_ ) \ | |
| 130 { \ | |
| 131 cyg_count32 _i_,_j_; \ | |
| 132 for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \ | |
| 133 ((volatile CYG_WORD32 *)(_register_))[_j_] = (_buf_)[_i_]; \ | |
| 134 } | |
|
34
29bc183297e1
Merge from eCos master repository on 1999-09-02-16:26:10-BST
jlarmour
parents:
2
diff
changeset
|
135 |
| 0 | 136 //----------------------------------------------------------------------------- |
| 137 #endif // ifndef CYGONCE_HAL_HAL_IO_H | |
| 138 // End of hal_io.h |
