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1 /*========================================================================== |
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2 // |
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3 // cogent.ld |
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4 // |
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5 // Linker script for Cogent/MPC860 board |
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6 // |
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7 //========================================================================== |
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8 //####COPYRIGHTBEGIN#### |
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9 // |
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10 // ------------------------------------------- |
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11 // The contents of this file are subject to the Cygnus eCos Public License |
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12 // Version 1.0 (the "License"); you may not use this file except in |
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13 // compliance with the License. You may obtain a copy of the License at |
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14 // http://sourceware.cygnus.com/ecos |
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15 // |
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16 // Software distributed under the License is distributed on an "AS IS" |
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17 // basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the |
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18 // License for the specific language governing rights and limitations under |
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19 // the License. |
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20 // |
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21 // The Original Code is eCos - Embedded Cygnus Operating System, released |
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22 // September 30, 1998. |
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23 // |
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24 // The Initial Developer of the Original Code is Cygnus. Portions created |
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25 // by Cygnus are Copyright (C) 1998 Cygnus Solutions. All Rights Reserved. |
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26 // ------------------------------------------- |
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27 // |
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28 //####COPYRIGHTEND#### |
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29 //========================================================================== |
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30 //#####DESCRIPTIONBEGIN#### |
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31 // |
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32 // Author(s): nickg |
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33 // Contributors:nickg |
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34 // Date: 1998-02-17 |
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35 // Purpose: Cogent Linker script |
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36 // Description: This script is passed to the linker to define the memory |
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37 // of the Cogent/MPC860 board. |
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38 // |
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39 //####DESCRIPTIONEND#### |
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40 // |
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41 //========================================================================*/ |
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42 STARTUP(vectors.o) |
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43 ENTRY(reset_vector) |
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44 |
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45 GROUP(libtarget.a libgcc.a) |
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46 |
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47 #include <pkgconf/hal.h> |
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48 |
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49 #ifdef CYG_HAL_STARTUP_ROM |
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50 #define LOAD_BASE 0xFFF00000 |
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51 #define DATA_BASE 0x00780000 // Data at top of memory so GDB |
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52 // doesn't trash ROM state while |
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53 // downloading programs. |
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54 #endif |
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55 #ifdef CYG_HAL_STARTUP_RAM |
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56 #define LOAD_BASE 0x00000000 |
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57 #define DATA_BASE |
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58 #endif |
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59 |
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60 // Alignment of sections must be equal to or bigger than the alignment |
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61 // requested by gcc (use 'objdump -h' to see these). |
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62 |
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63 SECTIONS |
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64 { |
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65 |
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66 /* Start of ROM */ |
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67 . = LOAD_BASE; |
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68 |
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69 .rom_vectors : |
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70 { |
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71 KEEP(*(.vectors)) |
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72 } |
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73 |
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74 /*------------------------------------------------------------*/ |
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75 |
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76 .text : |
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77 { |
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78 _stext = .; |
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79 *(.text*) |
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80 *(.gnu.warning) |
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81 *(.gnu.linkonce*) |
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82 *(.init) |
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83 } |
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84 |
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85 _etext = .; |
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86 PROVIDE (etext = .); |
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87 .fini : { *(.fini) } |
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88 .rodata1 : { *(.rodata1) } |
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89 .rodata : { *(.rodata*) } |
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90 .fixup : { *(.fixup) } |
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91 .gcc_except_table : { *(.gcc_except_table) } |
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92 |
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93 // __rom_data_start = __rom_ram_vectors_start + SIZEOF( .ram_vectors ); |
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94 __rom_data_start = ALIGN(8); |
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95 .data DATA_BASE : |
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96 AT( __rom_data_start ) |
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97 { |
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98 __ram_data_start = .; |
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99 *(.data*) |
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100 __GOT1_START__ = .; |
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101 *(.got1) |
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102 __GOT1_END__ = .; |
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103 /* Put .ctors and .dtors next to the .got2 section, so that the pointers |
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104 get relocated with -mrelocatable. */ |
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105 #ifdef CYG_KERNEL_USE_INIT_PRIORITY |
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106 . = ALIGN(8); |
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107 __CTOR_LIST__ = .; |
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108 KEEP(*(SORT(.ctors*))) |
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109 __CTOR_END__ = .; |
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110 __DTOR_LIST__ = .; |
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111 KEEP(*(SORT(.dtors*))) |
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112 __DTOR_END__ = .; |
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113 #else |
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114 __CTOR_LIST__ = .; |
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115 *sched.o(.ctors*) |
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116 *clock.o(.ctors*) |
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117 *thread.o(.ctors*) |
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118 *(.ctors*) |
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119 __CTOR_END__ = .; |
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120 __DTOR_LIST__ = .; |
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121 *(.dtors) |
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122 __DTOR_END__ = .; |
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123 #endif |
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124 __GOT2_START__ = .; |
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125 *(.got2) |
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126 __GOT2_END__ = .; |
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127 __GOT_START__ = .; |
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128 _GLOBAL_OFFSET_TABLE_ = . + 32768; |
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129 _SDA_BASE_ = .; |
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130 *(.got.plt) |
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131 *(.got) |
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132 __GOT_END__ = .; |
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133 *(.dynamic) |
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134 // We want the small data sections together, so single-instruction offsets |
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135 // can access them all, and initialized data all before uninitialized, so |
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136 // we can shorten the on-disk segment size. |
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137 __SDATA_START__ = .; |
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138 *(.sdata) |
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139 __SDATA2_START__ = .; |
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140 *(.sdata2) |
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141 } |
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142 __ram_data_end = .; |
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143 PROVIDE( __ram_data_end = .); |
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144 _edata = .; |
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145 PROVIDE (edata = .); |
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146 . = ALIGN(4); |
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147 __bss_start = .; |
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148 .sbss : |
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149 { |
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150 __SBSS_START__ = .; |
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151 *(.sbss) |
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152 __SBSS_END__ = .; |
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153 __SBSS2_START__ = .; |
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154 *(.sbss2) |
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155 __SBSS2_END__ = .; |
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156 *(.scommon) |
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157 } |
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158 . = ALIGN(8); |
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159 .bss : |
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160 { |
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161 *(.scommon) |
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162 *(.dynbss) |
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163 *(.bss) |
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164 *(COMMON) |
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165 } |
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166 . = ALIGN(4); |
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167 _end = . ; |
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168 PROVIDE (end = .); |
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169 |
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170 } |