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annotate packages/hal/synth/i386linux/current/include/var_arch.h @ 176:3902ef905c9c

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Merge from eCos master repository on 2001-08-03-06:43:13-BST
author jlarmour
date Fri, 03 Aug 2001 12:27:32 +0000
parents ac086aa3217e
children e0c0827131d1
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1 #ifndef CYGONCE_HAL_VAR_ARCH_H
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2 #define CYGONCE_HAL_VAR_ARCH_H
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3
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4 //=============================================================================
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5 //
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6 // var_arch.h
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7 //
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8 // Per-processor information such as processor save states.
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9 //
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10 //=============================================================================
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11 //####COPYRIGHTBEGIN####
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12 //
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13 // -------------------------------------------
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14 // The contents of this file are subject to the Red Hat eCos Public License
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15 // Version 1.1 (the "License"); you may not use this file except in
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16 // compliance with the License. You may obtain a copy of the License at
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17 // http://www.redhat.com/
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18 //
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19 // Software distributed under the License is distributed on an "AS IS"
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20 // basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the
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21 // License for the specific language governing rights and limitations under
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22 // the License.
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23 //
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24 // The Original Code is eCos - Embedded Configurable Operating System,
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25 // released September 30, 1998.
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26 //
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27 // The Initial Developer of the Original Code is Red Hat.
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28 // Portions created by Red Hat are
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29 // Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc.
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30 // All Rights Reserved.
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31 // -------------------------------------------
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32 //
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33 //####COPYRIGHTEND####
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34 //=============================================================================
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35 //#####DESCRIPTIONBEGIN####
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36 //
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37 // Author(s): proven
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38 // Contributors:proven, pjo, nickg,bartv
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39 // Date: 1998-10-05
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40 // Purpose: Define architecture abstractions
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41 // Usage: #include <cyg/hal/hal_arch.h>
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42 //
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43 //####DESCRIPTIONEND####
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44 //
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45 //=============================================================================
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46
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47
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48 #include <cyg/infra/cyg_type.h>
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49
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50 //-----------------------------------------------------------------------------
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51 // Processor saved states. This structure is also defined in arch.inc for
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52 // assembly code. Do not change this without changing that (or vice versa).
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53 // Note: there is no need to worry about floating point contexts, see context.S
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54
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55 typedef struct
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56 {
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57 cyg_uint32 esp;
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58 cyg_uint32 next_context; // only used when dropping through...
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59 cyg_uint32 ebp; // ...from switch_ to load_context
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60 cyg_uint32 ebx;
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61 cyg_uint32 esi;
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62 cyg_uint32 edi;
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63 cyg_bool interrupts; // Are interrupts enabled for this thread?
161
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64 } HAL_SavedRegisters;
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65
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66
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67 //-----------------------------------------------------------------------------
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68 // Bit manipulation routines. These are provided by the processor variant
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69 // HAL to allow for processor-specific implementations.
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70
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71 #define HAL_LSBIT_INDEX(index, mask) \
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72 CYG_MACRO_START \
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73 asm volatile( "bsfl %1,%0\n" \
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74 : "=r" (index) \
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75 : "r" (mask) \
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76 ); \
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77 CYG_MACRO_END
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78
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79 #define HAL_MSBIT_INDEX(index, mask) \
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80 CYG_MACRO_START \
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81 asm volatile( "bsrl %1,%0\n" \
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82 : "=r" (index) \
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83 : "r" (mask) \
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84 ); \
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85 CYG_MACRO_END
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86
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87 //-----------------------------------------------------------------------------
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88 // Context Initialization
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89 // Initialize the context of a thread.
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90 // Arguments:
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91 // _sp_ name of variable containing current sp, will be written with new sp
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92 // _thread_ thread object address, passed as argument to entry point
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93 // _entry_ entry point address.
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94 // _id_ bit pattern used in initializing registers, for debugging.
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95
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96 #define HAL_THREAD_INIT_CONTEXT( _sparg_, _thread_, _entry_, _id_ ) \
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97 CYG_MACRO_START \
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98 register CYG_WORD* _sp_ = ((CYG_WORD*)((_sparg_) &~15)); \
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99 register HAL_SavedRegisters *_regs_; \
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100 \
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101 /* The 'ret' executed at the end of hal_thread_load_context will */ \
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102 /* use the last entry on the stack as a return pointer (_entry_). */ \
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103 /* Cyg_HardwareThread::thread_entry expects one argument at stack */ \
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104 /* offset 4 (_thread_). The (0xDEADBEEF) entry is the return addr */ \
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105 /* for thread_entry (which is never used). */ \
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106 *(--_sp_) = (CYG_WORD)(0); \
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107 *(--_sp_) = (CYG_WORD)(0); \
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108 *(--_sp_) = (CYG_WORD)(0); \
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109 *(--_sp_) = (CYG_WORD)(0); \
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110 *(--_sp_) = (CYG_WORD)(_thread_); \
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111 *(--_sp_) = (CYG_WORD)(0); \
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112 *(--_sp_) = (CYG_WORD)(_entry_); \
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113 \
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114 _regs_ = (HAL_SavedRegisters *) \
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115 ((unsigned long)_sp_ - sizeof(HAL_SavedRegisters)); \
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116 _regs_->esp = (CYG_WORD) _sp_; \
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117 _regs_->ebx = (CYG_WORD)(_id_); \
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118 _regs_->ebp = (CYG_WORD)(_id_); \
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119 _regs_->esi = (CYG_WORD)(_id_); \
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120 _regs_->edi = (CYG_WORD)(_id_); \
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121 _regs_->interrupts = true; \
161
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122 (_sparg_) = (CYG_ADDRESS) _regs_; \
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123 CYG_MACRO_END
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124
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125 //-----------------------------------------------------------------------------
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126 // Context switch macros.
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127 // The arguments are pointers to locations where the stack pointer
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128 // of the current thread is to be stored, and from where the sp of the
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129 // next thread is to be fetched.
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130
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131 externC void hal_thread_switch_context( CYG_ADDRESS _to_, CYG_ADDRESS _from_ );
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132 externC void hal_thread_load_context( CYG_ADDRESS _to_ )
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133 __attribute__ ((noreturn));
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134
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135 #define HAL_THREAD_SWITCH_CONTEXT(_fspptr_,_tspptr_) \
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136 hal_thread_switch_context((CYG_ADDRESS)_tspptr_,(CYG_ADDRESS)_fspptr_);
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137
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138 #define HAL_THREAD_LOAD_CONTEXT(_tspptr_) \
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139 hal_thread_load_context( (CYG_ADDRESS)_tspptr_ );
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140
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141 //-----------------------------------------------------------------------------
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142 // HAL setjmp
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143
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144 #define CYGARC_JMP_BUF_SP 0
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145 #define CYGARC_JMP_BUF_EBP 1
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146 #define CYGARC_JMP_BUF_EBX 2
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147 #define CYGARC_JMP_BUF_ESI 3
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148 #define CYGARC_JMP_BUF_EDI 4
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149 #define CYGARC_JMP_BUF_PC 5
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150
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151 #define CYGARC_JMP_BUF_SIZE 6
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152
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153 typedef cyg_uint32 hal_jmp_buf[CYGARC_JMP_BUF_SIZE];
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154
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155 externC int hal_setjmp(hal_jmp_buf env);
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156 externC void hal_longjmp(hal_jmp_buf env, int val);
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157
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158 //-----------------------------------------------------------------------------
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159 // Minimal and sensible stack sizes: the intention is that applications
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160 // will use these to provide a stack size in the first instance prior to
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161 // proper analysis. Idle thread stack should be this big.
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162
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163 // THESE ARE NOT INTENDED TO BE MICROMETRICALLY ACCURATE FIGURES.
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164 // THEY ARE HOWEVER ENOUGH TO START PROGRAMMING.
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165 // YOU MUST MAKE YOUR STACKS LARGER IF YOU HAVE LARGE "AUTO" VARIABLES!
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166
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167 // This is not a config option because it should not be adjusted except
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168 // under "enough rope" sort of disclaimers.
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169
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170 // Stack frame overhead per call. 3 local registers (edi, esi, ebx) and
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171 // return address.
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172 #define CYGNUM_HAL_STACK_FRAME_SIZE (4 * 4)
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173
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174 // Stack needed for a context switch (i386reg_context_size from i386.inc)
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175 #define CYGNUM_HAL_STACK_CONTEXT_SIZE (4 * 24)
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176
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177 // Interrupt stack size. Interrupts are handled by signals so the relevant
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178 // data is MINSIGSTKSIZE (see man sigaltstack) or 2048. Given the
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179 // multiplier *15 for STACK_SIZE_MINIMUM, this should be adequate.
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180 #define CYGNUM_HAL_STACK_INTERRUPT_SIZE 2048
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181
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182 // We define a minimum stack size as the minimum any thread could ever
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183 // legitimately get away with. We can throw asserts if users ask for less
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184 // than this. Allow enough for three interrupt sources - clock, serial and
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185 // one other
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186 //
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187 // On the synthetic target memory is cheap so comparatively large stacks
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188 // are possible. This avoids stack overflow problems when working with
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189 // the synthetic target, although arguably the problem is now deferred to
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190 // when the application is moved to real hardware where it will be more
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191 // difficult to track down.
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192 #define CYGNUM_HAL_STACK_SIZE_MINIMUM (16 * 1024)
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193 #define CYGNUM_HAL_STACK_SIZE_TYPICAL (32 * 1024)
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194
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195 //--------------------------------------------------------------------------
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196 // Macros for switching context between two eCos instances (jump from
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197 // code in ROM to code in RAM or vice versa).
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198 #define CYGARC_HAL_SAVE_GP()
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199 #define CYGARC_HAL_RESTORE_GP()
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200
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201 //--------------------------------------------------------------------------
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202 #endif // CYGONCE_HAL_VAR_ARCH_H
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203 // End of var_arch.h