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annotate packages/hal/arm/edb7xxx/current/misc/i2s_audio_test.c @ 76:435cced73e2f ecos-v1_3_1-release

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eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
author jlarmour
date Tue, 28 Mar 2000 14:10:45 +0000
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children e0c0827131d1
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1 //==========================================================================
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2 //
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3 // i2s_audio_test.c
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4 //
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5 // Cirrus CL7209 eval board CS4340 audio test
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6 //
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7 //==========================================================================
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8 //####COPYRIGHTBEGIN####
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9 //
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10 // -------------------------------------------
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11 // The contents of this file are subject to the Red Hat eCos Public License
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12 // Version 1.1 (the "License"); you may not use this file except in
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13 // compliance with the License. You may obtain a copy of the License at
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14 // http://www.redhat.com/
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15 //
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16 // Software distributed under the License is distributed on an "AS IS"
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17 // basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the
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18 // License for the specific language governing rights and limitations under
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19 // the License.
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20 //
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21 // The Original Code is eCos - Embedded Configurable Operating System,
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22 // released September 30, 1998.
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23 //
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24 // The Initial Developer of the Original Code is Red Hat.
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25 // Portions created by Red Hat are
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26 // Copyright (C) 1998, 1999, 2000 Red Hat, Inc.
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27 // All Rights Reserved.
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28 // -------------------------------------------
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29 //
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30 //####COPYRIGHTEND####
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31 //==========================================================================
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32 //#####DESCRIPTIONBEGIN####
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33 //
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34 // Author(s): gthomas
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35 // Contributors: gthomas
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36 // Date: 2000-01-03
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37 // Description: Tool used to test AUDIO interface
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38 //####DESCRIPTIONEND####
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39
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40 #include <pkgconf/kernel.h> // Configuration header
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41 #include <cyg/kernel/kapi.h>
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42 #include <cyg/infra/diag.h>
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43
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44 #include <cyg/hal/hal_edb7xxx.h> // Board definitions
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45
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46 #include <cyg/hal/hal_io.h> // IO macros
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47 #include <cyg/hal/hal_arch.h> // Register state info
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48 #include <cyg/hal/hal_diag.h>
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49 #include <cyg/hal/hal_intr.h> // HAL interrupt macros
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50 #include <cyg/hal/drv_api.h> // HAL ISR support
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51
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52 #if 1
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53 #include "long_audio_left.h"
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54 #include "long_audio_right.h"
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55 #else
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56 #include "short_audio_left.h"
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57 #include "short_audio_right.h"
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58 #endif
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59
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60 extern void i2s_FIQ(void); // Actually the FIQ handler
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61
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62 // Number of data samples to play
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63 #define NUM_PCM_SAMPLES (sizeof(left_channel)/sizeof(left_channel[0]))
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64 // Play the data in 8 "chunks", truncated to multiple of 4 samples
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65 #define CHUNK_LENGTH (((NUM_PCM_SAMPLES/8)/4)*4)
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66
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67 // This structure is used by the assembly coded interrupt routine
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68 struct audio_buf {
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69 void *left_chan_ptr;
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70 void *right_chan_ptr;
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71 int length;
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72 };
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73 volatile struct audio_buf cur_buf;
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74 volatile struct audio_buf next_buf;
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75
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76 #ifndef FALSE
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77 #define FALSE 0
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78 #define TRUE 1
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79 #endif
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80
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81 #define STACK_SIZE 4096
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82 static char stack[STACK_SIZE];
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83 static cyg_thread thread_data;
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84 static cyg_handle_t thread_handle;
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85
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86 // FUNCTIONS
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87
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88 static void
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89 cyg_test_exit(void)
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90 {
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91 while (TRUE) ;
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92 }
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93
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94 static void
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95 I2Sreset(void)
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96 {
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97 // Enable i2s interface instead of SSI#2
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98 *(volatile cyg_uint32 *)SYSCON3 |= SYSCON3_I2SSEL | 0x200;
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99
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100 // Configure the i2s audio interface
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101 // External clock, interrupt on right channel FIFO needs service
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102 *(volatile cyg_uint32 *)I2S_CTL = I2S_CTL_FLAG | I2S_CTL_ECS | I2S_CTL_RCTM;
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103
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104 // Clear out status register
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105 *(volatile cyg_uint32 *)I2S_STAT = 0xFFFFFFFF; // 1's reset
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106
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107 // Now enable the interface
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108 *(volatile cyg_uint32 *)I2S_CTL |= I2S_CTL_EN;
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109
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110 // Turn on the FIFOs
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111 while ((*(volatile cyg_uint32 *)I2S_STAT & I2S_STAT_FIFO) == 0) ; // Wait
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112 *(volatile cyg_uint32 *)I2S_STAT = I2S_STAT_FIFO; // Reset flag
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113 *(volatile cyg_uint32 *)I2S_FIFO_CTL = I2S_FIFO_CTL_RIGHT_ENABLE;
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114 while ((*(volatile cyg_uint32 *)I2S_STAT & I2S_STAT_FIFO) == 0) ; // Wait
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115 *(volatile cyg_uint32 *)I2S_STAT = I2S_STAT_FIFO; // Reset flag
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116 *(volatile cyg_uint32 *)I2S_FIFO_CTL = I2S_FIFO_CTL_LEFT_ENABLE;
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117 while ((*(volatile cyg_uint32 *)I2S_STAT & I2S_STAT_FIFO) == 0) ; // Wait
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118 *(volatile cyg_uint32 *)I2S_STAT = I2S_STAT_FIFO; // Reset flag
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119
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120 // Clear out status register
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121 *(volatile cyg_uint32 *)I2S_STAT = 0xFFFFFFFF; // 1's reset
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122
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123 // Enable interrupt
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124 *(volatile cyg_uint32 *)INTMR3 |= INTSR3_I2SINT;
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125 }
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126
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127 static void
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128 I2Sdisable(void)
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129 {
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130 // Turn off the FIFOs
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131 while ((*(volatile cyg_uint32 *)I2S_STAT & I2S_STAT_FIFO) == 0) ; // Wait
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132 *(volatile cyg_uint32 *)I2S_STAT = I2S_STAT_FIFO; // Reset flag
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133 *(volatile cyg_uint32 *)I2S_FIFO_CTL = I2S_FIFO_CTL_RIGHT_DISABLE;
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134 while ((*(volatile cyg_uint32 *)I2S_STAT & I2S_STAT_FIFO) == 0) ; // Wait
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135 *(volatile cyg_uint32 *)I2S_STAT = I2S_STAT_FIFO; // Reset flag
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136 *(volatile cyg_uint32 *)I2S_FIFO_CTL = I2S_FIFO_CTL_LEFT_DISABLE;
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137 while ((*(volatile cyg_uint32 *)I2S_STAT & I2S_STAT_FIFO) == 0) ; // Wait
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138 *(volatile cyg_uint32 *)I2S_STAT = I2S_STAT_FIFO; // Reset flag
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139
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140 // Disable interrupt
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141 *(volatile cyg_uint32 *)INTMR3 &= ~INTSR3_I2SINT;
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142
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143 // Disable the interface
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144 *(volatile cyg_uint32 *)I2S_CTL = 0;
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145 }
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146
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147 static void
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148 idle(void)
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149 {
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150 // Do nothing
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151 }
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152
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153 static void
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154 audio_exercise(cyg_addrword_t p)
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155 {
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156 int sample, len;
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157 bool started;
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158
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159 diag_printf("AUDIO test here!\n");
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160
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161 // Enable my special FIQ handler
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162 HAL_VSR_SET(CYGNUM_HAL_VECTOR_FIQ, i2s_FIQ, NULL);
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163
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164 while (TRUE) {
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165 diag_printf("... Starting over\n");
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166
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167 // Set up pointers
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168 cur_buf.length = 0;
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169 next_buf.length = 0;
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170 sample = 0;
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171 started = false;
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172
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173 // Send out the data
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174 while (sample != NUM_PCM_SAMPLES) {
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175 if (next_buf.length == 0) {
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176 // Move some data into the "next" buffer
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177 next_buf.left_chan_ptr = &left_channel[sample];
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178 next_buf.right_chan_ptr = &right_channel[sample];
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179 len = NUM_PCM_SAMPLES - sample;
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180 if (len > CHUNK_LENGTH) len = CHUNK_LENGTH;
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181 next_buf.length = len;
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182
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183 idle();
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184
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185 if (!started) {
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186 started = true;
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187 // Initialize audio interface
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188 I2Sreset();
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189 }
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190 sample += len;
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191 }
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192 }
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193
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194 // Wait for all data to be sent
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195 while (cur_buf.length != 0) {
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196 }
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197
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198 // Shut off audio interface
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199 I2Sdisable();
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200 }
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201
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202 diag_printf("All done!\n");
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203 cyg_test_exit();
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204 }
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205
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206 externC void
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207 cyg_start( void )
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208 {
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209 // Create a main thread, so we can run the scheduler and have time 'pass'
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210 cyg_thread_create(11, // Priority - just a number
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211 audio_exercise, // entry
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212 0, // initial parameter
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213 "AUDIO_thread", // Name
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214 &stack[0], // Stack
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215 STACK_SIZE, // Size
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216 &thread_handle, // Handle
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217 &thread_data // Thread data structure
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218 );
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219 cyg_thread_resume(thread_handle); // Start it
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220 // Let 'em fly...
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221 cyg_scheduler_start();
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222 } // cyg_package_start()
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223