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Merge from eCos master repository on 2002-05-29-16:32:18-BST
author jlarmour
date Wed, 29 May 2002 18:28:03 +0000
parents d2c90368aeef
children 3a5832bf0564
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1 <!-- FIXME:
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2 Need to make index terms consistent
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3 -->
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6 <chapter id="Installation-and-Testing">
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7 <title>Installation and Testing</title>
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8 <indexterm><primary>installing and testing RedBoot</primary></indexterm><indexterm>
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9 <primary>RedBoot</primary><secondary>installing and testing</secondary></indexterm>
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11 <!-- *************************** AM3x ********************** -->
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12
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13 <?Pub _newpage>
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14 <sect1 id="asb2305">
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15 <title>AM3x/MN103E010 Matsushita MN103E010 (AM33/2.0) ASB2305 Board</title>
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16 <sect2>
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17 <title>Overview</title>
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18 <para>
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19 <indexterm>
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20 <primary>Matsushita MN103E010 (AM33/2.0) ASB2305 Board</primary>
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21 <secondary>installing and testing</secondary>
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22 </indexterm>
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23 <indexterm>
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24 <primary>installing and testing</primary>
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25 <secondary>Matsushita MN103E010 (AM33/2.0) ASB2305 Board</secondary>
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26 </indexterm>
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27 RedBoot supports the debug serial port and the built in ethernet port for communication and
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28 downloads. The default serial port settings are 115200,8,N,1 with RTS/CTS flow control. RedBoot can
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29 run from either flash, and can support flash management for either the boot PROM or the system
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30 flash regions.</para>
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31
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32 <para>The following RedBoot configurations are supported:
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33
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34 <informaltable frame="all">
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35 <tgroup cols="4" colsep="1" rowsep="1" align="left">
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36 <thead>
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37 <row>
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38 <entry>Configuration</entry>
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39 <entry>Mode</entry>
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40 <entry>Description</entry>
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41 <entry>File</entry>
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42 </row>
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43 </thead>
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44 <tbody>
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45 <row>
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46 <entry>PROM</entry>
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47 <entry>[ROM]</entry>
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48 <entry>RedBoot running from the boot PROM and able to
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49 access the system flash.</entry>
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50 <entry>redboot_ROM.ecm</entry>
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51 </row>
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52 <row>
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53 <entry>FLASH</entry>
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54 <entry>[ROM]</entry>
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55 <entry>RedBoot running from the system flash and able to
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56 access the boot PROM.</entry>
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57 <entry>redboot_FLASH.ecm</entry>
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58 </row>
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59 <row>
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60 <entry>RAM</entry>
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61 <entry>[RAM]</entry>
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62 <entry>RedBoot running from RAM and able to access the
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63 boot PROM.</entry>
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64 <entry>redboot_RAM.ecm</entry>
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65 </row>
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66 </tbody>
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67 </tgroup>
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68 </informaltable>
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69 </para>
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70 </sect2>
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71
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72 <sect2>
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73 <title>Initial Installation</title>
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74 <para>Unless a pre-programmed system flash module is available to be plugged into a new board,
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75 RedBoot must be installed with the aid of a JTAG interface unit. To achieve this, the RAM mode
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76 RedBoot must be loaded directly into RAM by JTAG and started, and then <emphasis>that</emphasis>
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77 must be used to store the ROM mode RedBoot into the boot PROM.</para>
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78 <para>These instructions assume that you have binary images of the RAM-based and boot PROM-based
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79 RedBoot images available.</para>
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80 <sect3>
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81 <title>Preparing to program the board</title>
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82 <para>If the board is to be programmed, whether via JTAG or RedBoot, some hardware settings need to
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83 be changed:</para>
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84 <itemizedlist>
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85 <listitem>
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86 <para>Jumper across ST18 on the board to allow write access to the boot PROM.</para>
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87 </listitem>
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88 <listitem>
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89 <para>Set DIP switch S1-3 to OFF to allow RedBoot to write to the system flash.</para>
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90 </listitem>
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91 <listitem>
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92 <para>Set the switch S5 (on the front of the board) to boot from whichever flash is
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93 <emphasis>not</emphasis> being programmed. Note that the RedBoot image cannot access the flash from
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94 which it is currently executing (it can only access the other flash).</para>
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95 </listitem>
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96 </itemizedlist>
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97 <para>
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98 The RedBoot binary image files should also be copied to the TFTP pickup area on the host providing
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99 TFTP services if that is how RedBoot should pick up the images it is going to program into the
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100 flash. Alternatively, the images can be passed by YMODEM over the serial link.
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101 </para>
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102 </sect3>
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103 <sect3>
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104 <title>Preparing to use the JTAG debugger</title>
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105 <para>The JTAG debugger will also need setting up:</para>
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106 <orderedlist>
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107 <listitem><para>Install the JTAG debugger software (WICE103E) on a PC running Windows (WinNT is
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108 probably the best choice for this) in &ldquo;C:/PanaX&rdquo;.</para>
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109 </listitem>
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110 <listitem><para>Install the Matsushita provided &ldquo;project&rdquo; into the
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111 &ldquo;C:/Panax/wice103e/prj&rdquo; directory.</para>
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112 </listitem>
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113 <listitem><para>Install the RedBoot image files into the &ldquo;C:/Panax/wice103e/prj&rdquo;
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114 directory under the names redboot.ram and redboot.prom.</para>
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115 </listitem>
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116 <listitem><para>Make sure the PC's BIOS has the parallel port set to full bidirectional
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117 mode.</para>
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118 </listitem>
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119 <listitem><para>Connect the JTAG debugger to the PC's parallel port.</para>
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120 </listitem>
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121 <listitem><para>Connect the JTAG debugger to the board.</para>
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122 </listitem>
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123 <listitem><para>Set the switch on the front of the board to boot from &ldquo;boot
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124 PROM&rdquo;.</para>
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125 </listitem>
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126 <listitem><para>Power up the JTAG debugger and then power up the board.</para>
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127 </listitem>
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128 <listitem><para>Connect the board's Debug Serial port to a computer by a null modem cable.</para>
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129 </listitem>
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130 <listitem><para>Start minicom or some other serial communication software and set for 115200 baud,
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131 1-N-8 with hardware (RTS/CTS) flow control.</para>
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132 </listitem>
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133 </orderedlist>
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134 </sect3>
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135 <sect3>
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136 <title>Loading the RAM-based RedBoot via JTAG</title>
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137 <para>To perform the first half of the operation, the following steps should be followed:</para>
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138 <orderedlist>
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139 <listitem><para>Start the JTAG debugger software.</para>
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140 </listitem>
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141 <listitem>
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142 <para>Run the following commands at the JTAG debugger's prompt to set up the MMU registers on the
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143 CPU.</para>
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144 <screen>
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145 <userinput>ed 0xc0002000, 0x12000580</userinput>
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146
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147 <userinput>ed 0xd8c00100, 0x8000fe01</userinput>
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148 <userinput>ed 0xd8c00200, 0x21111000</userinput>
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149 <userinput>ed 0xd8c00204, 0x00100200</userinput>
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150 <userinput>ed 0xd8c00208, 0x00000004</userinput>
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151
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152 <userinput>ed 0xd8c00110, 0x8400fe01</userinput>
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153 <userinput>ed 0xd8c00210, 0x21111000</userinput>
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154 <userinput>ed 0xd8c00214, 0x00100200</userinput>
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155 <userinput>ed 0xd8c00218, 0x00000004</userinput>
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156
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157 <userinput>ed 0xd8c00120, 0x8600ff81</userinput>
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158 <userinput>ed 0xd8c00220, 0x21111000</userinput>
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159 <userinput>ed 0xd8c00224, 0x00100200</userinput>
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160 <userinput>ed 0xd8c00228, 0x00000004</userinput>
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161
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162 <userinput>ed 0xd8c00130, 0x8680ff81</userinput>
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163 <userinput>ed 0xd8c00230, 0x21111000</userinput>
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164 <userinput>ed 0xd8c00234, 0x00100200</userinput>
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165 <userinput>ed 0xd8c00238, 0x00000004</userinput>
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166
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167 <userinput>ed 0xd8c00140, 0x9800f801</userinput>
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168 <userinput>ed 0xd8c00240, 0x00140000</userinput>
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169 <userinput>ed 0xd8c00244, 0x11011100</userinput>
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170 <userinput>ed 0xd8c00248, 0x01000001</userinput>
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171
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172 <userinput>ed 0xda000000, 0x55561645</userinput>
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173 <userinput>ed 0xda000004, 0x000003c0</userinput>
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174 <userinput>ed 0xda000008, 0x9000fe01</userinput>
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175 <userinput>ed 0xda00000c, 0x9200fe01</userinput>
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176 <userinput>ed 0xda000000, 0xa89b0654</userinput>
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177 </screen>
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178 </listitem>
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179 <listitem>
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180 <para>Run the following commands at the JTAG debugger's prompt to tell it what regions of the CPU's
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181 address space it can access:</para>
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182 <screen>
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183 <userinput>ex 0x80000000,0x81ffffff,/mexram</userinput>
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184 <userinput>ex 0x84000000,0x85ffffff,/mexram</userinput>
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185 <userinput>ex 0x86000000,0x867fffff,/mexram</userinput>
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186 <userinput>ex 0x86800000,0x87ffffff,/mexram</userinput>
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187 <userinput>ex 0x8c000000,0x8cffffff,/mexram</userinput>
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188 <userinput>ex 0x90000000,0x93ffffff,/mexram</userinput>
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189 </screen>
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190 </listitem>
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191 <listitem><para>Instruct the debugger to load the RAM RedBoot image into RAM:</para>
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192 <screen>
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193 <userinput>_pc=90000000</userinput>
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194 <userinput>u_pc</userinput>
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195 <userinput>rd redboot.ram,90000000</userinput>
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196 </screen>
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197 </listitem>
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198 <listitem><para>Load the boot PROM RedBoot into RAM:</para>
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199 <screen>
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200 <userinput>rd redboot.prom,91020000</userinput>
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201 </screen>
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202 </listitem>
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203 <listitem><para>Start RedBoot in RAM:</para>
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204 <screen>
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205 <userinput>g</userinput>
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206 </screen>
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207 <para>Note that RedBoot may take some time to start up, as it will attempt to query a BOOTP or DHCP
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208 server to try and automatically get an IP address for the board. Note, however, that it should send
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209 a plus over the serial port immediately, and the 7-segment LEDs should display &ldquo;rh
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210 8&rdquo;.</para>
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211 </listitem>
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212 </orderedlist>
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213 </sect3>
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214 <sect3>
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215 <title>Loading the boot PROM-based RedBoot via the RAM mode RedBoot</title>
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216 <para>Once the RAM mode RedBoot is up and running, it can be communicated with by way of the serial
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217 port. Commands can now be entered directly to RedBoot for flashing the boot PROM.</para>
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218 <orderedlist>
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219 <listitem><para>Instruct RedBoot to initialise the boot PROM:</para>
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220 <screen>
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221 RedBoot> <userinput>fi init</userinput>
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222 </screen>
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223 </listitem>
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224 <listitem><para>Write the previously loaded redboot.prom image into the boot PROM:</para>
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225 <screen>
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226 RedBoot> <userinput>fi write -f 0x80000000 -b 0x91020000 -l 0x00020000</userinput>
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227 </screen>
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228 </listitem>
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229 <listitem><para>Check that RedBoot has written the image:</para>
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230 <screen>
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231 RedBoot> <userinput>dump -b 0x91020000</userinput>
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232 RedBoot> <userinput>dump -b 0x80000000</userinput>
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233 </screen>
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234 <para>Barring the difference in address, the two dumps should be the same.</para>
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235 </listitem>
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236 <listitem><para>Close the JTAG software and power-cycle the board. The RedBoot banners should be
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237 displayed again over the serial port, followed by the RedBoot prompt. The boot PROM-based RedBoot
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238 will now be running.</para>
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239 </listitem>
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240 <listitem><para>Power off the board and unjumper ST18 to write-protect the contents of the boot
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241 PROM. Then power the board back up.</para>
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242 </listitem>
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243 <listitem><para>Run the following command to initialise the system flash:</para>
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244 <screen>
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245 RedBoot> <userinput>fi init</userinput>
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246 </screen>
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247 <para>Then program the system flash based RedBoot into the system flash:</para>
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248 <screen>
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249 RedBoot> <userinput>load -r -b %{FREEMEMLO} redboot_FLASH.bin</userinput>
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250 RedBoot> <userinput>fi write -f 0x84000000 -b %{FREEMEMLO} -l 0x00020000</userinput>
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251 </screen>
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252 <note>
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253 <title>NOTE</title>
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254 <para>RedBoot arranges the flashes on booting such that they always appear at the same addresses,
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255 no matter which one was booted from.</para>
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256 </note>
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257 </listitem>
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258 <listitem>
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259 <para>A similar sequence of commands can be used to program the boot PROM when RedBoot has been
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260 booted from an image stored in the system flash.
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261 </para>
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262 <screen>
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263 RedBoot> <userinput>load -r -b %{FREEMEMLO} /tftpboot/redboot_ROM.bin</userinput>
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264 RedBoot> <userinput>fi write -f 0x80000000 -b %{FREEMEMLO} -l 0x00020000</userinput>
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265 </screen>
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266 <para>See <xref linkend="Persistent-State-Flash"> for details on configuring the RedBoot in
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267 general, and also <xref linkend="Flash-Image-System"> for more details on programming the system
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268 flash.</para>
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269 </listitem>
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270 </orderedlist>
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271 </sect3>
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272 </sect2>
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273 <sect2>
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274 <title>Additional Commands</title>
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275 <para>The <command>exec</command> command which allows the loading and execution of
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276 Linux kernels, is supported for this architecture (see <xref linkend="executing-programs">). The
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277 <command>exec</command> parameters used for ASB2305 board are:</para>
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278 <variablelist>
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279 <varlistentry><term>
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280 -w <replaceable>&lt;time></replaceable></term>
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281 <listitem><para>Wait time in seconds before starting kernel</para></listitem></varlistentry>
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282 <varlistentry><term>
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283 -c <replaceable>"params"</replaceable></term>
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284 <listitem><para>Parameters passed to kernel</para></listitem></varlistentry>
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285 <varlistentry><term><replaceable>&lt;addr></replaceable></term>
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286 <listitem><para>Kernel entry point, defaulting to the entry point of the last image
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287 loaded</para></listitem></varlistentry>
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288 </variablelist>
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289 <para>The parameter string is stored in the on-chip memory at location 0x8C001000, and is prefixed
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290 by &ldquo;cmdline:&rdquo; if it was supplied.</para>
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291 </sect2>
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292 <sect2>
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293 <title>Memory Maps </title>
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294 <para>RedBoot sets up the following memory map on the ASB2305 board.</para>
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295 <note>
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296 <title>NOTE</title>
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297 <para>The regions mapped between 0x80000000-0x9FFFFFFF are cached by the CPU. However, all those
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298 regions can be accessed uncached by adding 0x20000000 to the address.</para>
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299 </note>
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300 <programlisting>
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301 Physical Address Range Description
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302 ----------------------- -----------
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303 0x80000000 - 0x9FFFFFFF Cached Region
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304 0x80000000 - 0x81FFFFFF Boot PROM
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305 0x84000000 - 0x85FFFFFF System Flash
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306 0x86000000 - 0x86007FFF 64Kbit Sys Config EEPROM
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307 0x86F90000 - 0x86F90003 4x 7-segment LEDs
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308 0x86FA0000 - 0x86FA0003 Software DIP Switches
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309 0x86FB0000 - 0x86FB001F PC16550 Debug Serial Port
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310 0x8C000000 - 0x8FFFFFFF On-Chip Memory (repeated 16Kb SRAM)
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311 0x90000000 - 0x93FFFFFF SDRAM
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312 0x98000000 - 0x9BFFFFFF Paged PCI Memory Space (64Mb)
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313 0x9C000000 - 0x9DFFFFFF PCI Local SRAM (32Mb)
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314 0x9E000000 - 0x9E03FFFF PCI I/O Space
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315 0x9E040000 - 0x9E0400FF AM33-PCI Bridge Registers
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316 0x9FFFFFF4 - 0x9FFFFFF7 PCI Memory Page Register
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317 0x9FFFFFF8 - 0x9FFFFFFF PCI Config Registers
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318 0xA0000000 - 0xBFFFFFFF Uncached Mirror Region
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319 0xC0000000 - 0xDFFFFFFF CPU Control Registers
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320 </programlisting>
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321 <para>The ASB2305 HAL makes use of the on-chip memory in the following way:</para>
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322 <programlisting>
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323 0x8C000000 - 0x8C0000FF hal_vsr_table
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324 0x8C000100 - 0x8C0001FF hal_virtual_vector_table
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325 0x8C001000 - Linux command line (RedBoot exec command)
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326 - 0x8C003FFF Emergency DoubleFault Exception Stack
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327 </programlisting>
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328 <para>Currently the CPU's interrupt table lies at the beginning of the RedBoot image, which must
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329 therefore be aligned to a 0xFF000000 mask.</para>
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330 </sect2>
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331 <sect2>
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332 <title>Rebuilding RedBoot</title>
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333
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334 <para>These shell variables provide the platform-specific information
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335 needed for building RedBoot according to the procedure described in
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336 <xref linkend="Rebuilding-Redboot">:
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337 <programlisting>
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338 export TARGET=asb2305
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339 export ARCH_DIR=mn10300
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340 export PLATFORM_DIR=asb2305
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341 </programlisting>
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342 </para>
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343
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344 <para>The names of configuration files are listed above with the
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345 description of the associated modes.</para>
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346
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347 </sect2>
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348 </sect1>
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349
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350 <!-- *************************** ARM ******************* -->
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351
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352 <?Pub _newpage>
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353 <sect1 id="e7t">
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354 <title>ARM/ARM7 ARM Evaluator7T</title>
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355 <sect2>
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356 <title>Overview</title>
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357 <para><indexterm><primary>ARM Evaluator7T</primary><secondary>installing and
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358 testing</secondary></indexterm><indexterm><primary>installing and testing
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359 </primary><secondary>ARM Evaluator7T</secondary></indexterm>RedBoot supports
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360 both serial ports for communication and downloads. The default serial port
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361 settings are 38400,8,N,1.</para>
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362
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363 <para>The following RedBoot configurations are supported:
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364
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365 <informaltable frame="all">
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366 <tgroup cols="4" colsep="1" rowsep="1" align="left">
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367 <thead>
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368 <row>
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369 <entry>Configuration</entry>
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370 <entry>Mode</entry>
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371 <entry>Description</entry>
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372 <entry>File</entry>
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373 </row>
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374 </thead>
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375 <tbody>
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376 <row>
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377 <entry>ROM</entry>
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378 <entry>[ROM]</entry>
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379 <entry>RedBoot running from flash address 0x20000, with
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380 ARM Boot Monitor in flash boot sector.</entry>
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381 <entry>redboot_ROMA.ecm</entry>
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382 </row>
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383 </tbody>
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384 </tgroup>
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385 </informaltable>
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386 </para>
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387
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388 </sect2>
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389 <sect2>
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390 <title>Initial Installation</title>
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391 <para>RedBoot is installed using the on-board boot environment. See the user
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392 manual for full details.</para>
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393 </sect2>
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394 <sect2>
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395 <title>Quick download instructions</title>
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396 <para>Here are quick start instructions for downloading the prebuilt Redboot
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397 image:</para>
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398 <itemizedlist>
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399 <listitem><para>Boot the board and press ENTER:</para>
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400 <screen>
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401
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402 ARM Evaluator7T Boot Monitor PreRelease 1.00
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403 Press ENTER within 2 seconds to stop autoboot
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404 Boot: </screen>
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405 </listitem>
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406 <listitem><para>Erase the part of the flash where RedBoot will get programmed:
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407 </para>
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408 <screen> Boot: <userinput>flasherase 01820000 10000</userinput></screen>
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409 </listitem>
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410 <listitem><para>Prepare to download the UU-encoded version of the RedBoot
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411 image:</para>
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412 <screen> Boot: <userinput>download 10000</userinput>
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413 Ready to download. Use 'transmit' option on terminal emulator to download file.
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414 </screen>
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415 </listitem>
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416 <listitem><para>Either use ASCII transmit option in the terminal emulator,
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417 or on Linux, simply cat the file to the serial port:<screen> $ <userinput>
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418 cat redboot.UU > /dev/ttyS0</userinput></screen>When complete, you should
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419 see:<screen> Loaded file redboot.bin at address 000100000, size = 41960
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420 Boot:</screen></para>
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421 </listitem>
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422 <listitem><para>Program the flash:<screen> Boot: <userinput>flashwrite 01820000 10000 10000
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423 </userinput></screen></para>
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424 </listitem>
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425 <listitem><para>And verify that the module is available:<screen> Boot: <userinput>
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426 rommodules</userinput>
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427 Header Base Limit
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428 018057c8 01800000 018059e7 BootStrapLoader v1.0 Apr 27 2000 10:33:58
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429 01828f24 01820000 0182a3e8 RedBoot Apr 5 2001</screen></para>
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430 </listitem>
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431 <listitem><para>Reboot the board and you should see the RedBoot banner.</para>
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432 </listitem>
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433 </itemizedlist>
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434 </sect2>
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435 <sect2>
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436 <title>Special RedBoot Commands </title>
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437 <para>None.</para>
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438 </sect2>
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439 <sect2>
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440 <title>Memory Maps </title>
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441 <para>RedBoot sets up the following memory map on the E7T board. <note><title>
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442 NOTE</title>
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443 <para>The virtual memory maps in this section use a C and B column to indicate
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444 whether or not the region is cached (C) or buffered (B).</para>
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445 </note> <programlisting>Physical Address Range C B Description
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446 ----------------------- - - -----------
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447 0x00000000 - 0x0007ffff Y N SDRAM
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448 0x03ff0000 - 0x03ffffff N N Microcontroller registers
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449 0x01820000 - 0x0187ffff N N System flash (mirrored)</programlisting></para>
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450 </sect2>
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451 <sect2>
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452 <title>Rebuilding RedBoot</title>
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453
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454 <para>These shell variables provide the platform-specific information
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455 needed for building RedBoot according to the procedure described in
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456 <xref linkend="Rebuilding-Redboot">:
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457 <programlisting>
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458 export TARGET=e7t
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459 export ARCH_DIR=arm
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460 export PLATFORM_DIR=e7t
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461 </programlisting>
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462 </para>
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463
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464 <para>The names of configuration files are listed above with the
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465 description of the associated modes.</para>
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466
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467 </sect2>
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468 </sect1>
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469
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470 <?Pub _newpage>
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471 <sect1 id="integrator">
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472 <title>ARM/ARM7+ARM9 ARM Integrator</title>
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473 <sect2>
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474 <title>Overview</title>
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475 <para><indexterm><primary>ARM Integrator</primary><secondary>installing and
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476 testing</secondary></indexterm><indexterm><primary>installing and testing
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477 </primary><secondary>ARM Integrator</secondary></indexterm>RedBoot supports
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478 both serial ports for communication and downloads. The default serial port
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479 settings are 38400,8,N,1.</para>
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480
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481 <para>The following RedBoot configurations are supported:
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482
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483 <informaltable frame="all">
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484 <tgroup cols="4" colsep="1" rowsep="1" align="left">
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485 <thead>
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486 <row>
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487 <entry>Configuration</entry>
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488 <entry>Mode</entry>
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489 <entry>Description</entry>
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490 <entry>File</entry>
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491 </row>
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492 </thead>
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493 <tbody>
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494 <row>
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495 <entry>ROM</entry>
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496 <entry>[ROM]</entry>
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497 <entry>RedBoot running from the board's flash boot
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498 sector.</entry>
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499 <entry>redboot_ROM.ecm</entry>
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500 </row>
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501 <row>
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502 <entry>RAM</entry>
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503 <entry>[RAM]</entry>
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504 <entry>RedBoot running from RAM with RedBoot in the
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505 flash boot sector.</entry>
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506 <entry>redboot_RAM.ecm</entry>
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507 </row>
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508 <row>
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509 <entry>ROMRAM</entry>
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510 <entry>[ROMRAM]</entry>
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511 <entry>RedBoot running from RAM, but contained in the
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512 board's flash boot sector.</entry>
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513 <entry>redboot_ROMRAM.ecm</entry>
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514 </row>
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515 </tbody>
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516 </tgroup>
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517 </informaltable>
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518 </para>
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519
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520 </sect2>
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521
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522 <sect2>
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523 <title>Initial Installation</title>
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524 <para>RedBoot is installed using the on-board bootPROM environment. See the user
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525 manual for full details.</para>
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526 </sect2>
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527 <sect2>
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528 <title>Quick download instructions</title>
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529 <para>Here are quick start instructions for downloading the prebuilt Redboot
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530 image:</para>
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531 <itemizedlist>
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532 <listitem><para>Set DIP switch S1[1] to the ON position and reset or
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533 power the board up. You will see the bootPROM startup message on
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534 serial port A (J14):</para>
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535 <screen>
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536 Initialising...
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537
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538
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539 ARM bootPROM [Version 1.3] Rebuilt on Jun 26 2001 at 22:04:10
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540 Running on a Integrator Evaluation Board
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541 Board Revision V1.0, ARM966E-S Processor
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542 Memory Size is 16MBytes, Flash Size is 32MBytes
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543 Copyright (c) ARM Limited 1999 - 2001. All rights reserved.
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544 Board designed by ARM Limited
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545 Hardware support provided at http://www.arm.com/
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546 For help on the available commands type ? or h
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547 boot Monitor >
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548 </screen>
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549 </listitem>
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550 <listitem>
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551 <para>Issue the FLASH ROM load command:
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552 </para>
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553 <screen>
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554 boot Monitor > <userinput>L</userinput>
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555 Load Motorola S-Records into flash
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556
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557 Deleting Image 0
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558
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559 The S-Record loader only accepts input on the serial port.
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560 Type Ctrl/C to exit loader.
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561 </screen>
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562 </listitem>
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563 <listitem><para>Either use the ASCII transmit option in the terminal emulator,
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564 or on Linux, simply cat the file to the serial port:
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565 </para>
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566 <screen>
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567 $ <userinput>cat redboot.srec > /dev/ttyS0</userinput>
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568 </screen>
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569 <para>
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570 When complete, type Ctrl-C and you should see something similar to:
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571 </para>
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572 <screen>
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573 ................................
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574 ................................
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575 ....................
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576 Downloaded 5,394 records in 81 seconds.
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577
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578 Overwritten block/s
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579 0
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580
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581 boot Monitor >
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582 </screen>
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583 </listitem>
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584 <listitem><para>Set DIP switch S1[1] to the OFF position and reboot
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585 the board and you should see the RedBoot banner.</para>
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586 </listitem>
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587 </itemizedlist>
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588 </sect2>
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589 <sect2>
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590 <title>Special RedBoot Commands </title>
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591 <para>None.</para>
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592 </sect2>
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593 <sect2>
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594 <title>Memory Maps </title>
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595 <para>RedBoot sets up the following memory map on the Integrator board. <note><title>
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596 NOTE</title>
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597 <para>The virtual memory maps in this section use a C and B column to indicate
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598 whether or not the region is cached (C) or buffered (B).</para>
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599 </note>
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600 <programlisting>
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601
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602 ARM7TDMI
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603 --------
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604
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605 Physical Address Range C B Description
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606 ----------------------- - - -----------
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607 0x00000000 - 0x0007ffff N N SSRAM
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608 0x00080000 - 0x0fffffff N N SDRAM (depends on part fitted)
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609 0x10000000 - 0x1fffffff N N System control and peripheral registers
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610 0x20000000 - 0x23ffffff N N Boot ROM (contains boot Monitor)
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611 0x24000000 - 0x27ffffff N N FLASH ROM (contains RedBoot)
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612 0x28000000 - 0x2bffffff N N SSRAM echo area
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613 0x40000000 - 0x5fffffff N N PCI Memory access windows
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614 0x60000000 - 0x60ffffff N N PCI IO access window
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615 0x61000000 - 0x61ffffff N N PCI config space window
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616 0x62000000 - 0x6200ffff N N PCI bridge register window
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617 0x80000000 - 0x8fffffff N N SDRAM echo area (used for PCI accesses)
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618
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619
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620 ARM966E
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621 -------
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622
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623 Physical Address Range C B Description
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624 ----------------------- - - -----------
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625 0x00000000 - 0x000fffff N N SSRAM
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626 0x00100000 - 0x0fffffff N N SDRAM (depends on part fitted)
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627 0x10000000 - 0x1fffffff N N System control and peripheral registers
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628 0x20000000 - 0x23ffffff N N Boot ROM (contains boot Monitor)
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629 0x24000000 - 0x27ffffff N N FLASH ROM (contains RedBoot)
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630 0x28000000 - 0x2bffffff N N SSRAM echo area
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631 0x40000000 - 0x5fffffff N N PCI Memory access windows
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632 0x60000000 - 0x60ffffff N N PCI IO access window
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633 0x61000000 - 0x61ffffff N N PCI config space window
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634 0x62000000 - 0x6200ffff N N PCI bridge register window
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635 0x80000000 - 0x8fffffff N N SDRAM echo area (used for PCI accesses)
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636
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637 </programlisting>
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638 </para>
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639 </sect2>
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640 <sect2>
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641 <title>Rebuilding RedBoot</title>
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642
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643 <para>These shell variables provide the platform-specific information
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644 needed for building RedBoot according to the procedure described in
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645 <xref linkend="Rebuilding-Redboot">:
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646 <programlisting>
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647 export TARGET=integrator
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648 export ARCH_DIR=arm
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649 export PLATFORM_DIR=integrator
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650 </programlisting>
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651 </para>
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652
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653 <para>The names of configuration files are listed above with the
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654 description of the associated modes.</para>
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655
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656 </sect2>
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657 </sect1>
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658
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659 <?Pub _newpage>
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660 <sect1 id="pid">
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661 <title>ARM/ARM7+ARM9 ARM PID Board and EPI Dev7+Dev9</title>
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662 <sect2>
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663 <title>Overview</title>
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664 <para><indexterm><primary>ARM ARM7 PID, Dev7 and Dev9</primary><secondary>
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665 installing and testing</secondary></indexterm><indexterm><primary>installing
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666 and testing</primary><secondary>ARM ARM7 PID, Dev7 and Dev9</secondary></indexterm>RedBoot
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667 uses either of the serial ports. The default serial port settings are 38400,8,N,1.
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668 Management of onboard flash is also supported.</para>
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669
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670 <para>The following RedBoot configurations are supported:
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671
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672 <informaltable frame="all">
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673 <tgroup cols="4" colsep="1" rowsep="1" align="left">
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674 <thead>
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675 <row>
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676 <entry>Configuration</entry>
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677 <entry>Mode</entry>
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678 <entry>Description</entry>
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679 <entry>File</entry>
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680 </row>
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681 </thead>
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682 <tbody>
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683 <row>
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684 <entry>ROM</entry>
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685 <entry>[ROM]</entry>
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686 <entry>RedBoot running from the board's flash boot
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687 sector.</entry>
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688 <entry>redboot_ROM.ecm</entry>
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689 </row>
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690 <row>
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691 <entry>RAM</entry>
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692 <entry>[RAM]</entry>
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693 <entry>RedBoot running from RAM with RedBoot in the
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694 flash boot sector.</entry>
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695 <entry>redboot_RAM.ecm</entry>
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696 </row>
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697 </tbody>
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698 </tgroup>
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699 </informaltable>
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700 </para>
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701 </sect2>
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702
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703 <sect2>
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704 <title>Initial Installation Method </title>
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705 <para>Device programmer is used to program socketed flash parts with ROM version
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706 of RedBoot. </para>
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707 <para>Alternatively, to install RedBoot on a target that already has eCos
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708 GDB stubs, download the RAM mode image of RedBoot and run it. Initialize the
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709 flash image directory: <command>fis init</command> Then
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710 download the ROM version of RedBoot and program it into flash: <screen>
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711 RedBoot> <userinput>load -b %{FREEMEMLO} -m ymodem</userinput>
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712 RedBoot> <userinput>fi cr RedBoot</userinput>
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713 </screen></para>
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714 </sect2>
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715 <sect2>
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716 <title>Special RedBoot Commands </title>
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717 <para>None.</para>
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718 </sect2>
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719 <sect2>
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720 <title>Memory Maps </title>
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721 <para>RedBoot sets up the following memory map on the PID board. <programlisting>
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722 Physical Address Range Description
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723 ----------------------- -----------
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724 0x00000000 - 0x0007ffff DRAM
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725 0x04000000 - 0x04080000 flash
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726 0x08000000 - 0x09ffffff ASB Expansion
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727 0x0a000000 - 0x0bffffff APB Reference Peripheral
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728 0x0c000000 - 0x0fffffff NISA Serial, Parallel and PC Card ports </programlisting></para>
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729 </sect2>
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730 <sect2>
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731 <title>Rebuilding RedBoot</title>
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732
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733 <para>These shell variables provide the platform-specific information
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734 needed for building RedBoot according to the procedure described in
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735 <xref linkend="Rebuilding-Redboot">:
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736 <programlisting>
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737 export TARGET=pid
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738 export ARCH_DIR=arm
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739 export PLATFORM_DIR=pid
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740 </programlisting>
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741 </para>
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742
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743 <para>The names of configuration files are listed above with the
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744 description of the associated modes.</para>
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745
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746 </sect2></sect1>
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747
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748 <?Pub _newpage>
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749 <sect1 id="at91">
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750 <title>ARM/ARM7 Atmel AT91 Evaluation Board (EB40)</title>
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751 <sect2>
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752 <title>Overview</title>
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753 <para><indexterm><primary>Atmel AT91/EB40</primary>
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754 <secondary>installing and testing</secondary></indexterm><indexterm><primary>
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755 installing and testing</primary><secondary>Atmel AT91/EB40
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756 </secondary></indexterm>RedBoot supports both serial ports.
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757 The default serial port settings are 38400,8,N,1. RedBoot
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758 also supports minimal flash management on the EB40.
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759 However, since the flash device (AT29LV1024) is so small (only the upper 64K is
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760 available for general use), only 'fconfig' is
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761 supported, along with the simple flash write command, 'fis
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762 write'.</para>
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763
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764 <para>The following RedBoot configurations are supported:
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765
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766 <informaltable frame="all">
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767 <tgroup cols="4" colsep="1" rowsep="1" align="left">
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768 <thead>
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769 <row>
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770 <entry>Configuration</entry>
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771 <entry>Mode</entry>
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772 <entry>Description</entry>
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773 <entry>File</entry>
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774 </row>
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775 </thead>
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776 <tbody>
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777 <row>
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778 <entry>ROM</entry>
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779 <entry>[ROM]</entry>
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780 <entry>RedBoot running from the board's flash boot
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781 sector.</entry>
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782 <entry>redboot_ROM.ecm</entry>
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783 </row>
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784 <row>
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785 <entry>RAM</entry>
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786 <entry>[RAM]</entry>
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787 <entry>RedBoot running from RAM with RedBoot in the
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788 flash boot sector.</entry>
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789 <entry>redboot_RAM.ecm</entry>
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790 </row>
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791 <row>
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792 <entry>ROMRAM</entry>
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793 <entry>[ROMRAM]</entry>
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794 <entry>RedBoot running from RAM, but contained in the
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795 board's flash boot sector.</entry>
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796 <entry>redboot_ROMRAM.ecm</entry>
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797 </row>
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798 </tbody>
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799 </tgroup>
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800 </informaltable>
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801 </para>
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802 </sect2>
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803
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804 <sect2>
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805 <title>Initial Installation Method </title>
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806 <para>
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807 This development board comes with ARM's debug tool, Angel, installed in flash.
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808 At this time, Angel will not be replaced. Rather, RedBoot will be placed in
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809 the alternate half of flash. Switch SW1 is used which monitor to boot. Selecting
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810 SW1 to "lower mem" will choose Angel. Select SW1 to "Upper mem" for RedBoot once
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811 it has been installed.
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812 </para>
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813 <para>
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814 Set SW1 to "lower mem" and connect serial port A to a host computer. Using GDB
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815 from the host and Angel on the board, download the RAM mode image of RedBoot
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816 to the board. Once this is started, the Angel session must be interrupted (on
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817 Linux this can be done using ^Z). Follow this by connecting to the board using
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818 minicom at 38400-8N1. At this point, RedBoot will be running on the board in
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819 RAM. Now, download the ROMRAM mode image and program it to flash. Be sure and
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820 first set SW1 to "upper mem".
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821 <screen>
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822 <userinput>arm-elf-gdb redboot_RAM.elf</userinput>
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823 (gdb) <userinput>tar rdi s=/dev/ttyS0</userinput>
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824 Angel Debug Monitor (serial) 1.04 (Advanced RISC Machines SDT 2.5) for
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825 AT91EB40 (2.00)
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826 Angel Debug Monitor rebuilt on Apr 07 2000 at 12:40:31
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827 Serial Rate: 9600
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828 Connected to ARM RDI target.
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829 (gdb) <userinput>set $ps=0xd3</userinput>
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830 (gdb) <userinput>load</userinput>
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831 Loading section .rom_vectors, size 0x40 lma 0x2020000
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832 Loading section .text, size 0x7fd8 lma 0x2020040
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833 Loading section .rodata, size 0x15a0 lma 0x2028018
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834 Loading section .data, size 0x2e4 lma 0x20295b8
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835 Start address 0x2020040 , load size 39068
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836 Transfer rate: 6250 bits/sec, 500 bytes/write.
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837 (gdb) <userinput>cont</userinput>
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838 Continuing.
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839 </screen>
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840 At this point, suspend the GDB session (use Ctrl-Z) and start a
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841 terminal emulator:
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842 <screen>
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843 RedBoot> <userinput>version</userinput>
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844
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845 RedBoot(tm) bootstrap and debug environment [RAM]
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846 Non-certified release, version UNKNOWN - built 14:09:27, Jul 20 2001
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847
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848 Platform: Atmel AT91/EB40 (ARM7TDMI)
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849 Copyright (C) 2000, 2001, Red Hat, Inc.
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850
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851 RAM: 0x02000000-0x02080000, 0x020116d8-0x0207fd00 available
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852 FLASH: 0x01010000 - 0x01020000, 256 blocks of 0x00000100 bytes each.
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853
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854 RedBoot> <userinput>load -m ymodem -b %{FREEMEMLO}</userinput>
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855 </screen>
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856 Use minicom to send the file redboot_ROMRAM.srec via YModem.
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857 <screen>
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858 RedBoot> <userinput>fi wr -f 0x01010000 -b %{FREEMEMLO} -l 0xe000</userinput>
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859 </screen>
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860 Set switch SW1 to "upper mem", press the "reset" pushbutton and RedBoot
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861 should come up on the board.
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862 </para>
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863 </sect2>
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864 <sect2>
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865 <title>Special RedBoot Commands </title>
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866 <para>None.</para>
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867 </sect2>
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868 <sect2>
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869 <title>Memory Maps </title>
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870 <para>This processor has no MMU, so the only memory map is for physical addresses.
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871 <programlisting>
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872 Physical Address Range Description
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diff changeset
873 ----------------------- ----------------------------------
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874 0x00000000 - 0x00000fff On-chip SRAM
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875 0x01000000 - 0x0101ffff Flash
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876 0x02000000 - 0x0207ffff RAM
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877 0xffe00000 - 0xffffffff I/O registers
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878
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879 The flash based RedBoot image occupies virtual addresses 0x01010000 - 0x0101dfff
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880 </programlisting></para>
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881
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882 </sect2>
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883 <sect2>
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884 <title>Rebuilding RedBoot</title>
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885
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886 <para>These shell variables provide the platform-specific information
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887 needed for building RedBoot according to the procedure described in
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888 <xref linkend="Rebuilding-Redboot">:
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889 <programlisting>
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890 export TARGET=eb40
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891 export ARCH_DIR=arm
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892 export PLATFORM_DIR=at91
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893 </programlisting>
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894 </para>
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895
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896 <para>The names of configuration files are listed above with the
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897 description of the associated modes.</para>
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898
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899 </sect2>
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900 </sect1>
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901
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902
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903 <?Pub _newpage>
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904 <sect1 id="edb7xxx">
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905 <title>ARM/ARM7 Cirrus Logic EP7xxx (EDB7211, EDB7212, EDB7312) </title>
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906 <sect2>
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907 <title>Overview</title>
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908 <para><indexterm><primary>Cirrus Logic EP7xxx (EDB7211, EDB7212, EDB7312)</primary>
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909 <secondary>installing and testing</secondary></indexterm><indexterm><primary>
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910 installing and testing</primary><secondary>Cirrus Logic EP7xxx (EDB7211, EDB7212, EDB7312)
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911 </secondary></indexterm>RedBoot supports both serial ports on the board and
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912 the ethernet port. The default serial port settings are 38400,8,N,1. RedBoot
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913 also supports flash management on the EDB7xxx for the NOR flash
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914 only.</para>
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915
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916 <para>The following RedBoot configurations are supported:
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917
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918 <informaltable frame="all">
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919 <tgroup cols="4" colsep="1" rowsep="1" align="left">
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920 <thead>
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921 <row>
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922 <entry>Configuration</entry>
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923 <entry>Mode</entry>
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924 <entry>Description</entry>
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925 <entry>File</entry>
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926 </row>
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927 </thead>
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928 <tbody>
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929 <row>
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930 <entry>ROM</entry>
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931 <entry>[ROM]</entry>
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932 <entry>RedBoot running from the board's flash boot
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933 sector.</entry>
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934 <entry>redboot_ROM.ecm</entry>
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935 </row>
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936 <row>
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937 <entry>RAM</entry>
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938 <entry>[RAM]</entry>
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939 <entry>RedBoot running from RAM with RedBoot in the
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940 flash boot sector.</entry>
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941 <entry>redboot_RAM.ecm</entry>
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942 </row>
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943 <row>
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944 <entry>ROMRAM</entry>
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945 <entry>[ROMRAM]</entry>
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946 <entry>RedBoot running from RAM, but contained in the
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947 board's flash boot sector (EDB7312 only).</entry>
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948 <entry>redboot_ROMRAM.ecm</entry>
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949 </row>
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950 </tbody>
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951 </tgroup>
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952 </informaltable>
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953 </para>
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954
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955 </sect2>
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956 <sect2>
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957 <title>Initial Installation Method </title>
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958 <para>A Windows or Linux utility is used to program flash using serial port
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959 #1 via on-chip programming firmware. See board documentation for details on
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960 in situ flash programming. </para>
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961 </sect2>
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962 <sect2>
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963 <title>Special RedBoot Commands </title>
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964 <para>None.</para>
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965 </sect2>
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966 <sect2>
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967 <title>Memory Maps </title>
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968 <para>The MMU page tables and LCD display buffer, if enabled, are located
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969 at the end of DRAM. <note><title>NOTE
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970 </title>
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971 <para>The virtual memory maps in this section use a C and B column to indicate
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972 whether or not the region is cached (C) or buffered (B).</para>
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973 </note><programlisting>
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974 Physical Address Range Description
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975 ----------------------- ----------------------------------
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976 0x00000000 - 0x01ffffff NOR Flash (EDB7211, EDB7212)
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977 0x00000000 - 0x00ffffff NOR Flash (EDB7312)
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978 0x10000000 - 0x11ffffff NAND Flash
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979 0x20000000 - 0x2fffffff Expansion 2
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980 0x30000000 - 0x3fffffff Expansion 3
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981 0x40000000 - 0x4fffffff PCMCIA 0
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982 0x50000000 - 0x5fffffff PCMCIA 1
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983 0x60000000 - 0x600007ff On-chip SRAM
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984 0x80000000 - 0x8fffffff I/O registers
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985 0xc0000000 - 0xc1ffffff DRAM (EDB7211, EDB7212)
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986 0xc0000000 - 0xc0ffffff DRAM (EDB7312)
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987
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988 Virtual Address Range C B Description
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989 ----------------------- - - ----------------------------------
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990 0x00000000 - 0x01ffffff Y Y DRAM
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991 0x00000000 - 0x00fcffff Y Y DRAM (EDB7312)
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992 0x20000000 - 0x2fffffff N N Expansion 2
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993 0x30000000 - 0x3fffffff N N Expansion 3
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994 0x40000000 - 0x4fffffff N N PCMCIA 0
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995 0x50000000 - 0x5fffffff N N PCMCIA 1
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996 0x60000000 - 0x600007ff Y Y On-chip SRAM
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997 0x80000000 - 0x8fffffff N N I/O registers
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998 0xc0000000 - 0xc001ffff N Y LCD buffer (if configured)
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999 0xe0000000 - 0xe1ffffff Y Y NOR Flash (EDB7211, EDB7212)
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1000 0xe0000000 - 0xe0ffffff Y Y NOR Flash (EDB7312)
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1001 0xf0000000 - 0xf1ffffff Y Y NAND Flash
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1002
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1003 The flash based RedBoot image occupies virtual addresses 0xe0000000 - 0xe003ffff.
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1004 </programlisting></para>
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1005 </sect2>
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1006 <sect2>
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1007 <title>Platform Resource Usage</title>
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1008 <para>The EP7xxx timer #2 is used as a polled timer to provide timeout support
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1009 for network and XModem file transfers.</para>
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1010 </sect2><sect2>
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1011
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1012 <title>Rebuilding RedBoot</title>
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1013
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1014
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1015 <para>These shell variables provide the platform-specific information
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1016 needed for building RedBoot according to the procedure described in
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1017 <xref linkend="Rebuilding-Redboot">:
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1018 <programlisting>
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1019 export TARGET=edb7211
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1020 export TARGET=edb7212
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1021 export TARGET=edb7312
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1022 export ARCH_DIR=arm
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1023 export PLATFORM_DIR=edb7xxx
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1024 </programlisting>
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1025
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1026 Use one of the TARGET settings only.
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1027 </para>
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1028
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1029 <para>The names of configuration files are listed above with the
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1030 description of the associated modes.</para>
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1031
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1032 </sect2>
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1033 </sect1>
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1034
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1035 <?Pub _newpage>
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1036 <sect1 id="aaed2000">
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1037 <title>ARM/ARM9 Agilent AAED2000</title>
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1038 <sect2>
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1039 <title>Overview</title>
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1040 <para><indexterm><primary>Agilent AAED2000 ARM9 (aaed)</primary>
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1041 <secondary>installing and testing</secondary></indexterm><indexterm><primary>
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1042 installing and testing</primary><secondary>Agilent AAED2000 ARM9 (aaed)
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1043 </secondary></indexterm>RedBoot supports the serial and ethernet ports
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1044 on the board. The default serial port settings are 38400,8,N,1.
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1045 RedBoot also supports flash management on the AAED2000.</para>
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1046
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1047 <para>The following RedBoot configurations are supported:
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1048
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1049 <informaltable frame="all">
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1050 <tgroup cols="4" colsep="1" rowsep="1" align="left">
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1051 <thead>
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1052 <row>
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1053 <entry>Configuration</entry>
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1054 <entry>Mode</entry>
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1055 <entry>Description</entry>
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1056 <entry>File</entry>
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1057 </row>
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1058 </thead>
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1059 <tbody>
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1060 <row>
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1061 <entry>ROMRAM</entry>
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1062 <entry>[ROMRAM]</entry>
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1063 <entry>RedBoot running from RAM, but contained in the
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1064 board's flash boot sector.</entry>
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1065 <entry>redboot_primary_ROMRAM.ecm</entry>
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1066 </row>
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1067 <row>
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1068 <entry>RAM</entry>
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1069 <entry>[RAM]</entry>
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1070 <entry>RedBoot running from RAM with RedBoot in the
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1071 flash boot sector.</entry>
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1072 <entry>redboot_primary_RAM.ecm</entry>
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1073 </row>
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1074 </tbody>
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1075 </tgroup>
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1076 </informaltable>
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1077 </para>
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1078 </sect2>
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1079
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1080 <sect2>
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1081 <title>Initial Installation Method </title>
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1082 <para>It is possible to install RedBoot in one of two ways. Either as
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1083 the primary bootmonitor on the board (installed to blocks 0-1 of the
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1084 flash) or as the secondary bootmonitor on the board (installed to
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1085 blocks 1-2 of the flash).</para>
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1086
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1087 <para>Presently, only the former method is supported.</para>
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1088 <!-- Nuke the above line if uncommenting this block
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1089 <para>When installed as the secondary bootmonitor, the ARM bootmonitor
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1090 remains in flash and auto-executes RedBoot (but only when RedBoot is
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1091 smaller than 128KB - which means it cannot include the LCD driver).
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1092 It is of crucial importance that no RedBoot configured to be
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1093 primary bootmonitor is executed on a board where RedBoot is actually
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1094 supposed to be the secondary bootmonitor since it may cause corruption
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1095 of the flash. Installing RedBoot as the primary booter is
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1096 adviced.</para>
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1097 -->
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1098
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1099 <sect3><title>RedBoot as Primary Bootmonitor</title>
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1100
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1101 <para>RedBoot is installed in flash using the on-board ARM Boot
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1102 Monitor.</para>
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1103 <para>Boot the board while pressing SPACE. This should bring up the
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1104 Boot Monitor:
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1105 <screen>ARM bootPROM [Version 1.3] Rebuilt on Jul 16 2001 at 16:21:36
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1106 Running on a P920 board Evaluation Board
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1107 Board Revision V1.0, ARM920T processor Processor
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1108 Memory Size is 32MBytes, Flash Size is 32MBytes
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1109 Copyright (c) ARM Limited 1999 - 2001. All rights reserved.
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1110 Board designed by ARM Limited
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1111 Hardware support provided at http://www.arm.com/
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1112 For help on the available commands type ? or h
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1113 boot Monitor >
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1114 </screen>
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1115
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1116 Download the RAM mode image of RedBoot configured as a primary
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1117 bootmonitor using the ARM bootmonitor's SREC-download command:
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1118
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1119 <screen>boot Monitor &gt; <userinput>m</userinput>
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1120 Load Motorola S-Record image into memory and execute it
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1121 The S-Record loader only accepts input on the serial port.
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1122 Record addresses must be between 0x00008000 and 0x01E0F510.
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1123 Type Ctrl/C to exit loader.
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1124 </screen>
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1125
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1126 Use the terminal emulator's ASCII upload command, or (on Linux) simply
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1127 cat the file to the serial port:
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1128
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1129 <screen>$ <userinput>cat redboot_primary_RAM/redboot.srec &gt;/dev/ttyS1</userinput>
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1130 </screen>
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1131
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1132 You should see RedBoot start up:
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1133
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1134 <screen>FLASH configuration checksum error or invalid key
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1135 Ethernet eth0: MAC address 00:30:d3:03:04:99
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1136 IP: 192.168.42.111, Default server: 192.168.42.3
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1137
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1138 RedBoot(tm) bootstrap and debug environment [RAM]
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1139 Non-certified release, version UNKNOWN - built 13:15:40, Nov 9 2001
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1140
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1141 Platform: AAED2000 system (ARM9) [Primary]
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1142 Copyright (C) 2000, 2001, Red Hat, Inc.
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1143
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1144 RAM: 0x00000000-0x01f80000, 0x0006f208-0x01f51000 available
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1145 FLASH: 0x60000000 - 0x62000000, 256 blocks of 0x00020000 bytes each.
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1146 RedBoot></screen>
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1147
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1148 As can be seen from the output above, the network has been configured
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1149 to give the board an IP address and information about the default
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1150 server. If things are not set up on your network, you can still
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1151 continue, but use the Y-modem download method when loading the RedBoot
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1152 ROMRAM mode image.
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1153
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1154 Now initialize RedBoot's FIS:
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1155
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1156 <screen>RedBoot&gt; <userinput>fis init</userinput>
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1157 About to initialize [format] FLASH image system - continue (y/n)? <userinput>y</userinput>
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1158 *** Initialize FLASH Image System
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1159 Warning: device contents not erased, some blocks may not be usable
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1160 ... Erase from 0x61fe0000-0x62000000: .
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1161 ... Program from 0x01f5f000-0x01f5f300 at 0x61fe0000: .
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1162 </screen>
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1163
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1164 Download the ROMRAM mode image of RedBoot via ethernet:
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1165
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1166 <screen>RedBoot&gt; <userinput>load -b %{FREEMEMLO} redboot_primary_ROMRAM/redboot.srec</userinput>
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1167 </screen>
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1168
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1169 or using serial Y-modem protocol:
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1170
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1171 <screen>RedBoot&gt; <userinput>load -mode ymodem -b %{FREEMEMLO}</userinput>
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1172 </screen>
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1173
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1174 (Use the terminal emulator's Y-modem upload command to send the file
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1175 <filename>redboot_primary_ROMRAM/redboot.srec</filename>.)
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1176
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1177 When the image has been downloaded, program it into flash:
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1178
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1179 <screen>Address offset = 0x00ff8000
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1180 Entry point: 0x00008040, address range: 0x00008000-0x0002da80
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1181 RedBoot&gt; <userinput>fi cr RedBoot</userinput>
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1182 An image named 'RedBoot' exists - continue (y/n)? <userinput>y</userinput>
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1183 * CAUTION * about to program 'RedBoot'
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1184 at 0x60000000..0x6003ffff from 0x00100000 - continue (y/n)? <userinput>y</userinput>
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1185 ... Erase from 0x60000000-0x60040000: ..
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1186 ... Program from 0x00100000-0x00140000 at 0x60000000: ..
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1187 ... Erase from 0x61fe0000-0x62000000: .
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1188 ... Program from 0x01f5f000-0x01f7f000 at 0x61fe0000: .
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1189 </screen>
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1190
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1191 Now reset the board. You should see the RedBoot banner.</para>
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1192
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1193 </sect3>
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1194
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1195 <!--
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1196 <sect3><title>RedBoot as Secondary Bootmonitor</title>
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1197
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1198 <para>RedBoot is installed in flash using the on-board ARM Boot
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1199 Monitor.</para>
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1200 <para>Boot the board while pressing SPACE. This should bring up the
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1201 Boot Monitor:
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1202 <screen>ARM bootPROM [Version 1.3] Rebuilt on Jul 16 2001 at 16:21:36
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1203 Running on a P920 board Evaluation Board
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1204 Board Revision V1.0, ARM920T processor Processor
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1205 Memory Size is 32MBytes, Flash Size is 32MBytes
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1206 Copyright (c) ARM Limited 1999 - 2001. All rights reserved.
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1207 Board designed by ARM Limited
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1208 Hardware support provided at http://www.arm.com/
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1209 For help on the available commands type ? or h
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1210 boot Monitor >
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1211 </screen>
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1212
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1213 Download the RAM mode image of RedBoot configured as a secondary
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1214 bootmonitor using the ARM bootmonitor's SREC-download command:
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1215
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1216 <screen>boot Monitor &gt; <userinput>m</userinput>
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1217 Load Motorola S-Record image into memory and execute it
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1218 The S-Record loader only accepts input on the serial port.
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1219 Record addresses must be between 0x00008000 and 0x01E0F510.
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1220 Type Ctrl/C to exit loader.
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1221 </screen>
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1222
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1223 Use the terminal emulator's ASCII upload command, or (on Linux) simply
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1224 cat the file to the serial port:
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1225
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1226 <screen>$ <userinput>cat redboot_secondary_RAM.srec &gt;/dev/ttyS1</userinput>
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1227 </screen>
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1228
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1229 You should see RedBoot start up:
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1230
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1231 <screen>FLASH configuration checksum error or invalid key
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1232 Ethernet eth0: MAC address 00:30:d3:03:04:99
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1233 IP: 192.168.42.111, Default server: 192.168.42.3
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1234
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1235 RedBoot(tm) bootstrap and debug environment [RAM]
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1236 Non-certified release, version UNKNOWN - built 12:31:13, Nov 9 2001
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1237
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1238 Platform: AAED2000 system (ARM9) [Secondary]
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1239 Copyright (C) 2000, 2001, Red Hat, Inc.
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1240
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1241 RAM: 0x00000000-0x01f80000, 0x00063568-0x01f51000 available
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1242 FLASH: 0x60000000 - 0x62000000, 256 blocks of 0x00020000 bytes each.
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1243 </screen>
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1244
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1245 As can be seen from the output above, the network has been configured
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1246 to give the board an IP address and information about the default
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1247 server. If things are not set up on your network, you can still
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1248 continue, but use the Y-modem download method when loading the RedBoot
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1249 ROMRAM mode image.
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1250
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1251 Next step is to erase all of the flash, except where the ARM booter resides:
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1252
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1253 <screen>RedBoot&gt; <userinput>fi erase -f 0x60020000 -l 0x01fe0000</userinput>
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1254 ... Erase from 0x60020000-0x62000000: ..........................................
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diff changeset
1255 ................................................................................
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1256 ................................................................................
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1257 .....................................................
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1258 </screen>
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1259
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1260 Then initialize RedBoot's FIS:
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1261
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1262 <screen>RedBoot&gt; <userinput>fi init</userinput>
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1263 About to initialize [format] FLASH image system - continue (y/n)? <userinput>y</userinput>
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1264 *** Initialize FLASH Image System
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1265 Warning: device contents not erased, some blocks may not be usable
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1266 ... Erase from 0x61fc0000-0x61fe0000: .
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1267 ... Program from 0x01fdf000-0x01fff000 at 0x61fc0000: .
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1268 </screen>
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1269
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1270 Download the ROMRAM mode RedBoot image via ethernet:
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1271
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1272 <screen>RedBoot&gt; <userinput>load -raw -b %{FREEMEMLO} redboot_secondary_ROMRAM.arm.bin</userinput>
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1273 </screen>
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1274
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1275 or using serial Y-modem protocol:
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1276
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1277 <screen>RedBoot&gt; <userinput>load -raw -mode ymodem -b %{FREEMEMLO}</userinput>
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1278 </screen>
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1279
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1280 (Use the terminal emulator's Y-modem upload command to send the file
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1281 <filename>redboot_secondary_ROMRAM.arm.bin</filename>.)
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1282
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1283 When the image has been downloaded, program it into flash:
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1284
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1285 <screen>RedBoot&gt; <userinput>fi cr RedBoot</userinput>
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1286 An image named 'RedBoot' exists - continue (y/n)? <userinput>y</userinput>
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1287 * CAUTION * about to program 'RedBoot'
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1288 at 0x60020000..0x6005ffff from 0x00100000 - continue (y/n)? <userinput>y</userinput>
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1289 ... Erase from 0x60020000-0x60060000: ..
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1290 ... Program from 0x00100000-0x00140000 at 0x60020000: ..
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1291 ... Erase from 0x61fc0000-0x61fe0000: .
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1292 ... Program from 0x01f5f000-0x01f7f000 at 0x61fc0000: .
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1293 </screen>
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diff changeset
1294
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diff changeset
1295 Now reset the board. You might see the ARM Monitor complain:
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diff changeset
1296
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1297 <screen>Failed to boot from flash.
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1298 The ARM Boot Monitor SIB can not be found.
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1299 Press any key to continue.
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1300 </screen>
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1301
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1302 This is due to due to the flash having been erased. Press a key, and
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1303 execute the "validate flash contents" command:
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1304
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1305 <screen>boot Monitor &gt; <userinput>v</userinput>
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1306
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1307 There are 254 128KByte blocks of Application Flash:
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diff changeset
1308
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1309 No images found!
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diff changeset
1310 ================
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diff changeset
1311
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1312 System Information Blocks
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diff changeset
1313 =========================
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diff changeset
1314 Address Owner Size Idx Rev
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diff changeset
1315 ~~~~~~~ ~~~~~ ~~~~ ~~~ ~~~
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1316 0x05FE0000 ARM Boot Monitor 312 0 0
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diff changeset
1317
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1318
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1319 Blocks of unknown type
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diff changeset
1320 ======================
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diff changeset
1321 Block Size Footer Type
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1322 ~~~~~ ~~~~ ~~~~~~~~~~~
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1323 252 1 0x52420000
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1324 boot Monitor &gt;
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1325 </screen>
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1326
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diff changeset
1327 This causes the last block of the flash to be initialized with the ARM
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1328 Boot Monitor ID, necessary for the Monitor to work properly. When
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1329 resetting the board now, it should automatically start RedBoot. If you
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1330 ever need to get into the ARM Boot Monitor again, reset the board
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1331 while pressing the SPACE key.
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1332
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1333 </para></sect3>
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diff changeset
1334 -->
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1335
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diff changeset
1336 </sect2>
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1337
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diff changeset
1338 <sect2>
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1339 <title>Special RedBoot Commands </title>
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1340 <para>The <command>exec</command> command which allows the loading
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1341 and execution of Linux kernels,
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1342 is supported for this board (see <xref linkend="executing-programs">). The <command>
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1343 exec</command> parameters used for the AAED2000 are:</para>
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1344 <variablelist><varlistentry>
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1345 <term>-b <replaceable>&lt;addr></replaceable></term>
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1346 <listitem><para>Location Linux kernel was loaded to</para></listitem></varlistentry>
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diff changeset
1347 <varlistentry><term>
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diff changeset
1348 -l <replaceable>&lt;len></replaceable></term>
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1349 <listitem><para>Length of kernel</para></listitem></varlistentry>
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1350 <varlistentry><term>
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1351 -c <replaceable>"params"</replaceable></term>
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diff changeset
1352 <listitem><para>Parameters passed to kernel</para></listitem></varlistentry>
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1353 <varlistentry><term>-r <replaceable>&lt;addr></replaceable></term>
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1354 <listitem><para>'initrd' ramdisk location</para></listitem></varlistentry>
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1355 <varlistentry><term>-s <replaceable>&lt;len></replaceable></term>
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1356 <listitem><para>Length of initrd ramdisk</para></listitem></varlistentry>
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1357 </variablelist>
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1358
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1359 <para>The parameters for kernel image base and size are automatically
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1360 set after a load operation. So one way of starting the kernel would
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diff changeset
1361 be:
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diff changeset
1362
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diff changeset
1363 <screen>RedBoot&gt; <userinput>load -r -b 0x100000 zImage</userinput>
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diff changeset
1364 Raw file loaded 0x00100000-0x001a3d6c
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1365 RedBoot&gt; exec -c "console=ttyAC0,38400"
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1366 Using base address 0x00100000 and length 0x000a3d6c
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1367 Uncompressing Linux.....
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diff changeset
1368 </screen>
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1369
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1370 An image could also be put in flash and started directly:
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1371
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1372 <screen>RedBoot&gt; <userinput>exec -b 0x60040000 -l 0xc0000 -c "console=ttyAC0,38400"</userinput>
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1373 Uncompressing Linux.....
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diff changeset
1374 </screen>
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1375
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diff changeset
1376 </para>
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1377
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1378 </sect2>
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1379 <sect2>
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1380 <title>Memory Maps </title>
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1381 <para>The MMU page tables are located at 0x4000. <note><title>NOTE
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1382 </title>
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1383 <para>The virtual memory maps in this section use a C and B column to indicate
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1384 whether or not the region is cached (C) or buffered (B).</para>
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1385 </note><programlisting>Physical Address Range Description
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1386 ----------------------- ----------------------------------
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1387 0x00000000 - 0x01ffffff Flash
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1388 0x10000000 - 0x100fffff Ethernet
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1389 0x30000000 - 0x300fffff Board registers
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1390 0x40000000 - 0x4fffffff PCMCIA Slot (0)
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1391 0x50000000 - 0x5fffffff Compact Flash Slot (1)
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1392 0x80000000 - 0x800037ff I/O registers
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1393 0xb0060000 - 0xb00fffff On-chip SRAM
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1394 0xf0000000 - 0xfd3fffff SDRAM
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diff changeset
1395
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1396 Virtual Address Range C B Description
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diff changeset
1397 ----------------------- - - ----------------------------------
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1398 0x00000000 - 0x01f7ffff Y Y SDRAM
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1399 0x01f80000 - 0x01ffffff Y Y SDRAM (used for LCD frame buffer)
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1400 0x10000000 - 0x100fffff N N Ethernet
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1401 0x30000000 - 0x300fffff N N Board registers
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1402 0x40000000 - 0x4fffffff N N PCMCIA Slot (0)
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1403 0x50000000 - 0x5fffffff N N Compact Flash Slot (1)
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1404 0x60000000 - 0x61ffffff N N Flash
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1405 0x80000000 - 0x800037ff N N I/O registers
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1406 0xf0000000 - 0xffffffff N N SDRAM (uncached)
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1407
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1408 </programlisting></para>
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1409
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1410 </sect2>
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1411 <sect2>
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1412 <title>Rebuilding RedBoot</title>
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1413
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1414 <para>These shell variables provide the platform-specific information
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1415 needed for building RedBoot according to the procedure described in
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1416 <xref linkend="Rebuilding-Redboot">:
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1417 <programlisting>
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1418 export TARGET=aaed
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1419 export ARCH_DIR=arm
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1420 export PLATFORM_DIR=arm9/aaed2000
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1421 </programlisting>
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1422 </para>
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1423
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1424 <para>The names of configuration files are listed above with the
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1425 description of the associated modes.</para>
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1426
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1427 </sect2>
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1428 </sect1>
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1429
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1430
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1431
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diff changeset
1432 <?Pub _newpage>
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1433 <sect1 id="ebsa285">
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1434 <title>ARM/StrongARM(SA110) Intel EBSA 285</title>
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1435 <sect2>
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1436 <title>Overview</title>
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1437 <para><indexterm><primary>Intel StrongArm EBSA 285</primary><secondary>installing
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1438 and testing</secondary></indexterm><indexterm><primary>installing and testing
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1439 </primary><secondary>Intel StrongArm EBSA 285</secondary></indexterm>RedBoot
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1440 uses the single EBSA-285 serial port. The default serial port settings are
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1441 38400,8,N,1. If the EBSA-285 is used as a host on a PCI backplane, ethernet
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1442 is supported using an Intel PRO/100+ ethernet adapter. Management of
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1443 onboard flash is also supported.</para>
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1444
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1445 <para>The following RedBoot configurations are supported:
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1446
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1447 <informaltable frame="all">
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1448 <tgroup cols="4" colsep="1" rowsep="1" align="left">
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1449 <thead>
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1450 <row>
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1451 <entry>Configuration</entry>
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1452 <entry>Mode</entry>
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1453 <entry>Description</entry>
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1454 <entry>File</entry>
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1455 </row>
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1456 </thead>
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1457 <tbody>
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1458 <row>
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1459 <entry>ROM</entry>
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1460 <entry>[ROM]</entry>
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1461 <entry>RedBoot running from the board's flash boot
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1462 sector.</entry>
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1463 <entry>redboot_ROM.ecm</entry>
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1464 </row>
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1465 <row>
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1466 <entry>RAM</entry>
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1467 <entry>[RAM]</entry>
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1468 <entry>RedBoot running from RAM with RedBoot in the
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1469 flash boot sector.</entry>
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1470 <entry>redboot_RAM.ecm</entry>
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1471 </row>
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1472 </tbody>
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1473 </tgroup>
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1474 </informaltable>
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1475 </para>
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1476
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1477 </sect2>
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1478 <sect2>
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1479 <title>Initial Installation Method </title>
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1480 <para>A linux application is used to program the flash over the PCI bus. Sources
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1481 and build instructions for this utility are located in the RedBoot sources
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1482 in: <filename class="directory">packages/hal/arm/ebsa285/current/support/linux/safl_util</filename>
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1483 </para>
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1484 </sect2>
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1485 <sect2>
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1486 <title>Communication Channels </title>
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1487 <para>Serial, Intel PRO 10/100+ 82559 PCI ethernet card.</para>
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1488 </sect2>
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1489 <sect2>
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1490 <title>Special RedBoot Commands </title>
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1491 <para>None.</para>
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1492 </sect2>
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1493 <sect2>
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1494 <title>Memory Maps </title>
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1495 <para>Physical and virtual mapping are mapped one to one on the EBSA-285 using
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1496 a first level page table located at address 0x4000. No second level tables
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1497 are used. <note><title>NOTE </title>
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1498 <para>The virtual memory maps in this section use a C and B column to indicate
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1499 whether or not the region is cached (C) or buffered (B).</para>
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1500 </note><programlisting>Address Range C B Description
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diff changeset
1501 ----------------------- - - ----------------------------------
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1502 0x00000000 - 0x01ffffff Y Y SDRAM
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1503 0x40000000 - 0x400fffff N N 21285 Registers
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1504 0x41000000 - 0x413fffff Y N flash
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1505 0x42000000 - 0x420fffff N N 21285 CSR Space
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1506 0x50000000 - 0x50ffffff Y Y Cache Clean
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1507 0x78000000 - 0x78ffffff N N Outbound Write Flush
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1508 0x79000000 - 0x7c0fffff N N PCI IACK/Config/IO
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1509 0x80000000 - 0xffffffff N Y PCI Memory </programlisting></para>
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1510 </sect2>
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1511 <sect2>
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1512 <title>Platform Resource Usage </title>
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1513 <para>Timer3 is used as a polled timer to provide timeout support for networking
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1514 and XModem file transfers.</para>
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1515 </sect2>
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1516 <!--
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1517 <sect2>
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1518 <title>Building eCos Test Cases to run with old RedBoots</title>
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1519 <para>If using older versions of RedBoot, the default configuration for
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1520 EBSA-285 will send diagnostic output to the serial line only, not over an ethernet
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1521 connection. To allow eCos programs to use RedBoot to channel diagnostic output to
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1522 GDB whether connected by net or serial, enable the configuration option <programlisting>
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1523 CYGSEM_HAL_VIRTUAL_VECTOR_DIAG
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1524 "Do diagnostic IO via virtual vector table"</programlisting> located here
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1525 in the common HAL configuration tree: <programlisting>"eCos HAL"
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1526 "ROM monitor support"
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1527 "Enable use of virtual vector calling interface"
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1528 "Do diagnostic IO via virtual vector table"</programlisting>Other
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1529 than that, no special configuration is required to use RedBoot. </para>
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1530 <para>If you have been using built-in stubs to acquire support for thread-aware
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1531 debugging, you can still do that, but you must only use the serial device
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1532 for GDB connection and you must not enable the option mentioned above. However,
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1533 it is no longer necessary to do that to get thread-awareness; RedBoot is thread
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1534 aware.</para>
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1535 </sect2>
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1536 -->
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1537 <sect2>
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1538 <title>Rebuilding RedBoot</title>
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1539
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1540 <para>These shell variables provide the platform-specific information
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1541 needed for building RedBoot according to the procedure described in
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1542 <xref linkend="Rebuilding-Redboot">:
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1543 <programlisting>
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1544 export TARGET=ebsa285
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1545 export ARCH_DIR=arm
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1546 export PLATFORM_DIR=ebsa285
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1547 </programlisting>
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1548 </para>
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1549
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1550 <para>The names of configuration files are listed above with the
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1551 description of the associated modes.</para>
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1552
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1553 </sect2>
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1554 </sect1>
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1555
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diff changeset
1556 <?Pub _newpage>
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diff changeset
1557 <sect1 id="brutus">
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1558 <title>ARM/StrongARM(SA1100) Intel Brutus</title>
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1559 <sect2>
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1560 <title>Overview</title>
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1561 <para><indexterm><primary>Intel-SA1100 (Brutus)</primary><secondary>installing
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1562 and testing</secondary></indexterm><indexterm><primary>installing and testing
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1563 </primary><secondary>Intel SA1100 (Brutus)</secondary></indexterm>RedBoot
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1564 supports both board serial ports on the Brutus board. The default serial port
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1565 settings are 38400,8,N,1. flash management is not currently supported. </para>
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1566
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1567 <para>The following RedBoot configurations are supported:
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1568
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1569 <informaltable frame="all">
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diff changeset
1570 <tgroup cols="4" colsep="1" rowsep="1" align="left">
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1571 <thead>
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1572 <row>
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1573 <entry>Configuration</entry>
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1574 <entry>Mode</entry>
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diff changeset
1575 <entry>Description</entry>
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diff changeset
1576 <entry>File</entry>
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1577 </row>
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1578 </thead>
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1579 <tbody>
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diff changeset
1580 <row>
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1581 <entry>ROM</entry>
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1582 <entry>[ROM]</entry>
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1583 <entry>RedBoot running from the board's flash boot
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1584 sector.</entry>
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1585 <entry>redboot_ROM.ecm</entry>
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1586 </row>
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1587 <row>
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1588 <entry>RAM</entry>
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1589 <entry>[RAM]</entry>
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1590 <entry>RedBoot running from RAM with RedBoot in the
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1591 flash boot sector.</entry>
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1592 <entry>redboot_RAM.ecm</entry>
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1593 </row>
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1594 </tbody>
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1595 </tgroup>
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1596 </informaltable>
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1597 </para>
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1598
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1599 </sect2>
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1600 <sect2>
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1601 <title>Initial Installation Method </title>
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1602 <para>Device programmer is used to program socketed flash parts.</para>
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1603 </sect2>
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1604 <sect2>
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1605 <title>Special RedBoot Commands </title>
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1606 <para>None.</para>
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1607 </sect2>
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1608 <sect2>
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1609 <title>Memory Maps </title>
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1610 <para>The first level page table is located at physical address 0xc0004000.
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1611 No second level tables are used.
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1612
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1613 <note><title>NOTE</title>
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1614 <para>The virtual memory maps in this section use a C and B column to indicate
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1615 whether or not the region is cached (C) or buffered (B).</para>
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1616
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1617 </note><programlisting>Physical Address Range Description
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1618 ----------------------- ----------------------------------
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1619 0x00000000 - 0x000fffff Boot ROM
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1620 0x08000000 - 0x083fffff Application flash
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1621 0x10000000 - 0x100fffff SRAM
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1622 0x18000000 - 0x180fffff Chip Select 3
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1623 0x20000000 - 0x3fffffff PCMCIA
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1624 0x80000000 - 0xbfffffff SA-1100 Internal Registers
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1625 0xc0000000 - 0xc7ffffff DRAM Bank 0
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diff changeset
1626 0xc8000000 - 0xcfffffff DRAM Bank 1
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1627 0xd0000000 - 0xd7ffffff DRAM Bank 2
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1628 0xd8000000 - 0xdfffffff DRAM Bank 3
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1629 0xe0000000 - 0xe7ffffff Cache Clean
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diff changeset
1630
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1631
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1632 Virtual Address Range C B Description
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diff changeset
1633 ----------------------- - - ----------------------------------
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1634 0x00000000 - 0x003fffff Y Y DRAM Bank 0
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1635 0x00400000 - 0x007fffff Y Y DRAM Bank 1
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1636 0x00800000 - 0x00bfffff Y Y DRAM Bank 2
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1637 0x00c00000 - 0x00ffffff Y Y DRAM Bank 3
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1638 0x08000000 - 0x083fffff Y Y Application flash
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1639 0x10000000 - 0x100fffff Y N SRAM
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1640 0x20000000 - 0x3fffffff N N PCMCIA
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1641 0x40000000 - 0x400fffff Y Y Boot ROM
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1642 0x80000000 - 0xbfffffff N N SA-1100 Internal Registers
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1643 0xe0000000 - 0xe7ffffff Y Y Cache Clean</programlisting></para>
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1644 </sect2>
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1645 <sect2>
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1646 <title>Platform Resource Usage </title>
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1647 <para>
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1648 The SA11x0 OS timer is used as a polled timer to provide timeout
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1649 support for XModem file transfers.</para>
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1650 </sect2>
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1651 <sect2>
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1652 <title>Rebuilding RedBoot</title>
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1653
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1654 <para>These shell variables provide the platform-specific information
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1655 needed for building RedBoot according to the procedure described in
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1656 <xref linkend="Rebuilding-Redboot">:
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diff changeset
1657 <programlisting>
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1658 export TARGET=brutus
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1659 export ARCH_DIR=arm
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1660 export PLATFORM_DIR=sa11x0/brutus
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1661 </programlisting>
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1662 </para>
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1663
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1664 <para>The names of configuration files are listed above with the
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1665 description of the associated modes.</para>
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1666
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1667 </sect2>
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1668 </sect1>
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1669
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1670 <?Pub _newpage>
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1671 <sect1 id="sa1100mm">
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1672 <title>ARM/StrongARM(SA1100) Intel SA1100 Multimedia Board </title>
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1673 <sect2>
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1674 <title>Overview</title>
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1675 <para><indexterm><primary>Intel SA1100 Multimedia Board</primary><secondary>
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1676 installing and testing</secondary></indexterm><indexterm><primary>installing
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1677 and testing</primary><secondary>Intel SA1100 Multimedia Board</secondary>
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1678 </indexterm>RedBoot supports both board serial ports. The default serial port
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1679 settings are 38400,8,N,1. flash management is also supported.</para>
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1680
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1681 <para>The following RedBoot configurations are supported:
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1682
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1683 <informaltable frame="all">
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1684 <tgroup cols="4" colsep="1" rowsep="1" align="left">
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1685 <thead>
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1686 <row>
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1687 <entry>Configuration</entry>
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1688 <entry>Mode</entry>
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1689 <entry>Description</entry>
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1690 <entry>File</entry>
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1691 </row>
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1692 </thead>
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1693 <tbody>
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diff changeset
1694 <row>
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1695 <entry>ROM</entry>
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1696 <entry>[ROM]</entry>
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1697 <entry>RedBoot running from the board's flash boot
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1698 sector.</entry>
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1699 <entry>redboot_ROM.ecm</entry>
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1700 </row>
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1701 <row>
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1702 <entry>RAM</entry>
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1703 <entry>[RAM]</entry>
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1704 <entry>RedBoot running from RAM with RedBoot in the
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1705 flash boot sector.</entry>
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1706 <entry>redboot_RAM.ecm</entry>
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1707 </row>
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1708 </tbody>
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1709 </tgroup>
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1710 </informaltable>
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1711 </para>
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1712 </sect2>
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1713
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1714 <sect2>
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1715 <title>Initial Installation Method </title>
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1716 <para>A device programmer is used to program socketed flash parts.</para>
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1717 </sect2>
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1718 <sect2>
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1719 <title>Special RedBoot Commands </title>
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1720 <para>None.</para>
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1721 </sect2>
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1722 <sect2>
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1723 <title>Memory Maps </title>
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1724 <para>The first level page table is located at physical address 0xc0004000.
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1725 No second level tables are used.<note><title>NOTE</title>
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1726 <para>The virtual memory maps in this section use a C and B column to indicate
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1727 whether or not the region is cached (C) or buffered (B).</para>
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1728 </note><programlisting>Physical Address Range Description
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1729 ----------------------- ----------------------------------
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1730 0x00000000 - 0x000fffff Boot flash
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1731 0x08000000 - 0x083fffff Application flash
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1732 0x10000000 - 0x107fffff SA-1101 Board Registers
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1733 0x18000000 - 0x180fffff Ct8020 DSP
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1734 0x18400000 - 0x184fffff XBusReg
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1735 0x18800000 - 0x188fffff SysRegA
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1736 0x18c00000 - 0x18cfffff SysRegB
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1737 0x19000000 - 0x193fffff Spare CPLD A
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1738 0x19400000 - 0x197fffff Spare CPLD B
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1739 0x20000000 - 0x3fffffff PCMCIA
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1740 0x80000000 - 0xbfffffff SA1100 Internal Registers
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1741 0xc0000000 - 0xc07fffff DRAM Bank 0
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1742 0xe0000000 - 0xe7ffffff Cache Clean
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1743 Virtual Address Range C B Description
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diff changeset
1744
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diff changeset
1745
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diff changeset
1746 ----------------------- - - ----------------------------------
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1747 0x00000000 - 0x007fffff Y Y DRAM Bank 0
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1748 0x08000000 - 0x083fffff Y Y Application flash
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1749 0x10000000 - 0x100fffff N N SA-1101 Registers
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1750 0x18000000 - 0x180fffff N N Ct8020 DSP
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1751 0x18400000 - 0x184fffff N N XBusReg
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1752 0x18800000 - 0x188fffff N N SysRegA
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1753 0x18c00000 - 0x18cfffff N N SysRegB
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1754 0x19000000 - 0x193fffff N N Spare CPLD A
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1755 0x19400000 - 0x197fffff N N Spare CPLD B
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1756 0x20000000 - 0x3fffffff N N PCMCIA
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1757 0x50000000 - 0x500fffff Y Y Boot flash
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1758 0x80000000 - 0xbfffffff N N SA1100 Internal Registers
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1759 0xc0000000 - 0xc07fffff N Y DRAM Bank 0
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1760 0xe0000000 - 0xe7ffffff Y Y Cache Clean</programlisting></para>
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1761 </sect2>
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1762 <sect2>
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1763 <title>Platform Resource Usage </title>
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1764 <para> The SA11x0 OS timer is used as a polled timer to provide timeout support
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1765 for XModem file transfers.</para>
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1766 </sect2><sect2>
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1767
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1768 <title>Rebuilding RedBoot</title>
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1769
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1770 <para>These shell variables provide the platform-specific information
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1771 needed for building RedBoot according to the procedure described in
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1772 <xref linkend="Rebuilding-Redboot">:
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1773 <programlisting>
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1774 export TARGET=sa1100mm
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1775 export ARCH_DIR=arm
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1776 export PLATFORM_DIR=sa11x0/sa1100mm
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1777 </programlisting>
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1778 </para>
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1779
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1780 <para>The names of configuration files are listed above with the
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1781 description of the associated modes.</para>
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1782
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1783 </sect2>
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1784 </sect1>
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diff changeset
1785
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diff changeset
1786
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diff changeset
1787
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diff changeset
1788 <?Pub _newpage>
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diff changeset
1789 <sect1 id="assabet">
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1790 <title>ARM/StrongARM(SA1110) Intel SA1110 (Assabet) </title>
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1791 <sect2>
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1792 <title>Overview</title>
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1793 <para><indexterm><primary>Intel SA1110 (Assabet)</primary><secondary>installing
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1794 and testing</secondary></indexterm><indexterm><primary>installing and testing
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1795 </primary><secondary>Intel SA1110 (Assabet)</secondary></indexterm>RedBoot
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1796 supports the board serial port and the compact flash ethernet port. The default
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1797 serial port settings are 38400,8,N,1. RedBoot also supports flash management
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1798 on the Assabet. </para>
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1799
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1800 <para>The following RedBoot configurations are supported:
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1801
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1802 <informaltable frame="all">
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1803 <tgroup cols="4" colsep="1" rowsep="1" align="left">
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1804 <thead>
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1805 <row>
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1806 <entry>Configuration</entry>
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1807 <entry>Mode</entry>
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1808 <entry>Description</entry>
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1809 <entry>File</entry>
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1810 </row>
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1811 </thead>
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1812 <tbody>
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1813 <row>
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1814 <entry>ROM</entry>
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1815 <entry>[ROM]</entry>
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1816 <entry>RedBoot running from the board's flash boot
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1817 sector.</entry>
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1818 <entry>redboot_ROM.ecm</entry>
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1819 </row>
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1820 <row>
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1821 <entry>RAM</entry>
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1822 <entry>[RAM]</entry>
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1823 <entry>RedBoot running from RAM with RedBoot in the
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1824 flash boot sector.</entry>
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1825 <entry>redboot_RAM.ecm</entry>
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1826 </row>
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1827 </tbody>
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1828 </tgroup>
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1829 </informaltable>
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1830 </para>
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1831 </sect2>
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1832 <sect2>
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1833 <title>Initial Installation Method</title>
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1834 <para>A Windows or Linux utility is used to program flash over parallel port
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1835 driven JTAG interface. See board documentation for details on in situ flash
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1836 programming. </para>
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1837 <para>The flash parts are also socketed and may be programmed in a suitable
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1838 device programmer.</para>
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1839 </sect2>
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1840 <sect2>
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1841 <title>Special RedBoot Commands</title>
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1842 <para>None.</para>
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1843 </sect2>
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1844 <sect2>
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1845 <title>Memory Maps</title>
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1846 <para>The first level page table is located at physical address 0xc0004000.
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1847 No second level tables are used.<note><title>NOTE</title>
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1848 <para>The virtual memory maps in this section use a C and B column to indicate
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1849 whether or not the region is cached (C) or buffered (B).</para>
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1850 </note><programlisting>Physical Address Range Description
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1851 ----------------------- ----------------------------------
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1852 0x00000000 - 0x07ffffff flash
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1853 0x08000000 - 0x0fffffff SA-1111 Board flash
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1854 0x10000000 - 0x17ffffff Board Registers
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1855 0x18000000 - 0x1fffffff Ethernet
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1856 0x20000000 - 0x2fffffff SA-1111 Board PCMCIA
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1857 0x30000000 - 0x3fffffff Compact Flash
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1858 0x40000000 - 0x47ffffff SA-1111 Board
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1859 0x48000000 - 0x4bffffff GFX
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1860 0x80000000 - 0xbfffffff SA-1110 Internal Registers
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1861 0xc0000000 - 0xc7ffffff DRAM Bank 0
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1862 0xc8000000 - 0xcfffffff DRAM Bank 1
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1863 0xd0000000 - 0xd7ffffff DRAM Bank 2
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1864 0xd8000000 - 0xdfffffff DRAM Bank 3
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1865 0xe0000000 - 0xe7ffffff Cache Clean
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1866
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1867
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1868 Virtual Address Range C B Description
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diff changeset
1869 ----------------------- - - ----------------------------------
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1870 0x00000000 - 0x01ffffff Y Y DRAM Bank 0
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1871 0x08000000 - 0x0fffffff Y Y SA-1111 Board flash
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1872 0x10000000 - 0x17ffffff N N Board Registers
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1873 0x18000000 - 0x1fffffff N N Ethernet
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1874 0x20000000 - 0x2fffffff N N SA-1111 Board PCMCIA
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1875 0x30000000 - 0x3fffffff N N Compact Flash
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1876 0x40000000 - 0x47ffffff N N SA-1111 Board
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1877 0x48000000 - 0x4bffffff N N GFX
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1878 0x50000000 - 0x57ffffff Y Y flash
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1879 0x80000000 - 0xbfffffff N N SA-1110 Internal Registers
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1880 0xc0000000 - 0xc1ffffff N Y DRAM Bank 0
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1881 0xe0000000 - 0xe7ffffff Y Y Cache Clean
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1882 </programlisting></para>
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1883 </sect2>
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1884 <sect2>
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1885 <title>Platform Resource Usage </title>
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1886 <para>The SA11x0 OS timer is used as a polled timer to provide timeout support
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1887 for network and XModem file transfers.</para>
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1888 </sect2><sect2>
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1889 <title>Rebuilding RedBoot</title>
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1890
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1891 <para>These shell variables provide the platform-specific information
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1892 needed for building RedBoot according to the procedure described in
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1893 <xref linkend="Rebuilding-Redboot">:
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1894 <programlisting>
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1895 export TARGET=assabet
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1896 export ARCH_DIR=arm
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1897 export PLATFORM_DIR=sa11x0/assabet
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1898 </programlisting>
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1899 </para>
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1900
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1901 <para>The names of configuration files are listed above with the
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1902 description of the associated modes.</para>
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1903
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1904 </sect2>
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1905 </sect1>
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1906
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1907 <?Pub _newpage>
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1908 <sect1 id="nano">
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1909 <title>ARM/StrongARM(SA11X0) Bright Star Engineering commEngine and nanoEngine</title>
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1910 <sect2>
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1911 <title>Overview</title>
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1912 <para><indexterm><primary>commEngine</primary><secondary>installing and testing
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1913 </secondary></indexterm><indexterm><primary>nanoEngine</primary><secondary>
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1914 installing and testing</secondary></indexterm><indexterm><primary>installing
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1915 and testing</primary><secondary>commEngine</secondary></indexterm><indexterm>
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1916 <primary>installing and testing</primary><secondary>nanoEngine</secondary>
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1917 </indexterm>RedBoot supports a serial port and the built in ethernet port
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1918 for communication and downloads. The default serial port settings are 38400,8,N,1.
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1919 RedBoot runs from and supports flash management for the system flash
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1920 region.</para>
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1921
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1922 <para>The following RedBoot configurations are supported:
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1923
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1924 <informaltable frame="all">
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1925 <tgroup cols="4" colsep="1" rowsep="1" align="left">
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1926 <thead>
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1927 <row>
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1928 <entry>Configuration</entry>
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1929 <entry>Mode</entry>
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1930 <entry>Description</entry>
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1931 <entry>File</entry>
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1932 </row>
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1933 </thead>
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1934 <tbody>
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1935 <row>
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1936 <entry>POST</entry>
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1937 <entry>[ROM]</entry>
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1938 <entry>RedBoot running from the first free flash block
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1939 at 0x40000.</entry>
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1940 <entry>redboot_ROM.ecm</entry>
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1941 </row>
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1942 <row>
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1943 <entry>RAM</entry>
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1944 <entry>[RAM]</entry>
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1945 <entry>RedBoot running from RAM with RedBoot in the
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1946 flash boot sector.</entry>
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1947 <entry>redboot_RAM.ecm</entry>
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1948 </row>
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1949 </tbody>
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1950 </tgroup>
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1951 </informaltable>
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1952 </para>
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1953
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1954 </sect2>
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1955 <sect2>
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1956 <title>Initial Installation</title>
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1957 <para>Unlike other targets, the nanoEngine comes equipped with boot firmware
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1958 which you cannot modify. See chapter 5, "nanoEngine Firmware" of the <citetitle>
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1959 nanoEngine Hardware Reference Manual</citetitle> (we refer to "July 17, 2000
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1960 Rev 0.6") from Bright Star Engineering. </para>
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1961 <para>Because of this, eCos, and therefore Redboot, only supports a
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1962 special configuration of the ROM mode, starting at offset 0x40000 in
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1963 the flash.</para>
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1964 <para>Briefly, the POST-configuration RedBoot image lives in flash following the
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1965 BSE firmware. The BSE firmware is configured, using its standard <command>
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1966 bootcmd</command> command, to run RedBoot at startup.
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1967 </para>
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1968 </sect2>
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1969 <sect2>
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1970 <title>Download Instructions</title>
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1971 <para>You can perform the initial load of the POST-configuration RedBoot image into
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1972 flash using the BSE firmware's <command>load</command> command.
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1973 This will load a binary file, using TFTP, and program it into flash in one
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1974 operation. Because no memory management is used in the BSE firmware, flash
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1975 is mapped from address zero upwards, so the address for the RedBoot POST image
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1976 is 0x40000. You must use the binary version of RedBoot for this,
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1977 <filename>redboot-post.bin</filename>.</para>
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1978
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1979 <para>This assumes you have set up the other BSE firmware config
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1980 parameters such that it can communicate over your network to your TFTP
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1981 server.
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1982 <screen>><userinput>load redboot-post.bin 40000</userinput>
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1983 loading ... erasing blk at 00040000
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1984 erasing blk at 00050000
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1985 94168 bytes loaded cksum 00008579
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1986 done
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1987 >
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1988 > <userinput>set bootcmd "go 40000"</userinput>
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1989 > <userinput>get</userinput>
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1990 myip = 10.16.19.198
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1991 netmask = 255.255.255.0
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1992 eth = 0
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1993 gateway = 10.16.19.66
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1994 serverip = 10.16.19.66
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1995 bootcmd = go 40000
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1996 ></screen>
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1997
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1998 <note><title>NOTE</title>
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1999 <para>the BSE firmware runs its serial IO at 9600 Baud; RedBoot runs instead
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2000 at 38400 Baud. You must select the right baud rate in your terminal program
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2001 to be able to set up the BSE firmware.</para>
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2002 </note>
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2003
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2004 After a reset, the BSE firmware will print
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2005
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2006 <screen>Boot: BSE 2000 Sep 12 2000 14:00:30
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2007 autoboot: "go 40000" [hit ESC to abort]</screen>
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2008
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2009 and then RedBoot starts, switching to 38400 Baud.</para>
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2010
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2011 <para>Once you have installed a bootable RedBoot in the system in this
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2012 manner, we advise re-installing using the generic method described in
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2013 <xref linkend="updating-redboot"> in order that the Flash Image System
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2014 contains an appropriate description of the flash entries.</para>
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2015 </sect2>
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2016 <sect2>
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2017 <title>Cohabiting with POST in Flash</title>
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2018 <para>The configuration file named <filename>redboot_POST.ecm</filename>
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2019 configures RedBoot to build for execution at address 0x50040000 (or, during
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2020 bootup, 0x00040000). This is to allow power-on self-test (POST) code or immutable
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2021 firmware to live in the lower addresses of the flash and to run before RedBoot
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2022 gets control. The assumption is that RedBoot will be entered at its base address
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2023 in physical memory, that is 0x00040000.</para>
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2024
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2025 <para>Alternatively, for testing, you can call it in an already running system
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2026 by using <userinput>go 0x50040040</userinput> at another RedBoot prompt, or
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2027 a branch to that address. The address is where the reset vector
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2028 points. It is reported by RedBoot's <command>load</command> command
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2029 and listed
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2030 by the <command>fis list</command> command, amongst other
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2031 places.</para>
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2032
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2033 <para>Using the POST configuration enables a normal config option which causes
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2034 linking and initialization against memory layout files called "...post..."
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2035 rather than "...rom..." or "...ram..." in the <filename class="directory">include/pkgconf
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2036 </filename> directory. Specifically:<literallayout><filename>include/pkgconf/mlt_arm_sa11x0_nano_post.h</filename>
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2037 <filename>include/pkgconf/mlt_arm_sa11x0_nano_post.ldi</filename>
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2038 <filename>include/pkgconf/mlt_arm_sa11x0_nano_post.mlt</filename></literallayout>
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2039
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2040 It is these you should edit if you wish to move the execution address
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2041 from 0x50040000 in the POST configuration. Startup mode naturally
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2042 remains ROM in this configuration.</para>
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2043
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2044 <para>Because the nanoEngine contains immutable boot firmware at the start
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2045 of flash, RedBoot for this target is configured to reserve that area in the
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2046 Flash Image System, and to create by default an entry for the POST
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2047 mode RedBoot.
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2048 <screen>
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2049 RedBoot> <userinput>fis list</userinput>
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2050 Name FLASH addr Mem addr Length Entry point
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2051 (reserved) 0x50000000 0x50000000 0x00040000 0x00000000
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2052 RedBoot[post] 0x50040000 0x00100000 0x00020000 0x50040040
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2053 RedBoot config 0x503E0000 0x503E0000 0x00010000 0x00000000
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2054 FIS directory 0x503F0000 0x503F0000 0x00010000 0x00000000
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2055 RedBoot>
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2056 </screen>
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2057 The entry "(reserved)" ensures that the FIS cannot attempt
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2058 to overwrite the BSE firmware, thus ensuring that the board remains bootable
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2059 and recoverable even after installing a broken RedBoot image.</para>
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2060 </sect2>
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2061 <sect2>
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2062 <title>Special RedBoot Commands</title>
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2063 <para>The nanoEngine/commEngine has one or two Intel i82559 Ethernet controllers
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2064 installed, but these have no associated serial EEPROM in which to record their
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2065 Ethernet Station Address (ESA, or MAC address). The BSE firmware records an
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2066 ESA for the device it uses, but this information is not available to RedBoot;
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2067 we cannot share it.</para>
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2068 <para>To keep the ESAs for the two ethernet interfaces, two new items of RedBoot
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2069 configuration data are introduced. You can list them with the RedBoot command <command>
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2070 fconfig -l</command> thus:
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2071 <screen>
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2072 RedBoot> <userinput>fconfig -l</userinput>
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2073 Run script at boot: false
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2074 Use BOOTP for network configuration: false
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2075 Local IP address: 10.16.19.91
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2076 Default server IP address: 10.16.19.66
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2077 Network hardware address [MAC] for eth0: 0x00:0xB5:0xE0:0xB5:0xE0:0x99
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2078 Network hardware address [MAC] for eth1: 0x00:0xB5:0xE0:0xB5:0xE0:0x9A
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2079 GDB connection port: 9000
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2080 Network debug at boot time: false
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diff changeset
2081 RedBoot></screen>
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diff changeset
2082
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2083 You should set them before running RedBoot or eCos applications with
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2084 the board connected to a network. The <command>fconfig </command>
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2085 command can be used as for any configuration data item; the entire ESA
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2086 is entered in one line.</para>
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2087 </sect2>
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2088 <sect2>
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2089 <title>Memory Maps</title>
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2090 <para>The first level page table is located at physical address 0xc0004000.
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2091 No second level tables are used. <note><title>NOTE</title>
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2092 <para>The virtual memory maps in this section use a C and B column to indicate
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2093 whether or not the region is cached (C) or buffered (B).</para>
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2094 </note><programlisting>Physical Address Range Description
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diff changeset
2095 ----------------------- ----------------------------------
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2096 0x00000000 - 0x003fffff 4Mb FLASH (nCS0)
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2097 0x18000000 - 0x18ffffff Internal PCI bus - 2 x i82559 ethernet
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2098 0x40000000 - 0x4fffffff External IO or PCI bus
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2099 0x80000000 - 0xbfffffff SA-1110 Internal Registers
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2100 0xc0000000 - 0xc7ffffff DRAM Bank 0 - 32Mb SDRAM
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2101 0xc8000000 - 0xcfffffff DRAM Bank 1 - empty
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diff changeset
2102 0xe0000000 - 0xe7ffffff Cache Clean
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diff changeset
2103
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diff changeset
2104 Virtual Address Range C B Description
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diff changeset
2105 ----------------------- - - ----------------------------------
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2106 0x00000000 - 0x001fffff Y Y DRAM - 8Mb to 32Mb
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2107 0x18000000 - 0x180fffff N N Internal PCI bus - 2 x i82559 ethernet
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2108 0x40000000 - 0x4fffffff N N External IO or PCI bus
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2109 0x50000000 - 0x51ffffff Y Y Up to 32Mb FLASH (nCS0)
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2110 0x80000000 - 0xbfffffff N N SA-1110 Internal Registers
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2111 0xc0000000 - 0xc0ffffff N Y DRAM Bank 0: 8 or 16Mb
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2112 0xc8000000 - 0xc8ffffff N Y DRAM Bank 1: 8 or 16Mb or absent
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2113 0xe0000000 - 0xe7ffffff Y Y Cache Clean</programlisting>
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2114 </para>
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diff changeset
2115
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2116 <para>The ethernet devices use a "PCI window" to communicate with the CPU.
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2117 This is 1Mb of SDRAM which is shared with the ethernet devices that are on
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2118 the PCI bus. It is neither cached nor buffered, to ensure that CPU and PCI
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2119 accesses see correct data in the correct order. By default it is configured
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2120 to be megabyte number 30, at addresses 0x01e00000-0x01efffff. This can be
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2121 modified, and indeed must be, if less than 32Mb of SDRAM is installed, via
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2122 the memory layout tool, or by moving the section <computeroutput>__pci_window
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2123 </computeroutput> referred to by symbols <computeroutput>CYGMEM_SECTION_pci_window*
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2124 </computeroutput> in the linker script. </para>
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2125 <para>Though the nanoEngine ships with 32Mb of SDRAM all attached to DRAM
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2126 bank 0, the code can cope with any of these combinations also; "2 x " in this
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2127 context means one device in each DRAM Bank. <literallayout>1 x 8Mb = 8Mb 2 x 8Mb = 16Mb
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2128 1 x 16Mb = 16Mb 2 x 16Mb = 32Mb</literallayout>All are programmed the same
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2129 in the memory controller. </para>
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2130 <para>Startup code detects which is fitted and programs the memory map accordingly.
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2131 If the device(s) is 8Mb, then there are gaps in the physical memory map, because
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2132 a high order address bit is not connected. The gaps are the higher 2Mb out
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2133 of every 4Mb.</para>
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diff changeset
2134
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2135 <para> The SA11x0 OS timer is used as a polled timer to provide timeout
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2136 support within RedBoot.</para>
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diff changeset
2137 </sect2>
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2138 <sect2>
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2139 <title>Nano Platform Port</title>
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2140 <para>The nano is in the set of SA11X0-based platforms. It uses the arm architectural
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2141 HAL, the sa11x0 variant HAL, plus the nano platform hal. These are components
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2142 <literallayout>CYGPKG_HAL_ARM hal/arm/arch/
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2143 CYGPKG_HAL_ARM_SA11X0 hal/arm/sa11x0/var
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2144 CYGPKG_HAL_ARM_SA11X0_NANO hal/arm/sa11x0/nano</literallayout> respectively.
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2145 </para>
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2146 <para>The target name is "nano" which includes all these, plus the ethernet
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2147 driver packages, flash driver, and so on.</para>
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diff changeset
2148 </sect2>
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diff changeset
2149 <sect2>
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2150 <title>Ethernet Driver</title>
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2151 <para>The ethernet driver is in two parts: </para>
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2152 <para>A generic ether driver for Intel i8255x series devices, specifically
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2153 the i82559, is <computeroutput>devs/eth/intel/i82559</computeroutput>. Its
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2154 package name is <computeroutput>CYGPKG_DEVS_ETH_INTEL_I82559</computeroutput>.
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2155 </para>
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2156 <para>The platform-specific ether driver is <computeroutput>devs/eth/arm/nano
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2157 </computeroutput>. Its package is <computeroutput>CYGPKG_DEVS_ETH_ARM_NANO
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2158 </computeroutput>. This tells the generic driver the address in IO memory
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diff changeset
2159 of the chip, for example, and other configuration details. This driver picks
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2160 up the ESA from RedBoot's configuration data - unless configured to use a
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2161 static ESA in the usual manner. </para>
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2162 </sect2><sect2>
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2163 <title>Rebuilding RedBoot</title>
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2164
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2165 <para>These shell variables provide the platform-specific information
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2166 needed for building RedBoot according to the procedure described in
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2167 <xref linkend="Rebuilding-Redboot">:
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2168 <programlisting>
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2169 export TARGET=nano
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2170 export ARCH_DIR=arm
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2171 export PLATFORM_DIR=sa11x0/nano
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2172 </programlisting>
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2173 </para>
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2174
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2175 <para>The names of configuration files are listed above with the
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2176 description of the associated modes.</para>
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2177 </sect2>
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2178 </sect1>
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diff changeset
2179
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diff changeset
2180 <?Pub _newpage>
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diff changeset
2181 <sect1 id="ipaq">
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2182 <title>ARM/StrongARM(SA11X0) Compaq iPAQ PocketPC</title>
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2183 <indexterm><primary>Compaq iPAQ PocketPC</primary><secondary>installing and
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diff changeset
2184 testing</secondary></indexterm><indexterm><primary>installing and testing
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2185 </primary><secondary>Compaq iPAQ PocketPC</secondary></indexterm>
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diff changeset
2186 <sect2>
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2187 <title>Overview</title>
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2188 <para>RedBoot supports the serial port via cradle or cable, and Compact Flash
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2189 ethernet cards if fitted for communication and downloads. The LCD touchscreen
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2190 may also be used for the console, although by default RedBoot will switch
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2191 exclusively to one channel once input arrives. </para>
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2192 <para>The default serial port settings are 38400,8,N,1. RedBoot runs from
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2193 and supports flash management for the system flash region. </para>
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2194
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2195 <para>The following RedBoot configurations are supported:
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2196
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2197 <informaltable frame="all">
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2198 <tgroup cols="4" colsep="1" rowsep="1" align="left">
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2199 <thead>
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2200 <row>
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2201 <entry>Configuration</entry>
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2202 <entry>Mode</entry>
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2203 <entry>Description</entry>
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2204 <entry>File</entry>
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2205 </row>
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2206 </thead>
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2207 <tbody>
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2208 <row>
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2209 <entry>ROM</entry>
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2210 <entry>[ROM]</entry>
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2211 <entry>RedBoot running from the board's flash boot
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2212 sector.</entry>
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2213 <entry>redboot_ROM.ecm</entry>
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2214 </row>
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2215 <row>
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2216 <entry>RAM</entry>
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2217 <entry>[RAM]</entry>
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2218 <entry>RedBoot running from RAM with RedBoot in the
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2219 flash boot sector.</entry>
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2220 <entry>redboot_RAM.ecm</entry>
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2221 </row>
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2222 <row>
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2223 <entry>WinCE</entry>
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2224 <entry>[RAM]</entry>
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2225 <entry>RedBoot running from RAM, started from
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2226 <application>OSloader</application>.</entry>
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2227 <entry>redboot_WinCE.ecm</entry>
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2228 </row>
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2229 </tbody>
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2230 </tgroup>
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2231 </informaltable>
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2232 </para>
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2233
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2234
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2235
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2236 </sect2>
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2237 <sect2>
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2238 <title>Initial Installation</title>
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2239 <para>RedBoot ROM and WinCE mode images are needed by the installation process.
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2240 </para>
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2241 <sect3>
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2242 <title>Installing RedBoot on the iPAQ using Windows/CE</title>
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2243 <para>
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2244 The Windows/CE environment originally shipped with the iPAQ contains a hidden
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2245 mini-loader, sometimes referred to as the "Parrot" loader. This loader can
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2246 be started by holding down the action button (the joypad) while resetting
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2247 the unit or when powering on. At this point, a blue bird will appear on
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2248 the LCD screen. Also at this point, a simple loader can be accessed over the
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2249 serial port at 115200/8N1. Using this loader, the contents of the iPAQ flash
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2250 memory can be saved to a Compact Flash memory card.
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2251 <note><title>NOTE</title><para>We have only tested this operation with a 32Mbyte CF memory card.
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2252 Given that the backup will take 16MBytes + 1KByte, something more than a 16MByte
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2253 card will be required.</para></note>
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2254 </para>
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2255 <para>
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2256 Use the "r2c" command to dump Flash contents to the CF memory card. Once this
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2257 completes, RedBoot can be installed with no fear since the Parrot loader can
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2258 be used to restore the Flash contents at a later time.
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2259 </para>
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2260 <para>
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2261 If you expect to completely recover the state of the iPAQ Win/CE environment, then
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2262 HotSync should be run to backup all "RAM" files as well before installing RedBoot.
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2263 </para>
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2264 <para>The next step in installing RedBoot on the iPAQ actually involves Windows/CE,
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2265 which is the native environment on the unit. Using WinCE, you need to
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2266 install an application which will run a RAM based version of RedBoot. Once
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2267 this is installed and running, RedBoot can be used to update the flash with
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2268 a native/ROM version of RedBoot. <itemizedlist>
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2269 <listitem><para>Using ActiveSync, copy the file OSloader to your iPAQ. </para>
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2270 </listitem>
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2271 <listitem><para>Using ActiveSync, copy the file redboot_WinCE.bin to the iPAQ
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2272 as bootldr in its root directory. Note: this is not the top level folder
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2273 displayed by Windows (Mobile Device), but rather the 'My Pocket PC' folder
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2274 within it.</para>
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2275 </listitem>
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2276 <listitem><para>Execute OSloader. If you didn't create a shortcut, then you
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2277 will have to poke around for it using the WinCE file explorer.</para>
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2278 </listitem>
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2279 <listitem><para>Choose the <guimenuitem>Tools->BootLdr->Run after loading
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2280 from file</guimenuitem> menu item. </para>
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2281 </listitem>
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2282 </itemizedlist>At this point, the RAM based version of RedBoot should be running.
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2283 You should be able to return to this point by just executing the last two
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2284 steps of the previous process if necessary.</para>
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2285 </sect3>
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2286 <sect3>
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2287 <title>Installing RedBoot on the iPAQ - using the Compaq boot loader</title>
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2288 <para>This method of installation is no longer supported.
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2289 If you have previously installed either the Compaq boot loader or older
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2290 versions of RedBoot, restore the Win/CE environment and proceed as outlined
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2291 above.
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2292 </para>
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2293 </sect3>
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2294 <sect3 id="setting-up-and-testing-redboot">
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2295 <title>Setting up and testing RedBoot</title>
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2296 <para>When RedBoot first comes up, it will want to initialize its LCD touch
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2297 screen parameters. It does this by displaying a keyboard graphic and asks
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2298 you to press certain keys. Using the stylus, press and hold until the prompt
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2299 is withdrawn. When you lift the stylus, RedBoot will continue with the next
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2300 calibration. </para>
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2301 <para>Once the LCD touchscreen has been calibrated, RedBoot will start. The
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2302 calibration step can be skipped by pressing the <guibutton>return/abort</guibutton>
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2303 button on the unit (right most button with a curved arrow icon). Additionally,
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2304 the unit will assume default values if the screen is not touched within about
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2305 15 seconds. </para>
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2306 <para>Once RedBoot has started, you should get information similar to this
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2307 on the LCD screen. It will also appear on the serial port at 38400,8,N,1.
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2308
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2309 <screen>RedBoot(tm) bootstrap and debug environment [ROM]
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2310 Non-certified release, version UNKNOWN - built 06:17:41, Mar 19 2001
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2311 Platform: Compaq iPAQ Pocket PC (StrongARM 1110)
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2312
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2313 Copyright (C) 2000, 2001, Red Hat, Inc.
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2314
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2315 RAM: 0x00000000-0x01fc0000, 0x0001f200-0x01f70000 available
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2316 FLASH: 0x50000000 - 0x51000000, 64 blocks of 0x00040000 bytes
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2317 each.</screen>
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2318
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2319 Since the LCD touchscreen is only 30 characters wide, some of this
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2320 data will be off the right hand side of the display. The joypad may be
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2321 used to pan left and right in order to see the full lines. </para>
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2322 <para>If you have a Compact Flash ethernet card, RedBoot should find
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2323 it. You'll need to have BOOTP enabled for this unit (see your
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2324 sysadmin for details). If it does, it will print a message like:
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2325
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2326 <screen>... Waiting for network card: .Ready!
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2327 Socket Communications Inc: CF+ LPE Revision E 08/04/99
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2328 IP: 192.168.1.34, Default server: 192.168.1.101</screen></para>
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2329 </sect3>
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2330
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2331 <sect3 id="ipaq-install-rb-permanently">
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2332 <title>Installing RedBoot permanently</title>
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2333 <para>Once you are satisfied with the setup and that RedBoot is operating
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2334 properly in your environment, you can set up your iPAQ unit to have RedBoot
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2335 be the bootstrap application.
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2336
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2337 <caution><title>CAUTION</title>
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2338 <para>This step will destroy your Windows/CE environment.</para>
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2339 <para>Before you take this step, it is strongly recommended you save your WinCE FLASH contents
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2340 as outlined above using the "parrot" loader, or
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2341 by using the Compaq OSloader:<itemizedlist>
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2342
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2343 <listitem><para>Using OSloader on the iPAQ, select the <guimenuitem>Tools->Flash->Save
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2344 to files...</guimenuitem>. menu item.</para>
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2345 </listitem>
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2346
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2347 <listitem><para>Four (4) files, 4MB each in size will be created.</para>
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2348 </listitem>
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2349
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2350 <listitem><para>After each file is created, copy the file to your computer,
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2351 then delete the file from the iPAQ to make room in the WinCE ramdisk for the
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2352 next file.</para></listitem>
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2353 </itemizedlist></para>
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2354
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2355 </caution>You will need to download the version of RedBoot designed as the
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2356 ROM bootstrap. Then install it permanently using these commands:
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2357 <screen>
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2358 RedBoot> <userinput>lo -r -b 0x100000 redboot_ROM.bin</userinput>
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2359 RedBoot> <userinput>fi loc -f 0x50000000 -l 0x40000</userinput>
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2360 RedBoot> <userinput>fis init</userinput>
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2361 RedBoot> <userinput>fi unl -f 0x50040000 -l 0x40000</userinput>
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2362 RedBoot> <userinput>fi cr RedBoot -b 0x100000</userinput>
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2363 RedBoot> <userinput>fi loc -f 0x50040000 -l 0x40000</userinput>
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2364 RedBoot> <userinput>reset</userinput>
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2365 </screen>
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2366
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2367 <warning><title>WARNING</title>
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2368 <para>You must type these commands exactly! Failure to do so may render your
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2369 iPAQ totally useless. Once you've done this, RedBoot should come up every
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2370 time you reset.</para>
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2371 </warning></para>
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2372 </sect3>
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2373
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2374 <sect3>
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2375 <title>Restoring Windows/CE</title>
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2376 <para>To restore Windows/CE from the backup taken in <xref linkend="ipaq-install-rb-permanently">,
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2377 visit <ulink url="http://www.handhelds.org/projects/wincerestoration.html">http://www.handhelds.org/projects/wincerestoration.html</ulink>
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2378 for directions.
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2379 </para>
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2380 </sect3></sect2>
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2381
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2382 <sect2>
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2383 <title>Additional commands</title>
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2384 <para>The <command>exec</command> command which allows the loading
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2385 and execution of Linux kernels,
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2386 is supported for this board (see <xref linkend="executing-programs">). The <command>
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2387 exec</command> parameters used for the iPAQ are:</para>
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2388 <variablelist><varlistentry>
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2389 <term>-b <replaceable>&lt;addr></replaceable></term>
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2390 <listitem><para>Location Linux kernel was loaded to</para></listitem></varlistentry>
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2391 <varlistentry><term>
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2392 -l <replaceable>&lt;len></replaceable></term>
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2393 <listitem><para>Length of kernel</para></listitem></varlistentry>
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2394 <varlistentry><term>
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2395 -c <replaceable>"params"</replaceable></term>
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2396 <listitem><para>Parameters passed to kernel</para></listitem></varlistentry>
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2397 <varlistentry><term>-r <replaceable>&lt;addr></replaceable></term>
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2398 <listitem><para>'initrd' ramdisk location</para></listitem></varlistentry>
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2399 <varlistentry><term>-s <replaceable>&lt;len></replaceable></term>
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2400 <listitem><para>Length of initrd ramdisk</para></listitem></varlistentry>
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2401 </variablelist>
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2402 <para>Linux kernels may be run on the iPAQ using the sources from the anonymous
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2403 CVS repository at the Handhelds project (<ulink url="http://www.handhelds.org/">
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2404 http://www.handhelds.org/</ulink>) with
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2405 the <filename>elinux.patch</filename> patch file applied. This file can be
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2406 found in the
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2407 <filename>misc/</filename> subdirectory of the iPAQ platform HAL in the
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2408 RedBoot sources, normally
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2409 <filename>hal/arm/sa11x0/ipaq/<replaceable>VERSION</replaceable>/misc/</filename>
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2410 </para>
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2411 <para>
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2412 On the iPAQ (and indeed all SA11x0 platforms), Linux expects to be loaded
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2413 at address 0xC0008000 and the entry point is also at 0xC0008000.
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2414 </para>
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2415
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2416 </sect2>
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2417 <sect2>
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2418 <title>Memory Maps</title>
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2419 <para>RedBoot sets up the following memory map on the iPAQ: The first level
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2420 page table is located at physical address 0xC0004000. No second level tables
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2421 are used. <note><title>NOTE</title>
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2422 <para>The virtual memory maps in this section use a C and B column to indicate
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2423 whether or not the region is cached (C) or buffered (B).</para>
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2424 </note> <programlisting>Physical Address Range Description
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diff changeset
2425 ----------------------- ----------------------------------
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2426 0x00000000 - 0x01ffffff 16Mb to 32Mb FLASH (nCS0) [organized as below]
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2427 0x000000 - 0x0003ffff Parrot Loader
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2428 0x040000 - 0x0007ffff RedBoot
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2429 0xf80000 - 0x00fbffff Fconfig data
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2430 0xfc0000 - 0x00ffffff FIS directory
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2431 0x30000000 - 0x3fffffff Compact Flash
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2432 0x48000000 - 0x4bffffff iPAQ internal registers
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2433 0x80000000 - 0xbfffffff SA-1110 Internal Registers
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2434 0xc0000000 - 0xc1ffffff DRAM Bank 0 - 32Mb SDRAM
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2435 0xe0000000 - 0xe7ffffff Cache Clean
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diff changeset
2436
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2437
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2438 Virtual Address Range C B Description
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diff changeset
2439 ----------------------- - - ----------------------------------
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2440 0x00000000 - 0x01ffffff Y Y DRAM - 32Mb
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diff changeset
2441 0x30000000 - 0x3fffffff N N Compact Flash
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2442 0x48000000 - 0x4bffffff N N iPAQ internal registers
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2443 0x50000000 - 0x51ffffff Y Y Up to 32Mb FLASH (nCS0)
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2444 0x80000000 - 0xbfffffff N N SA-1110 Internal Registers
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2445 0xc0000000 - 0xc1ffffff N Y DRAM Bank 0: 32Mb
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2446 0xe0000000 - 0xe7ffffff Y Y Cache Clean </programlisting> </para>
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2447 </sect2>
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2448 <sect2>
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2449 <title>Rebuilding RedBoot</title>
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2450
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2451 <para>These shell variables provide the platform-specific information
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2452 needed for building RedBoot according to the procedure described in
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2453 <xref linkend="Rebuilding-Redboot">:
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2454 <programlisting>
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2455 export TARGET=ipaq
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2456 export ARCH_DIR=arm
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2457 export PLATFORM_DIR=sa11x0/ipaq
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2458 </programlisting>
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2459 </para>
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2460
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2461 <para>The names of configuration files are listed above with the
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2462 description of the associated modes.</para>
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2463
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2464 </sect2></sect1>
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2465
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2466 <?Pub _newpage>
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2467 <sect1 id="cerfcube">
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2468 <title>ARM/StrongARM(SA11X0) Intrinsyc CerfCube</title>
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2469 <indexterm><primary>Intrinsyc CerfCube</primary><secondary>installing and
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2470 testing</secondary></indexterm><indexterm><primary>installing and testing
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2471 </primary><secondary>Intrinsyc CerfCube</secondary></indexterm>
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2472 <sect2>
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2473 <title>Overview</title>
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2474 <para>RedBoot supports the serial port and the builtin
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2475 ethernet connection for communication and downloads.
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2476 </para>
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2477 <para>The default serial port settings are 38400,8,N,1. RedBoot runs from
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2478 and supports flash management for the system flash region. </para>
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2479
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2480 <para>The following RedBoot configurations are supported:
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2481
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diff changeset
2482 <informaltable frame="all">
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diff changeset
2483 <tgroup cols="4" colsep="1" rowsep="1" align="left">
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2484 <thead>
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2485 <row>
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2486 <entry>Configuration</entry>
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2487 <entry>Mode</entry>
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diff changeset
2488 <entry>Description</entry>
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diff changeset
2489 <entry>File</entry>
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2490 </row>
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2491 </thead>
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diff changeset
2492 <tbody>
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diff changeset
2493 <row>
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2494 <entry>ROM</entry>
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2495 <entry>[ROM]</entry>
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2496 <entry>RedBoot running from the board's flash boot
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2497 sector.</entry>
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2498 <entry>redboot_ROM.ecm</entry>
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diff changeset
2499 </row>
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2500 <row>
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diff changeset
2501 <entry>RAM</entry>
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2502 <entry>[RAM]</entry>
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2503 <entry>RedBoot running from RAM with RedBoot in the
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2504 flash boot sector.</entry>
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2505 <entry>redboot_RAM.ecm</entry>
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2506 </row>
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2507 </tbody>
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2508 </tgroup>
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2509 </informaltable>
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2510 </para>
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2511
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2512
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diff changeset
2513 </sect2>
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diff changeset
2514 <sect2>
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diff changeset
2515 <title>Initial Installation</title>
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diff changeset
2516 <para>
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2517 The original boot loader supplied with the CerfCube can be used to install
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2518 RedBoot. Connect to the device using a serial port at 38400/8N1.
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2519 Copy the binary RedBoot ROM mode image to an available TFTP server.
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diff changeset
2520 Issue these commands to the Instrinsyc loader:
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diff changeset
2521 <screen>
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2522 <userinput>download tftp:<replaceable>x.x.x.x</replaceable> redboot_ROM.bin 0xc0000000</userinput>
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2523 <userinput>flashloader 0x00000000 0xc0000000 0x20000</userinput>
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2524 </screen>
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2525 where <replaceable>x.x.x.x</replaceable> is the IP address of the TFTP
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2526 server.
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diff changeset
2527 <note>
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diff changeset
2528 <title>NOTE</title>
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2529 <para>
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diff changeset
2530 Other installation methods may be available via the Intrinsyc loader.
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diff changeset
2531 Contact Intrinsyc for details.
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2532 </para>
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2533 </note>
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2534 </para>
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2535 </sect2>
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diff changeset
2536 <sect2>
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2537 <title>Additional commands</title>
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2538 <para>The <command>exec</command> command which allows the loading
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diff changeset
2539 and execution of Linux kernels,
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diff changeset
2540 is supported for this board (see <xref linkend="executing-programs">). The <command>
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2541 exec</command> parameters used for the CerfCube are:</para>
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2542 <variablelist><varlistentry>
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2543 <term>-b <replaceable>&lt;addr></replaceable></term>
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2544 <listitem><para>Location Linux kernel was loaded to</para></listitem></varlistentry>
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diff changeset
2545 <varlistentry><term>
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diff changeset
2546 -l <replaceable>&lt;len></replaceable></term>
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2547 <listitem><para>Length of kernel</para></listitem></varlistentry>
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diff changeset
2548 <varlistentry><term>
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diff changeset
2549 -c <replaceable>"params"</replaceable></term>
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diff changeset
2550 <listitem><para>Parameters passed to kernel</para></listitem></varlistentry>
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diff changeset
2551 <varlistentry><term>-r <replaceable>&lt;addr></replaceable></term>
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diff changeset
2552 <listitem><para>'initrd' ramdisk location</para></listitem></varlistentry>
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diff changeset
2553 <varlistentry><term>-s <replaceable>&lt;len></replaceable></term>
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2554 <listitem><para>Length of initrd ramdisk</para></listitem></varlistentry>
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diff changeset
2555 </variablelist>
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diff changeset
2556
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diff changeset
2557 </sect2>
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diff changeset
2558 <sect2>
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diff changeset
2559 <title>Memory Maps</title>
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2560 <para>RedBoot sets up the following memory map on the CerfCube: The first level
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2561 page table is located at physical address 0xC0004000. No second level tables
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2562 are used. <note><title>NOTE</title>
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2563 <para>The virtual memory maps in this section use a C and B column to indicate
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2564 whether or not the region is cached (C) or buffered (B).</para>
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2565 </note> <programlisting>Physical Address Range Description
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diff changeset
2566 ----------------------- ----------------------------------
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2567 0x00000000 - 0x01ffffff 16Mb to 32Mb FLASH (nCS0) [organized as below]
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2568 0x000000 - 0x0001ffff RedBoot
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diff changeset
2569 0x020000 - 0x0003ffff RedBoot [RAM version]
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diff changeset
2570 0xfc0000 - 0x00fdffff Fconfig data
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diff changeset
2571 0xfe0000 - 0x00ffffff FIS directory
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diff changeset
2572 0x0f000000 - 0x0fffffff Onboard ethernet
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2573 0x10000000 - 0x17ffffff CerfCube internal registers
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diff changeset
2574 0x20000000 - 0x3fffffff PCMCIA / Compact Flash
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diff changeset
2575 0x80000000 - 0xbfffffff SA-1110 Internal Registers
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2576 0xc0000000 - 0xc1ffffff DRAM Bank 0 - 32Mb SDRAM
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diff changeset
2577 0xe0000000 - 0xe7ffffff Cache Clean
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diff changeset
2578
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diff changeset
2579
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diff changeset
2580 Virtual Address Range C B Description
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diff changeset
2581 ----------------------- - - ----------------------------------
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diff changeset
2582 0x00000000 - 0x01ffffff Y Y DRAM - 32Mb
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diff changeset
2583 0x08000000 - 0x0fffffff N N Onboard ethernet controller
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diff changeset
2584 0x10000000 - 0x17ffffff N N CerfCube internal registers
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diff changeset
2585 0x20000000 - 0x3fffffff N N PCMCIA / Compact Flash
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diff changeset
2586 0x50000000 - 0x51ffffff Y Y Up to 32Mb FLASH (nCS0)
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diff changeset
2587 0x80000000 - 0xbfffffff N N SA-1110 Internal Registers
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diff changeset
2588 0xc0000000 - 0xc1ffffff N Y DRAM Bank 0: 32Mb
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diff changeset
2589 0xe0000000 - 0xe7ffffff Y Y Cache Clean </programlisting> </para>
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diff changeset
2590 </sect2>
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diff changeset
2591
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diff changeset
2592 <sect2>
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diff changeset
2593 <title>Rebuilding RedBoot</title>
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2594
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2595 <para>These shell variables provide the platform-specific information
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2596 needed for building RedBoot according to the procedure described in
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2597 <xref linkend="Rebuilding-Redboot">:
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2598 <programlisting>
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2599 export TARGET=cerf
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2600 export ARCH_DIR=arm
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2601 export PLATFORM_DIR=sa11x0/cerf
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2602 </programlisting>
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2603 </para>
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2604
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2605 <para>The names of configuration files are listed above with the
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2606 description of the associated modes.</para>
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2607
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2608 </sect2></sect1>
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2609
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2610
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2611 <sect1 id="iq80310">
211
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2612 <title>ARM/Xscale Cyclone IQ80310</title>
208
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2613 <sect2>
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2614 <title>Overview</title>
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2615 <para><indexterm><primary>Cyclone IQ80310</primary><secondary>installing and
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2616 testing</secondary></indexterm><indexterm><primary>installing and testing
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2617 </primary><secondary>Cyclone IQ80310</secondary></indexterm>RedBoot supports
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2618 both serial ports and the built-in ethernet port for communication and downloads.
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2619 The default serial port settings are 115200,8,N,1. RedBoot also supports flash
210
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2620 management for the onboard 8MB flash.</para>
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2621
211
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2622 <para>The following RedBoot configurations are supported:
210
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2623
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2624 <informaltable frame="all">
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2625 <tgroup cols="4" colsep="1" rowsep="1" align="left">
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2626 <thead>
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2627 <row>
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2628 <entry>Configuration</entry>
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2629 <entry>Mode</entry>
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2630 <entry>Description</entry>
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2631 <entry>File</entry>
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2632 </row>
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2633 </thead>
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2634 <tbody>
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2635 <row>
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2636 <entry>ROM</entry>
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2637 <entry>[ROM]</entry>
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2638 <entry>RedBoot running from the board's flash boot
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2639 sector.</entry>
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2640 <entry>redboot_ROM.ecm</entry>
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2641 </row>
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2642 <row>
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2643 <entry>RAM</entry>
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2644 <entry>[RAM]</entry>
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2645 <entry>RedBoot running from RAM with RedBoot in the
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2646 flash boot sector.</entry>
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2647 <entry>redboot_RAM.ecm</entry>
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2648 </row>
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2649 <row>
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2650 <entry>ROMA</entry>
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2651 <entry>[ROM]</entry>
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2652 <entry>RedBoot running from flash address 0x40000, with
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2653 ARM bootloader in flash boot sector.</entry>
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diff changeset
2654 <entry>redboot_ROMA.ecm</entry>
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diff changeset
2655 </row>
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2656 <row>
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2657 <entry>RAMA</entry>
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2658 <entry>[RAM]</entry>
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2659 <entry>RedBoot running from RAM with ARM bootloader in
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2660 flash boot sector.</entry>
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2661 <entry>redboot_RAMA.ecm</entry>
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2662 </row>
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2663 </tbody>
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2664 </tgroup>
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2665 </informaltable>
208
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2666 </para>
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2667 </sect2>
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2668 <sect2>
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2669 <title>Initial Installation Method</title>
210
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2670
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diff changeset
2671 <para>The board manufacturer provides a DOS application which is
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2672 capable of programming the flash over the PCI bus, and this is
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diff changeset
2673 required for initial installations of RedBoot. Please see the board
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2674 manual for information on using this utility. In general, the process
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2675 involves programming one of the two flash based RedBoot images to
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2676 flash. The ROM mode RedBoot (which runs from the flash boot sector)
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2677 should be programmed to flash address 0x00000000. The ROMA RedBoot
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2678 mode (which is started by the ARM bootloader) should be programmed to
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2679 flash address 0x00004000.
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2680 </para>
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2681
208
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2682 <para> To install RedBoot to run from the flash boot sector, use the manufacturer's
210
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2683 flash utility to install the ROM mode image at address zero.
208
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2684 </para>
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2685 <para>To install RedBoot to run from address 0x40000 with the ARM bootloader
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2686 in the flash boot sector, use the manufacturer's flash utility to install
210
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diff changeset
2687 the ROMA mode image at address 0x40000. </para>
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2688
208
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2689 <para>After booting the initial installation of RedBoot, this warning may
211
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diff changeset
2690 be printed: <screen>flash configuration checksum error or invalid key
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diff changeset
2691 </screen>This is normal, and indicates that the flash must be configured
208
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2692 for use by RedBoot. Even if the above message is not printed, it may be a
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2693 good idea to reinitialize the flash anyway. Do this with the <command>
211
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2694 fis</command> command: <screen>RedBoot> <userinput>fis init</userinput>
210
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diff changeset
2695 About to initialize [format] flash image system - continue (y/n)? <userinput>y</userinput>
208
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2696 *** Initialize flash Image System
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diff changeset
2697 Warning: device contents not erased, some blocks may not be usable
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diff changeset
2698 ... Unlock from 0x007e0000-0x00800000: .
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2699 ... Erase from 0x007e0000-0x00800000: .
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2700 ... Program from 0xa1fd0000-0xa1fd0400 at 0x007e0000: .
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2701 ... Lock from 0x007e0000-0x00800000: .
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2702 Followed by the fconfig command:
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2703 RedBoot> <userinput>fconfig</userinput>
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2704 Run script at boot: <userinput>false</userinput>
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2705 Use BOOTP for network configuration: <userinput>false</userinput>
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2706 Local IP address: <userinput>192.168.1.153</userinput>
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2707 Default server IP address: <userinput>192.168.1.10</userinput>
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2708 GDB connection port: <userinput>1000</userinput>
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2709 Network debug at boot time: <userinput>false</userinput>
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2710 Update RedBoot non-volatile configuration - continue (y/n)? <userinput>y</userinput>
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2711 ... Unlock from 0x007c0000-0x007e0000: .
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2712 ... Erase from 0x007c0000-0x007e0000: .
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2713 ... Program from 0xa0013018-0xa0013418 at 0x007c0000: .
211
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2714 ... Lock from 0x007c0000-0x007e0000: .</screen></para>
210
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2715
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2716 <note><para>When later updating RedBoot in situ, it is important to
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2717 use a matching ROM and RAM mode pair of images. So use either RAM/ROM
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2718 or RAMA/ROMA images. Do not mix them.</para></note>
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2719
208
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2720 </sect2>
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2721 <sect2>
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2722 <title>Error codes</title>
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2723 <para>RedBoot uses the two digit LED display to indicate errors during board
211
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2724 initialization. Possible error codes are: <literallayout>88 - Unknown Error
208
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2725 55 - I2C Error
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2726 FF - SDRAM Error
211
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2727 01 - No Error</literallayout></para>
208
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2728 </sect2>
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2729 <sect2>
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diff changeset
2730 <title>Using RedBoot with ARM Bootloader </title>
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diff changeset
2731 <para>RedBoot can coexist with ARM tools in flash on the IQ80310 board. In
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diff changeset
2732 this configuration, the ARM bootloader will occupy the flash boot sector while
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diff changeset
2733 RedBoot is located at flash address 0x40000. The sixteen position rotary switch
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diff changeset
2734 is used to tell the ARM bootloader to jump to the RedBoot image located at
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diff changeset
2735 address 0x40000. RedBoot is selected by switch position 0 or 1. Other switch
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diff changeset
2736 positions are used by the ARM firmware and RedBoot will not be started. </para>
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diff changeset
2737 </sect2>
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2738 <sect2>
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2739 <title>Special RedBoot Commands </title>
210
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2740 <para>A special RedBoot command, <command>diag</command>, is used to
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diff changeset
2741 access a set of hardware diagnostics provided by the board
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2742 manufacturer. To access the diagnostic menu, enter diag at the RedBoot prompt:
211
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diff changeset
2743 <screen>
208
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2744 RedBoot> <userinput>diag</userinput>
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diff changeset
2745 Entering Hardware Diagnostics - Disabling Data Cache!
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diff changeset
2746 1 - Memory Tests
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diff changeset
2747 2 - Repeating Memory Tests
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diff changeset
2748 3 - 16C552 DUART Serial Port Tests
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2749 4 - Rotary Switch S1 Test for positions 0-3
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diff changeset
2750 5 - seven Segment LED Tests
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diff changeset
2751 6 - Backplane Detection Test
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2752 7 - Battery Status Test
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diff changeset
2753 8 - External Timer Test
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diff changeset
2754 9 - i82559 Ethernet Configuration
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2755 10 - i82559 Ethernet Test
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2756 11 - Secondary PCI Bus Test
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diff changeset
2757 12 - Primary PCI Bus Test
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2758 13 - i960Rx/303 PCI Interrupt Test
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diff changeset
2759 14 - Internal Timer Test
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2760 15 - GPIO Test
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2761 0 - quit Enter the menu item number (0 to quit):
211
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diff changeset
2762 </screen>
208
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2763 Tests for various hardware subsystems are provided, and some
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diff changeset
2764 tests require special hardware in order to execute normally. The Ethernet
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diff changeset
2765 Configuration item may be used to set the board ethernet address.</para>
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diff changeset
2766 </sect2>
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diff changeset
2767 <sect2>
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2768 <title>IQ80310 Hardware Tests</title>
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2769 <para><screen>1 - Memory Tests
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2770 2 - Repeating Memory Tests
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diff changeset
2771 3 - 16C552 DUART Serial Port Tests
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diff changeset
2772 4 - Rotary Switch S1 Test for positions 0-3
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diff changeset
2773 5 - 7 Segment LED Tests
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diff changeset
2774 6 - Backplane Detection Test
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diff changeset
2775 7 - Battery Status Test
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diff changeset
2776 8 - External Timer Test
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diff changeset
2777 9 - i82559 Ethernet Configuration
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diff changeset
2778 10 - i82559 Ethernet Test
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diff changeset
2779 11 - i960Rx/303 PCI Interrupt Test
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diff changeset
2780 12 - Internal Timer Test
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diff changeset
2781 13 - Secondary PCI Bus Test
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diff changeset
2782 14 - Primary PCI Bus Test
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diff changeset
2783 15 - Battery Backup SDRAM Memory Test
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diff changeset
2784 16 - GPIO Test
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diff changeset
2785 17 - Repeat-On-Fail Memory Test
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diff changeset
2786 18 - Coyonosa Cache Loop (No return)
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diff changeset
2787 19 - Show Software and Hardware Revision
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2788 0 - quit
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diff changeset
2789 Enter the menu item number (0 to quit): </screen></para>
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2790 <para>Tests for various hardware subsystems are provided, and some tests require
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diff changeset
2791 special hardware in order to execute normally. The Ethernet Configuration
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diff changeset
2792 item may be used to set the board ethernet address.</para>
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diff changeset
2793 </sect2>
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diff changeset
2794 <sect2>
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2795 <title>Rebuilding RedBoot </title>
210
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diff changeset
2796
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diff changeset
2797 <para>These shell variables provide the platform-specific information
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diff changeset
2798 needed for building RedBoot according to the procedure described in
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diff changeset
2799 <xref linkend="Rebuilding-Redboot">:
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diff changeset
2800 <programlisting>
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diff changeset
2801 export TARGET=iq80310
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diff changeset
2802 export ARCH_DIR=arm
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diff changeset
2803 export PLATFORM_DIR=iq80310
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2804 </programlisting>
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2805 </para>
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2806
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diff changeset
2807 <para>The names of configuration files are listed above with the
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diff changeset
2808 description of the associated modes.</para>
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diff changeset
2809
208
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2810 </sect2>
210
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diff changeset
2811
208
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2812 <sect2>
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2813 <title>Interrupts</title>
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diff changeset
2814 <para>RedBoot uses an interrupt vector table which is located at address 0xA000A004.
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diff changeset
2815 Entries in this table are pointers to functions with this protoype:: <programlisting>
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diff changeset
2816 int irq_handler( unsigned vector, unsigned data )</programlisting>On an IQ80310
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diff changeset
2817 board, the vector argument is one of 49 interrupts defined in <computeroutput>
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diff changeset
2818 hal/arm/iq80310/current/include/hal_platform_ints.h:</computeroutput>: <programlisting>
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diff changeset
2819 // *** 80200 CPU ***
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diff changeset
2820 #define CYGNUM_HAL_INTERRUPT_reserved0 0
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diff changeset
2821 #define CYGNUM_HAL_INTERRUPT_PMU_PMN0_OVFL 1 // See Ch.12 - Performance Mon.
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diff changeset
2822 #define CYGNUM_HAL_INTERRUPT_PMU_PMN1_OVFL 2 // PMU counter 0/1 overflow
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diff changeset
2823 #define CYGNUM_HAL_INTERRUPT_PMU_CCNT_OVFL 3 // PMU clock overflow
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diff changeset
2824 #define CYGNUM_HAL_INTERRUPT_BCU_INTERRUPT 4 // See Ch.11 - Bus Control Unit
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diff changeset
2825 #define CYGNUM_HAL_INTERRUPT_NIRQ 5 // external IRQ
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diff changeset
2826 #define CYGNUM_HAL_INTERRUPT_NFIQ 6 // external FIQ
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2827
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2828
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2829 // *** XINT6 interrupts ***
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diff changeset
2830 #define CYGNUM_HAL_INTERRUPT_DMA_0 7
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2831 #define CYGNUM_HAL_INTERRUPT_DMA_1 8
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2832 #define CYGNUM_HAL_INTERRUPT_DMA_2 9
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2833 #define CYGNUM_HAL_INTERRUPT_GTSC 10 // Global Time Stamp Counter
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2834 #define CYGNUM_HAL_INTERRUPT_PEC 11 // Performance Event Counter
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diff changeset
2835 #define CYGNUM_HAL_INTERRUPT_AAIP 12 // application accelerator unit
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2836
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2837
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2838 // *** XINT7 interrupts ***
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diff changeset
2839 // I2C interrupts
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2840 #define CYGNUM_HAL_INTERRUPT_I2C_TX_EMPTY 13
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2841 #define CYGNUM_HAL_INTERRUPT_I2C_RX_FULL 14
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2842 #define CYGNUM_HAL_INTERRUPT_I2C_BUS_ERR 15
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2843 #define CYGNUM_HAL_INTERRUPT_I2C_STOP 16
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2844 #define CYGNUM_HAL_INTERRUPT_I2C_LOSS 17
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diff changeset
2845 #define CYGNUM_HAL_INTERRUPT_I2C_ADDRESS 18
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2846
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2847
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2848 // Messaging Unit interrupts
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diff changeset
2849 #define CYGNUM_HAL_INTERRUPT_MESSAGE_0 19
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diff changeset
2850 #define CYGNUM_HAL_INTERRUPT_MESSAGE_1 20
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2851 #define CYGNUM_HAL_INTERRUPT_DOORBELL 21
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2852 #define CYGNUM_HAL_INTERRUPT_NMI_DOORBELL 22
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diff changeset
2853 #define CYGNUM_HAL_INTERRUPT_QUEUE_POST 23
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diff changeset
2854 #define CYGNUM_HAL_INTERRUPT_OUTBOUND_QUEUE_FULL 24
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diff changeset
2855 #define CYGNUM_HAL_INTERRUPT_INDEX_REGISTER 25
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2856 // PCI Address Translation Unit
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diff changeset
2857 #define CYGNUM_HAL_INTERRUPT_BIST 26
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diff changeset
2858
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2859
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diff changeset
2860 // *** External board interrupts (XINT3) ***
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diff changeset
2861 #define CYGNUM_HAL_INTERRUPT_TIMER 27 // external timer
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2862 #define CYGNUM_HAL_INTERRUPT_ETHERNET 28 // onboard enet
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diff changeset
2863 #define CYGNUM_HAL_INTERRUPT_SERIAL_A 29 // 16x50 uart A
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jlarmour
parents:
diff changeset
2864 #define CYGNUM_HAL_INTERRUPT_SERIAL_B 30 // 16x50 uart B
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jlarmour
parents:
diff changeset
2865 #define CYGNUM_HAL_INTERRUPT_PCI_S_INTD 31 // secondary PCI INTD
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jlarmour
parents:
diff changeset
2866 // The hardware doesn't (yet?) provide masking or status for these
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jlarmour
parents:
diff changeset
2867 // even though they can trigger cpu interrupts. ISRs will need to
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jlarmour
parents:
diff changeset
2868 // poll the device to see if the device actually triggered the
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jlarmour
parents:
diff changeset
2869 // interrupt.
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jlarmour
parents:
diff changeset
2870 #define CYGNUM_HAL_INTERRUPT_PCI_S_INTC 32 // secondary PCI INTC
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jlarmour
parents:
diff changeset
2871 #define CYGNUM_HAL_INTERRUPT_PCI_S_INTB 33 // secondary PCI INTB
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jlarmour
parents:
diff changeset
2872 #define CYGNUM_HAL_INTERRUPT_PCI_S_INTA 34 // secondary PCI INTA
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jlarmour
parents:
diff changeset
2873
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parents:
diff changeset
2874
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jlarmour
parents:
diff changeset
2875 // *** NMI Interrupts go to FIQ ***
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jlarmour
parents:
diff changeset
2876 #define CYGNUM_HAL_INTERRUPT_MCU_ERR 35
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jlarmour
parents:
diff changeset
2877 #define CYGNUM_HAL_INTERRUPT_PATU_ERR 36
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parents:
diff changeset
2878 #define CYGNUM_HAL_INTERRUPT_SATU_ERR 37
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parents:
diff changeset
2879 #define CYGNUM_HAL_INTERRUPT_PBDG_ERR 38
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jlarmour
parents:
diff changeset
2880 #define CYGNUM_HAL_INTERRUPT_SBDG_ERR 39
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jlarmour
parents:
diff changeset
2881 #define CYGNUM_HAL_INTERRUPT_DMA0_ERR 40
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parents:
diff changeset
2882 #define CYGNUM_HAL_INTERRUPT_DMA1_ERR 41
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parents:
diff changeset
2883 #define CYGNUM_HAL_INTERRUPT_DMA2_ERR 42
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parents:
diff changeset
2884 #define CYGNUM_HAL_INTERRUPT_MU_ERR 43
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jlarmour
parents:
diff changeset
2885 #define CYGNUM_HAL_INTERRUPT_reserved52 44
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parents:
diff changeset
2886 #define CYGNUM_HAL_INTERRUPT_AAU_ERR 45
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jlarmour
parents:
diff changeset
2887 #define CYGNUM_HAL_INTERRUPT_BIU_ERR 46
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jlarmour
parents:
diff changeset
2888
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parents:
diff changeset
2889
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jlarmour
parents:
diff changeset
2890 // *** ATU FIQ sources ***
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jlarmour
parents:
diff changeset
2891 #define CYGNUM_HAL_INTERRUPT_P_SERR 47
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diff changeset
2892 #define CYGNUM_HAL_INTERRUPT_S_SERR 48</programlisting>The data passed
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jlarmour
parents:
diff changeset
2893 to the ISR is pulled from a data table <computeroutput>(hal_interrupt_data)
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parents:
diff changeset
2894 </computeroutput> which immediately follows the interrupt vector table. With
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parents:
diff changeset
2895 49 interrupts, the data table starts at address 0xA000A0C8. </para>
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jlarmour
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diff changeset
2896 <para>An application may create a normal C function with the above prototype
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jlarmour
parents:
diff changeset
2897 to be an ISR. Just poke its address into the table at the correct index and
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jlarmour
parents:
diff changeset
2898 enable the interrupt at its source. The return value of the ISR is ignored
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jlarmour
parents:
diff changeset
2899 by RedBoot.</para>
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jlarmour
parents:
diff changeset
2900 </sect2>
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jlarmour
parents:
diff changeset
2901 <sect2>
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jlarmour
parents:
diff changeset
2902 <title>Memory Maps</title>
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diff changeset
2903 <para>The first level page table is located at 0xa0004000. Two second level
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parents:
diff changeset
2904 tables are also used. One second level table is located at 0xa0008000 and
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parents:
diff changeset
2905 maps the first 1MB of flash. The other second level table is at 0xa0008400,
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jlarmour
parents:
diff changeset
2906 and maps the first 1MB of SDRAM. <note><title>NOTE</title>
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parents:
diff changeset
2907 <para>The virtual memory maps in this section use a C and B column to indicate
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jlarmour
parents:
diff changeset
2908 whether or not the region is cached (C) or buffered (B).</para>
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parents:
diff changeset
2909 </note></para>
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parents:
diff changeset
2910 <para><programlisting>Physical Address Range Description
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jlarmour
parents:
diff changeset
2911 ----------------------- ----------------------------------
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parents:
diff changeset
2912 0x00000000 - 0x00000fff flash Memory
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jlarmour
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diff changeset
2913 0x00001000 - 0x00001fff 80312 Internal Registers
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jlarmour
parents:
diff changeset
2914 0x00002000 - 0x007fffff flash Memory
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jlarmour
parents:
diff changeset
2915 0x00800000 - 0x7fffffff PCI ATU Outbound Direct Window
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parents:
diff changeset
2916 0x80000000 - 0x83ffffff Primary PCI 32-bit Memory
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jlarmour
parents:
diff changeset
2917 0x84000000 - 0x87ffffff Primary PCI 64-bit Memory
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jlarmour
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diff changeset
2918 0x88000000 - 0x8bffffff Secondary PCI 32-bit Memory
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jlarmour
parents:
diff changeset
2919 0x8c000000 - 0x8fffffff Secondary PCI 64-bit Memory
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jlarmour
parents:
diff changeset
2920 0x90000000 - 0x9000ffff Primary PCI IO Space
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jlarmour
parents:
diff changeset
2921 0x90010000 - 0x9001ffff Secondary PCI IO Space
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jlarmour
parents:
diff changeset
2922 0x90020000 - 0x9fffffff Unused
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jlarmour
parents:
diff changeset
2923 0xa0000000 - 0xbfffffff SDRAM
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jlarmour
parents:
diff changeset
2924 0xc0000000 - 0xefffffff Unused
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jlarmour
parents:
diff changeset
2925 0xf0000000 - 0xffffffff 80200 Internal Registers
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jlarmour
parents:
diff changeset
2926
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jlarmour
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diff changeset
2927
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jlarmour
parents:
diff changeset
2928 Virtual Address Range C B Description
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jlarmour
parents:
diff changeset
2929 ----------------------- - - ----------------------------------
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diff changeset
2930 0x00000000 - 0x00000fff Y Y SDRAM
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diff changeset
2931 0x00001000 - 0x00001fff N N 80312 Internal Registers
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jlarmour
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diff changeset
2932 0x00002000 - 0x007fffff Y N flash Memory
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jlarmour
parents:
diff changeset
2933 0x00800000 - 0x7fffffff N N PCI ATU Outbound Direct Window
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jlarmour
parents:
diff changeset
2934 0x80000000 - 0x83ffffff N N Primary PCI 32-bit Memory
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jlarmour
parents:
diff changeset
2935 0x84000000 - 0x87ffffff N N Primary PCI 64-bit Memory
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jlarmour
parents:
diff changeset
2936 0x88000000 - 0x8bffffff N N Secondary PCI 32-bit Memory
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jlarmour
parents:
diff changeset
2937 0x8c000000 - 0x8fffffff N N Secondary PCI 64-bit Memory
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jlarmour
parents:
diff changeset
2938 0x90000000 - 0x9000ffff N N Primary PCI IO Space
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jlarmour
parents:
diff changeset
2939 0x90010000 - 0x9001ffff N N Secondary PCI IO Space
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jlarmour
parents:
diff changeset
2940 0xa0000000 - 0xbfffffff Y Y SDRAM
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jlarmour
parents:
diff changeset
2941 0xc0000000 - 0xcfffffff Y Y Cache Flush Region
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jlarmour
parents:
diff changeset
2942 0xd0000000 - 0xd0000fff Y N first 4k page of flash
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jlarmour
parents:
diff changeset
2943 0xf0000000 - 0xffffffff N N 80200 Internal Registers </programlisting></para>
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jlarmour
parents:
diff changeset
2944 </sect2>
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diff changeset
2945 <sect2>
210
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diff changeset
2946 <title>Platform Resource Usage</title>
208
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diff changeset
2947 <para>The external timer is used as a polled timer to provide timeout support
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jlarmour
parents:
diff changeset
2948 for networking and XModem file transfers.</para>
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jlarmour
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diff changeset
2949 </sect2></sect1>
210
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parents: 208
diff changeset
2950
208
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jlarmour
parents:
diff changeset
2951 <?Pub _newpage>
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jlarmour
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diff changeset
2952 <sect1 id="iq80321">
211
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diff changeset
2953 <title>ARM/Xscale Intel IQ80321</title>
208
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diff changeset
2954 <sect2>
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diff changeset
2955 <title>Overview</title>
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parents:
diff changeset
2956 <para><indexterm><primary>Intel IQ80321</primary><secondary>installing and
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jlarmour
parents:
diff changeset
2957 testing</secondary></indexterm><indexterm><primary>installing and testing
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parents:
diff changeset
2958 </primary><secondary>Intel IQ80321</secondary></indexterm>RedBoot supports
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jlarmour
parents:
diff changeset
2959 the serial port and the built-in ethernet port for communication and downloads.
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parents:
diff changeset
2960 The default serial port settings are 115200,8,N,1. RedBoot also supports flash
210
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parents: 208
diff changeset
2961 management for the onboard 8MB flash.</para>
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diff changeset
2962
211
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diff changeset
2963 <para>The following RedBoot configurations are supported:
210
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diff changeset
2964
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diff changeset
2965 <informaltable frame="all">
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diff changeset
2966 <tgroup cols="4" colsep="1" rowsep="1" align="left">
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diff changeset
2967 <thead>
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diff changeset
2968 <row>
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diff changeset
2969 <entry>Configuration</entry>
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diff changeset
2970 <entry>Mode</entry>
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diff changeset
2971 <entry>Description</entry>
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diff changeset
2972 <entry>File</entry>
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diff changeset
2973 </row>
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diff changeset
2974 </thead>
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diff changeset
2975 <tbody>
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diff changeset
2976 <row>
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diff changeset
2977 <entry>ROM</entry>
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diff changeset
2978 <entry>[ROM]</entry>
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diff changeset
2979 <entry>RedBoot running from the board's flash boot
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jlarmour
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diff changeset
2980 sector.</entry>
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diff changeset
2981 <entry>redboot_ROM.ecm</entry>
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diff changeset
2982 </row>
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parents: 208
diff changeset
2983 <row>
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parents: 208
diff changeset
2984 <entry>RAM</entry>
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diff changeset
2985 <entry>[RAM]</entry>
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diff changeset
2986 <entry>RedBoot running from RAM with RedBoot in the
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jlarmour
parents: 208
diff changeset
2987 flash boot sector.</entry>
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diff changeset
2988 <entry>redboot_RAM.ecm</entry>
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diff changeset
2989 </row>
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diff changeset
2990 </tbody>
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diff changeset
2991 </tgroup>
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diff changeset
2992 </informaltable>
208
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diff changeset
2993 </para>
210
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diff changeset
2994
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diff changeset
2995
208
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jlarmour
parents:
diff changeset
2996 </sect2>
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jlarmour
parents:
diff changeset
2997 <sect2>
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jlarmour
parents:
diff changeset
2998 <title>Initial Installation Method</title>
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jlarmour
parents:
diff changeset
2999 <para>The board manufacturer provides a DOS application which is capable of
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3000 programming the flash over the PCI bus, and this is required for initial installations
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3001 of RedBoot. Please see the board manual for information on using this utility.
210
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parents: 208
diff changeset
3002 In general, the process involves programming the ROM mode RedBoot
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jlarmour
parents: 208
diff changeset
3003 image to flash. RedBoot should be programmed to flash address
d2c90368aeef Merge from eCos master repository on 2002-05-23-21:39:14-BST
jlarmour
parents: 208
diff changeset
3004 0x00000000 using the DOS utility.
208
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jlarmour
parents:
diff changeset
3005 </para>
210
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jlarmour
parents: 208
diff changeset
3006
208
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parents:
diff changeset
3007 <para>After booting the initial installation of RedBoot, this warning may
211
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parents: 210
diff changeset
3008 be printed: <screen>flash configuration checksum error or invalid key
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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parents: 210
diff changeset
3009 </screen>This is normal, and indicates that the flash must be configured
208
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jlarmour
parents:
diff changeset
3010 for use by RedBoot. Even if the above message is not printed, it may be a
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3011 good idea to reinitialize the flash anyway. Do this with the <command>
211
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parents: 210
diff changeset
3012 fis</command> command: <screen>RedBoot> <userinput>fis init</userinput>
210
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jlarmour
parents: 208
diff changeset
3013 About to initialize [format] FLASH image system - continue (y/n)? <userinput>y</userinput>
208
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jlarmour
parents:
diff changeset
3014 *** Initialize FLASH Image System
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jlarmour
parents:
diff changeset
3015 Warning: device contents not erased, some blocks may not be usable
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3016 ... Unlock from 0xf07e0000-0xf0800000: .
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3017 ... Erase from 0xf07e0000-0xf0800000: .
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3018 ... Program from 0x01ddf000-0x01ddf400 at 0xf07e0000: .
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3019 ... Lock from 0xf07e0000-0xf0800000: .
211
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parents: 210
diff changeset
3020 </screen></para></sect2>
208
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jlarmour
parents:
diff changeset
3021 <sect2>
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jlarmour
parents:
diff changeset
3022 <title>Switch Settings</title>
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jlarmour
parents:
diff changeset
3023 <para>The 80321 board is highly configurable through a number of switches and jumpers.
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3024 RedBoot makes some assumptions about board configuration and attention must be paid
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3025 to these assumptions for reliable RedBoot operation:
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3026 <itemizedlist>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3027 <listitem><para>The onboard ethernet and the secondary slot may be placed in a
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3028 private space so that they are not seen by a PC BIOS. If the board is to be used
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3029 in a PC with BIOS, then the ethernet should be placed in this private space so that
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3030 RedBoot and the BIOS do not conflict.
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3031 </para></listitem>
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jlarmour
parents:
diff changeset
3032 <listitem><para>RedBoot assumes that the board is plugged into a PC with BIOS. This
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3033 requires RedBoot to detect when the BIOS has configured the PCI-X secondary bus. If
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3034 the board is placed in a backplane, RedBoot will never see the BIOS configure the
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3035 secondary bus. To prevent this wait, set switch S7E1-3 to ON when using the board
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3036 in a backplane.</para></listitem>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3037 <listitem><para>For the remaining switch settings, the following is a known good
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3038 configuration:
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3039 <informaltable frame=all>
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jlarmour
parents:
diff changeset
3040 <tgroup cols=2>
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jlarmour
parents:
diff changeset
3041 <tbody>
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jlarmour
parents:
diff changeset
3042 <row><entry>S1D1</entry><entry>All OFF</entry></row>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3043 <row><entry>S7E1</entry><entry>7 is ON, all others OFF</entry></row>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3044 <row><entry>S8E1</entry><entry>2,3,5,6 are ON, all others OFF</entry></row>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3045 <row><entry>S8E2</entry><entry>2,3 are ON, all others OFF</entry></row>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3046 <row><entry>S9E1</entry><entry>3 is ON, all others OFF</entry></row>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3047 <row><entry>S4D1</entry><entry>1,3 are ON, all others OFF</entry></row>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3048 <row><entry>J9E1</entry><entry>2,3 jumpered</entry></row>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3049 <row><entry>J9F1</entry><entry>2,3 jumpered</entry></row>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3050 <row><entry>J3F1</entry><entry>Nothing jumpered</entry></row>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3051 <row><entry>J3G1</entry><entry>2,3 jumpered</entry></row>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3052 <row><entry>J1G2</entry><entry>2,3 jumpered</entry></row>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3053 </tbody></tgroup></informaltable></para></listitem>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3054 </itemizedlist>
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jlarmour
parents:
diff changeset
3055 </para>
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jlarmour
parents:
diff changeset
3056 </sect2>
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jlarmour
parents:
diff changeset
3057 <sect2>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3058 <title>LED Codes</title>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3059 <para>RedBoot uses the two digit LED display to indicate status during board
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3060 initialization. Possible codes are:</para>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3061
211
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jlarmour
parents: 210
diff changeset
3062 <literallayout width=72>
208
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jlarmour
parents:
diff changeset
3063 LED Actions
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jlarmour
parents:
diff changeset
3064 -------------------------------------------------------------
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jlarmour
parents:
diff changeset
3065 Power-On/Reset
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jlarmour
parents:
diff changeset
3066 88
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3067 Set the CPSR
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3068 Enable coprocessor access
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3069 Drain write and fill buffer
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jlarmour
parents:
diff changeset
3070 Setup PBIU chip selects
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jlarmour
parents:
diff changeset
3071 A1
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jlarmour
parents:
diff changeset
3072 Enable the Icache
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jlarmour
parents:
diff changeset
3073 A2
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3074 Move FLASH chip select from 0x0 to 0xF0000000
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3075 Jump to new FLASH location
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3076 A3
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3077 Setup and enable the MMU
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jlarmour
parents:
diff changeset
3078 A4
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3079 I2C interface initialization
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3080 90
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3081 Wait for I2C initialization to complete
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3082 91
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3083 Send address (via I2C) to the DIMM
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3084 92
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3085 Wait for transmit complete
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3086 93
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3087 Read SDRAM PD data from DIMM
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3088 94
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3089 Read remainder of EEPROM data.
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3090 An error will result in one of the following
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3091 error codes on the LEDs:
211
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jlarmour
parents: 210
diff changeset
3092 77 BAD EEPROM checksum
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
3093 55 I2C protocol error
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
3094 FF bank size error
208
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3095 A5
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3096 Setup DDR memory interface
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jlarmour
parents:
diff changeset
3097 A6
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3098 Enable branch target buffer
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3099 Drain the write & fill buffers
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jlarmour
parents:
diff changeset
3100 Flush Icache, Dcache and BTB
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3101 Flush instuction and data TLBs
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3102 Drain the write & fill buffers
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jlarmour
parents:
diff changeset
3103 SL
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3104 ECC Scrub Loop
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jlarmour
parents:
diff changeset
3105 SE
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jlarmour
parents:
diff changeset
3106 A7
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3107 Clean, drain, flush the main Dcache
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3108 A8
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3109 Clean, drain, flush the mini Dcache
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3110 Flush Dcache
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jlarmour
parents:
diff changeset
3111 Drain the write & fill buffers
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3112 A9
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3113 Enable ECC
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jlarmour
parents:
diff changeset
3114 AA
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3115 Save SDRAM size
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3116 Move MMU tables into RAM
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3117 AB
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3118 Clean, drain, flush the main Dcache
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3119 Clean, drain, flush the mini Dcache
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3120 Drain the write & fill buffers
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3121 AC
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3122 Set the TTB register to DRAM mmu_table
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3123 AD
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3124 Set mode to IRQ mode
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jlarmour
parents:
diff changeset
3125 A7
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3126 Move SWI & Undefined "vectors" to RAM (at 0x0)
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3127 A6
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3128 Switch to supervisor mode
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3129 A5
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3130 Move remaining "vectors" to RAM (at 0x0)
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3131 A4
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3132 Copy DATA to RAM
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jlarmour
parents:
diff changeset
3133 Initialize interrupt exception environment
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jlarmour
parents:
diff changeset
3134 Initialize stack
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jlarmour
parents:
diff changeset
3135 Clear BSS section
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jlarmour
parents:
diff changeset
3136 A3
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jlarmour
parents:
diff changeset
3137 Call platform specific hardware initialization
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jlarmour
parents:
diff changeset
3138 A2
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jlarmour
parents:
diff changeset
3139 Run through static constructors
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jlarmour
parents:
diff changeset
3140 A1
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jlarmour
parents:
diff changeset
3141 Start up the eCos kernel or RedBoot
211
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jlarmour
parents: 210
diff changeset
3142 </literallayout>
208
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jlarmour
parents:
diff changeset
3143 </sect2>
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jlarmour
parents:
diff changeset
3144 <sect2>
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jlarmour
parents:
diff changeset
3145 <title>Special RedBoot Commands </title>
210
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parents: 208
diff changeset
3146 <para>A special RedBoot command, <command>diag</command>, is used to
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jlarmour
parents: 208
diff changeset
3147 access a set of hardware diagnostics. To access the diagnostic menu,
d2c90368aeef Merge from eCos master repository on 2002-05-23-21:39:14-BST
jlarmour
parents: 208
diff changeset
3148 enter <command>diag</command> at the RedBoot prompt:
211
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parents: 210
diff changeset
3149 <screen>
208
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jlarmour
parents:
diff changeset
3150 RedBoot> <userinput>diag</userinput>
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jlarmour
parents:
diff changeset
3151 Entering Hardware Diagnostics - Disabling Data Cache!
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3152
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jlarmour
parents:
diff changeset
3153 IQ80321 Hardware Tests
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jlarmour
parents:
diff changeset
3154
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jlarmour
parents:
diff changeset
3155 1 - Memory Tests
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jlarmour
parents:
diff changeset
3156 2 - Repeating Memory Tests
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jlarmour
parents:
diff changeset
3157 3 - Repeat-On-Fail Memory Tests
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3158 4 - Rotary Switch S1 Test
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3159 5 - 7 Segment LED Tests
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jlarmour
parents:
diff changeset
3160 6 - i82544 Ethernet Configuration
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jlarmour
parents:
diff changeset
3161 7 - Baterry Status Test
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jlarmour
parents:
diff changeset
3162 8 - Battery Backup SDRAM Memory Test
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jlarmour
parents:
diff changeset
3163 9 - Timer Test
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3164 10 - PCI Bus test
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jlarmour
parents:
diff changeset
3165 11 - CPU Cache Loop (No Return)
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jlarmour
parents:
diff changeset
3166 0 - quit
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jlarmour
parents:
diff changeset
3167 Enter the menu item number (0 to quit):
211
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parents: 210
diff changeset
3168 </screen>
208
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jlarmour
parents:
diff changeset
3169 Tests for various hardware subsystems are provided, and some tests require
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3170 special hardware in order to execute normally. The Ethernet Configuration
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3171 item may be used to set the board ethernet address.</para>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3172 <sect3>
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jlarmour
parents:
diff changeset
3173 <title>Memory Tests</title>
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jlarmour
parents:
diff changeset
3174 <para>This test is used to test installed DDR SDRAM memory. Five different
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3175 tests are run over the given address ranges. If errors are encountered, the
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3176 test is aborted and information about the failure is printed. When selected,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3177 the user will be prompted to enter the base address of the test range and its
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3178 size. The numbers must be in hex with no leading &ldquo;0x&rdquo;
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3179 </para>
211
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jlarmour
parents: 210
diff changeset
3180 <screen>
210
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jlarmour
parents: 208
diff changeset
3181 Enter the menu item number (0 to quit): <userinput>1</userinput>
d2c90368aeef Merge from eCos master repository on 2002-05-23-21:39:14-BST
jlarmour
parents: 208
diff changeset
3182
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jlarmour
parents: 208
diff changeset
3183 Base address of memory to test (in hex): <userinput>100000</userinput>
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jlarmour
parents: 208
diff changeset
3184
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jlarmour
parents: 208
diff changeset
3185 Size of memory to test (in hex): <userinput>200000</userinput>
208
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jlarmour
parents:
diff changeset
3186
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jlarmour
parents:
diff changeset
3187 Testing memory from 0x00100000 to 0x002fffff.
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3188
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jlarmour
parents:
diff changeset
3189 Walking 1's test:
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3190 0000000100000002000000040000000800000010000000200000004000000080
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3191 0000010000000200000004000000080000001000000020000000400000008000
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3192 0001000000020000000400000008000000100000002000000040000000800000
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3193 0100000002000000040000000800000010000000200000004000000080000000
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3194 passed
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3195 32-bit address test: passed
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3196 32-bit address bar test: passed
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3197 8-bit address test: passed
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3198 Byte address bar test: passed
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3199 Memory test done.
211
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parents: 210
diff changeset
3200 </screen>
208
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jlarmour
parents:
diff changeset
3201 </sect3>
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jlarmour
parents:
diff changeset
3202 <sect3>
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jlarmour
parents:
diff changeset
3203 <title>Repeating Memory Tests</title>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3204 <para>The repeating memory tests are exactly the same as the above memory tests,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3205 except that the tests are automatically rerun after completion. The only way out
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3206 of this test is to reset the board.
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3207 </para>
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jlarmour
parents:
diff changeset
3208 </sect3>
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jlarmour
parents:
diff changeset
3209 <sect3>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3210 <title>Repeat-On-Fail Memory Tests</title>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3211 <para>This is similar to the repeating memory tests except that when an error
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3212 is found, the failing test continuously retries on the failing address.
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3213 </para>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3214 </sect3>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3215 <sect3>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3216 <title>Rotary Switch S1 Test</title>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3217 <para>This tests the operation of the sixteen position rotary switch. When run,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3218 this test will display the current position of the rotary switch on the LED
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3219 display. Slowly dial through each position and confirm reading on LED.
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3220 </para>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3221 </sect3>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3222 <sect3>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3223 <title>7 Segment LED Tests</title>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3224 <para>This tests the operation of the seven segment displays. When run, each
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3225 LED cycles through 0 through F and a decimal point.
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3226 </para>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3227 </sect3>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3228 <sect3>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3229 <title>i82544 Ethernet Configuration</title>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3230 <para>This test initializes the ethernet controller&rsquo;s serial EEPROM if
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3231 the current contents are invalid. In any case, this test will also allow the
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3232 user to enter a six byte ethernet MAC address into the serial EEPROM.
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3233 </para>
211
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jlarmour
parents: 210
diff changeset
3234 <screen>
210
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jlarmour
parents: 208
diff changeset
3235 Enter the menu item number (0 to quit): <userinput>6</userinput>
208
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jlarmour
parents:
diff changeset
3236
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3237
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3238 Current MAC address: 00:80:4d:46:00:02
210
d2c90368aeef Merge from eCos master repository on 2002-05-23-21:39:14-BST
jlarmour
parents: 208
diff changeset
3239 Enter desired MAC address: <userinput>00:80:4d:46:00:01</userinput>
208
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3240 Writing to the Serial EEPROM... Done
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3241
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3242 ******** Reset The Board To Have Changes Take Effect ********
211
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jlarmour
parents: 210
diff changeset
3243 </screen>
208
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jlarmour
parents:
diff changeset
3244 </sect3>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3245 <sect3>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3246 <title>Battery Status Test</title>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3247 <para>This tests the current status of the battery. First, the test checks to
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3248 see if the battery is installed and reports that finding. If the battery is
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3249 installed, the test further determines whether the battery status is one or
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3250 more of the following:
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3251 <itemizedlist>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3252 <listitem><para>Battery is charging.</para></listitem>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3253 <listitem><para>Battery is fully discharged.</para></listitem>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3254 <listitem><para>Battery voltage measures within normal operating range.
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3255 </para></listitem>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3256 </itemizedlist>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3257 </para>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3258 </sect3>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3259 <sect3>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3260 <title>Battery Backup SDRAM Memory Test</title>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3261 <para>This tests the battery backup of SDRAM memory. This test is a three
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3262 step process:</para>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3263 <orderedlist>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3264 <listitem><para>Select Battery backup test from main diag menu, then write
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3265 data to SDRAM.</para></listitem>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3266 <listitem><para>Turn off power for 60 seconds, then repower the board.
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3267 </para></listitem>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3268 <listitem><para>Select Battery backup test from main diag menu, then check
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3269 data that was written in step 1.
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3270 </para></listitem>
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jlarmour
parents:
diff changeset
3271 </orderedlist>
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jlarmour
parents:
diff changeset
3272 </sect3>
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jlarmour
parents:
diff changeset
3273 <sect3>
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jlarmour
parents:
diff changeset
3274 <title>Timer Test</title>
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diff changeset
3275 <para>This tests the internal timer by printing a number of dots at one
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jlarmour
parents:
diff changeset
3276 second intervals.</para>
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jlarmour
parents:
diff changeset
3277 </sect3>
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jlarmour
parents:
diff changeset
3278 <sect3>
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jlarmour
parents:
diff changeset
3279 <title>PCI Bus Test</title>
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jlarmour
parents:
diff changeset
3280 <para>This tests the secondary PCI-X bus and socket. This test requires that
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3281 an IQ80310 board be plugged into the secondary slot of the IOP80321 board.
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jlarmour
parents:
diff changeset
3282 The test assumes at least 32MB of installed memory on the IQ80310. That memory
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jlarmour
parents:
diff changeset
3283 is mapped into the IOP80321 address space and the memory tests are run on that
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parents:
diff changeset
3284 memory.
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jlarmour
parents:
diff changeset
3285 </para>
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jlarmour
parents:
diff changeset
3286 </sect3>
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jlarmour
parents:
diff changeset
3287 <sect3>
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jlarmour
parents:
diff changeset
3288 <title>CPU Cache Loop</title>
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diff changeset
3289 <para>This test puts the CPU into a tight loop run entirely from the ICache.
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jlarmour
parents:
diff changeset
3290 This should prevent all external bus accesses.
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jlarmour
parents:
diff changeset
3291 </para>
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jlarmour
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diff changeset
3292 </sect3>
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jlarmour
parents:
diff changeset
3293 </sect2>
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jlarmour
parents:
diff changeset
3294 <sect2>
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jlarmour
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diff changeset
3295 <title>Rebuilding RedBoot </title>
210
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parents: 208
diff changeset
3296
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parents: 208
diff changeset
3297 <para>These shell variables provide the platform-specific information
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parents: 208
diff changeset
3298 needed for building RedBoot according to the procedure described in
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parents: 208
diff changeset
3299 <xref linkend="Rebuilding-Redboot">:
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parents: 208
diff changeset
3300 <programlisting>
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parents: 208
diff changeset
3301 export TARGET=iq80321
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diff changeset
3302 export ARCH_DIR=arm
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diff changeset
3303 export PLATFORM_DIR=xscale/iq80321
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diff changeset
3304 </programlisting>
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parents: 208
diff changeset
3305 </para>
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parents: 208
diff changeset
3306
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parents: 208
diff changeset
3307 <para>The names of configuration files are listed above with the
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parents: 208
diff changeset
3308 description of the associated modes.</para>
208
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diff changeset
3309 </sect2>
210
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jlarmour
parents: 208
diff changeset
3310
208
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jlarmour
parents:
diff changeset
3311 <sect2>
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diff changeset
3312 <title>Interrupts</title>
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diff changeset
3313 <para>RedBoot uses an interrupt vector table which is located at address 0x8004.
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jlarmour
parents:
diff changeset
3314 Entries in this table are pointers to functions with this protoype:: <programlisting>
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jlarmour
parents:
diff changeset
3315 int irq_handler( unsigned vector, unsigned data )</programlisting>On an IQ80321
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jlarmour
parents:
diff changeset
3316 board, the vector argument is one of 32 interrupts defined in <computeroutput>
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jlarmour
parents:
diff changeset
3317 hal/arm/xscale/verde/current/include/hal_var_ints.h:</computeroutput>: <programlisting>
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jlarmour
parents:
diff changeset
3318 // *** 80200 CPU ***
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diff changeset
3319 #define CYGNUM_HAL_INTERRUPT_DMA0_EOT 0
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parents:
diff changeset
3320 #define CYGNUM_HAL_INTERRUPT_DMA0_EOC 1
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jlarmour
parents:
diff changeset
3321 #define CYGNUM_HAL_INTERRUPT_DMA1_EOT 2
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jlarmour
parents:
diff changeset
3322 #define CYGNUM_HAL_INTERRUPT_DMA1_EOC 3
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jlarmour
parents:
diff changeset
3323 #define CYGNUM_HAL_INTERRUPT_RSVD_4 4
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jlarmour
parents:
diff changeset
3324 #define CYGNUM_HAL_INTERRUPT_RSVD_5 5
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jlarmour
parents:
diff changeset
3325 #define CYGNUM_HAL_INTERRUPT_AA_EOT 6
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parents:
diff changeset
3326 #define CYGNUM_HAL_INTERRUPT_AA_EOC 7
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parents:
diff changeset
3327 #define CYGNUM_HAL_INTERRUPT_CORE_PMON 8
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parents:
diff changeset
3328 #define CYGNUM_HAL_INTERRUPT_TIMER0 9
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parents:
diff changeset
3329 #define CYGNUM_HAL_INTERRUPT_TIMER1 10
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jlarmour
parents:
diff changeset
3330 #define CYGNUM_HAL_INTERRUPT_I2C_0 11
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jlarmour
parents:
diff changeset
3331 #define CYGNUM_HAL_INTERRUPT_I2C_1 12
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parents:
diff changeset
3332 #define CYGNUM_HAL_INTERRUPT_MESSAGING 13
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parents:
diff changeset
3333 #define CYGNUM_HAL_INTERRUPT_ATU_BIST 14
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jlarmour
parents:
diff changeset
3334 #define CYGNUM_HAL_INTERRUPT_PERFMON 15
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parents:
diff changeset
3335 #define CYGNUM_HAL_INTERRUPT_CORE_PMU 16
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parents:
diff changeset
3336 #define CYGNUM_HAL_INTERRUPT_BIU_ERR 17
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parents:
diff changeset
3337 #define CYGNUM_HAL_INTERRUPT_ATU_ERR 18
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parents:
diff changeset
3338 #define CYGNUM_HAL_INTERRUPT_MCU_ERR 19
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jlarmour
parents:
diff changeset
3339 #define CYGNUM_HAL_INTERRUPT_DMA0_ERR 20
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parents:
diff changeset
3340 #define CYGNUM_HAL_INTERRUPT_DMA1_ERR 22
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parents:
diff changeset
3341 #define CYGNUM_HAL_INTERRUPT_AA_ERR 23
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jlarmour
parents:
diff changeset
3342 #define CYGNUM_HAL_INTERRUPT_MSG_ERR 24
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jlarmour
parents:
diff changeset
3343 #define CYGNUM_HAL_INTERRUPT_SSP 25
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diff changeset
3344 #define CYGNUM_HAL_INTERRUPT_RSVD_26 26
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diff changeset
3345 #define CYGNUM_HAL_INTERRUPT_XINT0 27
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diff changeset
3346 #define CYGNUM_HAL_INTERRUPT_XINT1 28
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diff changeset
3347 #define CYGNUM_HAL_INTERRUPT_XINT2 29
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jlarmour
parents:
diff changeset
3348 #define CYGNUM_HAL_INTERRUPT_XINT3 30
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jlarmour
parents:
diff changeset
3349 #define CYGNUM_HAL_INTERRUPT_HPI 31
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jlarmour
parents:
diff changeset
3350 </programlisting>
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jlarmour
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diff changeset
3351 The data passed to the ISR is pulled from a data table <computeroutput>(hal_interrupt_data)
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jlarmour
parents:
diff changeset
3352 </computeroutput> which immediately follows the interrupt vector table. With
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3353 32 interrupts, the data table starts at address 0x8084. </para>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3354 <para>An application may create a normal C function with the above prototype
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3355 to be an ISR. Just poke its address into the table at the correct index and
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3356 enable the interrupt at its source. The return value of the ISR is ignored
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3357 by RedBoot.</para>
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jlarmour
parents:
diff changeset
3358 </sect2>
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jlarmour
parents:
diff changeset
3359 <sect2>
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jlarmour
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diff changeset
3360 <title>Memory Maps</title>
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jlarmour
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diff changeset
3361 <para>The RAM based page table is located at RAM start + 0x4000. RedBoot may be configured
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3362 for one of two memory maps. The difference between them is the location of RAM and the
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3363 PCI outbound windows. The alternative memory map may be used when
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3364 building RedBoot or eCos by using the <literal>RAM_ALTMAP</literal>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3365 and <literal>ROM_ALTMAP</literal> startup types in the configuration.
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jlarmour
parents:
diff changeset
3366 <note><title>NOTE</title>
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diff changeset
3367 <para>The virtual memory maps in this section use a C, B, and X column to indicate
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3368 the caching policy for the region..</para>
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jlarmour
parents:
diff changeset
3369 </note></para>
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jlarmour
parents:
diff changeset
3370 <para><programlisting>
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jlarmour
parents:
diff changeset
3371 X C B Description
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jlarmour
parents:
diff changeset
3372 - - - ---------------------------------------------
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jlarmour
parents:
diff changeset
3373 0 0 0 Uncached/Unbuffered
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jlarmour
parents:
diff changeset
3374 0 0 1 Uncached/Buffered
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jlarmour
parents:
diff changeset
3375 0 1 0 Cached/Buffered Write Through, Read Allocate
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jlarmour
parents:
diff changeset
3376 0 1 1 Cached/Buffered Write Back, Read Allocate
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jlarmour
parents:
diff changeset
3377 1 0 0 Invalid -- not used
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jlarmour
parents:
diff changeset
3378 1 0 1 Uncached/Buffered No write buffer coalescing
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jlarmour
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diff changeset
3379 1 1 0 Mini DCache - Policy set by Aux Ctl Register
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parents:
diff changeset
3380 1 1 1 Cached/Buffered Write Back, Read/Write Allocate
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jlarmour
parents:
diff changeset
3381
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jlarmour
parents:
diff changeset
3382 Physical Address Range Description
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jlarmour
parents:
diff changeset
3383 ----------------------- ----------------------------------
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diff changeset
3384 0x00000000 - 0x7fffffff ATU Outbound Direct Window
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
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parents:
diff changeset
3385 0x80000000 - 0x900fffff ATU Outbound Translate Windows
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jlarmour
parents:
diff changeset
3386 0xa0000000 - 0xbfffffff SDRAM
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jlarmour
parents:
diff changeset
3387 0xf0000000 - 0xf0800000 FLASH (PBIU CS0)
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3388 0xfe800000 - 0xfe800fff UART (PBIU CS1)
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3389 0xfe840000 - 0xfe840fff Left 7-segment LED (PBIU CS3)
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jlarmour
parents:
diff changeset
3390 0xfe850000 - 0xfe850fff Right 7-segment LED (PBIU CS2)
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jlarmour
parents:
diff changeset
3391 0xfe8d0000 - 0xfe8d0fff Rotary Switch (PBIU CS4)
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3392 0xfe8f0000 - 0xfe8f0fff Baterry Status (PBIU CS5)
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3393 0xfff00000 - 0xffffffff Verde Memory mapped Registers
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jlarmour
parents:
diff changeset
3394
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diff changeset
3395
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jlarmour
parents:
diff changeset
3396 Default Virtual Map X C B Description
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jlarmour
parents:
diff changeset
3397 ----------------------- - - - ----------------------------------
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jlarmour
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diff changeset
3398 0x00000000 - 0x1fffffff 1 1 1 SDRAM
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3399 0x20000000 - 0x9fffffff 0 0 0 ATU Outbound Direct Window
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
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parents:
diff changeset
3400 0xa0000000 - 0xb00fffff 0 0 0 ATU Outbound Translate Windows
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jlarmour
parents:
diff changeset
3401 0xc0000000 - 0xdfffffff 0 0 0 Uncached alias for SDRAM
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diff changeset
3402 0xe0000000 - 0xe00fffff 1 1 1 Cache flush region (no phys mem)
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diff changeset
3403 0xf0000000 - 0xf0800000 0 1 0 FLASH (PBIU CS0)
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diff changeset
3404 0xfe800000 - 0xfe800fff 0 0 0 UART (PBIU CS1)
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diff changeset
3405 0xfe840000 - 0xfe840fff 0 0 0 Left 7-segment LED (PBIU CS3)
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diff changeset
3406 0xfe850000 - 0xfe850fff 0 0 0 Right 7-segment LED (PBIU CS2)
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diff changeset
3407 0xfe8d0000 - 0xfe8d0fff 0 0 0 Rotary Switch (PBIU CS4)
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diff changeset
3408 0xfe8f0000 - 0xfe8f0fff 0 0 0 Baterry Status (PBIU CS5)
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jlarmour
parents:
diff changeset
3409 0xfff00000 - 0xffffffff 0 0 0 Verde Memory mapped Registers
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diff changeset
3410
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diff changeset
3411 Alternate Virtual Map X C B Description
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jlarmour
parents:
diff changeset
3412 ----------------------- - - - ----------------------------------
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diff changeset
3413 0x00000000 - 0x000fffff 1 1 1 Alias for 1st MB of SDRAM
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parents:
diff changeset
3414 0x00100000 - 0x7fffffff 0 0 0 ATU Outbound Direct Window
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parents:
diff changeset
3415 0x80000000 - 0x900fffff 0 0 0 ATU Outbound Translate Windows
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parents:
diff changeset
3416 0xa0000000 - 0xbfffffff 1 1 1 SDRAM
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parents:
diff changeset
3417 0xc0000000 - 0xdfffffff 0 0 0 Uncached alias for SDRAM
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parents:
diff changeset
3418 0xe0000000 - 0xe00fffff 1 1 1 Cache flush region (no phys mem)
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parents:
diff changeset
3419 0xf0000000 - 0xf0800000 0 1 0 FLASH (PBIU CS0)
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parents:
diff changeset
3420 0xfe800000 - 0xfe800fff 0 0 0 UART (PBIU CS1)
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parents:
diff changeset
3421 0xfe840000 - 0xfe840fff 0 0 0 Left 7-segment LED (PBIU CS3)
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parents:
diff changeset
3422 0xfe850000 - 0xfe850fff 0 0 0 Right 7-segment LED (PBIU CS2)
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diff changeset
3423 0xfe8d0000 - 0xfe8d0fff 0 0 0 Rotary Switch (PBIU CS4)
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diff changeset
3424 0xfe8f0000 - 0xfe8f0fff 0 0 0 Baterry Status (PBIU CS5)
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parents:
diff changeset
3425 0xfff00000 - 0xffffffff 0 0 0 Verde Memory mapped Registers
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parents:
diff changeset
3426
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diff changeset
3427 </programlisting></para>
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diff changeset
3428 </sect2>
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3429 <sect2>
210
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diff changeset
3430 <title>Platform Resource Usage</title>
208
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3431 <para>The Verde programmable timer0 is used for timeout support
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diff changeset
3432 for networking and XModem file transfers.</para>
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diff changeset
3433 </sect2></sect1>
211
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diff changeset
3434
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diff changeset
3435 <!-- ********************** CalmRISC ********************** -->
208
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diff changeset
3436 <?Pub _newpage>
211
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diff changeset
3437 <sect1 id="CalmRISC16">
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diff changeset
3438 <title>CalmRISC/CalmRISC16 Samsung CalmRISC16 Core Evaluation Board </title>
208
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3439 <sect2>
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diff changeset
3440 <title>Overview</title>
211
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diff changeset
3441 <para><indexterm><primary>Samsung CalmRISC16 Core EVB</primary><secondary>installing
208
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diff changeset
3442 and testing</secondary></indexterm><indexterm><primary>installing and testing
211
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3443 </primary><secondary>Samsung CalmRISC16 Core EVB</secondary></indexterm> The
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diff changeset
3444 Samsung CalmRISC16 evaluation platform consists of two boards connected by a
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diff changeset
3445 ribbon cable. One board contains the CPU core and memory. The other board is
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diff changeset
3446 called the MDSChip board and provides the host interface. The calmRISC16 is a
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diff changeset
3447 harvard architecture with separate 22-bit program and data addresses. The
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diff changeset
3448 instruction set provides no instruction for writing to program memory. The
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diff changeset
3449 MDSChip board firmware (called CalmBreaker) provides a pseudo register interface
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diff changeset
3450 so that code running on the core has access to a serial channel and a mechanism
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diff changeset
3451 to write to program memory. The serial channel is fixed at 57600-8-N-1 by the
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diff changeset
3452 firmware. The CalmBreaker firmware also provides a serial protocol which
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diff changeset
3453 allows a host to download a program and to start or stop the core board.</para>
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diff changeset
3454
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diff changeset
3455 <para>The following RedBoot configurations are supported:
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diff changeset
3456
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diff changeset
3457 <informaltable frame="all">
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diff changeset
3458 <tgroup cols="4" colsep="1" rowsep="1" align="left">
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diff changeset
3459 <thead>
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diff changeset
3460 <row>
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diff changeset
3461 <entry>Configuration</entry>
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diff changeset
3462 <entry>Mode</entry>
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diff changeset
3463 <entry>Description</entry>
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diff changeset
3464 <entry>File</entry>
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diff changeset
3465 </row>
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diff changeset
3466 </thead>
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diff changeset
3467 <tbody>
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diff changeset
3468 <row>
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diff changeset
3469 <entry>ROM</entry>
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diff changeset
3470 <entry>[ROM]</entry>
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diff changeset
3471 <entry>RedBoot running via the MDSChip board.</entry>
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diff changeset
3472 <entry>redboot_ROM.ecm</entry>
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diff changeset
3473 </row>
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diff changeset
3474 </tbody>
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diff changeset
3475 </tgroup>
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diff changeset
3476 </informaltable>
208
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3477 </para>
211
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diff changeset
3478
208
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parents:
diff changeset
3479 </sect2>
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diff changeset
3480 <sect2>
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3481 <title>Initial Installation Method </title>
211
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diff changeset
3482 <para>The CalmRISC16 core is controlled through the MDSChip board. There is
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diff changeset
3483 no non-volatile storage available for RedBoot, so RedBoot must be downloaded
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diff changeset
3484 to the board on every power cycle. A small utility program is used to download
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diff changeset
3485 S-record files to the eval board. Sources and build instructions for this
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diff changeset
3486 utility are located in the RedBoot sources in:
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diff changeset
3487 <filename class="directory">packages/hal/calmrisc16/ceb/current/support
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diff changeset
3488 </filename></para>
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diff changeset
3489 <para>To download the RedBoot image, first press the reset button on the MDSChip
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diff changeset
3490 board. The green 'Run' LED on the core board should go off. Now, use the
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diff changeset
3491 utility to download the RedBoot image with:
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diff changeset
3492 <screen>$ <userinput>calmbreaker -p /dev/term/b --reset --srec-code -f redboot.elf</userinput>
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diff changeset
3493 </screen>
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diff changeset
3494 Note that the '-p /dev/term/b' specifies the serial port to use and will vary
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diff changeset
3495 from system to system. The download will take about two minutes. After it
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diff changeset
3496 finishes, start RedBoot with:
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diff changeset
3497 <screen>$ <userinput>calmbreaker -p /dev/term/b --run</userinput></screen>
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diff changeset
3498 The 'Run' LED on the core board should be on. Connecting to the MDSboard with
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diff changeset
3499 a terminal and typing enter should result in RedBoot reprinting the command
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diff changeset
3500 prompt.
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diff changeset
3501 </para>
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diff changeset
3502 </sect2>
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diff changeset
3503 <sect2>
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diff changeset
3504 <title>Special RedBoot Commands </title>
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diff changeset
3505 <para>None.</para>
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diff changeset
3506 </sect2>
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diff changeset
3507 <sect2>
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diff changeset
3508 <title>Special Note on Serial Channel </title>
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diff changeset
3509 <para>The MDSChip board uses a relatively slow microcontroller to provide
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diff changeset
3510 the pseudo-register interface to the core board. This pseudo-register
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diff changeset
3511 interface provides access to the serial channel and write access to program
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diff changeset
3512 memory. Those interfaces are slow and the serial channel is easily overrun
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diff changeset
3513 by a fast host. For this reason, GDB must be told to limit the size of code
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diff changeset
3514 download packets to avoid serial overrun. This is done with the following
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diff changeset
3515 GDB command:
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diff changeset
3516 <screen>(gdb) <userinput>set download-write-size 25</userinput></screen>
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diff changeset
3517 </para>
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diff changeset
3518 </sect2>
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diff changeset
3519 <sect2>
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diff changeset
3520
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diff changeset
3521 <title>Rebuilding RedBoot</title>
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3522
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diff changeset
3523 <para>These shell variables provide the platform-specific information
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diff changeset
3524 needed for building RedBoot according to the procedure described in
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diff changeset
3525 <xref linkend="Rebuilding-Redboot">:
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diff changeset
3526 <programlisting>
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diff changeset
3527 export TARGET=calm16_ceb
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diff changeset
3528 export ARCH_DIR=calmrisc16
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3529 export PLATFORM_DIR=ceb
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diff changeset
3530 </programlisting>
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3531 </para>
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diff changeset
3532
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3533 <para>The names of configuration files are listed above with the
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3534 description of the associated modes.</para>
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3535
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3536 </sect2>
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3537 </sect1>
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3538
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diff changeset
3539 <?Pub _newpage>
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3540 <sect1 id="CalmRISC32">
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3541 <title>CalmRISC/CalmRISC32 Samsung CalmRISC32 Core Evaluation Board </title>
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3542 <sect2>
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3543 <title>Overview</title>
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3544 <para><indexterm><primary>Samsung CalmRISC32 Core EVB</primary><secondary>installing
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diff changeset
3545 and testing</secondary></indexterm><indexterm><primary>installing and testing
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3546 </primary><secondary>Samsung CalmRISC32 Core EVB</secondary></indexterm> The
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diff changeset
3547 Samsung CalmRISC32 evaluation platform consists of two boards connected by a
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diff changeset
3548 ribbon cable. One board contains the CPU core and memory. The other board is
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diff changeset
3549 called the MDSChip board and provides the host interface. The calmRISC32 is a
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diff changeset
3550 harvard architecture with separate 32-bit program and data addresses. The
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diff changeset
3551 instruction set provides no instruction for writing to program memory. The
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diff changeset
3552 MDSChip board firmware (called CalmBreaker) provides a pseudo register interface
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3553 so that code running on the core has access to a serial channel and a mechanism
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diff changeset
3554 to write to program memory. The serial channel is fixed at 57600-8-N-1 by the
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diff changeset
3555 firmware. The CalmBreaker firmware also provides a serial protocol which
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diff changeset
3556 allows a host to download a program and to start or stop the core board.</para>
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diff changeset
3557
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3558 <para>The following RedBoot configurations are supported:
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diff changeset
3559
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diff changeset
3560 <informaltable frame="all">
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diff changeset
3561 <tgroup cols="4" colsep="1" rowsep="1" align="left">
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diff changeset
3562 <thead>
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3563 <row>
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3564 <entry>Configuration</entry>
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3565 <entry>Mode</entry>
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3566 <entry>Description</entry>
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3567 <entry>File</entry>
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3568 </row>
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3569 </thead>
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diff changeset
3570 <tbody>
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diff changeset
3571 <row>
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diff changeset
3572 <entry>ROM</entry>
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diff changeset
3573 <entry>[ROM]</entry>
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3574 <entry>RedBoot running via the MDSChip board.</entry>
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diff changeset
3575 <entry>redboot_ROM.ecm</entry>
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diff changeset
3576 </row>
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diff changeset
3577 </tbody>
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3578 </tgroup>
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3579 </informaltable>
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3580 </para>
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3581
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diff changeset
3582 </sect2>
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diff changeset
3583 <sect2>
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diff changeset
3584 <title>Initial Installation Method </title>
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3585 <para>The calmRISC32 core is controlled through the MDSChip board. There is
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3586 no non-volatile storage available for RedBoot, so RedBoot must be downloaded
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3587 to the board on every power cycle. A small utility program is used to download
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3588 S-record files to the eval board. Sources and build instructions for this
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3589 utility are located in the RedBoot sources in:
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3590 <filename class="directory">packages/hal/calmrisc32/ceb/current/support
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3591 </filename></para>
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3592 <para>To download the RedBoot image, first press the reset button on the MDSChip
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3593 board. The green 'Run' LED on the core board should go off. Now, use the
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diff changeset
3594 utility to download the RedBoot image with:
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3595 <screen>$ <userinput>calmbreaker -p /dev/term/b --reset --srec-code -f redboot.elf</userinput>
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3596 </screen>
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3597 Note that the '-p /dev/term/b' specifies the serial port to use and will vary
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diff changeset
3598 from system to syetm. The download will take about two minutes. After it
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3599 finishes, start RedBoot with:
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3600 <screen>$ <userinput>calmbreaker -p /dev/term/b --run</userinput></screen>
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3601 The 'Run' LED on the core board should be on. Connecting to the MDSboard with
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3602 a terminal and typing enter should result in RedBoot reprinting the command
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3603 prompt.
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3604 </para>
208
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3605 </sect2>
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3606 <sect2>
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3607 <title>Special RedBoot Commands </title>
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3608 <para>None.</para>
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3609 </sect2>
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3610 <sect2>
211
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3611 <title>Special Note on Serial Channel </title>
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3612 <para>The MDSChip board uses a relatively slow microcontroller to provide
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diff changeset
3613 the pseudo-register interface to the core board. This pseudo-register
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diff changeset
3614 interface provides access to the serial channel and write access to program
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diff changeset
3615 memory. Those interfaces are slow and the serial channel is easily overrun
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diff changeset
3616 by a fast host. For this reason, GDB must be told to limit the size of code
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diff changeset
3617 download packets to avoid serial overrun. This is done with the following
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3618 GDB command:
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3619 <screen>(gdb) <userinput>set download-write-size 25</userinput></screen>
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3620 </para>
208
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3621 </sect2>
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3622 <sect2>
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3623 <title>Rebuilding RedBoot</title>
211
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3624
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diff changeset
3625 <para>These shell variables provide the platform-specific information
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diff changeset
3626 needed for building RedBoot according to the procedure described in
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diff changeset
3627 <xref linkend="Rebuilding-Redboot">:
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diff changeset
3628 <programlisting>
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3629 export TARGET=calm32_ceb
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3630 export ARCH_DIR=calmrisc32
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3631 export PLATFORM_DIR=ceb
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3632 </programlisting>
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3633 </para>
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3634
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3635 <para>The names of configuration files are listed above with the
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diff changeset
3636 description of the associated modes.</para>
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3637
208
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3638 </sect2>
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3639 </sect1>
211
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3640
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diff changeset
3641 <!-- ******************************** FRV ********************* -->
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3642
208
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3643 <?Pub _newpage>
211
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3644 <sect1 id="frv400">
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3645 <title>FRV/FRV400 Fujitsu FR-V 400 (MB-93091)</title>
208
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3646 <sect2>
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3647 <title>Overview</title>
211
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3648
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3649 <para><indexterm><primary>Fujitsu FR-V 400</primary>
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3650 <secondary>installing and testing</secondary></indexterm><indexterm><primary>
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3651 installing and testing
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3652 </primary><secondary>Fujitsu FR-V 400</secondary></indexterm>
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diff changeset
3653 RedBoot supports both serial ports, which are available via
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diff changeset
3654 the stacked serial connectors on the mother board.
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diff changeset
3655 The topmost port is the default and is considered to be port 0 by RedBoot.
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3656 The bottommost port is serial port 1.
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diff changeset
3657 The default serial port settings are 38400,8,N,1.
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3658 </para>
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3659 <para>
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3660 FLASH management is also supported, but only for the FLASH device in IC7.
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diff changeset
3661 This arrangement allows for IC8 to retain either the original Fujitsu board
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diff changeset
3662 firmware, or some application specific contents.</para>
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diff changeset
3663
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3664 <para>The following RedBoot configurations are supported:
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diff changeset
3665
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diff changeset
3666 <informaltable frame="all">
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3667 <tgroup cols="4" colsep="1" rowsep="1" align="left">
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diff changeset
3668 <thead>
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diff changeset
3669 <row>
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3670 <entry>Configuration</entry>
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diff changeset
3671 <entry>Mode</entry>
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diff changeset
3672 <entry>Description</entry>
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diff changeset
3673 <entry>File</entry>
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3674 </row>
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3675 </thead>
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3676 <tbody>
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diff changeset
3677 <row>
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3678 <entry>ROMRAM</entry>
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diff changeset
3679 <entry>[ROMRAM]</entry>
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diff changeset
3680 <entry>RedBoot running from RAM, but contained in the
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diff changeset
3681 board's flash boot sector.</entry>
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diff changeset
3682 <entry>redboot_ROMRAM.ecm</entry>
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diff changeset
3683 </row>
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diff changeset
3684 <row>
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3685 <entry>RAM</entry>
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diff changeset
3686 <entry>[RAM]</entry>
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diff changeset
3687 <entry>RedBoot running from RAM with RedBoot in the
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diff changeset
3688 flash boot sector.</entry>
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diff changeset
3689 <entry>redboot_RAM.ecm</entry>
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diff changeset
3690 </row>
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diff changeset
3691 </tbody>
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3692 </tgroup>
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diff changeset
3693 </informaltable>
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3694 </para>
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diff changeset
3695 </sect2>
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3696
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diff changeset
3697 <sect2>
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diff changeset
3698 <title>Initial Installation Method </title>
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diff changeset
3699
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diff changeset
3700 <para>
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diff changeset
3701 RedBoot can be installed by directly programming the FLASH device in IC7
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diff changeset
3702 or by using the Fujitsu provided software to download and install a
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diff changeset
3703 version into the FLASH device. Complete instructions are provided
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diff changeset
3704 separately.
208
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3705 </para>
211
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3706
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diff changeset
3707 </sect2>
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3708
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diff changeset
3709 <sect2>
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3710 <title>Special RedBoot Commands</title>
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diff changeset
3711
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3712 <para>None.</para>
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3713 </sect2>
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3714
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diff changeset
3715 <sect2>
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diff changeset
3716 <title>Memory Maps</title>
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diff changeset
3717
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diff changeset
3718 <para>The memory map of this platform is fixed by the hardware (cannot
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diff changeset
3719 be changed by software). The only attributes which can be modified are
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diff changeset
3720 control over cacheability, as noted below.
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diff changeset
3721 <screen>
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diff changeset
3722 Address Cache? Resource
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diff changeset
3723 00000000-03EFFFFF Yes SDRAM (via plugin DIMM)
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diff changeset
3724 03F00000-03FFFFFF No SDRAM (used for PCI window)
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3725 10000000-1FFFFFFF No MB86943 PCI bridge
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diff changeset
3726 20000000-201FFFFF No SRAM
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diff changeset
3727 21000000-23FFFFFF No Motherboard resources
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diff changeset
3728 24000000-25FFFFFF No PCI I/O space
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diff changeset
3729 26000000-2FFFFFFF No PCI Memory space
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diff changeset
3730 30000000-FDFFFFFF ?? Unused
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diff changeset
3731 FE000000-FEFFFFFF No I/O devices
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diff changeset
3732 FF000000-FF1FFFFF No IC7 - RedBoot FLASH
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diff changeset
3733 FF200000-FF3FFFFF No IC8 - unused FLASH
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diff changeset
3734 FF400000-FFFFFFFF No Misc other I/O
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diff changeset
3735 </screen>
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diff changeset
3736 </para>
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diff changeset
3737
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diff changeset
3738 <note> <title>NOTE</title>
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diff changeset
3739 <para>
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diff changeset
3740 The only configuration currently suppored requires a 64MB SDRAM
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diff changeset
3741 DIMM to be present on the CPU card. No other memory configuration
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diff changeset
3742 is supported at this time.
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diff changeset
3743 </para>
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3744 </note>
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diff changeset
3745
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diff changeset
3746 </sect2>
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diff changeset
3747
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diff changeset
3748 <sect2>
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diff changeset
3749 <title>Rebuilding RedBoot</title>
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diff changeset
3750
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diff changeset
3751 <para>These shell variables provide the platform-specific information
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diff changeset
3752 needed for building RedBoot according to the procedure described in
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diff changeset
3753 <xref linkend="Rebuilding-Redboot">:
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diff changeset
3754 <programlisting>
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diff changeset
3755 export TARGET=frv400
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diff changeset
3756 export ARCH_DIR=frv
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diff changeset
3757 export PLATFORM_DIR=frv400
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diff changeset
3758 </programlisting>
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3759 </para>
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diff changeset
3760
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diff changeset
3761 <para>The names of configuration files are listed above with the
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diff changeset
3762 description of the associated modes.</para>
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diff changeset
3763 </sect2>
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diff changeset
3764
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diff changeset
3765 </sect1>
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3766
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diff changeset
3767 <!-- ********************************* IA32 *************************** -->
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diff changeset
3768 <?Pub _newpage>
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diff changeset
3769 <sect1 id="x86pc">
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diff changeset
3770 <title>IA32/x86 x86-Based PC</title>
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diff changeset
3771 <sect2>
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diff changeset
3772 <title>Overview</title>
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diff changeset
3773 <para><indexterm><primary>x86 Based PC</primary><secondary>installing and
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diff changeset
3774 testing</secondary></indexterm><indexterm><primary>installing and testing
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diff changeset
3775 </primary><secondary>x86 Based PC</secondary></indexterm>RedBoot supports
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diff changeset
3776 two serial ports and an Intel i82559 based ethernet card (for example an Intel
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diff changeset
3777 EtherExpress Pro 10/100) for communication and downloads. The default serial
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diff changeset
3778 port settings are 38400,8,N,1.</para>
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diff changeset
3779
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diff changeset
3780 <para>The following RedBoot configurations are supported:
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diff changeset
3781
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diff changeset
3782 <informaltable frame="all">
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diff changeset
3783 <tgroup cols="4" colsep="1" rowsep="1" align="left">
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diff changeset
3784 <thead>
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diff changeset
3785 <row>
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diff changeset
3786 <entry>Configuration</entry>
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diff changeset
3787 <entry>Mode</entry>
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diff changeset
3788 <entry>Description</entry>
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diff changeset
3789 <entry>File</entry>
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diff changeset
3790 </row>
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diff changeset
3791 </thead>
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diff changeset
3792 <tbody>
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diff changeset
3793 <row>
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diff changeset
3794 <entry>Floppy</entry>
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diff changeset
3795 <entry>[Floppy]</entry>
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diff changeset
3796 <entry>RedBoot running from a boot floppy disk installed
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diff changeset
3797 in the A: drive of the PC.</entry>
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diff changeset
3798 <entry>redboot_ROM.ecm</entry>
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diff changeset
3799 </row>
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3800 </tbody>
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3801 </tgroup>
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3802 </informaltable>
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diff changeset
3803 </para>
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diff changeset
3804
208
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parents:
diff changeset
3805 </sect2>
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3806 <sect2>
211
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diff changeset
3807 <title>Initial Installation</title>
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diff changeset
3808 <para>RedBoot takes the form of a self-booting image that must be written
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diff changeset
3809 onto a formatted floppy disk. The process will erase any file system or data
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diff changeset
3810 that already exists on that disk, so proceed with caution.</para>
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diff changeset
3811 <para>For Red Hat Linux users, this can be done by:</para>
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3812 <screen>$ <userinput>dd conv=sync if=install/bin/redboot.bin of=/dev/fd0H1440
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3813 </userinput></screen>
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3814 <para>For NT Cygwin users, this can be done by first ensuring that the raw
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diff changeset
3815 floppy device is mounted as <filename>/dev/fd0</filename>. To check if this
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diff changeset
3816 is the case, type the command <command>mount</command> at the Cygwin bash
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diff changeset
3817 prompt. If the floppy drive is already mounted, it will be listed as something
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diff changeset
3818 similar to the following line:</para>
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diff changeset
3819 <screen> \\.\a: /dev/fd0 user binmode</screen>
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diff changeset
3820 <para>If this line is not listed, then mount the floppy drive using the command:
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diff changeset
3821 </para>
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3822 <screen>$ <userinput>mount -f -b //./a: /dev/fd0</userinput></screen>
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diff changeset
3823 <para>To actually install the boot image on the floppy, use the command:</para>
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diff changeset
3824 <screen>$ <userinput>dd conv=sync if=install/bin/redboot.bin of=/dev/fd0
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3825 </userinput></screen>
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3826 <para>Insert this floppy in the A: drive of the PC to be used as a target
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diff changeset
3827 and ensure that the BIOS is configured to boot from A: by default. On reset,
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diff changeset
3828 the PC will boot from the floppy and be ready to be debugged via either serial
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diff changeset
3829 line, or via the ethernet interface if it is installed.</para>
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diff changeset
3830 <note><title>NOTE</title>
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3831 <para>Unreliable floppy media may cause the write to silently fail. This
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3832 can be determined if the RedBoot image does not correctly
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diff changeset
3833 boot. In such cases, the floppy should be (unconditionally) reformatted
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diff changeset
3834 using the <command>fdformat</command> command on Linux, or
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diff changeset
3835 <command>format a: /u</command> on DOS/Windows.</para>
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diff changeset
3836 </note>
208
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diff changeset
3837 </sect2>
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3838 <sect2>
211
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diff changeset
3839 <title>Flash management</title>
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diff changeset
3840 <para>PC RedBoot does not support any FLASH commands.</para>
208
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3841 </sect2>
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diff changeset
3842 <sect2>
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diff changeset
3843 <title>Special RedBoot Commands </title>
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3844 <para>None.</para>
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diff changeset
3845 </sect2>
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diff changeset
3846 <sect2>
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3847 <title>Memory Maps </title>
211
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diff changeset
3848 <para>All selectors are initialized to map the entire 32-bit address space
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diff changeset
3849 in the familiar protected mode flat model. Page translation is not used.
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diff changeset
3850 RAM up to 640K is mapped to 0x0 to 0xa0000. RAM above 640K is mapped
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diff changeset
3851 from address 0x100000 upwards. Space is reserved between 0xa0000 and
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diff changeset
3852 0x100000 for option ROMs and the BIOS.
208
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diff changeset
3853 </para>
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diff changeset
3854 </sect2>
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diff changeset
3855 <sect2>
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diff changeset
3856 <title>Rebuilding RedBoot</title>
211
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diff changeset
3857
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diff changeset
3858 <para>These shell variables provide the platform-specific information
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diff changeset
3859 needed for building RedBoot according to the procedure described in
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diff changeset
3860 <xref linkend="Rebuilding-Redboot">:
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diff changeset
3861 <programlisting>
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diff changeset
3862 export TARGET=pc
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diff changeset
3863 export ARCH_DIR=i386
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diff changeset
3864 export PLATFORM_DIR=pc
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diff changeset
3865 </programlisting>
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3866 </para>
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diff changeset
3867
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diff changeset
3868 <para>The names of configuration files are listed above with the
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diff changeset
3869 description of the associated modes.</para>
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diff changeset
3870
208
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3871 </sect2>
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3872 </sect1>
211
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diff changeset
3873
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diff changeset
3874 <!-- *************** MIPS ******************* -->
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diff changeset
3875
208
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diff changeset
3876 <?Pub _newpage>
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3877 <sect1 id="atlas">
211
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diff changeset
3878 <title>MIPS/MIPS32(CoreLV 4Kc)+MIPS64(CoreLV 5Kc) Atlas Board</title>
208
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diff changeset
3879 <sect2>
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diff changeset
3880 <title>Overview</title>
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diff changeset
3881 <para><indexterm><primary>MIPS Atlas Board with CoreLV 4KC and CoreLV 5KC
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diff changeset
3882 </primary><secondary>installing and testing</secondary></indexterm><indexterm>
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diff changeset
3883 <primary>installing and testing</primary><secondary>MIPS Atlas Board with
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diff changeset
3884 CoreLV 4KC and CoreLV 5KC</secondary></indexterm>RedBoot supports the DgbSer
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diff changeset
3885 serial port and the built in ethernet port for communication and downloads.
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diff changeset
3886 The default serial port settings are 115200,8,N,1. RedBoot runs from and supports
211
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diff changeset
3887 flash management for the system flash region.</para>
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diff changeset
3888
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diff changeset
3889 <para>The following RedBoot configurations are supported:
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diff changeset
3890
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diff changeset
3891 <informaltable frame="all">
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diff changeset
3892 <tgroup cols="4" colsep="1" rowsep="1" align="left">
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diff changeset
3893 <thead>
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diff changeset
3894 <row>
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diff changeset
3895 <entry>Configuration</entry>
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diff changeset
3896 <entry>Mode</entry>
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diff changeset
3897 <entry>Description</entry>
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diff changeset
3898 <entry>File</entry>
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diff changeset
3899 </row>
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diff changeset
3900 </thead>
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diff changeset
3901 <tbody>
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diff changeset
3902 <row>
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diff changeset
3903 <entry>ROM</entry>
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diff changeset
3904 <entry>[ROM]</entry>
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diff changeset
3905 <entry>RedBoot running from the board's flash boot
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diff changeset
3906 sector.</entry>
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diff changeset
3907 <entry>redboot_ROM.ecm</entry>
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diff changeset
3908 </row>
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diff changeset
3909 <row>
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diff changeset
3910 <entry>RAM</entry>
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diff changeset
3911 <entry>[RAM]</entry>
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diff changeset
3912 <entry>RedBoot running from RAM with RedBoot in the
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diff changeset
3913 flash boot sector.</entry>
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diff changeset
3914 <entry>redboot_RAM.ecm</entry>
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diff changeset
3915 </row>
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diff changeset
3916 </tbody>
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3917 </tgroup>
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3918 </informaltable>
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diff changeset
3919 </para>
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diff changeset
3920
208
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diff changeset
3921 </sect2>
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diff changeset
3922 <sect2>
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diff changeset
3923 <title>Initial Installation</title>
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diff changeset
3924 <para>RedBoot is installed using the code download facility built into the
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diff changeset
3925 Atlas board. See the Atlas User manual for details, and also the Atlas download
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parents:
diff changeset
3926 format in <xref linkend="Atlas-download-format">.</para>
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parents:
diff changeset
3927 <sect3>
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diff changeset
3928 <title>Quick download instructions</title>
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3929 <para>Here are quick start instructions for downloading the prebuilt RedBoot
211
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diff changeset
3930 image.</para>
208
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3931 <orderedlist>
211
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diff changeset
3932 <listitem><para>Locate the prebuilt files in the bin directory: <filename>
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diff changeset
3933 deleteall.dl</filename> and <filename>redboot.dl</filename>.
208
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3934 </para>
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diff changeset
3935 </listitem>
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3936 <listitem><para>Make sure switch S1-1 is OFF and switch S5-1 is ON. Reset
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parents:
diff changeset
3937 the board and verify that the LED display reads <computeroutput>Flash DL</computeroutput>.
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3938 </para>
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diff changeset
3939 </listitem>
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3940 <listitem><para>Make sure your parallel port is connected to the 1284 port
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parents:
diff changeset
3941 Of the Atlas board. </para>
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3942 </listitem>
211
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diff changeset
3943 <listitem><para>Send the <filename>deleteall.dl</filename> file to the
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diff changeset
3944 parallel port to erase previous images:
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diff changeset
3945 <screen>$ <userinput>cat deleteall.dl >/dev/lp0</userinput></screen>
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diff changeset
3946 When this is complete, the LED display should read
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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diff changeset
3947 <computeroutput>Deleted</computeroutput>.</para>
208
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diff changeset
3948 </listitem>
211
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diff changeset
3949 <listitem><para>Send the ROM mode RedBoot image to the board:
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diff changeset
3950 <screen>$ <userinput>cat redboot.dl >/dev/lp0</userinput></screen>
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diff changeset
3951 When this is complete, the LED display should show the last
208
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parents:
diff changeset
3952 address programmed. This will be something like: <computeroutput>1fc17000
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3953 </computeroutput>. </para>
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parents:
diff changeset
3954 </listitem>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
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parents:
diff changeset
3955 <listitem><para>Change switch S5-1 to OFF and reset the board. The LED display
211
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diff changeset
3956 should read <computeroutput>RedBoot</computeroutput>. </para>
208
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diff changeset
3957 </listitem>
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parents:
diff changeset
3958 <listitem><para>Run the RedBoot <command>fis init</command>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3959 and <command>fconfig</command> commands to initialize the flash.
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
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parents:
diff changeset
3960 See <xref linkend="Atlas-Additional-fconfig-options">, <xref linkend="Flash-Image-System">
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parents:
diff changeset
3961 and <xref linkend="Persistent-State-Flash"> for details. </para>
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jlarmour
parents:
diff changeset
3962 </listitem>
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jlarmour
parents:
diff changeset
3963 </orderedlist>
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jlarmour
parents:
diff changeset
3964 </sect3>
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jlarmour
parents:
diff changeset
3965 <sect3 id="Atlas-download-format">
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
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parents:
diff changeset
3966 <title>Atlas download format</title>
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parents:
diff changeset
3967 <para>In order to download RedBoot to the Atlas board, it must be converted
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
3968 to the Atlas download format. There are different ways of doing this depending
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
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parents:
diff changeset
3969 on which version of the developer's kit is shipped with the board. </para>
211
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diff changeset
3970 <para>The <citetitle>Atlas Developer's Kit</citetitle> CD contains an <application>
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diff changeset
3971 srec2flash</application> utility. The source code for this utility is part
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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parents: 210
diff changeset
3972 of the <filename>yamon/yamon-src-01.01.tar.gz</filename> tarball
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diff changeset
3973 on the Dev Kit CD. The path in the expanded tarball is <filename
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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diff changeset
3974 class="directory">yamon/bin/tools</filename>. To use
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parents: 210
diff changeset
3975 <application>srec2flash</application> to convert the S-record file:
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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parents: 210
diff changeset
3976 <screen>$ <userinput>srec2flash -EL -S29 redboot.srec >redboot.dl</userinput></screen>
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parents: 210
diff changeset
3977 The <citetitle>Atlas/Malta Developer's Kit</citetitle> CD
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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diff changeset
3978 contains an <application>srecconv.pl</application> utility which requires
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parents: 210
diff changeset
3979 Perl. This utilty is part of the <filename>yamon/yamon-src-02.00.tar.gz</filename>
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diff changeset
3980 tarball on the Dev Kit CD. The path in the expanded tarball
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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diff changeset
3981 is <filename class="directory">yamon/bin/tools</filename>. To use <application>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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parents: 210
diff changeset
3982 srecconv</application> to convert the S-record file:
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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diff changeset
3983 <screen>$ <userinput>cp redboot_ROM.srec redboot_ROM.rec</userinput>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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diff changeset
3984 $ <userinput>srecconv.pl -ES L -A 29 redboot_ROM</userinput></screen>
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diff changeset
3985 The resulting file is named <filename>redboot_ROM.fl</filename>.</para>
208
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parents:
diff changeset
3986 </sect3></sect2>
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jlarmour
parents:
diff changeset
3987 <sect2>
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jlarmour
parents:
diff changeset
3988 <title>Flash management</title>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
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parents:
diff changeset
3989 <sect3 id="Atlas-Additional-fconfig-options">
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
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parents:
diff changeset
3990 <title>Additional config options</title>
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diff changeset
3991 <para>The ethernet MAC address is stored in flash manually using the <command>
211
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diff changeset
3992 fconfig</command> command. You can use the YAMON <command>setenv
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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parents: 210
diff changeset
3993 ethaddr</command> command to print out the board ethernet address.
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diff changeset
3994 Typically, it is: <screen>00:0d:a0:00:<replaceable>xx:xx</replaceable></screen> where
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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diff changeset
3995 <replaceable>xx.xx</replaceable> is the hex representation of the
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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diff changeset
3996 board serial number.</para>
208
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diff changeset
3997 </sect3>
210
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parents: 208
diff changeset
3998 </sect2>
208
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diff changeset
3999 <sect2>
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jlarmour
parents:
diff changeset
4000 <title>Additional commands</title>
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parents:
diff changeset
4001 <para>The <command>exec</command> command which allows the
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4002 loading and execution of Linux kernels, is supported for this architecture
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4003 (see <xref linkend="executing-programs">). The
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4004 <command>exec</command> parameters used for MIPS boards are:</para>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4005 <variablelist><varlistentry>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4006 <term>-b <replaceable>&lt;addr></replaceable></term>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4007 <listitem><para>Location to store command line and environment passed to kernel</para></listitem></varlistentry>
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jlarmour
parents:
diff changeset
4008 <varlistentry><term>
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jlarmour
parents:
diff changeset
4009 -w <replaceable>&lt;time></replaceable></term>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4010 <listitem><para>Wait time in seconds before starting kernel</para></listitem></varlistentry>
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jlarmour
parents:
diff changeset
4011 <varlistentry><term>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4012 -c <replaceable>"params"</replaceable></term>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4013 <listitem><para>Parameters passed to kernel</para></listitem></varlistentry>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4014 <varlistentry><term><replaceable>&lt;addr></replaceable></term>
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jlarmour
parents:
diff changeset
4015 <listitem><para>Kernel entry point, defaulting to the entry point of the last image
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4016 loaded</para></listitem></varlistentry>
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jlarmour
parents:
diff changeset
4017 </variablelist>
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jlarmour
parents:
diff changeset
4018 <para>Linux kernels on MIPS platforms expect the entry point to be called with arguments
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4019 in the registers equivalent to a C call with prototype:
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4020 <programlisting>void Linux(int argc, char **argv, char **envp);</programlisting></para>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4021 <para>RedBoot will place the appropriate data at the offset specified by the
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4022 <parameter>-b</parameter> parameter, or by default at address 0x80080000, and will set the
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4023 arguments accordingly when calling into the kernel.</para>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4024 <para>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4025 The default entry point, if no image with explicit entry point has been loaded and
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4026 none is specified, is 0x80000750.
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4027 </para>
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jlarmour
parents:
diff changeset
4028 </sect2>
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jlarmour
parents:
diff changeset
4029
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jlarmour
parents:
diff changeset
4030 <sect2>
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jlarmour
parents:
diff changeset
4031 <title>Interrupts</title>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4032 <para>RedBoot uses an interrupt vector table which is located at address 0x80000400.
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4033 Entries in this table are pointers to functions with this protoype: <programlisting>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4034 int irq_handler( unsigned vector, unsigned data )</programlisting>On an atlas
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4035 board, the vector argument is one of 25 interrupts defined in <computeroutput>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4036 hal/mips/atlas/<replaceable>VERSION</replaceable>/include/plf_intr.h</computeroutput>: <programlisting>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4037 #define CYGNUM_HAL_INTERRUPT_SER 0
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jlarmour
parents:
diff changeset
4038 #define CYGNUM_HAL_INTERRUPT_TIM0 1
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4039 #define CYGNUM_HAL_INTERRUPT_2 2
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jlarmour
parents:
diff changeset
4040 #define CYGNUM_HAL_INTERRUPT_3 3
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jlarmour
parents:
diff changeset
4041 #define CYGNUM_HAL_INTERRUPT_RTC 4
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jlarmour
parents:
diff changeset
4042 #define CYGNUM_HAL_INTERRUPT_COREHI 5
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jlarmour
parents:
diff changeset
4043 #define CYGNUM_HAL_INTERRUPT_CORELO 6
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4044 #define CYGNUM_HAL_INTERRUPT_7 7
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jlarmour
parents:
diff changeset
4045 #define CYGNUM_HAL_INTERRUPT_PCIA 8
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jlarmour
parents:
diff changeset
4046 #define CYGNUM_HAL_INTERRUPT_PCIB 9
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jlarmour
parents:
diff changeset
4047 #define CYGNUM_HAL_INTERRUPT_PCIC 10
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jlarmour
parents:
diff changeset
4048 #define CYGNUM_HAL_INTERRUPT_PCID 11
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jlarmour
parents:
diff changeset
4049 #define CYGNUM_HAL_INTERRUPT_ENUM 12
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jlarmour
parents:
diff changeset
4050 #define CYGNUM_HAL_INTERRUPT_DEG 13
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jlarmour
parents:
diff changeset
4051 #define CYGNUM_HAL_INTERRUPT_ATXFAIL 14
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4052 #define CYGNUM_HAL_INTERRUPT_INTA 15
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jlarmour
parents:
diff changeset
4053 #define CYGNUM_HAL_INTERRUPT_INTB 16
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jlarmour
parents:
diff changeset
4054 #define CYGNUM_HAL_INTERRUPT_INTC 17
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jlarmour
parents:
diff changeset
4055 #define CYGNUM_HAL_INTERRUPT_INTD 18
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jlarmour
parents:
diff changeset
4056 #define CYGNUM_HAL_INTERRUPT_SERR 19
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jlarmour
parents:
diff changeset
4057 #define CYGNUM_HAL_INTERRUPT_HW1 20
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jlarmour
parents:
diff changeset
4058 #define CYGNUM_HAL_INTERRUPT_HW2 21
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jlarmour
parents:
diff changeset
4059 #define CYGNUM_HAL_INTERRUPT_HW3 22
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jlarmour
parents:
diff changeset
4060 #define CYGNUM_HAL_INTERRUPT_HW4 23
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jlarmour
parents:
diff changeset
4061 #define CYGNUM_HAL_INTERRUPT_HW5 24</programlisting>The data
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4062 passed to the ISR is pulled from a data table (<computeroutput>hal_interrupt_data
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4063 </computeroutput>) which immediately follows the interrupt vector table. With
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4064 25 interrupts, the data table starts at address 0x80000464 on atlas.</para>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4065 <para>An application may create a normal C function with the above prototype
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4066 to be an ISR. Just poke its address into the table at the correct index and
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4067 enable the interrupt at its source. The return value of the ISR is ignored
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4068 by RedBoot. </para>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4069 </sect2>
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jlarmour
parents:
diff changeset
4070 <sect2>
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jlarmour
parents:
diff changeset
4071 <title>Memory Maps </title>
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jlarmour
parents:
diff changeset
4072 <para>Memory Maps RedBoot sets up the following memory map on the Atlas board.
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parents:
diff changeset
4073 <programlisting>Physical Address Range Description
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jlarmour
parents:
diff changeset
4074 ----------------------- -------------
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jlarmour
parents:
diff changeset
4075 0x00000000 - 0x07ffffff SDRAM
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jlarmour
parents:
diff changeset
4076 0x08000000 - 0x17ffffff PCI Memory Space
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jlarmour
parents:
diff changeset
4077 0x18000000 - 0x1bdfffff PCI I/O Space
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jlarmour
parents:
diff changeset
4078 0x1be00000 - 0x1bffffff System Controller
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jlarmour
parents:
diff changeset
4079 0x1c000000 - 0x1dffffff System flash
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jlarmour
parents:
diff changeset
4080 0x1e000000 - 0x1e3fffff Monitor flash
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jlarmour
parents:
diff changeset
4081 0x1f000000 - 0x1fbfffff FPGA</programlisting></para>
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parents:
diff changeset
4082 </sect2>
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jlarmour
parents:
diff changeset
4083 <sect2>
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parents:
diff changeset
4084 <title>Rebuilding RedBoot</title>
211
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diff changeset
4085
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diff changeset
4086 <para>These shell variables provide the platform-specific information
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diff changeset
4087 needed for building RedBoot according to the procedure described in
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diff changeset
4088 <xref linkend="Rebuilding-Redboot">:
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diff changeset
4089 <programlisting>
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diff changeset
4090 export TARGET=atlas_mips32_4kc
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diff changeset
4091 export TARGET=atlas_mips64_5kc
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diff changeset
4092 export ARCH_DIR=mips
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diff changeset
4093 export PLATFORM_DIR=atlas
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diff changeset
4094 </programlisting>
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diff changeset
4095
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diff changeset
4096 Use one of the TARGET settings only.
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diff changeset
4097
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diff changeset
4098 </para>
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diff changeset
4099
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diff changeset
4100 <para>The names of configuration files are listed above with the
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diff changeset
4101 description of the associated modes.</para>
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diff changeset
4102
208
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diff changeset
4103 </sect2>
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jlarmour
parents:
diff changeset
4104 </sect1>
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jlarmour
parents:
diff changeset
4105 <?Pub _newpage>
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diff changeset
4106 <sect1 id="malta">
211
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diff changeset
4107 <title>MIPS/MIPS32(CoreLV 4Kc)+MIPS64(CoreLV 5Kc) Malta Board </title>
208
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diff changeset
4108 <sect2>
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jlarmour
parents:
diff changeset
4109 <title>Overview</title>
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jlarmour
parents:
diff changeset
4110 <para><indexterm><primary>MIPS Malta Board with CoreLV 4KC and CoreLV 5KC
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parents:
diff changeset
4111 </primary><secondary>installing and testing</secondary></indexterm><indexterm>
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jlarmour
parents:
diff changeset
4112 <primary>installing and testing</primary><secondary>MIPS Malta Board with
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jlarmour
parents:
diff changeset
4113 CoreLV 4KC and CoreLV 5KC</secondary></indexterm>RedBoot supports both front
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jlarmour
parents:
diff changeset
4114 facing serial ports and the built in ethernet port for communication and downloads.
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diff changeset
4115 The default serial port settings are 38400,8,N,1. RedBoot runs from and supports
211
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diff changeset
4116 flash management for the system flash region.</para>
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diff changeset
4117
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diff changeset
4118 <para>The following RedBoot configurations are supported:
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diff changeset
4119
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diff changeset
4120 <informaltable frame="all">
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diff changeset
4121 <tgroup cols="4" colsep="1" rowsep="1" align="left">
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diff changeset
4122 <thead>
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diff changeset
4123 <row>
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diff changeset
4124 <entry>Configuration</entry>
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diff changeset
4125 <entry>Mode</entry>
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diff changeset
4126 <entry>Description</entry>
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diff changeset
4127 <entry>File</entry>
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diff changeset
4128 </row>
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diff changeset
4129 </thead>
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diff changeset
4130 <tbody>
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diff changeset
4131 <row>
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diff changeset
4132 <entry>ROM</entry>
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diff changeset
4133 <entry>[ROM]</entry>
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diff changeset
4134 <entry>RedBoot running from the board's flash boot
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diff changeset
4135 sector.</entry>
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diff changeset
4136 <entry>redboot_ROM.ecm</entry>
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diff changeset
4137 </row>
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diff changeset
4138 <row>
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diff changeset
4139 <entry>RAM</entry>
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diff changeset
4140 <entry>[RAM]</entry>
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diff changeset
4141 <entry>RedBoot running from RAM with RedBoot in the
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diff changeset
4142 flash boot sector.</entry>
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diff changeset
4143 <entry>redboot_RAM.ecm</entry>
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diff changeset
4144 </row>
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diff changeset
4145 </tbody>
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diff changeset
4146 </tgroup>
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diff changeset
4147 </informaltable>
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diff changeset
4148 </para>
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diff changeset
4149
208
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diff changeset
4150 </sect2>
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jlarmour
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diff changeset
4151 <sect2>
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jlarmour
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diff changeset
4152 <title>Initial Installation</title>
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diff changeset
4153 <para>RedBoot is installed using the code download facility built into the
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jlarmour
parents:
diff changeset
4154 Malta board. See the Malta User manual for details, and also the Malta download
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jlarmour
parents:
diff changeset
4155 format in <xref linkend="Malta-download-format">.</para>
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jlarmour
parents:
diff changeset
4156 <sect3>
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jlarmour
parents:
diff changeset
4157 <title>Quick download instructions</title>
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jlarmour
parents:
diff changeset
4158 <para>Here are quick start instructions for downloading the prebuilt RedBoot
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jlarmour
parents:
diff changeset
4159 image. </para>
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jlarmour
parents:
diff changeset
4160 <orderedlist>
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jlarmour
parents:
diff changeset
4161 <listitem><para>Locate the prebuilt files in the bin directory: <filename>
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jlarmour
parents:
diff changeset
4162 deleteall.fl</filename> and <filename>redboot_ROM.fl</filename>. </para>
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jlarmour
parents:
diff changeset
4163 </listitem>
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jlarmour
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diff changeset
4164 <listitem><para>Make sure switch S5-1 is ON. Reset the board and verify that
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jlarmour
parents:
diff changeset
4165 the LED display reads <computeroutput>Flash DL</computeroutput>. </para>
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jlarmour
parents:
diff changeset
4166 </listitem>
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jlarmour
parents:
diff changeset
4167 <listitem><para>Make sure your parallel port is connected to the 1284 port
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jlarmour
parents:
diff changeset
4168 Of the Atlas board. </para>
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jlarmour
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diff changeset
4169 </listitem>
211
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diff changeset
4170 <listitem><para>Send the <filename>deleteall.fl</filename> file to the
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diff changeset
4171 parallel port to erase previous images:
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diff changeset
4172 <screen>$ <userinput>cat deleteall.fl >/dev/lp0</userinput></screen>
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diff changeset
4173 When this is complete, the LED display should read
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diff changeset
4174 <computeroutput>Deleted</computeroutput>.</para>
208
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parents:
diff changeset
4175 </listitem>
211
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diff changeset
4176 <listitem><para>Send the RedBoot image to the board:
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diff changeset
4177 <screen>$ <userinput>cat redboot_ROM.fl >/dev/lp0</userinput></screen>
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diff changeset
4178 When this is complete, the LED display should show the last address
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diff changeset
4179 programmed. This will be something like:
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diff changeset
4180 <computeroutput>1fc17000</computeroutput>. </para>
208
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parents:
diff changeset
4181 </listitem>
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diff changeset
4182 <listitem><para>Change switch S5-1 to OFF and reset the board. The LED display
211
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diff changeset
4183 should read <computeroutput>RedBoot</computeroutput>. </para>
208
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parents:
diff changeset
4184 </listitem>
211
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diff changeset
4185 <listitem><para>Run the RedBoot <command>fis init</command> and <command>
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diff changeset
4186 fconfig</command> commands to initialize the flash. See <xref linkend="Flash-Image-System">
208
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parents:
diff changeset
4187 and <xref linkend="Persistent-State-Flash"> for details. </para>
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parents:
diff changeset
4188 </listitem>
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jlarmour
parents:
diff changeset
4189 </orderedlist>
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jlarmour
parents:
diff changeset
4190 </sect3>
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jlarmour
parents:
diff changeset
4191 <sect3 id="malta-download-format">
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jlarmour
parents:
diff changeset
4192 <title>Malta download format</title>
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jlarmour
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diff changeset
4193 <para>In order to download RedBoot to the Malta board, it must be converted
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parents:
diff changeset
4194 to the Malta download format.</para>
211
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diff changeset
4195 <para>The <citetitle>Atlas/Malta Developer's Kit</citetitle> CD contains an <application>
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diff changeset
4196 srecconv.pl</application> utility which requires Perl. This utility is part
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diff changeset
4197 of the <filename>yamon/yamon-src-02.00.tar.gz</filename> tarball
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diff changeset
4198 on the Dev Kit CD. The path in the expanded tarball is <filename
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diff changeset
4199 class="directory">yamon/bin/tools</filename>. To use
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diff changeset
4200 <application>srecconv</application> to convert the S-record file:
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diff changeset
4201 <screen>$ <userinput>cp redboot_ROM.srec redboot_ROM.rec</userinput>
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diff changeset
4202 $ <userinput>srecconv.pl -ES L -A 29 redboot_ROM</userinput></screen>
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diff changeset
4203 The resulting file is named <filename>redboot_ROM.fl</filename>.</para>
208
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parents:
diff changeset
4204 </sect3></sect2>
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jlarmour
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diff changeset
4205
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diff changeset
4206 <sect2>
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jlarmour
parents:
diff changeset
4207 <title>Additional commands</title>
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jlarmour
parents:
diff changeset
4208 <para>The <command>exec</command> command which allows the
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jlarmour
parents:
diff changeset
4209 loading and execution of Linux kernels, is supported for this architecture
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jlarmour
parents:
diff changeset
4210 (see <xref linkend="executing-programs">). The
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jlarmour
parents:
diff changeset
4211 <command>exec</command> parameters used for MIPS boards are:</para>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4212 <variablelist><varlistentry>
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jlarmour
parents:
diff changeset
4213 <term>-b <replaceable>&lt;addr></replaceable></term>
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jlarmour
parents:
diff changeset
4214 <listitem><para>Location to store command line and environment passed to kernel</para></listitem></varlistentry>
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jlarmour
parents:
diff changeset
4215 <varlistentry><term>
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jlarmour
parents:
diff changeset
4216 -w <replaceable>&lt;time></replaceable></term>
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jlarmour
parents:
diff changeset
4217 <listitem><para>Wait time in seconds before starting kernel</para></listitem></varlistentry>
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jlarmour
parents:
diff changeset
4218 <varlistentry><term>
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jlarmour
parents:
diff changeset
4219 -c <replaceable>"params"</replaceable></term>
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jlarmour
parents:
diff changeset
4220 <listitem><para>Parameters passed to kernel</para></listitem></varlistentry>
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jlarmour
parents:
diff changeset
4221 <varlistentry><term><replaceable>&lt;addr></replaceable></term>
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jlarmour
parents:
diff changeset
4222 <listitem><para>Kernel entry point, defaulting to the entry point of the last image
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jlarmour
parents:
diff changeset
4223 loaded</para></listitem></varlistentry>
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jlarmour
parents:
diff changeset
4224 </variablelist>
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jlarmour
parents:
diff changeset
4225 <para>Linux kernels on MIPS platforms expect the entry point to be called with arguments
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jlarmour
parents:
diff changeset
4226 in the registers equivalent to a C call with prototype:
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jlarmour
parents:
diff changeset
4227 <programlisting>void Linux(int argc, char **argv, char **envp);</programlisting></para>
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jlarmour
parents:
diff changeset
4228 <para>RedBoot will place the appropriate data at the offset specified by the
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jlarmour
parents:
diff changeset
4229 <parameter>-b</parameter> parameter, or by default at address 0x80080000, and will set the
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jlarmour
parents:
diff changeset
4230 arguments accordingly when calling into the kernel.</para>
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jlarmour
parents:
diff changeset
4231 <para>
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jlarmour
parents:
diff changeset
4232 The default entry point, if no image with explicit entry point has been loaded and
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jlarmour
parents:
diff changeset
4233 none is specified, is 0x80000750.
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jlarmour
parents:
diff changeset
4234 </para>
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jlarmour
parents:
diff changeset
4235 </sect2>
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jlarmour
parents:
diff changeset
4236
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jlarmour
parents:
diff changeset
4237 <sect2>
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jlarmour
parents:
diff changeset
4238 <title>Interrupts</title>
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jlarmour
parents:
diff changeset
4239 <para>RedBoot uses an interrupt vector table which is located at address 0x80000200.
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jlarmour
parents:
diff changeset
4240 Entries in this table are pointers to functions with this protoype: <programlisting>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4241 int irq_handler( unsigned vector, unsigned data )</programlisting>On the malta
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4242 board, the vector argument is one of 22 interrupts defined in <computeroutput>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4243 hal/mips/malta/<replaceable>VERSION</replaceable>/include/plf_intr.h</computeroutput>: <programlisting>
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jlarmour
parents:
diff changeset
4244
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jlarmour
parents:
diff changeset
4245 #define CYGNUM_HAL_INTERRUPT_SOUTH_BRIDGE_INTR 0
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jlarmour
parents:
diff changeset
4246 #define CYGNUM_HAL_INTERRUPT_SOUTH_BRIDGE_SMI 1
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jlarmour
parents:
diff changeset
4247 #define CYGNUM_HAL_INTERRUPT_CBUS_UART 2
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jlarmour
parents:
diff changeset
4248 #define CYGNUM_HAL_INTERRUPT_COREHI 3
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jlarmour
parents:
diff changeset
4249 #define CYGNUM_HAL_INTERRUPT_CORELO 4
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jlarmour
parents:
diff changeset
4250 #define CYGNUM_HAL_INTERRUPT_COMPARE 5
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jlarmour
parents:
diff changeset
4251 #define CYGNUM_HAL_INTERRUPT_TIMER 6
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jlarmour
parents:
diff changeset
4252 #define CYGNUM_HAL_INTERRUPT_KEYBOARD 7
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parents:
diff changeset
4253 #define CYGNUM_HAL_INTERRUPT_CASCADE 8
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parents:
diff changeset
4254 #define CYGNUM_HAL_INTERRUPT_TTY1 9
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parents:
diff changeset
4255 #define CYGNUM_HAL_INTERRUPT_TTY0 10
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jlarmour
parents:
diff changeset
4256 #define CYGNUM_HAL_INTERRUPT_11 11
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jlarmour
parents:
diff changeset
4257 #define CYGNUM_HAL_INTERRUPT_FLOPPY 12
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jlarmour
parents:
diff changeset
4258 #define CYGNUM_HAL_INTERRUPT_PARALLEL 13
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jlarmour
parents:
diff changeset
4259 #define CYGNUM_HAL_INTERRUPT_REAL_TIME_CLOCK 14
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jlarmour
parents:
diff changeset
4260 #define CYGNUM_HAL_INTERRUPT_I2C 15
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parents:
diff changeset
4261 #define CYGNUM_HAL_INTERRUPT_PCI_AB 16
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parents:
diff changeset
4262 #define CYGNUM_HAL_INTERRUPT_PCI_CD 17
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parents:
diff changeset
4263 #define CYGNUM_HAL_INTERRUPT_MOUSE 18
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jlarmour
parents:
diff changeset
4264 #define CYGNUM_HAL_INTERRUPT_19 19
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jlarmour
parents:
diff changeset
4265 #define CYGNUM_HAL_INTERRUPT_IDE_PRIMARY 20
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parents:
diff changeset
4266 #define CYGNUM_HAL_INTERRUPT_IDE_SECONDARY 21</programlisting>The data
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jlarmour
parents:
diff changeset
4267 passed to the ISR is pulled from a data table (<computeroutput>hal_interrupt_data
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jlarmour
parents:
diff changeset
4268 </computeroutput>) which immediately follows the interrupt vector table. With
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jlarmour
parents:
diff changeset
4269 22 interrupts, the data table starts at address 0x80000258.</para>
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jlarmour
parents:
diff changeset
4270 <para>An application may create a normal C function with the above prototype
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jlarmour
parents:
diff changeset
4271 to be an ISR. Just poke its address into the table at the correct index and
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jlarmour
parents:
diff changeset
4272 enable the interrupt at its source. The return value of the ISR is ignored
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jlarmour
parents:
diff changeset
4273 by RedBoot. </para>
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jlarmour
parents:
diff changeset
4274 </sect2>
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jlarmour
parents:
diff changeset
4275 <sect2>
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jlarmour
parents:
diff changeset
4276 <title>Memory Maps </title>
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jlarmour
parents:
diff changeset
4277 <para>Memory Maps RedBoot sets up the following memory map on the Malta board.<note>
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jlarmour
parents:
diff changeset
4278 <title>NOTE</title>
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jlarmour
parents:
diff changeset
4279 <para>The virtual memory maps in this section use a C and B column to indicate
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4280 whether or not the region is cached (C) or buffered (B).</para>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4281 </note><programlisting>Physical Address Range C B Description
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4282 ----------------------- - - -----------
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4283 0x80000000 - 0x81ffffff Y Y SDRAM
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4284 0x9e000000 - 0x9e3fffff Y N System flash (cached)
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4285 0x9fc00000 - 0x9fffffff Y N System flash (mirrored)
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4286 0xa8000000 - 0xb7ffffff N N PCI Memory Space
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4287 0xb4000000 - 0xb40fffff N N Galileo System Controller
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4288 0xb8000000 - 0xb80fffff N N Southbridge / ISA
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4289 0xb8100000 - 0xbbdfffff N N PCI I/O Space
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4290 0xbe000000 - 0xbe3fffff N N System flash (noncached)
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4291 0xbf000000 - 0xbfffffff N N Board logic FPGA</programlisting></para>
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jlarmour
parents:
diff changeset
4292 </sect2>
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jlarmour
parents:
diff changeset
4293 <sect2>
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jlarmour
parents:
diff changeset
4294 <title>Rebuilding RedBoot</title>
211
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parents: 210
diff changeset
4295
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parents: 210
diff changeset
4296 <para>These shell variables provide the platform-specific information
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parents: 210
diff changeset
4297 needed for building RedBoot according to the procedure described in
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parents: 210
diff changeset
4298 <xref linkend="Rebuilding-Redboot">:
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parents: 210
diff changeset
4299 <programlisting>
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parents: 210
diff changeset
4300 export TARGET=malta_mips32_4kc
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parents: 210
diff changeset
4301 export ARCH_DIR=mips
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diff changeset
4302 export PLATFORM_DIR=malta
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diff changeset
4303 </programlisting>
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parents: 210
diff changeset
4304 </para>
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parents: 210
diff changeset
4305
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diff changeset
4306 <para>The names of configuration files are listed above with the
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parents: 210
diff changeset
4307 description of the associated modes.</para>
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parents: 210
diff changeset
4308
208
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jlarmour
parents:
diff changeset
4309 </sect2></sect1>
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jlarmour
parents:
diff changeset
4310 <?Pub _newpage>
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jlarmour
parents:
diff changeset
4311 <sect1 id="ocelot">
211
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parents: 210
diff changeset
4312 <title>MIPS/RM7000 PMC-Sierra Ocelot</title>
208
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jlarmour
parents:
diff changeset
4313 <sect2>
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jlarmour
parents:
diff changeset
4314 <title>Overview</title>
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jlarmour
parents:
diff changeset
4315 <para><indexterm><primary>PMC-Sierra MIPS RM7000 Ocelot</primary><secondary>installing
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4316 and testing</secondary></indexterm><indexterm><primary>installing and testing
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4317 </primary><secondary>PMC-Sierra MIPS RM7000 Ocelot</secondary></indexterm>RedBoot
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4318 uses the front facing serial port. The default serial port settings are 38400,8,N,1.
211
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parents: 210
diff changeset
4319 RedBoot also supports ethernet. Management of onboard flash is also supported.</para>
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diff changeset
4320
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diff changeset
4321 <para>The following RedBoot configurations are supported:
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diff changeset
4322
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parents: 210
diff changeset
4323 <informaltable frame="all">
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diff changeset
4324 <tgroup cols="4" colsep="1" rowsep="1" align="left">
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diff changeset
4325 <thead>
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diff changeset
4326 <row>
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diff changeset
4327 <entry>Configuration</entry>
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diff changeset
4328 <entry>Mode</entry>
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diff changeset
4329 <entry>Description</entry>
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diff changeset
4330 <entry>File</entry>
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diff changeset
4331 </row>
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diff changeset
4332 </thead>
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diff changeset
4333 <tbody>
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diff changeset
4334 <row>
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diff changeset
4335 <entry>ROM</entry>
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diff changeset
4336 <entry>[ROM]</entry>
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diff changeset
4337 <entry>RedBoot running from the board's flash boot
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diff changeset
4338 sector.</entry>
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diff changeset
4339 <entry>redboot_ROM.ecm</entry>
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diff changeset
4340 </row>
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diff changeset
4341 <row>
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4342 <entry>RAM</entry>
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diff changeset
4343 <entry>[RAM]</entry>
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diff changeset
4344 <entry>RedBoot running from RAM with RedBoot in the
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parents: 210
diff changeset
4345 flash boot sector.</entry>
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parents: 210
diff changeset
4346 <entry>redboot_RAM.ecm</entry>
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diff changeset
4347 </row>
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4348 </tbody>
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4349 </tgroup>
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4350 </informaltable>
208
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4351 </para>
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parents:
diff changeset
4352 </sect2>
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parents:
diff changeset
4353
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parents:
diff changeset
4354 <sect2>
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diff changeset
4355 <title>Additional commands</title>
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diff changeset
4356 <para>The <command>exec</command> command which allows the
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jlarmour
parents:
diff changeset
4357 loading and execution of Linux kernels, is supported for this architecture
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parents:
diff changeset
4358 (see <xref linkend="executing-programs">). The
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parents:
diff changeset
4359 <command>exec</command> parameters used for MIPS boards are:</para>
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jlarmour
parents:
diff changeset
4360 <variablelist><varlistentry>
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parents:
diff changeset
4361 <term>-b <replaceable>&lt;addr></replaceable></term>
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parents:
diff changeset
4362 <listitem><para>Location to store command line and environment passed to kernel</para></listitem></varlistentry>
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parents:
diff changeset
4363 <varlistentry><term>
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parents:
diff changeset
4364 -w <replaceable>&lt;time></replaceable></term>
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parents:
diff changeset
4365 <listitem><para>Wait time in seconds before starting kernel</para></listitem></varlistentry>
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parents:
diff changeset
4366 <varlistentry><term>
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parents:
diff changeset
4367 -c <replaceable>"params"</replaceable></term>
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parents:
diff changeset
4368 <listitem><para>Parameters passed to kernel</para></listitem></varlistentry>
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parents:
diff changeset
4369 <varlistentry><term><replaceable>&lt;addr></replaceable></term>
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parents:
diff changeset
4370 <listitem><para>Kernel entry point, defaulting to the entry point of the last image
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parents:
diff changeset
4371 loaded</para></listitem></varlistentry>
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parents:
diff changeset
4372 </variablelist>
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parents:
diff changeset
4373 <para>Linux kernels on MIPS platforms expect the entry point to be called with arguments
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jlarmour
parents:
diff changeset
4374 in the registers equivalent to a C call with prototype:
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parents:
diff changeset
4375 <programlisting>void Linux(int argc, char **argv, char **envp);</programlisting></para>
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parents:
diff changeset
4376 <para>RedBoot will place the appropriate data at the offset specified by the
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parents:
diff changeset
4377 <parameter>-b</parameter> parameter, or by default at address 0x80080000, and will set the
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jlarmour
parents:
diff changeset
4378 arguments accordingly when calling into the kernel.</para>
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jlarmour
parents:
diff changeset
4379 <para>
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parents:
diff changeset
4380 The default entry point, if no image with explicit entry point has been loaded and
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parents:
diff changeset
4381 none is specified, is 0x80000750.
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jlarmour
parents:
diff changeset
4382 </para>
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jlarmour
parents:
diff changeset
4383 </sect2>
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parents:
diff changeset
4384
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parents:
diff changeset
4385 <sect2>
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jlarmour
parents:
diff changeset
4386 <title>Memory Maps </title>
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parents:
diff changeset
4387 <para>RedBoot sets up the following memory map on the Ocelot board. </para>
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parents:
diff changeset
4388 <para>Note that these addresses are accessed through kseg0/1 and thus translate
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parents:
diff changeset
4389 to the actual address range 0x80000000-0xbfffffff, depending on the need for
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jlarmour
parents:
diff changeset
4390 caching/non-caching access to the bus.<note><title>NOTE</title>
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parents:
diff changeset
4391 <para>The virtual memory maps in this section use a C and B column to indicate
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parents:
diff changeset
4392 whether or not the region is cached (C) or buffered (B).</para>
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parents:
diff changeset
4393 </note><programlisting>Physical Address Range Description
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jlarmour
parents:
diff changeset
4394 ----------------------- -----------
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jlarmour
parents:
diff changeset
4395 0x00000000 - 0x0fffffff SDRAM
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jlarmour
parents:
diff changeset
4396 0x10000000 - 0x10ffffff PCI I/O space
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jlarmour
parents:
diff changeset
4397 0x12000000 - 0x13ffffff PCI Memory space
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jlarmour
parents:
diff changeset
4398 0x14000000 - 0x1400ffff Galileo system controller
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jlarmour
parents:
diff changeset
4399 0x1c000000 - 0x1c0000ff PLD (board logic)
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parents:
diff changeset
4400 0x1fc00000 - 0x1fc7ffff flash</programlisting></para>
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parents:
diff changeset
4401 </sect2>
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parents:
diff changeset
4402 <sect2>
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diff changeset
4403 <title>Rebuilding RedBoot</title>
211
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diff changeset
4404
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diff changeset
4405 <para>These shell variables provide the platform-specific information
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parents: 210
diff changeset
4406 needed for building RedBoot according to the procedure described in
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parents: 210
diff changeset
4407 <xref linkend="Rebuilding-Redboot">:
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parents: 210
diff changeset
4408 <programlisting>
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parents: 210
diff changeset
4409 export TARGET=ocelot
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diff changeset
4410 export ARCH_DIR=mips
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diff changeset
4411 export PLATFORM_DIR=rm7000/ocelot
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diff changeset
4412 </programlisting>
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diff changeset
4413 </para>
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diff changeset
4414
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diff changeset
4415 <para>The names of configuration files are listed above with the
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parents: 210
diff changeset
4416 description of the associated modes.</para>
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diff changeset
4417
208
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parents:
diff changeset
4418 </sect2></sect1>
211
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diff changeset
4419
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diff changeset
4420
208
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parents:
diff changeset
4421 <?Pub _newpage>
211
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parents: 210
diff changeset
4422 <sect1 id="vrc4375">
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diff changeset
4423 <title>MIPS/VR4375 NEC DDB-VRC4375</title>
208
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diff changeset
4424 <sect2>
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diff changeset
4425 <title>Overview</title>
211
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diff changeset
4426
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diff changeset
4427 <para><indexterm><primary>NEC DDB-VRC4375</primary>
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diff changeset
4428 <secondary>installing and testing</secondary></indexterm><indexterm><primary>
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diff changeset
4429 installing and testing</primary><secondary>NEC DDB-VRC4375
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diff changeset
4430 </secondary></indexterm>RedBoot supports only serial port 1, which is connected to the upper
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parents: 210
diff changeset
4431 of the stacked serial connectors on the board. The default serial
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parents: 210
diff changeset
4432 port settings are 38400,8,N,1. FLASH management is also supported.</para>
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parents: 210
diff changeset
4433
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parents: 210
diff changeset
4434 <para>The following RedBoot configurations are supported:
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parents: 210
diff changeset
4435
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diff changeset
4436 <informaltable frame="all">
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parents: 210
diff changeset
4437 <tgroup cols="4" colsep="1" rowsep="1" align="left">
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diff changeset
4438 <thead>
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parents: 210
diff changeset
4439 <row>
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parents: 210
diff changeset
4440 <entry>Configuration</entry>
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parents: 210
diff changeset
4441 <entry>Mode</entry>
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parents: 210
diff changeset
4442 <entry>Description</entry>
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parents: 210
diff changeset
4443 <entry>File</entry>
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parents: 210
diff changeset
4444 </row>
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diff changeset
4445 </thead>
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parents: 210
diff changeset
4446 <tbody>
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parents: 210
diff changeset
4447 <row>
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parents: 210
diff changeset
4448 <entry>ROMRAM</entry>
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diff changeset
4449 <entry>[ROMRAM]</entry>
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parents: 210
diff changeset
4450 <entry>RedBoot running from RAM, but contained in the
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parents: 210
diff changeset
4451 board's flash boot sector.</entry>
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parents: 210
diff changeset
4452 <entry>redboot_ROMRAM.ecm</entry>
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parents: 210
diff changeset
4453 </row>
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parents: 210
diff changeset
4454 <row>
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parents: 210
diff changeset
4455 <entry>RAM</entry>
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parents: 210
diff changeset
4456 <entry>[RAM]</entry>
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parents: 210
diff changeset
4457 <entry>RedBoot running from RAM with RedBoot in the
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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parents: 210
diff changeset
4458 flash boot sector.</entry>
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parents: 210
diff changeset
4459 <entry>redboot_RAM.ecm</entry>
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parents: 210
diff changeset
4460 </row>
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diff changeset
4461 </tbody>
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parents: 210
diff changeset
4462 </tgroup>
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parents: 210
diff changeset
4463 </informaltable>
208
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parents:
diff changeset
4464 </para>
211
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parents: 210
diff changeset
4465
208
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parents:
diff changeset
4466 </sect2>
211
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parents: 210
diff changeset
4467
208
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jlarmour
parents:
diff changeset
4468 <sect2>
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jlarmour
parents:
diff changeset
4469 <title>Initial Installation Method </title>
211
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diff changeset
4470
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diff changeset
4471 <para>A device programmer should be used to program a socketed FLASH part
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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diff changeset
4472 (AMD 29F040). The board as delivered is configured for a 512K
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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diff changeset
4473 EPROM. To install a FLASH ROM, Jumpers J30, J31 and J36 need to be
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diff changeset
4474 changed as described in the board's User Manual.</para>
208
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parents:
diff changeset
4475 </sect2>
211
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diff changeset
4476
208
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jlarmour
parents:
diff changeset
4477 <sect2>
211
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diff changeset
4478 <title>Special RedBoot Commands</title>
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diff changeset
4479
208
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parents:
diff changeset
4480 <para>None.</para>
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parents:
diff changeset
4481 </sect2>
211
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diff changeset
4482
208
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parents:
diff changeset
4483 <sect2>
211
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diff changeset
4484 <title>Memory Maps</title>
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diff changeset
4485
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diff changeset
4486 <para>RedBoot sets up the memory map primarily as described in the board's
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diff changeset
4487 User Manual. There are some minor differences, noted in the following
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parents: 210
diff changeset
4488 table:
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parents: 210
diff changeset
4489 <screen>
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parents: 210
diff changeset
4490 Physical Virtual Resource
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jlarmour
parents: 210
diff changeset
4491 Addresses Addresses
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parents: 210
diff changeset
4492 00000000-01FFFFFF 80000000-81FFFFFF Base SDRAM (cached)
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diff changeset
4493 00000000-01FFFFFF A0000000-A1FFFFFF Base SDRAM (uncached)
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parents: 210
diff changeset
4494 0C000000-0C0BFFFF AC000000-AC0B0000 PCI IO space
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parents: 210
diff changeset
4495 0F000000-0F0001FF AF000000-AF0001FF VRC4375 Registers
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diff changeset
4496 1C000000-1C0FFFFF BC000000-BC0FFFFF VRC4372 Registers
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parents: 210
diff changeset
4497 1C100000-1DFFFFFF BC100000-BDFFFFFF PCI Memory space
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diff changeset
4498 1FC00000-1FC7FFFF BFC00000-BFC7FFFF FLASH ROM
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parents: 210
diff changeset
4499 80000000-8000000D C0000000-C000000D RTC
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diff changeset
4500 8000000E-80007FFF C000000E-C0007FFF NVRAM
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diff changeset
4501 81000000-81FFFFFF C1000000-C1FFFFFF Z85C30 DUART
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diff changeset
4502 82000000-82FFFFFF C2000000-C2FFFFFF Z8536 Timer
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diff changeset
4503 83000000-83FFFFFF C3000000-C3FFFFFF 8255 Parallel port
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diff changeset
4504 87000000-87FFFFFF C7000000-C7FFFFFF Seven segment display</screen>
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diff changeset
4505 </para>
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diff changeset
4506
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diff changeset
4507 <note> <title>NOTE</title>
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diff changeset
4508 <para>
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diff changeset
4509 By default the VRC4375 SIMM control registers are not programmed
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diff changeset
4510 since the values used must depend on the SIMMs installed. If SIMMs
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diff changeset
4511 are to be used, correct values must be placed in these registers
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parents: 210
diff changeset
4512 before accessing the SIMM address range.
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parents: 210
diff changeset
4513 </para>
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diff changeset
4514 </note>
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diff changeset
4515
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diff changeset
4516 <note> <title>NOTE</title>
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parents: 210
diff changeset
4517 <para>
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parents: 210
diff changeset
4518 The allocation of address ranges to devices in the PCI IO and
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jlarmour
parents: 210
diff changeset
4519 memory spaces is handled by the eCos PCI support library. They do
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parents: 210
diff changeset
4520 not correspond to those described in the board User Manual.
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parents: 210
diff changeset
4521 </para>
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parents: 210
diff changeset
4522 </note>
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diff changeset
4523
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diff changeset
4524 <note> <title>NOTE</title>
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diff changeset
4525 <para>
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diff changeset
4526 The MMU has been set up to relocate the VRC4372 supported devices
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diff changeset
4527 mapped at physical addresses 0x8xxxxxxx to virtual addresses
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jlarmour
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diff changeset
4528 0xCxxxxxxx.
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parents: 210
diff changeset
4529 </para>
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diff changeset
4530 </note>
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diff changeset
4531
208
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jlarmour
parents:
diff changeset
4532 </sect2>
211
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parents: 210
diff changeset
4533
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diff changeset
4534 <sect2>
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parents: 210
diff changeset
4535 <title>Ethernet Driver</title>
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diff changeset
4536
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diff changeset
4537 <para>
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diff changeset
4538 The ethernet driver is in two parts:
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parents: 210
diff changeset
4539 </para>
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diff changeset
4540
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diff changeset
4541 <para>
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diff changeset
4542 A generic ether driver for the Intel i21143 device is located in
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diff changeset
4543 <filename class="directory">devs/eth/intel/i21143</filename>. Its package name is <computeroutput>CYGPKG_DEVS_ETH_INTEL_I21143</computeroutput>.
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diff changeset
4544 </para>
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jlarmour
parents: 210
diff changeset
4545
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jlarmour
parents: 210
diff changeset
4546 <para>
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diff changeset
4547 The platform-specific ether driver is <filename
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parents: 210
diff changeset
4548 class="directory">devs/eth/mips/vrc4375</filename>. Its package is
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diff changeset
4549 <computeroutput>CYGPKG_DEVS_ETH_MIPS_VRC4375</computeroutput>. This
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diff changeset
4550 tells the generic driver the address in IO memory of the chip, for
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diff changeset
4551 example, and other configuration details. The ESA (MAC address) is by
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diff changeset
4552 default collected from on-board serial EEPROM, unless configured
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diff changeset
4553 statically within this package.
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diff changeset
4554 </para>
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diff changeset
4555 </sect2>
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diff changeset
4556
208
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jlarmour
parents:
diff changeset
4557 <sect2>
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jlarmour
parents:
diff changeset
4558 <title>Rebuilding RedBoot</title>
211
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diff changeset
4559
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diff changeset
4560 <para>These shell variables provide the platform-specific information
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parents: 210
diff changeset
4561 needed for building RedBoot according to the procedure described in
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diff changeset
4562 <xref linkend="Rebuilding-Redboot">:
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parents: 210
diff changeset
4563 <programlisting>
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diff changeset
4564 export TARGET=vrc4373
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diff changeset
4565 export ARCH_DIR=mips
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diff changeset
4566 export PLATFORM_DIR=vrc4373
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diff changeset
4567 </programlisting>
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parents: 210
diff changeset
4568 </para>
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diff changeset
4569
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diff changeset
4570 <para>The names of configuration files are listed above with the
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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parents: 210
diff changeset
4571 description of the associated modes.</para>
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diff changeset
4572
208
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jlarmour
parents:
diff changeset
4573 </sect2>
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jlarmour
parents:
diff changeset
4574 </sect1>
211
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diff changeset
4575
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jlarmour
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diff changeset
4576 <!-- ************************** PowerPC ********************** -->
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diff changeset
4577
208
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jlarmour
parents:
diff changeset
4578 <?Pub _newpage>
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jlarmour
parents:
diff changeset
4579 <sect1 id="viper">
211
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diff changeset
4580 <title>PowerPC/MPC860T Analogue & Micro PowerPC 860T</title>
208
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jlarmour
parents:
diff changeset
4581 <sect2>
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jlarmour
parents:
diff changeset
4582 <title>Overview</title>
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jlarmour
parents:
diff changeset
4583 <para><indexterm><primary>Analogue & Micro PowerPC 860T</primary><secondary>installing
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jlarmour
parents:
diff changeset
4584 and testing</secondary></indexterm><indexterm><primary>installing and testing
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jlarmour
parents:
diff changeset
4585 </primary><secondary>Analogue & Micro PowerPC 860T</secondary></indexterm>RedBoot uses
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jlarmour
parents:
diff changeset
4586 the SMC1 serial port. The default serial port settings are 38400,8,N,1.
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jlarmour
parents:
diff changeset
4587 Ethernet is also supported using the RJ-45 connector. </para>
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jlarmour
parents:
diff changeset
4588 <para>Management of onboard flash is also supported.
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jlarmour
parents:
diff changeset
4589 A single RedBoot configuration is supported: <itemizedlist>
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jlarmour
parents:
diff changeset
4590 <listitem><para>RedBoot running from RAM using an image copied from the flash boot sector (ROMRAM mode).
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jlarmour
parents:
diff changeset
4591 </para>
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jlarmour
parents:
diff changeset
4592 </listitem>
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jlarmour
parents:
diff changeset
4593 </itemizedlist></para>
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jlarmour
parents:
diff changeset
4594 </sect2>
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jlarmour
parents:
diff changeset
4595 <sect2>
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jlarmour
parents:
diff changeset
4596 <title>Initial Installation Method </title>
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jlarmour
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diff changeset
4597 <para>RedBoot must be installed at the A & M factory.
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jlarmour
parents:
diff changeset
4598 </para>
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jlarmour
parents:
diff changeset
4599 </sect2>
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jlarmour
parents:
diff changeset
4600 <sect2>
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jlarmour
parents:
diff changeset
4601 <title>Special RedBoot Commands </title>
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jlarmour
parents:
diff changeset
4602 <para>None.</para>
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jlarmour
parents:
diff changeset
4603 </sect2>
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jlarmour
parents:
diff changeset
4604 <sect2>
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jlarmour
parents:
diff changeset
4605 <title>Memory Maps </title>
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jlarmour
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diff changeset
4606 <para>Memory Maps RedBoot sets up the following memory map on the MBX board.<programlisting>
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jlarmour
parents:
diff changeset
4607 Physical Address Range Description
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jlarmour
parents:
diff changeset
4608 ----------------------- -----------
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jlarmour
parents:
diff changeset
4609 0x00000000 - 0x007fffff DRAM
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jlarmour
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diff changeset
4610 0xfe000000 - 0xfe0fffff flash (AMD29LV8008B)
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4611 0xff000000 - 0xff0fffff MPC registers</programlisting></para>
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parents:
diff changeset
4612 </sect2>
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parents:
diff changeset
4613 <sect2>
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parents:
diff changeset
4614 <title>Rebuilding RedBoot</title>
211
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diff changeset
4615
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diff changeset
4616 <para>These shell variables provide the platform-specific information
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diff changeset
4617 needed for building RedBoot according to the procedure described in
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diff changeset
4618 <xref linkend="Rebuilding-Redboot">:
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diff changeset
4619 <programlisting>
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diff changeset
4620 export TARGET=viper
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diff changeset
4621 export ARCH_DIR=powerpc
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4622 export PLATFORM_DIR=viper
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diff changeset
4623 </programlisting>
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4624 </para>
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4625
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diff changeset
4626 <para>The names of configuration files are listed above with the
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diff changeset
4627 description of the associated modes.</para>
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4628
208
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parents:
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4629 </sect2>
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4630 </sect1>
211
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diff changeset
4631
208
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4632 <?Pub _newpage>
211
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diff changeset
4633 <sect1 id="mbx">
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diff changeset
4634 <title>PowerPC/MPC8XX Motorola MBX</title>
208
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diff changeset
4635 <sect2>
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diff changeset
4636 <title>Overview</title>
211
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diff changeset
4637 <para><indexterm><primary>Motorola PowerPC MBX</primary><secondary>installing
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diff changeset
4638 and testing</secondary></indexterm><indexterm><primary>installing and testing
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diff changeset
4639 </primary><secondary>Motorola PowerPC MBX</secondary></indexterm>RedBoot uses
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diff changeset
4640 the SMC1/COM1 serial port. The default serial port settings are 38400,8,N,1.
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parents: 210
diff changeset
4641 Ethernet is also supported using the 10-base T connector. </para>
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diff changeset
4642 <para>Management of onboard flash is also supported. Two basic RedBoot configurations
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diff changeset
4643 are supported: <itemizedlist>
208
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parents:
diff changeset
4644 <listitem><para>RedBoot running from RAM with RedBoot in the flash boot sector.
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parents:
diff changeset
4645 </para>
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4646 </listitem>
211
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diff changeset
4647 <listitem><para>RedBoot running from the board's flash boot sector. </para>
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diff changeset
4648 </listitem>
208
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parents:
diff changeset
4649 </itemizedlist></para>
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jlarmour
parents:
diff changeset
4650 </sect2>
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parents:
diff changeset
4651 <sect2>
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parents:
diff changeset
4652 <title>Initial Installation Method </title>
211
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diff changeset
4653 <para>Device programmer is used to program the XU1 socketed flash part (AM29F040B)
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diff changeset
4654 with the ROM version of RedBoot. - Use the on-board EPPC-Bug monitor to update
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diff changeset
4655 RedBoot. </para>
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diff changeset
4656 <para>This assumes that you have EPPC-Bug in the on-board flash. This can
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diff changeset
4657 be determined by setting up the board according to the following instructions
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diff changeset
4658 and powering up the board. </para>
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diff changeset
4659 <para>The EPPC-Bug prompt should appear on the SMC1 connector at 9600 baud,
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diff changeset
4660 8N1. </para>
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diff changeset
4661 <orderedlist>
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diff changeset
4662 <listitem><para>Set jumper 3 to 2-3 [allow XU1 flash to be programmed] </para>
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diff changeset
4663 </listitem>
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diff changeset
4664 <listitem><para>Set jumper 4 to 2-3 [boot EPPC-Bug] </para>
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diff changeset
4665 </listitem>
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diff changeset
4666 </orderedlist>
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diff changeset
4667 <para>If it is available, program the flash by following these steps: </para>
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diff changeset
4668 <orderedlist>
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diff changeset
4669 <listitem><para>Prepare EPPC-Bug for download: <screen>EPPC-Bug>lo 0
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diff changeset
4670 </screen>At this point the monitor is ready for input. It will not
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diff changeset
4671 return the prompt until the file has been downloaded. </para>
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diff changeset
4672 </listitem>
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diff changeset
4673 <listitem><para>Use the terminal emulator's ASCII download feature (or a simple
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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parents: 210
diff changeset
4674 clipboard copy/paste operation) to download the redboot.ppcbug file.</para>
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diff changeset
4675 <para>Note that on Linux, Minicom's ASCII download feature seems to be broken.
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parents: 210
diff changeset
4676 A workaround is to load the file into emacs (or another editor) and copy the
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parents: 210
diff changeset
4677 full contents to the clipboard. Then press the mouse paste-button (usually
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diff changeset
4678 the middle one) over the Minicom window. </para>
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diff changeset
4679 </listitem>
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diff changeset
4680 <listitem><para>Program the flash with the downloaded data: <screen>
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diff changeset
4681 EPPC-Bug>pflash 40000 60000 fc000000</screen></para>
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diff changeset
4682 </listitem>
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4683 <listitem><para>Switch off the power, and change jumper 4 to 1-2. Turn on
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diff changeset
4684 the power again. The board should now boot using the newly programmed RedBoot.
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diff changeset
4685 </para>
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diff changeset
4686 </listitem>
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diff changeset
4687 </orderedlist>
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diff changeset
4688 <para>To install RedBoot on a target that already has eCos GDB stubs, download
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diff changeset
4689 the RAM version of RedBoot and run it. Initialize the flash image directory: <screen>
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diff changeset
4690 RedBoot> fi init</screen>Then download the ROM version of RedBoot
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diff changeset
4691 and program it into flash:
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diff changeset
4692 <screen>
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diff changeset
4693 RedBoot> <userinput>load redboot_ROM.srec -b 0x80100000</userinput>
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diff changeset
4694 RedBoot> <userinput>fi cr RedBoot -f 0xFE000000 -b 0x00040000 -l 0x20000</userinput>
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diff changeset
4695 </screen></para>
208
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diff changeset
4696 </sect2>
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parents:
diff changeset
4697 <sect2>
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parents:
diff changeset
4698 <title>Special RedBoot Commands </title>
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jlarmour
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diff changeset
4699 <para>None.</para>
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diff changeset
4700 </sect2>
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parents:
diff changeset
4701 <sect2>
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4702 <title>Memory Maps </title>
211
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diff changeset
4703 <para>Memory Maps RedBoot sets up the following memory map on the MBX board.<programlisting>
208
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parents:
diff changeset
4704 Physical Address Range Description
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parents:
diff changeset
4705 ----------------------- -----------
211
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diff changeset
4706 0x00000000 - 0x003fffff DRAM
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diff changeset
4707 0xfa100000 - 0xfa100003 LEDs
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diff changeset
4708 0xfe000000 - 0xfe07ffff flash (AMD29F040B)
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diff changeset
4709 0xff000000 - 0xff0fffff MPC registers</programlisting></para>
208
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parents:
diff changeset
4710 </sect2>
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jlarmour
parents:
diff changeset
4711 <sect2>
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diff changeset
4712 <title>Rebuilding RedBoot</title>
211
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diff changeset
4713
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diff changeset
4714 <para>These shell variables provide the platform-specific information
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diff changeset
4715 needed for building RedBoot according to the procedure described in
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diff changeset
4716 <xref linkend="Rebuilding-Redboot">:
208
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diff changeset
4717 <programlisting>
211
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diff changeset
4718 export TARGET=mbx
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diff changeset
4719 export ARCH_DIR=powerpc
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diff changeset
4720 export PLATFORM_DIR=mbx
208
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diff changeset
4721 </programlisting>
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diff changeset
4722 </para>
211
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diff changeset
4723
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diff changeset
4724 <para>The names of configuration files are listed above with the
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diff changeset
4725 description of the associated modes.</para>
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diff changeset
4726
208
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parents:
diff changeset
4727 </sect2>
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diff changeset
4728 </sect1>
211
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diff changeset
4729
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diff changeset
4730
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diff changeset
4731
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diff changeset
4732
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diff changeset
4733 <!-- ********************** SuperH ************************ -->
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diff changeset
4734
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diff changeset
4735
208
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diff changeset
4736
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parents:
diff changeset
4737 <?Pub _newpage>
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diff changeset
4738 <sect1 id="edk7708">
211
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diff changeset
4739 <title>SuperH/SH3(SH7708) Hitachi EDK7708</title>
208
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4740 <sect2>
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parents:
diff changeset
4741 <title>Overview</title>
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jlarmour
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diff changeset
4742 <para><indexterm><primary>Hitachi SH EDK7708</primary><secondary>installing
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diff changeset
4743 and testing</secondary></indexterm><indexterm><primary>installing and testing
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diff changeset
4744 </primary><secondary>Hitachi SH EDK7708</secondary></indexterm>RedBoot uses
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jlarmour
parents:
diff changeset
4745 the serial port. The default serial port settings are 38400,8,N,1.</para>
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parents:
diff changeset
4746 <para>Management of onboard flash is also supported. Two basic RedBoot configurations
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4747 are supported: <itemizedlist>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4748 <listitem><para>RedBoot running from RAM with RedBoot in the flash boot sector.
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4749 </para>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4750 </listitem>
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jlarmour
parents:
diff changeset
4751 <listitem><para>RedBoot running from the board's flash boot sector. </para>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4752 </listitem>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4753 </itemizedlist></para>
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jlarmour
parents:
diff changeset
4754 </sect2>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4755 <sect2>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4756 <title>Initial Installation Method </title>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4757 <para>Program the ROM RedBoot image into flash using an eprom programmer.</para>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4758
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jlarmour
parents:
diff changeset
4759 </sect2>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4760
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4761 <sect2>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4762 <title>Memory Maps </title>
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jlarmour
parents:
diff changeset
4763 <para>RedBoot sets up the following memory map on the EDK7708 board.<programlisting>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4764 Physical Address Range Description
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4765 ----------------------- -----------
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4766 0x80000000 - 0x8001ffff Flash (AT29LV1024)
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4767 0x88000000 - 0x881fffff DRAM
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4768 0xa4000000 - 0xa40000ff LED ON
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4769 0xb8000000 - 0xb80000ff LED ON
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4770 </programlisting></para>
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jlarmour
parents:
diff changeset
4771 </sect2>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4772 <sect2>
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jlarmour
parents:
diff changeset
4773 <title>Rebuilding RedBoot</title>
211
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parents: 210
diff changeset
4774
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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parents: 210
diff changeset
4775 <para>These shell variables provide the platform-specific information
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
4776 needed for building RedBoot according to the procedure described in
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
4777 <xref linkend="Rebuilding-Redboot">:
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
4778 <programlisting>
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jlarmour
parents: 210
diff changeset
4779 export TARGET=edk7708
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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parents: 210
diff changeset
4780 export ARCH_DIR=sh
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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parents: 210
diff changeset
4781 export PLATFORM_DIR=edk7708
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
4782 </programlisting>
208
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jlarmour
parents:
diff changeset
4783 </para>
211
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jlarmour
parents: 210
diff changeset
4784
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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parents: 210
diff changeset
4785 <para>The names of configuration files are listed above with the
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
4786 description of the associated modes.</para>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
4787
208
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4788 </sect2>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4789 </sect1>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4790
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4791 <?Pub _newpage>
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jlarmour
parents:
diff changeset
4792 <sect1 id="se7709">
211
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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parents: 210
diff changeset
4793 <title>SuperH/SH3(SH7709) Hitachi Solution Engine 7709</title>
208
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jlarmour
parents:
diff changeset
4794 <sect2>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4795 <title>Overview</title>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4796 <para><indexterm><primary>Hitachi SH SE7709</primary><secondary>installing
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4797 and testing</secondary></indexterm><indexterm><primary>installing and testing
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4798 </primary><secondary>Hitachi SH SE7709</secondary></indexterm>This
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4799 description covers the MS7709SE01 variant. See <xref linkend="se77x9">
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4800 for instructions for the MS7729SE01 and MS7709SSE0101 variants.</para>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4801
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4802 <para>RedBoot uses
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4803 the COM1 and COM2 serial ports. The default serial port settings are 38400,8,N,1.
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4804 Ethernet is also supported using the 10-base T connector. </para>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4805 <para>Management of onboard flash is also supported. Two basic RedBoot configurations
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4806 are supported: <itemizedlist>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4807 <listitem><para>RedBoot running from RAM with RedBoot in the flash boot sector.
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4808 </para>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4809 </listitem>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4810 <listitem><para>RedBoot running from the board's flash boot sector. </para>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4811 </listitem>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4812 </itemizedlist></para>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4813 </sect2>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4814 <sect2>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4815 <title>Initial Installation Method </title>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4816 <para>The Solution Engine ships with the Hitachi boot monitor in EPROM
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4817 which allows for initial programming of RedBoot:</para>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4818
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4819 <orderedlist>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4820 <listitem><para>Set switch SW4-1 to ON [boot from EPROM]</para>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4821 </listitem>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4822 <listitem><para>Connect a serial cable to CN1 (SCI) and power up the board.</para>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4823 </listitem>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4824 <listitem><para>After the boot monitor banner, invoke the flash
211
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parents: 210
diff changeset
4825 download/program command:<screen>Ready &gt;fl</screen></para>
208
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4826 </listitem>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4827 <listitem><para>The monitor should now ask for input:
211
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
4828 <screen>Flash ROM data copy to RAM
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
4829 Please Send A S-format Record</screen>At this point copy the
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
4830 RedBoot ROM SREC file to the serial port:<screen>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
4831 $ cat redboot_SE7709RP_ROM.eprom.srec &gt /dev/ttyS0</screen>Eventually you
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
4832 should see something like<screen>Start Addrs = A1000000
208
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4833 End Addrs = A1xxxxxx
211
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
jlarmour
parents: 210
diff changeset
4834 Transfer complete</screen> from the monitor.
208
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4835 </para></listitem>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4836 <listitem><para>Set switch SW4-1 to OFF [boot from flash] and reboot the board. You
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4837 should now see the RedBoot banner.</para>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4838 </listitem>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4839 </orderedlist>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4840 </sect2>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4841 <sect2>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4842 <title>Special RedBoot Commands </title>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4843 <para>The <command>exec</command> command which allows the loading
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4844 and execution of Linux kernels
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4845 is supported for this board (see <xref linkend="executing-programs">). The <command>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4846 exec</command> parameters used for the SE77x9 are:</para>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4847 <variablelist>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4848 <varlistentry>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4849 <term>-b <replaceable>&lt;addr></replaceable></term>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4850 <listitem><para>Parameter block address. This is normally the first
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4851 page of the kernel image and defaults to 0x8c101000</para></listitem></varlistentry>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4852
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4853 <varlistentry><term>-i <replaceable>&lt;addr></replaceable></term>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4854 <listitem><para>Start address of initrd
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4855 image</para></listitem></varlistentry>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4856
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4857 <varlistentry><term>-j <replaceable>&lt;size></replaceable></term>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4858 <listitem><para>Size of initrd image</para></listitem></varlistentry>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4859
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4860 <varlistentry><term>-c <replaceable>"args"</replaceable></term>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4861 <listitem><para>Kernel arguments string</para></listitem></varlistentry>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4862
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4863 <varlistentry><term>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4864 -m <replaceable>&lt;flags></replaceable></term>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4865 <listitem><para>Mount rdonly flags. If set to a non-zero value the
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4866 root partition will be mounted read-only.</para></listitem></varlistentry>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4867
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4868 <varlistentry><term>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4869 -f <replaceable>&lt;flags></replaceable></term>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4870 <listitem><para>RAM disk flags. Should normally be 0x4000</para></listitem></varlistentry>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4871
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4872 <varlistentry><term>-r <replaceable>&lt;device number></replaceable></term>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4873 <listitem><para>Root device specification. /dev/ram is 0x0101</para></listitem></varlistentry>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4874
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4875 <varlistentry><term>-l <replaceable>&lt;type></replaceable></term>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4876 <listitem><para>Loader type</para></listitem></varlistentry>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4877
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4878 </variablelist>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4879
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
4880 <para>Finally the kernel entry address can be specified as an optional
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parents:
diff changeset
4881 argument. The default is 0x8c102000</para>
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parents:
diff changeset
4882
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parents:
diff changeset
4883 <para>
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parents:
diff changeset
4884 For the the SE77x9, Linux by default expects to be loaded at
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parents:
diff changeset
4885 0x8c001000 which conflicts with the data space used by RedBoot.
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parents:
diff changeset
4886 To work around this, either change the CONFIG_MEMORY_START kernel
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parents:
diff changeset
4887 option to a higher address, or use the compressed kernel image and load
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parents:
diff changeset
4888 it at a higher address. For example, setting CONFIG_MEMORY_START to
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
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parents:
diff changeset
4889 0x8c100000, the kernel expects to be loaded at address 0x8c101000 with
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jlarmour
parents:
diff changeset
4890 the entry point at 0x8c102000.
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jlarmour
parents:
diff changeset
4891 </para>
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parents:
diff changeset
4892
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parents:
diff changeset
4893 </sect2>
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parents:
diff changeset
4894 <sect2>
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parents:
diff changeset
4895 <title>Memory Maps </title>
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parents:
diff changeset
4896 <para>RedBoot sets up the following memory map on the SE77x9 board.<programlisting>
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jlarmour
parents:
diff changeset
4897 Physical Address Range Description
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jlarmour
parents:
diff changeset
4898 ----------------------- -----------
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parents:
diff changeset
4899 0x80000000 - 0x803fffff Flash (MBM29LV160)
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parents:
diff changeset
4900 0x81000000 - 0x813fffff EPROM (M27C800)
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parents:
diff changeset
4901 0x8c000000 - 0x8dffffff DRAM
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parents:
diff changeset
4902 0xb0000000 - 0xb03fffff Ethernet (DP83902A)
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parents:
diff changeset
4903 0xb0800000 - 0xb08fffff 16C552A
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jlarmour
parents:
diff changeset
4904 0xb1000000 - 0xb100ffff Switches
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jlarmour
parents:
diff changeset
4905 0xb1800000 - 0xb18fffff LEDs
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parents:
diff changeset
4906 0xb8000000 - 0xbbffffff PCMCIA (MaruBun)
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parents:
diff changeset
4907 </programlisting></para>
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parents:
diff changeset
4908 </sect2>
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parents:
diff changeset
4909 <sect2>
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parents:
diff changeset
4910 <title>Ethernet Driver</title>
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parents:
diff changeset
4911 <para>The ethernet driver uses a hardwired ESA which can, at present,
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jlarmour
parents:
diff changeset
4912 only be changed in CDL.</para>
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parents:
diff changeset
4913 </sect2>
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parents:
diff changeset
4914 <sect2>
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parents:
diff changeset
4915 <title>Rebuilding RedBoot</title>
211
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diff changeset
4916
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diff changeset
4917 <para>These shell variables provide the platform-specific information
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parents: 210
diff changeset
4918 needed for building RedBoot according to the procedure described in
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diff changeset
4919 <xref linkend="Rebuilding-Redboot">:
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parents: 210
diff changeset
4920 <programlisting>
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parents: 210
diff changeset
4921 export TARGET=se77x9
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diff changeset
4922 export ARCH_DIR=sh
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diff changeset
4923 export PLATFORM_DIR=se77x9
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parents: 210
diff changeset
4924 </programlisting>
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parents: 210
diff changeset
4925 </para>
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parents: 210
diff changeset
4926
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parents: 210
diff changeset
4927 <para>The names of configuration files are listed above with the
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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parents: 210
diff changeset
4928 description of the associated modes.</para>
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parents: 210
diff changeset
4929 </sect2>
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parents: 210
diff changeset
4930 </sect1>
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diff changeset
4931
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parents: 210
diff changeset
4932 <?Pub _newpage>
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parents: 210
diff changeset
4933 <sect1 id="hs7729pci">
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parents: 210
diff changeset
4934 <title>SuperH/SH3(SH7729) Hitachi HS7729PCI</title>
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diff changeset
4935 <sect2>
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parents: 210
diff changeset
4936 <title>Overview</title>
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diff changeset
4937 <para><indexterm><primary>Hitachi SH HS7729PCI</primary><secondary>installing
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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parents: 210
diff changeset
4938 and testing</secondary></indexterm><indexterm><primary>installing and testing
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parents: 210
diff changeset
4939 </primary><secondary>Hitachi SH HS7729PCI</secondary></indexterm>RedBoot uses
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parents: 210
diff changeset
4940 the COM1 and COM2 serial ports (and the debug port on the
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parents: 210
diff changeset
4941 motherboard).
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parents: 210
diff changeset
4942 The default serial port settings are 38400,8,N,1.
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parents: 210
diff changeset
4943 Ethernet is also supported using a D-Link DFE-530TX PCI plugin card.</para>
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diff changeset
4944 <para>Management of onboard flash is also supported. Two basic RedBoot configurations
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parents: 210
diff changeset
4945 are supported: <itemizedlist>
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diff changeset
4946 <listitem><para>RedBoot running from RAM with RedBoot in the flash boot sector.
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diff changeset
4947 </para>
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parents: 210
diff changeset
4948 </listitem>
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parents: 210
diff changeset
4949 <listitem><para>RedBoot running from the board's flash boot sector. </para>
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parents: 210
diff changeset
4950 </listitem>
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parents: 210
diff changeset
4951 </itemizedlist></para>
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parents: 210
diff changeset
4952 </sect2>
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parents: 210
diff changeset
4953 <sect2>
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parents: 210
diff changeset
4954 <title>Initial Installation Method </title>
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diff changeset
4955 <para>A copy of the ROM startup version of RedBoot must be programmed
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parents: 210
diff changeset
4956 into the two EPROMs. Two files with a split version of the ROM image is
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parents: 210
diff changeset
4957 provided: it is also possible to recreate these from the redboot.bin
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diff changeset
4958 file, but requires the split_word.c program in
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diff changeset
4959 hal/sh/hs7729pci/<replaceable>VERSION</replaceable>/misc to be built
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parents: 210
diff changeset
4960 and executed with the redboot.bin filename as sole argument.</para>
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parents: 210
diff changeset
4961
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diff changeset
4962 <para>After doing this it is advised that another ROM version of
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parents: 210
diff changeset
4963 RedBoot is programmed into the flash, and that copy be used for
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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parents: 210
diff changeset
4964 booting the board. This allows for software programmed updates of
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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parents: 210
diff changeset
4965 RedBoot instead of having to reprogram the EPROMs.</para>
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diff changeset
4966
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parents: 210
diff changeset
4967 <orderedlist>
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parents: 210
diff changeset
4968 <listitem><para>Program the EPROMs with RedBoot. The .lo image should
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parents: 210
diff changeset
4969 go in socket M1 and the .hi image in socket M2.
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diff changeset
4970 </para>
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diff changeset
4971 </listitem>
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diff changeset
4972 <listitem><para>Set switch SW1-6 to ON [boot from EPROM]</para>
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diff changeset
4973 </listitem>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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diff changeset
4974 <listitem><para>Follow the instructions under Flash management for
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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parents: 210
diff changeset
4975 updating the flash copy of RedBoot, but use
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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diff changeset
4976 <screen>-f 0x80400000</screen> due to setting of
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parents: 210
diff changeset
4977 the SW1-6 switch.</para>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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parents: 210
diff changeset
4978 </listitem>
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diff changeset
4979 <listitem><para>Set switch SW1-6 to OFF [boot from flash] and reboot the board. You
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diff changeset
4980 should now see the RedBoot banner. At this time you may want to issue
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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parents: 210
diff changeset
4981 the command <command>fis init</command> to initialize
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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diff changeset
4982 the flash table with the correct addresses.</para>
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parents: 210
diff changeset
4983 </listitem>
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parents: 210
diff changeset
4984 </orderedlist>
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parents: 210
diff changeset
4985
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diff changeset
4986
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diff changeset
4987 </sect2>
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parents: 210
diff changeset
4988 <sect2>
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diff changeset
4989 <title>Special RedBoot Commands </title>
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diff changeset
4990 <para>The <command>exec</command> command which allows the loading
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diff changeset
4991 and execution of Linux kernels
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diff changeset
4992 is supported for this board (see <xref linkend="executing-programs">). The <command>
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diff changeset
4993 exec</command> parameters used for the HS7729PCI are:</para>
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diff changeset
4994 <variablelist>
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parents: 210
diff changeset
4995 <varlistentry>
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diff changeset
4996 <term>-b <replaceable>&lt;addr></replaceable></term>
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diff changeset
4997 <listitem><para>Parameter block address. This is normally the first
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diff changeset
4998 page of the kernel image and defaults to 0x8c101000</para></listitem></varlistentry>
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diff changeset
4999
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diff changeset
5000 <varlistentry><term>-i <replaceable>&lt;addr></replaceable></term>
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diff changeset
5001 <listitem><para>Start address of initrd
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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diff changeset
5002 image</para></listitem></varlistentry>
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parents: 210
diff changeset
5003
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diff changeset
5004 <varlistentry><term>-j <replaceable>&lt;size></replaceable></term>
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diff changeset
5005 <listitem><para>Size of initrd image</para></listitem></varlistentry>
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diff changeset
5006
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diff changeset
5007 <varlistentry><term>-c <replaceable>"args"</replaceable></term>
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diff changeset
5008 <listitem><para>Kernel arguments string</para></listitem></varlistentry>
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diff changeset
5009
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diff changeset
5010 <varlistentry><term>
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diff changeset
5011 -m <replaceable>&lt;flags></replaceable></term>
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diff changeset
5012 <listitem><para>Mount rdonly flags. If set to a non-zero value the
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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diff changeset
5013 root partition will be mounted read-only.</para></listitem></varlistentry>
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diff changeset
5014
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diff changeset
5015 <varlistentry><term>
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5016 -f <replaceable>&lt;flags></replaceable></term>
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5017 <listitem><para>RAM disk flags. Should normally be 0x4000</para></listitem></varlistentry>
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5018
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5019 <varlistentry><term>-r <replaceable>&lt;device number></replaceable></term>
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5020 <listitem><para>Root device specification. /dev/ram is 0x0101</para></listitem></varlistentry>
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5021
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5022 <varlistentry><term>-l <replaceable>&lt;type></replaceable></term>
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5023 <listitem><para>Loader type</para></listitem></varlistentry>
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5024
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5025 </variablelist>
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5026
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5027 <para>Finally the kernel entry address can be specified as an optional
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5028 argument. The default is 0x8c102000</para>
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5029
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5030 <para>
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5031 On the HS7729PCI, Linux expects to be loaded at address 0x8c101000 with
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5032 the entry point at 0x8c102000. This is configurable in the kernel
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5033 using the CONFIG_MEMORY_START option.
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5034 </para>
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5035
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5036 </sect2>
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5037 <sect2>
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5038 <title>Memory Maps </title>
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5039 <para>RedBoot sets up the following memory map on the HS7729PCI board.<programlisting>
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5040 Physical Address Range Description
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diff changeset
5041 ----------------------- -----------
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5042 0x80000000 - 0x803fffff Flash (MBM29LV160)
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5043 0x80400000 - 0x807fffff EPROM (M27C800)
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5044 0x82000000 - 0x82ffffff SRAM
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diff changeset
5045 0x89000000 - 0x89ffffff SRAM
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diff changeset
5046 0x8c000000 - 0x8fffffff SDRAM
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diff changeset
5047 0xa8000000 - 0xa800ffff SuperIO (FDC37C935A)
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5048 0xa8400000 - 0xa87fffff USB function (ML60851C)
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5049 0xa8800000 - 0xa8bfffff USB host (SL11HT)
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5050 0xa8c00000 - 0xa8c3ffff Switches
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diff changeset
5051 0xa8c40000 - 0xa8c7ffff LEDs
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diff changeset
5052 0xa8c80000 - 0xa8cfffff Interrupt controller
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5053 0xb0000000 - 0xb3ffffff PCI (SD0001)
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diff changeset
5054 0xb8000000 - 0xbbffffff PCMCIA (MaruBun)
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diff changeset
5055 </programlisting></para>
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5056 </sect2>
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diff changeset
5057 <sect2>
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5058 <title>Rebuilding RedBoot</title>
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5059
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5060 <para>These shell variables provide the platform-specific information
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diff changeset
5061 needed for building RedBoot according to the procedure described in
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diff changeset
5062 <xref linkend="Rebuilding-Redboot">:
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5063 <programlisting>
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5064 export TARGET=hs7729pci
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5065 export ARCH_DIR=sh
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5066 export PLATFORM_DIR=hs7729pci
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5067 </programlisting>
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5068 </para>
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5069
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5070 <para>The names of configuration files are listed above with the
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diff changeset
5071 description of the associated modes.</para>
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5072 </sect2>
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5073 </sect1>
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5074
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diff changeset
5075 <?Pub _newpage>
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diff changeset
5076 <sect1 id="se77x9">
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diff changeset
5077 <title>SuperH/SH3(SH77X9) Hitachi Solution Engine 77X9</title>
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5078 <sect2>
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diff changeset
5079 <title>Overview</title>
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5080 <para><indexterm><primary>Hitachi SH SE77X9</primary><secondary>installing
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diff changeset
5081 and testing</secondary></indexterm><indexterm><primary>installing and testing
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5082 </primary><secondary>Hitachi SH SE77X9</secondary></indexterm>This
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diff changeset
5083 description covers the MS7729SE01 and MS7709SSE0101 variants. See <xref linkend="se7709">
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diff changeset
5084 for instructions for the MS7709SE01 variant.</para>
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diff changeset
5085
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5086 <para>RedBoot uses
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diff changeset
5087 the COM1 and COM2 serial ports. The default serial port settings are 38400,8,N,1.
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diff changeset
5088 Ethernet is also supported using the 10-base T connector. </para>
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5089 <para>Management of onboard flash is also supported. Two basic RedBoot configurations
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diff changeset
5090 are supported: <itemizedlist>
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5091 <listitem><para>RedBoot running from RAM with RedBoot in the flash boot sector.
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5092 </para>
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5093 </listitem>
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5094 <listitem><para>RedBoot running from the board's flash boot sector. </para>
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5095 </listitem>
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5096 </itemizedlist></para>
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5097 </sect2>
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diff changeset
5098 <sect2>
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diff changeset
5099 <title>Initial Installation Method </title>
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5100 <para>The Solution Engine ships with the Hitachi boot monitor in EPROM
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5101 which allows for initial programming of RedBoot:</para>
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diff changeset
5102
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diff changeset
5103 <orderedlist>
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5104 <listitem><para>Set switches SW4-3 and SW4-4 to ON [boot from EPROM]</para>
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5105 </listitem>
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5106 <listitem><para>Connect a serial cable to COM2 and power up the board.</para>
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5107 </listitem>
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5108 <listitem><para>After the boot monitor banner, invoke the flash
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diff changeset
5109 download/program command:<screen>Ready &gt;fl</screen></para>
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5110 </listitem>
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5111 <listitem><para>The monitor should now ask for input:
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diff changeset
5112 <screen>Flash ROM data copy to RAM
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diff changeset
5113 Please Send A S-format Record</screen>At this point copy the
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diff changeset
5114 RedBoot ROM SREC file to the serial port:<screen>
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diff changeset
5115 $ cat redboot_ROM.eprom.srec &gt /dev/ttyS0</screen>Eventually you
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diff changeset
5116 should see something like<screen>Start Addrs = A1000000
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diff changeset
5117 End Addrs = A1xxxxxx
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5118 Transfer complete</screen> from the monitor.
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5119 </para></listitem>
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5120 <listitem><para>Set switch SW4-3 to OFF [boot from flash] and reboot the board. You
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diff changeset
5121 should now see the RedBoot banner.</para>
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diff changeset
5122 </listitem>
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5123 </orderedlist>
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5124 </sect2>
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diff changeset
5125 <sect2>
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5126 <title>Special RedBoot Commands </title>
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diff changeset
5127 <para>The <command>exec</command> command which allows the loading
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diff changeset
5128 and execution of Linux kernels
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diff changeset
5129 is supported for this board (see <xref linkend="executing-programs">). The <command>
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diff changeset
5130 exec</command> parameters used for the SE77x9 are:</para>
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5131 <variablelist>
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diff changeset
5132 <varlistentry>
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5133 <term>-b <replaceable>&lt;addr></replaceable></term>
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5134 <listitem><para>Parameter block address. This is normally the first
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diff changeset
5135 page of the kernel image and defaults to 0x8c101000</para></listitem></varlistentry>
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5136
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5137 <varlistentry><term>-i <replaceable>&lt;addr></replaceable></term>
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diff changeset
5138 <listitem><para>Start address of initrd
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diff changeset
5139 image</para></listitem></varlistentry>
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diff changeset
5140
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diff changeset
5141 <varlistentry><term>-j <replaceable>&lt;size></replaceable></term>
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diff changeset
5142 <listitem><para>Size of initrd image</para></listitem></varlistentry>
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diff changeset
5143
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diff changeset
5144 <varlistentry><term>-c <replaceable>"args"</replaceable></term>
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diff changeset
5145 <listitem><para>Kernel arguments string</para></listitem></varlistentry>
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diff changeset
5146
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diff changeset
5147 <varlistentry><term>
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diff changeset
5148 -m <replaceable>&lt;flags></replaceable></term>
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diff changeset
5149 <listitem><para>Mount rdonly flags. If set to a non-zero value the
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diff changeset
5150 root partition will be mounted read-only.</para></listitem></varlistentry>
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diff changeset
5151
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diff changeset
5152 <varlistentry><term>
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diff changeset
5153 -f <replaceable>&lt;flags></replaceable></term>
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diff changeset
5154 <listitem><para>RAM disk flags. Should normally be 0x4000</para></listitem></varlistentry>
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diff changeset
5155
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diff changeset
5156 <varlistentry><term>-r <replaceable>&lt;device number></replaceable></term>
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diff changeset
5157 <listitem><para>Root device specification. /dev/ram is 0x0101</para></listitem></varlistentry>
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diff changeset
5158
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diff changeset
5159 <varlistentry><term>-l <replaceable>&lt;type></replaceable></term>
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diff changeset
5160 <listitem><para>Loader type</para></listitem></varlistentry>
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diff changeset
5161
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diff changeset
5162 </variablelist>
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diff changeset
5163
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diff changeset
5164 <para>Finally the kernel entry address can be specified as an optional
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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diff changeset
5165 argument. The default is 0x8c102000</para>
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diff changeset
5166
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diff changeset
5167 <para>
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diff changeset
5168 On the SE77x9, Linux expects to be loaded at address 0x8c101000 with
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diff changeset
5169 the entry point at 0x8c102000. This is configurable in the kernel
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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diff changeset
5170 using the CONFIG_MEMORY_START option.
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diff changeset
5171 </para>
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5172
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diff changeset
5173 </sect2>
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diff changeset
5174 <sect2>
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diff changeset
5175 <title>Memory Maps </title>
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5176 <para>RedBoot sets up the following memory map on the SE77x9 board.<programlisting>
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diff changeset
5177 Physical Address Range Description
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parents: 210
diff changeset
5178 ----------------------- -----------
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diff changeset
5179 0x80000000 - 0x803fffff Flash (MBM29LV160)
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diff changeset
5180 0x81000000 - 0x813fffff EPROM (M27C800)
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parents: 210
diff changeset
5181 0x8c000000 - 0x8dffffff SDRAM
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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diff changeset
5182 0xb0000000 - 0xb03fffff Ethernet (DP83902A)
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diff changeset
5183 0xb0400000 - 0xb07fffff SuperIO (FDC37C935A)
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diff changeset
5184 0xb0800000 - 0xb0bfffff Switches
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parents: 210
diff changeset
5185 0xb0c00000 - 0xbfffffff LEDs
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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diff changeset
5186 0xb1800000 - 0xb1bfffff PCMCIA (MaruBun)
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diff changeset
5187 </programlisting></para>
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diff changeset
5188 </sect2>
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diff changeset
5189 <sect2>
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diff changeset
5190 <title>Ethernet Driver</title>
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diff changeset
5191 <para>The ethernet driver uses a hardwired ESA which can, at present,
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diff changeset
5192 only be changed in CDL.</para>
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diff changeset
5193 </sect2>
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diff changeset
5194 <sect2>
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diff changeset
5195 <title>Rebuilding RedBoot</title>
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diff changeset
5196
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diff changeset
5197 <para>These shell variables provide the platform-specific information
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diff changeset
5198 needed for building RedBoot according to the procedure described in
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diff changeset
5199 <xref linkend="Rebuilding-Redboot">:
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diff changeset
5200 <programlisting>
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diff changeset
5201 export TARGET=se77x9
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diff changeset
5202 export ARCH_DIR=sh
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diff changeset
5203 export PLATFORM_DIR=se77x9
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diff changeset
5204 </programlisting>
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diff changeset
5205 </para>
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diff changeset
5206
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diff changeset
5207 <para>The names of configuration files are listed above with the
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diff changeset
5208 description of the associated modes.</para>
208
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diff changeset
5209 </sect2>
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jlarmour
parents:
diff changeset
5210 </sect1>
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parents:
diff changeset
5211
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parents:
diff changeset
5212 <?Pub _newpage>
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diff changeset
5213 <sect1 id="se7751">
211
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diff changeset
5214 <title>SuperH/SH4(SH7751) Hitachi Solution Engine 7751</title>
208
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5215 <sect2>
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jlarmour
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diff changeset
5216 <title>Overview</title>
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jlarmour
parents:
diff changeset
5217 <para><indexterm><primary>Hitachi SH SE7751</primary><secondary>installing
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jlarmour
parents:
diff changeset
5218 and testing</secondary></indexterm><indexterm><primary>installing and testing
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jlarmour
parents:
diff changeset
5219 </primary><secondary>Hitachi SH SE7751</secondary></indexterm>RedBoot uses
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jlarmour
parents:
diff changeset
5220 the COM1 serial port. The default serial port settings are 38400,8,N,1.
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jlarmour
parents:
diff changeset
5221 Ethernet is also supported using the 10-base T connector. </para>
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parents:
diff changeset
5222 <para>Management of onboard flash is also supported. Two basic RedBoot configurations
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parents:
diff changeset
5223 are supported: <itemizedlist>
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jlarmour
parents:
diff changeset
5224 <listitem><para>RedBoot running from RAM with RedBoot in the flash boot sector.
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parents:
diff changeset
5225 </para>
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diff changeset
5226 </listitem>
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diff changeset
5227 <listitem><para>RedBoot running from the board's flash boot sector. </para>
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jlarmour
parents:
diff changeset
5228 </listitem>
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jlarmour
parents:
diff changeset
5229 </itemizedlist></para>
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jlarmour
parents:
diff changeset
5230 </sect2>
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jlarmour
parents:
diff changeset
5231 <sect2>
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jlarmour
parents:
diff changeset
5232 <title>Initial Installation Method </title>
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jlarmour
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diff changeset
5233 <para>The Solution Engine ships with the Hitachi boot monitor in EPROM
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5234 which allows for initial programming of RedBoot:</para>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5235
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
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diff changeset
5236 <orderedlist>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
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diff changeset
5237 <listitem><para>Set switches SW5-3 and SW5-4 to ON [boot from EPROM]</para>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5238 </listitem>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5239 <listitem><para>Connect a serial cable to COM1 and power up the board.</para>
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jlarmour
parents:
diff changeset
5240 </listitem>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
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diff changeset
5241 <listitem><para>After the boot monitor banner, invoke the flash
211
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diff changeset
5242 download/program command:<screen>Ready &gt;fl</screen></para>
208
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diff changeset
5243 </listitem>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
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diff changeset
5244 <listitem><para>The monitor should now ask for input:
211
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diff changeset
5245 <screen>Flash ROM data copy to RAM
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diff changeset
5246 Please Send A S-format Record</screen>At this point copy the
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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diff changeset
5247 RedBoot ROM SREC file to the serial port:<screen>
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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diff changeset
5248 $ cat redboot_ROM.eprom.srec &gt /dev/ttyS0</screen>Eventually you
6eb55882e01c Merge from eCos master repository on 2002-05-29-16:32:18-BST
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diff changeset
5249 should see something like<screen>Start Addrs = A1000000
208
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parents:
diff changeset
5250 End Addrs = A1xxxxxx
211
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diff changeset
5251 Transfer complete</screen> from the monitor.
208
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diff changeset
5252 </para></listitem>
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parents:
diff changeset
5253 <listitem><para>Set switch SW5-3 to OFF [boot from flash] and reboot the board. You
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5254 should now see the RedBoot banner.</para>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5255 </listitem>
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jlarmour
parents:
diff changeset
5256 </orderedlist>
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jlarmour
parents:
diff changeset
5257 </sect2>
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jlarmour
parents:
diff changeset
5258 <sect2>
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jlarmour
parents:
diff changeset
5259 <title>Special RedBoot Commands </title>
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jlarmour
parents:
diff changeset
5260 <para>The <command>exec</command> command which allows the loading
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5261 and execution of Linux kernels
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5262 is supported for this board (see <xref linkend="executing-programs">). The <command>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5263 exec</command> parameters used for the SE7751 are:</para>
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jlarmour
parents:
diff changeset
5264 <variablelist>
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jlarmour
parents:
diff changeset
5265 <varlistentry>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5266 <term>-b <replaceable>&lt;addr></replaceable></term>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5267 <listitem><para>Parameter block address. This is normally the first
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5268 page of the kernel image and defaults to 0x8c101000</para></listitem></varlistentry>
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jlarmour
parents:
diff changeset
5269
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5270 <varlistentry><term>-i <replaceable>&lt;addr></replaceable></term>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5271 <listitem><para>Start address of initrd
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5272 image</para></listitem></varlistentry>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5273
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5274 <varlistentry><term>-j <replaceable>&lt;size></replaceable></term>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5275 <listitem><para>Size of initrd image</para></listitem></varlistentry>
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jlarmour
parents:
diff changeset
5276
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5277 <varlistentry><term>-c <replaceable>"args"</replaceable></term>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5278 <listitem><para>Kernel arguments string</para></listitem></varlistentry>
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jlarmour
parents:
diff changeset
5279
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5280 <varlistentry><term>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5281 -m <replaceable>&lt;flags></replaceable></term>
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5282 <listitem><para>Mount rdonly flags. If set to a non-zero value the
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents:
diff changeset
5283 root partition will be mounted read-only.</para></listitem></varlistentry>
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parents:
diff changeset
5284
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jlarmour
parents:
diff changeset
5285 <varlistentry><term>
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jlarmour
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diff changeset
5286 -f <replaceable>&lt;flags></replaceable></term>
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diff changeset
5287 <listitem><para>RAM disk flags. Should normally be 0x4000</para></listitem></varlistentry>
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jlarmour
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diff changeset
5288
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diff changeset
5289 <varlistentry><term>-r <replaceable>&lt;device number></replaceable></term>
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jlarmour
parents:
diff changeset
5290 <listitem><para>Root device specification. /dev/ram is 0x0101</para></listitem></varlistentry>
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jlarmour
parents:
diff changeset
5291
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parents:
diff changeset
5292 <varlistentry><term>-l <replaceable>&lt;type></replaceable></term>
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diff changeset
5293 <listitem><para>Loader type</para></listitem></varlistentry>
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diff changeset
5294
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jlarmour
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diff changeset
5295 </variablelist>
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diff changeset
5296
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diff changeset
5297 <para>Finally the kernel entry address can be specified as an optional
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jlarmour
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diff changeset
5298 argument. The default is 0x8c102000</para>
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diff changeset
5299
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diff changeset
5300 <para>
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diff changeset
5301 On the SE7751, Linux expects to be loaded at address 0x8c101000 with
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jlarmour
parents:
diff changeset
5302 the entry point at 0x8c102000. This is configurable in the kernel
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jlarmour
parents:
diff changeset
5303 using the CONFIG_MEMORY_START option.
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jlarmour
parents:
diff changeset
5304 </para>
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jlarmour
parents:
diff changeset
5305
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jlarmour
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diff changeset
5306 </sect2>
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jlarmour
parents:
diff changeset
5307 <sect2>
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jlarmour
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5308 <title>Memory Maps </title>
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diff changeset
5309 <para>RedBoot sets up the following memory map on the SE7751 board.<programlisting>
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jlarmour
parents:
diff changeset
5310 Physical Address Range Description
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jlarmour
parents:
diff changeset
5311 ----------------------- -----------
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diff changeset
5312 0x80000000 - 0x803fffff Flash (MBM29LV160)
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diff changeset
5313 0x81000000 - 0x813fffff EPROM (M27C800)
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jlarmour
parents:
diff changeset
5314 0x8c000000 - 0x8fffffff SDRAM
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jlarmour
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diff changeset
5315 0xb8000000 - 0xb8ffffff PCMCIA (MaruBun)
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jlarmour
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diff changeset
5316 0xb9000000 - 0xb9ffffff Switches
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jlarmour
parents:
diff changeset
5317 0xba000000 - 0xbaffffff LEDs
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jlarmour
parents:
diff changeset
5318 0xbd000000 - 0xbdffffff PCI MEM space
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jlarmour
parents:
diff changeset
5319 0xbe200000 - 0xbe23ffff PCI Ctrl space
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jlarmour
parents:
diff changeset
5320 0xbe240000 - 0xbe27ffff PCI IO space
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jlarmour
parents:
diff changeset
5321 </programlisting></para>
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parents:
diff changeset
5322 </sect2>
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jlarmour
parents:
diff changeset
5323 <sect2>
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diff changeset
5324 <title>Ethernet Driver</title>
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diff changeset
5325 <para>The ethernet driver uses a hardwired ESA which can, at present,
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jlarmour
parents:
diff changeset
5326 only be changed in CDL.</para>
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jlarmour
parents:
diff changeset
5327 </sect2>
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jlarmour
parents:
diff changeset
5328 <sect2>
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parents:
diff changeset
5329 <title>Rebuilding RedBoot</title>
211
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parents: 210
diff changeset
5330
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diff changeset
5331 <para>These shell variables provide the platform-specific information
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diff changeset
5332 needed for building RedBoot according to the procedure described in
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parents: 210
diff changeset
5333 <xref linkend="Rebuilding-Redboot">:
208
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parents:
diff changeset
5334 <programlisting>
211
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parents: 210
diff changeset
5335 export TARGET=se7751
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parents: 210
diff changeset
5336 export ARCH_DIR=sh
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parents: 210
diff changeset
5337 export PLATFORM_DIR=se7751
208
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parents:
diff changeset
5338 </programlisting>
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diff changeset
5339 </para>
211
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parents: 210
diff changeset
5340
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diff changeset
5341 <para>The names of configuration files are listed above with the
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parents: 210
diff changeset
5342 description of the associated modes.</para>
208
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diff changeset
5343 </sect2>
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parents:
diff changeset
5344 </sect1>
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diff changeset
5345
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parents:
diff changeset
5346 </chapter>