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annotate packages/hal/synth/i386linux/current/src/context.S @ 2729:74dbf4c3f2e1 after-copyright-change-20090129

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Update all copyright banners to reflect FSF ownership; fix and improve licence text.
author jlarmour
date Thu, 29 Jan 2009 17:47:46 +0000
parents d2c90368aeef
children
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1 ##=============================================================================
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2 ##
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3 ## context.S
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4 ##
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5 ## x86 thread context manipulation.
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6 ##
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7 ##=============================================================================
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8 ## ####ECOSGPLCOPYRIGHTBEGIN####
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9 ## -------------------------------------------
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10 ## This file is part of eCos, the Embedded Configurable Operating System.
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11 ## Copyright (C) 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
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12 ##
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13 ## eCos is free software; you can redistribute it and/or modify it under
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14 ## the terms of the GNU General Public License as published by the Free
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15 ## Software Foundation; either version 2 or (at your option) any later
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16 ## version.
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17 ##
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18 ## eCos is distributed in the hope that it will be useful, but WITHOUT
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19 ## ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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20 ## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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21 ## for more details.
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22 ##
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23 ## You should have received a copy of the GNU General Public License
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24 ## along with eCos; if not, write to the Free Software Foundation, Inc.,
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25 ## 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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26 ##
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27 ## As a special exception, if other files instantiate templates or use
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28 ## macros or inline functions from this file, or you compile this file
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29 ## and link it with other works to produce a work based on this file,
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30 ## this file does not by itself cause the resulting work to be covered by
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31 ## the GNU General Public License. However the source code for this file
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32 ## must still be made available in accordance with section (3) of the GNU
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33 ## General Public License v2.
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34 ##
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35 ## This exception does not invalidate any other reasons why a work based
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36 ## on this file might be covered by the GNU General Public License.
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37 ## -------------------------------------------
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38 ## ####ECOSGPLCOPYRIGHTEND####
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39 ##=============================================================================
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40 #######DESCRIPTIONBEGIN####
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41 ##
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42 ## Author(s): jskov
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43 ## Contributors:jskov, pjo, nickg, bartv
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44 ## Date: 1999-03-11
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45 ## Purpose: CPU-specific code
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46 ## Description: This file contains the code needed to manage the
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47 ## CPU on an i386/Linux synthetic target.
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48 ##
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49 ######DESCRIPTIONEND####
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50 ##
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51 ##=============================================================================
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52
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53 #include <cyg/hal/arch.inc>
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54
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55 #------------------------------------------------------------------------------
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56 # function declaration macro
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57
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58 #define FUNC_START(name) \
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59 .globl name; \
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60 name:
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61
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62 #------------------------------------------------------------------------------
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63 # Context switch and setjmp/longjmp support.
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64 # Based on PowerPC context.S, using data from SYSV ABI4, i386
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65 # supplement (page 37-38)
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66 # http://www.sco.com/products/layered/develop/devspecs/abi386-4.pdf
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67 #
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68 # There is no need to worry about saving floating point context. If
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69 # a switch occurs because of an interrupt/signal, the system will have
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70 # saved the fpu state already before the signal handler was invoked,
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71 # and the state will be returned when the signal handler returns i.e.
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72 # when the interrupted thread is reactivated. If a context switch is
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73 # voluntary, for example a call to cyg_thread_yield(), then according
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74 # to the calling conventions all fpu registers are CALL_USED_REGISTERS
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75 # (gcc/config/i386/i386.h) and will have been saved by the calling
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76 # code.
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77 #
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78 # FIXME: it may be appropriate to match eCos thread contexts
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79 # more closely onto Linux sigcontexts - that might facilitate
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80 # thread-aware debugging.
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81
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82 # hal_thread_switch_context
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83 # Switch thread contexts
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84 # : 0(%esp) : return address
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85 # : 4(%esp) : address of sp of next thread to execute
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86 # : 8(%esp) : address of sp save location of current thread
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87 #
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88 # %eax, %ecx, and %edx are ours to abuse.
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89
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90 .extern hal_interrupts_enabled
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91 .extern hal_enable_interrupts
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92
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93 FUNC_START(hal_thread_switch_context)
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94 movl 4(%esp),%eax # next context ptr
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95 movl 8(%esp),%edx # this context ptr
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96
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97 # Make room on the stack for the context
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98 movl %esp,%ecx # keep original SP
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99 sub $i386reg_context_size,%esp
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100
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101 # Save next context ptr in this context. Necessary because
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102 # hal_thread_load_context expects to find the ptr on the stack,
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103 # not in a register as on PPC.
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104 movl %eax,i386reg_next_context(%esp)
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105
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106 # Save registers
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107 movl %ecx,i386reg_esp(%esp) # original esp
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108 movl %ebp,i386reg_ebp(%esp)
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109 movl %ebx,i386reg_ebx(%esp)
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110 movl %esi,i386reg_esi(%esp)
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111 movl %edi,i386reg_edi(%esp)
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112
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113 # And interrupt state
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114 movl hal_interrupts_enabled,%eax
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115 movl %eax,i386reg_interrupts(%esp)
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116
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117 # Store the context ptr
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118 movl %esp,(%edx)
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119
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120 # Now fall through to hal_thread_load_context
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121
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122
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123 #------------------------------------------------------------------------------
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124 # hal_thread_load_context
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125 # Load thread context
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126 # : 4(%esp) = i386reg_next_context(%esp) = address of sp of thread to execute
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127 # Note that this function is also the second half of hal_thread_switch_context
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128 # and is simply dropped into from it.
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129 #
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130 # %eax, %ecx, and %edx are ours to abuse.
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131
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132 FUNC_START(hal_thread_load_context)
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133
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134 movl i386reg_next_context(%esp),%eax # get new context ptr
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135 movl (%eax),%eax
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136
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137 # Restore registers
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138 movl i386reg_ebp(%eax),%ebp
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139 movl i386reg_ebx(%eax),%ebx
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140 movl i386reg_esi(%eax),%esi
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141 movl i386reg_edi(%eax),%edi
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142 movl i386reg_esp(%eax),%esp
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143
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144 # And see what needs to happen about interrupts
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145 movl i386reg_interrupts(%eax),%eax
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146 cmpl hal_interrupts_enabled,%eax
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147 je interrupts_ok
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148
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149 # The saved interrupt state differs from the current one.
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150 # If interrupts are supposed to be enabled then invoke
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151 # hal_enable_interrupts. That can be done as a tail call.
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152 # If interrupts are supposed to be disabled then just
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153 # update the global variable.
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154 cmpl $0,%eax
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155 jne hal_enable_interrupts
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156 movl %eax,hal_interrupts_enabled
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157
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158 interrupts_ok:
161
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159 ret
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160
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161
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162 #------------------------------------------------------------------------------
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163 # HAL longjmp, setjmp implementations
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164 # hal_setjmp saves only to callee save registers ebp, ebx, esi, edi and
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165 # and esp+pc into buffer supplied in 4(esp)
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166 # Note: These definitions are repeated in hal_arch.h. If changes are required
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167 # remember to update both sets.
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168
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169 #define CYGARC_JMP_BUF_SP 0
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170 #define CYGARC_JMP_BUF_EBP 1
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171 #define CYGARC_JMP_BUF_EBX 2
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172 #define CYGARC_JMP_BUF_ESI 3
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173 #define CYGARC_JMP_BUF_EDI 4
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174 #define CYGARC_JMP_BUF_PC 5
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175
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176 #define CYGARC_JMP_BUF_SIZE 6
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177
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178 FUNC_START(hal_setjmp)
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179 # Get jmpbuf pointer
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180 movl 4(%esp),%eax
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181
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182 # Save regular registers
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183 movl %ebp,CYGARC_JMP_BUF_EBP*4(%eax)
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184 movl %ebx,CYGARC_JMP_BUF_EBX*4(%eax)
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185 movl %esi,CYGARC_JMP_BUF_ESI*4(%eax)
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186 movl %edi,CYGARC_JMP_BUF_EDI*4(%eax)
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187
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188 # Stack and PC
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189 movl %esp,CYGARC_JMP_BUF_SP*4(%eax)
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190 movl 0(%esp),%edx
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191 movl %edx,CYGARC_JMP_BUF_PC*4(%eax)
161
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192
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193 # Return 0
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194 xor %eax,%eax
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195 ret
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196
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197
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198 # hal_longjmp loads state from 4(esp) and returns to PC stored in state
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199
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200 FUNC_START(hal_longjmp)
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201 # Get return value
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202 movl 8(%esp),%eax
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203
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204 # Get jmpbuf pointer
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205 movl 4(%esp),%ecx
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206
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207 # Restore regular registers
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208 movl CYGARC_JMP_BUF_EBP*4(%ecx),%ebp
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209 movl CYGARC_JMP_BUF_EBX*4(%ecx),%ebx
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210 movl CYGARC_JMP_BUF_ESI*4(%ecx),%esi
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211 movl CYGARC_JMP_BUF_EDI*4(%ecx),%edi
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212
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213 # Restore stack pointer
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214 movl CYGARC_JMP_BUF_SP*4(%ecx),%esp
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215
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216 # Put return address on stack
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217 movl CYGARC_JMP_BUF_PC*4(%ecx),%edx
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218 movl %edx,0(%esp)
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219
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220 ret
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221
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222 #------------------------------------------------------------------------------
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223 # end of linux.S